asrock/e350m1/4.5-1323-g6a1503e9db/2017-03-16T15_25_40Z/coreboot_console_serial.txt

======= Thu Mar 16 23:20:30 2017 (adjust=86.8us)
00.000: j<a4><d4>Hh<d6>K<95><89><bd><bd><d1><b5><fe>4.5-1323-g6a1503e Thu Mar 16 15:25:40 UTC 2017 romstage starting...
00.000: POST: 0x34
00.000: BSP Family_Model: 00500f20
00.000: cpu_init_detectedx = 00000000
00.000: POST: 0x37
00.006: agesawrapper_amdinitreset() returned AGESA_SUCCESS
00.006: POST: 0x39
00.188: agesawrapper_amdinitearly() returned AGESA_SUCCESS
00.189: POST: 0x40
00.351: agesawrapper_amdinitpost() returned AGESA_SUCCESS
00.354: Wiped HEAP at [00010000 - 0002ffff]
00.355: POST: 0x42
00.372: agesawrapper_amdinitenv() returned AGESA_SUCCESS
00.372: POST: 0x50
00.374: CBFS: 'Master Header Locator' located CBFS at [100:3fffc0)
00.374: CBFS: Locating 'fallback/ramstage'
00.374: CBFS: Found @ offset 31580 size 18c98
00.441: 
00.441: 
00.441: coreboot-4.5-1323-g6a1503e Thu Mar 16 15:25:40 UTC 2017 ramstage starting...
00.441: POST: 0x39
00.441: POST: 0x80
00.441: POST: 0x70
00.441: BS: BS_PRE_DEVICE times (us): entry 0 run 1053 exit 0
00.441: POST: 0x71
00.441: SB800 - Smbus.c - alink_ab_indx - Start.
00.441: SB800 - Smbus.c - alink_ab_indx - End.
00.441: BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 8211 exit 0
00.441: POST: 0x72
00.441: Enumerating buses...
00.441: Show all devs... Before device enumeration.
00.441: Root Device: enabled 1
00.441: CPU_CLUSTER: 0: enabled 1
00.441: APIC: 00: enabled 1
00.441: DOMAIN: 0000: enabled 1
00.441: PCI: 00:00.0: enabled 1
00.441: PCI: 00:01.0: enabled 1
00.441: PCI: 00:01.1: enabled 1
00.441: PCI: 00:04.0: enabled 1
00.441: PCI: 00:05.0: enabled 0
00.441: PCI: 00:06.0: enabled 0
00.441: PCI: 00:07.0: enabled 0
00.441: PCI: 00:08.0: enabled 0
00.441: PCI: 00:11.0: enabled 1
00.441: PCI: 00:12.0: enabled 1
00.441: PCI: 00:12.2: enabled 1
00.441: PCI: 00:13.0: enabled 1
00.441: PCI: 00:13.2: enabled 1
00.441: PCI: 00:14.0: enabled 1
00.441: I2C: 00:50: enabled 1
00.441: I2C: 00:51: enabled 1
00.441: PCI: 00:14.1: enabled 1
00.441: PCI: 00:14.2: enabled 1
00.441: PCI: 00:14.3: enabled 1
00.441: PNP: 002e.0: enabled 0
00.441: PNP: 002e.1: enabled 0
00.441: PNP: 002e.2: enabled 1
00.441: PNP: 002e.3: enabled 0
00.441: PNP: 002e.5: enabled 1
00.441: PNP: 002e.6: enabled 0
00.441: PNP: 002e.107: enabled 0
00.441: PNP: 002e.207: enabled 0
00.441: PNP: 002e.307: enabled 1
00.441: PNP: 002e.407: enabled 0
00.441: PNP: 002e.8: enabled 0
00.441: PNP: 002e.9: enabled 1
00.441: PNP: 002e.109: enabled 0
00.442: PNP: 002e.209: enabled 0
00.442: PNP: 002e.309: enabled 0
00.442: PNP: 002e.a: enabled 1
00.442: PNP: 002e.b: enabled 1
00.442: PNP: 002e.c: enabled 0
00.442: PNP: 002e.d: enabled 1
00.442: PNP: 002e.e: enabled 0
00.442: PNP: 002e.f: enabled 0
00.442: PCI: 00:14.4: enabled 1
00.442: PCI: 00:14.5: enabled 1
00.442: PCI: 00:15.0: enabled 1
00.442: PCI: 00:15.1: enabled 1
00.442: PCI: 00:15.2: enabled 1
00.442: PCI: 00:15.3: enabled 0
00.442: PCI: 00:16.0: enabled 0
00.442: PCI: 00:16.2: enabled 0
00.442: PCI: 00:18.0: enabled 1
00.442: PCI: 00:18.1: enabled 1
00.442: PCI: 00:18.2: enabled 1
00.442: PCI: 00:18.3: enabled 1
00.442: PCI: 00:18.4: enabled 1
00.442: PCI: 00:18.5: enabled 1
00.442: PCI: 00:18.6: enabled 1
00.442: PCI: 00:18.7: enabled 1
00.442: Compare with tree...
00.442: Root Device: enabled 1
00.442:  CPU_CLUSTER: 0: enabled 1
00.442:   APIC: 00: enabled 1
00.442:  DOMAIN: 0000: enabled 1
00.442:   PCI: 00:00.0: enabled 1
00.442:   PCI: 00:01.0: enabled 1
00.442:   PCI: 00:01.1: enabled 1
00.442:   PCI: 00:04.0: enabled 1
00.442:   PCI: 00:05.0: enabled 0
00.442:   PCI: 00:06.0: enabled 0
00.442:   PCI: 00:07.0: enabled 0
00.442:   PCI: 00:08.0: enabled 0
00.442:   PCI: 00:11.0: enabled 1
00.442:   PCI: 00:12.0: enabled 1
00.442:   PCI: 00:12.2: enabled 1
00.442:   PCI: 00:13.0: enabled 1
00.442:   PCI: 00:13.2: enabled 1
00.442:   PCI: 00:14.0: enabled 1
00.442:    I2C: 00:50: enabled 1
00.442:    I2C: 00:51: enabled 1
00.442:   PCI: 00:14.1: enabled 1
00.442:   PCI: 00:14.2: enabled 1
00.442:   PCI: 00:14.3: enabled 1
00.442:    PNP: 002e.0: enabled 0
00.442:    PNP: 002e.1: enabled 0
00.442:    PNP: 002e.2: enabled 1
00.442:    PNP: 002e.3: enabled 0
00.442:    PNP: 002e.5: enabled 1
00.442:    PNP: 002e.6: enabled 0
00.442:    PNP: 002e.107: enabled 0
00.442:    PNP: 002e.207: enabled 0
00.442:    PNP: 002e.307: enabled 1
00.442:    PNP: 002e.407: enabled 0
00.442:    PNP: 002e.8: enabled 0
00.442:    PNP: 002e.9: enabled 1
00.442:    PNP: 002e.109: enabled 0
00.442:    PNP: 002e.209: enabled 0
00.442:    PNP: 002e.309: enabled 0
00.442:    PNP: 002e.a: enabled 1
00.442:    PNP: 002e.b: enabled 1
00.442:    PNP: 002e.c: enabled 0
00.442:    PNP: 002e.d: enabled 1
00.442:    PNP: 002e.e: enabled 0
00.442:    PNP: 002e.f: enabled 0
00.442:   PCI: 00:14.4: enabled 1
00.442:   PCI: 00:14.5: enabled 1
00.442:   PCI: 00:15.0: enabled 1
00.442:   PCI: 00:15.1: enabled 1
00.442:   PCI: 00:15.2: enabled 1
00.443:   PCI: 00:15.3: enabled 0
00.443:   PCI: 00:16.0: enabled 0
00.443:   PCI: 00:16.2: enabled 0
00.443:   PCI: 00:18.0: enabled 1
00.443:   PCI: 00:18.1: enabled 1
00.443:   PCI: 00:18.2: enabled 1
00.443:   PCI: 00:18.3: enabled 1
00.443:   PCI: 00:18.4: enabled 1
00.443:   PCI: 00:18.5: enabled 1
00.443:   PCI: 00:18.6: enabled 1
00.443:   PCI: 00:18.7: enabled 1
00.443: Mainboard E350M1 Enable.
00.443: Root Device scanning...
00.443: root_dev_scan_bus for Root Device
00.443: setup_bsp_ramtop, TOP MEM: msr.lo = 0xe0000000, msr.hi = 0x00000000
00.443: setup_bsp_ramtop, TOP MEM2: msr.lo = 0x1f000000, msr.hi = 0x00000002
00.443: setup_uma_memory: uma size 0x18000000, memory start 0xc8000000
00.443: CPU_CLUSTER: 0 enabled
00.443: DOMAIN: 0000 enabled
00.443: CPU_CLUSTER: 0 scanning...
00.443:   AP siblings=1
00.443: CPU: APIC: 00 enabled
00.443: CPU: APIC: 01 enabled
00.443: scan_bus: scanning of bus CPU_CLUSTER: 0 took 7957 usecs
00.443: DOMAIN: 0000 scanning...
00.443: PCI: pci_scan_bus for bus 00
00.443: POST: 0x24
00.443: PCI: 00:00.0 [1022/1510] ops
00.443: PCI: 00:00.0 [1022/1510] enabled
00.443: PCI: 00:01.0 [1002/9802] enabled
00.443: PCI: 00:01.1 [1002/1314] enabled
00.443: PCI: Static device PCI: 00:04.0 not found, disabling it.
00.443: PCI: 00:11.0 [1002/4390] enabled
00.443: PCI: 00:12.0 [1002/4397] ops
00.443: PCI: 00:12.0 [1002/4397] enabled
00.443: PCI: 00:12.2 [1002/4396] ops
00.443: PCI: 00:12.2 [1002/4396] enabled
00.443: PCI: 00:13.0 [1002/4397] ops
00.443: PCI: 00:13.0 [1002/4397] enabled
00.443: PCI: 00:13.2 [1002/4396] ops
00.443: PCI: 00:13.2 [1002/4396] enabled
00.443: IOAPIC: Clearing IOAPIC at fec00000
00.443: IOAPIC: 24 interrupts
00.443: IOAPIC: reg 0x00000000 value 0x00000000 0x00010000
00.443: IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
00.443: IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
00.443: IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
00.443: IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
00.443: IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
00.443: IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
00.443: IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
00.443: IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
00.443: IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
00.443: IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
00.443: IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
00.443: IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
00.443: IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
00.443: IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
00.443: IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
00.443: IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
00.443: IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
00.443: IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
00.443: IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
00.443: IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
00.443: IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
00.443: IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
00.443: IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
00.443: IOAPIC: Initializing IOAPIC at 0xfec00000
00.443: IOAPIC: Bootstrap Processor Local APIC = 0x00
00.443: IOAPIC: ID = 0x02
00.443: IOAPIC: Dumping registers
00.443:   reg 0x0000: 0x02000000
00.444:   reg 0x0001: 0x00178021
00.444:   reg 0x0002: 0x02000000
00.444: IOAPIC: 24 interrupts
00.444: IOAPIC: Enabling interrupts on FSB
00.444: IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
00.444: IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
00.444: IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
00.444: IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
00.444: IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
00.444: IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
00.444: IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
00.444: IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
00.444: IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
00.444: IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
00.444: IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
00.444: IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
00.444: IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
00.444: IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
00.444: IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
00.444: IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
00.444: IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
00.444: IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
00.444: IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
00.444: IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
00.444: IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
00.444: IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
00.444: IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
00.444: IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
00.444: PCI: 00:14.0 [1002/4385] enabled
00.444: PCI: Static device PCI: 00:14.1 not found, disabling it.
00.444: PCI: 00:14.2 [1002/4383] ops
00.444: PCI: 00:14.2 [1002/4383] enabled
00.444: PCI: 00:14.3 [1002/439d] bus ops
00.444: PCI: 00:14.3 [1002/439d] enabled
00.444: PCI: 00:14.4 [1002/4384] enabled
00.444: PCI: 00:14.5 [1002/4399] ops
00.444: PCI: 00:14.5 [1002/4399] enabled
00.444: Capability: type 0x01 @ 0x50
00.444: Capability: type 0x10 @ 0x58
00.444: Capability: type 0x0d @ 0xb0
00.444: Capability: type 0x08 @ 0xb8
00.444: Capability: type 0x01 @ 0x50
00.444: Capability: type 0x10 @ 0x58
00.444: PCI: 00:15.0 subordinate bus PCI Express
00.444: PCI: 00:15.0 [1002/43a0] enabled
00.444: Capability: type 0x01 @ 0x50
00.444: Capability: type 0x10 @ 0x58
00.444: Capability: type 0x0d @ 0xb0
00.444: Capability: type 0x08 @ 0xb8
00.444: Capability: type 0x01 @ 0x50
00.444: Capability: type 0x10 @ 0x58
00.444: PCI: 00:15.1 subordinate bus PCI Express
00.444: PCI: 00:15.1 [1002/43a1] enabled
00.444: Capability: type 0x01 @ 0x50
00.444: Capability: type 0x10 @ 0x58
00.444: Capability: type 0x0d @ 0xb0
00.444: Capability: type 0x08 @ 0xb8
00.444: Capability: type 0x01 @ 0x50
00.444: Capability: type 0x10 @ 0x58
00.444: PCI: 00:15.2 subordinate bus PCI Express
00.444: PCI: 00:15.2 [1002/43a2] enabled
00.444: Capability: type 0x01 @ 0x50
00.444: Capability: type 0x10 @ 0x58
00.444: Capability: type 0x0d @ 0xb0
00.444: Capability: type 0x08 @ 0xb8
00.444: Capability: type 0x01 @ 0x50
00.444: Capability: type 0x10 @ 0x58
00.444: PCI: 00:15.3 subordinate bus PCI Express
00.444: PCI: 00:15.3 [1002/43a3] disabled
00.537: PCI: 00:18.0 [1022/1700] enabled
00.537: PCI: 00:18.1 [1022/1701] enabled
00.537: PCI: 00:18.2 [1022/1702] enabled
00.537: PCI: 00:18.3 [1022/1703] enabled
00.537: PCI: 00:18.4 [1022/1704] enabled
00.537: PCI: 00:18.5 [1022/1718] enabled
00.537: PCI: 00:18.6 [1022/1716] enabled
00.537: PCI: 00:18.7 [1022/1719] enabled
00.537: POST: 0x25
00.537: PCI: 00:14.3 scanning...
00.537: scan_lpc_bus for PCI: 00:14.3
00.537: PNP: 002e.0 disabled
00.537: PNP: 002e.1 disabled
00.537: PNP: 002e.2 enabled
00.537: PNP: 002e.3 disabled
00.537: PNP: 002e.5 enabled
00.537: PNP: 002e.6 disabled
00.537: PNP: 002e.107 disabled
00.537: PNP: 002e.207 disabled
00.537: PNP: 002e.307 enabled
00.537: PNP: 002e.407 disabled
00.537: PNP: 002e.8 disabled
00.537: PNP: 002e.9 enabled
00.537: PNP: 002e.109 disabled
00.537: PNP: 002e.209 disabled
00.537: PNP: 002e.309 disabled
00.537: PNP: 002e.a enabled
00.537: PNP: 002e.b enabled
00.537: PNP: 002e.c disabled
00.537: PNP: 002e.d enabled
00.537: PNP: 002e.e disabled
00.538: PNP: 002e.f disabled
00.538: scan_lpc_bus for PCI: 00:14.3 done
00.538: scan_bus: scanning of bus PCI: 00:14.3 took 49616 usecs
00.538: PCI: 00:14.4 scanning...
00.538: do_pci_scan_bridge for PCI: 00:14.4
00.538: PCI: pci_scan_bus for bus 01
00.538: POST: 0x24
00.538: POST: 0x25
00.538: POST: 0x55
00.538: scan_bus: scanning of bus PCI: 00:14.4 took 11349 usecs
00.538: PCI: 00:15.0 scanning...
00.538: do_pci_scan_bridge for PCI: 00:15.0
00.538: PCI: pci_scan_bus for bus 02
00.538: POST: 0x24
00.538: POST: 0x25
00.538: POST: 0x55
00.538: scan_bus: scanning of bus PCI: 00:15.0 took 11332 usecs
00.538: PCI: 00:15.1 scanning...
00.538: do_pci_scan_bridge for PCI: 00:15.1
00.538: PCI: pci_scan_bus for bus 03
00.538: POST: 0x24
00.538: PCI: 03:00.0 [10ec/8168] enabled
00.538: POST: 0x25
00.538: POST: 0x55
00.538: Capability: type 0x01 @ 0x40
00.538: Capability: type 0x05 @ 0x50
00.538: Capability: type 0x10 @ 0x70
00.538: Capability: type 0x01 @ 0x50
00.538: Capability: type 0x10 @ 0x58
00.538: ASPM: Enabled L0s and L1
00.538: scan_bus: scanning of bus PCI: 00:15.1 took 29694 usecs
00.538: PCI: 00:15.2 scanning...
00.538: do_pci_scan_bridge for PCI: 00:15.2
00.538: PCI: pci_scan_bus for bus 04
00.538: POST: 0x24
00.538: POST: 0x25
00.538: POST: 0x55
00.538: scan_bus: scanning of bus PCI: 00:15.2 took 11341 usecs
00.538: POST: 0x55
00.538: scan_bus: scanning of bus DOMAIN: 0000 took 667744 usecs
00.538: root_dev_scan_bus for Root Device done
00.538: scan_bus: scanning of bus Root Device took 716165 usecs
00.538: done
00.538: BS: BS_DEV_ENUMERATE times (us): entry 0 run 1004469 exit 0
00.538: POST: 0x73
00.538: found VGA at PCI: 00:01.0
00.538: Setting up VGA for PCI: 00:01.0
00.538: Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
00.538: Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
00.538: Allocating resources...
00.538: Reading resources...
00.538: Root Device read_resources bus 0 link: 0
00.538: CPU_CLUSTER: 0 read_resources bus 0 link: 0
00.538: CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
00.538: 
00.538: Fam14h - domain_read_resources
00.538: DOMAIN: 0000 read_resources bus 0 link: 0
00.538: 
00.538: Fam14h - nb_read_resources
00.538: Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000.
00.539: PCI: 00:14.0 read_resources bus 0 link: 0
00.539: I2C: 00:50 missing read_resources
00.539: I2C: 00:51 missing read_resources
00.539: PCI: 00:14.0 read_resources bus 0 link: 0 done
00.539: SB800 - Lpc.c - lpc_read_resources - Start.
00.539: SB800 - Lpc.c - lpc_read_resources - End.
00.539: PCI: 00:14.3 read_resources bus 0 link: 0
00.539: PCI: 00:14.3 read_resources bus 0 link: 0 done
00.539: PCI: 00:14.4 read_resources bus 1 link: 0
00.539: PCI: 00:14.4 read_resources bus 1 link: 0 done
00.540: PCI: 00:15.0 read_resources bus 2 link: 0
00.540: PCI: 00:15.0 read_resources bus 2 link: 0 done
00.540: PCI: 00:15.1 read_resources bus 3 link: 0
00.540: PCI: 00:15.1 read_resources bus 3 link: 0 done
00.540: PCI: 00:15.2 register 10(ffffffff), read-only ignoring it
00.540: PCI: 00:15.2 register 14(ffffffff), read-only ignoring it
00.540: PCI: 00:15.2 register 38(ffffffff), read-only ignoring it
00.540: PCI: 00:15.2 read_resources bus 4 link: 0
00.540: PCI: 00:15.2 read_resources bus 4 link: 0 done
00.540: DOMAIN: 0000 read_resources bus 0 link: 0 done
00.540: Root Device read_resources bus 0 link: 0 done
00.540: Done reading resources.
00.540: Show resources in subtree (Root Device)...After reading.
00.540:  Root Device child on link 0 CPU_CLUSTER: 0
00.540:   CPU_CLUSTER: 0 child on link 0 APIC: 00
00.540:    APIC: 00
00.540:    APIC: 01
00.540:   DOMAIN: 0000 child on link 0 PCI: 00:00.0
00.540:   DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
00.540:   DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
00.540:    PCI: 00:00.0
00.540:    PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
00.540:    PCI: 00:01.0
00.540:    PCI: 00:01.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10
00.540:    PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 14
00.540:    PCI: 00:01.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 18
00.540:    PCI: 00:01.1
00.540:    PCI: 00:01.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10
00.540:    PCI: 00:04.0
00.541:    PCI: 00:05.0
00.541:    PCI: 00:06.0
00.541:    PCI: 00:07.0
00.541:    PCI: 00:08.0
00.541:    PCI: 00:11.0
00.541:    PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
00.541:    PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
00.541:    PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
00.541:    PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
00.541:    PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
00.541:    PCI: 00:11.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 24
00.541:    PCI: 00:12.0
00.541:    PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
00.541:    PCI: 00:12.2
00.541:    PCI: 00:12.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
00.541:    PCI: 00:13.0
00.541:    PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
00.541:    PCI: 00:13.2
00.541:    PCI: 00:13.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
00.541:    PCI: 00:14.0 child on link 0 I2C: 00:50
00.541:     I2C: 00:50
00.541:     I2C: 00:51
00.541:    PCI: 00:14.1
00.541:    PCI: 00:14.2
00.541:    PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
00.541:    PCI: 00:14.3 child on link 0 PNP: 002e.0
00.541:    PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
00.541:    PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
00.541:    PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
00.541:    PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
00.541:     PNP: 002e.0
00.541:     PNP: 002e.1
00.541:     PNP: 002e.2
00.541:     PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60
00.541:     PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
00.541:     PNP: 002e.3
00.541:     PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60
00.541:     PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
00.541:     PNP: 002e.5
00.541:     PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
00.541:     PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62
00.541:     PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
00.541:     PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72
00.541:     PNP: 002e.6
00.541:     PNP: 002e.6 resource base 100 size 8 align 3 gran 3 limit fff flags c0000100 index 60
00.541:     PNP: 002e.6 resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
00.541:     PNP: 002e.107
00.541:     PNP: 002e.207
00.541:     PNP: 002e.307
00.541:     PNP: 002e.307 resource base 28 size 0 align 0 gran 0 limit 0 flags c0000400 index 23
00.541:     PNP: 002e.307 resource base bf size 0 align 0 gran 0 limit 0 flags c0000400 index e4
00.541:     PNP: 002e.307 resource base 27 size 0 align 0 gran 0 limit 0 flags c0000400 index ed
00.541:     PNP: 002e.407
00.542:     PNP: 002e.8
00.542:     PNP: 002e.9
00.542:     PNP: 002e.9 resource base 42 size 0 align 0 gran 0 limit 0 flags c0000400 index 2a
00.542:     PNP: 002e.9 resource base e3 size 0 align 0 gran 0 limit 0 flags c0000400 index e0
00.542:     PNP: 002e.109
00.542:     PNP: 002e.209
00.542:     PNP: 002e.309
00.542:     PNP: 002e.a
00.542:     PNP: 002e.a resource base 10 size 0 align 0 gran 0 limit 0 flags c0000400 index e7
00.542:     PNP: 002e.b
00.542:     PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit fff flags c0000100 index 60
00.542:     PNP: 002e.b resource base 0 size 2 align 1 gran 1 limit fff flags c0000100 index 62
00.542:     PNP: 002e.b resource base 5 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
00.542:     PNP: 002e.c
00.542:     PNP: 002e.d
00.542:     PNP: 002e.d resource base 90 size 0 align 0 gran 0 limit 0 flags c0000400 index ec
00.542:     PNP: 002e.e
00.542:     PNP: 002e.e resource base 0 size 8 align 3 gran 3 limit fff flags c0000100 index 60
00.542:     PNP: 002e.e resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
00.542:     PNP: 002e.f
00.542:    PCI: 00:14.4
00.542:    PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
00.542:    PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
00.542:    PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
00.542:    PCI: 00:14.5
00.542:    PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
00.542:    PCI: 00:15.0
00.542:    PCI: 00:15.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
00.542:    PCI: 00:15.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
00.542:    PCI: 00:15.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
00.542:    PCI: 00:15.1 child on link 0 PCI: 03:00.0
00.542:    PCI: 00:15.1 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
00.542:    PCI: 00:15.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
00.542:    PCI: 00:15.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
00.542:     PCI: 03:00.0
00.542:     PCI: 03:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
00.542:     PCI: 03:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 1201 index 18
00.542:     PCI: 03:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20
00.542:    PCI: 00:15.2
00.542:    PCI: 00:15.3
00.542:    PCI: 00:16.0
00.542:    PCI: 00:16.2
00.542:    PCI: 00:18.0
00.542:    PCI: 00:18.1
00.542:    PCI: 00:18.2
00.542:    PCI: 00:18.3
00.542:    PCI: 00:18.4
00.542:    PCI: 00:18.5
00.542:    PCI: 00:18.6
00.542:    PCI: 00:18.7
00.542: DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
00.543: PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
00.543: PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
00.543: PCI: 00:15.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
00.543: PCI: 00:15.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
00.543: PCI: 00:15.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
00.543: PCI: 03:00.0 10 *  [0x0 - 0xff] io
00.543: PCI: 00:15.1 io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
00.543: PCI: 00:15.1 1c *  [0x0 - 0xfff] io
00.543: PCI: 00:01.0 14 *  [0x1000 - 0x10ff] io
00.543: PCI: 00:11.0 20 *  [0x1400 - 0x140f] io
00.543: PCI: 00:11.0 10 *  [0x1410 - 0x1417] io
00.543: PCI: 00:11.0 18 *  [0x1418 - 0x141f] io
00.543: PCI: 00:11.0 14 *  [0x1420 - 0x1423] io
00.543: PCI: 00:11.0 1c *  [0x1424 - 0x1427] io
00.543: DOMAIN: 0000 io: base: 1428 size: 1428 align: 12 gran: 0 limit: ffff done
00.543: DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
00.543: PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
00.543: PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
00.543: PCI: 00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
00.543: PCI: 00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
00.543: PCI: 00:15.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
00.543: PCI: 00:15.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
00.543: PCI: 00:15.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
00.543: PCI: 00:15.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
00.543: PCI: 00:15.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
00.543: PCI: 03:00.0 20 *  [0x0 - 0x3fff] prefmem
00.543: PCI: 03:00.0 18 *  [0x4000 - 0x4fff] prefmem
00.543: PCI: 00:15.1 prefmem: base: 5000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
00.543: PCI: 00:15.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
00.543: PCI: 00:15.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
00.543: PCI: 00:01.0 10 *  [0x0 - 0xfffffff] prefmem
00.543: PCI: 00:15.1 24 *  [0x10000000 - 0x100fffff] prefmem
00.543: PCI: 00:01.0 18 *  [0x10100000 - 0x1013ffff] mem
00.543: PCI: 00:01.1 10 *  [0x10140000 - 0x10143fff] mem
00.543: PCI: 00:14.2 10 *  [0x10144000 - 0x10147fff] mem
00.543: PCI: 00:12.0 10 *  [0x10148000 - 0x10148fff] mem
00.543: PCI: 00:13.0 10 *  [0x10149000 - 0x10149fff] mem
00.543: PCI: 00:14.5 10 *  [0x1014a000 - 0x1014afff] mem
00.543: PCI: 00:11.0 24 *  [0x1014b000 - 0x1014b3ff] mem
00.543: PCI: 00:12.2 10 *  [0x1014c000 - 0x1014c0ff] mem
00.543: PCI: 00:13.2 10 *  [0x1014d000 - 0x1014d0ff] mem
00.543: DOMAIN: 0000 mem: base: 1014d100 size: 1014d100 align: 28 gran: 0 limit: ffffffff done
00.543: avoid_fixed_resources: DOMAIN: 0000
00.543: avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
00.543: avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
00.543: constrain_resources: PCI: 00:00.0 c0010058 base f8000000 limit fbffffff mem (fixed)
00.543: constrain_resources: PCI: 00:14.3 10000000 base 00000000 limit 00000fff io (fixed)
00.543: skipping PNP: 002e.307@23 fixed resource, size=0!
00.543: skipping PNP: 002e.307@e4 fixed resource, size=0!
00.543: skipping PNP: 002e.307@ed fixed resource, size=0!
00.543: skipping PNP: 002e.9@2a fixed resource, size=0!
00.543: skipping PNP: 002e.9@e0 fixed resource, size=0!
00.543: skipping PNP: 002e.a@e7 fixed resource, size=0!
00.543: skipping PNP: 002e.d@ec fixed resource, size=0!
00.543: avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff
00.543: avoid_fixed_resources:@DOMAIN: 0000 10000100 base e0000000 limit f7ffffff
00.543: Setting resources...
00.543: DOMAIN: 0000 io: base:1000 size:1428 align:12 gran:0 limit:ffff
00.543: PCI: 00:15.1 1c *  [0x1000 - 0x1fff] io
00.543: PCI: 00:01.0 14 *  [0x2000 - 0x20ff] io
00.543: PCI: 00:11.0 20 *  [0x2400 - 0x240f] io
00.543: PCI: 00:11.0 10 *  [0x2410 - 0x2417] io
00.543: PCI: 00:11.0 18 *  [0x2418 - 0x241f] io
00.543: PCI: 00:11.0 14 *  [0x2420 - 0x2423] io
00.543: PCI: 00:11.0 1c *  [0x2424 - 0x2427] io
00.543: DOMAIN: 0000 io: next_base: 2428 size: 1428 align: 12 gran: 0 done
00.543: PCI: 00:14.4 io: base:ffff size:0 align:12 gran:12 limit:ffff
00.543: PCI: 00:14.4 io: next_base: ffff size: 0 align: 12 gran: 12 done
00.543: PCI: 00:15.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
00.543: PCI: 00:15.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
00.543: PCI: 00:15.1 io: base:1000 size:1000 align:12 gran:12 limit:1fff
00.543: PCI: 03:00.0 10 *  [0x1000 - 0x10ff] io
00.543: PCI: 00:15.1 io: next_base: 1100 size: 1000 align: 12 gran: 12 done
00.543: DOMAIN: 0000 mem: base:e0000000 size:1014d100 align:28 gran:0 limit:f7ffffff
00.543: PCI: 00:01.0 10 *  [0xe0000000 - 0xefffffff] prefmem
00.543: PCI: 00:15.1 24 *  [0xf0000000 - 0xf00fffff] prefmem
00.543: PCI: 00:01.0 18 *  [0xf0100000 - 0xf013ffff] mem
00.543: PCI: 00:01.1 10 *  [0xf0140000 - 0xf0143fff] mem
00.543: PCI: 00:14.2 10 *  [0xf0144000 - 0xf0147fff] mem
00.543: PCI: 00:12.0 10 *  [0xf0148000 - 0xf0148fff] mem
00.543: PCI: 00:13.0 10 *  [0xf0149000 - 0xf0149fff] mem
00.543: PCI: 00:14.5 10 *  [0xf014a000 - 0xf014afff] mem
00.543: PCI: 00:11.0 24 *  [0xf014b000 - 0xf014b3ff] mem
00.543: PCI: 00:12.2 10 *  [0xf014c000 - 0xf014c0ff] mem
00.543: PCI: 00:13.2 10 *  [0xf014d000 - 0xf014d0ff] mem
00.543: DOMAIN: 0000 mem: next_base: f014d100 size: 1014d100 align: 28 gran: 0 done
00.543: PCI: 00:14.4 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
00.543: PCI: 00:14.4 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
00.543: PCI: 00:14.4 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
00.543: PCI: 00:14.4 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
00.543: PCI: 00:15.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
00.543: PCI: 00:15.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
00.543: PCI: 00:15.0 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
00.543: PCI: 00:15.0 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
00.543: PCI: 00:15.1 prefmem: base:f0000000 size:100000 align:20 gran:20 limit:f00fffff
00.543: PCI: 03:00.0 20 *  [0xf0000000 - 0xf0003fff] prefmem
00.543: PCI: 03:00.0 18 *  [0xf0004000 - 0xf0004fff] prefmem
00.543: PCI: 00:15.1 prefmem: next_base: f0005000 size: 100000 align: 20 gran: 20 done
00.543: PCI: 00:15.1 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
00.543: PCI: 00:15.1 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
00.543: Root Device assign_resources, bus 0 link: 0
00.543: 
00.543: Fam14h - domain_set_resources
00.543:   amsr - incoming dev = 00133240
00.543: adsr: (before) basek = 0, limitk = 21effffff.
00.543: adsr: (after) basek = 0, limitk = 87bfff, sizek = 87c000.
00.544: adsr - 0xa0000 to 0xbffff resource.
00.544: adsr: mmio_basek=00380000, basek=00000300, limitk=0087bfff
00.543: 0: mmio_basek=00380000, basek=00400000, limitk=0087bfff
00.544:   adsr - mmio_basek = 380000.
00.544: DOMAIN: 0000 assign_resources, bus 0 link: 0
00.544: 
00.544: Fam14h - nb_set_resources
00.544: 
00.544: Fam14h - create_vga_resource
00.544: 
00.544: Fam14h - set_resource
00.544: PCI: 00:01.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem
00.544: PCI: 00:01.0 14 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
00.544: PCI: 00:01.0 18 <- [0x00f0100000 - 0x00f013ffff] size 0x00040000 gran 0x12 mem
00.544: PCI: 00:01.1 10 <- [0x00f0140000 - 0x00f0143fff] size 0x00004000 gran 0x0e mem
00.544: PCI: 00:11.0 10 <- [0x0000002410 - 0x0000002417] size 0x00000008 gran 0x03 io
00.544: PCI: 00:11.0 14 <- [0x0000002420 - 0x0000002423] size 0x00000004 gran 0x02 io
00.544: PCI: 00:11.0 18 <- [0x0000002418 - 0x000000241f] size 0x00000008 gran 0x03 io
00.544: PCI: 00:11.0 1c <- [0x0000002424 - 0x0000002427] size 0x00000004 gran 0x02 io
00.544: PCI: 00:11.0 20 <- [0x0000002400 - 0x000000240f] size 0x00000010 gran 0x04 io
00.544: PCI: 00:11.0 24 <- [0x00f014b000 - 0x00f014b3ff] size 0x00000400 gran 0x0a mem
00.544: PCI: 00:12.0 10 <- [0x00f0148000 - 0x00f0148fff] size 0x00001000 gran 0x0c mem
00.544: PCI: 00:12.2 10 <- [0x00f014c000 - 0x00f014c0ff] size 0x00000100 gran 0x08 mem
00.544: PCI: 00:13.0 10 <- [0x00f0149000 - 0x00f0149fff] size 0x00001000 gran 0x0c mem
00.544: PCI: 00:13.2 10 <- [0x00f014d000 - 0x00f014d0ff] size 0x00000100 gran 0x08 mem
00.544: PCI: 00:14.2 10 <- [0x00f0144000 - 0x00f0147fff] size 0x00004000 gran 0x0e mem64
00.544: SB800 - Lpc.c - lpc_set_resources - Start.
00.544: PCI: 00:14.3 assign_resources, bus 0 link: 0
00.544: PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
00.544: PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
00.544: PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
00.544: PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io
00.544: PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
00.544: PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
00.544: PNP: 002e.307 23 <- [0x0000000028 - 0x0000000027] size 0x00000000 gran 0x00 irq
00.544: PNP: 002e.307 e4 <- [0x00000000bf - 0x00000000be] size 0x00000000 gran 0x00 irq
00.544: PNP: 002e.307 ed <- [0x0000000027 - 0x0000000026] size 0x00000000 gran 0x00 irq
00.544: PNP: 002e.9 2a <- [0x0000000042 - 0x0000000041] size 0x00000000 gran 0x00 irq
00.544: PNP: 002e.9 e0 <- [0x00000000e3 - 0x00000000e2] size 0x00000000 gran 0x00 irq
00.544: PNP: 002e.a e7 <- [0x0000000010 - 0x000000000f] size 0x00000000 gran 0x00 irq
00.544: PNP: 002e.b 60 <- [0x0000000290 - 0x0000000291] size 0x00000002 gran 0x01 io
00.544: PNP: 002e.b 62 <- [0x0000000000 - 0x0000000001] size 0x00000002 gran 0x01 io
00.544: PNP: 002e.b 70 <- [0x0000000005 - 0x0000000005] size 0x00000001 gran 0x00 irq
00.544: PNP: 002e.d ec <- [0x0000000090 - 0x000000008f] size 0x00000000 gran 0x00 irq
00.544: PCI: 00:14.3 assign_resources, bus 0 link: 0
00.544: SB800 - Lpc.c - lpc_set_resources - End.
00.544: PCI: 00:14.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
00.544: PCI: 00:14.4 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 prefmem
00.544: PCI: 00:14.4 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 mem
00.544: PCI: 00:14.5 10 <- [0x00f014a000 - 0x00f014afff] size 0x00001000 gran 0x0c mem
00.544: PCI: 00:15.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
00.544: PCI: 00:15.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem
00.544: PCI: 00:15.0 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 mem
00.544: PCI: 00:15.1 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 03 io
00.544: PCI: 00:15.1 24 <- [0x00f0000000 - 0x00f00fffff] size 0x00100000 gran 0x14 bus 03 prefmem
00.544: PCI: 00:15.1 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 03 mem
00.544: PCI: 00:15.1 assign_resources, bus 3 link: 0
00.544: PCI: 03:00.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
00.544: PCI: 03:00.0 18 <- [0x00f0004000 - 0x00f0004fff] size 0x00001000 gran 0x0c prefmem64
00.544: PCI: 03:00.0 20 <- [0x00f0000000 - 0x00f0003fff] size 0x00004000 gran 0x0e prefmem64
00.544: PCI: 00:15.1 assign_resources, bus 3 link: 0
00.544: DOMAIN: 0000 assign_resources, bus 0 link: 0
00.544:   adsr - leaving this lovely routine.
00.544: Root Device assign_resources, bus 0 link: 0
00.544: Done setting resources.
00.544: Show resources in subtree (Root Device)...After assigning values.
00.544:  Root Device child on link 0 CPU_CLUSTER: 0
00.544:   CPU_CLUSTER: 0 child on link 0 APIC: 00
00.544:    APIC: 00
00.544:    APIC: 01
00.544:   DOMAIN: 0000 child on link 0 PCI: 00:00.0
00.544:   DOMAIN: 0000 resource base 1000 size 1428 align 12 gran 0 limit ffff flags 40040100 index 10000000
00.544:   DOMAIN: 0000 resource base e0000000 size 1014d100 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100
00.544:   DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10
00.544:   DOMAIN: 0000 resource base c0000 size dff40000 align 0 gran 0 limit 0 flags e0004200 index 20
00.544:   DOMAIN: 0000 resource base 100000000 size 11efffc00 align 0 gran 0 limit 0 flags e0004200 index 30
00.544:   DOMAIN: 0000 resource base c8000000 size 18000000 align 0 gran 0 limit 0 flags f0000200 index 7
00.544:    PCI: 00:00.0
00.544:    PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
00.545:    PCI: 00:01.0
00.545:    PCI: 00:01.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001200 index 10
00.545:    PCI: 00:01.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 14
00.545:    PCI: 00:01.0 resource base f0100000 size 40000 align 18 gran 18 limit f013ffff flags 60000200 index 18
00.545:    PCI: 00:01.1
00.545:    PCI: 00:01.1 resource base f0140000 size 4000 align 14 gran 14 limit f0143fff flags 60000200 index 10
00.545:    PCI: 00:04.0
00.545:    PCI: 00:05.0
00.545:    PCI: 00:06.0
00.545:    PCI: 00:07.0
00.545:    PCI: 00:08.0
00.545:    PCI: 00:11.0
00.545:    PCI: 00:11.0 resource base 2410 size 8 align 3 gran 3 limit 2417 flags 60000100 index 10
00.545:    PCI: 00:11.0 resource base 2420 size 4 align 2 gran 2 limit 2423 flags 60000100 index 14
00.545:    PCI: 00:11.0 resource base 2418 size 8 align 3 gran 3 limit 241f flags 60000100 index 18
00.545:    PCI: 00:11.0 resource base 2424 size 4 align 2 gran 2 limit 2427 flags 60000100 index 1c
00.545:    PCI: 00:11.0 resource base 2400 size 10 align 4 gran 4 limit 240f flags 60000100 index 20
00.545:    PCI: 00:11.0 resource base f014b000 size 400 align 12 gran 10 limit f014b3ff flags 60000200 index 24
00.545:    PCI: 00:12.0
00.545:    PCI: 00:12.0 resource base f0148000 size 1000 align 12 gran 12 limit f0148fff flags 60000200 index 10
00.545:    PCI: 00:12.2
00.545:    PCI: 00:12.2 resource base f014c000 size 100 align 12 gran 8 limit f014c0ff flags 60000200 index 10
00.545:    PCI: 00:13.0
00.545:    PCI: 00:13.0 resource base f0149000 size 1000 align 12 gran 12 limit f0149fff flags 60000200 index 10
00.545:    PCI: 00:13.2
00.545:    PCI: 00:13.2 resource base f014d000 size 100 align 12 gran 8 limit f014d0ff flags 60000200 index 10
00.545:    PCI: 00:14.0 child on link 0 I2C: 00:50
00.545:     I2C: 00:50
00.545:     I2C: 00:51
00.545:    PCI: 00:14.1
00.545:    PCI: 00:14.2
00.545:    PCI: 00:14.2 resource base f0144000 size 4000 align 14 gran 14 limit f0147fff flags 60000201 index 10
00.545:    PCI: 00:14.3 child on link 0 PNP: 002e.0
00.545:    PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
00.545:    PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
00.545:    PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
00.545:    PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
00.545:     PNP: 002e.0
00.545:     PNP: 002e.1
00.545:     PNP: 002e.2
00.545:     PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit fff flags e0000100 index 60
00.545:     PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
00.545:     PNP: 002e.3
00.545:     PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60
00.545:     PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
00.545:     PNP: 002e.5
00.545:     PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60
00.545:     PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 62
00.545:     PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
00.545:     PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72
00.545:     PNP: 002e.6
00.545:     PNP: 002e.6 resource base 100 size 8 align 3 gran 3 limit fff flags c0000100 index 60
00.545:     PNP: 002e.6 resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
00.545:     PNP: 002e.107
00.545:     PNP: 002e.207
00.545:     PNP: 002e.307
00.546:     PNP: 002e.307 resource base 28 size 0 align 0 gran 0 limit 0 flags e0000400 index 23
00.546:     PNP: 002e.307 resource base bf size 0 align 0 gran 0 limit 0 flags e0000400 index e4
00.546:     PNP: 002e.307 resource base 27 size 0 align 0 gran 0 limit 0 flags e0000400 index ed
00.546:     PNP: 002e.407
00.546:     PNP: 002e.8
00.546:     PNP: 002e.9
00.546:     PNP: 002e.9 resource base 42 size 0 align 0 gran 0 limit 0 flags e0000400 index 2a
00.546:     PNP: 002e.9 resource base e3 size 0 align 0 gran 0 limit 0 flags e0000400 index e0
00.546:     PNP: 002e.109
00.546:     PNP: 002e.209
00.546:     PNP: 002e.309
00.546:     PNP: 002e.a
00.546:     PNP: 002e.a resource base 10 size 0 align 0 gran 0 limit 0 flags e0000400 index e7
00.546:     PNP: 002e.b
00.546:     PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit fff flags e0000100 index 60
00.546:     PNP: 002e.b resource base 0 size 2 align 1 gran 1 limit fff flags e0000100 index 62
00.546:     PNP: 002e.b resource base 5 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
00.546:     PNP: 002e.c
00.546:     PNP: 002e.d
00.546:     PNP: 002e.d resource base 90 size 0 align 0 gran 0 limit 0 flags e0000400 index ec
00.546:     PNP: 002e.e
00.546:     PNP: 002e.e resource base 0 size 8 align 3 gran 3 limit fff flags c0000100 index 60
00.546:     PNP: 002e.e resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
00.546:     PNP: 002e.f
00.546:    PCI: 00:14.4
00.546:    PCI: 00:14.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
00.546:    PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
00.546:    PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20
00.546:    PCI: 00:14.5
00.546:    PCI: 00:14.5 resource base f014a000 size 1000 align 12 gran 12 limit f014afff flags 60000200 index 10
00.546:    PCI: 00:15.0
00.546:    PCI: 00:15.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
00.546:    PCI: 00:15.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
00.546:    PCI: 00:15.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20
00.546:    PCI: 00:15.1 child on link 0 PCI: 03:00.0
00.546:    PCI: 00:15.1 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c
00.546:    PCI: 00:15.1 resource base f0000000 size 100000 align 20 gran 20 limit f00fffff flags 60081202 index 24
00.546:    PCI: 00:15.1 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20
00.546:     PCI: 03:00.0
00.546:     PCI: 03:00.0 resource base 1000 size 100 align 8 gran 8 limit 10ff flags 60000100 index 10
00.546:     PCI: 03:00.0 resource base f0004000 size 1000 align 12 gran 12 limit f0004fff flags 60001201 index 18
00.546:     PCI: 03:00.0 resource base f0000000 size 4000 align 14 gran 14 limit f0003fff flags 60001201 index 20
00.546:    PCI: 00:15.2
00.546:    PCI: 00:15.3
00.546:    PCI: 00:16.0
00.546:    PCI: 00:16.2
00.546:    PCI: 00:18.0
00.546:    PCI: 00:18.1
00.546:    PCI: 00:18.2
00.546:    PCI: 00:18.3
00.546:    PCI: 00:18.4
00.546:    PCI: 00:18.5
00.546:    PCI: 00:18.6
00.547:    PCI: 00:18.7
00.547: Done allocating resources.
00.547: BS: BS_DEV_RESOURCES times (us): entry 0 run 2254130 exit 0
00.547: Warning: Can't write PCI_INTR 0xC00/0xC01 registers because
00.547: 'mainboard_picr_data' or 'mainboard_intr_data' tables are NULL
00.547: Warning: Can't write PCI IRQ assignments because 'mainboard_pirq_data' structure does not exist
00.547: POST: 0x74
00.547: Enabling resources...
00.552: 
00.552: Fam14h - domain_enable_resources
00.556: agesawrapper_amdinitmid() returned AGESA_SUCCESS
00.556:   ader - leaving domain_enable_resources.
00.556: PCI: 00:00.0 cmd <- 06
00.556: PCI: 00:01.0 subsystem <- 1022/1510
00.556: PCI: 00:01.0 cmd <- 07
00.556: PCI: 00:01.1 subsystem <- 1022/1510
00.556: PCI: 00:01.1 cmd <- 02
00.556: PCI: 00:11.0 subsystem <- 1022/1510
00.556: PCI: 00:11.0 cmd <- 03
00.556: PCI: 00:12.0 subsystem <- 1022/1510
00.556: PCI: 00:12.0 cmd <- 02
00.556: PCI: 00:12.2 subsystem <- 1022/1510
00.556: PCI: 00:12.2 cmd <- 02
00.556: PCI: 00:13.0 subsystem <- 1022/1510
00.556: PCI: 00:13.0 cmd <- 02
00.556: PCI: 00:13.2 subsystem <- 1022/1510
00.556: PCI: 00:13.2 cmd <- 02
00.556: PCI: 00:14.0 subsystem <- 1022/1510
00.556: PCI: 00:14.0 cmd <- 403
00.556: PCI: 00:14.2 subsystem <- 1022/1510
00.556: PCI: 00:14.2 cmd <- 02
00.556: PCI: 00:14.3 subsystem <- 1022/1510
00.556: PCI: 00:14.3 cmd <- 0f
00.556: PCI: 00:14.4 bridge ctrl <- 0003
00.556: PCI: 00:14.4 cmd <- 21
00.556: PCI: 00:14.5 subsystem <- 1022/1510
00.556: PCI: 00:14.5 cmd <- 02
00.556: PCI: 00:15.0 bridge ctrl <- 0003
00.557: PCI: 00:15.0 cmd <- 00
00.557: PCI: 00:15.1 bridge ctrl <- 0003
00.557: PCI: 00:15.1 cmd <- 07
00.557: PCI: 00:15.2 bridge ctrl <- ffff
00.557: PCI: 00:15.2 cmd <- ffff
00.557: PCI: 00:18.0 subsystem <- 1022/1510
00.557: PCI: 00:18.0 cmd <- 00
00.557: PCI: 00:18.1 subsystem <- 1022/1510
00.557: PCI: 00:18.1 cmd <- 00
00.557: PCI: 00:18.2 subsystem <- 1022/1510
00.557: PCI: 00:18.2 cmd <- 00
00.557: PCI: 00:18.3 subsystem <- 1022/1510
00.557: PCI: 00:18.3 cmd <- 00
00.557: PCI: 00:18.4 subsystem <- 1022/1510
00.557: PCI: 00:18.4 cmd <- 00
00.557: PCI: 00:18.5 subsystem <- 1022/1510
00.557: PCI: 00:18.5 cmd <- 00
00.557: PCI: 00:18.6 subsystem <- 1022/1510
00.557: PCI: 00:18.6 cmd <- 00
00.557: PCI: 00:18.7 subsystem <- 1022/1510
00.557: PCI: 00:18.7 cmd <- 00
00.557: PCI: 03:00.0 cmd <- 03
00.557: done.
00.557: BS: BS_DEV_ENABLE times (us): entry 19274 run 150383 exit 0
00.557: POST: 0x75
00.557: Initializing devices...
00.558: Root Device init ...
00.558: Root Device init finished in 1921 usecs
00.558: POST: 0x75
00.558: CPU_CLUSTER: 0 init ...
00.558: start_eip=0x00001000, code_size=0x00000031
00.558: Initializing CPU #0
00.558: CPU: vendor AMD device 500f20
00.558: CPU: family 14, model 02, stepping 00
00.558: Model 14 Init.
00.558: 
00.558: MTRR check
00.558: Fixed MTRRs   : Enabled
00.558: Variable MTRRs: Enabled
00.558: 
00.558: POST: 0x93
00.558: POST: 0x60
00.559: Enabling cache
00.559: Setting up local APIC... apic_id: 0x00 done.
00.559: POST: 0x9b
00.559: siblings = 01, CPU #0 initialized
00.559: CPU1: stack_base 00137000, stack_end 00137ff8
00.559: Asserting INIT.
00.559: Waiting for send to finish...
00.559: +Deasserting INIT.
00.569: Waiting for send to finish...
00.569: +#startup loops: 2.
00.569: Sending STARTUP #1 to 1.
00.569: After apic_write.
00.570: Startup point 1.
00.569: Waiting for send to finish...
00.570: +Sending STARTUP #2 to 1.
00.570: After apic_write.
00.570: Startup point 1.
00.570: Waiting for send to finish...
00.570: +After Startup.
00.571: Initializing CPU #1
00.571: Waiting for 1 CPUS to stop
00.571: CPU: vendor AMD device 500f20
00.571: CPU: family 14, model 02, stepping 00
00.571: Model 14 Init.
00.571: 
00.571: MTRR check
00.571: Fixed MTRRs   : Enabled
00.571: Variable MTRRs: Enabled
00.571: 
00.571: POST: 0x93
00.571: POST: 0x60
00.571: Enabling cache
00.571: Setting up local APIC... apic_id: 0x01 done.
00.571: POST: 0x9b
00.571: siblings = 01, CPU #1 initialized
00.571: All AP CPUs stopped (2489 loops)
00.571: CPU0: stack: 00138000 - 00139000, lowest used address 0013877c, stack used: 2180 bytes
00.571: CPU1: stack: 00137000 - 00138000, lowest used address 00137dd8, stack used: 552 bytes
00.571: CPU_CLUSTER: 0 init finished in 125379 usecs
00.571: POST: 0x75
00.571: DOMAIN: 0000 init ...
00.571: DOMAIN: 0000 init finished in 2010 usecs
00.571: POST: 0x75
00.571: POST: 0x75
00.571: POST: 0x75
00.571: PCI: 00:00.0 init ...
00.571: Northbridge init
00.571: PCI: 00:00.0 init finished in 3587 usecs
00.571: POST: 0x75
00.571: PCI: 00:01.0 init ...
00.571: PCI: 00:01.0 init finished in 2011 usecs
00.571: POST: 0x75
00.571: PCI: 00:01.1 init ...
00.572: PCI: 00:01.1 init finished in 2010 usecs
00.572: POST: 0x75
00.572: POST: 0x75
00.572: POST: 0x75
00.572: POST: 0x75
00.572: POST: 0x75
00.572: POST: 0x75
00.572: PCI: 00:11.0 init ...
00.572: PCI: 00:11.0 init finished in 2010 usecs
00.572: POST: 0x75
00.572: POST: 0x75
00.572: POST: 0x75
00.572: POST: 0x75
00.572: POST: 0x75
00.572: PCI: 00:14.0 init ...
00.572: PCI: 00:14.0 init finished in 2010 usecs
00.572: POST: 0x75
00.572: POST: 0x75
00.572: POST: 0x75
00.572: PCI: 00:14.3 init ...
00.572: SB800 - Late.c - lpc_init - Start.
00.572: RTC Init
00.572: SB800 - Late.c - lpc_init - End.
00.572: PCI: 00:14.3 init finished in 9031 usecs
00.572: POST: 0x75
00.572: POST: 0x75
00.572: POST: 0x75
00.572: POST: 0x75
00.572: POST: 0x75
00.572: POST: 0x75
00.572: POST: 0x75
00.572: POST: 0x75
00.572: POST: 0x75
00.572: PCI: 00:18.0 init ...
00.572: PCI: 00:18.0 init finished in 2010 usecs
00.572: POST: 0x75
00.572: PCI: 00:18.1 init ...
00.572: PCI: 00:18.1 init finished in 2010 usecs
00.572: POST: 0x75
00.572: PCI: 00:18.2 init ...
00.572: PCI: 00:18.2 init finished in 2010 usecs
00.572: POST: 0x75
00.572: PCI: 00:18.3 init ...
00.572: PCI: 00:18.3 init finished in 2010 usecs
00.572: POST: 0x75
00.572: PCI: 00:18.4 init ...
00.572: PCI: 00:18.4 init finished in 2010 usecs
00.572: POST: 0x75
00.572: PCI: 00:18.5 init ...
00.572: PCI: 00:18.5 init finished in 2010 usecs
00.572: POST: 0x75
00.572: PCI: 00:18.6 init ...
00.572: PCI: 00:18.6 init finished in 2010 usecs
00.572: POST: 0x75
00.572: PCI: 00:18.7 init ...
00.572: PCI: 00:18.7 init finished in 2011 usecs
00.572: POST: 0x75
00.572: POST: 0x75
00.572: POST: 0x75
00.572: POST: 0x75
00.572: POST: 0x75
00.572: PNP: 002e.2 init ...
00.572: PNP: 002e.2 init finished in 1924 usecs
00.572: POST: 0x75
00.572: POST: 0x75
00.572: PNP: 002e.5 init ...
00.573: PNP: 002e.5 init finished in 1946 usecs
00.573: POST: 0x75
00.573: POST: 0x75
00.573: POST: 0x75
00.573: POST: 0x75
00.573: PNP: 002e.307 init ...
00.573: PNP: 002e.307 init finished in 2096 usecs
00.573: POST: 0x75
00.573: POST: 0x75
00.573: POST: 0x75
00.573: PNP: 002e.9 init ...
00.573: PNP: 002e.9 init finished in 1924 usecs
00.573: POST: 0x75
00.573: POST: 0x75
00.573: POST: 0x75
00.573: POST: 0x75
00.573: PNP: 002e.a init ...
00.573: set power off after power fail
00.573: PNP: 002e.a init finished in 4722 usecs
00.573: POST: 0x75
00.573: PNP: 002e.b init ...
00.573: PNP: 002e.b init finished in 1924 usecs
00.573: POST: 0x75
00.573: POST: 0x75
00.573: PNP: 002e.d init ...
00.573: PNP: 002e.d init finished in 1922 usecs
00.573: POST: 0x75
00.573: POST: 0x75
00.573: POST: 0x75
00.573: PCI: 03:00.0 init ...
00.573: PCI: 03:00.0 init finished in 2010 usecs
00.573: Devices initialized
00.573: Show all devs... After init.
00.573: Root Device: enabled 1
00.573: CPU_CLUSTER: 0: enabled 1
00.573: APIC: 00: enabled 1
00.573: DOMAIN: 0000: enabled 1
00.573: PCI: 00:00.0: enabled 1
00.573: PCI: 00:01.0: enabled 1
00.573: PCI: 00:01.1: enabled 1
00.573: PCI: 00:04.0: enabled 0
00.573: PCI: 00:05.0: enabled 0
00.573: PCI: 00:06.0: enabled 0
00.573: PCI: 00:07.0: enabled 0
00.573: PCI: 00:08.0: enabled 0
00.573: PCI: 00:11.0: enabled 1
00.573: PCI: 00:12.0: enabled 1
00.573: PCI: 00:12.2: enabled 1
00.573: PCI: 00:13.0: enabled 1
00.573: PCI: 00:13.2: enabled 1
00.573: PCI: 00:14.0: enabled 1
00.573: I2C: 00:50: enabled 1
00.573: I2C: 00:51: enabled 1
00.573: PCI: 00:14.1: enabled 0
00.573: PCI: 00:14.2: enabled 1
00.573: PCI: 00:14.3: enabled 1
00.573: PNP: 002e.0: enabled 0
00.573: PNP: 002e.1: enabled 0
00.573: PNP: 002e.2: enabled 1
00.573: PNP: 002e.3: enabled 0
00.573: PNP: 002e.5: enabled 1
00.573: PNP: 002e.6: enabled 0
00.573: PNP: 002e.107: enabled 0
00.573: PNP: 002e.207: enabled 0
00.573: PNP: 002e.307: enabled 1
00.573: PNP: 002e.407: enabled 0
00.573: PNP: 002e.8: enabled 0
00.573: PNP: 002e.9: enabled 1
00.573: PNP: 002e.109: enabled 0
00.574: PNP: 002e.209: enabled 0
00.574: PNP: 002e.309: enabled 0
00.574: PNP: 002e.a: enabled 1
00.574: PNP: 002e.b: enabled 1
00.574: PNP: 002e.c: enabled 0
00.574: PNP: 002e.d: enabled 1
00.574: PNP: 002e.e: enabled 0
00.574: PNP: 002e.f: enabled 0
00.574: PCI: 00:14.4: enabled 1
00.574: PCI: 00:14.5: enabled 1
00.574: PCI: 00:15.0: enabled 1
00.574: PCI: 00:15.1: enabled 1
00.574: PCI: 00:15.2: enabled 1
00.574: PCI: 00:15.3: enabled 0
00.574: PCI: 00:16.0: enabled 0
00.574: PCI: 00:16.2: enabled 0
00.574: PCI: 00:18.0: enabled 1
00.574: PCI: 00:18.1: enabled 1
00.574: PCI: 00:18.2: enabled 1
00.574: PCI: 00:18.3: enabled 1
00.574: PCI: 00:18.4: enabled 1
00.574: PCI: 00:18.5: enabled 1
00.574: PCI: 00:18.6: enabled 1
00.574: PCI: 00:18.7: enabled 1
00.574: APIC: 01: enabled 1
00.574: PCI: 03:00.0: enabled 1
00.574: BS: BS_DEV_INIT times (us): entry 0 run 482751 exit 0
00.574: CBMEM:
00.574: IMD: root @ c7fff000 254 entries.
00.574: IMD: root @ c7ffec00 62 entries.
00.574: Moving GDT to c7ffea00...ok
00.574: POST: 0x76
00.574: Finalize devices...
00.574: Devices finalized
00.574: agesawrapper_amdinitlate() returned AGESA_SUCCESS
00.575: agesawrapper_amdS3Save() returned AGESA_SUCCESS
00.575: Manufacturer: ef
00.575: SF: Detected W25Q32 with sector size 0x1000, total 0x400000
00.575: SF: Successfully erased 4096 bytes @ 0xffff1000
00.580: Manufacturer: ef
00.580: SF: Detected W25Q32 with sector size 0x1000, total 0x400000
00.580: SF: Successfully erased 4096 bytes @ 0xffff0000
00.583: BS: BS_POST_DEVICE times (us): entry 9298 run 4560 exit 39248
00.582: POST: 0x77
00.583: BS: BS_OS_RESUME_CHECK times (us): entry 0 run 1057 exit 0
00.583: POST: 0x79
00.583: POST: 0x9a
00.583: Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done.
00.583: Writing IRQ routing tables to 0xc7e6c000...write_pirq_routing_table done.
00.583: PIRQ table: 48 bytes.
00.583: POST: 0x9b
00.583: Wrote the mp table end at: 000f0410 - 000f05fc
00.583: Wrote the mp table end at: c7e6b010 - c7e6b1fc
00.583: MP table: 508 bytes.
00.583: POST: 0x9c
00.583: CBFS: 'Master Header Locator' located CBFS at [100:3fffc0)
00.583: CBFS: Locating 'fallback/dsdt.aml'
00.584: CBFS: Found @ offset 53080 size 25bd
00.584: CBFS: 'Master Header Locator' located CBFS at [100:3fffc0)
00.584: CBFS: Locating 'fallback/slic'
00.584: CBFS: 'fallback/slic' not found.
00.584: ACPI: Writing ACPI tables at c7e47000.
00.584: ACPI:    * FACS
00.584: ACPI:    * DSDT
00.588: ACPI:    * FADT
00.588: ACPI_BLK_BASE: 0x0800
00.588: ACPI: added table 1/32, length now 40
00.588: ACPI:     * SSDT
00.588: ACPI: added table 2/32, length now 44
00.588: ACPI:    * MCFG
00.588: ACPI:    * TCPA
00.588: TCPA log created at c7e37000
00.588: ACPI: added table 3/32, length now 48
00.588: ACPI:    * MADT
00.588: ACPI: added table 4/32, length now 52
00.588: current = c7e49a70
00.588: ACPI: added table 5/32, length now 56
00.588: ACPI:  * SRAT at c7e49a98
00.588:   AGESA SRAT table NULL. Skipping.
00.588: ACPI:  * SLIT at c7e49a98
00.588:   AGESA SLIT table NULL. Skipping.
00.588: ACPI:  * AGESA ALIB SSDT at c7e49aa0
00.588: ACPI: added table 6/32, length now 60
00.588: ACPI:  * AGESA SSDT Pstate at c7e4b130
00.588: ACPI: added table 7/32, length now 64
00.588: CBFS: 'Master Header Locator' located CBFS at [100:3fffc0)
00.588: CBFS: Locating 'pci1002,9802.rom'
00.589: CBFS: 'pci1002,9802.rom' not found.
00.589: ACPI:    * HPET
00.589: ACPI: added table 8/32, length now 68
00.589: ACPI: done.
00.589: ACPI tables: 17744 bytes.
00.589: smbios_write_tables: c7e36000
00.589: Root Device (ASROCK E350M1)
00.589: CPU_CLUSTER: 0 (AMD Family 14h Root Complex)
00.589: APIC: 00 (AMD CPU Family 14h Model 00h-0Fh)
00.589: DOMAIN: 0000 (AMD Family 14h Root Complex)
00.589: PCI: 00:00.0 (AMD Family 14h Northbridge)
00.589: PCI: 00:01.0 (AMD Family 14h Northbridge)
00.589: PCI: 00:01.1 (AMD Family 14h Northbridge)
00.589: PCI: 00:04.0 (AMD Family 14h Northbridge)
00.589: PCI: 00:05.0 (AMD Family 14h Northbridge)
00.589: PCI: 00:06.0 (AMD Family 14h Northbridge)
00.589: PCI: 00:07.0 (AMD Family 14h Northbridge)
00.589: PCI: 00:08.0 (AMD Family 14h Northbridge)
00.589: PCI: 00:11.0 (ATI SB800)
00.589: PCI: 00:12.0 (ATI SB800)
00.589: PCI: 00:12.2 (ATI SB800)
00.589: PCI: 00:13.0 (ATI SB800)
00.589: PCI: 00:13.2 (ATI SB800)
00.589: PCI: 00:14.0 (ATI SB800)
00.589: I2C: 00:50 (unknown)
00.589: I2C: 00:51 (unknown)
00.589: PCI: 00:14.1 (ATI SB800)
00.589: PCI: 00:14.2 (ATI SB800)
00.589: PCI: 00:14.3 (ATI SB800)
00.589: PNP: 002e.0 (NUVOTON NCT5572D Super I/O)
00.589: PNP: 002e.1 (NUVOTON NCT5572D Super I/O)
00.589: PNP: 002e.2 (NUVOTON NCT5572D Super I/O)
00.589: PNP: 002e.3 (NUVOTON NCT5572D Super I/O)
00.589: PNP: 002e.5 (NUVOTON NCT5572D Super I/O)
00.589: PNP: 002e.6 (NUVOTON NCT5572D Super I/O)
00.589: PNP: 002e.107 (NUVOTON NCT5572D Super I/O)
00.589: PNP: 002e.207 (NUVOTON NCT5572D Super I/O)
00.589: PNP: 002e.307 (NUVOTON NCT5572D Super I/O)
00.589: PNP: 002e.407 (NUVOTON NCT5572D Super I/O)
00.589: PNP: 002e.8 (NUVOTON NCT5572D Super I/O)
00.589: PNP: 002e.9 (NUVOTON NCT5572D Super I/O)
00.589: PNP: 002e.109 (NUVOTON NCT5572D Super I/O)
00.589: PNP: 002e.209 (NUVOTON NCT5572D Super I/O)
00.589: PNP: 002e.309 (NUVOTON NCT5572D Super I/O)
00.589: PNP: 002e.a (NUVOTON NCT5572D Super I/O)
00.589: PNP: 002e.b (NUVOTON NCT5572D Super I/O)
00.589: PNP: 002e.c (NUVOTON NCT5572D Super I/O)
00.589: PNP: 002e.d (NUVOTON NCT5572D Super I/O)
00.589: PNP: 002e.e (NUVOTON NCT5572D Super I/O)
00.589: PNP: 002e.f (NUVOTON NCT5572D Super I/O)
00.589: PCI: 00:14.4 (ATI SB800)
00.589: PCI: 00:14.5 (ATI SB800)
00.589: PCI: 00:15.0 (ATI SB800)
00.589: PCI: 00:15.1 (ATI SB800)
00.590: PCI: 00:15.2 (ATI SB800)
00.590: PCI: 00:15.3 (ATI SB800)
00.590: PCI: 00:16.0 (ATI SB800)
00.590: PCI: 00:16.2 (ATI SB800)
00.590: PCI: 00:18.0 (AMD Family 14h Northbridge)
00.590: PCI: 00:18.1 (AMD Family 14h Northbridge)
00.590: PCI: 00:18.2 (AMD Family 14h Northbridge)
00.590: PCI: 00:18.3 (AMD Family 14h Northbridge)
00.590: PCI: 00:18.4 (AMD Family 14h Northbridge)
00.590: PCI: 00:18.5 (AMD Family 14h Northbridge)
00.590: PCI: 00:18.6 (AMD Family 14h Northbridge)
00.590: PCI: 00:18.7 (AMD Family 14h Northbridge)
00.590: APIC: 01 (unknown)
00.590: PCI: 03:00.0 (unknown)
00.590: SMBIOS tables: 336 bytes.
00.590: Writing table forward entry at 0x00000500
00.590: Wrote coreboot table at: 00000500, 0x10 bytes, checksum 67f7
00.590: Writing coreboot table at 0xc7e6d000
00.590:  0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
00.590:  1. 0000000000001000-000000000009ffff: RAM
00.590:  2. 00000000000c0000-00000000c7e35fff: RAM
00.590:  3. 00000000c7e36000-00000000c7ffffff: CONFIGURATION TABLES
00.590:  4. 00000000c8000000-00000000dfffffff: RESERVED
00.590:  5. 00000000f8000000-00000000fbffffff: RESERVED
00.590:  6. 0000000100000000-000000021effffff: RAM
00.590: CBFS: 'Master Header Locator' located CBFS at [100:3fffc0)
00.590: FMAP: Found "FLASH" version 1.1 at 0.
00.590: FMAP: base = ffc00000 size = 400000 #areas = 3
00.590: Wrote coreboot table at: c7e6d000, 0x2d8 bytes, checksum c14
00.590: coreboot table: 752 bytes.
00.590: IMD ROOT    0. c7fff000 00001000
00.590: IMD SMALL   1. c7ffe000 00001000
00.590: CONSOLE     2. c7fde000 00020000
00.590: TIME STAMP  3. c7fdd000 00000400
00.590: ROMSTG STCK 4. c7fc5000 00018000
00.590: ACPISCRATCH 5. c7f95000 00030000
00.590: ACPI RESUME 6. c7e75000 00120000
00.590: COREBOOT    7. c7e6d000 00008000
00.590: IRQ TABLE   8. c7e6c000 00001000
00.591: SMP TABLE   9. c7e6b000 00001000
00.591: ACPI       10. c7e47000 00024000
00.591: TCPA LOG   11. c7e37000 00010000
00.591: SMBIOS     12. c7e36000 00000800
00.591: IMD small region:
00.591:   IMD ROOT    0. c7ffec00 00000400
00.591:   GDT         1. c7ffea00 00000200
00.591: BS: BS_WRITE_TABLES times (us): entry 0 run 454203 exit 0
00.591: POST: 0x7a
00.591: CBFS: 'Master Header Locator' located CBFS at [100:3fffc0)
00.591: CBFS: Locating 'fallback/payload'
00.591: CBFS: Found @ offset 90980 size c459
00.591: Loading segment from ROM address 0xffc90ab8
00.591:   code (compression=1)
00.591:   New segment dstaddr 0xe9110 memsize 0x16ef0 srcaddr 0xffc90af0 filesize 0xc421
00.591: Loading segment from ROM address 0xffc90ad4
00.591:   Entry Point 0x000ff06e
00.591: Bounce Buffer at c7bf9000, 2345056 bytes
00.591: Loading Segment: addr: 0x00000000000e9110 memsz: 0x0000000000016ef0 filesz: 0x000000000000c421
00.591: lb: [0x0000000000100000, 0x000000000021e430)
00.591: Post relocation: addr: 0x00000000000e9110 memsz: 0x0000000000016ef0 filesz: 0x000000000000c421
00.591: using LZMA
00.622: [ 0x000e9110, 00100000, 0x00100000) <- ffc90af0
00.622: dest 000e9110, end 00100000, bouncebuffer c7bf9000
00.622: Loaded segments
00.622: BS: BS_PAYLOAD_LOAD times (us): entry 0 run 98254 exit 0
00.622: POST: 0x7b
00.622: Jumping to boot code at 000ff06e(c7e6d000)
00.622: POST: 0xf8
00.622: CPU0: stack: 00138000 - 00139000, lowest used address 0013877c, stack used: 2180 bytes
00.622: entry    = 0x000ff06e
00.622: lb_start = 0x00100000
00.622: lb_size  = 0x0011e430
00.622: buffer   = 0xc7bf9000