lenovo/x230/24.02-50-g04d6eb1eae/2024-02-24T22_26_11Z/coreboot_console.txt

*** Pre-CBMEM romstage console overflowed, log truncated! ***
lizing Graphics...
[DEBUG]  Back from systemagent_early_init()
[INFO ]  Intel ME early init
[INFO ]  Intel ME firmware is ready
[DEBUG]  ME: Requested 0MB UMA
[DEBUG]  Starting native Platform init
[DEBUG]  DMI: Running at X4 @ 5000MT/s
[DEBUG]  FMAP: area RW_MRC_CACHE found @ 800000 (65536 bytes)
[DEBUG]  Trying stored timings.
[DEBUG]  Starting Ivy Bridge RAM training (fast boot).
[DEBUG]  100MHz reference clock support: yes
[DEBUG]  PLL_REF100_CFG value: 0x7
[DEBUG]  Trying CAS 11, tCK 320.
[DEBUG]  Trying CAS 10, tCK 365.
[DEBUG]  Trying CAS 9, tCK 384.
[DEBUG]  Found compatible clock, CAS pair.
[DEBUG]  Selected DRAM frequency: 666 MHz
[DEBUG]  Selected CAS latency   : 9T
[DEBUG]  MPLL busy... done in 50 us
[DEBUG]  MPLL frequency is set at : 666 MHz
[DEBUG]  Done dimm mapping
[DEBUG]  Update PCI-E configuration space:
[DEBUG]  PCI(0, 0, 0)[a0] = 0
[DEBUG]  PCI(0, 0, 0)[a4] = 4
[DEBUG]  PCI(0, 0, 0)[bc] = 82a00000
[DEBUG]  PCI(0, 0, 0)[a8] = 7d600000
[DEBUG]  PCI(0, 0, 0)[ac] = 4
[DEBUG]  PCI(0, 0, 0)[b8] = 80000000
[DEBUG]  PCI(0, 0, 0)[b0] = 80a00000
[DEBUG]  PCI(0, 0, 0)[b4] = 80800000
[DEBUG]  Done memory map
[DEBUG]  Done io registers
[DEBUG]  t123: 1912, 6000, 7620
[NOTE ]  ME: Wrong mode : 2
[NOTE ]  ME: FWS2: 0x160a0140
[NOTE ]  ME:  Bist in progress: 0x0
[NOTE ]  ME:  ICC Status      : 0x0
[NOTE ]  ME:  Invoke MEBx     : 0x0
[NOTE ]  ME:  CPU replaced    : 0x0
[NOTE ]  ME:  MBP ready       : 0x0
[NOTE ]  ME:  MFS failure     : 0x1
[NOTE ]  ME:  Warm reset req  : 0x0
[NOTE ]  ME:  CPU repl valid  : 0x1
[NOTE ]  ME:  (Reserved)      : 0x0
[NOTE ]  ME:  FW update req   : 0x0
[NOTE ]  ME:  (Reserved)      : 0x0
[NOTE ]  ME:  Current state   : 0xa
[NOTE ]  ME:  Current PM event: 0x6
[NOTE ]  ME:  Progress code   : 0x1
[NOTE ]  PASSED! Tell ME that DRAM is ready
[NOTE ]  ME: ME is reporting as disabled, so not waiting for a response.
[NOTE ]  ME: FWS2: 0x160a0140
[NOTE ]  ME:  Bist in progress: 0x0
[NOTE ]  ME:  ICC Status      : 0x0
[NOTE ]  ME:  Invoke MEBx     : 0x0
[NOTE ]  ME:  CPU replaced    : 0x0
[NOTE ]  ME:  MBP ready       : 0x0
[NOTE ]  ME:  MFS failure     : 0x1
[NOTE ]  ME:  Warm reset req  : 0x0
[NOTE ]  ME:  CPU repl valid  : 0x1
[NOTE ]  ME:  (Reserved)      : 0x0
[NOTE ]  ME:  FW update req   : 0x0
[NOTE ]  ME:  (Reserved)      : 0x0
[NOTE ]  ME:  Current state   : 0xa
[NOTE ]  ME:  Current PM event: 0x6
[NOTE ]  ME:  Progress code   : 0x1
[NOTE ]  ME: Requested BIOS Action: No DID Ack received
[DEBUG]  ME: FW Partition Table      : OK
[DEBUG]  ME: Bringup Loader Failure  : NO
[DEBUG]  ME: Firmware Init Complete  : NO
[DEBUG]  ME: Manufacturing Mode      : YES
[DEBUG]  ME: Boot Options Present    : NO
[DEBUG]  ME: Update In Progress      : NO
[DEBUG]  ME: Current Working State   : Initializing
[DEBUG]  ME: Current Operation State : Bring up
[DEBUG]  ME: Current Operation Mode  : Debug or Disabled by AltDisableBit
[DEBUG]  ME: Error Code              : No Error
[DEBUG]  ME: Progress Phase          : BUP Phase
[DEBUG]  ME: Power Management Event  : Pseudo-global reset
[DEBUG]  ME: Progress Phase State    : Check to see if straps say ME DISABLED
[DEBUG]  memcfg DDR3 ref clock 133 MHz
[DEBUG]  memcfg DDR3 clock 1330 MHz
[DEBUG]  memcfg channel assignment: A: 0, B  1, C  2
[DEBUG]  memcfg channel[0] config (00620020):
[DEBUG]     ECC inactive
[DEBUG]     enhanced interleave mode on
[DEBUG]     rank interleave on
[DEBUG]     DIMMA 8192 MB width x8 dual rank, selected
[DEBUG]     DIMMB 0 MB width x8 single rank
[DEBUG]  memcfg channel[1] config (00620020):
[DEBUG]     ECC inactive
[DEBUG]     enhanced interleave mode on
[DEBUG]     rank interleave on
[DEBUG]     DIMMA 8192 MB width x8 dual rank, selected
[DEBUG]     DIMMB 0 MB width x8 single rank
[DEBUG]  CBMEM:
[DEBUG]  IMD: root @ 0x7ffff000 254 entries.
[DEBUG]  IMD: root @ 0x7fffec00 62 entries.
[DEBUG]  External stage cache:
[DEBUG]  IMD: root @ 0x803ff000 254 entries.
[DEBUG]  IMD: root @ 0x803fec00 62 entries.
[DEBUG]  CBMEM entry for DIMM info: 0x7ffdb000
[DEBUG]  SMM Memory Map
[DEBUG]  SMRAM       : 0x80000000 0x800000
[DEBUG]   Subregion 0: 0x80000000 0x300000
[DEBUG]   Subregion 1: 0x80300000 0x100000
[DEBUG]   Subregion 2: 0x80400000 0x400000
[DEBUG]  Normal boot
[INFO ]  CBFS: Found 'fallback/postcar' @0x50680 size 0x5d60 in mcache @0xfeff10ac
[DEBUG]  Loading module at 0x7ffcf000 with entry 0x7ffcf031. filesize: 0x5988 memsize: 0xbcd8
[DEBUG]  Processing 230 relocs. Offset value of 0x7dfcf000
[DEBUG]  BS: romstage times (exec / console): total (unknown) / 1 ms


[NOTE ]  coreboot-24.02-50-g04d6eb1eae00 Sat Feb 24 22:26:11 UTC 2024 x86_32 postcar starting (log level: 8)...
[DEBUG]  Normal boot
[INFO ]  CBFS: Found 'fallback/ramstage' @0x1d1c0 size 0x231b6 in mcache @0x7ffdd0dc
[DEBUG]  Loading module at 0x7fe73000 with entry 0x7fe73000. filesize: 0x475b8 memsize: 0x15a4b0
[DEBUG]  Processing 4604 relocs. Offset value of 0x7be73000
[DEBUG]  BS: postcar times (exec / console): total (unknown) / 0 ms


[NOTE ]  coreboot-24.02-50-g04d6eb1eae00 Sat Feb 24 22:26:11 UTC 2024 x86_32 ramstage starting (log level: 8)...
[DEBUG]  Normal boot
[INFO ]  Enumerating buses...
[SPEW ]  Show all devs... Before device enumeration.
[SPEW ]  Root Device: enabled 1
[SPEW ]  CPU_CLUSTER: 0: enabled 1
[SPEW ]  DOMAIN: 00000000: enabled 1
[SPEW ]  PCI: 00:00:00.0: enabled 1
[SPEW ]  PCI: 00:00:01.0: enabled 0
[SPEW ]  PCI: 00:00:01.1: enabled 0
[SPEW ]  PCI: 00:00:01.2: enabled 0
[SPEW ]  PCI: 00:00:02.0: enabled 1
[SPEW ]  PCI: 00:00:04.0: enabled 0
[SPEW ]  PCI: 00:00:06.0: enabled 0
[SPEW ]  PCI: 00:00:14.0: enabled 1
[SPEW ]  PCI: 00:00:16.0: enabled 1
[SPEW ]  PCI: 00:00:16.1: enabled 0
[SPEW ]  PCI: 00:00:16.2: enabled 0
[SPEW ]  PCI: 00:00:16.3: enabled 0
[SPEW ]  PCI: 00:00:19.0: enabled 1
[SPEW ]  PCI: 00:00:1a.0: enabled 1
[SPEW ]  PCI: 00:00:1b.0: enabled 1
[SPEW ]  PCI: 00:00:1c.0: enabled 1
[SPEW ]  PCI: 00:00:1c.1: enabled 1
[SPEW ]  PCI: 00:00:1c.2: enabled 1
[SPEW ]  PCI: 00:00:1c.3: enabled 0
[SPEW ]  PCI: 00:00:1c.4: enabled 0
[SPEW ]  PCI: 00:00:1c.5: enabled 0
[SPEW ]  PCI: 00:00:1c.6: enabled 0
[SPEW ]  PCI: 00:00:1c.7: enabled 0
[SPEW ]  PCI: 00:00:1d.0: enabled 1
[SPEW ]  PCI: 00:00:1e.0: enabled 0
[SPEW ]  PCI: 00:00:1f.0: enabled 1
[SPEW ]  PCI: 00:00:1f.2: enabled 1
[SPEW ]  PCI: 00:00:1f.3: enabled 1
[SPEW ]  PCI: 00:00:1f.5: enabled 0
[SPEW ]  PCI: 00:00:1f.6: enabled 1
[SPEW ]  PCI: 00:00:00.0: enabled 1
[SPEW ]  PNP: 00ff.1: enabled 1
[SPEW ]  PNP: 0c31.0: enabled 1
[SPEW ]  PNP: 00ff.2: enabled 1
[SPEW ]  I2C: 00:54: enabled 1
[SPEW ]  I2C: 00:55: enabled 1
[SPEW ]  I2C: 00:56: enabled 1
[SPEW ]  I2C: 00:57: enabled 1
[SPEW ]  I2C: 00:5c: enabled 1
[SPEW ]  I2C: 00:5d: enabled 1
[SPEW ]  I2C: 00:5e: enabled 1
[SPEW ]  I2C: 00:5f: enabled 1
[SPEW ]  Compare with tree...
[SPEW ]  Root Device: enabled 1
[SPEW ]   CPU_CLUSTER: 0: enabled 1
[SPEW ]   DOMAIN: 00000000: enabled 1
[SPEW ]    PCI: 00:00:00.0: enabled 1
[SPEW ]    PCI: 00:00:01.0: enabled 0
[SPEW ]    PCI: 00:00:01.1: enabled 0
[SPEW ]    PCI: 00:00:01.2: enabled 0
[SPEW ]    PCI: 00:00:02.0: enabled 1
[SPEW ]    PCI: 00:00:04.0: enabled 0
[SPEW ]    PCI: 00:00:06.0: enabled 0
[SPEW ]    PCI: 00:00:14.0: enabled 1
[SPEW ]    PCI: 00:00:16.0: enabled 1
[SPEW ]    PCI: 00:00:16.1: enabled 0
[SPEW ]    PCI: 00:00:16.2: enabled 0
[SPEW ]    PCI: 00:00:16.3: enabled 0
[SPEW ]    PCI: 00:00:19.0: enabled 1
[SPEW ]    PCI: 00:00:1a.0: enabled 1
[SPEW ]    PCI: 00:00:1b.0: enabled 1
[SPEW ]    PCI: 00:00:1c.0: enabled 1
[SPEW ]     PCI: 00:00:00.0: enabled 1
[SPEW ]    PCI: 00:00:1c.1: enabled 1
[SPEW ]    PCI: 00:00:1c.2: enabled 1
[SPEW ]    PCI: 00:00:1c.3: enabled 0
[SPEW ]    PCI: 00:00:1c.4: enabled 0
[SPEW ]    PCI: 00:00:1c.5: enabled 0
[SPEW ]    PCI: 00:00:1c.6: enabled 0
[SPEW ]    PCI: 00:00:1c.7: enabled 0
[SPEW ]    PCI: 00:00:1d.0: enabled 1
[SPEW ]    PCI: 00:00:1e.0: enabled 0
[SPEW ]    PCI: 00:00:1f.0: enabled 1
[SPEW ]     PNP: 00ff.1: enabled 1
[SPEW ]     PNP: 0c31.0: enabled 1
[SPEW ]     PNP: 00ff.2: enabled 1
[SPEW ]    PCI: 00:00:1f.2: enabled 1
[SPEW ]    PCI: 00:00:1f.3: enabled 1
[SPEW ]     I2C: 00:54: enabled 1
[SPEW ]     I2C: 00:55: enabled 1
[SPEW ]     I2C: 00:56: enabled 1
[SPEW ]     I2C: 00:57: enabled 1
[SPEW ]     I2C: 00:5c: enabled 1
[SPEW ]     I2C: 00:5d: enabled 1
[SPEW ]     I2C: 00:5e: enabled 1
[SPEW ]     I2C: 00:5f: enabled 1
[SPEW ]    PCI: 00:00:1f.5: enabled 0
[SPEW ]    PCI: 00:00:1f.6: enabled 1
[DEBUG]  Root Device scanning...
[SPEW ]  scan_static_bus for Root Device
[DEBUG]  CPU_CLUSTER: 0 enabled
[DEBUG]  DOMAIN: 00000000 enabled
[DEBUG]  DOMAIN: 00000000 scanning...
[DEBUG]  PCI: pci_scan_bus for segment group 00 bus 00
[DEBUG]  PCI: 00:00:00.0 [8086/0154] enabled
[SPEW ]  PCI: 00:00:01.0 [8086/0000] bus ops
[DEBUG]  PCI: 00:00:01.0 [8086/0151] disabled
[DEBUG]  PCI: 00:00:02.0 [8086/0166] enabled
[DEBUG]  PCI: 00:00:04.0 [8086/0153] disabled
[DEBUG]  PCI: 00:00:14.0 [8086/1e31] enabled
[SPEW ]  PCI: 00:00:16.0 [8086/1e3a] ops
[DEBUG]  PCI: 00:00:16.0 [8086/1e3a] enabled
[DEBUG]  PCI: 00:00:16.1: Disabling device
[DEBUG]  PCI: 00:00:16.2: Disabling device
[DEBUG]  PCI: 00:00:16.3: Disabling device
[DEBUG]  PCI: 00:00:19.0 [8086/1502] enabled
[DEBUG]  PCI: 00:00:1a.0 [8086/1e2d] enabled
[DEBUG]  PCI: 00:00:1b.0 [8086/1e20] enabled
[DEBUG]  PCI: 00:00:1c.0: Found a downstream device
[INFO ]  PCH: PCIe Root Port coalescing is enabled
[DEBUG]  PCI: 00:00:1c.0 [8086/1e10] enabled
[DEBUG]  PCI: 00:00:1c.1: Found a downstream device
[DEBUG]  PCI: 00:00:1c.1 [8086/1e12] enabled
[DEBUG]  PCI: 00:00:1c.2: No downstream device
[DEBUG]  PCI: 00:00:1c.2 [8086/1e14] enabled
[DEBUG]  PCI: 00:00:1c.3: No downstream device
[DEBUG]  PCI: 00:00:1c.3: Disabling device
[DEBUG]  PCI: 00:00:1c.3 [8086/1e16] disabled
[DEBUG]  PCI: 00:00:1c.4: No downstream device
[DEBUG]  PCI: 00:00:1c.4: Disabling device
[DEBUG]  PCI: 00:00:1c.4: check set enabled
[DEBUG]  PCI: 00:00:1c.5: No downstream device
[DEBUG]  PCI: 00:00:1c.5: Disabling device
[DEBUG]  PCI: 00:00:1c.6: No downstream device
[DEBUG]  PCI: 00:00:1c.6: Disabling device
[DEBUG]  PCI: 00:00:1c.7: No downstream device
[DEBUG]  PCI: 00:00:1c.7: Disabling device
[SPEW ]  PCH: RPFN 0x76543210 -> 0xfedcb210
[DEBUG]  PCI: 00:00:1d.0 [8086/1e26] enabled
[DEBUG]  PCI: 00:00:1e.0: Disabling device
[DEBUG]  PCI: 00:00:1e.0 [8086/2448] disabled
[DEBUG]  PCI: 00:00:1f.0 [8086/1e55] enabled
[SPEW ]  PCI: 00:00:1f.2 [8086/0000] ops
[DEBUG]  PCI: 00:00:1f.2 [8086/1e01] enabled
[DEBUG]  PCI: 00:00:1f.3 [8086/1e22] enabled
[DEBUG]  PCI: 00:00:1f.5: Disabling device
[DEBUG]  PCI: 00:00:1f.5 [8086/1e09] disabled No operations
[DEBUG]  PCI: 00:00:1f.6 [8086/1e24] enabled
[WARN ]  PCI: Leftover static devices:
[WARN ]  PCI: 00:00:01.1
[WARN ]  PCI: 00:00:01.2
[WARN ]  PCI: 00:00:06.0
[WARN ]  PCI: Check your devicetree.cb.
[DEBUG]  PCI: 00:00:1c.0 scanning...
[SPEW ]  do_pci_scan_bridge for PCI: 00:00:1c.0
[DEBUG]  PCI: pci_scan_bus for segment group 00 bus 01
[SPEW ]  PCI: 00:01:00.0 [1180/0000] ops
[DEBUG]  PCI: 00:01:00.0 [1180/e823] enabled
[INFO ]  Enabling Common Clock Configuration
[INFO ]  ASPM: Enabled L0s and L1
[INFO ]  PCIe: Max_Payload_Size adjusted to 128
[DEBUG]  PCI: 00:01:00.0: No LTR support
[DEBUG]  scan_bus: bus PCI: 00:00:1c.0 finished in 0 msecs
[DEBUG]  PCI: 00:00:1c.1 scanning...
[SPEW ]  do_pci_scan_bridge for PCI: 00:00:1c.1
[DEBUG]  PCI: pci_scan_bus for segment group 00 bus 02
[DEBUG]  PCI: 00:02:00.0 [168c/002a] enabled
[INFO ]  Enabling Common Clock Configuration
[INFO ]  ASPM: Enabled L1
[INFO ]  PCIe: Max_Payload_Size adjusted to 128
[DEBUG]  PCI: 00:02:00.0: No LTR support
[DEBUG]  scan_bus: bus PCI: 00:00:1c.1 finished in 0 msecs
[DEBUG]  PCI: 00:00:1c.2 scanning...
[SPEW ]  do_pci_scan_bridge for PCI: 00:00:1c.2
[DEBUG]  PCI: pci_scan_bus for segment group 00 bus 03
[DEBUG]  scan_bus: bus PCI: 00:00:1c.2 finished in 0 msecs
[DEBUG]  PCI: 00:00:1f.0 scanning...
[SPEW ]  scan_static_bus for PCI: 00:00:1f.0
[INFO ]  PMH7: ID 05 Revision 00
[DEBUG]  PNP: 00ff.1 enabled
[DEBUG]  PNP: 0c31.0 enabled
[SPEW ]  Clearing EC output queue...
[SPEW ]  EC output queue has been cleared.
[SPEW ]  Data from EC: 0x47
[SPEW ]  Data from EC: 0x32
[SPEW ]  Data from EC: 0x48
[SPEW ]  Data from EC: 0x54
[SPEW ]  Data from EC: 0x33
[SPEW ]  Data from EC: 0x35
[SPEW ]  Data from EC: 0x57
[SPEW ]  Data from EC: 0x57
[SPEW ]  Data from EC: 0x16
[SPEW ]  Data from EC: 0x03
[SPEW ]  Data from EC: 0x40
[SPEW ]  Data from EC: 0x11
[INFO ]  H8: EC Firmware ID G2HT35WW-3.22, Version 4.01B
[SPEW ]  Data from EC: 0x01
[SPEW ]  Data from EC: 0x30
[SPEW ]  Data from EC: 0x90
[SPEW ]  Data from EC: 0x30
[INFO ]  H8: WWAN not installed
[SPEW ]  Data from EC: 0x30
[SPEW ]  Data from EC: 0x00
[SPEW ]  Data from EC: 0xa6
[SPEW ]  Data from EC: 0xa6
[SPEW ]  Data from EC: 0x30
[DEBUG]  PNP: 00ff.2 enabled
[SPEW ]  scan_static_bus for PCI: 00:00:1f.0 done
[DEBUG]  scan_bus: bus PCI: 00:00:1f.0 finished in 3 msecs
[DEBUG]  PCI: 00:00:1f.3 scanning...
[SPEW ]  scan_generic_bus for PCI: 00:00:1f.3
[DEBUG]  I2C: 01:54 enabled
[DEBUG]  bus: PCI: 00:00:1f.3->I2C: 01:55 enabled
[DEBUG]  bus: PCI: 00:00:1f.3->I2C: 01:56 enabled
[DEBUG]  bus: PCI: 00:00:1f.3->I2C: 01:57 enabled
[DEBUG]  bus: PCI: 00:00:1f.3->I2C: 01:5c enabled
[DEBUG]  bus: PCI: 00:00:1f.3->I2C: 01:5d enabled
[DEBUG]  bus: PCI: 00:00:1f.3->I2C: 01:5e enabled
[DEBUG]  bus: PCI: 00:00:1f.3->I2C: 01:5f enabled
[DEBUG]  bus: PCI: 00:00:1f.3->scan_generic_bus for PCI: 00:00:1f.3 done
[DEBUG]  scan_bus: bus PCI: 00:00:1f.3 finished in 0 msecs
[DEBUG]  scan_bus: bus DOMAIN: 00000000 finished in 3 msecs
[SPEW ]  scan_static_bus for Root Device done
[DEBUG]  scan_bus: bus Root Device finished in 3 msecs
[INFO ]  done
[DEBUG]  BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 0 ms
[DEBUG]  found VGA at PCI: 00:00:02.0
[DEBUG]  Setting up VGA for PCI: 00:00:02.0
[DEBUG]  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 00000000
[DEBUG]  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
[INFO ]  Allocating resources...
[INFO ]  Reading resources...
[SPEW ]  Root Device read_resources segment group 0 bus 0
[SPEW ]  DOMAIN: 00000000 read_resources segment group 0 bus 0
[DEBUG]  Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
[DEBUG]  TOUUD 0x47d600000 TOLUD 0x82a00000 TOM 0x400000000
[DEBUG]  MEBASE 0x7ffff00000
[DEBUG]  IGD decoded, subtracting 32M UMA and 2M GTT
[DEBUG]  TSEG base 0x80000000 size 8M
[INFO ]  Available memory below 4GB: 2048M
[SPEW ]  dev: PCI: 00:00:00.0, index: 0x3, base: 0x0, size: 0xa0000
[SPEW ]  dev: PCI: 00:00:00.0, index: 0x4, base: 0x100000, size: 0x7ff00000
[INFO ]  Available memory above 4GB: 14294M
[SPEW ]  dev: PCI: 00:00:00.0, index: 0x5, base: 0x100000000, size: 0x37d600000
[SPEW ]  dev: PCI: 00:00:00.0, index: 0x6, base: 0x80000000, size: 0x2a00000
[SPEW ]  dev: PCI: 00:00:00.0, index: 0x7, base: 0xa0000, size: 0x20000
[SPEW ]  dev: PCI: 00:00:00.0, index: 0x8, base: 0xc0000, size: 0x40000
[SPEW ]  dev: PCI: 00:00:00.0, index: 0x9, base: 0xfed90000, size: 0x1000
[SPEW ]  dev: PCI: 00:00:00.0, index: 0xa, base: 0xfed91000, size: 0x1000
[SPEW ]  PCI: 00:00:1c.0 read_resources segment group 0 bus 1
[SPEW ]  PCI: 00:00:1c.0 read_resources segment group 0 bus 1 done
[SPEW ]  PCI: 00:00:1c.1 read_resources segment group 0 bus 2
[SPEW ]  PCI: 00:00:1c.1 read_resources segment group 0 bus 2 done
[SPEW ]  PCI: 00:00:1c.2 read_resources segment group 0 bus 3
[SPEW ]  PCI: 00:00:1c.2 read_resources segment group 0 bus 3 done
[SPEW ]  PCI: 00:00:1f.0 read_resources segment group 0 bus 0
[ERROR]  PNP: 00ff.1 missing read_resources
[SPEW ]  dev: PNP: 0c31.0, index: 0x0, base: 0xfed40000, size: 0x5000
[ERROR]  PNP: 00ff.2 missing read_resources
[SPEW ]  PCI: 00:00:1f.0 read_resources segment group 0 bus 0 done
[SPEW ]  PCI: 00:00:1f.3 read_resources segment group 0 bus 1
[SPEW ]  PCI: 00:00:1f.3 read_resources segment group 0 bus 1 done
[SPEW ]  DOMAIN: 00000000 read_resources segment group 0 bus 0 done
[SPEW ]  Root Device read_resources segment group 0 bus 0 done
[INFO ]  Done reading resources.
[SPEW ]  Show resources in subtree (Root Device)...After reading.
[DEBUG]   Root Device child on link 0 CPU_CLUSTER: 0
[DEBUG]    CPU_CLUSTER: 0
[DEBUG]    DOMAIN: 00000000 child on link 0 PCI: 00:00:00.0
[SPEW ]    DOMAIN: 00000000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
[SPEW ]    DOMAIN: 00000000 resource base 80000000 size 0 align 0 gran 0 limit fdffffff flags 40040200 index 10000100
[SPEW ]    DOMAIN: 00000000 resource base 100000000 size 0 align 0 gran 0 limit fffffffff flags 40040200 index 10000200
[DEBUG]     PCI: 00:00:00.0
[SPEW ]     PCI: 00:00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60
[SPEW ]     PCI: 00:00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
[SPEW ]     PCI: 00:00:00.0 resource base 100000 size 7ff00000 align 0 gran 0 limit 0 flags e0004200 index 4
[SPEW ]     PCI: 00:00:00.0 resource base 100000000 size 37d600000 align 0 gran 0 limit 0 flags e0004200 index 5
[SPEW ]     PCI: 00:00:00.0 resource base 80000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6
[SPEW ]     PCI: 00:00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
[SPEW ]     PCI: 00:00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8
[SPEW ]     PCI: 00:00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
[SPEW ]     PCI: 00:00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
[DEBUG]     PCI: 00:00:01.0
[DEBUG]     PCI: 00:00:02.0
[SPEW ]     PCI: 00:00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10
[SPEW ]     PCI: 00:00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
[SPEW ]     PCI: 00:00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
[DEBUG]     PCI: 00:00:04.0
[DEBUG]     PCI: 00:00:14.0
[SPEW ]     PCI: 00:00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
[DEBUG]     PCI: 00:00:16.0
[SPEW ]     PCI: 00:00:16.0 resource base 0 size 10 align 12 gran 4 limit ffffffffffffffff flags 201 index 10
[DEBUG]     PCI: 00:00:16.1
[DEBUG]     PCI: 00:00:16.2
[DEBUG]     PCI: 00:00:16.3
[DEBUG]     PCI: 00:00:19.0
[SPEW ]     PCI: 00:00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
[SPEW ]     PCI: 00:00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
[SPEW ]     PCI: 00:00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
[DEBUG]     PCI: 00:00:1a.0
[SPEW ]     PCI: 00:00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
[DEBUG]     PCI: 00:00:1b.0
[SPEW ]     PCI: 00:00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
[DEBUG]     PCI: 00:00:1c.0 child on link 0 PCI: 00:01:00.0
[SPEW ]     PCI: 00:00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
[SPEW ]     PCI: 00:00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
[SPEW ]     PCI: 00:00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
[DEBUG]      PCI: 00:01:00.0
[SPEW ]      PCI: 00:01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
[DEBUG]     PCI: 00:00:1c.1 child on link 0 PCI: 00:02:00.0
[SPEW ]     PCI: 00:00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
[SPEW ]     PCI: 00:00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
[SPEW ]     PCI: 00:00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
[DEBUG]      PCI: 00:02:00.0
[SPEW ]      PCI: 00:02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
[DEBUG]     PCI: 00:00:1c.2 child on link 0 NONE
[SPEW ]     PCI: 00:00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
[SPEW ]     PCI: 00:00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
[SPEW ]     PCI: 00:00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
[DEBUG]      NONE
[SPEW ]      NONE resource base 0 size 800000 align 12 gran 12 limit ffffffff flags 200 index 10
[SPEW ]      NONE resource base 0 size 10000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14
[SPEW ]      NONE resource base 0 size 2000 align 12 gran 12 limit ffff flags 100 index 18
[DEBUG]     PCI: 00:00:1c.3
[DEBUG]     PCI: 00:00:1c.4
[DEBUG]     PCI: 00:00:1c.5
[DEBUG]     PCI: 00:00:1c.6
[DEBUG]     PCI: 00:00:1c.7
[DEBUG]     PCI: 00:00:1d.0
[SPEW ]     PCI: 00:00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
[DEBUG]     PCI: 00:00:1e.0
[DEBUG]     PCI: 00:00:1f.0 child on link 0 PNP: 00ff.1
[SPEW ]     PCI: 00:00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
[SPEW ]     PCI: 00:00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
[SPEW ]     PCI: 00:00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
[SPEW ]     PCI: 00:00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200
[SPEW ]     PCI: 00:00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300
[DEBUG]      PNP: 00ff.1
[SPEW ]      PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags c0000100 index 77
[DEBUG]      PNP: 0c31.0
[SPEW ]      PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
[SPEW ]      PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0
[DEBUG]      PNP: 00ff.2
[SPEW ]      PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
[SPEW ]      PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
[SPEW ]      PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64
[SPEW ]      PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66
[DEBUG]     PCI: 00:00:1f.2
[SPEW ]     PCI: 00:00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
[SPEW ]     PCI: 00:00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
[SPEW ]     PCI: 00:00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
[SPEW ]     PCI: 00:00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
[SPEW ]     PCI: 00:00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
[SPEW ]     PCI: 00:00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
[DEBUG]     PCI: 00:00:1f.3 child on link 0 I2C: 01:54
[SPEW ]     PCI: 00:00:1f.3 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
[SPEW ]     PCI: 00:00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
[DEBUG]      I2C: 01:54
[DEBUG]      I2C: 01:55
[DEBUG]      I2C: 01:56
[DEBUG]      I2C: 01:57
[DEBUG]      I2C: 01:5c
[DEBUG]      I2C: 01:5d
[DEBUG]      I2C: 01:5e
[DEBUG]      I2C: 01:5f
[DEBUG]     PCI: 00:00:1f.5
[DEBUG]     PCI: 00:00:1f.6
[SPEW ]     PCI: 00:00:1f.6 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
[INFO ]  === Resource allocator: DOMAIN: 00000000 - Pass 1 (relative placement) ===
[DEBUG]   PCI: 00:00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
[DEBUG]   PCI: 00:00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff done
[DEBUG]   PCI: 00:00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
[DEBUG]    PCI: 00:01:00.0 10 *  [0x0 - 0xff] mem
[DEBUG]   PCI: 00:00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
[DEBUG]   PCI: 00:00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
[DEBUG]   PCI: 00:00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
[DEBUG]   PCI: 00:00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff
[DEBUG]   PCI: 00:00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff done
[DEBUG]   PCI: 00:00:1c.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
[DEBUG]    PCI: 00:02:00.0 10 *  [0x0 - 0xffff] mem
[DEBUG]   PCI: 00:00:1c.1 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
[DEBUG]   PCI: 00:00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
[DEBUG]   PCI: 00:00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
[DEBUG]   PCI: 00:00:1c.2 io: size: 0 align: 12 gran: 12 limit: ffff
[DEBUG]    NONE 18 *  [0x0 - 0x1fff] io
[DEBUG]   PCI: 00:00:1c.2 io: size: 2000 align: 12 gran: 12 limit: ffff done
[DEBUG]   PCI: 00:00:1c.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff
[DEBUG]    NONE 10 *  [0x0 - 0x7fffff] mem
[DEBUG]   PCI: 00:00:1c.2 mem: size: 800000 align: 20 gran: 20 limit: ffffffff done
[DEBUG]   PCI: 00:00:1c.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
[DEBUG]    NONE 14 *  [0x0 - 0xfffffff] prefmem
[DEBUG]   PCI: 00:00:1c.2 prefmem: size: 10000000 align: 20 gran: 20 limit: ffffffffffffffff done
[INFO ]  === Resource allocator: DOMAIN: 00000000 - Pass 2 (allocating resources) ===
[DEBUG]  DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
[DEBUG]   avoid_fixed_resources: PCI: 00:00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
[DEBUG]   avoid_fixed_resources: PCI: 00:00:1f.0 10000200 base 00001600 limit 0000167b io (fixed)
[DEBUG]   avoid_fixed_resources: PCI: 00:00:1f.0 10000300 base 000015e0 limit 000015eb io (fixed)
[DEBUG]   avoid_fixed_resources: PNP: 00ff.1 77 base 000015e0 limit 000015ef io (fixed)
[DEBUG]   avoid_fixed_resources: PCI: 00:00:1f.3 20 base 00000400 limit 0000041f io (fixed)
[INFO ]   DOMAIN: 00000000: Resource ranges:
[INFO ]   * Base: 1000, Size: 5e0, Tag: 100
[INFO ]   * Base: 15f0, Size: 10, Tag: 100
[INFO ]   * Base: 167c, Size: e984, Tag: 100
[DEBUG]    PCI: 00:00:1c.2 1c *  [0xe000 - 0xffff] limit: ffff io
[DEBUG]    PCI: 00:00:02.0 20 *  [0xdfc0 - 0xdfff] limit: dfff io
[DEBUG]    PCI: 00:00:19.0 18 *  [0xdfa0 - 0xdfbf] limit: dfbf io
[DEBUG]    PCI: 00:00:1f.2 20 *  [0xdf80 - 0xdf9f] limit: df9f io
[DEBUG]    PCI: 00:00:1f.2 10 *  [0xdf78 - 0xdf7f] limit: df7f io
[DEBUG]    PCI: 00:00:1f.2 18 *  [0xdf70 - 0xdf77] limit: df77 io
[DEBUG]    PCI: 00:00:1f.2 14 *  [0xdf6c - 0xdf6f] limit: df6f io
[DEBUG]    PCI: 00:00:1f.2 1c *  [0xdf68 - 0xdf6b] limit: df6b io
[DEBUG]  DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
[DEBUG]  DOMAIN: 00000000 mem: base: 80000000 size: 0 align: 0 gran: 0 limit: fdffffff
[DEBUG]  DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: fffffffff
[DEBUG]   avoid_fixed_resources: PCI: 00:00:00.0 60 base f0000000 limit f3ffffff mem (fixed)
[DEBUG]   avoid_fixed_resources: PCI: 00:00:00.0 03 base 00000000 limit 0009ffff mem (fixed)
[DEBUG]   avoid_fixed_resources: PCI: 00:00:00.0 04 base 00100000 limit 7fffffff mem (fixed)
[DEBUG]   avoid_fixed_resources: PCI: 00:00:00.0 05 base 100000000 limit 47d5fffff mem (fixed)
[DEBUG]   avoid_fixed_resources: PCI: 00:00:00.0 06 base 80000000 limit 829fffff mem (fixed)
[DEBUG]   avoid_fixed_resources: PCI: 00:00:00.0 07 base 000a0000 limit 000bffff mem (fixed)
[DEBUG]   avoid_fixed_resources: PCI: 00:00:00.0 08 base 000c0000 limit 000fffff mem (fixed)
[DEBUG]   avoid_fixed_resources: PCI: 00:00:00.0 09 base fed90000 limit fed90fff mem (fixed)
[DEBUG]   avoid_fixed_resources: PCI: 00:00:00.0 0a base fed91000 limit fed91fff mem (fixed)
[DEBUG]   avoid_fixed_resources: PCI: 00:00:1f.0 10000100 base ff000000 limit ffffffff mem (fixed)
[DEBUG]   avoid_fixed_resources: PCI: 00:00:1f.0 03 base fec00000 limit fec00fff mem (fixed)
[DEBUG]   avoid_fixed_resources: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed)
[INFO ]   DOMAIN: 00000000: Resource ranges:
[INFO ]   * Base: 82a00000, Size: 6d600000, Tag: 200
[INFO ]   * Base: f4000000, Size: a000000, Tag: 200
[INFO ]   * Base: 47d600000, Size: b82a00000, Tag: 200
[DEBUG]    PCI: 00:00:02.0 18 *  [0xe0000000 - 0xefffffff] limit: efffffff prefmem
[DEBUG]    PCI: 00:00:02.0 10 *  [0xfdc00000 - 0xfdffffff] limit: fdffffff mem
[DEBUG]    PCI: 00:00:1c.2 24 *  [0xff0000000 - 0xfffffffff] limit: fffffffff prefmem
[DEBUG]    PCI: 00:00:1c.2 20 *  [0xfd400000 - 0xfdbfffff] limit: fdbfffff mem
[DEBUG]    PCI: 00:00:1c.0 20 *  [0xfd300000 - 0xfd3fffff] limit: fd3fffff mem
[DEBUG]    PCI: 00:00:1c.1 20 *  [0xfd200000 - 0xfd2fffff] limit: fd2fffff mem
[DEBUG]    PCI: 00:00:19.0 10 *  [0xfd1e0000 - 0xfd1fffff] limit: fd1fffff mem
[DEBUG]    PCI: 00:00:14.0 10 *  [0xfd1d0000 - 0xfd1dffff] limit: fd1dffff mem
[DEBUG]    PCI: 00:00:1b.0 10 *  [0xfd1cc000 - 0xfd1cffff] limit: fd1cffff mem
[DEBUG]    PCI: 00:00:19.0 14 *  [0xfd1cb000 - 0xfd1cbfff] limit: fd1cbfff mem
[DEBUG]    PCI: 00:00:1f.6 10 *  [0xfd1ca000 - 0xfd1cafff] limit: fd1cafff mem
[DEBUG]    PCI: 00:00:1f.2 24 *  [0xfd1c9000 - 0xfd1c97ff] limit: fd1c97ff mem
[DEBUG]    PCI: 00:00:1a.0 10 *  [0xfd1c8000 - 0xfd1c83ff] limit: fd1c83ff mem
[DEBUG]    PCI: 00:00:1d.0 10 *  [0xfd1c7000 - 0xfd1c73ff] limit: fd1c73ff mem
[DEBUG]    PCI: 00:00:1f.3 10 *  [0xfd1c6000 - 0xfd1c60ff] limit: fd1c60ff mem
[DEBUG]    PCI: 00:00:16.0 10 *  [0xfd1c5000 - 0xfd1c500f] limit: fd1c500f mem
[DEBUG]  DOMAIN: 00000000 mem: base: 80000000 size: 0 align: 0 gran: 0 limit: fdffffff done
[DEBUG]  DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: fffffffff done
[DEBUG]    PCI: 00:01:00.0 10 *  [0xfd300000 - 0xfd3000ff] limit: fd3000ff mem
[DEBUG]    PCI: 00:02:00.0 10 *  [0xfd200000 - 0xfd20ffff] limit: fd20ffff mem
[DEBUG]    NONE 18 *  [0xe000 - 0xffff] limit: ffff io
[DEBUG]    NONE 14 *  [0xff0000000 - 0xfffffffff] limit: fffffffff prefmem
[DEBUG]    NONE 10 *  [0xfd400000 - 0xfdbfffff] limit: fdbfffff mem
[INFO ]  === Resource allocator: DOMAIN: 00000000 - resource allocation complete ===
[SPEW ]  Root Device assign_resources, segment group 0 bus 0
[SPEW ]  DOMAIN: 00000000 assign_resources, segment group 0 bus 0
[DEBUG]  PCI: 00:00:02.0 10 <- [0x00000000fdc00000 - 0x00000000fdffffff] size 0x00400000 gran 0x16 mem64
[DEBUG]  PCI: 00:00:02.0 18 <- [0x00000000e0000000 - 0x00000000efffffff] size 0x10000000 gran 0x1c prefmem64
[DEBUG]  PCI: 00:00:02.0 20 <- [0x000000000000dfc0 - 0x000000000000dfff] size 0x00000040 gran 0x06 io
[DEBUG]  PCI: 00:00:14.0 10 <- [0x00000000fd1d0000 - 0x00000000fd1dffff] size 0x00010000 gran 0x10 mem64
[DEBUG]  PCI: 00:00:16.0 10 <- [0x00000000fd1c5000 - 0x00000000fd1c500f] size 0x00000010 gran 0x04 mem64
[DEBUG]  PCI: 00:00:19.0 10 <- [0x00000000fd1e0000 - 0x00000000fd1fffff] size 0x00020000 gran 0x11 mem
[DEBUG]  PCI: 00:00:19.0 14 <- [0x00000000fd1cb000 - 0x00000000fd1cbfff] size 0x00001000 gran 0x0c mem
[DEBUG]  PCI: 00:00:19.0 18 <- [0x000000000000dfa0 - 0x000000000000dfbf] size 0x00000020 gran 0x05 io
[DEBUG]  PCI: 00:00:1a.0 10 <- [0x00000000fd1c8000 - 0x00000000fd1c83ff] size 0x00000400 gran 0x0a mem
[DEBUG]  PCI: 00:00:1b.0 10 <- [0x00000000fd1cc000 - 0x00000000fd1cffff] size 0x00004000 gran 0x0e mem64
[DEBUG]  PCI: 00:00:1c.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 buio
[DEBUG]  PCI: 00:00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 buprefmem
[DEBUG]  PCI: 00:00:1c.0 20 <- [0x00000000fd300000 - 0x00000000fd3fffff] size 0x00100000 gran 0x14 seg 00 bumem
[SPEW ]  PCI: 00:00:1c.0 assign_resources, segment group 0 bus 1
[DEBUG]  PCI: 00:01:00.0 10 <- [0x00000000fd300000 - 0x00000000fd3000ff] size 0x00000100 gran 0x08 mem
[SPEW ]  PCI: 00:00:1c.0 assign_resources, segment group 0 bus 1 done
[DEBUG]  PCI: 00:00:1c.1 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 buio
[DEBUG]  PCI: 00:00:1c.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 buprefmem
[DEBUG]  PCI: 00:00:1c.1 20 <- [0x00000000fd200000 - 0x00000000fd2fffff] size 0x00100000 gran 0x14 seg 00 bumem
[SPEW ]  PCI: 00:00:1c.1 assign_resources, segment group 0 bus 2
[DEBUG]  PCI: 00:02:00.0 10 <- [0x00000000fd200000 - 0x00000000fd20ffff] size 0x00010000 gran 0x10 mem64
[SPEW ]  PCI: 00:00:1c.1 assign_resources, segment group 0 bus 2 done
[DEBUG]  PCI: 00:00:1c.2 1c <- [0x000000000000e000 - 0x000000000000ffff] size 0x00002000 gran 0x0c seg 00 buio
[DEBUG]  PCI: 00:00:1c.2 24 <- [0x0000000ff0000000 - 0x0000000fffffffff] size 0x10000000 gran 0x14 seg 00 buprefmem
[DEBUG]  PCI: 00:00:1c.2 20 <- [0x00000000fd400000 - 0x00000000fdbfffff] size 0x00800000 gran 0x14 seg 00 bumem
[SPEW ]  PCI: 00:00:1c.2 assign_resources, segment group 0 bus 3
[SPEW ]  PCI: 00:00:1c.2 assign_resources, segment group 0 bus 3 done
[DEBUG]  PCI: 00:00:1d.0 10 <- [0x00000000fd1c7000 - 0x00000000fd1c73ff] size 0x00000400 gran 0x0a mem
[SPEW ]  PCI: 00:00:1f.0 assign_resources, segment group 0 bus 0
[ERROR]  PNP: 00ff.1 missing set_resources
[ERROR]  PNP: 00ff.2 missing set_resources
[SPEW ]  PCI: 00:00:1f.0 assign_resources, segment group 0 bus 0 done
[DEBUG]  PCI: 00:00:1f.2 10 <- [0x000000000000df78 - 0x000000000000df7f] size 0x00000008 gran 0x03 io
[DEBUG]  PCI: 00:00:1f.2 14 <- [0x000000000000df6c - 0x000000000000df6f] size 0x00000004 gran 0x02 io
[DEBUG]  PCI: 00:00:1f.2 18 <- [0x000000000000df70 - 0x000000000000df77] size 0x00000008 gran 0x03 io
[DEBUG]  PCI: 00:00:1f.2 1c <- [0x000000000000df68 - 0x000000000000df6b] size 0x00000004 gran 0x02 io
[DEBUG]  PCI: 00:00:1f.2 20 <- [0x000000000000df80 - 0x000000000000df9f] size 0x00000020 gran 0x05 io
[DEBUG]  PCI: 00:00:1f.2 24 <- [0x00000000fd1c9000 - 0x00000000fd1c97ff] size 0x00000800 gran 0x0b mem
[DEBUG]  PCI: 00:00:1f.3 10 <- [0x00000000fd1c6000 - 0x00000000fd1c60ff] size 0x00000100 gran 0x08 mem64
[SPEW ]  PCI: 00:00:1f.3 assign_resources, segment group 0 bus 1
[SPEW ]  PCI: 00:00:1f.3 assign_resources, segment group 0 bus 1 done
[DEBUG]  PCI: 00:00:1f.6 10 <- [0x00000000fd1ca000 - 0x00000000fd1cafff] size 0x00001000 gran 0x0c mem64
[SPEW ]  DOMAIN: 00000000 assign_resources, segment group 0 bus 0 done
[SPEW ]  Root Device assign_resources, segment group 0 bus 0 done
[INFO ]  Done setting resources.
[SPEW ]  Show resources in subtree (Root Device)...After assigning values.
[DEBUG]   Root Device child on link 0 CPU_CLUSTER: 0
[DEBUG]    CPU_CLUSTER: 0
[DEBUG]    DOMAIN: 00000000 child on link 0 PCI: 00:00:00.0
[SPEW ]    DOMAIN: 00000000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
[SPEW ]    DOMAIN: 00000000 resource base 80000000 size 0 align 0 gran 0 limit fdffffff flags 40040200 index 10000100
[SPEW ]    DOMAIN: 00000000 resource base 100000000 size 0 align 0 gran 0 limit fffffffff flags 40040200 index 10000200
[DEBUG]     PCI: 00:00:00.0
[SPEW ]     PCI: 00:00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60
[SPEW ]     PCI: 00:00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
[SPEW ]     PCI: 00:00:00.0 resource base 100000 size 7ff00000 align 0 gran 0 limit 0 flags e0004200 index 4
[SPEW ]     PCI: 00:00:00.0 resource base 100000000 size 37d600000 align 0 gran 0 limit 0 flags e0004200 index 5
[SPEW ]     PCI: 00:00:00.0 resource base 80000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6
[SPEW ]     PCI: 00:00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
[SPEW ]     PCI: 00:00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8
[SPEW ]     PCI: 00:00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
[SPEW ]     PCI: 00:00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
[DEBUG]     PCI: 00:00:01.0
[DEBUG]     PCI: 00:00:02.0
[SPEW ]     PCI: 00:00:02.0 resource base fdc00000 size 400000 align 22 gran 22 limit fdffffff flags 60000201 index 10
[SPEW ]     PCI: 00:00:02.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001201 index 18
[SPEW ]     PCI: 00:00:02.0 resource base dfc0 size 40 align 6 gran 6 limit dfff flags 60000100 index 20
[DEBUG]     PCI: 00:00:04.0
[DEBUG]     PCI: 00:00:14.0
[SPEW ]     PCI: 00:00:14.0 resource base fd1d0000 size 10000 align 16 gran 16 limit fd1dffff flags 60000201 index 10
[DEBUG]     PCI: 00:00:16.0
[SPEW ]     PCI: 00:00:16.0 resource base fd1c5000 size 10 align 12 gran 4 limit fd1c500f flags 60000201 index 10
[DEBUG]     PCI: 00:00:16.1
[DEBUG]     PCI: 00:00:16.2
[DEBUG]     PCI: 00:00:16.3
[DEBUG]     PCI: 00:00:19.0
[SPEW ]     PCI: 00:00:19.0 resource base fd1e0000 size 20000 align 17 gran 17 limit fd1fffff flags 60000200 index 10
[SPEW ]     PCI: 00:00:19.0 resource base fd1cb000 size 1000 align 12 gran 12 limit fd1cbfff flags 60000200 index 14
[SPEW ]     PCI: 00:00:19.0 resource base dfa0 size 20 align 5 gran 5 limit dfbf flags 60000100 index 18
[DEBUG]     PCI: 00:00:1a.0
[SPEW ]     PCI: 00:00:1a.0 resource base fd1c8000 size 400 align 12 gran 10 limit fd1c83ff flags 60000200 index 10
[DEBUG]     PCI: 00:00:1b.0
[SPEW ]     PCI: 00:00:1b.0 resource base fd1cc000 size 4000 align 14 gran 14 limit fd1cffff flags 60000201 index 10
[DEBUG]     PCI: 00:00:1c.0 child on link 0 PCI: 00:01:00.0
[SPEW ]     PCI: 00:00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
[SPEW ]     PCI: 00:00:1c.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
[SPEW ]     PCI: 00:00:1c.0 resource base fd300000 size 100000 align 20 gran 20 limit fd3fffff flags 60080202 index 20
[DEBUG]      PCI: 00:01:00.0
[SPEW ]      PCI: 00:01:00.0 resource base fd300000 size 100 align 12 gran 8 limit fd3000ff flags 60000200 index 10
[DEBUG]     PCI: 00:00:1c.1 child on link 0 PCI: 00:02:00.0
[SPEW ]     PCI: 00:00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
[SPEW ]     PCI: 00:00:1c.1 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
[SPEW ]     PCI: 00:00:1c.1 resource base fd200000 size 100000 align 20 gran 20 limit fd2fffff flags 60080202 index 20
[DEBUG]      PCI: 00:02:00.0
[SPEW ]      PCI: 00:02:00.0 resource base fd200000 size 10000 align 16 gran 16 limit fd20ffff flags 60000201 index 10
[DEBUG]     PCI: 00:00:1c.2 child on link 0 NONE
[SPEW ]     PCI: 00:00:1c.2 resource base e000 size 2000 align 12 gran 12 limit ffff flags 60080102 index 1c
[SPEW ]     PCI: 00:00:1c.2 resource base ff0000000 size 10000000 align 20 gran 20 limit fffffffff flags 60081202 index 24
[SPEW ]     PCI: 00:00:1c.2 resource base fd400000 size 800000 align 20 gran 20 limit fdbfffff flags 60080202 index 20
[DEBUG]      NONE
[SPEW ]      NONE resource base fd400000 size 800000 align 12 gran 12 limit fdbfffff flags 40000200 index 10
[SPEW ]      NONE resource base ff0000000 size 10000000 align 12 gran 12 limit fffffffff flags 40101200 index 14
[SPEW ]      NONE resource base e000 size 2000 align 12 gran 12 limit ffff flags 40000100 index 18
[DEBUG]     PCI: 00:00:1c.3
[DEBUG]     PCI: 00:00:1c.4
[DEBUG]     PCI: 00:00:1c.5
[DEBUG]     PCI: 00:00:1c.6
[DEBUG]     PCI: 00:00:1c.7
[DEBUG]     PCI: 00:00:1d.0
[SPEW ]     PCI: 00:00:1d.0 resource base fd1c7000 size 400 align 12 gran 10 limit fd1c73ff flags 60000200 index 10
[DEBUG]     PCI: 00:00:1e.0
[DEBUG]     PCI: 00:00:1f.0 child on link 0 PNP: 00ff.1
[SPEW ]     PCI: 00:00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
[SPEW ]     PCI: 00:00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
[SPEW ]     PCI: 00:00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
[SPEW ]     PCI: 00:00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200
[SPEW ]     PCI: 00:00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300
[DEBUG]      PNP: 00ff.1
[SPEW ]      PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags c0000100 index 77
[DEBUG]      PNP: 0c31.0
[SPEW ]      PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
[SPEW ]      PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0
[DEBUG]      PNP: 00ff.2
[SPEW ]      PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
[SPEW ]      PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
[SPEW ]      PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64
[SPEW ]      PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66
[DEBUG]     PCI: 00:00:1f.2
[SPEW ]     PCI: 00:00:1f.2 resource base df78 size 8 align 3 gran 3 limit df7f flags 60000100 index 10
[SPEW ]     PCI: 00:00:1f.2 resource base df6c size 4 align 2 gran 2 limit df6f flags 60000100 index 14
[SPEW ]     PCI: 00:00:1f.2 resource base df70 size 8 align 3 gran 3 limit df77 flags 60000100 index 18
[SPEW ]     PCI: 00:00:1f.2 resource base df68 size 4 align 2 gran 2 limit df6b flags 60000100 index 1c
[SPEW ]     PCI: 00:00:1f.2 resource base df80 size 20 align 5 gran 5 limit df9f flags 60000100 index 20
[SPEW ]     PCI: 00:00:1f.2 resource base fd1c9000 size 800 align 12 gran 11 limit fd1c97ff flags 60000200 index 24
[DEBUG]     PCI: 00:00:1f.3 child on link 0 I2C: 01:54
[SPEW ]     PCI: 00:00:1f.3 resource base fd1c6000 size 100 align 12 gran 8 limit fd1c60ff flags 60000201 index 10
[SPEW ]     PCI: 00:00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
[DEBUG]      I2C: 01:54
[DEBUG]      I2C: 01:55
[DEBUG]      I2C: 01:56
[DEBUG]      I2C: 01:57
[DEBUG]      I2C: 01:5c
[DEBUG]      I2C: 01:5d
[DEBUG]      I2C: 01:5e
[DEBUG]      I2C: 01:5f
[DEBUG]     PCI: 00:00:1f.5
[DEBUG]     PCI: 00:00:1f.6
[SPEW ]     PCI: 00:00:1f.6 resource base fd1ca000 size 1000 align 12 gran 12 limit fd1cafff flags 60000201 index 10
[INFO ]  Done allocating resources.
[DEBUG]  BS: BS_DEV_RESOURCES run times (exec / console): 2 / 1 ms
[INFO ]  Enabling resources...
[DEBUG]  PCI: 00:00:00.0 subsystem <- 8086/0154
[DEBUG]  PCI: 00:00:00.0 cmd <- 06
[DEBUG]  PCI: 00:00:02.0 subsystem <- 8086/0166
[DEBUG]  PCI: 00:00:02.0 cmd <- 03
[DEBUG]  PCI: 00:00:14.0 subsystem <- 8086/1e31
[DEBUG]  PCI: 00:00:14.0 cmd <- 102
[DEBUG]  PCI: 00:00:16.0 subsystem <- 8086/1e3a
[DEBUG]  PCI: 00:00:16.0 cmd <- 02
[DEBUG]  PCI: 00:00:19.0 subsystem <- 17aa/21f3
[DEBUG]  PCI: 00:00:19.0 cmd <- 103
[DEBUG]  PCI: 00:00:1a.0 subsystem <- 8086/1e2d
[DEBUG]  PCI: 00:00:1a.0 cmd <- 102
[DEBUG]  PCI: 00:00:1b.0 subsystem <- 8086/1e20
[DEBUG]  PCI: 00:00:1b.0 cmd <- 102
[DEBUG]  PCI: 00:00:1c.0 bridge ctrl <- 0013
[DEBUG]  PCI: 00:00:1c.0 subsystem <- 8086/1e10
[DEBUG]  PCI: 00:00:1c.0 cmd <- 106
[DEBUG]  PCI: 00:00:1c.1 bridge ctrl <- 0013
[DEBUG]  PCI: 00:00:1c.1 subsystem <- 8086/1e12
[DEBUG]  PCI: 00:00:1c.1 cmd <- 106
[DEBUG]  PCI: 00:00:1c.2 bridge ctrl <- 0013
[DEBUG]  PCI: 00:00:1c.2 subsystem <- 8086/1e14
[DEBUG]  PCI: 00:00:1c.2 cmd <- 107
[DEBUG]  PCI: 00:00:1d.0 subsystem <- 8086/1e26
[DEBUG]  PCI: 00:00:1d.0 cmd <- 102
[DEBUG]  PCI: 00:00:1f.0 subsystem <- 8086/1e55
[DEBUG]  PCI: 00:00:1f.0 cmd <- 107
[DEBUG]  PCI: 00:00:1f.2 subsystem <- 8086/1e03
[DEBUG]  PCI: 00:00:1f.2 cmd <- 03
[DEBUG]  PCI: 00:00:1f.3 subsystem <- 8086/1e22
[DEBUG]  PCI: 00:00:1f.3 cmd <- 103
[DEBUG]  PCI: 00:00:1f.6 subsystem <- 8086/1e24
[DEBUG]  PCI: 00:00:1f.6 cmd <- 02
[DEBUG]  PCI: 00:01:00.0 subsystem <- 1180/e823
[DEBUG]  PCI: 00:01:00.0 cmd <- 06
[DEBUG]  PCI: 00:02:00.0 cmd <- 02
[INFO ]  done.
[INFO ]  Initializing devices...
[DEBUG]  CPU_CLUSTER: 0 init
[INFO ]  LAPIC 0x0 in XAPIC mode.
[DEBUG]  MTRR: Physical address space:
[DEBUG]  0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6
[DEBUG]  0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0
[DEBUG]  0x00000000000c0000 - 0x000000007fffffff size 0x7ff40000 type 6
[DEBUG]  0x0000000080000000 - 0x00000000dfffffff size 0x60000000 type 0
[DEBUG]  0x00000000e0000000 - 0x00000000efffffff size 0x10000000 type 1
[DEBUG]  0x00000000f0000000 - 0x00000000ffffffff size 0x10000000 type 0
[DEBUG]  0x0000000100000000 - 0x000000047d5fffff size 0x37d600000 type 6
[DEBUG]  0x0000000ff0000000 - 0x0000000fffffffff size 0x10000000 type 0
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x250 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x258 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x259 0x0000000000000000
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x268 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x269 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x26a 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x26b 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x26c 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x26d 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x26e 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x26f 0x0606060606060606
[SPEW ]  apic_id 0x0 call enable_fixed_mtrr()
[DEBUG]  apic_id 0x0 setup mtrr for CPU physical address size: 36 bits
[DEBUG]  MTRR: default type WB/UC MTRR counts: 5/8.
[DEBUG]  MTRR: WB selected as default type.
[DEBUG]  MTRR: 0 base 0x0000000080000000 mask 0x0000000fc0000000 type 0
[DEBUG]  MTRR: 1 base 0x00000000c0000000 mask 0x0000000fe0000000 type 0
[DEBUG]  MTRR: 2 base 0x00000000e0000000 mask 0x0000000ff0000000 type 1
[DEBUG]  MTRR: 3 base 0x00000000f0000000 mask 0x0000000ff0000000 type 0
[DEBUG]  MTRR: 4 base 0x0000000ff0000000 mask 0x0000000ff0000000 type 0

[DEBUG]  MTRR check
[DEBUG]  Fixed MTRRs   : Enabled
[DEBUG]  Variable MTRRs: Enabled

[DEBUG]  CPU has 2 cores, 4 threads enabled.
[DEBUG]  Setting up SMI for CPU
[INFO ]  Will perform SMM setup.
[DEBUG]  microcode: sig=0x306a9 pf=0x10 revision=0x21
[INFO ]  CBFS: Found 'cpu_microcode_blob.bin' @0x16980 size 0x6800 in mcache @0x7ffdd0ac
[INFO ]  CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz.
[INFO ]  LAPIC 0x0 in XAPIC mode.
[DEBUG]  CPU: APIC: 00 enabled
[DEBUG]  CPU: APIC: 01 enabled
[DEBUG]  CPU: APIC: 02 enabled
[DEBUG]  CPU: APIC: 03 enabled
[DEBUG]  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
[DEBUG]  Processing 16 relocs. Offset value of 0x00030000
[SPEW ]  CLFLUSH [0x30000, 0x30178]
[DEBUG]  Attempting to start 3 APs
[DEBUG]  Waiting for 10ms after sending INIT.
[DEBUG]  Waiting for SIPI to complete...
[DEBUG]  done.
[SPEW ]  APs are ready after 15us
[INFO ]  LAPIC 0x1 in XAPIC mode.
[DEBUG]  Waiting for SIPI to complete...
[DEBUG]  done.
[INFO ]  AP: slot 1 apic_id 1, MCU rev: 0x00000021
[SPEW ]  APs are ready after 0us
[INFO ]  LAPIC 0x3 in XAPIC mode.
[INFO ]  LAPIC 0x2 in XAPIC mode.
[INFO ]  AP: slot 2 apic_id 3, MCU rev: 0x00000021
[INFO ]  AP: slot 3 apic_id 2, MCU rev: 0x00000021
[SPEW ]  APs are ready after 6800us
[SPEW ]  smm_setup_relocation_handler: enter
[SPEW ]  smm_setup_relocation_handler: exit
[DEBUG]  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1a0 memsize: 0x1a0
[DEBUG]  Processing 9 relocs. Offset value of 0x00038000
[DEBUG]  smm_module_setup_stub: stack_top = 0x80001000
[DEBUG]  smm_module_setup_stub: per cpu stack_size = 0x400
[DEBUG]  smm_module_setup_stub: runtime.smm_size = 0x10000
[DEBUG]  SMM Module: stub loaded at 38000. Will call 0x7fe9f0b8
[DEBUG]  Installing permanent SMM handler to 0x80000000
[DEBUG]  HANDLER      [0x802fd000-0x802ff038]

[DEBUG]  CPU 0
[DEBUG]    ss0        [0x802fcc00-0x802fd000]
[DEBUG]    stub0      [0x802f5000-0x802f51a0]

[DEBUG]  CPU 1
[DEBUG]    ss1        [0x802fc800-0x802fcc00]
[DEBUG]    stub1      [0x802f4c00-0x802f4da0]

[DEBUG]  CPU 2
[DEBUG]    ss2        [0x802fc400-0x802fc800]
[DEBUG]    stub2      [0x802f4800-0x802f49a0]

[DEBUG]  CPU 3
[DEBUG]    ss3        [0x802fc000-0x802fc400]
[DEBUG]    stub3      [0x802f4400-0x802f45a0]

[DEBUG]  stacks       [0x80000000-0x80001000]
[DEBUG]  Loading module at 0x802fd000 with entry 0x802fd7f9. filesize: 0x1fd0 memsize: 0x2038
[DEBUG]  Processing 91 relocs. Offset value of 0x802fd000
[DEBUG]  Loading module at 0x802f5000 with entry 0x802f5000. filesize: 0x1a0 memsize: 0x1a0
[DEBUG]  Processing 9 relocs. Offset value of 0x802f5000
[DEBUG]  smm_module_setup_stub: stack_top = 0x80001000
[DEBUG]  smm_module_setup_stub: per cpu stack_size = 0x400
[DEBUG]  smm_module_setup_stub: runtime.smm_size = 0x300000
[DEBUG]  SMM Module: placing smm entry code at 802f4c00,  cpu # 0x1
[SPEW ]  smm_place_entry_code: copying from 802f5000 to 802f4c00 0x1a0 bytes
[DEBUG]  SMM Module: placing smm entry code at 802f4800,  cpu # 0x2
[SPEW ]  smm_place_entry_code: copying from 802f5000 to 802f4800 0x1a0 bytes
[DEBUG]  SMM Module: placing smm entry code at 802f4400,  cpu # 0x3
[SPEW ]  smm_place_entry_code: copying from 802f5000 to 802f4400 0x1a0 bytes
[DEBUG]  SMM Module: stub loaded at 802f5000. Will call 0x802fd7f9
[INFO ]  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ed000, cpu = 0
[DEBUG]  In relocation handler: cpu 0
[DEBUG]  New SMBASE=0x802ed000 IEDBASE=0x80400000
[SPEW ]  SMM revision: 0x00030101
[DEBUG]  Writing SMRR. base = 0x80000006, mask=0xff800800
[DEBUG]  Relocation complete.
[INFO ]  microcode: Update skipped, already up-to-date
[INFO ]  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ecc00, cpu = 1
[DEBUG]  In relocation handler: cpu 1
[DEBUG]  New SMBASE=0x802ecc00 IEDBASE=0x80400000
[SPEW ]  SMM revision: 0x00030101
[DEBUG]  Writing SMRR. base = 0x80000006, mask=0xff800800
[DEBUG]  Relocation complete.
[INFO ]  microcode: Update skipped, already up-to-date
[INFO ]  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ec800, cpu = 2
[DEBUG]  In relocation handler: cpu 2
[DEBUG]  New SMBASE=0x802ec800 IEDBASE=0x80400000
[SPEW ]  SMM revision: 0x00030101
[DEBUG]  Writing SMRR. base = 0x80000006, mask=0xff800800
[DEBUG]  Relocation complete.
[INFO ]  microcode: Update skipped, already up-to-date
[INFO ]  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ec400, cpu = 3
[DEBUG]  In relocation handler: cpu 3
[DEBUG]  New SMBASE=0x802ec400 IEDBASE=0x80400000
[SPEW ]  SMM revision: 0x00030101
[DEBUG]  Writing SMRR. base = 0x80000006, mask=0xff800800
[DEBUG]  Relocation complete.
[INFO ]  microcode: Update skipped, already up-to-date
[SPEW ]  APs are ready after 1100us
[INFO ]  Initializing CPU #0
[DEBUG]  CPU: vendor Intel device 306a9
[DEBUG]  CPU: family 06, model 3a, stepping 09
[INFO ]  CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz.
[INFO ]  CPU: cpuid(1) 0x306a9
[INFO ]  CPU: AES supported
[INFO ]  CPU: TXT supported
[INFO ]  CPU: VT supported
[DEBUG]  IA32_FEATURE_CONTROL already locked; VMX status: enabled
[DEBUG]  IA32_FEATURE_CONTROL already locked
[DEBUG]  cpu: energy policy set to 6
[DEBUG]  model_x06ax: frequency set to 2900
[INFO ]  Turbo is available but hidden
[INFO ]  Turbo is available and visible
[INFO ]  CPU #0 initialized
[INFO ]  Initializing CPU #1
[INFO ]  Initializing CPU #3
[INFO ]  Initializing CPU #2
[DEBUG]  CPU: vendor Intel device 306a9
[DEBUG]  CPU: family 06, model 3a, stepping 09
[DEBUG]  CPU: vendor Intel device 306a9
[DEBUG]  CPU: family 06, model 3a, stepping 09
[DEBUG]  CPU: vendor Intel device 306a9
[DEBUG]  CPU: family 06, model 3a, stepping 09
[INFO ]  CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz.
[INFO ]  CPU: cpuid(1) 0x306a9
[INFO ]  CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz.
[INFO ]  CPU: AES supported
[INFO ]  CPU: cpuid(1) 0x306a9
[INFO ]  CPU: TXT supported
[INFO ]  CPU: VT supported
[INFO ]  CPU: AES supported
[DEBUG]  IA32_FEATURE_CONTROL already locked; VMX status: enabled
[INFO ]  CPU: TXT supported
[INFO ]  CPU: VT supported
[DEBUG]  IA32_FEATURE_CONTROL already locked
[DEBUG]  IA32_FEATURE_CONTROL already locked; VMX status: enabled
[INFO ]  CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz.
[DEBUG]  IA32_FEATURE_CONTROL already locked
[DEBUG]  cpu: energy policy set to 6
[INFO ]  CPU: cpuid(1) 0x306a9
[INFO ]  CPU: AES supported
[INFO ]  CPU: TXT supported
[INFO ]  CPU: VT supported
[DEBUG]  cpu: energy policy set to 6
[DEBUG]  model_x06ax: frequency set to 2900
[INFO ]  CPU #3 initialized
[DEBUG]  model_x06ax: frequency set to 2900
[INFO ]  CPU #2 initialized
[DEBUG]  IA32_FEATURE_CONTROL already locked; VMX status: enabled
[DEBUG]  IA32_FEATURE_CONTROL already locked
[DEBUG]  cpu: energy policy set to 6
[DEBUG]  model_x06ax: frequency set to 2900
[INFO ]  CPU #1 initialized
[SPEW ]  APs are ready after 100us
[INFO ]  bsp_do_flight_plan done after 9 msecs.
[DEBUG]  SMI_STS: 
[SPEW ]  PM1_STS: 
[SPEW ]  PM1_EN: 0
[DEBUG]  GPE0_STS: GPIO15 GPIO14 GPIO11 GPIO9 GPIO7 GPIO5 GPIO4 GPIO3 GPIO0 
[DEBUG]  ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI1 GPI0 
[DEBUG]  TCO_STS: 
[DEBUG]  Locking SMM.
[DEBUG]  CPU_CLUSTER: 0 init finished in 21 msecs
[DEBUG]  PCI: 00:00:00.0 init
[DEBUG]  Disabling PEG12.
[DEBUG]  Disabling PEG11.
[DEBUG]  Disabling PEG10.
[DEBUG]  Disabling Device 4.
[DEBUG]  Disabling PEG60.
[DEBUG]  Disabling Device 7.
[DEBUG]  Disabling PEG IO clock.
[DEBUG]  Set BIOS_RESET_CPL
[DEBUG]  CPU TDP: 35 Watts
[DEBUG]  PCI: 00:00:00.0 init finished in 1 msecs
[DEBUG]  PCI: 00:00:02.0 init
[INFO ]  CBFS: Found 'vbt.bin' @0x4f700 size 0x599 in mcache @0x7ffdd22c
[INFO ]  Found a VBT of 4281 bytes
[INFO ]  GMA: Found VBT in CBFS
[INFO ]  GMA: Found valid VBT in CBFS
[DEBUG]  GT Power Management Init
[DEBUG]  IVB GT2 25W-35W Power Meter Weights
[DEBUG]  GT Power Management Init (post VBIOS)
[SPEW ]  Initializing VGA without OPROM.
[INFO ]  framebuffer_info: bytes_per_line: 4096, bits_per_pixel: 32
[INFO ]                     x_res x y_res: 1024 x 768, size: 3145728 at 0xe0000000
[DEBUG]  PCI: 00:00:02.0 init finished in 516 msecs
[DEBUG]  PCI: 00:00:14.0 init
[DEBUG]  XHCI: Setting up controller.. done.
[DEBUG]  PCI: 00:00:14.0 init finished in 0 msecs
[DEBUG]  PCI: 00:00:16.0 init
[DEBUG]  ME: FW Partition Table      : OK
[DEBUG]  ME: Bringup Loader Failure  : NO
[DEBUG]  ME: Firmware Init Complete  : NO
[DEBUG]  ME: Manufacturing Mode      : YES
[DEBUG]  ME: Boot Options Present    : NO
[DEBUG]  ME: Update In Progress      : NO
[DEBUG]  ME: Current Working State   : Initializing
[DEBUG]  ME: Current Operation State : Bring up
[DEBUG]  ME: Current Operation Mode  : Debug or Disabled by AltDisableBit
[DEBUG]  ME: Error Code              : No Error
[DEBUG]  ME: Progress Phase          : BUP Phase
[DEBUG]  ME: Power Management Event  : Pseudo-global reset
[DEBUG]  ME: Progress Phase State    : Check to see if straps say ME DISABLED
[CRIT ]  intel_me_path: mbp is not ready!
[NOTE ]  ME: BIOS path: Error
[DEBUG]  ME: me_state=0, me_state_prev=0
[DEBUG]  PCI: 00:00:16.0 init finished in 0 msecs
[DEBUG]  PCI: 00:00:19.0 init
[DEBUG]  PCI: 00:00:19.0 init finished in 0 msecs
[DEBUG]  PCI: 00:00:1a.0 init
[DEBUG]  EHCI: Setting up controller.. done.
[DEBUG]  PCI: 00:00:1a.0 init finished in 0 msecs
[DEBUG]  PCI: 00:00:1b.0 init
[DEBUG]  Azalia: base = 0xfd1cc000
[DEBUG]  Azalia: codec_mask = 09
[DEBUG]  azalia_audio: Initializing codec #3
[DEBUG]  azalia_audio: codec viddid: 80862806
[DEBUG]  azalia_audio: verb_size: 16
[DEBUG]  azalia_audio: verb loaded.
[DEBUG]  azalia_audio: Initializing codec #0
[DEBUG]  azalia_audio: codec viddid: 10ec0269
[DEBUG]  azalia_audio: verb_size: 76
[DEBUG]  azalia_audio: verb loaded.
[DEBUG]  PCI: 00:00:1b.0 init finished in 5 msecs
[DEBUG]  PCI: 00:00:1c.0 init
[DEBUG]  Initializing PCH PCIe bridge.
[DEBUG]  PCI: 00:00:1c.0 init finished in 0 msecs
[DEBUG]  PCI: 00:00:1c.1 init
[DEBUG]  Initializing PCH PCIe bridge.
[DEBUG]  PCI: 00:00:1c.1 init finished in 0 msecs
[DEBUG]  PCI: 00:00:1c.2 init
[DEBUG]  Initializing PCH PCIe bridge.
[DEBUG]  PCI: 00:00:1c.2 init finished in 0 msecs
[DEBUG]  PCI: 00:00:1d.0 init
[DEBUG]  EHCI: Setting up controller.. done.
[DEBUG]  PCI: 00:00:1d.0 init finished in 0 msecs
[DEBUG]  PCI: 00:00:1f.0 init
[DEBUG]  pch: lpc_init
[INFO ]  PCH: detected QM77, device id: 0x1e55, rev id 0x4
[DEBUG]  IOAPIC: Initializing IOAPIC at fec00000
[DEBUG]  IOAPIC: ID = 0x00
[SPEW ]  IOAPIC: Dumping registers
[SPEW ]    reg 0x0000: 0x00000000
[SPEW ]    reg 0x0001: 0x00170020
[SPEW ]    reg 0x0002: 0x00170020
[DEBUG]  IOAPIC: 24 interrupts
[DEBUG]  IOAPIC: Clearing IOAPIC at fec00000
[SPEW ]  IOAPIC: vector 0x00 value 0x00000000 0x00010000
[SPEW ]  IOAPIC: vector 0x01 value 0x00000000 0x00010000
[SPEW ]  IOAPIC: vector 0x02 value 0x00000000 0x00010000
[SPEW ]  IOAPIC: vector 0x03 value 0x00000000 0x00010000
[SPEW ]  IOAPIC: vector 0x04 value 0x00000000 0x00010000
[SPEW ]  IOAPIC: vector 0x05 value 0x00000000 0x00010000
[SPEW ]  IOAPIC: vector 0x06 value 0x00000000 0x00010000
[SPEW ]  IOAPIC: vector 0x07 value 0x00000000 0x00010000
[SPEW ]  IOAPIC: vector 0x08 value 0x00000000 0x00010000
[SPEW ]  IOAPIC: vector 0x09 value 0x00000000 0x00010000
[SPEW ]  IOAPIC: vector 0x0a value 0x00000000 0x00010000
[SPEW ]  IOAPIC: vector 0x0b value 0x00000000 0x00010000
[SPEW ]  IOAPIC: vector 0x0c value 0x00000000 0x00010000
[SPEW ]  IOAPIC: vector 0x0d value 0x00000000 0x00010000
[SPEW ]  IOAPIC: vector 0x0e value 0x00000000 0x00010000
[SPEW ]  IOAPIC: vector 0x0f value 0x00000000 0x00010000
[SPEW ]  IOAPIC: vector 0x10 value 0x00000000 0x00010000
[SPEW ]  IOAPIC: vector 0x11 value 0x00000000 0x00010000
[SPEW ]  IOAPIC: vector 0x12 value 0x00000000 0x00010000
[SPEW ]  IOAPIC: vector 0x13 value 0x00000000 0x00010000
[SPEW ]  IOAPIC: vector 0x14 value 0x00000000 0x00010000
[SPEW ]  IOAPIC: vector 0x15 value 0x00000000 0x00010000
[SPEW ]  IOAPIC: vector 0x16 value 0x00000000 0x00010000
[SPEW ]  IOAPIC: vector 0x17 value 0x00000000 0x00010000
[DEBUG]  IOAPIC: Bootstrap Processor Local APIC = 0x00
[SPEW ]  IOAPIC: vector 0x00 value 0x00000000 0x00000700
[INFO ]  Set power off after power failure.
[INFO ]  NMI sources enabled.
[DEBUG]  PantherPoint PM init
[DEBUG]  RTC: failed = 0x0
[DEBUG]  RTC Init
[DEBUG]  apm_control: Disabling ACPI.
[DEBUG]  APMC done.
[DEBUG]  pch_spi_init
[DEBUG]  PCI: 00:00:1f.0 init finished in 0 msecs
[DEBUG]  PCI: 00:00:1f.2 init
[DEBUG]  SATA: Initializing...
[DEBUG]  SATA: Controller in AHCI mode.
[DEBUG]  ABAR: 0xfd1c9000
[DEBUG]  PCI: 00:00:1f.2 init finished in 0 msecs
[DEBUG]  PCI: 00:00:1f.3 init
[DEBUG]  PCI: 00:00:1f.3 init finished in 0 msecs
[DEBUG]  PCI: 00:00:1f.6 init
[DEBUG]  PCI: 00:00:1f.6 init finished in 0 msecs
[DEBUG]  PCI: 00:01:00.0 init
[DEBUG]  PCI: 00:01:00.0 init finished in 0 msecs
[DEBUG]  PCI: 00:02:00.0 init
[DEBUG]  PCI: 00:02:00.0 init finished in 0 msecs
[DEBUG]  PNP: 00ff.2 init
[DEBUG]  PNP: 00ff.2 init finished in 0 msecs
[DEBUG]  smbus: PCI: 00:00:1f.3->I2C: 01:54 init
[DEBUG]  I2C: 01:54 init finished in 0 msecs
[DEBUG]  smbus: PCI: 00:00:1f.3->I2C: 01:55 init
[DEBUG]  I2C: 01:55 init finished in 0 msecs
[DEBUG]  smbus: PCI: 00:00:1f.3->I2C: 01:56 init
[DEBUG]  I2C: 01:56 init finished in 0 msecs
[DEBUG]  smbus: PCI: 00:00:1f.3->I2C: 01:57 init
[DEBUG]  I2C: 01:57 init finished in 0 msecs
[DEBUG]  smbus: PCI: 00:00:1f.3->I2C: 01:5c init
[DEBUG]  Locking EEPROM RFID
[DEBUG]  init EEPROM done
[DEBUG]  I2C: 01:5c init finished in 27 msecs
[DEBUG]  smbus: PCI: 00:00:1f.3->I2C: 01:5d init
[DEBUG]  I2C: 01:5d init finished in 0 msecs
[DEBUG]  smbus: PCI: 00:00:1f.3->I2C: 01:5e init
[DEBUG]  I2C: 01:5e init finished in 0 msecs
[DEBUG]  smbus: PCI: 00:00:1f.3->I2C: 01:5f init
[DEBUG]  I2C: 01:5f init finished in 0 msecs
[INFO ]  Devices initialized
[SPEW ]  Show all devs... After init.
[SPEW ]  Root Device: enabled 1
[SPEW ]  CPU_CLUSTER: 0: enabled 1
[SPEW ]  DOMAIN: 00000000: enabled 1
[SPEW ]  PCI: 00:00:00.0: enabled 1
[SPEW ]  PCI: 00:00:01.0: enabled 0
[SPEW ]  PCI: 00:00:01.1: enabled 0
[SPEW ]  PCI: 00:00:01.2: enabled 0
[SPEW ]  PCI: 00:00:02.0: enabled 1
[SPEW ]  PCI: 00:00:04.0: enabled 0
[SPEW ]  PCI: 00:00:06.0: enabled 0
[SPEW ]  PCI: 00:00:14.0: enabled 1
[SPEW ]  PCI: 00:00:16.0: enabled 1
[SPEW ]  PCI: 00:00:16.1: enabled 0
[SPEW ]  PCI: 00:00:16.2: enabled 0
[SPEW ]  PCI: 00:00:16.3: enabled 0
[SPEW ]  PCI: 00:00:19.0: enabled 1
[SPEW ]  PCI: 00:00:1a.0: enabled 1
[SPEW ]  PCI: 00:00:1b.0: enabled 1
[SPEW ]  PCI: 00:00:1c.0: enabled 1
[SPEW ]  PCI: 00:00:1c.1: enabled 1
[SPEW ]  PCI: 00:00:1c.2: enabled 1
[SPEW ]  PCI: 00:00:1c.3: enabled 0
[SPEW ]  PCI: 00:00:1c.4: enabled 0
[SPEW ]  PCI: 00:00:1c.5: enabled 0
[SPEW ]  PCI: 00:00:1c.6: enabled 0
[SPEW ]  PCI: 00:00:1c.7: enabled 0
[SPEW ]  PCI: 00:00:1d.0: enabled 1
[SPEW ]  PCI: 00:00:1e.0: enabled 0
[SPEW ]  PCI: 00:00:1f.0: enabled 1
[SPEW ]  PCI: 00:00:1f.2: enabled 1
[SPEW ]  PCI: 00:00:1f.3: enabled 1
[SPEW ]  PCI: 00:00:1f.5: enabled 0
[SPEW ]  PCI: 00:00:1f.6: enabled 1
[SPEW ]  PCI: 00:01:00.0: enabled 1
[SPEW ]  PNP: 00ff.1: enabled 1
[SPEW ]  PNP: 0c31.0: enabled 1
[SPEW ]  PNP: 00ff.2: enabled 1
[SPEW ]  I2C: 01:54: enabled 1
[SPEW ]  I2C: 01:55: enabled 1
[SPEW ]  I2C: 01:56: enabled 1
[SPEW ]  I2C: 01:57: enabled 1
[SPEW ]  I2C: 01:5c: enabled 1
[SPEW ]  I2C: 01:5d: enabled 1
[SPEW ]  I2C: 01:5e: enabled 1
[SPEW ]  I2C: 01:5f: enabled 1
[SPEW ]  PCI: 00:02:00.0: enabled 1
[SPEW ]  NONE: enabled 1
[SPEW ]  APIC: 00: enabled 1
[SPEW ]  APIC: 01: enabled 1
[SPEW ]  APIC: 03: enabled 1
[SPEW ]  APIC: 02: enabled 1
[DEBUG]  BS: BS_DEV_INIT run times (exec / console): 571 / 1 ms
[INFO ]  Found TPM 1.2 ST33ZP24 (0x0000) by ST Microelectronics (0x104a)
[DEBUG]  TPM: Startup
[DEBUG]  TPM: command 0x99 returned 0x0
[DEBUG]  TPM: Asserting physical presence
[DEBUG]  TPM: command 0x4000000a returned 0x0
[DEBUG]  TPM: command 0x65 returned 0x801
[DEBUG]  TPM: Continue self test
[DEBUG]  TPM: command 0x53 returned 0x0
[DEBUG]  TPM: command 0x65 returned 0x0
[DEBUG]  TPM: flags disable=0, deactivated=0, nvlocked=1
[INFO ]  TPM: setup succeeded
[DEBUG]  BS: BS_DEV_INIT exit times (exec / console): 120 / 0 ms
[INFO ]  Finalize devices...
[DEBUG]  PCI: 00:00:1f.0 final
[DEBUG]  flash size 0xc00000 bytes
[INFO ]  SF: Detected 00 0000 with sector size 0x1000, total 0xc00000
[DEBUG]  apm_control: Finalizing SMM.
[DEBUG]  APMC done.
[INFO ]  Devices finalized
[INFO ]  CBFS: Found 'fallback/dsdt.aml' @0x4bd40 size 0x397b in mcache @0x7ffdd200
[WARN ]  CBFS: 'fallback/slic' not found.
[INFO ]  ACPI: Writing ACPI tables at 7fe32000.
[DEBUG]  ACPI:    * FACS
[DEBUG]  ACPI:    * FACP
[DEBUG]  ACPI: added table 1/32, length now 44
[DEBUG]  Found 1 CPU(s) with 4 core(s) each.
[DEBUG]  Supported C-states:  C0 C1 C1E C3 C6 C7 C7S
[DEBUG]  PSS: 2901MHz power 35000 control 0x2400 status 0x2400
[DEBUG]  PSS: 2900MHz power 35000 control 0x1d00 status 0x1d00
[DEBUG]  PSS: 2400MHz power 27295 control 0x1800 status 0x1800
[DEBUG]  PSS: 2000MHz power 21703 control 0x1400 status 0x1400
[DEBUG]  PSS: 1600MHz power 16527 control 0x1000 status 0x1000
[DEBUG]  PSS: 1200MHz power 11795 control 0xc00 status 0xc00
[DEBUG]  Advertising ACPI C State type C1 as CPU C1
[DEBUG]  Advertising ACPI C State type C2 as CPU C3
[DEBUG]  Advertising ACPI C State type C3 as CPU C7
[DEBUG]  PSS: 2901MHz power 35000 control 0x2400 status 0x2400
[DEBUG]  PSS: 2900MHz power 35000 control 0x1d00 status 0x1d00
[DEBUG]  PSS: 2400MHz power 27295 control 0x1800 status 0x1800
[DEBUG]  PSS: 2000MHz power 21703 control 0x1400 status 0x1400
[DEBUG]  PSS: 1600MHz power 16527 control 0x1000 status 0x1000
[DEBUG]  PSS: 1200MHz power 11795 control 0xc00 status 0xc00
[DEBUG]  Advertising ACPI C State type C1 as CPU C1
[DEBUG]  Advertising ACPI C State type C2 as CPU C3
[DEBUG]  Advertising ACPI C State type C3 as CPU C7
[DEBUG]  PSS: 2901MHz power 35000 control 0x2400 status 0x2400
[DEBUG]  PSS: 2900MHz power 35000 control 0x1d00 status 0x1d00
[DEBUG]  PSS: 2400MHz power 27295 control 0x1800 status 0x1800
[DEBUG]  PSS: 2000MHz power 21703 control 0x1400 status 0x1400
[DEBUG]  PSS: 1600MHz power 16527 control 0x1000 status 0x1000
[DEBUG]  PSS: 1200MHz power 11795 control 0xc00 status 0xc00
[DEBUG]  Advertising ACPI C State type C1 as CPU C1
[DEBUG]  Advertising ACPI C State type C2 as CPU C3
[DEBUG]  Advertising ACPI C State type C3 as CPU C7
[DEBUG]  PSS: 2901MHz power 35000 control 0x2400 status 0x2400
[DEBUG]  PSS: 2900MHz power 35000 control 0x1d00 status 0x1d00
[DEBUG]  PSS: 2400MHz power 27295 control 0x1800 status 0x1800
[DEBUG]  PSS: 2000MHz power 21703 control 0x1400 status 0x1400
[DEBUG]  PSS: 1600MHz power 16527 control 0x1000 status 0x1000
[DEBUG]  PSS: 1200MHz power 11795 control 0xc00 status 0xc00
[DEBUG]  Advertising ACPI C State type C1 as CPU C1
[DEBUG]  Advertising ACPI C State type C2 as CPU C3
[DEBUG]  Advertising ACPI C State type C3 as CPU C7
[DEBUG]  PCI space above 4GB MMIO is at 0x47d600000, len = 0xb82a00000
[DEBUG]  Generating ACPI PIRQ entries
[SPEW ]  ACPI_PIRQ_GEN: PCI: 00:00:02.0: pin=0 pirq=0
[SPEW ]  ACPI_PIRQ_GEN: PCI: 00:00:14.0: pin=0 pirq=1
[SPEW ]  ACPI_PIRQ_GEN: PCI: 00:00:16.0: pin=0 pirq=0
[SPEW ]  ACPI_PIRQ_GEN: PCI: 00:00:19.0: pin=0 pirq=1
[SPEW ]  ACPI_PIRQ_GEN: PCI: 00:00:1a.0: pin=0 pirq=3
[SPEW ]  ACPI_PIRQ_GEN: PCI: 00:00:1b.0: pin=0 pirq=3
[SPEW ]  ACPI_PIRQ_GEN: PCI: 00:00:1c.0: pin=0 pirq=0
[SPEW ]  ACPI_PIRQ_GEN: PCI: 00:00:1c.1: pin=1 pirq=1
[SPEW ]  ACPI_PIRQ_GEN: PCI: 00:00:1c.2: pin=2 pirq=2
[SPEW ]  ACPI_PIRQ_GEN: PCI: 00:00:1d.0: pin=0 pirq=2
[SPEW ]  ACPI_PIRQ_GEN: PCI: 00:00:1f.2: pin=0 pirq=0
[SPEW ]  ACPI_PIRQ_GEN: PCI: 00:00:1f.3: pin=1 pirq=0
[SPEW ]  ACPI_PIRQ_GEN: PCI: 00:00:1f.6: pin=3 pirq=1
[INFO ]  \_SB_.PCI0.TPM: LPC TPM PNP: 0c31.0
[INFO ]  ACPI:    * H8
[INFO ]  H8: BDC detection not implemented. Assuming BDC installed
[INFO ]  H8: WWAN not installed
[DEBUG]  ACPI:    * SSDT
[DEBUG]  ACPI: added table 2/32, length now 52
[DEBUG]  ACPI:    * MCFG
[DEBUG]  ACPI: added table 3/32, length now 60
[DEBUG]  TCPA log created at 0x7fe22000
[DEBUG]  ACPI:    * TCPA
[DEBUG]  ACPI: added table 4/32, length now 68
[DEBUG]  IOAPIC: 24 interrupts
[DEBUG]  ACPI:    * APIC
[DEBUG]  ACPI: added table 5/32, length now 76
[DEBUG]  current = 7fe37440
[DEBUG]  ACPI:     * DMAR
[DEBUG]  ACPI: added table 6/32, length now 84
[DEBUG]  current = 7fe37500
[DEBUG]  ACPI:    * HPET
[DEBUG]  ACPI: added table 7/32, length now 92
[INFO ]  ACPI: done.
[DEBUG]  ACPI tables: 21824 bytes.
[DEBUG]  smbios_write_tables: 7fe1a000
[SPEW ]  Data from EC: 0x47
[SPEW ]  Data from EC: 0x32
[SPEW ]  Data from EC: 0x48
[SPEW ]  Data from EC: 0x54
[SPEW ]  Data from EC: 0x33
[SPEW ]  Data from EC: 0x35
[SPEW ]  Data from EC: 0x57
[SPEW ]  Data from EC: 0x57
[SPEW ]  Data from EC: 0x16
[SPEW ]  Data from EC: 0x03
[INFO ]  Create SMBIOS type 16
[INFO ]  Create SMBIOS type 17
[INFO ]  Create SMBIOS type 20
[DEBUG]  SMBIOS tables: 1116 bytes.
[DEBUG]  Writing table forward entry at 0x00000500
[DEBUG]  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 1ff9
[DEBUG]  Writing coreboot table at 0x7fe56000
[INFO ]  CBFS: Found 'cmos_layout.bin' @0x4fe40 size 0x7dc in mcache @0x7ffdd284
[DEBUG]   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
[DEBUG]   1. 0000000000001000-000000000009ffff: RAM
[DEBUG]   2. 00000000000a0000-00000000000fffff: RESERVED
[DEBUG]   3. 0000000000100000-000000007fe19fff: RAM
[DEBUG]   4. 000000007fe1a000-000000007fe72fff: CONFIGURATION TABLES
[DEBUG]   5. 000000007fe73000-000000007ffcdfff: RAMSTAGE
[DEBUG]   6. 000000007ffce000-000000007fffffff: CONFIGURATION TABLES
[DEBUG]   7. 0000000080000000-00000000829fffff: RESERVED
[DEBUG]   8. 00000000f0000000-00000000f3ffffff: RESERVED
[DEBUG]   9. 00000000fed40000-00000000fed44fff: RESERVED
[DEBUG]  10. 00000000fed90000-00000000fed91fff: RESERVED
[DEBUG]  11. 0000000100000000-000000047d5fffff: RAM
[INFO ]  Setting up bootsplash in 1024x768@32
[INFO ]  CBFS: Found 'bootsplash.jpg' @0x48300 size 0x39f8 in mcache @0x7ffdd1d8
[DEBUG]  Bootsplash image resolution: 1024x768
[ERROR]  memalign(boundary=8, size=1179648): failed: Tried to round up free_mem_ptr 0x7fece5e8 to 0x7ffee5e8
[ERROR]  but free_mem_end_ptr is 0x7ffcd4b0
[ERROR]  Error! memalign: Out of memory (free_mem_ptr >= free_mem_end_ptr)Bootsplash could not be decoded. jpeg_decode returned 1.
[DEBUG]  Wrote coreboot table at: 0x7fe56000, 0xbc8 bytes, checksum 2d5d
[DEBUG]  coreboot table: 3040 bytes.
[DEBUG]  IMD ROOT    0. 0x7ffff000 0x00001000
[DEBUG]  IMD SMALL   1. 0x7fffe000 0x00001000
[DEBUG]  CONSOLE     2. 0x7ffde000 0x00020000
[DEBUG]  RO MCACHE   3. 0x7ffdd000 0x00000434
[DEBUG]  TIME STAMP  4. 0x7ffdc000 0x00000910
[DEBUG]  MEM INFO    5. 0x7ffdb000 0x00000f48
[DEBUG]  AFTER CAR   6. 0x7ffce000 0x0000d000
[DEBUG]  RAMSTAGE    7. 0x7fe72000 0x0015c000
[DEBUG]  SMM BACKUP  8. 0x7fe62000 0x00010000
[DEBUG]  IGD OPREGION 9. 0x7fe5e000 0x000030b8
[DEBUG]  COREBOOT   10. 0x7fe56000 0x00008000
[DEBUG]  ACPI       11. 0x7fe32000 0x00024000
[DEBUG]  TCPA TCGLOG12. 0x7fe22000 0x00010000
[DEBUG]  SMBIOS     13. 0x7fe1a000 0x00008000
[DEBUG]  IMD small region:
[DEBUG]    IMD ROOT    0. 0x7fffec00 0x00000400
[DEBUG]    FMAP        1. 0x7fffeb20 0x000000e0
[DEBUG]    ROMSTAGE    2. 0x7fffeb00 0x00000004
[DEBUG]    ROMSTG STCK 3. 0x7fffea40 0x000000a8
[DEBUG]    ACPI GNVS   4. 0x7fffe940 0x00000100
[DEBUG]  BS: BS_WRITE_TABLES run times (exec / console): 26 / 0 ms
[INFO ]  CBFS: Found 'fallback/payload' @0x6d580 size 0x1182e in mcache @0x7ffdd340
[DEBUG]  Checking segment from ROM address 0xffc7d7ac
[DEBUG]  Payload being loaded at below 1MiB without region being marked as RAM usable.
[DEBUG]  Checking segment from ROM address 0xffc7d7c8
[DEBUG]  Loading segment from ROM address 0xffc7d7ac
[DEBUG]    code (compression=1)
[DEBUG]    New segment dstaddr 0x000de7e0 memsize 0x21820 srcaddr 0xffc7d7e4 filesize 0x117f6
[DEBUG]  Loading Segment: addr: 0x000de7e0 memsz: 0x0000000000021820 filesz: 0x00000000000117f6
[DEBUG]  using LZMA
[SPEW ]  [ 0x000de7e0, 00100000, 0x00100000) <- ffc7d7e4
[DEBUG]  Loading segment from ROM address 0xffc7d7c8
[DEBUG]    Entry Point 0x000fd25a
[SPEW ]  Loaded segments
[DEBUG]  BS: BS_PAYLOAD_LOAD run times (exec / console): 19 / 0 ms
[DEBUG]  ICH-NM10-PCH: watchdog disabled
[DEBUG]  Jumping to boot code at 0x000fd25a(0x7fe56000)
[SPEW ]  CPU0: stack: 0x7feba5d0 - 0x7febc5d0, lowest used address 0x7febbf7c, stack used: 1620 bytes
SeaBIOS (version rel-1.16.3-0-ga6ed6b70)
BUILD: gcc: (coreboot toolchain v2024-02-24_04d6eb1eae) 13.2.0 binutils: (GNU Binutils) 2.42
Found coreboot cbmem console @ 7ffde000
Found mainboard LENOVO ThinkPad X230
Relocating init from 0x000dff40 to 0x7ee0cba0 (size 54208)
Found CBFS header at 0xffc1022c
multiboot: eax=7feb9a5c, ebx=7feb9a24
Found 17 PCI devices (max PCI bus is 03)
Copying SMBIOS from 0x7fe1a000 to 0x000f60a0
Copying SMBIOS 3.0 from 0x7fe1a020 to 0x000f6080
Copying ACPI RSDP from 0x7fe32000 to 0x000f6050
table(50434146)=0x7fe35c10 (via xsdt)
Using pmtimer, ioport 0x508
table(41504354)=0x7fe37380 (via xsdt)
Scan for VGA option rom
Running option rom at c000:0003
pmm call arg1=0
Turning on vga text mode console
SeaBIOS (version rel-1.16.3-0-ga6ed6b70)
Machine UUID 1d945c01-5165-11cb-9ffc-8fd632be452d
PCI: XHCI at 00:14.0 (mmio 0xfd1d0000)
XHCI init: regs @ 0xfd1d0000, 8 ports, 32 slots, 32 byte contexts
XHCI    protocol USB  2.00, 4 ports (offset 1), def 3001
XHCI    protocol USB  3.00, 4 ports (offset 5), def 1000
XHCI    extcap 0xc1 @ 0xfd1d8040
XHCI    extcap 0xc0 @ 0xfd1d8070
XHCI    extcap 0x1 @ 0xfd1d8330
EHCI init on dev 00:1a.0 (regs=0xfd1c8020)
EHCI init on dev 00:1d.0 (regs=0xfd1c7020)
AHCI controller at 00:1f.2, iobase 0xfd1c9000, irq 11
Searching bootorder for: /pci@i0cf8/pci-bridge@1c/*@0
Searching bootorder for: HALT
Found 0 lpt ports
Found 0 serial ports
Searching bootorder for: /rom@img/nvramcui
Searching bootorder for: /rom@img/coreinfo
Searching bootorder for: /pci@i0cf8/*@1f,2/drive@2/disk@0
AHCI/2: Set transfer mode to UDMA-6
Searching bios-geometry for: /pci@i0cf8/*@1f,2/drive@2/disk@0
AHCI/2: registering: "AHCI/2: KINGSTON SUV500MS480G ATA-11 Hard-Disk (447 GiBytes)"
XHCI no devices found
Initialized USB HUB (0 ports used)
Initialized USB HUB (0 ports used)
PS2 keyboard initialized
All threads complete.
Scan for option roms

Press ESC for boot menu.

jpeg_show failed with return code 12...
Searching bootorder for: HALT
drive 0x000f5fe0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=937703088
Space available for UMB: c7000-ec000, f58c0-f5fe0
Returned 16703488 bytes of ZoneHigh
e820 map has 9 items:
  0: 0000000000000000 - 000000000009fc00 = 1 RAM
  1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
  2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
  3: 0000000000100000 - 000000007fe08000 = 1 RAM
  4: 000000007fe08000 - 0000000082a00000 = 2 RESERVED
  5: 00000000f0000000 - 00000000f4000000 = 2 RESERVED
  6: 00000000fed40000 - 00000000fed45000 = 2 RESERVED
  7: 00000000fed90000 - 00000000fed92000 = 2 RESERVED
  8: 0000000100000000 - 000000047d600000 = 1 RAM
enter handle_19:
  NULL
Booting from Hard Disk...
Booting from 0000:7c00