lenovo/t430/4.8-1536-g3a618dd214/2018-09-18T21_42_46Z/coreboot_console.txt

coreboot-4.8-1536-g3a618dd214 Tue Sep 18 21:42:46 UTC 2018 romstage starting...
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 33ac0 size 79c
POST: 0x38
POST: 0x39
POST: 0x3a
Intel ME early init
Intel ME firmware is ready
MRC: no data in 'RW_MRC_CACHE'
  Row    addr bits  : 15
  Column addr bits  : 10
  Number of ranks   : 2
  DIMM Capacity     : 4096 MB
  CAS latencies     : 5 6 7 8 9
  tCKmin            :   1.500 ns
  tAAmin            :  13.125 ns
  tWRmin            :  15.000 ns
  tRCDmin           :  13.125 ns
  tRRDmin           :   6.000 ns
  tRPmin            :  13.125 ns
  tRASmin           :  36.000 ns
  tRCmin            :  49.125 ns
  tRFCmin           : 160.000 ns
  tWTRmin           :   7.500 ns
  tRTPmin           :   7.500 ns
  tFAWmin           :  30.000 ns
  Row    addr bits  : 16
  Column addr bits  : 10
  Number of ranks   : 1
  DIMM Capacity     : 4096 MB
  CAS latencies     : 5 6 7 8 9 10 11
  tCKmin            :   1.250 ns
  tAAmin            :  13.125 ns
  tWRmin            :  15.000 ns
  tRCDmin           :  13.125 ns
  tRRDmin           :   6.000 ns
  tRPmin            :  13.125 ns
  tRASmin           :  35.000 ns
  tRCmin            :  48.125 ns
  tRFCmin           : 260.000 ns
  tWTRmin           :   7.500 ns
  tRTPmin           :   7.500 ns
  tFAWmin           :  30.000 ns
ME: FWS2: 0x101f012e
ME:  Bist in progress: 0x0
ME:  ICC Status      : 0x3
ME:  Invoke MEBx     : 0x1
ME:  CPU replaced    : 0x0
ME:  MBP ready       : 0x1
ME:  MFS failure     : 0x0
ME:  Warm reset req  : 0x0
ME:  CPU repl valid  : 0x1
ME:  (Reserved)      : 0x0
ME:  FW update req   : 0x0
ME:  (Reserved)      : 0x0
ME:  Current state   : 0x1f
ME:  Current PM event: 0x0
ME:  Progress code   : 0x1
PASSED! Tell ME that DRAM is ready
ME: FWS2: 0x1050012e
ME:  Bist in progress: 0x0
ME:  ICC Status      : 0x3
ME:  Invoke MEBx     : 0x1
ME:  CPU replaced    : 0x0
ME:  MBP ready       : 0x1
ME:  MFS failure     : 0x0
ME:  Warm reset req  : 0x0
ME:  CPU repl valid  : 0x1
ME:  (Reserved)      : 0x0
ME:  FW update req   : 0x0
ME:  (Reserved)      : 0x0
ME:  Current state   : 0x50
ME:  Current PM event: 0x0
ME:  Progress code   : 0x1
ME: Requested BIOS Action: Continue to boot
POST: 0x3b
POST: 0x3c
POST: 0x3d
POST: 0x3f
CBFS: 'Master Header Locator' located CBFS at [920000:bfffc0)
CBFS: Locating 'fallback/postcar'
CBFS: Found @ offset 44340 size 4254
Decompressing stage fallback/postcar @ 0x7ffcdfc0 (33552 bytes)


coreboot-4.8-1536-g3a618dd214 Tue Sep 18 21:42:46 UTC 2018 postcar starting...
CBFS: 'Master Header Locator' located CBFS at [920000:bfffc0)
CBFS: Locating 'fallback/ramstage'
CBFS: Found @ offset 196c0 size 19655
Decompressing stage fallback/ramstage @ 0x7ff84fc0 (293912 bytes)
Loading module at 7ff85000 with entry 7ff85000. filesize: 0x33f30 memsize: 0x47bd8
Processing 3366 relocs. Offset value of 0x7fe85000


coreboot-4.8-1536-g3a618dd214 Tue Sep 18 21:42:46 UTC 2018 ramstage starting...
POST: 0x39
POST: 0x80
Normal boot.
POST: 0x70
BS: BS_PRE_DEVICE times (us): entry 0 run 2 exit 0
POST: 0x71
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 3 exit 0
POST: 0x72
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
DOMAIN: 0000: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
PCI: 00:14.0: enabled 1
PCI: 00:16.0: enabled 1
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:19.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 1
PCI: 00:1c.2: enabled 1
PCI: 00:1c.3: enabled 0
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 0
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:04.0: enabled 0
PCI: 00:00.0: enabled 1
PNP: 00ff.1: enabled 1
PNP: 00ff.2: enabled 1
PNP: 00ff.f: enabled 1
PNP: 0c31.0: enabled 1
I2C: 00:54: enabled 1
I2C: 00:55: enabled 1
I2C: 00:56: enabled 1
I2C: 00:57: enabled 1
I2C: 00:5c: enabled 1
I2C: 00:5d: enabled 1
I2C: 00:5e: enabled 1
I2C: 00:5f: enabled 1
Compare with tree...
Root Device: enabled 1
 CPU_CLUSTER: 0: enabled 1
  APIC: 00: enabled 1
  APIC: acac: enabled 0
 DOMAIN: 0000: enabled 1
  PCI: 00:14.0: enabled 1
  PCI: 00:16.0: enabled 1
  PCI: 00:16.1: enabled 0
  PCI: 00:16.2: enabled 0
  PCI: 00:16.3: enabled 0
  PCI: 00:19.0: enabled 1
  PCI: 00:1a.0: enabled 1
  PCI: 00:1b.0: enabled 1
  PCI: 00:1c.0: enabled 1
   PCI: 00:00.0: enabled 1
  PCI: 00:1c.1: enabled 1
  PCI: 00:1c.2: enabled 1
  PCI: 00:1c.3: enabled 0
  PCI: 00:1c.4: enabled 0
  PCI: 00:1c.5: enabled 0
  PCI: 00:1c.6: enabled 0
  PCI: 00:1c.7: enabled 0
  PCI: 00:1d.0: enabled 1
  PCI: 00:1e.0: enabled 0
  PCI: 00:1f.0: enabled 1
   PNP: 00ff.1: enabled 1
   PNP: 00ff.2: enabled 1
   PNP: 00ff.f: enabled 1
   PNP: 0c31.0: enabled 1
  PCI: 00:1f.2: enabled 1
  PCI: 00:1f.3: enabled 1
   I2C: 00:54: enabled 1
   I2C: 00:55: enabled 1
   I2C: 00:56: enabled 1
   I2C: 00:57: enabled 1
   I2C: 00:5c: enabled 1
   I2C: 00:5d: enabled 1
   I2C: 00:5e: enabled 1
   I2C: 00:5f: enabled 1
  PCI: 00:1f.5: enabled 0
  PCI: 00:1f.6: enabled 0
  PCI: 00:00.0: enabled 1
  PCI: 00:01.0: enabled 1
  PCI: 00:02.0: enabled 1
  PCI: 00:04.0: enabled 0
Root Device scanning...
root_dev_scan_bus for Root Device
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
POST: 0x24
PCI: 00:00.0 [8086/0154] ops
PCI: 00:00.0 [8086/0154] enabled
PCI: Static device PCI: 00:01.0 not found, disabling it.
PCI: 00:02.0 [8086/0000] ops
PCI: 00:02.0 [8086/0166] enabled
PCI: 00:04.0 [8086/0153] disabled
PCI: 00:14.0 [8086/0000] ops
PCI: 00:14.0 [8086/1e31] enabled
PCI: 00:16.0 [8086/1e3a] ops
PCI: 00:16.0 [8086/1e3a] enabled
PCI: 00:16.1: Disabling device
PCI: 00:16.1 [8086/1e3b] disabled No operations
PCI: 00:16.2: Disabling device
PCI: 00:16.2 [8086/1e3c] disabled No operations
PCI: 00:16.3: Disabling device
PCI: 00:16.3 [8086/1e3d] disabled No operations
PCI: 00:19.0 [8086/1502] enabled
PCI: 00:1a.0 [8086/0000] ops
PCI: 00:1a.0 [8086/1e2d] enabled
PCI: 00:1b.0 [8086/0000] ops
PCI: 00:1b.0 [8086/1e20] enabled
PCH: PCIe Root Port coalescing is enabled
PCI: 00:1c.0 [8086/0000] bus ops
PCI: 00:1c.0 [8086/1e10] enabled
PCI: 00:1c.1 [8086/0000] bus ops
PCI: 00:1c.1 [8086/1e12] enabled
PCI: 00:1c.2 [8086/0000] bus ops
PCI: 00:1c.2 [8086/1e14] enabled
PCI: 00:1c.3: Disabling device
PCI: 00:1c.3 [8086/0000] bus ops
PCI: 00:1c.3 [8086/1e16] disabled
PCI: 00:1c.4: Disabling device
PCI: 00:1c.4: check set enabled
PCI: 00:1c.5: Disabling device
PCI: 00:1c.6: Disabling device
PCI: 00:1c.7: Disabling device
PCH: RPFN 0x76543210 -> 0xfedcb210
PCI: 00:1d.0 [8086/0000] ops
PCI: 00:1d.0 [8086/1e26] enabled
PCI: 00:1e.0: Disabling device
PCI: 00:1e.0 [8086/2448] bus ops
PCI: 00:1e.0 [8086/2448] disabled
PCI: 00:1f.0 [8086/0000] bus ops
PCI: 00:1f.0 [8086/1e55] enabled
PCI: 00:1f.2 [8086/0000] ops
FMAP: area COREBOOT found @ 920000 (3014656 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 33ac0 size 79c
PCI: 00:1f.2 [8086/1e01] enabled
PCI: 00:1f.3 [8086/0000] bus ops
PCI: 00:1f.3 [8086/1e22] enabled
PCI: 00:1f.5: Disabling device
PCI: 00:1f.5 [8086/1e09] disabled No operations
PCI: 00:1f.6: Disabling device
PCI: 00:1f.6 [8086/1e24] disabled No operations
POST: 0x25
PCI: 00:1c.0 scanning...
do_pci_scan_bridge for PCI: 00:1c.0
PCI: pci_scan_bus for bus 01
POST: 0x24
PCI: 01:00.0 [1180/0000] ops
PCI: 01:00.0 [1180/e823] enabled
POST: 0x25
POST: 0x55
Capability: type 0x05 @ 0x50
Capability: type 0x01 @ 0x78
Capability: type 0x10 @ 0x80
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
Capability: type 0x05 @ 0x50
Capability: type 0x01 @ 0x78
Capability: type 0x10 @ 0x80
Failed to enable LTR for dev = PCI: 01:00.0
scan_bus: scanning of bus PCI: 00:1c.0 took 259 usecs
PCI: 00:1c.1 scanning...
do_pci_scan_bridge for PCI: 00:1c.1
PCI: pci_scan_bus for bus 02
POST: 0x24
PCI: 02:00.0 [8086/0000] ops
PCI: 02:00.0 [8086/0085] enabled
POST: 0x25
POST: 0x55
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0xe0
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
ASPM: Enabled L1
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0xe0
Failed to enable LTR for dev = PCI: 02:00.0
scan_bus: scanning of bus PCI: 00:1c.1 took 280 usecs
PCI: 00:1c.2 scanning...
do_pci_scan_bridge for PCI: 00:1c.2
PCI: pci_scan_bus for bus 03
POST: 0x24
PCI: 03:00.0 [1002/67df] enabled
PCI: 03:00.1 [1002/aaf0] enabled
POST: 0x25
POST: 0x55
Capability: type 0x09 @ 0x48
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
ASPM: Enabled L1
Capability: type 0x09 @ 0x48
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
ASPM: Enabled L1
Capability: type 0x09 @ 0x48
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x09 @ 0x48
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
scan_bus: scanning of bus PCI: 00:1c.2 took 458 usecs
PCI: 00:1f.0 scanning...
scan_lpc_bus for PCI: 00:1f.0
FMAP: area COREBOOT found @ 920000 (3014656 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 33ac0 size 79c
FMAP: area COREBOOT found @ 920000 (3014656 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 33ac0 size 79c
PMH7: ID 05 Revision 12
PNP: 00ff.1 enabled
Clearing EC output queue...
Discarding a garbage byte: 0x55
EC output queue has been cleared.
recv_ec_data: 0x47
recv_ec_data: 0x31
recv_ec_data: 0x48
recv_ec_data: 0x54
recv_ec_data: 0x33
recv_ec_data: 0x32
recv_ec_data: 0x57
recv_ec_data: 0x57
recv_ec_data: 0x16
recv_ec_data: 0x03
recv_ec_data: 0x00
recv_ec_data: 0x11
EC Firmware ID G1HT32WW-3.22, Version 0.01B
FMAP: area COREBOOT found @ 920000 (3014656 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 33ac0 size 79c
No CMOS option 'power_management_beeps'.
FMAP: area COREBOOT found @ 920000 (3014656 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 33ac0 size 79c
No CMOS option 'low_battery_beep'.
recv_ec_data: 0x00
FMAP: area COREBOOT found @ 920000 (3014656 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 33ac0 size 79c
recv_ec_data: 0x40
recv_ec_data: 0x90
FMAP: area COREBOOT found @ 920000 (3014656 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 33ac0 size 79c
H8: BDC installed
FMAP: area COREBOOT found @ 920000 (3014656 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 33ac0 size 79c
recv_ec_data: 0x60
H8: WWAN not installed
recv_ec_data: 0x70
FMAP: area COREBOOT found @ 920000 (3014656 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 33ac0 size 79c
recv_ec_data: 0x00
FMAP: area COREBOOT found @ 920000 (3014656 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 33ac0 size 79c
recv_ec_data: 0xa7
FMAP: area COREBOOT found @ 920000 (3014656 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 33ac0 size 79c
recv_ec_data: 0xa7
recv_ec_data: 0x30
PNP: 00ff.2 enabled
Hybrid graphics: Not installed
PNP: 00ff.f disabled
PNP: 0c31.0 enabled
scan_lpc_bus for PCI: 00:1f.0 done
scan_bus: scanning of bus PCI: 00:1f.0 took 4705 usecs
PCI: 00:1f.3 scanning...
scan_generic_bus for PCI: 00:1f.3
bus: PCI: 00:1f.3[0]->I2C: 01:54 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled
scan_generic_bus for PCI: 00:1f.3 done
scan_bus: scanning of bus PCI: 00:1f.3 took 22 usecs
POST: 0x55
scan_bus: scanning of bus DOMAIN: 0000 took 6364 usecs
root_dev_scan_bus for Root Device done
scan_bus: scanning of bus Root Device took 6371 usecs
done
FMAP: area RW_MRC_CACHE found @ 910000 (65536 bytes)
MRC: Checking cached data update for 'RW_MRC_CACHE'.
flash size 0xc00000 bytes
SF: Detected Opaque HW-sequencing with sector size 0x100, total 0xc00000
MRC: no data in 'RW_MRC_CACHE'
MRC: cache data 'RW_MRC_CACHE' needs update.
SF: Successfully written 2 bytes @ 0x910000
SF: Successfully written 2 bytes @ 0x910002
SF: Successfully written 1492 bytes @ 0x910060
BS: BS_DEV_ENUMERATE times (us): entry 0 run 6487 exit 18089
POST: 0x73
found VGA at PCI: 00:02.0
found VGA at PCI: 03:00.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0
Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
PCI: 00:1c.0 read_resources bus 1 link: 0
PCI: 00:1c.0 read_resources bus 1 link: 0 done
PCI: 00:1c.1 read_resources bus 2 link: 0
PCI: 00:1c.1 read_resources bus 2 link: 0 done
PCI: 00:1c.2 read_resources bus 3 link: 0
PCI: 00:1c.2 read_resources bus 3 link: 0 done
PCI: 00:1f.0 read_resources bus 0 link: 0
PNP: 00ff.1 missing read_resources
PNP: 00ff.2 missing read_resources
PCI: 00:1f.0 read_resources bus 0 link: 0 done
PCI: 00:1f.3 read_resources bus 1 link: 0
PCI: 00:1f.3 read_resources bus 1 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
   APIC: acac
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
   PCI: 00:00.0
   PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60
   PCI: 00:01.0
   PCI: 00:02.0
   PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10
   PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
   PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
   PCI: 00:04.0
   PCI: 00:14.0
   PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
   PCI: 00:16.0
   PCI: 00:16.0 resource base 0 size 10 align 12 gran 4 limit ffffffffffffffff flags 201 index 10
   PCI: 00:16.1
   PCI: 00:16.2
   PCI: 00:16.3
   PCI: 00:19.0
   PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
   PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
   PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
   PCI: 00:1a.0
   PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
   PCI: 00:1b.0
   PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
   PCI: 00:1c.0 child on link 0 PCI: 01:00.0
   PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 01:00.0
    PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
   PCI: 00:1c.1 child on link 0 PCI: 02:00.0
   PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 02:00.0
    PCI: 02:00.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
   PCI: 00:1c.2 child on link 0 PCI: 03:00.0
   PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 03:00.0
    PCI: 03:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 10
    PCI: 03:00.0 resource base 0 size 200000 align 21 gran 21 limit ffffffffffffffff flags 1201 index 18
    PCI: 03:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 20
    PCI: 03:00.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 24
    PCI: 03:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 index 30
    PCI: 03:00.1
    PCI: 03:00.1 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
    NONE
    NONE resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10
    NONE resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14
    NONE resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18
   PCI: 00:1c.3
   PCI: 00:1c.4
   PCI: 00:1c.5
   PCI: 00:1c.6
   PCI: 00:1c.7
   PCI: 00:1d.0
   PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
   PCI: 00:1e.0
   PCI: 00:1f.0 child on link 0 PNP: 00ff.1
   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
   PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000200
   PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000300
    PNP: 00ff.1
    PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77
    PNP: 00ff.2
    PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
    PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64
    PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66
    PNP: 00ff.f
    PNP: 0c31.0
    PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0
   PCI: 00:1f.2
   PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
   PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
   PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
   PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
   PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
   PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
   PCI: 00:1f.3 child on link 0 I2C: 01:54
   PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
   PCI: 00:1f.3 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
    I2C: 01:54
    I2C: 01:55
    I2C: 01:56
    I2C: 01:57
    I2C: 01:5c
    I2C: 01:5d
    I2C: 01:5e
    I2C: 01:5f
   PCI: 00:1f.5
   PCI: 00:1f.6
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
NONE 18 *  [0x0 - 0xfff] io
PCI: 03:00.0 20 *  [0x1000 - 0x10ff] io
PCI: 00:1c.2 io: base: 1100 size: 2000 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.2 1c *  [0x0 - 0x1fff] io
PCI: 00:02.0 20 *  [0x2000 - 0x203f] io
PCI: 00:19.0 18 *  [0x2040 - 0x205f] io
PCI: 00:1f.2 20 *  [0x2060 - 0x207f] io
PCI: 00:1f.2 10 *  [0x2080 - 0x2087] io
PCI: 00:1f.2 18 *  [0x2088 - 0x208f] io
PCI: 00:1f.2 14 *  [0x2090 - 0x2093] io
PCI: 00:1f.2 1c *  [0x2094 - 0x2097] io
DOMAIN: 0000 io: base: 2098 size: 2098 align: 12 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 10 *  [0x0 - 0xff] mem
PCI: 00:1c.0 mem: base: 100 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:00.0 10 *  [0x0 - 0x1fff] mem
PCI: 00:1c.1 mem: base: 2000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 03:00.0 10 *  [0x0 - 0xfffffff] prefmem
NONE 14 *  [0x10000000 - 0x107fffff] prefmem
PCI: 03:00.0 18 *  [0x10800000 - 0x109fffff] prefmem
PCI: 00:1c.2 prefmem: base: 10a00000 size: 10a00000 align: 28 gran: 20 limit: ffffffff done
PCI: 00:1c.2 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
NONE 10 *  [0x0 - 0x7fffff] mem
PCI: 03:00.0 24 *  [0x800000 - 0x83ffff] mem
PCI: 03:00.0 30 *  [0x840000 - 0x85ffff] mem
PCI: 03:00.1 10 *  [0x860000 - 0x863fff] mem
PCI: 00:1c.2 mem: base: 864000 size: 900000 align: 22 gran: 20 limit: ffffffff done
PCI: 00:1c.2 24 *  [0x0 - 0x109fffff] prefmem
PCI: 00:02.0 18 *  [0x20000000 - 0x2fffffff] prefmem
PCI: 00:1c.2 20 *  [0x30000000 - 0x308fffff] mem
PCI: 00:02.0 10 *  [0x30c00000 - 0x30ffffff] mem
PCI: 00:1c.0 20 *  [0x31000000 - 0x310fffff] mem
PCI: 00:1c.1 20 *  [0x31100000 - 0x311fffff] mem
PCI: 00:19.0 10 *  [0x31200000 - 0x3121ffff] mem
PCI: 00:14.0 10 *  [0x31220000 - 0x3122ffff] mem
PCI: 00:1b.0 10 *  [0x31230000 - 0x31233fff] mem
PCI: 00:19.0 14 *  [0x31234000 - 0x31234fff] mem
PCI: 00:1f.2 24 *  [0x31235000 - 0x312357ff] mem
PCI: 00:1a.0 10 *  [0x31236000 - 0x312363ff] mem
PCI: 00:1d.0 10 *  [0x31237000 - 0x312373ff] mem
PCI: 00:1f.3 10 *  [0x31238000 - 0x312380ff] mem
PCI: 00:16.0 10 *  [0x31239000 - 0x3123900f] mem
DOMAIN: 0000 mem: base: 31239010 size: 31239010 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI: 00:00.0 60 base f0000000 limit f3ffffff mem (fixed)
constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
constrain_resources: PCI: 00:1f.0 10000200 base 000015e0 limit 000015eb io (fixed)
constrain_resources: PCI: 00:1f.0 10000300 base 00001600 limit 0000167b io (fixed)
skipping PNP: 00ff.2@60 fixed resource, size=0!
skipping PNP: 00ff.2@62 fixed resource, size=0!
skipping PNP: 00ff.2@64 fixed resource, size=0!
skipping PNP: 00ff.2@66 fixed resource, size=0!
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 0000167c limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 base b0000000 limit efffffff
Setting resources...
DOMAIN: 0000 io: base:167c size:2098 align:12 gran:0 limit:ffff
PCI: 00:1c.2 1c *  [0x2000 - 0x3fff] io
PCI: 00:02.0 20 *  [0x4000 - 0x403f] io
PCI: 00:19.0 18 *  [0x4040 - 0x405f] io
PCI: 00:1f.2 20 *  [0x4060 - 0x407f] io
PCI: 00:1f.2 10 *  [0x4080 - 0x4087] io
PCI: 00:1f.2 18 *  [0x4088 - 0x408f] io
PCI: 00:1f.2 14 *  [0x4090 - 0x4093] io
PCI: 00:1f.2 1c *  [0x4094 - 0x4097] io
DOMAIN: 0000 io: next_base: 4098 size: 2098 align: 12 gran: 0 done
PCI: 00:1c.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:1c.1 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.1 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:1c.2 io: base:2000 size:2000 align:12 gran:12 limit:3fff
NONE 18 *  [0x2000 - 0x2fff] io
PCI: 03:00.0 20 *  [0x3000 - 0x30ff] io
PCI: 00:1c.2 io: next_base: 3100 size: 2000 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:b0000000 size:31239010 align:28 gran:0 limit:efffffff
PCI: 00:1c.2 24 *  [0xb0000000 - 0xc09fffff] prefmem
PCI: 00:02.0 18 *  [0xd0000000 - 0xdfffffff] prefmem
PCI: 00:1c.2 20 *  [0xe0000000 - 0xe08fffff] mem
PCI: 00:02.0 10 *  [0xe0c00000 - 0xe0ffffff] mem
PCI: 00:1c.0 20 *  [0xe1000000 - 0xe10fffff] mem
PCI: 00:1c.1 20 *  [0xe1100000 - 0xe11fffff] mem
PCI: 00:19.0 10 *  [0xe1200000 - 0xe121ffff] mem
PCI: 00:14.0 10 *  [0xe1220000 - 0xe122ffff] mem
PCI: 00:1b.0 10 *  [0xe1230000 - 0xe1233fff] mem
PCI: 00:19.0 14 *  [0xe1234000 - 0xe1234fff] mem
PCI: 00:1f.2 24 *  [0xe1235000 - 0xe12357ff] mem
PCI: 00:1a.0 10 *  [0xe1236000 - 0xe12363ff] mem
PCI: 00:1d.0 10 *  [0xe1237000 - 0xe12373ff] mem
PCI: 00:1f.3 10 *  [0xe1238000 - 0xe12380ff] mem
PCI: 00:16.0 10 *  [0xe1239000 - 0xe123900f] mem
DOMAIN: 0000 mem: next_base: e1239010 size: 31239010 align: 28 gran: 0 done
PCI: 00:1c.0 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
PCI: 00:1c.0 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.0 mem: base:e1000000 size:100000 align:20 gran:20 limit:e10fffff
PCI: 01:00.0 10 *  [0xe1000000 - 0xe10000ff] mem
PCI: 00:1c.0 mem: next_base: e1000100 size: 100000 align: 20 gran: 20 done
PCI: 00:1c.1 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
PCI: 00:1c.1 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.1 mem: base:e1100000 size:100000 align:20 gran:20 limit:e11fffff
PCI: 02:00.0 10 *  [0xe1100000 - 0xe1101fff] mem
PCI: 00:1c.1 mem: next_base: e1102000 size: 100000 align: 20 gran: 20 done
PCI: 00:1c.2 prefmem: base:b0000000 size:10a00000 align:28 gran:20 limit:c09fffff
PCI: 03:00.0 10 *  [0xb0000000 - 0xbfffffff] prefmem
NONE 14 *  [0xc0000000 - 0xc07fffff] prefmem
PCI: 03:00.0 18 *  [0xc0800000 - 0xc09fffff] prefmem
PCI: 00:1c.2 prefmem: next_base: c0a00000 size: 10a00000 align: 28 gran: 20 done
PCI: 00:1c.2 mem: base:e0000000 size:900000 align:22 gran:20 limit:e08fffff
NONE 10 *  [0xe0000000 - 0xe07fffff] mem
PCI: 03:00.0 24 *  [0xe0800000 - 0xe083ffff] mem
PCI: 03:00.0 30 *  [0xe0840000 - 0xe085ffff] mem
PCI: 03:00.1 10 *  [0xe0860000 - 0xe0863fff] mem
PCI: 00:1c.2 mem: next_base: e0864000 size: 900000 align: 22 gran: 20 done
Root Device assign_resources, bus 0 link: 0
TOUUD 0x27b600000 TOLUD 0x82a00000 TOM 0x200000000
MEBASE 0x1fe000000
IGD decoded, subtracting 32M UMA and 2M GTT
TSEG base 0x80000000 size 8M
Available memory below 4GB: 2048M
Available memory above 4GB: 6070M
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:02.0 10 <- [0x00e0c00000 - 0x00e0ffffff] size 0x00400000 gran 0x16 mem64
PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 00:02.0 20 <- [0x0000004000 - 0x000000403f] size 0x00000040 gran 0x06 io
PCI: 00:14.0 10 <- [0x00e1220000 - 0x00e122ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:16.0 10 <- [0x00e1239000 - 0x00e123900f] size 0x00000010 gran 0x04 mem64
PCI: 00:19.0 10 <- [0x00e1200000 - 0x00e121ffff] size 0x00020000 gran 0x11 mem
PCI: 00:19.0 14 <- [0x00e1234000 - 0x00e1234fff] size 0x00001000 gran 0x0c mem
PCI: 00:19.0 18 <- [0x0000004040 - 0x000000405f] size 0x00000020 gran 0x05 io
PCI: 00:1a.0 10 <- [0x00e1236000 - 0x00e12363ff] size 0x00000400 gran 0x0a mem
PCI: 00:1b.0 10 <- [0x00e1230000 - 0x00e1233fff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:1c.0 20 <- [0x00e1000000 - 0x00e10fffff] size 0x00100000 gran 0x14 bus 01 mem
PCI: 00:1c.0 assign_resources, bus 1 link: 0
PCI: 01:00.0 10 <- [0x00e1000000 - 0x00e10000ff] size 0x00000100 gran 0x08 mem
PCI: 00:1c.0 assign_resources, bus 1 link: 0
PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:1c.1 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:1c.1 20 <- [0x00e1100000 - 0x00e11fffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 00:1c.1 assign_resources, bus 2 link: 0
PCI: 02:00.0 10 <- [0x00e1100000 - 0x00e1101fff] size 0x00002000 gran 0x0d mem64
PCI: 00:1c.1 assign_resources, bus 2 link: 0
PCI: 00:1c.2 1c <- [0x0000002000 - 0x0000003fff] size 0x00002000 gran 0x0c bus 03 io
PCI: 00:1c.2 24 <- [0x00b0000000 - 0x00c09fffff] size 0x10a00000 gran 0x14 bus 03 prefmem
PCI: 00:1c.2 20 <- [0x00e0000000 - 0x00e08fffff] size 0x00900000 gran 0x14 bus 03 mem
PCI: 00:1c.2 assign_resources, bus 3 link: 0
PCI: 03:00.0 10 <- [0x00b0000000 - 0x00bfffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 03:00.0 18 <- [0x00c0800000 - 0x00c09fffff] size 0x00200000 gran 0x15 prefmem64
PCI: 03:00.0 20 <- [0x0000003000 - 0x00000030ff] size 0x00000100 gran 0x08 io
PCI: 03:00.0 24 <- [0x00e0800000 - 0x00e083ffff] size 0x00040000 gran 0x12 mem
PCI: 03:00.0 30 <- [0x00e0840000 - 0x00e085ffff] size 0x00020000 gran 0x11 romem
PCI: 03:00.1 10 <- [0x00e0860000 - 0x00e0863fff] size 0x00004000 gran 0x0e mem64
NONE missing set_resources
PCI: 00:1c.2 assign_resources, bus 3 link: 0
PCI: 00:1d.0 10 <- [0x00e1237000 - 0x00e12373ff] size 0x00000400 gran 0x0a mem
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PNP: 00ff.1 missing set_resources
PNP: 00ff.2 missing set_resources
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PCI: 00:1f.2 10 <- [0x0000004080 - 0x0000004087] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 14 <- [0x0000004090 - 0x0000004093] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 18 <- [0x0000004088 - 0x000000408f] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 1c <- [0x0000004094 - 0x0000004097] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 20 <- [0x0000004060 - 0x000000407f] size 0x00000020 gran 0x05 io
PCI: 00:1f.2 24 <- [0x00e1235000 - 0x00e12357ff] size 0x00000800 gran 0x0b mem
PCI: 00:1f.3 10 <- [0x00e1238000 - 0x00e12380ff] size 0x00000100 gran 0x08 mem64
PCI: 00:1f.3 assign_resources, bus 1 link: 0
PCI: 00:1f.3 assign_resources, bus 1 link: 0
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
   APIC: acac
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 167c size 2098 align 12 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base b0000000 size 31239010 align 28 gran 0 limit efffffff flags 40040200 index 10000100
  DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
  DOMAIN: 0000 resource base 100000 size 7ff00000 align 0 gran 0 limit 0 flags e0004200 index 4
  DOMAIN: 0000 resource base 100000000 size 17b600000 align 0 gran 0 limit 0 flags e0004200 index 5
  DOMAIN: 0000 resource base 80000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6
  DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
  DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8
  DOMAIN: 0000 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
  DOMAIN: 0000 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
   PCI: 00:00.0
   PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60
   PCI: 00:01.0
   PCI: 00:02.0
   PCI: 00:02.0 resource base e0c00000 size 400000 align 22 gran 22 limit e0ffffff flags 60000201 index 10
   PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit dfffffff flags 60001201 index 18
   PCI: 00:02.0 resource base 4000 size 40 align 6 gran 6 limit 403f flags 60000100 index 20
   PCI: 00:04.0
   PCI: 00:14.0
   PCI: 00:14.0 resource base e1220000 size 10000 align 16 gran 16 limit e122ffff flags 60000201 index 10
   PCI: 00:16.0
   PCI: 00:16.0 resource base e1239000 size 10 align 12 gran 4 limit e123900f flags 60000201 index 10
   PCI: 00:16.1
   PCI: 00:16.2
   PCI: 00:16.3
   PCI: 00:19.0
   PCI: 00:19.0 resource base e1200000 size 20000 align 17 gran 17 limit e121ffff flags 60000200 index 10
   PCI: 00:19.0 resource base e1234000 size 1000 align 12 gran 12 limit e1234fff flags 60000200 index 14
   PCI: 00:19.0 resource base 4040 size 20 align 5 gran 5 limit 405f flags 60000100 index 18
   PCI: 00:1a.0
   PCI: 00:1a.0 resource base e1236000 size 400 align 12 gran 10 limit e12363ff flags 60000200 index 10
   PCI: 00:1b.0
   PCI: 00:1b.0 resource base e1230000 size 4000 align 14 gran 14 limit e1233fff flags 60000201 index 10
   PCI: 00:1c.0 child on link 0 PCI: 01:00.0
   PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
   PCI: 00:1c.0 resource base e1000000 size 100000 align 20 gran 20 limit e10fffff flags 60080202 index 20
    PCI: 01:00.0
    PCI: 01:00.0 resource base e1000000 size 100 align 12 gran 8 limit e10000ff flags 60000200 index 10
   PCI: 00:1c.1 child on link 0 PCI: 02:00.0
   PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:1c.1 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
   PCI: 00:1c.1 resource base e1100000 size 100000 align 20 gran 20 limit e11fffff flags 60080202 index 20
    PCI: 02:00.0
    PCI: 02:00.0 resource base e1100000 size 2000 align 13 gran 13 limit e1101fff flags 60000201 index 10
   PCI: 00:1c.2 child on link 0 PCI: 03:00.0
   PCI: 00:1c.2 resource base 2000 size 2000 align 12 gran 12 limit 3fff flags 60080102 index 1c
   PCI: 00:1c.2 resource base b0000000 size 10a00000 align 28 gran 20 limit c09fffff flags 60081202 index 24
   PCI: 00:1c.2 resource base e0000000 size 900000 align 22 gran 20 limit e08fffff flags 60080202 index 20
    PCI: 03:00.0
    PCI: 03:00.0 resource base b0000000 size 10000000 align 28 gran 28 limit bfffffff flags 60001201 index 10
    PCI: 03:00.0 resource base c0800000 size 200000 align 21 gran 21 limit c09fffff flags 60001201 index 18
    PCI: 03:00.0 resource base 3000 size 100 align 8 gran 8 limit 30ff flags 60000100 index 20
    PCI: 03:00.0 resource base e0800000 size 40000 align 18 gran 18 limit e083ffff flags 60000200 index 24
    PCI: 03:00.0 resource base e0840000 size 20000 align 17 gran 17 limit e085ffff flags 60002200 index 30
    PCI: 03:00.1
    PCI: 03:00.1 resource base e0860000 size 4000 align 14 gran 14 limit e0863fff flags 60000201 index 10
    NONE
    NONE resource base e0000000 size 800000 align 22 gran 22 limit e07fffff flags 40000200 index 10
    NONE resource base c0000000 size 800000 align 22 gran 22 limit c07fffff flags 40001200 index 14
    NONE resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 40000100 index 18
   PCI: 00:1c.3
   PCI: 00:1c.4
   PCI: 00:1c.5
   PCI: 00:1c.6
   PCI: 00:1c.7
   PCI: 00:1d.0
   PCI: 00:1d.0 resource base e1237000 size 400 align 12 gran 10 limit e12373ff flags 60000200 index 10
   PCI: 00:1e.0
   PCI: 00:1f.0 child on link 0 PNP: 00ff.1
   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
   PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000200
   PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000300
    PNP: 00ff.1
    PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77
    PNP: 00ff.2
    PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
    PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64
    PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66
    PNP: 00ff.f
    PNP: 0c31.0
    PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0
   PCI: 00:1f.2
   PCI: 00:1f.2 resource base 4080 size 8 align 3 gran 3 limit 4087 flags 60000100 index 10
   PCI: 00:1f.2 resource base 4090 size 4 align 2 gran 2 limit 4093 flags 60000100 index 14
   PCI: 00:1f.2 resource base 4088 size 8 align 3 gran 3 limit 408f flags 60000100 index 18
   PCI: 00:1f.2 resource base 4094 size 4 align 2 gran 2 limit 4097 flags 60000100 index 1c
   PCI: 00:1f.2 resource base 4060 size 20 align 5 gran 5 limit 407f flags 60000100 index 20
   PCI: 00:1f.2 resource base e1235000 size 800 align 12 gran 11 limit e12357ff flags 60000200 index 24
   PCI: 00:1f.3 child on link 0 I2C: 01:54
   PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
   PCI: 00:1f.3 resource base e1238000 size 100 align 12 gran 8 limit e12380ff flags 60000201 index 10
    I2C: 01:54
    I2C: 01:55
    I2C: 01:56
    I2C: 01:57
    I2C: 01:5c
    I2C: 01:5d
    I2C: 01:5e
    I2C: 01:5f
   PCI: 00:1f.5
   PCI: 00:1f.6
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 2446 exit 0
POST: 0x74
Enabling resources...
PCI: 00:00.0 subsystem <- 17aa/21f3
PCI: 00:00.0 cmd <- 06
PCI: 00:02.0 subsystem <- 17aa/21f3
PCI: 00:02.0 cmd <- 03
PCI: 00:14.0 subsystem <- 17aa/21f3
PCI: 00:14.0 cmd <- 102
PCI: 00:16.0 subsystem <- 17aa/21f3
PCI: 00:16.0 cmd <- 02
PCI: 00:19.0 subsystem <- 17aa/21f3
PCI: 00:19.0 cmd <- 103
PCI: 00:1a.0 subsystem <- 17aa/21f3
PCI: 00:1a.0 cmd <- 102
PCI: 00:1b.0 subsystem <- 17aa/21f3
PCI: 00:1b.0 cmd <- 102
PCI: 00:1c.0 bridge ctrl <- 0003
PCI: 00:1c.0 subsystem <- 17aa/21f3
PCI: 00:1c.0 cmd <- 106
PCI: 00:1c.1 bridge ctrl <- 0003
PCI: 00:1c.1 subsystem <- 17aa/21f3
PCI: 00:1c.1 cmd <- 106
PCI: 00:1c.2 bridge ctrl <- 0003
PCI: 00:1c.2 subsystem <- 17aa/21f3
PCI: 00:1c.2 cmd <- 107
PCI: 00:1d.0 subsystem <- 17aa/21f3
PCI: 00:1d.0 cmd <- 102
pch_decode_init
PCI: 00:1f.0 subsystem <- 17aa/21f3
PCI: 00:1f.0 cmd <- 107
PCI: 00:1f.2 subsystem <- 17aa/21f3
PCI: 00:1f.2 cmd <- 03
PCI: 00:1f.3 subsystem <- 17aa/21f3
PCI: 00:1f.3 cmd <- 103
PCI: 01:00.0 subsystem <- 17aa/21f3
PCI: 01:00.0 cmd <- 06
PCI: 02:00.0 cmd <- 02
PCI: 03:00.0 cmd <- 03
PCI: 03:00.1 cmd <- 02
done.
BS: BS_DEV_ENABLE times (us): entry 0 run 157 exit 0
Found TPM ST33ZP24 by ST Microelectronics
TPM: Startup
TPM: command 0x99 returned 0x0
TPM: Asserting physical presence
TPM: command 0x4000000a returned 0x0
TPM: command 0x65 returned 0x0
TPM: flags disable=0, deactivated=0, nvlocked=1
TPM: setup succeeded
POST: 0x75
Initializing devices...
Root Device init ...
Root Device init finished in 0 usecs
POST: 0x75
CPU_CLUSTER: 0 init ...
start_eip=0x00001000, code_size=0x00000031
Setting up SMI for CPU
Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
Processing 13 relocs. Offset value of 0x00038000
SMM Module: stub loaded at 00038000. Will call 7ffa3af0(7ffc8aa0)
Installing SMM handler to 0x80000000
Loading module at 80010000 with entry 80010495. filesize: 0x1bd0 memsize: 0x5bf8
Processing 60 relocs. Offset value of 0x80010000
Loading module at 80008000 with entry 80008000. filesize: 0x1a8 memsize: 0x1a8
Processing 13 relocs. Offset value of 0x80008000
SMM Module: placing jmp sequence at 80007c00 rel16 0x03fd
SMM Module: placing jmp sequence at 80007800 rel16 0x07fd
SMM Module: placing jmp sequence at 80007400 rel16 0x0bfd
SMM Module: placing jmp sequence at 80007000 rel16 0x0ffd
SMM Module: placing jmp sequence at 80006c00 rel16 0x13fd
SMM Module: placing jmp sequence at 80006800 rel16 0x17fd
SMM Module: placing jmp sequence at 80006400 rel16 0x1bfd
SMM Module: stub loaded at 80008000. Will call 80010495(00000000)
Initializing southbridge SMI... ... pmbase = 0x0500

SMI_STS: MCSMI PM1 
PM1_STS: WAK PWRBTN 
PM1_EN: 100
GPE0_STS: GPIO15 GPIO14 GPIO11 GPIO9 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO1 GPIO0 EL_SCI/BATLOW 
ALT_GP_SMI_STS: GPI14 GPI11 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI1 GPI0 
TCO_STS: 
  ... raise SMI#
In relocation handler: cpu 0
New SMBASE=0x80000000 IEDBASE=0x80400000 @ 0003fc00
Writing SMRR. base = 0x80000006, mask=0xff800800
Relocation complete.
Locking SMM.
Initializing CPU #0
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
POST: 0x60
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [920000:bfffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 13240 size 6400
microcode: sig=0x306a9 pf=0x10 revision=0x1f
CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz.
CPU: platform id 4
CPU: cpuid(1) 0x306a9
CPU: AES supported
CPU: TXT supported
CPU: VT supported
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x0000000080000000 size 0x7ff40000 type 6
0x0000000080000000 - 0x00000000b0000000 size 0x30000000 type 0
0x00000000b0000000 - 0x00000000c0000000 size 0x10000000 type 1
0x00000000c0000000 - 0x00000000c0800000 size 0x00800000 type 0
0x00000000c0800000 - 0x00000000c0a00000 size 0x00200000 type 1
0x00000000c0a00000 - 0x00000000d0000000 size 0x0f600000 type 0
0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1
0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0
0x0000000100000000 - 0x000000027b600000 size 0x17b600000 type 6
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits
MTRR: default type WB/UC MTRR counts: 13/6.
MTRR: UC selected as default type.
MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6
MTRR: 1 base 0x00000000b0000000 mask 0x0000000ff0000000 type 1
MTRR: 2 base 0x00000000c0800000 mask 0x0000000fffe00000 type 1
MTRR: 3 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1
MTRR: 4 base 0x0000000100000000 mask 0x0000000f00000000 type 6
MTRR: 5 base 0x0000000200000000 mask 0x0000000f80000000 type 6

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
Setting up local APIC... apic_id: 0x00 done.
VMX status: enabled, locked
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2700
Turbo is available but hidden
Turbo has been enabled
CPU: 0 has 4 cores, 2 threads per core
CPU: 0 has core 1
CPU1: stack_base 7ffbf000, stack_end 7ffbfff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 1.
After apic_write.
In relocation handler: cpu 1
New SMBASE=0x7ffffc00 IEDBASE=0x80400000 @ 0003fc00
Writing SMRR. base = 0x80000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
CPU: 0 has core 2
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
POST: 0x60
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [920000:bfffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 13240 size 6400
microcode: sig=0x306a9 pf=0x10 revision=0x1f
CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz.
CPU: platform id 4
CPU: cpuid(1) 0x306a9
CPU: AES supported
CPU: TXT supported
CPU: VT supported
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
Setting up local APIC... apic_id: 0x01 done.
VMX status: enabled, locked
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2700
CPU #1 initialized
CPU2: stack_base 7ffbe000, stack_end 7ffbeff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 2.
After apic_write.
In relocation handler: cpu 2
Startup point 1.
Waiting for send to finish...
+New SMBASE=0x7ffff800 IEDBASE=0x80400000 @ 0003fc00
Sending STARTUP #2 to 2.
After apic_write.
Writing SMRR. base = 0x80000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU: 0 has core 3
Initializing CPU #2
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
POST: 0x60
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [920000:bfffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 13240 size 6400
microcode: sig=0x306a9 pf=0x10 revision=0x0
microcode: updated to revision 0x1f date=2018-02-07
CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz.
CPU: platform id 4
CPU: cpuid(1) 0x306a9
CPU: AES supported
CPU: TXT supported
CPU: VT supported
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
Setting up local APIC... apic_id: 0x02 done.
VMX status: enabled, locked
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2700
CPU #2 initialized
CPU3: stack_base 7ffbd000, stack_end 7ffbdff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 3.
After apic_write.
In relocation handler: cpu 3
New SMBASE=0x7ffff400 IEDBASE=0x80400000 @ 0003fc00
Writing SMRR. base = 0x80000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 3.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU: 0 has core 4
Initializing CPU #3
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
POST: 0x60
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [920000:bfffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 13240 size 6400
microcode: sig=0x306a9 pf=0x10 revision=0x1f
CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz.
CPU: platform id 4
CPU: cpuid(1) 0x306a9
CPU: AES supported
CPU: TXT supported
CPU: VT supported
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
Setting up local APIC... apic_id: 0x03 done.
VMX status: enabled, locked
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2700
CPU #3 initialized
CPU4: stack_base 7ffbc000, stack_end 7ffbcff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 4.
After apic_write.
In relocation handler: cpu 4
Startup point 1.
Waiting for send to finish...
+New SMBASE=0x7ffff000 IEDBASE=0x80400000 @ 0003fc00
Sending STARTUP #2 to 4.
After apic_write.
Writing SMRR. base = 0x80000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU: 0 has core 5
Initializing CPU #4
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
POST: 0x60
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [920000:bfffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 13240 size 6400
microcode: sig=0x306a9 pf=0x10 revision=0x0
microcode: updated to revision 0x1f date=2018-02-07
CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz.
CPU: platform id 4
CPU: cpuid(1) 0x306a9
CPU: AES supported
CPU: TXT supported
CPU: VT supported
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
Setting up local APIC... apic_id: 0x04 done.
VMX status: enabled, locked
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2700
CPU #4 initialized
CPU5: stack_base 7ffbb000, stack_end 7ffbbff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 5.
After apic_write.
In relocation handler: cpu 5
New SMBASE=0x7fffec00 IEDBASE=0x80400000 @ 0003fc00
Writing SMRR. base = 0x80000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 5.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU: 0 has core 6
CPU6: stack_base 7ffba000, stack_end 7ffbaff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 6.
After apic_write.
In relocation handler: cpu 6
Startup point 1.
Waiting for send to finish...
+New SMBASE=0x7fffe800 IEDBASE=0x80400000 @ 0003fc00
Sending STARTUP #2 to 6.
After apic_write.
Writing SMRR. base = 0x80000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU: 0 has core 7
Initializing CPU #6
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
POST: 0x60
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [920000:bfffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 13240 size 6400
microcode: sig=0x306a9 pf=0x10 revision=0x0
microcode: updated to revision 0x1f date=2018-02-07
CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz.
CPU: platform id 4
CPU: cpuid(1) 0x306a9
CPU: AES supported
CPU: TXT supported
CPU: VT supported
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
Setting up local APIC... apic_id: 0x06 done.
VMX status: enabled, locked
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2700
CPU #6 initialized
CPU7: stack_base 7ffb9000, stack_end 7ffb9ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 7.
After apic_write.
In relocation handler: cpu 7
New SMBASE=0x7fffe400 IEDBASE=0x80400000 @ 0003fc00
Writing SMRR. base = 0x80000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 7.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU #0 initialized
Waiting for 2 CPUS to stop
Initializing CPU #5
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
POST: 0x60
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [920000:bfffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 13240 size 6400
microcode: sig=0x306a9 pf=0x10 revision=0x1f
CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz.
CPU: platform id 4
CPU: cpuid(1) 0x306a9
CPU: AES supported
CPU: TXT supported
CPU: VT supported
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
Setting up local APIC... apic_id: 0x05 done.
VMX status: enabled, locked
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2700
CPU #5 initialized
Waiting for 1 CPUS to stop
Initializing CPU #7
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
POST: 0x60
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [920000:bfffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 13240 size 6400
microcode: sig=0x306a9 pf=0x10 revision=0x1f
CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz.
CPU: platform id 4
CPU: cpuid(1) 0x306a9
CPU: AES supported
CPU: TXT supported
CPU: VT supported
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
Setting up local APIC... apic_id: 0x07 done.
VMX status: enabled, locked
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2700
CPU #7 initialized
All AP CPUs stopped (916 loops)
CPU0: stack: 7ffc0000 - 7ffc1000, lowest used address 7ffc0a80, stack used: 1408 bytes
CPU1: stack: 7ffbf000 - 7ffc0000, lowest used address 7ffbfc80, stack used: 896 bytes
CPU2: stack: 7ffbe000 - 7ffbf000, lowest used address 7ffbec80, stack used: 896 bytes
CPU3: stack: 7ffbd000 - 7ffbe000, lowest used address 7ffbdc80, stack used: 896 bytes
CPU4: stack: 7ffbc000 - 7ffbd000, lowest used address 7ffbcc80, stack used: 896 bytes
CPU5: stack: 7ffbb000 - 7ffbc000, lowest used address 7ffbbc80, stack used: 896 bytes
CPU6: stack: 7ffba000 - 7ffbb000, lowest used address 7ffbac80, stack used: 896 bytes
CPU7: stack: 7ffb9000 - 7ffba000, lowest used address 7ffb9c80, stack used: 896 bytes
CPU_CLUSTER: 0 init finished in 200885 usecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 00:00.0 init ...
Disabling PEG12.
Disabling PEG11.
Disabling PEG10.
Disabling Device 4.
Disabling PEG60.
Disabling Device 7.
Disabling PEG IO clock.
Set BIOS_RESET_CPL
CPU TDP: 45 Watts
PCI: 00:00.0 init finished in 1015 usecs
POST: 0x75
POST: 0x75
PCI: 00:02.0 init ...
GT Power Management Init
IVB GT2 35W Power Meter Weights
GT Power Management Init (post VBIOS)
Initializing VGA without OPROM.
PCI: 00:02.0 init finished in 82002 usecs
POST: 0x75
POST: 0x75
PCI: 00:14.0 init ...
XHCI: Setting up controller.. done.
PCI: 00:14.0 init finished in 6 usecs
POST: 0x75
PCI: 00:16.0 init ...
ME: BIOS path: Normal
ME: Extend SHA-256: 8c94cd28d87dc681a84d1609b718cb63f2bfd68e5ea89afeccc39e0a559269b2
ME: MBP item header 00020103
ME: MBP item header 00050102
ME: MBP item header 00020501
ME: MBP item header 00020201
ME: MBP item header 00020104
ME: unknown mbp item id 0x104! Skipping
ME: MBP item header 02030101
ME: MBP item header 02060301
ME: MBP item header 02090401
ME: mbp read OK after 1 cycles
PCI: 00:16.0 init finished in 45 usecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 00:19.0 init ...
PCI: 00:19.0 init finished in 0 usecs
POST: 0x75
PCI: 00:1a.0 init ...
EHCI: Setting up controller.. done.
PCI: 00:1a.0 init finished in 11 usecs
POST: 0x75
PCI: 00:1b.0 init ...
Azalia: base = e1230000
Azalia: codec_mask = 09
Azalia: Initializing codec #3
Azalia: codec viddid: 80862806
Azalia: verb_size: 16
Azalia: verb loaded.
Azalia: Initializing codec #0
Azalia: codec viddid: 10ec0269
Azalia: verb_size: 44
Azalia: verb loaded.
PCI: 00:1b.0 init finished in 4601 usecs
POST: 0x75
PCI: 00:1c.0 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.0 init finished in 8 usecs
POST: 0x75
PCI: 00:1c.1 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.1 init finished in 8 usecs
POST: 0x75
PCI: 00:1c.2 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.2 init finished in 10 usecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 00:1d.0 init ...
EHCI: Setting up controller.. done.
PCI: 00:1d.0 init finished in 12 usecs
POST: 0x75
POST: 0x75
PCI: 00:1f.0 init ...
pch: lpc_init
PCH: detected QM77, device id: 0x1e55, rev id 0x4
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
IOAPIC: Dumping registers
  reg 0x0000: 0x02000000
  reg 0x0001: 0x00170020
  reg 0x0002: 0x00170020
FMAP: area COREBOOT found @ 920000 (3014656 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 33ac0 size 79c
Set power off after power failure.
FMAP: area COREBOOT found @ 920000 (3014656 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 33ac0 size 79c
NMI sources enabled.
PantherPoint PM init
rtc_failed = 0x0
RTC Init
Enabling BIOS updates outside of SMM... Disabling ACPI via APMC:
done.
pch_spi_init
PCI: 00:1f.0 init finished in 916 usecs
POST: 0x75
PCI: 00:1f.2 init ...
SATA: Initializing...
FMAP: area COREBOOT found @ 920000 (3014656 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 33ac0 size 79c
SATA: Controller in AHCI mode.
ABAR: e1235000
PCI: 00:1f.2 init finished in 346 usecs
POST: 0x75
PCI: 00:1f.3 init ...
PCI: 00:1f.3 init finished in 7 usecs
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 01:00.0 init ...
PCI: 01:00.0 init finished in 13 usecs
POST: 0x75
PCI: 02:00.0 init ...
PCI: 02:00.0 init finished in 0 usecs
POST: 0x75
PCI: 03:00.0 init ...
PCI: 03:00.0 init finished in 0 usecs
POST: 0x75
PCI: 03:00.1 init ...
PCI: 03:00.1 init finished in 0 usecs
POST: 0x75
POST: 0x75
POST: 0x75
PNP: 00ff.2 init ...
PNP: 00ff.2 init finished in 0 usecs
POST: 0x75
POST: 0x75
POST: 0x75
smbus: PCI: 00:1f.3[0]->I2C: 01:54 init ...
I2C: 01:54 init finished in 1 usecs
POST: 0x75
smbus: PCI: 00:1f.3[0]->I2C: 01:55 init ...
I2C: 01:55 init finished in 1 usecs
POST: 0x75
smbus: PCI: 00:1f.3[0]->I2C: 01:56 init ...
I2C: 01:56 init finished in 0 usecs
POST: 0x75
smbus: PCI: 00:1f.3[0]->I2C: 01:57 init ...
I2C: 01:57 init finished in 0 usecs
POST: 0x75
smbus: PCI: 00:1f.3[0]->I2C: 01:5c init ...
Locking EEPROM RFID
init EEPROM done
I2C: 01:5c init finished in 26223 usecs
POST: 0x75
smbus: PCI: 00:1f.3[0]->I2C: 01:5d init ...
I2C: 01:5d init finished in 0 usecs
POST: 0x75
smbus: PCI: 00:1f.3[0]->I2C: 01:5e init ...
I2C: 01:5e init finished in 0 usecs
POST: 0x75
smbus: PCI: 00:1f.3[0]->I2C: 01:5f init ...
I2C: 01:5f init finished in 0 usecs
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
DOMAIN: 0000: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
PCI: 00:14.0: enabled 1
PCI: 00:16.0: enabled 1
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:19.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 1
PCI: 00:1c.2: enabled 1
PCI: 00:1c.3: enabled 0
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 0
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 0
PCI: 00:02.0: enabled 1
PCI: 00:04.0: enabled 0
PCI: 01:00.0: enabled 1
PNP: 00ff.1: enabled 1
PNP: 00ff.2: enabled 1
PNP: 00ff.f: enabled 0
PNP: 0c31.0: enabled 1
I2C: 01:54: enabled 1
I2C: 01:55: enabled 1
I2C: 01:56: enabled 1
I2C: 01:57: enabled 1
I2C: 01:5c: enabled 1
I2C: 01:5d: enabled 1
I2C: 01:5e: enabled 1
I2C: 01:5f: enabled 1
PCI: 02:00.0: enabled 1
PCI: 03:00.0: enabled 1
PCI: 03:00.1: enabled 1
NONE: enabled 1
APIC: 01: enabled 1
APIC: 02: enabled 1
APIC: 03: enabled 1
APIC: 04: enabled 1
APIC: 05: enabled 1
APIC: 06: enabled 1
APIC: 07: enabled 1
BS: BS_DEV_INIT times (us): entry 64806 run 316291 exit 0
POST: 0x76
Finalize devices...
PCI: 00:1f.0 final
Devices finalized
BS: BS_POST_DEVICE times (us): entry 0 run 10719 exit 0
POST: 0x77
BS: BS_OS_RESUME_CHECK times (us): entry 1 run 2 exit 0
POST: 0x79
POST: 0x9c
CBFS: 'Master Header Locator' located CBFS at [920000:bfffc0)
CBFS: Locating 'fallback/dsdt.aml'
CBFS: Found @ offset 48600 size 3865
CBFS: 'Master Header Locator' located CBFS at [920000:bfffc0)
CBFS: Locating 'fallback/slic'
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at 7ff48000.
ACPI:    * FACS
ACPI:    * DSDT
ACPI:    * FADT
ACPI: added table 1/32, length now 40
ACPI:     * SSDT
Generating ACPI PIRQ entries
ACPI_PIRQ_GEN: PCI: 00:02.0: pin=0 pirq=0
ACPI_PIRQ_GEN: PCI: 00:14.0: pin=0 pirq=0
ACPI_PIRQ_GEN: PCI: 00:1a.0: pin=0 pirq=5
ACPI_PIRQ_GEN: PCI: 00:1b.0: pin=0 pirq=0
ACPI_PIRQ_GEN: PCI: 00:1c.0: pin=0 pirq=1
ACPI_PIRQ_GEN: PCI: 00:1c.1: pin=1 pirq=5
ACPI_PIRQ_GEN: PCI: 00:1c.2: pin=2 pirq=3
ACPI_PIRQ_GEN: PCI: 00:1d.0: pin=0 pirq=3
ACPI_PIRQ_GEN: PCI: 00:1f.2: pin=0 pirq=1
ACPI_PIRQ_GEN: PCI: 00:1f.3: pin=1 pirq=7
Found 1 CPU(s) with 8 core(s) each.
PSS: 2701MHz power 45000 control 0x2500 status 0x2500
PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00
PSS: 2400MHz power 38601 control 0x1800 status 0x1800
PSS: 2200MHz power 34542 control 0x1600 status 0x1600
PSS: 2000MHz power 30669 control 0x1400 status 0x1400
PSS: 1800MHz power 26973 control 0x1200 status 0x1200
PSS: 1600MHz power 23389 control 0x1000 status 0x1000
PSS: 1400MHz power 19976 control 0xe00 status 0xe00
PSS: 1200MHz power 16703 control 0xc00 status 0xc00
PSS: 2701MHz power 45000 control 0x2500 status 0x2500
PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00
PSS: 2400MHz power 38601 control 0x1800 status 0x1800
PSS: 2200MHz power 34542 control 0x1600 status 0x1600
PSS: 2000MHz power 30669 control 0x1400 status 0x1400
PSS: 1800MHz power 26973 control 0x1200 status 0x1200
PSS: 1600MHz power 23389 control 0x1000 status 0x1000
PSS: 1400MHz power 19976 control 0xe00 status 0xe00
PSS: 1200MHz power 16703 control 0xc00 status 0xc00
PSS: 2701MHz power 45000 control 0x2500 status 0x2500
PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00
PSS: 2400MHz power 38601 control 0x1800 status 0x1800
PSS: 2200MHz power 34542 control 0x1600 status 0x1600
PSS: 2000MHz power 30669 control 0x1400 status 0x1400
PSS: 1800MHz power 26973 control 0x1200 status 0x1200
PSS: 1600MHz power 23389 control 0x1000 status 0x1000
PSS: 1400MHz power 19976 control 0xe00 status 0xe00
PSS: 1200MHz power 16703 control 0xc00 status 0xc00
PSS: 2701MHz power 45000 control 0x2500 status 0x2500
PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00
PSS: 2400MHz power 38601 control 0x1800 status 0x1800
PSS: 2200MHz power 34542 control 0x1600 status 0x1600
PSS: 2000MHz power 30669 control 0x1400 status 0x1400
PSS: 1800MHz power 26973 control 0x1200 status 0x1200
PSS: 1600MHz power 23389 control 0x1000 status 0x1000
PSS: 1400MHz power 19976 control 0xe00 status 0xe00
PSS: 1200MHz power 16703 control 0xc00 status 0xc00
PSS: 2701MHz power 45000 control 0x2500 status 0x2500
PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00
PSS: 2400MHz power 38601 control 0x1800 status 0x1800
PSS: 2200MHz power 34542 control 0x1600 status 0x1600
PSS: 2000MHz power 30669 control 0x1400 status 0x1400
PSS: 1800MHz power 26973 control 0x1200 status 0x1200
PSS: 1600MHz power 23389 control 0x1000 status 0x1000
PSS: 1400MHz power 19976 control 0xe00 status 0xe00
PSS: 1200MHz power 16703 control 0xc00 status 0xc00
PSS: 2701MHz power 45000 control 0x2500 status 0x2500
PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00
PSS: 2400MHz power 38601 control 0x1800 status 0x1800
PSS: 2200MHz power 34542 control 0x1600 status 0x1600
PSS: 2000MHz power 30669 control 0x1400 status 0x1400
PSS: 1800MHz power 26973 control 0x1200 status 0x1200
PSS: 1600MHz power 23389 control 0x1000 status 0x1000
PSS: 1400MHz power 19976 control 0xe00 status 0xe00
PSS: 1200MHz power 16703 control 0xc00 status 0xc00
PSS: 2701MHz power 45000 control 0x2500 status 0x2500
PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00
PSS: 2400MHz power 38601 control 0x1800 status 0x1800
PSS: 2200MHz power 34542 control 0x1600 status 0x1600
PSS: 2000MHz power 30669 control 0x1400 status 0x1400
PSS: 1800MHz power 26973 control 0x1200 status 0x1200
PSS: 1600MHz power 23389 control 0x1000 status 0x1000
PSS: 1400MHz power 19976 control 0xe00 status 0xe00
PSS: 1200MHz power 16703 control 0xc00 status 0xc00
PSS: 2701MHz power 45000 control 0x2500 status 0x2500
PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00
PSS: 2400MHz power 38601 control 0x1800 status 0x1800
PSS: 2200MHz power 34542 control 0x1600 status 0x1600
PSS: 2000MHz power 30669 control 0x1400 status 0x1400
PSS: 1800MHz power 26973 control 0x1200 status 0x1200
PSS: 1600MHz power 23389 control 0x1000 status 0x1000
PSS: 1400MHz power 19976 control 0xe00 status 0xe00
PSS: 1200MHz power 16703 control 0xc00 status 0xc00
ACPI:    * H8
H8: BDC installed
H8: WWAN not installed
\_SB.PCI0.LPCB.TPM: LPC TPM PNP: 0c31.0
\_SB.PCI0.RP02.WIFI:  PCI: 02:00.0
CBFS: 'Master Header Locator' located CBFS at [920000:bfffc0)
CBFS: Locating 'pci1002,67df.rom'
CBFS: 'pci1002,67df.rom' not found.
PCI Option ROM loading disabled for PCI: 03:00.0
PCI: 03:00.0: Missing PCI Option ROM
ACPI: added table 2/32, length now 44
ACPI:    * MCFG
ACPI: added table 3/32, length now 48
ACPI:    * TCPA
TCPA log created at 7ff37000
ACPI: added table 4/32, length now 52
ACPI:    * MADT
ACPI: added table 5/32, length now 56
current = 7ff4ecb0
ACPI:     * DMAR
ACPI: added table 6/32, length now 60
current = 7ff4ed60
ACPI:    * HPET
ACPI: added table 7/32, length now 64
CBFS: 'Master Header Locator' located CBFS at [920000:bfffc0)
CBFS: Locating 'vbt.bin'
CBFS: Found @ offset 33500 size 581
Found a VBT of 4459 bytes after decompression
GMA: Found VBT in CBFS
GMA: Found valid VBT in CBFS
CBFS: 'Master Header Locator' located CBFS at [920000:bfffc0)
CBFS: Locating 'pci1002,67df.rom'
CBFS: 'pci1002,67df.rom' not found.
PCI Option ROM loading disabled for PCI: 03:00.0
ACPI: done.
ACPI tables: 36256 bytes.
smbios_write_tables: 7ff36000
recv_ec_data: 0x47
recv_ec_data: 0x31
recv_ec_data: 0x48
recv_ec_data: 0x54
recv_ec_data: 0x33
recv_ec_data: 0x32
recv_ec_data: 0x57
recv_ec_data: 0x57
recv_ec_data: 0x16
recv_ec_data: 0x03
Create SMBIOS type 17
PCI: 02:00.0 (unknown)
SMBIOS tables: 655 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum bfe7
Writing coreboot table at 0x7ff6c000
CBFS: 'Master Header Locator' located CBFS at [920000:bfffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 33ac0 size 79c
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000a0000-00000000000fffff: RESERVED
 3. 0000000000100000-000000007ff35fff: RAM
 4. 000000007ff36000-000000007ff84fff: CONFIGURATION TABLES
 5. 000000007ff85000-000000007ffccfff: RAMSTAGE
 6. 000000007ffcd000-000000007fffffff: CONFIGURATION TABLES
 7. 0000000080000000-00000000829fffff: RESERVED
 8. 00000000f0000000-00000000f3ffffff: RESERVED
 9. 00000000fed40000-00000000fed44fff: RESERVED
10. 00000000fed90000-00000000fed91fff: RESERVED
11. 0000000100000000-000000027b5fffff: RAM
CBFS: 'Master Header Locator' located CBFS at [920000:bfffc0)
Wrote coreboot table at: 7ff6c000, 0xb30 bytes, checksum 2958
coreboot table: 2888 bytes.
IMD ROOT    0. 7ffff000 00001000
IMD SMALL   1. 7fffe000 00001000
CONSOLE     2. 7ffde000 00020000
TIME STAMP  3. 7ffdd000 00000910
MRC DATA    4. 7ffdc000 000005d4
ROMSTG STCK 5. 7ffd7000 00005000
AFTER CAR   6. 7ffcd000 0000a000
RAMSTAGE    7. 7ff84000 00049000
SMM BACKUP  8. 7ff74000 00010000
COREBOOT    9. 7ff6c000 00008000
ACPI       10. 7ff48000 00024000
ACPI GNVS  11. 7ff47000 00001000
TCPA TCGLOG12. 7ff37000 00010000
SMBIOS     13. 7ff36000 00000800
IMD small region:
  IMD ROOT    0. 7fffec00 00000400
  MEM INFO    1. 7fffeaa0 00000149
  ROMSTAGE    2. 7fffea80 00000004
  COREBOOTFWD 3. 7fffea40 00000028
BS: BS_WRITE_TABLES times (us): entry 0 run 26978 exit 0
POST: 0x7a
CBFS: 'Master Header Locator' located CBFS at [920000:bfffc0)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 67c00 size 1077e
Loading segment from ROM address 0xffd87c38
  code (compression=1)
  New segment dstaddr 0xe0a60 memsize 0x1f5a0 srcaddr 0xffd87c70 filesize 0x10746
Loading segment from ROM address 0xffd87c54
  Entry Point 0x000fec22
Payload being loaded at below 1MiB without region being marked as RAM usable.
Loading Segment: addr: 0x00000000000e0a60 memsz: 0x000000000001f5a0 filesz: 0x0000000000010746
lb: [0x000000007ff85000, 0x000000007ffccbd8)
Post relocation: addr: 0x00000000000e0a60 memsz: 0x000000000001f5a0 filesz: 0x0000000000010746
using LZMA
[ 0x000e0a60, 00100000, 0x00100000) <- ffd87c70
dest 000e0a60, end 00100000, bouncebuffer ffffffff
Loaded segments
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 27570 exit 0
POST: 0x7b
PCH: watchdog disabled
Jumping to boot code at 000fec22(7ff6c000)
POST: 0xf8
CPU0: stack: 7ffc0000 - 7ffc1000, lowest used address 7ffc0958, stack used: 1704 bytes
SeaBIOS (version rel-1.11.2-0-gf9626cc)
BUILD: gcc: (coreboot toolchain v1.50 October 15th, 2017) 6.3.0 binutils: (GNU Binutils) 2.29.1
Found coreboot cbmem console @ 7ffde000
Found mainboard LENOVO ThinkPad T430
Relocating init from 0x000e20c0 to 0x7fee92e0 (size 52352)
Found CBFS header at 0xffd20038
multiboot: eax=7ffb8680, ebx=7ffb8634
Found 17 PCI devices (max PCI bus is 03)
Copying SMBIOS entry point from 0x7ff36000 to 0x000f66e0
Copying ACPI RSDP from 0x7ff48000 to 0x000f66b0
Using pmtimer, ioport 0x508
Scan for VGA option rom
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version rel-1.11.2-0-gf9626cc)
Machine UUID 5bf15e81-52be-11cb-aaba-9be2c2d005a0
XHCI init on dev 00:14.0: regs @ 0xe1220000, 8 ports, 32 slots, 32 byte contexts
XHCI    protocol USB  2.00, 4 ports (offset 1), def 3001
XHCI    protocol USB  3.00, 4 ports (offset 5), def 1000
XHCI    extcap 0xc1 @ 0xe1228040
XHCI    extcap 0xc0 @ 0xe1228070
XHCI    extcap 0x1 @ 0xe1228330
EHCI init on dev 00:1a.0 (regs=0xe1236020)
EHCI init on dev 00:1d.0 (regs=0xe1237020)
AHCI controller at 00:1f.2, iobase 0xe1235000, irq 10
Searching bootorder for: /pci@i0cf8/pci-bridge@1c/*@0
Discarding ps2 data aa (status=11)
Found 0 lpt ports
Found 0 serial ports
Searching bootorder for: /rom@img/memtest
Searching bootorder for: /rom@img/tint
Searching bootorder for: /rom@img/nvramcui
Searching bootorder for: /rom@img/coreinfo
Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0
AHCI/0: Set transfer mode to UDMA-6
AHCI/0: registering: "AHCI/0: Samsung SSD 840 EVO 120GB ATA-9 Hard-Disk (111 GiBytes)"
XHCI no devices found
USB keyboard initialized
USB mouse initialized
PS2 keyboard initialized
Initialized USB HUB (0 ports used)
Initialized USB HUB (2 ports used)
Initialized USB HUB (1 ports used)
Searching bootorder for: /pci@i0cf8/*@1f,2/drive@1/disk@0
AHCI/1: Set transfer mode to UDMA-6
AHCI/1: registering: "AHCI/1: HGST HTS541010A9E680 ATA-8 Hard-Disk (931 GiBytes)"
WARNING - Timeout at ehci_wait_td:516!
ehci pipe=0x7fee2500 cur=7fedbdc0 tok=80080d80 next=7fedbe00 td=0x7fedbdc0 status=80080d80
Initialized USB HUB (0 ports used)
All threads complete.
Scan for option roms

Press ESC for boot menu.

Searching bootorder for: HALT
drive 0x000f6640: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=234441648
drive 0x000f65f0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=1953525168
Space available for UMB: d0000-e9800, f5f00-f65f0
Returned 180224 bytes of ZoneHigh
e820 map has 9 items:
  0: 0000000000000000 - 000000000009fc00 = 1 RAM
  1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
  2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
  3: 0000000000100000 - 000000007ff22000 = 1 RAM
  4: 000000007ff22000 - 0000000082a00000 = 2 RESERVED
  5: 00000000f0000000 - 00000000f4000000 = 2 RESERVED
  6: 00000000fed40000 - 00000000fed45000 = 2 RESERVED
  7: 00000000fed90000 - 00000000fed92000 = 2 RESERVED
  8: 0000000100000000 - 000000027b600000 = 1 RAM
enter handle_19:
  NULL
Booting from Hard Disk...
Booting from 0000:7c00