| Paul Menzel | 2628571 | 2017-04-17 10:57:51 +0200 | [diff] [blame] | 1 | coreboot.rom: 1024 kB, bootblocksize 2936, romsize 1048576, offset 0x0 |
| 2 | alignment: 64 bytes, architecture: x86 |
| 3 | |
| 4 | Name Offset Type Size |
| 5 | cmos_layout.bin 0x0 cmos_layout 2704 |
| 6 | cmos.default 0xac0 cmos_default 256 |
| 7 | cpu_microcode_blob.bin 0xc00 microcode 14336 |
| 8 | fallback/romstage 0x4480 stage 81848 |
| 9 | fallback/ramstage 0x18480 stage 62481 |
| 10 | fallback/payload 0x27900 payload 55654 |
| 11 | vgaroms/seavgabios.bin 0x352c0 raw 28672 |
| 12 | config 0x3c300 raw 4902 |
| 13 | revision 0x3d680 raw 576 |
| 14 | (empty) 0x3d900 null 728 |
| 15 | pci14e4,1659.rom 0x3dc00 raw 69120 |
| 16 | bootsplash.jpg 0x4ea40 raw 28931 |
| 17 | etc/pci-optionrom-exec 0x55b80 raw 1 |
| 18 | normal/romstage 0x55bc0 stage 79912 |
| 19 | normal/ramstage 0x69440 stage 64165 |
| 20 | normal/payload 0x78f40 payload 55178 |
| 21 | (empty) 0x86700 null 494872 |