Michael Büchler | 3969f5f | 2021-08-08 11:43:02 +0200 | [diff] [blame] | 1 | # |
| 2 | # Automatically generated file; DO NOT EDIT. |
| 3 | # coreboot configuration |
| 4 | # |
| 5 | |
| 6 | # |
| 7 | # General setup |
| 8 | # |
| 9 | CONFIG_COREBOOT_BUILD=y |
| 10 | CONFIG_LOCALVERSION="" |
| 11 | CONFIG_CBFS_PREFIX="fallback" |
| 12 | CONFIG_COMPILER_GCC=y |
| 13 | # CONFIG_COMPILER_LLVM_CLANG is not set |
| 14 | # CONFIG_ANY_TOOLCHAIN is not set |
| 15 | # CONFIG_CCACHE is not set |
| 16 | # CONFIG_FMD_GENPARSER is not set |
| 17 | # CONFIG_UTIL_GENPARSER is not set |
| 18 | # CONFIG_OPTION_BACKEND_NONE is not set |
| 19 | CONFIG_USE_OPTION_TABLE=y |
| 20 | # CONFIG_STATIC_OPTION_TABLE is not set |
| 21 | CONFIG_COMPRESS_RAMSTAGE=y |
| 22 | CONFIG_INCLUDE_CONFIG_FILE=y |
| 23 | CONFIG_COLLECT_TIMESTAMPS=y |
| 24 | # CONFIG_TIMESTAMPS_ON_CONSOLE is not set |
| 25 | CONFIG_USE_BLOBS=y |
| 26 | # CONFIG_USE_AMD_BLOBS is not set |
| 27 | # CONFIG_USE_QC_BLOBS is not set |
| 28 | # CONFIG_COVERAGE is not set |
| 29 | # CONFIG_UBSAN is not set |
| 30 | CONFIG_HAVE_ASAN_IN_RAMSTAGE=y |
| 31 | # CONFIG_ASAN is not set |
| 32 | # CONFIG_NO_STAGE_CACHE is not set |
| 33 | CONFIG_TSEG_STAGE_CACHE=y |
| 34 | # CONFIG_UPDATE_IMAGE is not set |
| 35 | # CONFIG_BOOTSPLASH_IMAGE is not set |
| 36 | # CONFIG_FW_CONFIG is not set |
| 37 | # end of General setup |
| 38 | |
| 39 | # |
| 40 | # Mainboard |
| 41 | # |
| 42 | |
| 43 | # |
| 44 | # Important: Run 'make distclean' before switching boards |
| 45 | # |
| 46 | # CONFIG_VENDOR_51NB is not set |
| 47 | CONFIG_VENDOR_ACER=y |
| 48 | # CONFIG_VENDOR_ADLINK is not set |
| 49 | # CONFIG_VENDOR_AMD is not set |
| 50 | # CONFIG_VENDOR_AOPEN is not set |
| 51 | # CONFIG_VENDOR_APPLE is not set |
| 52 | # CONFIG_VENDOR_ASROCK is not set |
| 53 | # CONFIG_VENDOR_ASUS is not set |
| 54 | # CONFIG_VENDOR_BAP is not set |
| 55 | # CONFIG_VENDOR_BIOSTAR is not set |
| 56 | # CONFIG_VENDOR_BOSTENTECH is not set |
| 57 | # CONFIG_VENDOR_CAVIUM is not set |
| 58 | # CONFIG_VENDOR_CLEVO is not set |
| 59 | # CONFIG_VENDOR_COMPULAB is not set |
| 60 | # CONFIG_VENDOR_DELL is not set |
| 61 | # CONFIG_VENDOR_ELMEX is not set |
| 62 | # CONFIG_VENDOR_EMULATION is not set |
| 63 | # CONFIG_VENDOR_EXAMPLE is not set |
| 64 | # CONFIG_VENDOR_FACEBOOK is not set |
| 65 | # CONFIG_VENDOR_FOXCONN is not set |
| 66 | # CONFIG_VENDOR_GETAC is not set |
| 67 | # CONFIG_VENDOR_GIGABYTE is not set |
| 68 | # CONFIG_VENDOR_GIZMOSPHERE is not set |
| 69 | # CONFIG_VENDOR_GOOGLE is not set |
| 70 | # CONFIG_VENDOR_HP is not set |
| 71 | # CONFIG_VENDOR_IBASE is not set |
| 72 | # CONFIG_VENDOR_INTEL is not set |
| 73 | # CONFIG_VENDOR_JETWAY is not set |
| 74 | # CONFIG_VENDOR_KONTRON is not set |
| 75 | # CONFIG_VENDOR_LENOVO is not set |
| 76 | # CONFIG_VENDOR_LIBRETREND is not set |
| 77 | # CONFIG_VENDOR_LIPPERT is not set |
| 78 | # CONFIG_VENDOR_MSI is not set |
| 79 | # CONFIG_VENDOR_OCP is not set |
| 80 | # CONFIG_VENDOR_OPENCELLULAR is not set |
| 81 | # CONFIG_VENDOR_PACKARDBELL is not set |
| 82 | # CONFIG_VENDOR_PCENGINES is not set |
| 83 | # CONFIG_VENDOR_PINE64 is not set |
| 84 | # CONFIG_VENDOR_PORTWELL is not set |
| 85 | # CONFIG_VENDOR_PRODRIVE is not set |
| 86 | # CONFIG_VENDOR_PROTECTLI is not set |
| 87 | # CONFIG_VENDOR_PURISM is not set |
| 88 | # CONFIG_VENDOR_RAZER is not set |
| 89 | # CONFIG_VENDOR_RODA is not set |
| 90 | # CONFIG_VENDOR_SAMSUNG is not set |
| 91 | # CONFIG_VENDOR_SAPPHIRE is not set |
| 92 | # CONFIG_VENDOR_SCALEWAY is not set |
| 93 | # CONFIG_VENDOR_SIEMENS is not set |
| 94 | # CONFIG_VENDOR_SIFIVE is not set |
| 95 | # CONFIG_VENDOR_SUPERMICRO is not set |
| 96 | # CONFIG_VENDOR_SYSTEM76 is not set |
| 97 | # CONFIG_VENDOR_TI is not set |
| 98 | # CONFIG_VENDOR_UP is not set |
| 99 | CONFIG_BOARD_SPECIFIC_OPTIONS=y |
| 100 | CONFIG_MAINBOARD_PART_NUMBER="G43T-AM3" |
| 101 | CONFIG_MAINBOARD_VERSION="1.0" |
| 102 | CONFIG_MAINBOARD_DIR="acer/g43t-am3" |
| 103 | CONFIG_VGA_BIOS_ID="8086,2e22" |
| 104 | CONFIG_DIMM_MAX=4 |
| 105 | CONFIG_DIMM_SPD_SIZE=256 |
| 106 | CONFIG_FMDFILE="" |
| 107 | # CONFIG_NO_POST is not set |
| 108 | CONFIG_MAINBOARD_VENDOR="Acer" |
| 109 | CONFIG_BOARD_ACER_G43T_AM3=y |
| 110 | CONFIG_CBFS_SIZE=0x100000 |
| 111 | # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set |
| 112 | CONFIG_MAX_CPUS=4 |
| 113 | # CONFIG_VBOOT is not set |
| 114 | CONFIG_DEVICETREE="devicetree.cb" |
| 115 | # CONFIG_VGA_BIOS is not set |
| 116 | CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Acer" |
| 117 | CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" |
| 118 | CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 |
| 119 | CONFIG_POST_IO=y |
| 120 | CONFIG_OVERRIDE_DEVICETREE="" |
| 121 | CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" |
| 122 | CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" |
| 123 | CONFIG_PAYLOAD_CONFIGFILE="" |
| 124 | CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 |
| 125 | CONFIG_UART_FOR_CONSOLE=0 |
| 126 | # CONFIG_CONSOLE_POST is not set |
| 127 | CONFIG_POST_DEVICE=y |
| 128 | CONFIG_SEABIOS_PS2_TIMEOUT=500 |
| 129 | CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" |
| 130 | CONFIG_DCACHE_RAM_BASE=0xfeff8000 |
| 131 | CONFIG_DCACHE_RAM_SIZE=0x8000 |
| 132 | CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 |
| 133 | CONFIG_DCACHE_BSP_STACK_SIZE=0x2000 |
| 134 | CONFIG_MMCONF_BASE_ADDRESS=0xe0000000 |
| 135 | CONFIG_MMCONF_BUS_NUMBER=256 |
| 136 | CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 |
| 137 | CONFIG_HAVE_INTEL_FIRMWARE=y |
| 138 | CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 |
| 139 | CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y |
| 140 | CONFIG_SPI_FLASH_WINBOND=y |
| 141 | CONFIG_DRIVERS_INTEL_WIFI=y |
| 142 | CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 |
| 143 | CONFIG_CONSOLE_SERIAL=y |
| 144 | CONFIG_SEABIOS_HARDWARE_IRQ=y |
| 145 | CONFIG_PCIEXP_HOTPLUG=y |
| 146 | CONFIG_PCIEXP_HOTPLUG_BUSES=32 |
| 147 | CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 |
| 148 | CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 |
| 149 | CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="G43T-AM3" |
| 150 | # CONFIG_HAVE_IFD_BIN is not set |
| 151 | CONFIG_PS2K_EISAID="PNP0303" |
| 152 | CONFIG_PS2M_EISAID="PNP0F13" |
| 153 | CONFIG_GFX_GMA_PANEL_1_PORT="eDP" |
| 154 | # CONFIG_PCIEXP_L1_SUB_STATE is not set |
| 155 | CONFIG_PCIEXP_CLK_PM=y |
| 156 | CONFIG_DRIVERS_UART_8250IO=y |
| 157 | CONFIG_HEAP_SIZE=0x4000 |
| 158 | CONFIG_BOARD_ROMSIZE_KB_2048=y |
| 159 | # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set |
| 160 | # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set |
| 161 | # CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set |
| 162 | CONFIG_COREBOOT_ROMSIZE_KB_2048=y |
| 163 | # CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set |
| 164 | # CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set |
| 165 | # CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set |
| 166 | # CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set |
| 167 | # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set |
| 168 | # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set |
| 169 | # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set |
| 170 | # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set |
| 171 | # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set |
| 172 | CONFIG_COREBOOT_ROMSIZE_KB=2048 |
| 173 | CONFIG_ROM_SIZE=0x00200000 |
| 174 | CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y |
| 175 | CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y |
| 176 | CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y |
| 177 | # CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set |
| 178 | # CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set |
| 179 | CONFIG_MAINBOARD_POWER_FAILURE_STATE=0 |
| 180 | # end of Mainboard |
| 181 | |
| 182 | # |
| 183 | # Chipset |
| 184 | # |
| 185 | |
| 186 | # |
| 187 | # SoC |
| 188 | # |
| 189 | CONFIG_ARCH_ALL_STAGES_X86=y |
| 190 | CONFIG_CHIPSET_DEVICETREE="" |
| 191 | CONFIG_CBFS_MCACHE_SIZE=0x4000 |
| 192 | CONFIG_ROMSTAGE_ADDR=0x2000000 |
| 193 | CONFIG_VERSTAGE_ADDR=0x2000000 |
| 194 | CONFIG_RAMBASE=0xe00000 |
| 195 | CONFIG_CPU_ADDR_BITS=36 |
| 196 | CONFIG_SMM_RESERVED_SIZE=0x100000 |
| 197 | CONFIG_SMM_MODULE_STACK_SIZE=0x400 |
| 198 | CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d" |
| 199 | CONFIG_EHCI_BAR=0xfef00000 |
| 200 | CONFIG_STACK_SIZE=0x1000 |
| 201 | CONFIG_VBT_DATA_SIZE_KB=8 |
| 202 | CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254 |
| 203 | CONFIG_INTEL_GMA_BCLV_WIDTH=16 |
| 204 | CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 |
| 205 | CONFIG_INTEL_GMA_BCLM_WIDTH=16 |
| 206 | CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000 |
| 207 | CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 |
| 208 | CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 |
| 209 | CONFIG_PCIEXP_ASPM=y |
| 210 | # CONFIG_PCIEXP_COMMON_CLOCK is not set |
| 211 | CONFIG_TTYS0_BASE=0x3f8 |
| 212 | CONFIG_TTYS0_LCS=3 |
| 213 | CONFIG_UART_PCI_ADDR=0x0 |
| 214 | CONFIG_AZALIA_MAX_CODECS=3 |
| 215 | |
| 216 | # |
| 217 | # CPU |
| 218 | # |
| 219 | CONFIG_CPU_INTEL_MODEL_6FX=y |
| 220 | CONFIG_CPU_INTEL_MODEL_1067X=y |
| 221 | CONFIG_CPU_INTEL_MODEL_F3X=y |
| 222 | CONFIG_CPU_INTEL_MODEL_F4X=y |
| 223 | CONFIG_SOCKET_SPECIFIC_OPTIONS=y |
| 224 | CONFIG_SSE2=y |
| 225 | CONFIG_CPU_INTEL_SOCKET_LGA775=y |
| 226 | CONFIG_CPU_INTEL_COMMON=y |
| 227 | CONFIG_ENABLE_VMX=y |
| 228 | CONFIG_SET_IA32_FC_LOCK_BIT=y |
| 229 | CONFIG_SET_MSR_AESNI_LOCK_BIT=y |
| 230 | CONFIG_CPU_INTEL_COMMON_TIMEBASE=y |
| 231 | CONFIG_CPU_INTEL_COMMON_SMM=y |
| 232 | CONFIG_MICROCODE_UPDATE_PRE_RAM=y |
| 233 | CONFIG_PARALLEL_MP=y |
| 234 | CONFIG_XAPIC_ONLY=y |
| 235 | # CONFIG_X2APIC_ONLY is not set |
| 236 | # CONFIG_X2APIC_RUNTIME is not set |
| 237 | CONFIG_UDELAY_TSC=y |
| 238 | CONFIG_TSC_MONOTONIC_TIMER=y |
| 239 | CONFIG_TSC_SYNC_MFENCE=y |
| 240 | CONFIG_SETUP_XIP_CACHE=y |
| 241 | CONFIG_LOGICAL_CPUS=y |
| 242 | CONFIG_HAVE_SMI_HANDLER=y |
| 243 | CONFIG_SMM_TSEG=y |
| 244 | CONFIG_SMM_MODULE_HEAP_SIZE=0x4000 |
| 245 | CONFIG_SMM_STUB_STACK_SIZE=0x400 |
| 246 | CONFIG_SMP=y |
| 247 | CONFIG_MMX=y |
| 248 | CONFIG_SSE=y |
| 249 | CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y |
| 250 | CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y |
| 251 | CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y |
| 252 | # CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set |
| 253 | # CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set |
| 254 | # CONFIG_CPU_MICROCODE_CBFS_NONE is not set |
| 255 | |
| 256 | # |
| 257 | # Northbridge |
| 258 | # |
| 259 | CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y |
| 260 | CONFIG_NORTHBRIDGE_INTEL_X4X=y |
| 261 | |
| 262 | # |
| 263 | # Southbridge |
| 264 | # |
| 265 | CONFIG_HPET_MIN_TICKS=0x80 |
| 266 | CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y |
| 267 | CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y |
| 268 | CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y |
| 269 | CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y |
| 270 | CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y |
| 271 | CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y |
| 272 | CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y |
| 273 | CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y |
| 274 | CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y |
| 275 | CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y |
| 276 | CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y |
| 277 | CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y |
| 278 | CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y |
| 279 | CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y |
| 280 | CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y |
| 281 | # CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set |
| 282 | CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y |
| 283 | CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 |
| 284 | CONFIG_RCBA_LENGTH=0x4000 |
| 285 | CONFIG_FIXED_SMBUS_IO_BASE=0x400 |
| 286 | |
| 287 | # |
| 288 | # Super I/O |
| 289 | # |
| 290 | CONFIG_SUPERIO_ITE_COMMON_PRE_RAM=y |
| 291 | CONFIG_SUPERIO_ITE_ENV_CTRL=y |
| 292 | CONFIG_SUPERIO_ITE_ENV_CTRL_FAN16_CONFIG=y |
| 293 | CONFIG_SUPERIO_ITE_ENV_CTRL_PWM_FREQ2=y |
| 294 | CONFIG_SUPERIO_ITE_IT8720F=y |
| 295 | |
| 296 | # |
| 297 | # Embedded Controllers |
| 298 | # |
| 299 | |
| 300 | # |
| 301 | # Intel Firmware |
| 302 | # |
| 303 | CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y |
| 304 | CONFIG_ARCH_X86=y |
| 305 | CONFIG_ARCH_BOOTBLOCK_X86_32=y |
| 306 | CONFIG_ARCH_VERSTAGE_X86_32=y |
| 307 | CONFIG_ARCH_ROMSTAGE_X86_32=y |
| 308 | CONFIG_ARCH_POSTCAR_X86_32=y |
| 309 | CONFIG_ARCH_RAMSTAGE_X86_32=y |
| 310 | CONFIG_ARCH_ALL_STAGES_X86_32=y |
| 311 | CONFIG_HAVE_EXP_X86_64_SUPPORT=y |
| 312 | # CONFIG_USE_EXP_X86_64_SUPPORT is not set |
| 313 | CONFIG_AP_IN_SIPI_WAIT=y |
| 314 | CONFIG_SIPI_VECTOR_IN_ROM=y |
| 315 | CONFIG_RAMTOP=0x1000000 |
| 316 | CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y |
| 317 | CONFIG_NUM_IPI_STARTS=2 |
| 318 | CONFIG_PC80_SYSTEM=y |
| 319 | CONFIG_HAVE_CMOS_DEFAULT=y |
| 320 | CONFIG_HPET_ADDRESS=0xfed00000 |
| 321 | CONFIG_POSTCAR_STAGE=y |
| 322 | CONFIG_BOOTBLOCK_SIMPLE=y |
| 323 | # CONFIG_BOOTBLOCK_NORMAL is not set |
| 324 | CONFIG_COLLECT_TIMESTAMPS_TSC=y |
| 325 | CONFIG_HAVE_CF9_RESET=y |
| 326 | # end of Chipset |
| 327 | |
| 328 | # |
| 329 | # Devices |
| 330 | # |
| 331 | CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y |
| 332 | CONFIG_HAVE_LINEAR_FRAMEBUFFER=y |
| 333 | CONFIG_MAINBOARD_HAS_LIBGFXINIT=y |
| 334 | CONFIG_MAINBOARD_USE_LIBGFXINIT=y |
| 335 | # CONFIG_VGA_ROM_RUN is not set |
| 336 | # CONFIG_NO_GFX_INIT is not set |
| 337 | |
| 338 | # |
| 339 | # Display |
| 340 | # |
| 341 | CONFIG_VGA_TEXT_FRAMEBUFFER=y |
| 342 | # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set |
| 343 | # end of Display |
| 344 | |
| 345 | CONFIG_PCI=y |
| 346 | CONFIG_MMCONF_SUPPORT=y |
| 347 | CONFIG_PCIX_PLUGIN_SUPPORT=y |
| 348 | CONFIG_CARDBUS_PLUGIN_SUPPORT=y |
| 349 | CONFIG_AZALIA_PLUGIN_SUPPORT=y |
| 350 | CONFIG_PCIEXP_PLUGIN_SUPPORT=y |
| 351 | CONFIG_MMCONF_LENGTH=0x10000000 |
| 352 | CONFIG_PCI_ALLOW_BUS_MASTER=y |
| 353 | CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y |
| 354 | CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y |
| 355 | CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y |
| 356 | # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set |
| 357 | CONFIG_PCIEXP_HOTPLUG_IO=0x2000 |
| 358 | # CONFIG_EARLY_PCI_BRIDGE is not set |
| 359 | CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 |
| 360 | CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 |
| 361 | CONFIG_INTEL_GMA_HAVE_VBT=y |
| 362 | CONFIG_INTEL_GMA_ADD_VBT=y |
| 363 | # CONFIG_SOFTWARE_I2C is not set |
| 364 | CONFIG_RESOURCE_ALLOCATOR_V4=y |
| 365 | # end of Devices |
| 366 | |
| 367 | # |
| 368 | # Generic Drivers |
| 369 | # |
| 370 | CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 |
| 371 | # CONFIG_ELOG is not set |
| 372 | CONFIG_CACHE_MRC_SETTINGS=y |
| 373 | # CONFIG_MRC_SETTINGS_PROTECT is not set |
| 374 | CONFIG_MRC_STASH_TO_CBMEM=y |
| 375 | # CONFIG_SMMSTORE is not set |
| 376 | CONFIG_SPI_FLASH=y |
| 377 | CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y |
| 378 | CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y |
| 379 | # CONFIG_SPI_FLASH_NO_FAST_READ is not set |
| 380 | CONFIG_SPI_FLASH_ADESTO=y |
| 381 | CONFIG_SPI_FLASH_AMIC=y |
| 382 | CONFIG_SPI_FLASH_ATMEL=y |
| 383 | CONFIG_SPI_FLASH_EON=y |
| 384 | CONFIG_SPI_FLASH_GIGADEVICE=y |
| 385 | CONFIG_SPI_FLASH_MACRONIX=y |
| 386 | CONFIG_SPI_FLASH_SPANSION=y |
| 387 | CONFIG_SPI_FLASH_SST=y |
| 388 | CONFIG_SPI_FLASH_STMICRO=y |
| 389 | CONFIG_DRIVERS_UART=y |
| 390 | # CONFIG_DRIVERS_UART_OXPCIE is not set |
| 391 | CONFIG_HAVE_USBDEBUG=y |
| 392 | CONFIG_HAVE_USBDEBUG_OPTIONS=y |
| 393 | # CONFIG_USBDEBUG is not set |
| 394 | # CONFIG_VPD is not set |
| 395 | # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set |
| 396 | # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set |
| 397 | CONFIG_DRIVERS_I2C_CK505=y |
| 398 | CONFIG_INTEL_GMA_ACPI=y |
| 399 | CONFIG_GFX_GMA=y |
| 400 | CONFIG_GFX_GMA_PANEL_1_ON_EDP=y |
| 401 | CONFIG_INTEL_GMA_OPREGION_2_0=y |
| 402 | CONFIG_GFX_GMA_DYN_CPU=y |
| 403 | CONFIG_GFX_GMA_GENERATION="G45" |
| 404 | CONFIG_GFX_GMA_PCH="No_PCH" |
| 405 | CONFIG_GFX_GMA_PANEL_2_PORT="Disabled" |
| 406 | CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC" |
| 407 | # CONFIG_DRIVERS_PS2_KEYBOARD is not set |
| 408 | CONFIG_DRIVERS_MC146818=y |
| 409 | # CONFIG_USE_PC_CMOS_ALTCENTURY is not set |
| 410 | CONFIG_VGA=y |
| 411 | # CONFIG_DRIVERS_SIL_3114 is not set |
| 412 | CONFIG_DRIVERS_WIFI_GENERIC=y |
| 413 | # end of Generic Drivers |
| 414 | |
| 415 | # |
| 416 | # Security |
| 417 | # |
| 418 | |
| 419 | # |
| 420 | # Verified Boot (vboot) |
| 421 | # |
| 422 | # end of Verified Boot (vboot) |
| 423 | |
| 424 | # |
| 425 | # Trusted Platform Module |
| 426 | # |
| 427 | CONFIG_NO_TPM=y |
| 428 | # end of Trusted Platform Module |
| 429 | |
| 430 | # |
| 431 | # Memory initialization |
| 432 | # |
| 433 | CONFIG_PLATFORM_HAS_DRAM_CLEAR=y |
| 434 | # CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set |
| 435 | # end of Memory initialization |
| 436 | |
| 437 | # CONFIG_STM is not set |
| 438 | CONFIG_BOOTMEDIA_LOCK_NONE=y |
| 439 | # CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set |
| 440 | # CONFIG_BOOTMEDIA_LOCK_CHIP is not set |
| 441 | # CONFIG_BOOTMEDIA_SMM_BWP is not set |
| 442 | # end of Security |
| 443 | |
| 444 | CONFIG_ACPI_HAVE_PCAT_8259=y |
| 445 | CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y |
| 446 | CONFIG_HAVE_ACPI_TABLES=y |
| 447 | CONFIG_BOOT_DEVICE_SPI_FLASH=y |
| 448 | CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y |
| 449 | CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y |
| 450 | |
| 451 | # |
| 452 | # Console |
| 453 | # |
| 454 | CONFIG_BOOTBLOCK_CONSOLE=y |
| 455 | CONFIG_POSTCAR_CONSOLE=y |
| 456 | CONFIG_SQUELCH_EARLY_SMP=y |
| 457 | |
| 458 | # |
| 459 | # I/O mapped, 8250-compatible |
| 460 | # |
| 461 | |
| 462 | # |
| 463 | # Serial port base address = 0x3f8 |
| 464 | # |
| 465 | # CONFIG_CONSOLE_SERIAL_921600 is not set |
| 466 | # CONFIG_CONSOLE_SERIAL_460800 is not set |
| 467 | # CONFIG_CONSOLE_SERIAL_230400 is not set |
| 468 | CONFIG_CONSOLE_SERIAL_115200=y |
| 469 | # CONFIG_CONSOLE_SERIAL_57600 is not set |
| 470 | # CONFIG_CONSOLE_SERIAL_38400 is not set |
| 471 | # CONFIG_CONSOLE_SERIAL_19200 is not set |
| 472 | # CONFIG_CONSOLE_SERIAL_9600 is not set |
| 473 | CONFIG_TTYS0_BAUD=115200 |
| 474 | # CONFIG_SPKMODEM is not set |
| 475 | # CONFIG_CONSOLE_NE2K is not set |
| 476 | CONFIG_CONSOLE_CBMEM=y |
| 477 | # CONFIG_CONSOLE_SPI_FLASH is not set |
| 478 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set |
| 479 | CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y |
| 480 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set |
| 481 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set |
| 482 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set |
| 483 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set |
| 484 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set |
| 485 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set |
| 486 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set |
| 487 | CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 |
| 488 | # CONFIG_CMOS_POST is not set |
| 489 | CONFIG_POST_DEVICE_NONE=y |
| 490 | # CONFIG_POST_DEVICE_LPC is not set |
| 491 | # CONFIG_POST_DEVICE_PCI_PCIE is not set |
| 492 | CONFIG_POST_IO_PORT=0x80 |
| 493 | CONFIG_HWBASE_DEBUG_CB=y |
| 494 | # end of Console |
| 495 | |
| 496 | CONFIG_HAVE_ACPI_RESUME=y |
| 497 | CONFIG_RESUME_PATH_SAME_AS_BOOT=y |
| 498 | CONFIG_HAVE_MONOTONIC_TIMER=y |
| 499 | CONFIG_HAVE_OPTION_TABLE=y |
| 500 | CONFIG_IOAPIC=y |
| 501 | CONFIG_USE_WATCHDOG_ON_BOOT=y |
| 502 | |
| 503 | # |
| 504 | # System tables |
| 505 | # |
| 506 | CONFIG_GENERATE_SMBIOS_TABLES=y |
| 507 | CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" |
| 508 | # end of System tables |
| 509 | |
| 510 | # |
| 511 | # Payload |
| 512 | # |
| 513 | # CONFIG_PAYLOAD_NONE is not set |
| 514 | # CONFIG_PAYLOAD_ELF is not set |
| 515 | # CONFIG_PAYLOAD_BOOTBOOT is not set |
| 516 | # CONFIG_PAYLOAD_FILO is not set |
| 517 | # CONFIG_PAYLOAD_GRUB2 is not set |
| 518 | # CONFIG_PAYLOAD_LINUXBOOT is not set |
| 519 | CONFIG_PAYLOAD_SEABIOS=y |
| 520 | # CONFIG_PAYLOAD_UBOOT is not set |
| 521 | # CONFIG_PAYLOAD_YABITS is not set |
| 522 | # CONFIG_PAYLOAD_LINUX is not set |
| 523 | # CONFIG_PAYLOAD_TIANOCORE is not set |
| 524 | CONFIG_PAYLOAD_FILE="payloads/external/SeaBIOS/seabios/out/bios.bin.elf" |
| 525 | CONFIG_SEABIOS_STABLE=y |
| 526 | # CONFIG_SEABIOS_MASTER is not set |
| 527 | # CONFIG_SEABIOS_REVISION is not set |
| 528 | # CONFIG_SEABIOS_THREAD_OPTIONROMS is not set |
| 529 | CONFIG_SEABIOS_VGA_COREBOOT=y |
| 530 | CONFIG_SEABIOS_BOOTORDER_FILE="" |
| 531 | # CONFIG_SEABIOS_ADD_SERCON_PORT_FILE is not set |
| 532 | CONFIG_PAYLOAD_VGABIOS_FILE="payloads/external/SeaBIOS/seabios/out/vgabios.bin" |
| 533 | CONFIG_SEABIOS_DEBUG_LEVEL=-1 |
| 534 | |
| 535 | # |
| 536 | # Using default SeaBIOS log level |
| 537 | # |
| 538 | CONFIG_PAYLOAD_OPTIONS="" |
| 539 | # CONFIG_PXE is not set |
| 540 | # CONFIG_COMPRESSED_PAYLOAD_NONE is not set |
| 541 | CONFIG_COMPRESSED_PAYLOAD_LZMA=y |
| 542 | # CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set |
| 543 | CONFIG_COMPRESS_SECONDARY_PAYLOAD=y |
| 544 | |
| 545 | # |
| 546 | # Secondary Payloads |
| 547 | # |
| 548 | # CONFIG_COREINFO_SECONDARY_PAYLOAD is not set |
| 549 | # CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set |
| 550 | # CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set |
| 551 | # CONFIG_TINT_SECONDARY_PAYLOAD is not set |
| 552 | # end of Secondary Payloads |
| 553 | # end of Payload |
| 554 | |
| 555 | # |
| 556 | # Debugging |
| 557 | # |
| 558 | |
| 559 | # |
| 560 | # CPU Debug Settings |
| 561 | # |
| 562 | |
| 563 | # |
| 564 | # BLOB Debug Settings |
| 565 | # |
| 566 | |
| 567 | # |
| 568 | # General Debug Settings |
| 569 | # |
| 570 | # CONFIG_GDB_STUB is not set |
| 571 | # CONFIG_FATAL_ASSERTS is not set |
| 572 | # CONFIG_DEBUG_CBFS is not set |
| 573 | CONFIG_HAVE_DEBUG_RAM_SETUP=y |
| 574 | # CONFIG_DEBUG_RAM_SETUP is not set |
| 575 | CONFIG_HAVE_DEBUG_SMBUS=y |
| 576 | # CONFIG_DEBUG_SMBUS is not set |
| 577 | # CONFIG_DEBUG_SMI is not set |
| 578 | # CONFIG_DEBUG_MALLOC is not set |
| 579 | # CONFIG_DEBUG_CONSOLE_INIT is not set |
| 580 | # CONFIG_DEBUG_SPI_FLASH is not set |
| 581 | # CONFIG_DEBUG_BOOT_STATE is not set |
| 582 | # CONFIG_DEBUG_ADA_CODE is not set |
| 583 | # CONFIG_HAVE_EM100_SUPPORT is not set |
| 584 | # end of Debugging |
| 585 | |
| 586 | CONFIG_RAMSTAGE_ADA=y |
| 587 | CONFIG_RAMSTAGE_LIBHWBASE=y |
| 588 | CONFIG_HWBASE_DYNAMIC_MMIO=y |
| 589 | CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 |
| 590 | CONFIG_HWBASE_DIRECT_PCIDEV=y |
| 591 | CONFIG_WARNINGS_ARE_ERRORS=y |
| 592 | CONFIG_MAX_REBOOT_CNT=3 |
| 593 | CONFIG_RELOCATABLE_MODULES=y |
| 594 | CONFIG_HAVE_BOOTBLOCK=y |
| 595 | CONFIG_HAVE_ROMSTAGE=y |
| 596 | CONFIG_HAVE_RAMSTAGE=y |