intel/d510mo/4.5-1341-g0d50e4c21e-dirty/2017-04-17T15_19_10Z/coreboot_console.txt

coreboot-4.5-1341-g0d50e4c21e-dirty Sun Apr 16 16:28:22 UTC 2017 ramstage starting...
BS: BS_PRE_DEVICE times (us): entry 0 run 1 exit 0
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 2 exit 0
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 0
PCI: 00:02.0: enabled 1
PCI: 00:02.1: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:1c.1: enabled 1
PCI: 00:1c.2: enabled 1
PCI: 00:1c.3: enabled 1
PCI: 00:1d.0: enabled 1
PCI: 00:1d.1: enabled 1
PCI: 00:1d.2: enabled 1
PCI: 00:1d.3: enabled 1
PCI: 00:1d.7: enabled 1
PCI: 00:1e.0: enabled 1
PCI: 00:1f.0: enabled 1
PNP: 004e.0: enabled 0
PNP: 004e.1: enabled 1
PNP: 004e.2: enabled 1
PNP: 004e.3: enabled 1
PNP: 004e.5: enabled 1
PNP: 004e.6: enabled 0
PNP: 004e.7: enabled 0
PNP: 004e.8: enabled 0
PNP: 004e.9: enabled 0
PNP: 004e.a: enabled 0
PNP: 004e.b: enabled 1
PCI: 00:1f.1: enabled 0
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
PCI: 00:1f.4: enabled 0
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 0
Compare with tree...
Root Device: enabled 1
 CPU_CLUSTER: 0: enabled 1
  APIC: 00: enabled 1
 DOMAIN: 0000: enabled 1
  PCI: 00:00.0: enabled 1
  PCI: 00:01.0: enabled 0
  PCI: 00:02.0: enabled 1
  PCI: 00:02.1: enabled 1
  PCI: 00:1b.0: enabled 1
  PCI: 00:1c.0: enabled 1
   PCI: 00:00.0: enabled 1
  PCI: 00:1c.1: enabled 1
  PCI: 00:1c.2: enabled 1
  PCI: 00:1c.3: enabled 1
  PCI: 00:1d.0: enabled 1
  PCI: 00:1d.1: enabled 1
  PCI: 00:1d.2: enabled 1
  PCI: 00:1d.3: enabled 1
  PCI: 00:1d.7: enabled 1
  PCI: 00:1e.0: enabled 1
  PCI: 00:1f.0: enabled 1
   PNP: 004e.0: enabled 0
   PNP: 004e.1: enabled 1
   PNP: 004e.2: enabled 1
   PNP: 004e.3: enabled 1
   PNP: 004e.5: enabled 1
   PNP: 004e.6: enabled 0
   PNP: 004e.7: enabled 0
   PNP: 004e.8: enabled 0
   PNP: 004e.9: enabled 0
   PNP: 004e.a: enabled 0
   PNP: 004e.b: enabled 1
  PCI: 00:1f.1: enabled 0
  PCI: 00:1f.2: enabled 1
  PCI: 00:1f.3: enabled 1
  PCI: 00:1f.4: enabled 0
  PCI: 00:1f.5: enabled 0
  PCI: 00:1f.6: enabled 0
Root Device scanning...
root_dev_scan_bus for Root Device
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/a000] enabled
PCI: 00:02.0 [8086/0000] ops
PCI: 00:02.0 [8086/a001] enabled
PCI: 00:02.1 [8086/a002] enabled
PCI: 00:1b.0 [8086/27d8] ops
PCI: 00:1b.0 [8086/27d8] enabled
PCI: 00:1c.0 [8086/0000] bus ops
PCI: 00:1c.0 [8086/27d0] enabled
PCI: 00:1c.1 [8086/0000] bus ops
PCI: 00:1c.1 [8086/27d2] enabled
PCI: 00:1c.2 [8086/0000] bus ops
PCI: 00:1c.2 [8086/27d4] enabled
PCI: 00:1c.3 [8086/0000] bus ops
PCI: 00:1c.3 [8086/27d6] enabled
PCI: 00:1d.0 [8086/27c8] ops
PCI: 00:1d.0 [8086/27c8] enabled
PCI: 00:1d.1 [8086/27c9] ops
PCI: 00:1d.1 [8086/27c9] enabled
PCI: 00:1d.2 [8086/27ca] ops
PCI: 00:1d.2 [8086/27ca] enabled
PCI: 00:1d.3 [8086/27cb] ops
PCI: 00:1d.3 [8086/27cb] enabled
PCI: 00:1d.7 [8086/27cc] ops
PCI: 00:1d.7 [8086/27cc] enabled
PCI: 00:1e.0 [8086/2448] bus ops
PCI: 00:1e.0 [8086/2448] enabled
PCI: 00:1f.0 [8086/0000] bus ops
PCI: 00:1f.0 [8086/27bc] enabled
Set SATA mode early
PCI: 00:1f.2 [8086/0000] ops
Set SATA mode early
PCI: 00:1f.2 [8086/27c1] enabled
PCI: 00:1f.3 [8086/27da] bus ops
PCI: 00:1f.3 [8086/27da] enabled
PCI: 00:1c.0 scanning...
do_pci_scan_bridge for PCI: 00:1c.0
PCI: pci_scan_bus for bus 01
PCI: 01:00.0 [10ec/8168] enabled
scan_bus: scanning of bus PCI: 00:1c.0 took 41 usecs
PCI: 00:1c.1 scanning...
do_pci_scan_bridge for PCI: 00:1c.1
PCI: pci_scan_bus for bus 02
scan_bus: scanning of bus PCI: 00:1c.1 took 32 usecs
PCI: 00:1c.2 scanning...
do_pci_scan_bridge for PCI: 00:1c.2
PCI: pci_scan_bus for bus 03
scan_bus: scanning of bus PCI: 00:1c.2 took 32 usecs
PCI: 00:1c.3 scanning...
do_pci_scan_bridge for PCI: 00:1c.3
PCI: pci_scan_bus for bus 04
scan_bus: scanning of bus PCI: 00:1c.3 took 32 usecs
PCI: 00:1e.0 scanning...
do_pci_scan_bridge for PCI: 00:1e.0
PCI: pci_scan_bus for bus 05
scan_bus: scanning of bus PCI: 00:1e.0 took 42 usecs
PCI: 00:1f.0 scanning...
scan_lpc_bus for PCI: 00:1f.0
PNP: 004e.0 disabled
PNP: 004e.1 enabled
PNP: 004e.2 enabled
PNP: 004e.3 enabled
PNP: 004e.5 enabled
PNP: 004e.6 disabled
PNP: 004e.7 disabled
PNP: 004e.8 disabled
PNP: 004e.9 disabled
PNP: 004e.a disabled
PNP: 004e.b enabled
scan_lpc_bus for PCI: 00:1f.0 done
scan_bus: scanning of bus PCI: 00:1f.0 took 114 usecs
PCI: 00:1f.3 scanning...
scan_generic_bus for PCI: 00:1f.3
scan_generic_bus for PCI: 00:1f.3 done
scan_bus: scanning of bus PCI: 00:1f.3 took 7 usecs
scan_bus: scanning of bus DOMAIN: 0000 took 554 usecs
root_dev_scan_bus for Root Device done
scan_bus: scanning of bus Root Device took 563 usecs
done
BS: BS_DEV_ENUMERATE times (us): entry 0 run 740 exit 0
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
TOUUD 0x40000000 TOLUD 0x40000000 TOM 0x80000000 8M UMA and 1M GTT
Adding PCIe config bar base=0xe0000000 size=0x10000000
DOMAIN: 0000 read_resources bus 0 link: 0
PCI: 00:1c.0 read_resources bus 1 link: 0
PCI: 00:1c.0 read_resources bus 1 link: 0 done
PCI: 00:1c.1 read_resources bus 2 link: 0
PCI: 00:1c.1 read_resources bus 2 link: 0 done
PCI: 00:1c.2 read_resources bus 3 link: 0
PCI: 00:1c.2 read_resources bus 3 link: 0 done
PCI: 00:1c.3 read_resources bus 4 link: 0
PCI: 00:1c.3 read_resources bus 4 link: 0 done
PCI: 00:1e.0 read_resources bus 5 link: 0
PCI: 00:1e.0 read_resources bus 5 link: 0 done
PCI: 00:1f.0 read_resources bus 0 link: 0
PCI: 00:1f.0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
  DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
  DOMAIN: 0000 resource base c0000 size 3f540000 align 0 gran 0 limit 0 flags e0004200 index 4
  DOMAIN: 0000 resource base 3f600000 size 100000 align 0 gran 0 limit 0 flags f0004200 index 5
  DOMAIN: 0000 resource base 3f700000 size 100000 align 0 gran 0 limit 0 flags f0004200 index 6
  DOMAIN: 0000 resource base 3f800000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 7
  DOMAIN: 0000 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 8
  DOMAIN: 0000 resource base fed00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 9
  DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index a
  DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index b
   PCI: 00:00.0
   PCI: 00:01.0
   PCI: 00:02.0
   PCI: 00:02.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 10
   PCI: 00:02.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 14
   PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 18
   PCI: 00:02.0 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 1c
   PCI: 00:02.1
   PCI: 00:02.1 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 10
   PCI: 00:1b.0
   PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
   PCI: 00:1c.0 child on link 0 PCI: 01:00.0
   PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 01:00.0
    PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
    PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 1201 index 18
    PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20
    PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 index 30
   PCI: 00:1c.1
   PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
   PCI: 00:1c.2
   PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
   PCI: 00:1c.3
   PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
   PCI: 00:1d.0
   PCI: 00:1d.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
   PCI: 00:1d.1
   PCI: 00:1d.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
   PCI: 00:1d.2
   PCI: 00:1d.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
   PCI: 00:1d.3
   PCI: 00:1d.3 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
   PCI: 00:1d.7
   PCI: 00:1d.7 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
   PCI: 00:1e.0
   PCI: 00:1e.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
   PCI: 00:1f.0 child on link 0 PNP: 004e.0
   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
    PNP: 004e.0
    PNP: 004e.0 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
    PNP: 004e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 004e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
    PNP: 004e.1
    PNP: 004e.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
    PNP: 004e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 004e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
    PNP: 004e.2
    PNP: 004e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
    PNP: 004e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 004e.3
    PNP: 004e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
    PNP: 004e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 004e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index f1
    PNP: 004e.5
    PNP: 004e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
    PNP: 004e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62
    PNP: 004e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 004e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72
    PNP: 004e.5 resource base 80 size 1 align 0 gran 0 limit 0 flags c0000400 index f0
    PNP: 004e.6
    PNP: 004e.7
    PNP: 004e.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60
    PNP: 004e.7 resource base 0 size 2 align 1 gran 1 limit 7ff flags 100 index 62
    PNP: 004e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 004e.8
    PNP: 004e.9
    PNP: 004e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 30
    PNP: 004e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0
    PNP: 004e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f1
    PNP: 004e.a
    PNP: 004e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 004e.b
    PNP: 004e.b resource base 290 size 8 align 3 gran 3 limit fff flags c0000100 index 60
    PNP: 004e.b resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
   PCI: 00:1f.1
   PCI: 00:1f.2
   PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
   PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
   PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
   PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
   PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
   PCI: 00:1f.2 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 24
   PCI: 00:1f.3
   PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
   PCI: 00:1f.4
   PCI: 00:1f.5
   PCI: 00:1f.6
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 01:00.0 10 *  [0x0 - 0xff] io
PCI: 00:1c.0 io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1e.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1e.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.0 1c *  [0x0 - 0xfff] io
PCI: 00:1d.0 20 *  [0x1000 - 0x101f] io
PCI: 00:1d.1 20 *  [0x1020 - 0x103f] io
PCI: 00:1d.2 20 *  [0x1040 - 0x105f] io
PCI: 00:1d.3 20 *  [0x1060 - 0x107f] io
PCI: 00:1f.2 20 *  [0x1080 - 0x109f] io
PCI: 00:02.0 14 *  [0x10a0 - 0x10a7] io
PCI: 00:1f.2 10 *  [0x10a8 - 0x10af] io
PCI: 00:1f.2 18 *  [0x10b0 - 0x10b7] io
PCI: 00:1f.2 14 *  [0x10b8 - 0x10bb] io
PCI: 00:1f.2 1c *  [0x10bc - 0x10bf] io
DOMAIN: 0000 io: base: 10c0 size: 10c0 align: 12 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 01:00.0 20 *  [0x0 - 0x3fff] prefmem
PCI: 01:00.0 18 *  [0x4000 - 0x4fff] prefmem
PCI: 00:1c.0 prefmem: base: 5000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 30 *  [0x0 - 0x1ffff] mem
PCI: 00:1c.0 mem: base: 20000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.2 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:1c.2 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.3 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:1c.3 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1e.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:1e.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
PCI: 00:02.0 1c *  [0x10000000 - 0x100fffff] mem
PCI: 00:1c.0 24 *  [0x10100000 - 0x101fffff] prefmem
PCI: 00:1c.0 20 *  [0x10200000 - 0x102fffff] mem
PCI: 00:02.0 10 *  [0x10300000 - 0x1037ffff] mem
PCI: 00:02.1 10 *  [0x10380000 - 0x103fffff] mem
PCI: 00:1b.0 10 *  [0x10400000 - 0x10403fff] mem
PCI: 00:1d.7 10 *  [0x10404000 - 0x104043ff] mem
PCI: 00:1f.2 24 *  [0x10405000 - 0x104053ff] mem
DOMAIN: 0000 mem: base: 10405400 size: 10405400 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: DOMAIN: 0000 03 base 00000000 limit 0009ffff mem (fixed)
constrain_resources: DOMAIN: 0000 04 base 000c0000 limit 3f5fffff mem (fixed)
constrain_resources: DOMAIN: 0000 05 base 3f600000 limit 3f6fffff mem (fixed)
constrain_resources: DOMAIN: 0000 06 base 3f700000 limit 3f7fffff mem (fixed)
constrain_resources: DOMAIN: 0000 07 base 3f800000 limit 3fffffff mem (fixed)
constrain_resources: DOMAIN: 0000 08 base e0000000 limit efffffff mem (fixed)
constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
Setting resources...
DOMAIN: 0000 io: base:1000 size:10c0 align:12 gran:0 limit:ffff
PCI: 00:1c.0 1c *  [0x1000 - 0x1fff] io
PCI: 00:1d.0 20 *  [0x2000 - 0x201f] io
PCI: 00:1d.1 20 *  [0x2020 - 0x203f] io
PCI: 00:1d.2 20 *  [0x2040 - 0x205f] io
PCI: 00:1d.3 20 *  [0x2060 - 0x207f] io
PCI: 00:1f.2 20 *  [0x2080 - 0x209f] io
PCI: 00:02.0 14 *  [0x20a0 - 0x20a7] io
PCI: 00:1f.2 10 *  [0x20a8 - 0x20af] io
PCI: 00:1f.2 18 *  [0x20b0 - 0x20b7] io
PCI: 00:1f.2 14 *  [0x20b8 - 0x20bb] io
PCI: 00:1f.2 1c *  [0x20bc - 0x20bf] io
DOMAIN: 0000 io: next_base: 20c0 size: 10c0 align: 12 gran: 0 done
PCI: 00:1c.0 io: base:1000 size:1000 align:12 gran:12 limit:1fff
PCI: 01:00.0 10 *  [0x1000 - 0x10ff] io
PCI: 00:1c.0 io: next_base: 1100 size: 1000 align: 12 gran: 12 done
PCI: 00:1c.1 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.1 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:1c.2 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.2 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:1c.3 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.3 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:1e.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1e.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:c0000000 size:10405400 align:28 gran:0 limit:dfffffff
PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem
PCI: 00:02.0 1c *  [0xd0000000 - 0xd00fffff] mem
PCI: 00:1c.0 24 *  [0xd0100000 - 0xd01fffff] prefmem
PCI: 00:1c.0 20 *  [0xd0200000 - 0xd02fffff] mem
PCI: 00:02.0 10 *  [0xd0300000 - 0xd037ffff] mem
PCI: 00:02.1 10 *  [0xd0380000 - 0xd03fffff] mem
PCI: 00:1b.0 10 *  [0xd0400000 - 0xd0403fff] mem
PCI: 00:1d.7 10 *  [0xd0404000 - 0xd04043ff] mem
PCI: 00:1f.2 24 *  [0xd0405000 - 0xd04053ff] mem
DOMAIN: 0000 mem: next_base: d0405400 size: 10405400 align: 28 gran: 0 done
PCI: 00:1c.0 prefmem: base:d0100000 size:100000 align:20 gran:20 limit:d01fffff
PCI: 01:00.0 20 *  [0xd0100000 - 0xd0103fff] prefmem
PCI: 01:00.0 18 *  [0xd0104000 - 0xd0104fff] prefmem
PCI: 00:1c.0 prefmem: next_base: d0105000 size: 100000 align: 20 gran: 20 done
PCI: 00:1c.0 mem: base:d0200000 size:100000 align:20 gran:20 limit:d02fffff
PCI: 01:00.0 30 *  [0xd0200000 - 0xd021ffff] mem
PCI: 00:1c.0 mem: next_base: d0220000 size: 100000 align: 20 gran: 20 done
PCI: 00:1c.1 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
PCI: 00:1c.1 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.1 mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
PCI: 00:1c.1 mem: next_base: dfffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.2 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
PCI: 00:1c.2 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.2 mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
PCI: 00:1c.2 mem: next_base: dfffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.3 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
PCI: 00:1c.3 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.3 mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
PCI: 00:1c.3 mem: next_base: dfffffff size: 0 align: 20 gran: 20 done
PCI: 00:1e.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
PCI: 00:1e.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
PCI: 00:1e.0 mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
PCI: 00:1e.0 mem: next_base: dfffffff size: 0 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
DOMAIN: 0000 03 <- [0x0000000000 - 0x000009ffff] size 0x000a0000 gran 0x00 mem
DOMAIN: 0000 04 <- [0x00000c0000 - 0x003f5fffff] size 0x3f540000 gran 0x00 mem
DOMAIN: 0000 05 <- [0x003f600000 - 0x003f6fffff] size 0x00100000 gran 0x00 mem
DOMAIN: 0000 06 <- [0x003f700000 - 0x003f7fffff] size 0x00100000 gran 0x00 mem
DOMAIN: 0000 07 <- [0x003f800000 - 0x003fffffff] size 0x00800000 gran 0x00 mem
DOMAIN: 0000 08 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x00 mem
DOMAIN: 0000 09 <- [0x00fed00000 - 0x00fedfffff] size 0x00100000 gran 0x00 mem
DOMAIN: 0000 0a <- [0x00000a0000 - 0x00000bffff] size 0x00020000 gran 0x00 mem
DOMAIN: 0000 0b <- [0x00000c0000 - 0x00000fffff] size 0x00040000 gran 0x00 mem
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:02.0 10 <- [0x00d0300000 - 0x00d037ffff] size 0x00080000 gran 0x13 mem
PCI: 00:02.0 14 <- [0x00000020a0 - 0x00000020a7] size 0x00000008 gran 0x03 io
PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem
PCI: 00:02.0 1c <- [0x00d0000000 - 0x00d00fffff] size 0x00100000 gran 0x14 mem
PCI: 00:02.1 10 <- [0x00d0380000 - 0x00d03fffff] size 0x00080000 gran 0x13 mem
PCI: 00:1b.0 10 <- [0x00d0400000 - 0x00d0403fff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io
PCI: 00:1c.0 24 <- [0x00d0100000 - 0x00d01fffff] size 0x00100000 gran 0x14 bus 01 prefmem
PCI: 00:1c.0 20 <- [0x00d0200000 - 0x00d02fffff] size 0x00100000 gran 0x14 bus 01 mem
PCI: 00:1c.0 assign_resources, bus 1 link: 0
PCI: 01:00.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
PCI: 01:00.0 18 <- [0x00d0104000 - 0x00d0104fff] size 0x00001000 gran 0x0c prefmem64
PCI: 01:00.0 20 <- [0x00d0100000 - 0x00d0103fff] size 0x00004000 gran 0x0e prefmem64
PCI: 01:00.0 30 <- [0x00d0200000 - 0x00d021ffff] size 0x00020000 gran 0x11 romem
PCI: 00:1c.0 assign_resources, bus 1 link: 0
PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:1c.1 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:1c.1 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 mem
PCI: 00:1c.2 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io
PCI: 00:1c.2 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 03 prefmem
PCI: 00:1c.2 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 03 mem
PCI: 00:1c.3 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io
PCI: 00:1c.3 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 04 prefmem
PCI: 00:1c.3 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 04 mem
PCI: 00:1d.0 20 <- [0x0000002000 - 0x000000201f] size 0x00000020 gran 0x05 io
PCI: 00:1d.1 20 <- [0x0000002020 - 0x000000203f] size 0x00000020 gran 0x05 io
PCI: 00:1d.2 20 <- [0x0000002040 - 0x000000205f] size 0x00000020 gran 0x05 io
PCI: 00:1d.3 20 <- [0x0000002060 - 0x000000207f] size 0x00000020 gran 0x05 io
PCI: 00:1d.7 10 <- [0x00d0404000 - 0x00d04043ff] size 0x00000400 gran 0x0a mem
PCI: 00:1e.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 05 io
PCI: 00:1e.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 05 prefmem
PCI: 00:1e.0 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 05 mem
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PNP: 004e.1 60 <- [0x0000000378 - 0x000000037f] size 0x00000008 gran 0x03 io
PNP: 004e.1 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq
PNP: 004e.1 74 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 drq
PNP: 004e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 004e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 004e.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
PNP: 004e.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
PNP: 004e.3 f1 <- [0x0000000000 - 0x0000000000] size 0x00000001 gran 0x00 irq
PNP: 004e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
PNP: 004e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io
PNP: 004e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
PNP: 004e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
PNP: 004e.5 f0 <- [0x0000000080 - 0x0000000080] size 0x00000001 gran 0x00 irq
PNP: 004e.b 60 <- [0x0000000290 - 0x0000000297] size 0x00000008 gran 0x03 io
PNP: 004e.b 70 <- [0x0000000000 - 0x0000000000] size 0x00000001 gran 0x00 irq
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PCI: 00:1f.2 10 <- [0x00000020a8 - 0x00000020af] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 14 <- [0x00000020b8 - 0x00000020bb] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 18 <- [0x00000020b0 - 0x00000020b7] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 1c <- [0x00000020bc - 0x00000020bf] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 20 <- [0x0000002080 - 0x000000209f] size 0x00000020 gran 0x05 io
PCI: 00:1f.2 24 <- [0x00d0405000 - 0x00d04053ff] size 0x00000400 gran 0x0a mem
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 1000 size 10c0 align 12 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base c0000000 size 10405400 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
  DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
  DOMAIN: 0000 resource base c0000 size 3f540000 align 0 gran 0 limit 0 flags e0004200 index 4
  DOMAIN: 0000 resource base 3f600000 size 100000 align 0 gran 0 limit 0 flags f0004200 index 5
  DOMAIN: 0000 resource base 3f700000 size 100000 align 0 gran 0 limit 0 flags f0004200 index 6
  DOMAIN: 0000 resource base 3f800000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 7
  DOMAIN: 0000 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 8
  DOMAIN: 0000 resource base fed00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 9
  DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index a
  DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index b
   PCI: 00:00.0
   PCI: 00:01.0
   PCI: 00:02.0
   PCI: 00:02.0 resource base d0300000 size 80000 align 19 gran 19 limit d037ffff flags 60000200 index 10
   PCI: 00:02.0 resource base 20a0 size 8 align 3 gran 3 limit 20a7 flags 60000100 index 14
   PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001200 index 18
   PCI: 00:02.0 resource base d0000000 size 100000 align 20 gran 20 limit d00fffff flags 60000200 index 1c
   PCI: 00:02.1
   PCI: 00:02.1 resource base d0380000 size 80000 align 19 gran 19 limit d03fffff flags 60000200 index 10
   PCI: 00:1b.0
   PCI: 00:1b.0 resource base d0400000 size 4000 align 14 gran 14 limit d0403fff flags 60000201 index 10
   PCI: 00:1c.0 child on link 0 PCI: 01:00.0
   PCI: 00:1c.0 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c
   PCI: 00:1c.0 resource base d0100000 size 100000 align 20 gran 20 limit d01fffff flags 60081202 index 24
   PCI: 00:1c.0 resource base d0200000 size 100000 align 20 gran 20 limit d02fffff flags 60080202 index 20
    PCI: 01:00.0
    PCI: 01:00.0 resource base 1000 size 100 align 8 gran 8 limit 10ff flags 60000100 index 10
    PCI: 01:00.0 resource base d0104000 size 1000 align 12 gran 12 limit d0104fff flags 60001201 index 18
    PCI: 01:00.0 resource base d0100000 size 4000 align 14 gran 14 limit d0103fff flags 60001201 index 20
    PCI: 01:00.0 resource base d0200000 size 20000 align 17 gran 17 limit d021ffff flags 60002200 index 30
   PCI: 00:1c.1
   PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:1c.1 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
   PCI: 00:1c.1 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080202 index 20
   PCI: 00:1c.2
   PCI: 00:1c.2 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:1c.2 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
   PCI: 00:1c.2 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080202 index 20
   PCI: 00:1c.3
   PCI: 00:1c.3 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:1c.3 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
   PCI: 00:1c.3 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080202 index 20
   PCI: 00:1d.0
   PCI: 00:1d.0 resource base 2000 size 20 align 5 gran 5 limit 201f flags 60000100 index 20
   PCI: 00:1d.1
   PCI: 00:1d.1 resource base 2020 size 20 align 5 gran 5 limit 203f flags 60000100 index 20
   PCI: 00:1d.2
   PCI: 00:1d.2 resource base 2040 size 20 align 5 gran 5 limit 205f flags 60000100 index 20
   PCI: 00:1d.3
   PCI: 00:1d.3 resource base 2060 size 20 align 5 gran 5 limit 207f flags 60000100 index 20
   PCI: 00:1d.7
   PCI: 00:1d.7 resource base d0404000 size 400 align 12 gran 10 limit d04043ff flags 60000200 index 10
   PCI: 00:1e.0
   PCI: 00:1e.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:1e.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
   PCI: 00:1e.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080202 index 20
   PCI: 00:1f.0 child on link 0 PNP: 004e.0
   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
    PNP: 004e.0
    PNP: 004e.0 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
    PNP: 004e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 004e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
    PNP: 004e.1
    PNP: 004e.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
    PNP: 004e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 004e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000800 index 74
    PNP: 004e.2
    PNP: 004e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
    PNP: 004e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 004e.3
    PNP: 004e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
    PNP: 004e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 004e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags e0000400 index f1
    PNP: 004e.5
    PNP: 004e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60
    PNP: 004e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 62
    PNP: 004e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 004e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72
    PNP: 004e.5 resource base 80 size 1 align 0 gran 0 limit 0 flags e0000400 index f0
    PNP: 004e.6
    PNP: 004e.7
    PNP: 004e.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60
    PNP: 004e.7 resource base 0 size 2 align 1 gran 1 limit 7ff flags 100 index 62
    PNP: 004e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 004e.8
    PNP: 004e.9
    PNP: 004e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 30
    PNP: 004e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0
    PNP: 004e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f1
    PNP: 004e.a
    PNP: 004e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 004e.b
    PNP: 004e.b resource base 290 size 8 align 3 gran 3 limit fff flags e0000100 index 60
    PNP: 004e.b resource base 0 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
   PCI: 00:1f.1
   PCI: 00:1f.2
   PCI: 00:1f.2 resource base 20a8 size 8 align 3 gran 3 limit 20af flags 60000100 index 10
   PCI: 00:1f.2 resource base 20b8 size 4 align 2 gran 2 limit 20bb flags 60000100 index 14
   PCI: 00:1f.2 resource base 20b0 size 8 align 3 gran 3 limit 20b7 flags 60000100 index 18
   PCI: 00:1f.2 resource base 20bc size 4 align 2 gran 2 limit 20bf flags 60000100 index 1c
   PCI: 00:1f.2 resource base 2080 size 20 align 5 gran 5 limit 209f flags 60000100 index 20
   PCI: 00:1f.2 resource base d0405000 size 400 align 12 gran 10 limit d04053ff flags 60000200 index 24
   PCI: 00:1f.3
   PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
   PCI: 00:1f.4
   PCI: 00:1f.5
   PCI: 00:1f.6
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 3438 exit 0
Enabling resources...
PCI: 00:00.0 subsystem <- 0000/0000
PCI: 00:00.0 cmd <- 06
PCI: 00:02.0 subsystem <- 0000/0000
PCI: 00:02.0 cmd <- 03
PCI: 00:02.1 subsystem <- 0000/0000
PCI: 00:02.1 cmd <- 02
PCI: 00:1b.0 subsystem <- 0000/0000
PCI: 00:1b.0 cmd <- 102
PCI: 00:1c.0 bridge ctrl <- 0003
PCI: 00:1c.0 subsystem <- 0000/0000
PCI: 00:1c.0 cmd <- 107
PCI: 00:1c.1 bridge ctrl <- 0003
PCI: 00:1c.1 subsystem <- 0000/0000
PCI: 00:1c.1 cmd <- 100
PCI: 00:1c.2 bridge ctrl <- 0003
PCI: 00:1c.2 subsystem <- 0000/0000
PCI: 00:1c.2 cmd <- 100
PCI: 00:1c.3 bridge ctrl <- 0003
PCI: 00:1c.3 subsystem <- 0000/0000
PCI: 00:1c.3 cmd <- 100
PCI: 00:1d.0 subsystem <- 0000/0000
PCI: 00:1d.0 cmd <- 01
PCI: 00:1d.1 subsystem <- 0000/0000
PCI: 00:1d.1 cmd <- 01
PCI: 00:1d.2 subsystem <- 0000/0000
PCI: 00:1d.2 cmd <- 01
PCI: 00:1d.3 subsystem <- 0000/0000
PCI: 00:1d.3 cmd <- 01
PCI: 00:1d.7 subsystem <- 0000/0000
PCI: 00:1d.7 cmd <- 102
PCI: 00:1e.0 bridge ctrl <- 0003
PCI: 00:1e.0 subsystem <- 0000/0000
PCI: 00:1e.0 cmd <- 100 (NOT WRITTEN!)
PCI: 00:1f.0 subsystem <- 0000/0000
PCI: 00:1f.0 cmd <- 107
PCI: 00:1f.2 subsystem <- 0000/0000
PCI: 00:1f.2 cmd <- 03
PCI: 00:1f.3 subsystem <- 0000/0000
PCI: 00:1f.3 cmd <- 101
PCI: 01:00.0 subsystem <- 0000/0000
PCI: 01:00.0 cmd <- 103
done.
BS: BS_DEV_ENABLE times (us): entry 0 run 219 exit 0
Initializing devices...
Root Device init ...
Root Device init finished in 0 usecs
CPU_CLUSTER: 0 init ...
start_eip=0x00001000, code_size=0x00000031
Initializing CPU #0
CPU: vendor Intel device 106ca
CPU: family 06, model 1c, stepping 0a
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset ac80 size 8c00
microcode: sig=0x106ca pf=0x8 revision=0x0
microcode: updated to revision 0x107 date=2009-08-25
CPU: Intel(R) Atom(TM) CPU D510   @ 1.66GHz.
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x0000000040000000 size 0x3ff40000 type 6
0x0000000040000000 - 0x00000000c0000000 size 0x80000000 type 0
0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
MTRR addr 0x0-0x10 set to 6 type @ 0
MTRR addr 0x10-0x20 set to 6 type @ 1
MTRR addr 0x20-0x30 set to 6 type @ 2
MTRR addr 0x30-0x40 set to 6 type @ 3
MTRR addr 0x40-0x50 set to 6 type @ 4
MTRR addr 0x50-0x60 set to 6 type @ 5
MTRR addr 0x60-0x70 set to 6 type @ 6
MTRR addr 0x70-0x80 set to 6 type @ 7
MTRR addr 0x80-0x84 set to 6 type @ 8
MTRR addr 0x84-0x88 set to 6 type @ 9
MTRR addr 0x88-0x8c set to 6 type @ 10
MTRR addr 0x8c-0x90 set to 6 type @ 11
MTRR addr 0x90-0x94 set to 6 type @ 12
MTRR addr 0x94-0x98 set to 6 type @ 13
MTRR addr 0x98-0x9c set to 6 type @ 14
MTRR addr 0x9c-0xa0 set to 6 type @ 15
MTRR addr 0xa0-0xa4 set to 0 type @ 16
MTRR addr 0xa4-0xa8 set to 0 type @ 17
MTRR addr 0xa8-0xac set to 0 type @ 18
MTRR addr 0xac-0xb0 set to 0 type @ 19
MTRR addr 0xb0-0xb4 set to 0 type @ 20
MTRR addr 0xb4-0xb8 set to 0 type @ 21
MTRR addr 0xb8-0xbc set to 0 type @ 22
MTRR addr 0xbc-0xc0 set to 0 type @ 23
MTRR addr 0xc0-0xc1 set to 6 type @ 24
MTRR addr 0xc1-0xc2 set to 6 type @ 25
MTRR addr 0xc2-0xc3 set to 6 type @ 26
MTRR addr 0xc3-0xc4 set to 6 type @ 27
MTRR addr 0xc4-0xc5 set to 6 type @ 28
MTRR addr 0xc5-0xc6 set to 6 type @ 29
MTRR addr 0xc6-0xc7 set to 6 type @ 30
MTRR addr 0xc7-0xc8 set to 6 type @ 31
MTRR addr 0xc8-0xc9 set to 6 type @ 32
MTRR addr 0xc9-0xca set to 6 type @ 33
MTRR addr 0xca-0xcb set to 6 type @ 34
MTRR addr 0xcb-0xcc set to 6 type @ 35
MTRR addr 0xcc-0xcd set to 6 type @ 36
MTRR addr 0xcd-0xce set to 6 type @ 37
MTRR addr 0xce-0xcf set to 6 type @ 38
MTRR addr 0xcf-0xd0 set to 6 type @ 39
MTRR addr 0xd0-0xd1 set to 6 type @ 40
MTRR addr 0xd1-0xd2 set to 6 type @ 41
MTRR addr 0xd2-0xd3 set to 6 type @ 42
MTRR addr 0xd3-0xd4 set to 6 type @ 43
MTRR addr 0xd4-0xd5 set to 6 type @ 44
MTRR addr 0xd5-0xd6 set to 6 type @ 45
MTRR addr 0xd6-0xd7 set to 6 type @ 46
MTRR addr 0xd7-0xd8 set to 6 type @ 47
MTRR addr 0xd8-0xd9 set to 6 type @ 48
MTRR addr 0xd9-0xda set to 6 type @ 49
MTRR addr 0xda-0xdb set to 6 type @ 50
MTRR addr 0xdb-0xdc set to 6 type @ 51
MTRR addr 0xdc-0xdd set to 6 type @ 52
MTRR addr 0xdd-0xde set to 6 type @ 53
MTRR addr 0xde-0xdf set to 6 type @ 54
MTRR addr 0xdf-0xe0 set to 6 type @ 55
MTRR addr 0xe0-0xe1 set to 6 type @ 56
MTRR addr 0xe1-0xe2 set to 6 type @ 57
MTRR addr 0xe2-0xe3 set to 6 type @ 58
MTRR addr 0xe3-0xe4 set to 6 type @ 59
MTRR addr 0xe4-0xe5 set to 6 type @ 60
MTRR addr 0xe5-0xe6 set to 6 type @ 61
MTRR addr 0xe6-0xe7 set to 6 type @ 62
MTRR addr 0xe7-0xe8 set to 6 type @ 63
MTRR addr 0xe8-0xe9 set to 6 type @ 64
MTRR addr 0xe9-0xea set to 6 type @ 65
MTRR addr 0xea-0xeb set to 6 type @ 66
MTRR addr 0xeb-0xec set to 6 type @ 67
MTRR addr 0xec-0xed set to 6 type @ 68
MTRR addr 0xed-0xee set to 6 type @ 69
MTRR addr 0xee-0xef set to 6 type @ 70
MTRR addr 0xef-0xf0 set to 6 type @ 71
MTRR addr 0xf0-0xf1 set to 6 type @ 72
MTRR addr 0xf1-0xf2 set to 6 type @ 73
MTRR addr 0xf2-0xf3 set to 6 type @ 74
MTRR addr 0xf3-0xf4 set to 6 type @ 75
MTRR addr 0xf4-0xf5 set to 6 type @ 76
MTRR addr 0xf5-0xf6 set to 6 type @ 77
MTRR addr 0xf6-0xf7 set to 6 type @ 78
MTRR addr 0xf7-0xf8 set to 6 type @ 79
MTRR addr 0xf8-0xf9 set to 6 type @ 80
MTRR addr 0xf9-0xfa set to 6 type @ 81
MTRR addr 0xfa-0xfb set to 6 type @ 82
MTRR addr 0xfb-0xfc set to 6 type @ 83
MTRR addr 0xfc-0xfd set to 6 type @ 84
MTRR addr 0xfd-0xfe set to 6 type @ 85
MTRR addr 0xfe-0xff set to 6 type @ 86
MTRR addr 0xff-0x100 set to 6 type @ 87
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits
MTRR: default type WB/UC MTRR counts: 5/2.
MTRR: UC selected as default type.
MTRR: 0 base 0x0000000000000000 mask 0x0000000fc0000000 type 6
MTRR: 1 base 0x00000000c0000000 mask 0x0000000ff0000000 type 1

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local APIC... apic_id: 0x00 done.
CPU doesn't support VMX; exiting
CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 27300 size 4d4
CPU: 0 4 siblings
CPU: 0 has sibling 1
CPU: 0 has sibling 2
CPU: 0 has sibling 3
CPU #0 initialized
CPU1: stack_base 00127000, stack_end 00127ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
CPU: vendor Intel device 106ca
CPU: family 06, model 1c, stepping 0a
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset ac80 size 8c00
microcode: sig=0x106ca pf=0x8 revision=0x107
CPU: Intel(R) Atom(TM) CPU D510   @ 1.66GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local APIC... apic_id: 0x01 done.
CPU doesn't support VMX; exiting
CPU: 1 4 siblings
CPU #1 initialized
CPU 1 going down...
CPU2: stack_base 00126000, stack_end 00126ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 2.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 2.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #2
CPU: vendor Intel device 106ca
CPU: family 06, model 1c, stepping 0a
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset ac80 size 8c00
microcode: sig=0x106ca pf=0x8 revision=0x0
microcode: updated to revision 0x107 date=2009-08-25
CPU: Intel(R) Atom(TM) CPU D510   @ 1.66GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local APIC... apic_id: 0x02 done.
CPU doesn't support VMX; exiting
CPU: 2 4 siblings
CPU #2 initialized
CPU 2 going down...
CPU3: stack_base 00125000, stack_end 00125ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 3.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 3.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #3
Waiting for 1 CPUS to stop
CPU: vendor Intel device 106ca
CPU: family 06, model 1c, stepping 0a
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset ac80 size 8c00
microcode: sig=0x106ca pf=0x8 revision=0x107
CPU: Intel(R) Atom(TM) CPU D510   @ 1.66GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local APIC... apic_id: 0x03 done.
CPU doesn't support VMX; exiting
CPU: 3 4 siblings
CPU #3 initialized
CPU 3 going down...
All AP CPUs stopped (157 loops)
CPU0: stack: 00128000 - 00129000, lowest used address 00128b40, stack used: 1216 bytes
CPU1: stack: 00127000 - 00128000, lowest used address 00127cc4, stack used: 828 bytes
CPU2: stack: 00126000 - 00127000, lowest used address 00126cc4, stack used: 828 bytes
CPU3: stack: 00125000 - 00126000, lowest used address 00125cc4, stack used: 828 bytes
Initializing SMM handler... ... pmbase = 0x0500

SMI_STS: 
PM1_STS: 
GPE0_STS: GPIO15 GPIO14 GPIO13 GPIO12 GPIO11 GPIO10 GPIO9 GPIO8 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0 
ALT_GP_SMI_STS: GPI15 GPI14 GPI13 GPI12 GPI11 GPI10 GPI9 GPI8 GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0 
TCO_STS: INTRD_DET 
  ... raise SMI#
considering CPU 0x00 for SMM init
considering CPU 0x01 for SMM init
CPU1: stack_base 00127000, stack_end 00127ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
CPU: vendor Intel device 106ca
CPU: family 06, model 1c, stepping 0a
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset ac80 size 8c00
microcode: sig=0x106ca pf=0x8 revision=0x107
CPU: Intel(R) Atom(TM) CPU D510   @ 1.66GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local APIC... apic_id: 0x01 done.
CPU doesn't support VMX; exiting
CPU: 1 4 siblings
CPU #1 initialized
CPU 1 going down...
considering CPU 0x02 for SMM init
CPU2: stack_base 00126000, stack_end 00126ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 2.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 2.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #2
CPU: vendor Intel device 106ca
CPU: family 06, model 1c, stepping 0a
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset ac80 size 8c00
microcode: sig=0x106ca pf=0x8 revision=0x107
CPU: Intel(R) Atom(TM) CPU D510   @ 1.66GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local APIC... apic_id: 0x02 done.
CPU doesn't support VMX; exiting
CPU: 2 4 siblings
CPU #2 initialized
CPU 2 going down...
considering CPU 0x03 for SMM init
CPU3: stack_base 00125000, stack_end 00125ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 3.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 3.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #3
CPU: vendor Intel device 106ca
CPU: family 06, model 1c, stepping 0a
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset ac80 size 8c00
microcode: sig=0x106ca pf=0x8 revision=0x107
CPU: Intel(R) Atom(TM) CPU D510   @ 1.66GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local APIC... apic_id: 0x03 done.
CPU doesn't support VMX; exiting
CPU: 3 4 siblings
CPU #3 initialized
CPU 3 going down...
CPU_CLUSTER: 0 init finished in 115185 usecs
DOMAIN: 0000 init ...
DOMAIN: 0000 init finished in 3 usecs
PCI: 00:00.0 init ...
PCI: 00:00.0 init finished in 2 usecs
PCI: 00:02.0 init ...
Initializing VGA. MMIO 0xd0300000
gtt d0000000 mmio d0300000 addrport 20a0 physbase 3f800000
gttbase = 3f700000
GTT PGETBL_CTL register : 0x00000001
GTT PGETBL2_CTL register: 0x00000000
PCI: 00:02.0 init finished in 10642 usecs
PCI: 00:02.1 init ...
PCI: 00:02.1 init finished in 2 usecs
PCI: 00:1b.0 init ...
Azalia: codec type: Azalia
Azalia: base = d0400000
Azalia: codec_mask = 04
Azalia: Initializing codec #2
Azalia: codec viddid: 10ec0662
Azalia: verb_size: 40
PCI: 00:1b.0 init finished in 3133 usecs
PCI: 00:1c.0 init ...
Initializing ICH7 PCIe bridge.
PCI: 00:1c.0 init finished in 14 usecs
PCI: 00:1c.1 init ...
Initializing ICH7 PCIe bridge.
PCI: 00:1c.1 init finished in 13 usecs
PCI: 00:1c.2 init ...
Initializing ICH7 PCIe bridge.
PCI: 00:1c.2 init finished in 13 usecs
PCI: 00:1c.3 init ...
Initializing ICH7 PCIe bridge.
PCI: 00:1c.3 init finished in 13 usecs
PCI: 00:1d.0 init ...
UHCI: Setting up controller.. done.
PCI: 00:1d.0 init finished in 6 usecs
PCI: 00:1d.1 init ...
UHCI: Setting up controller.. done.
PCI: 00:1d.1 init finished in 6 usecs
PCI: 00:1d.2 init ...
UHCI: Setting up controller.. done.
PCI: 00:1d.2 init finished in 6 usecs
PCI: 00:1d.3 init ...
UHCI: Setting up controller.. done.
PCI: 00:1d.3 init finished in 6 usecs
PCI: 00:1d.7 init ...
EHCI: Setting up controller.. done.
PCI: 00:1d.7 init finished in 10 usecs
PCI: 00:1e.0 init ...
PCI: 00:1e.0 init finished in 8 usecs
PCI: 00:1f.0 init ...
i82801gx: lpc_init
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
IOAPIC: Dumping registers
  reg 0x0000: 0x02000000
  reg 0x0001: 0x00170020
  reg 0x0002: 0x00170020
CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 27300 size 4d4
Set power off after power failure.
CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 27300 size 4d4
NMI sources enabled.
rtc_failed = 0x0
RTC Init
Disabling ACPI via APMC:
done.
Locking SMM.
PCI: 00:1f.0 init finished in 1723 usecs
PCI: 00:1f.2 init ...
i82801gx_sata: initializing...
SATA controller in AHCI mode.
PCI: 00:1f.2 init finished in 18 usecs
PCI: 01:00.0 init ...
PCI: 01:00.0 init finished in 2 usecs
PNP: 004e.1 init ...
PNP: 004e.1 init finished in 2 usecs
PNP: 004e.2 init ...
PNP: 004e.2 init finished in 1 usecs
PNP: 004e.3 init ...
PNP: 004e.3 init finished in 1 usecs
PNP: 004e.5 init ...
PNP: 004e.5 init finished in 1 usecs
PNP: 004e.b init ...
PNP: 004e.b init finished in 1 usecs
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 0
PCI: 00:02.0: enabled 1
PCI: 00:02.1: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 01:00.0: enabled 1
PCI: 00:1c.1: enabled 1
PCI: 00:1c.2: enabled 1
PCI: 00:1c.3: enabled 1
PCI: 00:1d.0: enabled 1
PCI: 00:1d.1: enabled 1
PCI: 00:1d.2: enabled 1
PCI: 00:1d.3: enabled 1
PCI: 00:1d.7: enabled 1
PCI: 00:1e.0: enabled 1
PCI: 00:1f.0: enabled 1
PNP: 004e.0: enabled 0
PNP: 004e.1: enabled 1
PNP: 004e.2: enabled 1
PNP: 004e.3: enabled 1
PNP: 004e.5: enabled 1
PNP: 004e.6: enabled 0
PNP: 004e.7: enabled 0
PNP: 004e.8: enabled 0
PNP: 004e.9: enabled 0
PNP: 004e.a: enabled 0
PNP: 004e.b: enabled 1
PCI: 00:1f.1: enabled 0
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
PCI: 00:1f.4: enabled 0
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 0
APIC: 01: enabled 1
APIC: 02: enabled 1
APIC: 03: enabled 1
BS: BS_DEV_INIT times (us): entry 0 run 131036 exit 0
CBMEM:
IMD: root @ 3f5ff000 254 entries.
IMD: root @ 3f5fec00 62 entries.
Moving GDT to 3f5fea00...ok
Finalize devices...
Devices finalized
BS: BS_POST_DEVICE times (us): entry 41 run 7 exit 0
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 1 exit 0
CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
CBFS: Locating 'fallback/dsdt.aml'
CBFS: Found @ offset 27840 size 1e79
CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
CBFS: Locating 'fallback/slic'
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at 3f5b1000.
ACPI:    * FACS
ACPI:    * DSDT
ACPI:    * FADT
ACPI: added table 1/32, length now 40
ACPI:     * SSDT
ACPI: added table 2/32, length now 44
ACPI:    * MCFG
ACPI: added table 3/32, length now 48
ACPI:    * TCPA
TCPA log created at 3f5a1000
ACPI: added table 4/32, length now 52
ACPI:    * MADT
ACPI: added table 5/32, length now 56
current = 3f5b3380
ACPI:    * HPET
ACPI: added table 6/32, length now 60
ACPI: done.
ACPI tables: 9152 bytes.
smbios_write_tables: 3f5a0000
Root Device (Intel D510MO)
CPU_CLUSTER: 0 (Intel Pineview Northbridge)
APIC: 00 (unknown)
DOMAIN: 0000 (Intel Pineview Northbridge)
PCI: 00:00.0 (Intel Pineview Northbridge)
PCI: 00:01.0 (Intel Pineview Northbridge)
PCI: 00:02.0 (Intel Pineview Northbridge)
PCI: 00:02.1 (Intel Pineview Northbridge)
PCI: 00:1b.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1c.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 01:00.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1c.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1c.2 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1c.3 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1d.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1d.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1d.2 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1d.3 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1d.7 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1e.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1f.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PNP: 004e.0 (Winbond W83627THG Super I/O)
PNP: 004e.1 (Winbond W83627THG Super I/O)
PNP: 004e.2 (Winbond W83627THG Super I/O)
PNP: 004e.3 (Winbond W83627THG Super I/O)
PNP: 004e.5 (Winbond W83627THG Super I/O)
PNP: 004e.6 (Winbond W83627THG Super I/O)
PNP: 004e.7 (Winbond W83627THG Super I/O)
PNP: 004e.8 (Winbond W83627THG Super I/O)
PNP: 004e.9 (Winbond W83627THG Super I/O)
PNP: 004e.a (Winbond W83627THG Super I/O)
PNP: 004e.b (Winbond W83627THG Super I/O)
PCI: 00:1f.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1f.2 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1f.3 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1f.4 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1f.5 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1f.6 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
APIC: 01 (unknown)
APIC: 02 (unknown)
APIC: 03 (unknown)
SMBIOS tables: 347 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum 7081
Writing coreboot table at 0x3f5d5000
CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 27300 size 4d4
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000a0000-00000000000fffff: RESERVED
 3. 0000000000100000-000000003f59ffff: RAM
 4. 000000003f5a0000-000000003f5fffff: CONFIGURATION TABLES
 5. 000000003f600000-000000003fffffff: RESERVED
 6. 00000000e0000000-00000000efffffff: RESERVED
 7. 00000000fed00000-00000000fedfffff: RESERVED
CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
FMAP: Found "FLASH" version 1.1 at 0.
FMAP: base = fff00000 size = 100000 #areas = 3
Wrote coreboot table at: 3f5d5000, 0x750 bytes, checksum 5d05
coreboot table: 1896 bytes.
IMD ROOT    0. 3f5ff000 00001000
IMD SMALL   1. 3f5fe000 00001000
CONSOLE     2. 3f5de000 00020000
TIME STAMP  3. 3f5dd000 00000400
COREBOOT    4. 3f5d5000 00008000
ACPI        5. 3f5b1000 00024000
TCPA LOG    6. 3f5a1000 00010000
SMBIOS      7. 3f5a0000 00000800
IMD small region:
  IMD ROOT    0. 3f5fec00 00000400
  GDT         1. 3f5fea00 00000200
  ACPI GNVS   2. 3f5fe900 00000100
BS: BS_WRITE_TABLES times (us): entry 0 run 6338 exit 0
CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 29740 size f63b
Loading segment from ROM address 0xfff29878
  code (compression=1)
  New segment dstaddr 0xe3240 memsize 0x1cdc0 srcaddr 0xfff298b0 filesize 0xf603
Loading segment from ROM address 0xfff29894
  Entry Point 0x000ff06e
Payload being loaded at below 1MiB without region being marked as RAM usable.
Bounce Buffer at 3f4fd000, 664928 bytes
Loading Segment: addr: 0x00000000000e3240 memsz: 0x000000000001cdc0 filesz: 0x000000000000f603
lb: [0x0000000000100000, 0x00000000001512b0)
Post relocation: addr: 0x00000000000e3240 memsz: 0x000000000001cdc0 filesz: 0x000000000000f603
using LZMA
[ 0x000e3240, 00100000, 0x00100000) <- fff298b0
dest 000e3240, end 00100000, bouncebuffer 3f4fd000
Loaded segments
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 34647 exit 0
ICH7 watchdog disabled
Jumping to boot code at 000ff06e(3f5d5000)
CPU0: stack: 00128000 - 00129000, lowest used address 00128b40, stack used: 1216 bytes
entry    = 0x000ff06e
lb_start = 0x00100000
lb_size  = 0x000512b0
buffer   = 0x3f4fd000
SeaBIOS (version rel-1.10.1-0-g8891697)
BUILD: gcc: (coreboot toolchain v1.44 March 3rd, 2017) 6.3.0 binutils: (GNU Binutils) 2.28
Found coreboot cbmem console @ 3f5de000
Found mainboard Intel D510MO
Relocating init from 0x000e47a0 to 0x3f553e00 (size 49504)
Found CBFS header at 0xfff00138
multiboot: eax=0, ebx=0
Found 18 PCI devices (max PCI bus is 05)
Copying SMBIOS entry point from 0x3f5a0000 to 0x000f08e0
Copying ACPI RSDP from 0x3f5b1000 to 0x000f08b0
Using pmtimer, ioport 0x508
Scan for VGA option rom
Running option rom at c000:0003
pmm call arg1=0
Turning on vga text mode console
SeaBIOS (version rel-1.10.1-0-g8891697)
EHCI init on dev 00:1d.7 (regs=0xd0404020)
UHCI init on dev 00:1d.0 (io=2000)
UHCI init on dev 00:1d.1 (io=2020)
UHCI init on dev 00:1d.2 (io=2040)
UHCI init on dev 00:1d.3 (io=2060)
AHCI controller at 00:1f.2, iobase 0xd0405000, irq 0
Found 0 lpt ports
Found 2 serial ports
Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0
AHCI/0: Set transfer mode to UDMA-5
AHCI/0: registering: "AHCI/0: TOSHIBA MK1676GSX H ATA-8 Hard-Disk (149 GiBytes)"
PS2 keyboard initialized
All threads complete.
Scan for option roms

Press ESC for boot menu.

Searching bootorder for: HALT
drive 0x000f0840: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=312581808
Space available for UMB: c6800-ec800, f0000-f0840
Returned 258048 bytes of ZoneHigh
e820 map has 7 items:
  0: 0000000000000000 - 000000000009fc00 = 1 RAM
  1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
  2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
  3: 0000000000100000 - 000000003f59f000 = 1 RAM
  4: 000000003f59f000 - 0000000040000000 = 2 RESERVED
  5: 00000000e0000000 - 00000000f0000000 = 2 RESERVED
  6: 00000000fed00000 - 00000000fee00000 = 2 RESERVED
enter handle_19:
  NULL
Booting from Hard Disk...
Booting from 0000:7c00