lenovo/t430s/4.5-1094-ga154a91/2017-03-01T16_04_35Z/coreboot_console.txt

coreboot-4.5-1094-ga154a91 Wed Mar  1 16:04:35 UTC 2017 romstage starting...
Setting up static southbridge registers... done.
Disabling Watchdog reboot... done.
Setting up static northbridge registers... done.
Initializing Graphics...
Back from sandybridge_early_initialization()
SMBus controller enabled.
CPU id(306a9): Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz
AES supported, TXT supported, VT supported
PCH type: QM77, device id: 1e55, rev id 4
Intel ME early init
Intel ME firmware is ready
ME: Requested 32MB UMA
Starting native Platform init
CBFS: 'Master Header Locator' located CBFS at [f00100:ffffc0)
CBFS: Locating 'mrc.cache'
CBFS: Found @ offset 1fec0 size 10000
find_current_mrc_cache_local: picked entry 0 from cache block
Trying stored timings.
Starting RAM training (1).
PLL busy... done in 10 us
MCU frequency is set at : 800 MHz
Done dimm mapping
Update PCI-E configuration space:
PCI(0, 0, 0)[a0] = 0
PCI(0, 0, 0)[a4] = 1
PCI(0, 0, 0)[bc] = 82a00000
PCI(0, 0, 0)[a8] = 7b600000
PCI(0, 0, 0)[ac] = 1
PCI(0, 0, 0)[b8] = 80000000
PCI(0, 0, 0)[b0] = 80a00000
PCI(0, 0, 0)[b4] = 80800000
PCI(0, 0, 0)[7c] = 7f
PCI(0, 0, 0)[70] = fe000000
PCI(0, 0, 0)[74] = 0
PCI(0, 0, 0)[78] = fe000c00
Done memory map
Done io registers
t123: 1767, 6000, 7620
ME: FW Partition Table      : OK
ME: Bringup Loader Failure  : NO
ME: Firmware Init Complete  : NO
ME: Manufacturing Mode      : NO
ME: Boot Options Present    : NO
ME: Update In Progress      : NO
ME: Current Working State   : Recovery
ME: Current Operation State : Bring up
ME: Current Operation Mode  : Normal
ME: Error Code              : No Error
ME: Progress Phase          : BUP Phase
ME: Power Management Event  : Clean Moff->Mx wake
ME: Progress Phase State    : Waiting for DID BIOS message
ME: FWS2: 0x101f017a
ME:  Bist in progress: 0x0
ME:  ICC Status      : 0x1
ME:  Invoke MEBx     : 0x1
ME:  CPU replaced    : 0x1
ME:  MBP ready       : 0x1
ME:  MFS failure     : 0x1
ME:  Warm reset req  : 0x0
ME:  CPU repl valid  : 0x1
ME:  (Reserved)      : 0x0
ME:  FW update req   : 0x0
ME:  (Reserved)      : 0x0
ME:  Current state   : 0x1f
ME:  Current PM event: 0x0
ME:  Progress code   : 0x1
Full training required
PASSED! Tell ME that DRAM is ready
ME: FWS2: 0x102c017a
ME:  Bist in progress: 0x0
ME:  ICC Status      : 0x1
ME:  Invoke MEBx     : 0x1
ME:  CPU replaced    : 0x1
ME:  MBP ready       : 0x1
ME:  MFS failure     : 0x1
ME:  Warm reset req  : 0x0
ME:  CPU repl valid  : 0x1
ME:  (Reserved)      : 0x0
ME:  FW update req   : 0x0
ME:  (Reserved)      : 0x0
ME:  Current state   : 0x2c
ME:  Current PM event: 0x0
ME:  Progress code   : 0x1
ME: Requested BIOS Action: Continue to boot
ME: FW Partition Table      : OK
ME: Bringup Loader Failure  : NO
ME: Firmware Init Complete  : NO
ME: Manufacturing Mode      : NO
ME: Boot Options Present    : NO
ME: Update In Progress      : NO
ME: Current Working State   : Recovery
ME: Current Operation State : Bring up
ME: Current Operation Mode  : Normal
ME: Error

*** Log truncated, 675 characters dropped. ***

CBMEM entry for DIMM info: 0x7fffe960
MTRR Range: Start=ff000000 End=0 (Size 1000000)
MTRR Range: Start=0 End=1000000 (Size 1000000)
MTRR Range: Start=7f800000 End=80000000 (Size 800000)
MTRR Range: Start=80000000 End=80800000 (Size 800000)
CBFS: 'Master Header Locator' located CBFS at [f00100:ffffc0)
CBFS: Locating 'fallback/ramstage'
CBFS: Found @ offset 2ff00 size 15c1a
Decompressing stage fallback/ramstage @ 0x7ff97fc0 (260816 bytes)
Loading module at 7ff98000 with entry 7ff98000. filesize: 0x2e718 memsize: 0x3fa90
Processing 3031 relocs. Offset value of 0x7fe98000


coreboot-4.5-1094-ga154a91 Wed Mar  1 16:04:35 UTC 2017 ramstage starting...
Normal boot.
BS: BS_PRE_DEVICE times (us): entry 0 run 0 exit 0
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 0 exit 0
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:14.0: enabled 1
PCI: 00:16.0: enabled 0
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:19.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 0
PCI: 00:1c.1: enabled 1
PCI: 00:1c.2: enabled 1
PCI: 00:1c.3: enabled 0
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PNP: 00ff.1: enabled 1
PNP: 0c31.0: enabled 1
PNP: 00ff.2: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
I2C: 00:54: enabled 1
I2C: 00:55: enabled 1
I2C: 00:56: enabled 1
I2C: 00:57: enabled 1
I2C: 00:5c: enabled 1
I2C: 00:5d: enabled 1
I2C: 00:5e: enabled 1
I2C: 00:5f: enabled 1
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 1
Compare with tree...
Root Device: enabled 1
 CPU_CLUSTER: 0: enabled 1
  APIC: 00: enabled 1
  APIC: acac: enabled 0
 DOMAIN: 0000: enabled 1
  PCI: 00:00.0: enabled 1
  PCI: 00:01.0: enabled 1
  PCI: 00:02.0: enabled 1
  PCI: 00:14.0: enabled 1
  PCI: 00:16.0: enabled 0
  PCI: 00:16.1: enabled 0
  PCI: 00:16.2: enabled 0
  PCI: 00:16.3: enabled 0
  PCI: 00:19.0: enabled 1
  PCI: 00:1a.0: enabled 1
  PCI: 00:1b.0: enabled 1
  PCI: 00:1c.0: enabled 0
  PCI: 00:1c.1: enabled 1
  PCI: 00:1c.2: enabled 1
  PCI: 00:1c.3: enabled 0
  PCI: 00:1c.4: enabled 0
  PCI: 00:1c.5: enabled 0
  PCI: 00:1c.6: enabled 0
  PCI: 00:1c.7: enabled 0
  PCI: 00:1d.0: enabled 1
  PCI: 00:1e.0: enabled 0
  PCI: 00:1f.0: enabled 1
   PNP: 00ff.1: enabled 1
   PNP: 0c31.0: enabled 1
   PNP: 00ff.2: enabled 1
  PCI: 00:1f.2: enabled 1
  PCI: 00:1f.3: enabled 1
   I2C: 00:54: enabled 1
   I2C: 00:55: enabled 1
   I2C: 00:56: enabled 1
   I2C: 00:57: enabled 1
   I2C: 00:5c: enabled 1
   I2C: 00:5d: enabled 1
   I2C: 00:5e: enabled 1
   I2C: 00:5f: enabled 1
  PCI: 00:1f.5: enabled 0
  PCI: 00:1f.6: enabled 1
Root Device scanning...
root_dev_scan_bus for Root Device
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/0154] ops
PCI: 00:00.0 [8086/0154] enabled
Capability: type 0x0d @ 0x88
Capability: type 0x01 @ 0x80
Capability: type 0x05 @ 0x90
Capability: type 0x10 @ 0xa0
Capability: type 0x0d @ 0x88
Capability: type 0x01 @ 0x80
Capability: type 0x05 @ 0x90
Capability: type 0x10 @ 0xa0
PCI: 00:01.0 subordinate bus PCI Express
PCI: 00:01.0 [8086/0151] enabled
PCI: 00:02.0 [8086/0000] ops
PCI: 00:02.0 [8086/0166] enabled
PCI: 00:04.0 [8086/0153] enabled
PCI: 00:14.0 [8086/0000] ops
PCI: 00:14.0 [8086/1e31] enabled
PCI: 00:16.0: Disabling device
PCI: 00:16.0 [8086/1e3a] ops
PCI: 00:16.0 [8086/1e3a] disabled
PCI: 00:16.1: Disabling device
PCI: 00:16.2: Disabling device
PCI: 00:16.3: Disabling device
PCI: 00:19.0 [8086/1502] enabled
PCI: 00:1a.0 [8086/0000] ops
PCI: 00:1a.0 [8086/1e2d] enabled
PCI: 00:1b.0 [8086/0000] ops
PCI: 00:1b.0 [8086/1e20] enabled
PCH: PCIe Root Port coalescing is enabled
PCI: 00:1c.0: Disabling device
PCI: 00:1c.0: check set enabled
PCI: 00:1c.0 [8086/0000] bus ops
PCI: 00:1c.0 [8086/1e10] disabled
PCH: Remap PCIe function 1 to 0
PCI: 00:1c.1 [8086/0000] bus ops
PCI: 00:1c.1 [8086/1e12] enabled
PCH: Remap PCIe function 2 to 0
PCI: 00:1c.2 [8086/0000] bus ops
PCI: 00:1c.2 [8086/1e14] enabled
PCI: 00:1c.3: Disabling device
PCI: 00:1c.4: Disabling device
PCI: 00:1c.4: check set enabled
PCI: 00:1c.4 [8086/0000] bus ops
PCI: 00:1c.4 [8086/1e18] disabled
PCI: 00:1c.5: Disabling device
PCI: 00:1c.6: Disabling device
PCI: 00:1c.7: Disabling device
PCH: RPFN 0x76543210 -> 0xfedcb10a
PCH: PCIe map 1c.0 -> 1c.2
PCH: PCIe map 1c.1 -> 1c.0
PCH: PCIe map 1c.2 -> 1c.1
PCI: 00:1d.0 [8086/0000] ops
PCI: 00:1d.0 [8086/1e26] enabled
PCI: 00:1e.0: Disabling device
PCI: 00:1f.0 [8086/0000] bus ops
PCI: 00:1f.0 [8086/1e55] enabled
PCI: 00:1f.2 [8086/0000] ops
PCI: 00:1f.2 [8086/1e01] enabled
PCI: 00:1f.3 [8086/0000] bus ops
PCI: 00:1f.3 [8086/1e22] enabled
PCI: 00:1f.5: Disabling device
PCI: Static device PCI: 00:1f.6 not found, disabling it.
PCI: 00:01.0 scanning...
do_pci_scan_bridge for PCI: 00:01.0
PCI: pci_scan_bus for bus 01
scan_bus: scanning of bus PCI: 00:01.0 took 9 usecs
PCI: 00:1c.0 scanning...
do_pci_scan_bridge for PCI: 00:1c.0
PCI: pci_scan_bus for bus 02
scan_bus: scanning of bus PCI: 00:1c.0 took 51 usecs
PCI: 00:1c.1 scanning...
do_pci_scan_bridge for PCI: 00:1c.1
PCI: pci_scan_bus for bus 03
PCI: 03:00.0 [1180/e823] enabled
Capability: type 0x05 @ 0x50
Capability: type 0x01 @ 0x78
Capability: type 0x10 @ 0x80
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
scan_bus: scanning of bus PCI: 00:1c.1 took 214 usecs
PCI: 00:1f.0 scanning...
scan_lpc_bus for PCI: 00:1f.0
PNP: 00ff.1 enabled
PNP: 0c31.0 enabled
recv_ec_data: 0x47
recv_ec_data: 0x37
recv_ec_data: 0x48
recv_ec_data: 0x54
recv_ec_data: 0x32
recv_ec_data: 0x39
recv_ec_data: 0x57
recv_ec_data: 0x57
recv_ec_data: 0x16
recv_ec_data: 0x03
recv_ec_data: 0x50
recv_ec_data: 0x10
EC Firmware ID G7HT29WW-3.22, Version 5.01A
recv_ec_data: 0x00
recv_ec_data: 0x40
recv_ec_data: 0x90
recv_ec_data: 0x60
recv_ec_data: 0x70
recv_ec_data: 0x00
recv_ec_data: 0xa7
recv_ec_data: 0xa7
recv_ec_data: 0x70
PNP: 00ff.2 enabled
scan_lpc_bus for PCI: 00:1f.0 done
scan_bus: scanning of bus PCI: 00:1f.0 took 4518 usecs
PCI: 00:1f.3 scanning...
scan_generic_bus for PCI: 00:1f.3
bus: PCI: 00:1f.3[0]->I2C: 01:54 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled
scan_generic_bus for PCI: 00:1f.3 done
scan_bus: scanning of bus PCI: 00:1f.3 took 18 usecs
scan_bus: scanning of bus DOMAIN: 0000 took 5126 usecs
root_dev_scan_bus for Root Device done
scan_bus: scanning of bus Root Device took 5131 usecs
done
BS: BS_DEV_ENUMERATE times (us): entry 0 run 5229 exit 0
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0
Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000.
PCI: 00:01.0 read_resources bus 1 link: 0
PCI: 00:01.0 read_resources bus 1 link: 0 done
PCI: 00:1c.0 read_resources bus 2 link: 0
PCI: 00:1c.0 read_resources bus 2 link: 0 done
PCI: 00:1c.1 read_resources bus 3 link: 0
PCI: 00:1c.1 read_resources bus 3 link: 0 done
PCI: 00:1f.0 read_resources bus 0 link: 0
PNP: 00ff.1 missing read_resources
PNP: 0c31.0 missing read_resources
PNP: 00ff.2 missing read_resources
PCI: 00:1f.0 read_resources bus 0 link: 0 done
PCI: 00:1f.3 read_resources bus 1 link: 0
PCI: 00:1f.3 read_resources bus 1 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
   APIC: acac
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
   PCI: 00:00.0
   PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60
   PCI: 00:01.0
   PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
   PCI: 00:02.0
   PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10
   PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
   PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
   PCI: 00:04.0
   PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
   PCI: 00:14.0
   PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
   PCI: 00:16.0
   PCI: 00:16.1
   PCI: 00:16.2
   PCI: 00:16.3
   PCI: 00:19.0
   PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
   PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
   PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
   PCI: 00:1a.0
   PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
   PCI: 00:1b.0
   PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
   PCI: 00:1c.2
   PCI: 00:1c.0
   PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
   PCI: 00:1c.1 child on link 0 PCI: 03:00.0
   PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 03:00.0
    PCI: 03:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
   PCI: 00:1c.3
   PCI: 00:1c.4
   PCI: 00:1c.5
   PCI: 00:1c.6
   PCI: 00:1c.7
   PCI: 00:1d.0
   PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
   PCI: 00:1e.0
   PCI: 00:1f.0 child on link 0 PNP: 00ff.1
   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
   PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200
   PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300
    PNP: 00ff.1
    PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77
    PNP: 0c31.0
    PNP: 00ff.2
    PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
    PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64
    PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66
   PCI: 00:1f.2
   PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
   PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
   PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
   PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
   PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
   PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
   PCI: 00:1f.3 child on link 0 I2C: 01:54
   PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
   PCI: 00:1f.3 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
    I2C: 01:54
    I2C: 01:55
    I2C: 01:56
    I2C: 01:57
    I2C: 01:5c
    I2C: 01:5d
    I2C: 01:5e
    I2C: 01:5f
   PCI: 00:1f.5
   PCI: 00:1f.6
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:02.0 20 *  [0x0 - 0x3f] io
PCI: 00:19.0 18 *  [0x40 - 0x5f] io
PCI: 00:1f.2 20 *  [0x60 - 0x7f] io
PCI: 00:1f.2 10 *  [0x80 - 0x87] io
PCI: 00:1f.2 18 *  [0x88 - 0x8f] io
PCI: 00:1f.2 14 *  [0x90 - 0x93] io
PCI: 00:1f.2 1c *  [0x94 - 0x97] io
DOMAIN: 0000 io: base: 98 size: 98 align: 6 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:01.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:01.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 03:00.0 10 *  [0x0 - 0xff] mem
PCI: 00:1c.1 mem: base: 100 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
PCI: 00:02.0 10 *  [0x10000000 - 0x103fffff] mem
PCI: 00:1c.1 20 *  [0x10400000 - 0x104fffff] mem
PCI: 00:19.0 10 *  [0x10500000 - 0x1051ffff] mem
PCI: 00:14.0 10 *  [0x10520000 - 0x1052ffff] mem
PCI: 00:04.0 10 *  [0x10530000 - 0x10537fff] mem
PCI: 00:1b.0 10 *  [0x10538000 - 0x1053bfff] mem
PCI: 00:19.0 14 *  [0x1053c000 - 0x1053cfff] mem
PCI: 00:1f.2 24 *  [0x1053d000 - 0x1053d7ff] mem
PCI: 00:1a.0 10 *  [0x1053e000 - 0x1053e3ff] mem
PCI: 00:1d.0 10 *  [0x1053f000 - 0x1053f3ff] mem
PCI: 00:1f.3 10 *  [0x10540000 - 0x105400ff] mem
DOMAIN: 0000 mem: base: 10540100 size: 10540100 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI: 00:00.0 60 base f8000000 limit fbffffff mem (fixed)
constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
constrain_resources: PCI: 00:1f.0 10000200 base 00001600 limit 0000167b io (fixed)
skipping PNP: 00ff.2@60 fixed resource, size=0!
skipping PNP: 00ff.2@62 fixed resource, size=0!
skipping PNP: 00ff.2@64 fixed resource, size=0!
skipping PNP: 00ff.2@66 fixed resource, size=0!
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 0000167c limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 base e0000000 limit f7ffffff
Setting resources...
DOMAIN: 0000 io: base:167c size:98 align:6 gran:0 limit:ffff
PCI: 00:02.0 20 *  [0x1800 - 0x183f] io
PCI: 00:19.0 18 *  [0x1840 - 0x185f] io
PCI: 00:1f.2 20 *  [0x1860 - 0x187f] io
PCI: 00:1f.2 10 *  [0x1880 - 0x1887] io
PCI: 00:1f.2 18 *  [0x1888 - 0x188f] io
PCI: 00:1f.2 14 *  [0x1890 - 0x1893] io
PCI: 00:1f.2 1c *  [0x1894 - 0x1897] io
DOMAIN: 0000 io: next_base: 1898 size: 98 align: 6 gran: 0 done
PCI: 00:01.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:01.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:1c.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:1c.1 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.1 io: next_base: ffff size: 0 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:e0000000 size:10540100 align:28 gran:0 limit:f7ffffff
PCI: 00:02.0 18 *  [0xe0000000 - 0xefffffff] prefmem
PCI: 00:02.0 10 *  [0xf0000000 - 0xf03fffff] mem
PCI: 00:1c.1 20 *  [0xf0400000 - 0xf04fffff] mem
PCI: 00:19.0 10 *  [0xf0500000 - 0xf051ffff] mem
PCI: 00:14.0 10 *  [0xf0520000 - 0xf052ffff] mem
PCI: 00:04.0 10 *  [0xf0530000 - 0xf0537fff] mem
PCI: 00:1b.0 10 *  [0xf0538000 - 0xf053bfff] mem
PCI: 00:19.0 14 *  [0xf053c000 - 0xf053cfff] mem
PCI: 00:1f.2 24 *  [0xf053d000 - 0xf053d7ff] mem
PCI: 00:1a.0 10 *  [0xf053e000 - 0xf053e3ff] mem
PCI: 00:1d.0 10 *  [0xf053f000 - 0xf053f3ff] mem
PCI: 00:1f.3 10 *  [0xf0540000 - 0xf05400ff] mem
DOMAIN: 0000 mem: next_base: f0540100 size: 10540100 align: 28 gran: 0 done
PCI: 00:01.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:01.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:01.0 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:01.0 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:1c.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.0 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:1c.0 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.1 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:1c.1 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.1 mem: base:f0400000 size:100000 align:20 gran:20 limit:f04fffff
PCI: 03:00.0 10 *  [0xf0400000 - 0xf04000ff] mem
PCI: 00:1c.1 mem: next_base: f0400100 size: 100000 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
TOUUD 0x17b600000 TOLUD 0x82a00000 TOM 0x100000000
MEBASE 0xfe000000
IGD decoded, subtracting 32M UMA and 2M GTT
TSEG base 0x80000000 size 8M
Available memory below 4GB: 2048M
Available memory above 4GB: 1974M
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:01.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:01.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:01.0 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 mem
PCI: 00:02.0 10 <- [0x00f0000000 - 0x00f03fffff] size 0x00400000 gran 0x16 mem64
PCI: 00:02.0 18 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 00:02.0 20 <- [0x0000001800 - 0x000000183f] size 0x00000040 gran 0x06 io
PCI: 00:04.0 10 <- [0x00f0530000 - 0x00f0537fff] size 0x00008000 gran 0x0f mem64
PCI: 00:14.0 10 <- [0x00f0520000 - 0x00f052ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:19.0 10 <- [0x00f0500000 - 0x00f051ffff] size 0x00020000 gran 0x11 mem
PCI: 00:19.0 14 <- [0x00f053c000 - 0x00f053cfff] size 0x00001000 gran 0x0c mem
PCI: 00:19.0 18 <- [0x0000001840 - 0x000000185f] size 0x00000020 gran 0x05 io
PCI: 00:1a.0 10 <- [0x00f053e000 - 0x00f053e3ff] size 0x00000400 gran 0x0a mem
PCI: 00:1b.0 10 <- [0x00f0538000 - 0x00f053bfff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:1c.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:1c.0 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 mem
PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io
PCI: 00:1c.1 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 03 prefmem
PCI: 00:1c.1 20 <- [0x00f0400000 - 0x00f04fffff] size 0x00100000 gran 0x14 bus 03 mem
PCI: 00:1c.1 assign_resources, bus 3 link: 0
PCI: 03:00.0 10 <- [0x00f0400000 - 0x00f04000ff] size 0x00000100 gran 0x08 mem
PCI: 00:1c.1 assign_resources, bus 3 link: 0
PCI: 00:1d.0 10 <- [0x00f053f000 - 0x00f053f3ff] size 0x00000400 gran 0x0a mem
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PNP: 00ff.1 missing set_resources
PNP: 00ff.2 missing set_resources
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PCI: 00:1f.2 10 <- [0x0000001880 - 0x0000001887] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 14 <- [0x0000001890 - 0x0000001893] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 18 <- [0x0000001888 - 0x000000188f] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 1c <- [0x0000001894 - 0x0000001897] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 20 <- [0x0000001860 - 0x000000187f] size 0x00000020 gran 0x05 io
PCI: 00:1f.2 24 <- [0x00f053d000 - 0x00f053d7ff] size 0x00000800 gran 0x0b mem
PCI: 00:1f.3 10 <- [0x00f0540000 - 0x00f05400ff] size 0x00000100 gran 0x08 mem64
PCI: 00:1f.3 assign_resources, bus 1 link: 0
PCI: 00:1f.3 assign_resources, bus 1 link: 0
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
   APIC: acac
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 167c size 98 align 6 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base e0000000 size 10540100 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100
  DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
  DOMAIN: 0000 resource base 100000 size 7ff00000 align 0 gran 0 limit 0 flags e0004200 index 4
  DOMAIN: 0000 resource base 100000000 size 7b600000 align 0 gran 0 limit 0 flags e0004200 index 5
  DOMAIN: 0000 resource base 80000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6
  DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
  DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8
  DOMAIN: 0000 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
  DOMAIN: 0000 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
   PCI: 00:00.0
   PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60
   PCI: 00:01.0
   PCI: 00:01.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:01.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
   PCI: 00:01.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20
   PCI: 00:02.0
   PCI: 00:02.0 resource base f0000000 size 400000 align 22 gran 22 limit f03fffff flags 60000201 index 10
   PCI: 00:02.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001201 index 18
   PCI: 00:02.0 resource base 1800 size 40 align 6 gran 6 limit 183f flags 60000100 index 20
   PCI: 00:04.0
   PCI: 00:04.0 resource base f0530000 size 8000 align 15 gran 15 limit f0537fff flags 60000201 index 10
   PCI: 00:14.0
   PCI: 00:14.0 resource base f0520000 size 10000 align 16 gran 16 limit f052ffff flags 60000201 index 10
   PCI: 00:16.0
   PCI: 00:16.1
   PCI: 00:16.2
   PCI: 00:16.3
   PCI: 00:19.0
   PCI: 00:19.0 resource base f0500000 size 20000 align 17 gran 17 limit f051ffff flags 60000200 index 10
   PCI: 00:19.0 resource base f053c000 size 1000 align 12 gran 12 limit f053cfff flags 60000200 index 14
   PCI: 00:19.0 resource base 1840 size 20 align 5 gran 5 limit 185f flags 60000100 index 18
   PCI: 00:1a.0
   PCI: 00:1a.0 resource base f053e000 size 400 align 12 gran 10 limit f053e3ff flags 60000200 index 10
   PCI: 00:1b.0
   PCI: 00:1b.0 resource base f0538000 size 4000 align 14 gran 14 limit f053bfff flags 60000201 index 10
   PCI: 00:1c.2
   PCI: 00:1c.0
   PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:1c.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
   PCI: 00:1c.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20
   PCI: 00:1c.1 child on link 0 PCI: 03:00.0
   PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:1c.1 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
   PCI: 00:1c.1 resource base f0400000 size 100000 align 20 gran 20 limit f04fffff flags 60080202 index 20
    PCI: 03:00.0
    PCI: 03:00.0 resource base f0400000 size 100 align 12 gran 8 limit f04000ff flags 60000200 index 10
   PCI: 00:1c.3
   PCI: 00:1c.4
   PCI: 00:1c.5
   PCI: 00:1c.6
   PCI: 00:1c.7
   PCI: 00:1d.0
   PCI: 00:1d.0 resource base f053f000 size 400 align 12 gran 10 limit f053f3ff flags 60000200 index 10
   PCI: 00:1e.0
   PCI: 00:1f.0 child on link 0 PNP: 00ff.1
   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
   PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200
   PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300
    PNP: 00ff.1
    PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77
    PNP: 0c31.0
    PNP: 00ff.2
    PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
    PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64
    PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66
   PCI: 00:1f.2
   PCI: 00:1f.2 resource base 1880 size 8 align 3 gran 3 limit 1887 flags 60000100 index 10
   PCI: 00:1f.2 resource base 1890 size 4 align 2 gran 2 limit 1893 flags 60000100 index 14
   PCI: 00:1f.2 resource base 1888 size 8 align 3 gran 3 limit 188f flags 60000100 index 18
   PCI: 00:1f.2 resource base 1894 size 4 align 2 gran 2 limit 1897 flags 60000100 index 1c
   PCI: 00:1f.2 resource base 1860 size 20 align 5 gran 5 limit 187f flags 60000100 index 20
   PCI: 00:1f.2 resource base f053d000 size 800 align 12 gran 11 limit f053d7ff flags 60000200 index 24
   PCI: 00:1f.3 child on link 0 I2C: 01:54
   PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
   PCI: 00:1f.3 resource base f0540000 size 100 align 12 gran 8 limit f05400ff flags 60000201 index 10
    I2C: 01:54
    I2C: 01:55
    I2C: 01:56
    I2C: 01:57
    I2C: 01:5c
    I2C: 01:5d
    I2C: 01:5e
    I2C: 01:5f
   PCI: 00:1f.5
   PCI: 00:1f.6
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 2040 exit 0
Enabling resources...
PCI: 00:00.0 subsystem <- 17aa/21fb
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 bridge ctrl <- 0003
PCI: 00:01.0 cmd <- 00
PCI: 00:02.0 subsystem <- 17aa/21fb
PCI: 00:02.0 cmd <- 03
PCI: 00:04.0 cmd <- 02
PCI: 00:14.0 subsystem <- 17aa/21fb
PCI: 00:14.0 cmd <- 102
PCI: 00:19.0 subsystem <- 17aa/21f3
PCI: 00:19.0 cmd <- 103
PCI: 00:1a.0 subsystem <- 17aa/21fb
PCI: 00:1a.0 cmd <- 102
PCI: 00:1b.0 subsystem <- 17aa/21fb
PCI: 00:1b.0 cmd <- 102
PCI: 00:1c.0 bridge ctrl <- 0003
PCI: 00:1c.0 subsystem <- 17aa/21fb
PCI: 00:1c.0 cmd <- 100
PCI: 00:1c.1 bridge ctrl <- 0003
PCI: 00:1c.1 subsystem <- 17aa/21fb
PCI: 00:1c.1 cmd <- 106
PCI: 00:1d.0 subsystem <- 17aa/21fb
PCI: 00:1d.0 cmd <- 102
pch_decode_init
PCI: 00:1f.0 subsystem <- 17aa/21fb
PCI: 00:1f.0 cmd <- 107
PCI: 00:1f.2 subsystem <- 17aa/21fb
PCI: 00:1f.2 cmd <- 03
PCI: 00:1f.3 subsystem <- 17aa/21fb
PCI: 00:1f.3 cmd <- 103
PCI: 03:00.0 cmd <- 06
done.
BS: BS_DEV_ENABLE times (us): entry 0 run 145 exit 0
Initializing devices...
Root Device init ...
Root Device init finished in 0 usecs
CPU_CLUSTER: 0 init ...
start_eip=0x00001000, code_size=0x00000031
Setting up SMI for CPU
Loading module at 00038000 with entry 00038000. filesize: 0x160 memsize: 0x160
Processing 10 relocs. Offset value of 0x00038000
SMM Module: stub loaded at 00038000. Will call 7ffb1341(7ffd3a00)
Installing SMM handler to 0x80000000
Loading module at 80010000 with entry 80010134. filesize: 0x1258 memsize: 0x5278
Processing 62 relocs. Offset value of 0x80010000
Loading module at 80008000 with entry 80008000. filesize: 0x160 memsize: 0x160
Processing 10 relocs. Offset value of 0x80008000
SMM Module: placing jmp sequence at 80007c00 rel16 0x03fd
SMM Module: placing jmp sequence at 80007800 rel16 0x07fd
SMM Module: placing jmp sequence at 80007400 rel16 0x0bfd
SMM Module: stub loaded at 80008000. Will call 80010134(00000000)
Initializing southbridge SMI... ... pmbase = 0x0500

SMI_STS: MCSMI GPI PM1 
PM1_STS: WAK PWRBTN 
GPE0_STS: GPIO14 GPIO11 GPIO9 GPIO6 GPIO5 GPIO4 GPIO3 GPIO1 GPIO0 EL_SCI/BATLOW 
ALT_GP_SMI_STS: GPI14 GPI11 GPI9 GPI6 GPI5 GPI4 GPI3 GPI1 GPI0 
TCO_STS: 
  ... raise SMI#
In relocation handler: cpu 0
New SMBASE=0x80000000 IEDBASE=0x80400000 @ 0003fc00
Writing SMRR. base = 0x80000006, mask=0xff800800
Relocation complete.
Locking SMM.
Initializing CPU #0
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [f00100:ffffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 12ec0 size 5800
microcode: sig=0x306a9 pf=0x10 revision=0x1b
CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz.
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x0000000080000000 size 0x7ff40000 type 6
0x0000000080000000 - 0x00000000e0000000 size 0x60000000 type 0
0x00000000e0000000 - 0x00000000f0000000 size 0x10000000 type 1
0x00000000f0000000 - 0x0000000100000000 size 0x10000000 type 0
0x0000000100000000 - 0x000000017b600000 size 0x7b600000 type 6
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits
MTRR: default type WB/UC MTRR counts: 4/3.
MTRR: UC selected as default type.
MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6
MTRR: 1 base 0x00000000e0000000 mask 0x0000000ff0000000 type 1
MTRR: 2 base 0x0000000100000000 mask 0x0000000f00000000 type 6

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local APIC... apic_id: 0x00 done.
VMX status: enabled, locked
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2600
Turbo is available but hidden
Turbo has been enabled
CPU: 0 has 2 cores, 2 threads per core
CPU: 0 has core 1
CPU1: stack_base 7ffcd000, stack_end 7ffcdff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 1.
After apic_write.
In relocation handler: cpu 1
New SMBASE=0x7ffffc00 IEDBASE=0x80400000 @ 0003fc00
Writing SMRR. base = 0x80000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
CPU: 0 has core 2
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [f00100:ffffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 12ec0 size 5800
microcode: sig=0x306a9 pf=0x10 revision=0x1b
CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local APIC... apic_id: 0x01 done.
VMX status: enabled, locked
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2600
CPU #1 initialized
CPU2: stack_base 7ffcc000, stack_end 7ffccff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 2.
After apic_write.
In relocation handler: cpu 2
Startup point 1.
Waiting for send to finish...
+New SMBASE=0x7ffff800 IEDBASE=0x80400000 @ 0003fc00
Sending STARTUP #2 to 2.
After apic_write.
Writing SMRR. base = 0x80000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU: 0 has core 3
Initializing CPU #2
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [f00100:ffffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 12ec0 size 5800
microcode: sig=0x306a9 pf=0x10 revision=0x0
microcode: updated to revision 0x1b date=2014-05-29
CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local APIC... apic_id: 0x02 done.
VMX status: enabled, locked
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2600
CPU #2 initialized
CPU3: stack_base 7ffcb000, stack_end 7ffcbff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 3.
After apic_write.
In relocation handler: cpu 3
New SMBASE=0x7ffff400 IEDBASE=0x80400000 @ 0003fc00
Writing SMRR. base = 0x80000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 3.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU #0 initialized
Waiting for 1 CPUS to stop
Initializing CPU #3
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [f00100:ffffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 12ec0 size 5800
microcode: sig=0x306a9 pf=0x10 revision=0x1b
CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local APIC... apic_id: 0x03 done.
VMX status: enabled, locked
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2600
CPU #3 initialized
All AP CPUs stopped (377 loops)
CPU0: stack: 7ffce000 - 7ffcf000, lowest used address 7ffceac0, stack used: 1344 bytes
CPU1: stack: 7ffcd000 - 7ffce000, lowest used address 7ffcdca4, stack used: 860 bytes
CPU2: stack: 7ffcc000 - 7ffcd000, lowest used address 7ffccca4, stack used: 860 bytes
CPU3: stack: 7ffcb000 - 7ffcc000, lowest used address 7ffcbca4, stack used: 860 bytes
CPU_CLUSTER: 0 init finished in 80864 usecs
PCI: 00:00.0 init ...
Disabling PEG12.
Disabling PEG11.
Disabling PEG60.
Set BIOS_RESET_CPL
CPU TDP: 35 Watts
PCI: 00:00.0 init finished in 1011 usecs
PCI: 00:02.0 init ...
GT Power Management Init
IVB GT2 25W-35W Power Meter Weights
GT Power Management Init (post VBIOS)
Initializing VGA without OPROM.
EDID:
00 ff ff ff ff ff ff 00 4c a3 4c 32 00 00 00 00 
00 14 01 03 80 1f 11 78 ea 1d 85 91 56 59 8f 26 
18 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 
01 01 01 01 01 01 5d 26 40 a0 60 84 1e 30 30 20 
25 00 36 ae 10 00 00 19 00 00 00 0f 00 00 00 00 
00 00 00 00 00 32 c8 04 32 00 00 00 00 fe 00 53 
41 4d 53 55 4e 47 0a 20 4c a3 4b 54 00 00 00 fe 
00 4c 54 4e 31 34 30 4b 54 30 33 34 30 31 00 ca 
Extracted contents:
header:          00 ff ff ff ff ff ff 00
serial number:   4c a3 4c 32 00 00 00 00 00 14
version:         01 03
basic params:    80 1f 11 78 ea
chroma info:     1d 85 91 56 59 8f 26 18 50 54
established:     00 00 00
standard:        01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
descriptor 1:    5d 26 40 a0 60 84 1e 30 30 20 25 00 36 ae 10 00 00 19
descriptor 2:    00 00 00 0f 00 00 00 00 00 00 00 00 00 32 c8 04 32 00
descriptor 3:    00 00 00 fe 00 53 41 4d 53 55 4e 47 0a 20 4c a3 4b 54
descriptor 4:    00 00 00 fe 00 4c 54 4e 31 34 30 4b 54 30 33 34 30 31
extensions:      00
checksum:        ca

Manufacturer: SEC Model 324c Serial Number 0
Made week 0 of 2010
EDID version: 1.3
Digital display
Maximum image size: 31 cm x 17 cm
Gamma: 220%
Check DPMS levels
DPMS levels: Standby Suspend Off
Supported color formats: RGB 4:4:4, YCrCb 4:2:2
First detailed timing is preferred timing
Established timings supported:
Standard timings supported:
Detailed timings
Hex of detail: 5d2640a060841e303020250036ae10000019
Detailed mode (IN HEX): Clock 98210 KHz, 136 mm x ae mm
               0640 0670 0690 06e0 hborder 0
               0384 0386 038b 03a2 vborder 0
               -hsync -vsync 
Did detailed timing
Hex of detail: 0000000f00000000000000000032c8043200
Manufacturer-specified data, tag 15
Hex of detail: 000000fe0053414d53554e470a204ca34b54
ASCII string: SAMSUNG
Hex of detail: 000000fe004c544e3134304b543033343031
ASCII string: LTN140KT03401
Checksum
Checksum: 0xca (valid)
EDID block does NOT conform to EDID 1.3!
	Missing name descriptor
	Missing monitor ranges
	Detailed block string not properly terminated
bringing up panel at resolution 1600 x 900
Borders 0 x 0
Blank 160 x 30
Sync 32 x 5
Front porch 48 x 2
Spread spectrum clock
Dual channel
Polarities 1, 1
Data M1=6865376, N1=8388608
Link frequency 270000 kHz
Link M1=190704, N1=524288
Pixel N=5, M1=15, M2=11, P1=3
Pixel clock 98285 kHz
waiting for panel powerup
panel powered up
PCI: 00:02.0 init finished in 38172 usecs
PCI: 00:04.0 init ...
PCI: 00:04.0 init finished in 1 usecs
PCI: 00:14.0 init ...
XHCI: Setting up controller.. done.
PCI: 00:14.0 init finished in 7 usecs
PCI: 00:19.0 init ...
PCI: 00:19.0 init finished in 1 usecs
PCI: 00:1a.0 init ...
EHCI: Setting up controller.. done.
PCI: 00:1a.0 init finished in 13 usecs
PCI: 00:1b.0 init ...
Azalia: base = f0538000
Azalia: codec_mask = 09
Azalia: Initializing codec #3
Azalia: codec viddid: 80862806
Azalia: verb_size: 16
Azalia: verb loaded.
Azalia: Initializing codec #0
Azalia: codec viddid: 10ec0269
Azalia: verb_size: 76
Azalia: verb loaded.
PCI: 00:1b.0 init finished in 5973 usecs
PCI: 00:1c.0 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.0 init finished in 10 usecs
PCI: 00:1c.1 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.1 init finished in 10 usecs
PCI: 00:1d.0 init ...
EHCI: Setting up controller.. done.
PCI: 00:1d.0 init finished in 13 usecs
PCI: 00:1f.0 init ...
pch: lpc_init
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
IOAPIC: Dumping registers
  reg 0x0000: 0x02000000
  reg 0x0001: 0x00170020
  reg 0x0002: 0x00170020
Set power off after power failure.
NMI sources disabled.
PantherPoint PM init
rtc_failed = 0x0
RTC Init
Enabling BIOS updates outside of SMM... Disabling ACPI via APMC:
done.
pch_spi_init
PCI: 00:1f.0 init finished in 486 usecs
PCI: 00:1f.2 init ...
SATA: Initializing...
SATA: Controller in AHCI mode.
ABAR: f053d000
PCI: 00:1f.2 init finished in 85 usecs
PCI: 00:1f.3 init ...
PCI: 00:1f.3 init finished in 7 usecs
PCI: 03:00.0 init ...
PCI: 03:00.0 init finished in 1 usecs
PNP: 00ff.2 init ...
Keyboard init...
Keyboard controller output buffer result timeout
Keyboard controller output buffer result timeout
Keyboard controller output buffer result timeout
Keyboard controller output buffer result timeout
Keyboard controller output buffer result timeout
Keyboard reset failed ACK: 0xaa
PNP: 00ff.2 init finished in 2253296 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:54 init ...
I2C: 01:54 init finished in 1 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:55 init ...
I2C: 01:55 init finished in 1 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:56 init ...
I2C: 01:56 init finished in 1 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:57 init ...
I2C: 01:57 init finished in 1 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:5c init ...
Locking EEPROM RFID
init EEPROM done
I2C: 01:5c init finished in 27542 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:5d init ...
I2C: 01:5d init finished in 1 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:5e init ...
I2C: 01:5e init finished in 1 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:5f init ...
I2C: 01:5f init finished in 1 usecs
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:14.0: enabled 1
PCI: 00:16.0: enabled 0
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:19.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.2: enabled 0
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 1
PCI: 00:1c.3: enabled 0
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PNP: 00ff.1: enabled 1
PNP: 0c31.0: enabled 1
PNP: 00ff.2: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
I2C: 01:54: enabled 1
I2C: 01:55: enabled 1
I2C: 01:56: enabled 1
I2C: 01:57: enabled 1
I2C: 01:5c: enabled 1
I2C: 01:5d: enabled 1
I2C: 01:5e: enabled 1
I2C: 01:5f: enabled 1
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 0
PCI: 00:04.0: enabled 1
PCI: 03:00.0: enabled 1
APIC: 01: enabled 1
APIC: 02: enabled 1
APIC: 03: enabled 1
BS: BS_DEV_INIT times (us): entry 8 run 2407530 exit 0
Finalize devices...
PCI: 00:1f.0 final
Devices finalized
BS: BS_POST_DEVICE times (us): entry 0 run 2 exit 0
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 1 exit 0
Updating MRC cache data.
No MRC cache in cbmem. Can't update flash.
CBFS: 'Master Header Locator' located CBFS at [f00100:ffffc0)
CBFS: Locating 'fallback/dsdt.aml'
CBFS: Found @ offset 45b80 size 344c
CBFS: 'Master Header Locator' located CBFS at [f00100:ffffc0)
CBFS: Locating 'fallback/slic'
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at 7ff2b000.
ACPI:    * FACS
ACPI:    * DSDT
ACPI:    * IGD OpRegion
GET_VBIOS: aa55 8086 0 0 3
 ... VBIOS found at 000c0000
ACPI:    * FADT
ACPI: added table 1/32, length now 40
ACPI:     * SSDT
Found 1 CPU(s) with 4 core(s) each.
PSS: 2601MHz power 35000 control 0x2100 status 0x2100
PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00
PSS: 2400MHz power 31561 control 0x1800 status 0x1800
PSS: 2200MHz power 28247 control 0x1600 status 0x1600
PSS: 2000MHz power 25084 control 0x1400 status 0x1400
PSS: 1800MHz power 22064 control 0x1200 status 0x1200
PSS: 1600MHz power 19135 control 0x1000 status 0x1000
PSS: 1400MHz power 16344 control 0xe00 status 0xe00
PSS: 1200MHz power 13666 control 0xc00 status 0xc00
PSS: 2601MHz power 35000 control 0x2100 status 0x2100
PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00
PSS: 2400MHz power 31561 control 0x1800 status 0x1800
PSS: 2200MHz power 28247 control 0x1600 status 0x1600
PSS: 2000MHz power 25084 control 0x1400 status 0x1400
PSS: 1800MHz power 22064 control 0x1200 status 0x1200
PSS: 1600MHz power 19135 control 0x1000 status 0x1000
PSS: 1400MHz power 16344 control 0xe00 status 0xe00
PSS: 1200MHz power 13666 control 0xc00 status 0xc00
PSS: 2601MHz power 35000 control 0x2100 status 0x2100
PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00
PSS: 2400MHz power 31561 control 0x1800 status 0x1800
PSS: 2200MHz power 28247 control 0x1600 status 0x1600
PSS: 2000MHz power 25084 control 0x1400 status 0x1400
PSS: 1800MHz power 22064 control 0x1200 status 0x1200
PSS: 1600MHz power 19135 control 0x1000 status 0x1000
PSS: 1400MHz power 16344 control 0xe00 status 0xe00
PSS: 1200MHz power 13666 control 0xc00 status 0xc00
PSS: 2601MHz power 35000 control 0x2100 status 0x2100
PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00
PSS: 2400MHz power 31561 control 0x1800 status 0x1800
PSS: 2200MHz power 28247 control 0x1600 status 0x1600
PSS: 2000MHz power 25084 control 0x1400 status 0x1400
PSS: 1800MHz power 22064 control 0x1200 status 0x1200
PSS: 1600MHz power 19135 control 0x1000 status 0x1000
PSS: 1400MHz power 16344 control 0xe00 status 0xe00
PSS: 1200MHz power 13666 control 0xc00 status 0xc00
ACPI: added table 2/32, length now 44
ACPI:    * MCFG
ACPI: added table 3/32, length now 48
ACPI:    * TCPA
TCPA log created at 7ff18000
ACPI: added table 4/32, length now 52
ACPI:    * MADT
ACPI: added table 5/32, length now 56
current = 7ff2fff0
ACPI:     * DMAR
ACPI: added table 6/32, length now 60
current = 7ff300a0
ACPI:    * HPET
ACPI: added table 7/32, length now 64
ACPI: done.
ACPI tables: 20704 bytes.
smbios_write_tables: 7ff17000
recv_ec_data: 0x47
recv_ec_data: 0x37
recv_ec_data: 0x48
recv_ec_data: 0x54
recv_ec_data: 0x32
recv_ec_data: 0x39
recv_ec_data: 0x57
recv_ec_data: 0x57
recv_ec_data: 0x16
recv_ec_data: 0x03
Create SMBIOS type 17
Root Device (LENOVO ThinkPad T430s)
CPU_CLUSTER: 0 (Intel SandyBridge/IvyBridge integrated Northbridge)
APIC: 00 (unknown)
APIC: acac (Intel SandyBridge/IvyBridge CPU)
DOMAIN: 0000 (Intel SandyBridge/IvyBridge integrated Northbridge)
PCI: 00:00.0 (Intel SandyBridge/IvyBridge integrated Northbridge)
PCI: 00:01.0 (Intel SandyBridge/IvyBridge integrated Northbridge)
PCI: 00:02.0 (Intel SandyBridge/IvyBridge integrated Northbridge)
PCI: 00:14.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:16.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:16.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:16.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:16.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:19.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1a.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1b.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.4 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.7 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1d.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1e.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PNP: 00ff.1 (Lenovo Power Management Hardware Hub 7)
PNP: 0c31.0 (unknown)
PNP: 00ff.2 (Lenovo H8 EC)
PCI: 00:1f.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
I2C: 01:54 (AT24RF08C)
I2C: 01:55 (AT24RF08C)
I2C: 01:56 (AT24RF08C)
I2C: 01:57 (AT24RF08C)
I2C: 01:5c (AT24RF08C)
I2C: 01:5d (AT24RF08C)
I2C: 01:5e (AT24RF08C)
I2C: 01:5f (AT24RF08C)
PCI: 00:1f.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:04.0 (unknown)
PCI: 03:00.0 (unknown)
APIC: 01 (unknown)
APIC: 02 (unknown)
APIC: 03 (unknown)
SMBIOS tables: 532 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum 8fe9
Writing coreboot table at 0x7ff4f000
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000a0000-00000000000fffff: RESERVED
 3. 0000000000100000-000000007ff16fff: RAM
 4. 000000007ff17000-000000007fffffff: CONFIGURATION TABLES
 5. 0000000080000000-00000000829fffff: RESERVED
 6. 00000000f8000000-00000000fbffffff: RESERVED
 7. 00000000fed90000-00000000fed91fff: RESERVED
 8. 0000000100000000-000000017b5fffff: RAM
CBFS: 'Master Header Locator' located CBFS at [f00100:ffffc0)
FMAP: Found "FLASH" version 1.1 at f00000.
FMAP: base = ff000000 size = 1000000 #areas = 3
Wrote coreboot table at: 7ff4f000, 0x334 bytes, checksum e7b9
coreboot table: 844 bytes.
IMD ROOT    0. 7ffff000 00001000
IMD SMALL   1. 7fffe000 00001000
CONSOLE     2. 7ffde000 00020000
TIME STAMP  3. 7ffdd000 00000400
ROMSTG STCK 4. 7ffd8000 00005000
RAMSTAGE    5. 7ff97000 00041000
57a9e100    6. 7ff57000 0003fa90
COREBOOT    7. 7ff4f000 00008000
ACPI        8. 7ff2b000 00024000
ACPI GNVS   9. 7ff2a000 00001000
4f444749   10. 7ff28000 00002000
TCPA LOG   11. 7ff18000 00010000
SMBIOS     12. 7ff17000 00000800
IMD small region:
  IMD ROOT    0. 7fffec00 00000400
  CAR GLOBALS 1. 7fffeac0 00000140
  MEM INFO    2. 7fffe960 00000141
  ROMSTAGE    3. 7fffe940 00000004
  57a9e000    4. 7fffe920 00000010
BS: BS_WRITE_TABLES times (us): entry 1 run 26440 exit 0
CBFS: 'Master Header Locator' located CBFS at [f00100:ffffc0)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 49040 size f664
Loading segment from ROM address 0xfff49178
  code (compression=1)
  New segment dstaddr 0xe31e0 memsize 0x1ce20 srcaddr 0xfff491b0 filesize 0xf62c
Loading segment from ROM address 0xfff49194
  Entry Point 0x000ff06e
Payload being loaded at below 1MiB without region being marked as RAM usable.
Loading Segment: addr: 0x00000000000e31e0 memsz: 0x000000000001ce20 filesz: 0x000000000000f62c
lb: [0x000000007ff98000, 0x000000007ffd7a90)
Post relocation: addr: 0x00000000000e31e0 memsz: 0x000000000001ce20 filesz: 0x000000000000f62c
using LZMA
[ 0x000e31e0, 00100000, 0x00100000) <- fff491b0
dest 000e31e0, end 00100000, bouncebuffer ffffffff
Loaded segments
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 21601 exit 0
PCH watchdog disabled
Jumping to boot code at 000ff06e(7ff4f000)
CPU0: stack: 7ffce000 - 7ffcf000, lowest used address 7ffce8b0, stack used: 1872 bytes
SeaBIOS (version rel-1.10.1-0-g8891697)
BUILD: gcc: (coreboot toolchain v1.43 August 31st, 2016) 5.3.0 binutils: (GNU Binutils) 2.26.1
Found coreboot cbmem console @ 7ffde000
Found mainboard LENOVO ThinkPad T430s
Relocating init from 0x000e4740 to 0x7fecae20 (size 49472)
Found CBFS header at 0xfff00138
multiboot: eax=7ffc5f80, ebx=7ffc5f34
Found 15 PCI devices (max PCI bus is 03)
Copying SMBIOS entry point from 0x7ff17000 to 0x000f0860
Copying ACPI RSDP from 0x7ff2b000 to 0x000f0830
Using pmtimer, ioport 0x508
WARNING - Timeout at tis_wait_sts:160!
WARNING - Timeout at tis_wait_sts:160!
Scan for VGA option rom
Running option rom at c000:0003
pmm call arg1=0
Turning on vga text mode console
SeaBIOS (version rel-1.10.1-0-g8891697)
Machine UUID 13cc2201-5180-11cb-a41c-dff2e08fc03b
XHCI init on dev 00:14.0: regs @ 0xf0520000, 8 ports, 32 slots, 32 byte contexts
XHCI    protocol USB  2.00, 4 ports (offset 1), def 3001
XHCI    protocol USB  3.00, 4 ports (offset 5), def 1000
XHCI    extcap 0xc1 @ 0xf0528040
XHCI    extcap 0xc0 @ 0xf0528070
XHCI    extcap 0x1 @ 0xf0528330
EHCI init on dev 00:1a.0 (regs=0xf053e020)
EHCI init on dev 00:1d.0 (regs=0xf053f020)
AHCI controller at 00:1f.2, iobase 0xf053d000, irq 10
Searching bootorder for: /pci@i0cf8/pci-bridge@1c,1/*@0
Found 0 lpt ports
Found 0 serial ports
XHCI no devices found
USB keyboard initialized
Initialized USB HUB (1 ports used)
Initialized USB HUB (1 ports used)
PS2 keyboard initialized
Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0
AHCI/0: Set transfer mode to UDMA-6
AHCI/0: registering: "AHCI/0: Samsung SSD 850 EVO 1TB ATA-9 Hard-Disk (931 GiBytes)"
WARNING - Timeout at ehci_wait_td:516!
ehci pipe=0x7fec4580 cur=7feb7e00 tok=80080d80 next=7feb7e40 td=0x7feb7e00 status=80080d80
Initialized USB HUB (0 ports used)
All threads complete.
Scan for option roms

Press ESC for boot menu.

WARNING - Timeout at tis_wait_sts:160!
Searching bootorder for: HALT
drive 0x000f07c0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=1953525168
Space available for UMB: c6800-ec800, f0000-f07c0
Returned 184320 bytes of ZoneHigh
e820 map has 8 items:
  0: 0000000000000000 - 000000000009fc00 = 1 RAM
  1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
  2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
  3: 0000000000100000 - 000000007ff04000 = 1 RAM
  4: 000000007ff04000 - 0000000082a00000 = 2 RESERVED
  5: 00000000f8000000 - 00000000fc000000 = 2 RESERVED
  6: 00000000fed90000 - 00000000fed92000 = 2 RESERVED
  7: 0000000100000000 - 000000017b600000 = 1 RAM
enter handle_19:
  NULL
Booting from Hard Disk...
Booting from 0000:7c00