amd/lamar/4.0-9540-gae5ab60/2015-04-30T02:12:19Z/coreboot_console.txt

coreboot-4.0-9540-gae5ab60 Thu Apr 30 02:12:19 UTC 2015 ramstage starting...
ERROR: failed to allocate timestamp table
BS: BS_PRE_DEVICE times (us): entry 0 run 1 exit 0
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 5 exit 0
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 10: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:00.2: enabled 0
PCI: 00:01.0: enabled 1
PCI: 00:01.1: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:02.1: enabled 1
PCI: 00:02.2: enabled 0
PCI: 00:03.0: enabled 1
PCI: 00:03.1: enabled 1
PCI: 00:03.2: enabled 1
PCI: 00:03.3: enabled 0
PCI: 00:03.4: enabled 0
PCI: 00:03.5: enabled 0
PCI: 00:04.0: enabled 1
PCI: 00:10.0: enabled 1
PCI: 00:10.1: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 00:50: enabled 1
I2C: 00:51: enabled 1
I2C: 00:52: enabled 1
I2C: 00:53: enabled 1
PCI: 00:14.1: enabled 1
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PNP: 004e.0: enabled 1
PNP: 004e.1: enabled 1
PNP: 004e.2: enabled 0
PNP: 004e.3: enabled 0
PNP: 004e.8: enabled 0
PCI: 00:14.4: enabled 1
PCI: 00:14.5: enabled 1
PCI: 00:14.7: enabled 1
PCI: 00:15.0: enabled 1
PCI: 00:15.1: enabled 1
PCI: 00:15.2: enabled 1
PCI: 00:15.3: enabled 0
PCI: 00:16.0: enabled 1
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
Compare with tree...
Root Device: enabled 1
 CPU_CLUSTER: 0: enabled 1
  APIC: 10: enabled 1
 DOMAIN: 0000: enabled 1
  PCI: 00:00.0: enabled 1
  PCI: 00:00.2: enabled 0
  PCI: 00:01.0: enabled 1
  PCI: 00:01.1: enabled 1
  PCI: 00:02.0: enabled 1
  PCI: 00:02.1: enabled 1
  PCI: 00:02.2: enabled 0
  PCI: 00:03.0: enabled 1
  PCI: 00:03.1: enabled 1
  PCI: 00:03.2: enabled 1
  PCI: 00:03.3: enabled 0
  PCI: 00:03.4: enabled 0
  PCI: 00:03.5: enabled 0
  PCI: 00:04.0: enabled 1
  PCI: 00:10.0: enabled 1
  PCI: 00:10.1: enabled 1
  PCI: 00:11.0: enabled 1
  PCI: 00:12.0: enabled 1
  PCI: 00:12.2: enabled 1
  PCI: 00:13.0: enabled 1
  PCI: 00:13.2: enabled 1
  PCI: 00:14.0: enabled 1
   I2C: 00:50: enabled 1
   I2C: 00:51: enabled 1
   I2C: 00:52: enabled 1
   I2C: 00:53: enabled 1
  PCI: 00:14.1: enabled 1
  PCI: 00:14.2: enabled 1
  PCI: 00:14.3: enabled 1
   PNP: 004e.0: enabled 1
   PNP: 004e.1: enabled 1
   PNP: 004e.2: enabled 0
   PNP: 004e.3: enabled 0
   PNP: 004e.8: enabled 0
  PCI: 00:14.4: enabled 1
  PCI: 00:14.5: enabled 1
  PCI: 00:14.7: enabled 1
  PCI: 00:15.0: enabled 1
  PCI: 00:15.1: enabled 1
  PCI: 00:15.2: enabled 1
  PCI: 00:15.3: enabled 0
  PCI: 00:16.0: enabled 1
  PCI: 00:18.0: enabled 1
  PCI: 00:18.1: enabled 1
  PCI: 00:18.2: enabled 1
  PCI: 00:18.3: enabled 1
  PCI: 00:18.4: enabled 1
  PCI: 00:18.5: enabled 1
Mainboard DB-FP3 Enable.
scan_static_bus for Root Device
setup_bsp_ramtop, TOP MEM: msr.lo = 0xe0000000, msr.hi = 0x00000000
setup_bsp_ramtop, TOP MEM2: msr.lo = 0x1f000000, msr.hi = 0x00000001
setup_uma_memory: system memory size 4GB, topmem2 size 4592MB, topmem size 3584MB
setup_uma_memory: uma size 512MB, memory start 0xc0000000
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
CPU_CLUSTER: 0 scanning...
KaveriPI Debug: Grabbing the AMD Topology Information.
KaveriPI Debug: AMD Topology Number of Modules (@0x00222ed4) is 1
KaveriPI Debug: AMD Topology Number of IOAPICs (@0xffe5e79c) is 3
PCI: 00:18.5 family15h, core_max=0x10, core_nums=0xf, siblings=0x3
lapicid_start=0x10 node 0x0 core 0x0 apicid=0x10
CPU: APIC: 10 enabled
lapicid_start=0x10 node 0x0 core 0x1 apicid=0x11
CPU: APIC: 11 enabled
lapicid_start=0x10 node 0x0 core 0x2 apicid=0x12
CPU: APIC: 12 enabled
lapicid_start=0x10 node 0x0 core 0x3 apicid=0x13
CPU: APIC: 13 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [1022/1422] enabled
PCI: 00:01.0 [1002/131c] enabled
PCI: 00:01.1 [1002/1308] enabled
PCI: 00:02.0 [1022/1424] enabled
PCI: Static device PCI: 00:02.1 not found, disabling it.
PCI: 00:03.0 [1022/1424] enabled
PCI: Static device PCI: 00:03.1 not found, disabling it.
PCI: Static device PCI: 00:03.2 not found, disabling it.
PCI: 00:04.0 [1022/1424] enabled
hudson_enable()
PCI: 00:10.0 [1022/7814] enabled
hudson_enable()
PCI: 00:10.1 [1022/7814] enabled
hudson_enable()
PCI: 00:11.0 [1022/7800] ops
PCI: 00:11.0 [1022/7800] enabled
hudson_enable()
PCI: 00:12.0 [1022/7807] ops
PCI: 00:12.0 [1022/7807] enabled
hudson_enable()
PCI: 00:12.2 [1022/7808] ops
PCI: 00:12.2 [1022/7808] enabled
hudson_enable()
PCI: 00:13.0 [1022/7807] ops
PCI: 00:13.0 [1022/7807] enabled
hudson_enable()
PCI: 00:13.2 [1022/7808] ops
PCI: 00:13.2 [1022/7808] enabled
hudson_enable()
PCI: 00:14.0 [1022/780b] bus ops
PCI: 00:14.0 [1022/780b] enabled
hudson_enable()
PCI: Static device PCI: 00:14.1 not found, disabling it.
hudson_enable()
PCI: 00:14.2 [1022/780d] ops
PCI: 00:14.2 [1022/780d] enabled
hudson_enable()
PCI: 00:14.3 [1022/780e] bus ops
PCI: 00:14.3 [1022/780e] enabled
hudson_enable()
PCI: 00:14.4 [1022/780f] bus ops
PCI: 00:14.4 [1022/780f] enabled
hudson_enable()
PCI: 00:14.5 [1022/7809] ops
PCI: 00:14.5 [1022/7809] enabled
hudson_enable()
PCI: 00:14.7 [1022/7806] enabled
hudson_enable()
PCI: 00:15.0 [1022/43a0] bus ops
PCI: 00:15.0 [1022/43a0] enabled
hudson_enable()
PCI: Static device PCI: 00:15.1 not found, disabling it.
hudson_enable()
PCI: Static device PCI: 00:15.2 not found, disabling it.
hudson_enable()
hudson_enable()
PCI: Static device PCI: 00:16.0 not found, disabling it.
PCI: 00:18.0 [1022/141a] ops
PCI: 00:18.0 [1022/141a] enabled
PCI: 00:18.1 [1022/141b] enabled
PCI: 00:18.2 [1022/141c] enabled
PCI: 00:18.3 [1022/141d] enabled
PCI: 00:18.4 [1022/141e] enabled
PCI: 00:18.5 [1022/141f] enabled
scan_static_bus for PCI: 00:14.0
smbus: PCI: 00:14.0[0]->I2C: 01:50 enabled
smbus: PCI: 00:14.0[0]->I2C: 01:51 enabled
smbus: PCI: 00:14.0[0]->I2C: 01:52 enabled
smbus: PCI: 00:14.0[0]->I2C: 01:53 enabled
scan_static_bus for PCI: 00:14.0 done
scan_static_bus for PCI: 00:14.3
PNP: 004e.0 enabled
PNP: 004e.1 enabled
PNP: 004e.2 disabled
PNP: 004e.3 disabled
PNP: 004e.8 disabled
scan_static_bus for PCI: 00:14.3 done
do_pci_scan_bridge for PCI: 00:14.4
PCI: pci_scan_bus for bus 01
PCI: pci_scan_bus returning with max=001
do_pci_scan_bridge returns max 1
do_pci_scan_bridge for PCI: 00:15.0
PCI: pci_scan_bus for bus 02
PCI: 02:00.0 [10ec/8168] enabled
PCI: 02:00.1 [10ec/816a] enabled
PCI: 02:00.2 [10ec/816b] enabled
PCI: 02:00.3 [10ec/816c] enabled
PCI: 02:00.4 [10ec/816d] enabled
PCI: pci_scan_bus returning with max=002
do_pci_scan_bridge returns max 2
PCI: pci_scan_bus returning with max=002
scan_static_bus for Root Device done
done
BS: BS_DEV_ENUMERATE times (us): entry 0 run 284430 exit 0
found VGA at PCI: 00:01.0
Setting up VGA for PCI: 00:01.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
APIC: 10 missing read_resources
APIC: 11 missing read_resources
APIC: 12 missing read_resources
APIC: 13 missing read_resources
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
fx_devs=0x1
DOMAIN: 0000 read_resources bus 0 link: 0
PCI: 00:14.0 read_resources bus 1 link: 0
I2C: 01:50 missing read_resources
I2C: 01:51 missing read_resources
I2C: 01:52 missing read_resources
I2C: 01:53 missing read_resources
PCI: 00:14.0 read_resources bus 1 link: 0 done
PCI: 00:14.3 read_resources bus 0 link: 0
PCI: 00:14.3 read_resources bus 0 link: 0 done
PCI: 00:14.4 read_resources bus 1 link: 0
PCI: 00:14.4 read_resources bus 1 link: 0 done
PCI: 00:15.0 read_resources bus 2 link: 0
PCI: 00:15.0 read_resources bus 2 link: 0 done
PCI: 00:18.0 read_resources bus 0 link: 0
PCI: 00:18.0 read_resources bus 0 link: 0 done
PCI: 00:18.0 read_resources bus 0 link: 1
PCI: 00:18.0 read_resources bus 0 link: 1 done
PCI: 00:18.0 read_resources bus 0 link: 2
PCI: 00:18.0 read_resources bus 0 link: 2 done
PCI: 00:18.0 read_resources bus 0 link: 3
PCI: 00:18.0 read_resources bus 0 link: 3 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 10
   APIC: 10
   APIC: 11
   APIC: 12
   APIC: 13
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
   PCI: 00:00.0
   PCI: 00:00.2
   PCI: 00:01.0
   PCI: 00:01.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 10
   PCI: 00:01.0 resource base 0 size 800000 align 23 gran 23 limit ffffffffffffffff flags 1201 index 18
   PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 20
   PCI: 00:01.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 24
   PCI: 00:01.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 index 30
   PCI: 00:01.1
   PCI: 00:01.1 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
   PCI: 00:02.0
   PCI: 00:02.1
   PCI: 00:02.2
   PCI: 00:03.0
   PCI: 00:03.1
   PCI: 00:03.2
   PCI: 00:03.3
   PCI: 00:03.4
   PCI: 00:03.5
   PCI: 00:04.0
   PCI: 00:10.0
   PCI: 00:10.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
   PCI: 00:10.1
   PCI: 00:10.1 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
   PCI: 00:11.0
   PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
   PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
   PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
   PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
   PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
   PCI: 00:11.0 resource base 0 size 800 align 11 gran 11 limit ffffffff flags 200 index 24
   PCI: 00:12.0
   PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
   PCI: 00:12.2
   PCI: 00:12.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
   PCI: 00:13.0
   PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
   PCI: 00:13.2
   PCI: 00:13.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
   PCI: 00:14.0 child on link 0 I2C: 01:50
    I2C: 01:50
    I2C: 01:51
    I2C: 01:52
    I2C: 01:53
   PCI: 00:14.1
   PCI: 00:14.2
   PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
   PCI: 00:14.3 child on link 0 PNP: 004e.0
   PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
   PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
    PNP: 004e.0
    PNP: 004e.0 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
    PNP: 004e.0 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 004e.1
    PNP: 004e.1 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
    PNP: 004e.1 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 004e.2
    PNP: 004e.2 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
    PNP: 004e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 004e.3
    PNP: 004e.3 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
    PNP: 004e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 004e.8
   PCI: 00:14.4
   PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
   PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
   PCI: 00:14.5
   PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
   PCI: 00:14.7
   PCI: 00:14.7 resource base 0 size 100 align 8 gran 8 limit ffffffffffffffff flags 201 index 10
   PCI: 00:15.0 child on link 0 PCI: 02:00.0
   PCI: 00:15.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
   PCI: 00:15.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:15.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 02:00.0
    PCI: 02:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
    PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
    PCI: 02:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 20
    PCI: 02:00.1
    PCI: 02:00.1 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
    PCI: 02:00.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
    PCI: 02:00.1 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 20
    PCI: 02:00.2
    PCI: 02:00.2 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
    PCI: 02:00.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
    PCI: 02:00.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 20
    PCI: 02:00.3
    PCI: 02:00.3 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
    PCI: 02:00.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
    PCI: 02:00.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 20
    PCI: 02:00.4
    PCI: 02:00.4 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
    PCI: 02:00.4 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 18
   PCI: 00:15.1
   PCI: 00:15.2
   PCI: 00:15.3
   PCI: 00:16.0
   PCI: 00:18.0
   PCI: 00:18.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
   PCI: 00:18.1
   PCI: 00:18.2
   PCI: 00:18.3
   PCI: 00:18.4
   PCI: 00:18.5
DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:15.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 02:00.0 10 *  [0x0 - 0xff] io
PCI: 02:00.1 10 *  [0x400 - 0x4ff] io
PCI: 02:00.2 10 *  [0x800 - 0x8ff] io
PCI: 02:00.3 10 *  [0xc00 - 0xcff] io
PCI: 00:15.0 compute_resources_io: base: d00 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:15.0 1c *  [0x0 - 0xfff] io
PCI: 00:01.0 20 *  [0x1000 - 0x10ff] io
PCI: 00:11.0 20 *  [0x1400 - 0x140f] io
PCI: 00:11.0 10 *  [0x1410 - 0x1417] io
PCI: 00:11.0 18 *  [0x1418 - 0x141f] io
PCI: 00:11.0 14 *  [0x1420 - 0x1423] io
PCI: 00:11.0 1c *  [0x1424 - 0x1427] io
DOMAIN: 0000 compute_resources_io: base: 1428 size: 1428 align: 12 gran: 0 limit: ffff done
DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:15.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:15.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:15.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:00.0 20 *  [0x0 - 0x3fff] mem
PCI: 02:00.1 20 *  [0x4000 - 0x7fff] mem
PCI: 02:00.2 20 *  [0x8000 - 0xbfff] mem
PCI: 02:00.3 20 *  [0xc000 - 0xffff] mem
PCI: 02:00.4 18 *  [0x10000 - 0x13fff] mem
PCI: 02:00.0 18 *  [0x14000 - 0x14fff] mem
PCI: 02:00.1 18 *  [0x15000 - 0x15fff] mem
PCI: 02:00.2 18 *  [0x16000 - 0x16fff] mem
PCI: 02:00.3 18 *  [0x17000 - 0x17fff] mem
PCI: 02:00.4 10 *  [0x18000 - 0x18fff] mem
PCI: 00:15.0 compute_resources_mem: base: 19000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:01.0 10 *  [0x0 - 0xfffffff] prefmem
PCI: 00:01.0 18 *  [0x10000000 - 0x107fffff] prefmem
PCI: 00:15.0 20 *  [0x10800000 - 0x108fffff] mem
PCI: 00:01.0 24 *  [0x10900000 - 0x1093ffff] mem
PCI: 00:01.0 30 *  [0x10940000 - 0x1095ffff] mem
PCI: 00:01.1 10 *  [0x10960000 - 0x10963fff] mem
PCI: 00:14.2 10 *  [0x10964000 - 0x10967fff] mem
PCI: 00:10.0 10 *  [0x10968000 - 0x10969fff] mem
PCI: 00:10.1 10 *  [0x1096a000 - 0x1096bfff] mem
PCI: 00:12.0 10 *  [0x1096c000 - 0x1096cfff] mem
PCI: 00:13.0 10 *  [0x1096d000 - 0x1096dfff] mem
PCI: 00:14.5 10 *  [0x1096e000 - 0x1096efff] mem
PCI: 00:11.0 24 *  [0x1096f000 - 0x1096f7ff] mem
PCI: 00:12.2 10 *  [0x1096f800 - 0x1096f8ff] mem
PCI: 00:13.2 10 *  [0x1096f900 - 0x1096f9ff] mem
PCI: 00:14.7 10 *  [0x1096fa00 - 0x1096faff] mem
DOMAIN: 0000 compute_resources_mem: base: 1096fb00 size: 1096fb00 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: DOMAIN: 0000
constrain_resources: PCI: 00:00.0
constrain_resources: PCI: 00:01.0
constrain_resources: PCI: 00:01.1
constrain_resources: PCI: 00:02.0
constrain_resources: PCI: 00:03.0
constrain_resources: PCI: 00:04.0
constrain_resources: PCI: 00:10.0
constrain_resources: PCI: 00:10.1
constrain_resources: PCI: 00:11.0
constrain_resources: PCI: 00:12.0
constrain_resources: PCI: 00:12.2
constrain_resources: PCI: 00:13.0
constrain_resources: PCI: 00:13.2
constrain_resources: PCI: 00:14.0
constrain_resources: I2C: 01:50
constrain_resources: I2C: 01:51
constrain_resources: I2C: 01:52
constrain_resources: I2C: 01:53
constrain_resources: PCI: 00:14.2
constrain_resources: PCI: 00:14.3
constrain_resources: PNP: 004e.0
constrain_resources: PNP: 004e.1
constrain_resources: PCI: 00:14.4
constrain_resources: PCI: 00:14.5
constrain_resources: PCI: 00:14.7
constrain_resources: PCI: 00:15.0
constrain_resources: PCI: 02:00.0
constrain_resources: PCI: 02:00.1
constrain_resources: PCI: 02:00.2
constrain_resources: PCI: 02:00.3
constrain_resources: PCI: 02:00.4
constrain_resources: PCI: 00:18.0
constrain_resources: PCI: 00:18.1
constrain_resources: PCI: 00:18.2
constrain_resources: PCI: 00:18.3
constrain_resources: PCI: 00:18.4
constrain_resources: PCI: 00:18.5
avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 0000ffff
	lim->base 00001000 lim->limit 0000ffff
avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff
	lim->base 00000000 lim->limit f7ffffff
Setting resources...
DOMAIN: 0000 allocate_resources_io: base:1000 size:1428 align:12 gran:0 limit:ffff
Assigned: PCI: 00:15.0 1c *  [0x1000 - 0x1fff] io
Assigned: PCI: 00:01.0 20 *  [0x2000 - 0x20ff] io
Assigned: PCI: 00:11.0 20 *  [0x2400 - 0x240f] io
Assigned: PCI: 00:11.0 10 *  [0x2410 - 0x2417] io
Assigned: PCI: 00:11.0 18 *  [0x2418 - 0x241f] io
Assigned: PCI: 00:11.0 14 *  [0x2420 - 0x2423] io
Assigned: PCI: 00:11.0 1c *  [0x2424 - 0x2427] io
DOMAIN: 0000 allocate_resources_io: next_base: 2428 size: 1428 align: 12 gran: 0 done
PCI: 00:14.4 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:14.4 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:15.0 allocate_resources_io: base:1000 size:1000 align:12 gran:12 limit:ffff
Assigned: PCI: 02:00.0 10 *  [0x1000 - 0x10ff] io
Assigned: PCI: 02:00.1 10 *  [0x1400 - 0x14ff] io
Assigned: PCI: 02:00.2 10 *  [0x1800 - 0x18ff] io
Assigned: PCI: 02:00.3 10 *  [0x1c00 - 0x1cff] io
PCI: 00:15.0 allocate_resources_io: next_base: 1d00 size: 1000 align: 12 gran: 12 done
DOMAIN: 0000 allocate_resources_mem: base:e0000000 size:1096fb00 align:28 gran:0 limit:f7ffffff
Assigned: PCI: 00:01.0 10 *  [0xe0000000 - 0xefffffff] prefmem
Assigned: PCI: 00:01.0 18 *  [0xf0000000 - 0xf07fffff] prefmem
Assigned: PCI: 00:15.0 20 *  [0xf0800000 - 0xf08fffff] mem
Assigned: PCI: 00:01.0 24 *  [0xf0900000 - 0xf093ffff] mem
Assigned: PCI: 00:01.0 30 *  [0xf0940000 - 0xf095ffff] mem
Assigned: PCI: 00:01.1 10 *  [0xf0960000 - 0xf0963fff] mem
Assigned: PCI: 00:14.2 10 *  [0xf0964000 - 0xf0967fff] mem
Assigned: PCI: 00:10.0 10 *  [0xf0968000 - 0xf0969fff] mem
Assigned: PCI: 00:10.1 10 *  [0xf096a000 - 0xf096bfff] mem
Assigned: PCI: 00:12.0 10 *  [0xf096c000 - 0xf096cfff] mem
Assigned: PCI: 00:13.0 10 *  [0xf096d000 - 0xf096dfff] mem
Assigned: PCI: 00:14.5 10 *  [0xf096e000 - 0xf096efff] mem
Assigned: PCI: 00:11.0 24 *  [0xf096f000 - 0xf096f7ff] mem
Assigned: PCI: 00:12.2 10 *  [0xf096f800 - 0xf096f8ff] mem
Assigned: PCI: 00:13.2 10 *  [0xf096f900 - 0xf096f9ff] mem
Assigned: PCI: 00:14.7 10 *  [0xf096fa00 - 0xf096faff] mem
DOMAIN: 0000 allocate_resources_mem: next_base: f096fb00 size: 1096fb00 align: 28 gran: 0 done
PCI: 00:14.4 allocate_resources_prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:14.4 allocate_resources_prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:14.4 allocate_resources_mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:14.4 allocate_resources_mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:15.0 allocate_resources_prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:15.0 allocate_resources_prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:15.0 allocate_resources_mem: base:f0800000 size:100000 align:20 gran:20 limit:f7ffffff
Assigned: PCI: 02:00.0 20 *  [0xf0800000 - 0xf0803fff] mem
Assigned: PCI: 02:00.1 20 *  [0xf0804000 - 0xf0807fff] mem
Assigned: PCI: 02:00.2 20 *  [0xf0808000 - 0xf080bfff] mem
Assigned: PCI: 02:00.3 20 *  [0xf080c000 - 0xf080ffff] mem
Assigned: PCI: 02:00.4 18 *  [0xf0810000 - 0xf0813fff] mem
Assigned: PCI: 02:00.0 18 *  [0xf0814000 - 0xf0814fff] mem
Assigned: PCI: 02:00.1 18 *  [0xf0815000 - 0xf0815fff] mem
Assigned: PCI: 02:00.2 18 *  [0xf0816000 - 0xf0816fff] mem
Assigned: PCI: 02:00.3 18 *  [0xf0817000 - 0xf0817fff] mem
Assigned: PCI: 02:00.4 10 *  [0xf0818000 - 0xf0818fff] mem
PCI: 00:15.0 allocate_resources_mem: next_base: f0819000 size: 100000 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
node 0: mmio_basek=00380000, basek=00400000, limitk=00460000
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:01.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 00:01.0 18 <- [0x00f0000000 - 0x00f07fffff] size 0x00800000 gran 0x17 prefmem64
PCI: 00:01.0 20 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
PCI: 00:01.0 24 <- [0x00f0900000 - 0x00f093ffff] size 0x00040000 gran 0x12 mem
PCI: 00:01.0 30 <- [0x00f0940000 - 0x00f095ffff] size 0x00020000 gran 0x11 romem
PCI: 00:01.1 10 <- [0x00f0960000 - 0x00f0963fff] size 0x00004000 gran 0x0e mem64
PCI: 00:10.0 10 <- [0x00f0968000 - 0x00f0969fff] size 0x00002000 gran 0x0d mem64
PCI: 00:10.1 10 <- [0x00f096a000 - 0x00f096bfff] size 0x00002000 gran 0x0d mem64
PCI: 00:11.0 10 <- [0x0000002410 - 0x0000002417] size 0x00000008 gran 0x03 io
PCI: 00:11.0 14 <- [0x0000002420 - 0x0000002423] size 0x00000004 gran 0x02 io
PCI: 00:11.0 18 <- [0x0000002418 - 0x000000241f] size 0x00000008 gran 0x03 io
PCI: 00:11.0 1c <- [0x0000002424 - 0x0000002427] size 0x00000004 gran 0x02 io
PCI: 00:11.0 20 <- [0x0000002400 - 0x000000240f] size 0x00000010 gran 0x04 io
PCI: 00:11.0 24 <- [0x00f096f000 - 0x00f096f7ff] size 0x00000800 gran 0x0b mem
PCI: 00:12.0 10 <- [0x00f096c000 - 0x00f096cfff] size 0x00001000 gran 0x0c mem
PCI: 00:12.2 10 <- [0x00f096f800 - 0x00f096f8ff] size 0x00000100 gran 0x08 mem
PCI: 00:13.0 10 <- [0x00f096d000 - 0x00f096dfff] size 0x00001000 gran 0x0c mem
PCI: 00:13.2 10 <- [0x00f096f900 - 0x00f096f9ff] size 0x00000100 gran 0x08 mem
PCI: 00:14.2 10 <- [0x00f0964000 - 0x00f0967fff] size 0x00004000 gran 0x0e mem64
PCI: 00:14.3 assign_resources, bus 0 link: 0
PNP: 004e.0 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 004e.0 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 004e.1 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
PNP: 004e.1 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
PCI: 00:14.3 assign_resources, bus 0 link: 0
PCI: 00:14.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:14.4 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:14.4 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 mem
PCI: 00:14.5 10 <- [0x00f096e000 - 0x00f096efff] size 0x00001000 gran 0x0c mem
PCI: 00:14.7 10 <- [0x00f096fa00 - 0x00f096faff] size 0x00000100 gran 0x08 mem64
PCI: 00:15.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 02 io
PCI: 00:15.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:15.0 20 <- [0x00f0800000 - 0x00f08fffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 00:15.0 assign_resources, bus 2 link: 0
PCI: 02:00.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
PCI: 02:00.0 18 <- [0x00f0814000 - 0x00f0814fff] size 0x00001000 gran 0x0c mem64
PCI: 02:00.0 20 <- [0x00f0800000 - 0x00f0803fff] size 0x00004000 gran 0x0e mem64
PCI: 02:00.1 10 <- [0x0000001400 - 0x00000014ff] size 0x00000100 gran 0x08 io
PCI: 02:00.1 18 <- [0x00f0815000 - 0x00f0815fff] size 0x00001000 gran 0x0c mem64
PCI: 02:00.1 20 <- [0x00f0804000 - 0x00f0807fff] size 0x00004000 gran 0x0e mem64
PCI: 02:00.2 10 <- [0x0000001800 - 0x00000018ff] size 0x00000100 gran 0x08 io
PCI: 02:00.2 18 <- [0x00f0816000 - 0x00f0816fff] size 0x00001000 gran 0x0c mem64
PCI: 02:00.2 20 <- [0x00f0808000 - 0x00f080bfff] size 0x00004000 gran 0x0e mem64
PCI: 02:00.3 10 <- [0x0000001c00 - 0x0000001cff] size 0x00000100 gran 0x08 io
PCI: 02:00.3 18 <- [0x00f0817000 - 0x00f0817fff] size 0x00001000 gran 0x0c mem64
PCI: 02:00.3 20 <- [0x00f080c000 - 0x00f080ffff] size 0x00004000 gran 0x0e mem64
PCI: 02:00.4 10 <- [0x00f0818000 - 0x00f0818fff] size 0x00001000 gran 0x0c mem
PCI: 02:00.4 18 <- [0x00f0810000 - 0x00f0813fff] size 0x00004000 gran 0x0e mem64
PCI: 00:15.0 assign_resources, bus 2 link: 0
PCI: 00:18.0 c0010058 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x00 mem <mmconfig>
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 10
   APIC: 10
   APIC: 11
   APIC: 12
   APIC: 13
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 1000 size 1428 align 12 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base e0000000 size 1096fb00 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100
  DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10
  DOMAIN: 0000 resource base c0000 size dff40000 align 0 gran 0 limit 0 flags e0004200 index 20
  DOMAIN: 0000 resource base 100000000 size 1f000000 align 0 gran 0 limit 0 flags e0004200 index 30
  DOMAIN: 0000 resource base c0000000 size 20000000 align 0 gran 0 limit 0 flags f0000200 index 7
   PCI: 00:00.0
   PCI: 00:00.2
   PCI: 00:01.0
   PCI: 00:01.0 resource base e0000000 size 10000000 align 28 gran 28 limit f7ffffff flags 60001201 index 10
   PCI: 00:01.0 resource base f0000000 size 800000 align 23 gran 23 limit f7ffffff flags 60001201 index 18
   PCI: 00:01.0 resource base 2000 size 100 align 8 gran 8 limit ffff flags 60000100 index 20
   PCI: 00:01.0 resource base f0900000 size 40000 align 18 gran 18 limit f7ffffff flags 60000200 index 24
   PCI: 00:01.0 resource base f0940000 size 20000 align 17 gran 17 limit f7ffffff flags 60002200 index 30
   PCI: 00:01.1
   PCI: 00:01.1 resource base f0960000 size 4000 align 14 gran 14 limit f7ffffff flags 60000201 index 10
   PCI: 00:02.0
   PCI: 00:02.1
   PCI: 00:02.2
   PCI: 00:03.0
   PCI: 00:03.1
   PCI: 00:03.2
   PCI: 00:03.3
   PCI: 00:03.4
   PCI: 00:03.5
   PCI: 00:04.0
   PCI: 00:10.0
   PCI: 00:10.0 resource base f0968000 size 2000 align 13 gran 13 limit f7ffffff flags 60000201 index 10
   PCI: 00:10.1
   PCI: 00:10.1 resource base f096a000 size 2000 align 13 gran 13 limit f7ffffff flags 60000201 index 10
   PCI: 00:11.0
   PCI: 00:11.0 resource base 2410 size 8 align 3 gran 3 limit ffff flags 60000100 index 10
   PCI: 00:11.0 resource base 2420 size 4 align 2 gran 2 limit ffff flags 60000100 index 14
   PCI: 00:11.0 resource base 2418 size 8 align 3 gran 3 limit ffff flags 60000100 index 18
   PCI: 00:11.0 resource base 2424 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c
   PCI: 00:11.0 resource base 2400 size 10 align 4 gran 4 limit ffff flags 60000100 index 20
   PCI: 00:11.0 resource base f096f000 size 800 align 11 gran 11 limit f7ffffff flags 60000200 index 24
   PCI: 00:12.0
   PCI: 00:12.0 resource base f096c000 size 1000 align 12 gran 12 limit f7ffffff flags 60000200 index 10
   PCI: 00:12.2
   PCI: 00:12.2 resource base f096f800 size 100 align 8 gran 8 limit f7ffffff flags 60000200 index 10
   PCI: 00:13.0
   PCI: 00:13.0 resource base f096d000 size 1000 align 12 gran 12 limit f7ffffff flags 60000200 index 10
   PCI: 00:13.2
   PCI: 00:13.2 resource base f096f900 size 100 align 8 gran 8 limit f7ffffff flags 60000200 index 10
   PCI: 00:14.0 child on link 0 I2C: 01:50
    I2C: 01:50
    I2C: 01:51
    I2C: 01:52
    I2C: 01:53
   PCI: 00:14.1
   PCI: 00:14.2
   PCI: 00:14.2 resource base f0964000 size 4000 align 14 gran 14 limit f7ffffff flags 60000201 index 10
   PCI: 00:14.3 child on link 0 PNP: 004e.0
   PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
   PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
    PNP: 004e.0
    PNP: 004e.0 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
    PNP: 004e.0 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 004e.1
    PNP: 004e.1 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
    PNP: 004e.1 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 004e.2
    PNP: 004e.2 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
    PNP: 004e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 004e.3
    PNP: 004e.3 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
    PNP: 004e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 004e.8
   PCI: 00:14.4
   PCI: 00:14.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
   PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20
   PCI: 00:14.5
   PCI: 00:14.5 resource base f096e000 size 1000 align 12 gran 12 limit f7ffffff flags 60000200 index 10
   PCI: 00:14.7
   PCI: 00:14.7 resource base f096fa00 size 100 align 8 gran 8 limit f7ffffff flags 60000201 index 10
   PCI: 00:15.0 child on link 0 PCI: 02:00.0
   PCI: 00:15.0 resource base 1000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:15.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
   PCI: 00:15.0 resource base f0800000 size 100000 align 20 gran 20 limit f7ffffff flags 60080202 index 20
    PCI: 02:00.0
    PCI: 02:00.0 resource base 1000 size 100 align 8 gran 8 limit ffff flags 60000100 index 10
    PCI: 02:00.0 resource base f0814000 size 1000 align 12 gran 12 limit f7ffffff flags 60000201 index 18
    PCI: 02:00.0 resource base f0800000 size 4000 align 14 gran 14 limit f7ffffff flags 60000201 index 20
    PCI: 02:00.1
    PCI: 02:00.1 resource base 1400 size 100 align 8 gran 8 limit ffff flags 60000100 index 10
    PCI: 02:00.1 resource base f0815000 size 1000 align 12 gran 12 limit f7ffffff flags 60000201 index 18
    PCI: 02:00.1 resource base f0804000 size 4000 align 14 gran 14 limit f7ffffff flags 60000201 index 20
    PCI: 02:00.2
    PCI: 02:00.2 resource base 1800 size 100 align 8 gran 8 limit ffff flags 60000100 index 10
    PCI: 02:00.2 resource base f0816000 size 1000 align 12 gran 12 limit f7ffffff flags 60000201 index 18
    PCI: 02:00.2 resource base f0808000 size 4000 align 14 gran 14 limit f7ffffff flags 60000201 index 20
    PCI: 02:00.3
    PCI: 02:00.3 resource base 1c00 size 100 align 8 gran 8 limit ffff flags 60000100 index 10
    PCI: 02:00.3 resource base f0817000 size 1000 align 12 gran 12 limit f7ffffff flags 60000201 index 18
    PCI: 02:00.3 resource base f080c000 size 4000 align 14 gran 14 limit f7ffffff flags 60000201 index 20
    PCI: 02:00.4
    PCI: 02:00.4 resource base f0818000 size 1000 align 12 gran 12 limit f7ffffff flags 60000200 index 10
    PCI: 02:00.4 resource base f0810000 size 4000 align 14 gran 14 limit f7ffffff flags 60000201 index 18
   PCI: 00:15.1
   PCI: 00:15.2
   PCI: 00:15.3
   PCI: 00:16.0
   PCI: 00:18.0
   PCI: 00:18.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
   PCI: 00:18.1
   PCI: 00:18.2
   PCI: 00:18.3
   PCI: 00:18.4
   PCI: 00:18.5
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 1193788 exit 0
PCI_INTR tables: Writing registers C00/C01 for PIC mode PCI IRQ routing:
	PCI_INTR_INDEX		PCI_INTR_DATA
	0x00 INTA#		: 0x0A
	0x01 INTB#		: 0x0B
	0x02 INTC#		: 0x0A
	0x03 INTD#		: 0x0B
	0x04 INTE#		: 0x0A
	0x05 INTF#		: 0x0B
	0x06 INTG#		: 0x0A
	0x07 INTH#		: 0x0B
	0x08 Misc		: 0xFA
	0x09 Misc0		: 0xF1
	0x0A Misc1		: 0x00
	0x0B Misc2		: 0x00
	0x0C Ser IRQ INTA	: 0x1F
	0x0D Ser IRQ INTB	: 0x1F
	0x0E Ser IRQ INTC	: 0x1F
	0x0F Ser IRQ INTD	: 0x1F
	0x10 SCI		: 0x1F
	0x11 SMBUS0		: 0x1F
	0x12 ASF		: 0x1F
	0x13 HDA		: 0x1F
	0x14 FC			: 0x1F
	0x15 GEC		: 0x1F
	0x16 PerMon		: 0x1F
	0x17 SD			: 0x0A
	0x20 IMC INT0		: 0x1F
	0x21 IMC INT1		: 0x1F
	0x22 IMC INT2		: 0x1F
	0x23 IMC INT3		: 0x1F
	0x24 IMC INT4		: 0x1F
	0x25 IMC INT5		: 0x1F
	0x30 Dev18.0 INTA	: 0x0B
	0x31 Dev18.2 INTB	: 0x0A
	0x32 Dev19.0 INTA	: 0x0B
	0x33 Dev19.2 INTB	: 0x0A
	0x34 Dev22.0 INTA	: 0x0B
	0x35 Dev22.2 INTB	: 0x0A
	0x36 Dev20.5 INTC	: 0x0B
	0x40 IDE		: 0x1F
	0x41 SATA		: 0x0F
	0x50 GPPInt0		: 0x0A
	0x51 GPPInt1		: 0x0B
	0x52 GPPInt2		: 0x0A
	0x53 GPPInt3		: 0x0B
PCI_INTR tables: Writing registers C00/C01 for APIC mode PCI IRQ routing:
	PCI_INTR_INDEX		PCI_INTR_DATA
	0x00 INTA#		: 0x10
	0x01 INTB#		: 0x11
	0x02 INTC#		: 0x12
	0x03 INTD#		: 0x13
	0x04 INTE#		: 0x14
	0x05 INTF#		: 0x15
	0x06 INTG#		: 0x16
	0x07 INTH#		: 0x17
	0x08 Misc		: 0x00
	0x09 Misc0		: 0x00
	0x0A Misc1		: 0x00
	0x0B Misc2		: 0x00
	0x0C Ser IRQ INTA	: 0x1F
	0x0D Ser IRQ INTB	: 0x1F
	0x0E Ser IRQ INTC	: 0x1F
	0x0F Ser IRQ INTD	: 0x1F
	0x10 SCI		: 0x09
	0x11 SMBUS0		: 0x1F
	0x12 ASF		: 0x1F
	0x13 HDA		: 0x10
	0x14 FC			: 0x1F
	0x15 GEC		: 0x1F
	0x16 PerMon		: 0x1F
	0x17 SD			: 0x10
	0x20 IMC INT0		: 0x1F
	0x21 IMC INT1		: 0x1F
	0x22 IMC INT2		: 0x1F
	0x23 IMC INT3		: 0x1F
	0x24 IMC INT4		: 0x1F
	0x25 IMC INT5		: 0x1F
	0x30 Dev18.0 INTA	: 0x11
	0x31 Dev18.2 INTB	: 0x12
	0x32 Dev19.0 INTA	: 0x11
	0x33 Dev19.2 INTB	: 0x12
	0x34 Dev22.0 INTA	: 0x11
	0x35 Dev22.2 INTB	: 0x12
	0x36 Dev20.5 INTC	: 0x11
	0x40 IDE		: 0x11
	0x41 SATA		: 0x13
	0x50 GPPInt0		: 0x10
	0x51 GPPInt1		: 0x11
	0x52 GPPInt2		: 0x12
	0x53 GPPInt3		: 0x13
PCI_CFG IRQ: Write PCI config space IRQ assignments
PCI IRQ: Found device 0:01.00 using PIN A
PCI Devfn (0x8) not found in pirq_data table
PCI IRQ: Found device 0:01.01 using PIN B
PCI Devfn (0x9) not found in pirq_data table
PCI IRQ: Found device 0:10.00 using PIN A
	Found this device in pirq_data table entry 3
	Orig INT_PIN	: 1 (PIN A)
	PCI_INTR idx	: 0x34 (Dev22.0 INTA)
	INT_LINE	: 0xB (IRQ 11)
PCI IRQ: Found device 0:10.01 using PIN B
	Found this device in pirq_data table entry 4
	Orig INT_PIN	: 2 (PIN B)
	PCI_INTR idx	: 0x35 (Dev22.2 INTB)
	INT_LINE	: 0xA (IRQ 10)
PCI IRQ: Found device 0:11.00 using PIN A
	Found this device in pirq_data table entry 5
	Orig INT_PIN	: 1 (PIN A)
	PCI_INTR idx	: 0x41 (SATA	)
	INT_LINE	: 0xF (IRQ 15)
PCI IRQ: Found device 0:12.00 using PIN A
	Found this device in pirq_data table entry 6
	Orig INT_PIN	: 1 (PIN A)
	PCI_INTR idx	: 0x30 (Dev18.0 INTA)
	INT_LINE	: 0xB (IRQ 11)
PCI IRQ: Found device 0:12.02 using PIN B
	Found this device in pirq_data table entry 7
	Orig INT_PIN	: 2 (PIN B)
	PCI_INTR idx	: 0x31 (Dev18.2 INTB)
	INT_LINE	: 0xA (IRQ 10)
PCI IRQ: Found device 0:13.00 using PIN A
	Found this device in pirq_data table entry 8
	Orig INT_PIN	: 1 (PIN A)
	PCI_INTR idx	: 0x32 (Dev19.0 INTA)
	INT_LINE	: 0xB (IRQ 11)
PCI IRQ: Found device 0:13.02 using PIN B
	Found this device in pirq_data table entry 9
	Orig INT_PIN	: 2 (PIN B)
	PCI_INTR idx	: 0x33 (Dev19.2 INTB)
	INT_LINE	: 0xA (IRQ 10)
PCI IRQ: Found device 0:14.02 using PIN A
	Found this device in pirq_data table entry 12
Got IRQ 0x1F (disabled), perhaps this device was defined wrong?
PCI IRQ: Found device 0:14.05 using PIN C
	Found this device in pirq_data table entry 14
	Orig INT_PIN	: 3 (PIN C)
	PCI_INTR idx	: 0x36 (Dev20.5 INTC)
	INT_LINE	: 0xB (IRQ 11)
PCI IRQ: Found device 0:14.07 using PIN A
	Found this device in pirq_data table entry 15
	Orig INT_PIN	: 1 (PIN A)
	PCI_INTR idx	: 0x17 (SD		)
	INT_LINE	: 0xA (IRQ 10)
PCI IRQ: Found device 2:00.00 using PIN A
	With INT_PIN swizzled to PIN A
	Attached to bridge device 0:15h.00h
	Found this device in pirq_data table entry 16
	Orig INT_PIN	: 1 (PIN A)
	PCI_INTR idx	: 0x00 (INTA#	)
	INT_LINE	: 0xA (IRQ 10)
PCI IRQ: Found device 2:00.01 using PIN B
	With INT_PIN swizzled to PIN B
	Attached to bridge device 0:15h.00h
	Found this device in pirq_data table entry 16
	Orig INT_PIN	: 2 (PIN B)
	PCI_INTR idx	: 0x01 (INTB#	)
	INT_LINE	: 0xB (IRQ 11)
PCI IRQ: Found device 2:00.02 using PIN C
	With INT_PIN swizzled to PIN C
	Attached to bridge device 0:15h.00h
	Found this device in pirq_data table entry 16
	Orig INT_PIN	: 3 (PIN C)
	PCI_INTR idx	: 0x02 (INTC#	)
	INT_LINE	: 0xA (IRQ 10)
PCI IRQ: Found device 2:00.03 using PIN D
	With INT_PIN swizzled to PIN D
	Attached to bridge device 0:15h.00h
	Found this device in pirq_data table entry 16
	Orig INT_PIN	: 4 (PIN D)
	PCI_INTR idx	: 0x03 (INTD#	)
	INT_LINE	: 0xB (IRQ 11)
PCI IRQ: Found device 2:00.04 using PIN D
	With INT_PIN swizzled to PIN D
	Attached to bridge device 0:15h.00h
	Found this device in pirq_data table entry 16
	Orig INT_PIN	: 4 (PIN D)
	PCI_INTR idx	: 0x03 (INTD#	)
	INT_LINE	: 0xB (IRQ 11)
PCI_CFG IRQ: Finished writing PCI config space IRQ assignments
Enabling resources...
  ader - leaving domain_enable_resources.
PCI: 00:00.0 subsystem <- 1022/1410
PCI: 00:00.0 cmd <- 04
PCI: 00:01.0 subsystem <- 1022/1410
PCI: 00:01.0 cmd <- 07
PCI: 00:01.1 subsystem <- 1022/1410
PCI: 00:01.1 cmd <- 02
PCI: 00:02.0 subsystem <- 1022/1410
PCI: 00:02.0 cmd <- 00
PCI: 00:03.0 subsystem <- 1022/1410
PCI: 00:03.0 cmd <- 00
PCI: 00:04.0 subsystem <- 1022/1410
PCI: 00:04.0 cmd <- 00
PCI: 00:10.0 subsystem <- 1022/1410
PCI: 00:10.0 cmd <- 02
PCI: 00:10.1 subsystem <- 1022/1410
PCI: 00:10.1 cmd <- 02
PCI: 00:11.0 cmd <- 03
PCI: 00:12.0 subsystem <- 1022/1410
PCI: 00:12.0 cmd <- 02
PCI: 00:12.2 subsystem <- 1022/1410
PCI: 00:12.2 cmd <- 02
PCI: 00:13.0 subsystem <- 1022/1410
PCI: 00:13.0 cmd <- 02
PCI: 00:13.2 subsystem <- 1022/1410
PCI: 00:13.2 cmd <- 02
PCI: 00:14.0 subsystem <- 1022/1410
PCI: 00:14.0 cmd <- 403
PCI: 00:14.2 subsystem <- 1022/1410
PCI: 00:14.2 cmd <- 02
PCI: 00:14.3 subsystem <- 1022/1410
PCI: 00:14.3 cmd <- 0f
hudson lpc decode:PNP: 004e.0, base=0x000003f8, end=0x000003ff
hudson lpc decode:PNP: 004e.1, base=0x000002f8, end=0x000002ff
PCI: 00:14.4 bridge ctrl <- 0003
PCI: 00:14.4 cmd <- 00
PCI: 00:14.5 subsystem <- 1022/1410
PCI: 00:14.5 cmd <- 02
PCI: 00:14.7 subsystem <- 1022/1410
PCI: 00:14.7 cmd <- 06
PCI: 00:15.0 bridge ctrl <- 0003
PCI: 00:15.0 cmd <- 07
PCI: 00:18.0 cmd <- 00
PCI: 00:18.1 subsystem <- 1022/1410
PCI: 00:18.1 cmd <- 00
PCI: 00:18.2 subsystem <- 1022/1410
PCI: 00:18.2 cmd <- 00
PCI: 00:18.3 subsystem <- 1022/1410
PCI: 00:18.3 cmd <- 00
PCI: 00:18.4 subsystem <- 1022/1410
PCI: 00:18.4 cmd <- 00
PCI: 00:18.5 subsystem <- 1022/1410
PCI: 00:18.5 cmd <- 00
PCI: 02:00.0 cmd <- 03
PCI: 02:00.1 cmd <- 03
PCI: 02:00.2 cmd <- 03
PCI: 02:00.3 cmd <- 03
PCI: 02:00.4 cmd <- 02
done.
BS: BS_DEV_ENABLE times (us): entry 229491 run 104022 exit 0
Initializing devices...
Root Device init
Root Device init 738 usecs
CPU_CLUSTER: 0 init
start_eip=0x00001000, code_size=0x00000031
Initializing CPU #0
CPU: vendor AMD device 630f01
CPU: family 15, model 30, stepping 01
Model 15 Init.

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Enabling cache
Setting up local apic... apic_id: 0x10 done.
siblings = 03, CPU #0 initialized
CPU1: stack_base 00221000, stack_end 00221ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 17.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 17.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
CPU: vendor AMD device 630f01
CPU: family 15, model 30, stepping 01
Model 15 Init.

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Enabling cache
Setting up local apic... apic_id: 0x11 done.
siblings = 03, CPU #1 initialized
CPU2: stack_base 00220000, stack_end 00220ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 18.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 18.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #2
CPU: vendor AMD device 630f01
CPU: family 15, model 30, stepping 01
Model 15 Init.

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Enabling cache
Setting up local apic... apic_id: 0x12 done.
siblings = 03, CPU #2 initialized
CPU3: stack_base 0021f000, stack_end 0021fff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 19.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 19.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #3
Waiting for 1 CPUS to stop
CPU: vendor AMD device 630f01
CPU: family 15, model 30, stepping 01
Model 15 Init.

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Enabling cache
Setting up local apic... apic_id: 0x13 done.
siblings = 03, CPU #3 initialized
All AP CPUs stopped (1035 loops)
CPU1: stack: 00221000 - 00222000, lowest used address 00221e18, stack used: 488 bytes
CPU2: stack: 00220000 - 00221000, lowest used address 00220e18, stack used: 488 bytes
CPU3: stack: 0021f000 - 00220000, lowest used address 0021fe18, stack used: 488 bytes
CPU_CLUSTER: 0 init 143443 usecs
PCI: 00:00.0 init
PCI: 00:00.0 init 782 usecs
PCI: 00:01.0 init
CBFS: WARNING: 'pci1002,131c.rom' not found.
CBFS: Could not find file 'pci1002,131c.rom'.
Mapping PCI device 1002131c to 10021304
In CBFS, ROM address for PCI: 00:01.0 = ff8004f8
PCI expansion ROM, signature 0xaa55, INIT size 0xf600, data ptr 0x01c0
PCI ROM image, vendor ID 1002, device ID 1304,
PCI ROM image, Class Code 030000, Code Type 00
Copying VGA ROM Image from ff8004f8 to 0xc0000, 0xf600 bytes
Real mode stub @00000600: 867 bytes
Calling Option ROM...
... Option ROM returned.
VGA Option ROM was run
PCI: 00:01.0 init 46745 usecs
PCI: 00:01.1 init
PCI: 00:01.1 init 790 usecs
PCI: 00:02.0 init
PCI: 00:02.0 init 782 usecs
PCI: 00:03.0 init
PCI: 00:03.0 init 782 usecs
PCI: 00:04.0 init
PCI: 00:04.0 init 782 usecs
PCI: 00:10.0 init
PCI: 00:10.0 init 782 usecs
PCI: 00:10.1 init
PCI: 00:10.1 init 781 usecs
PCI: 00:11.0 init
PCI: 00:11.0 init 781 usecs
PCI: 00:12.0 init
PCI: 00:12.0 init 782 usecs
PCI: 00:12.2 init
PCI: 00:12.2 init 782 usecs
PCI: 00:13.0 init
PCI: 00:13.0 init 782 usecs
PCI: 00:13.2 init
PCI: 00:13.2 init 782 usecs
PCI: 00:14.0 init
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x10
IOAPIC: ID = 0x04
IOAPIC: Dumping registers
  reg 0x0000: 0x04000000
  reg 0x0001: 0x00178021
  reg 0x0002: 0x04000000
IOAPIC: 24 interrupts
IOAPIC: Enabling interrupts on FSB
IOAPIC: reg 0x00000000 value 0x10000000 0x00000700
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
PCI: 00:14.0 init 65249 usecs
PCI: 00:14.2 init
PCI: 00:14.2 init 781 usecs
PCI: 00:14.3 init
RTC Init
PCI: 00:14.3 init 1201 usecs
PCI: 00:14.4 init
PCI: 00:14.4 init 791 usecs
PCI: 00:14.5 init
PCI: 00:14.5 init 782 usecs
PCI: 00:14.7 init
PCI: 00:14.7 init 781 usecs
PCI: 00:15.0 init
PCI: 00:15.0 init 782 usecs
PCI: 00:18.0 init
PCI: 00:18.0 init 781 usecs
PCI: 00:18.1 init
PCI: 00:18.1 init 782 usecs
PCI: 00:18.2 init
PCI: 00:18.2 init 782 usecs
PCI: 00:18.3 init
PCI: 00:18.3 init 781 usecs
PCI: 00:18.4 init
PCI: 00:18.4 init 782 usecs
PCI: 00:18.5 init
PCI: 00:18.5 init 782 usecs
PNP: 004e.0 init
PNP: 004e.0 init 738 usecs
PNP: 004e.1 init
PNP: 004e.1 init 739 usecs
PCI: 02:00.0 init
PCI: 02:00.0 init 781 usecs
PCI: 02:00.1 init
PCI: 02:00.1 init 782 usecs
PCI: 02:00.2 init
PCI: 02:00.2 init 782 usecs
PCI: 02:00.3 init
PCI: 02:00.3 init 781 usecs
PCI: 02:00.4 init
PCI: 02:00.4 init 782 usecs
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 10: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:00.2: enabled 0
PCI: 00:01.0: enabled 1
PCI: 00:01.1: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:02.1: enabled 0
PCI: 00:02.2: enabled 0
PCI: 00:03.0: enabled 1
PCI: 00:03.1: enabled 0
PCI: 00:03.2: enabled 0
PCI: 00:03.3: enabled 0
PCI: 00:03.4: enabled 0
PCI: 00:03.5: enabled 0
PCI: 00:04.0: enabled 1
PCI: 00:10.0: enabled 1
PCI: 00:10.1: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 01:50: enabled 1
I2C: 01:51: enabled 1
I2C: 01:52: enabled 1
I2C: 01:53: enabled 1
PCI: 00:14.1: enabled 0
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PNP: 004e.0: enabled 1
PNP: 004e.1: enabled 1
PNP: 004e.2: enabled 0
PNP: 004e.3: enabled 0
PNP: 004e.8: enabled 0
PCI: 00:14.4: enabled 1
PCI: 00:14.5: enabled 1
PCI: 00:14.7: enabled 1
PCI: 00:15.0: enabled 1
PCI: 00:15.1: enabled 0
PCI: 00:15.2: enabled 0
PCI: 00:15.3: enabled 0
PCI: 00:16.0: enabled 0
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
APIC: 11: enabled 1
APIC: 12: enabled 1
APIC: 13: enabled 1
PCI: 02:00.0: enabled 1
PCI: 02:00.1: enabled 1
PCI: 02:00.2: enabled 1
PCI: 02:00.3: enabled 1
PCI: 02:00.4: enabled 1
BS: BS_DEV_INIT times (us): entry 0 run 388355 exit 0
CBMEM:
IMD: root @ bffff000 254 entries.
IMD: root @ bfffec00 62 entries.
Moving GDT to bfffe720...ok
Finalize devices...
Devices finalized
agesawrapper_amdinitlate() entry

EventLog:  EventClass = 2, EventInfo = 8040100.
  Param1 = 1180000, Param2 = 0.
  Param3 = 0, Param4 = 0.

EventLog:  EventClass = 2, EventInfo = 8040100.
  Param1 = 1080000, Param2 = 0.
  Param3 = 0, Param4 = 0.

EventLog:  EventClass = 2, EventInfo = 8040100.
  Param1 = 1040000, Param2 = 0.
  Param3 = 0, Param4 = 0.

EventLog:  EventClass = 2, EventInfo = 8040100.
  Param1 = a008, Param2 = 0.
  Param3 = 0, Param4 = 0.

EventLog:  EventClass = 2, EventInfo = 8040100.
  Param1 = a00f, Param2 = 0.
  Param3 = 0, Param4 = 0.

EventLog:  EventClass = 2, EventInfo = 8040100.
  Param1 = a00e, Param2 = 0.
  Param3 = 0, Param4 = 0.

EventLog:  EventClass = 2, EventInfo = 8040100.
  Param1 = a010, Param2 = 0.
  Param3 = 0, Param4 = 0.
ASSERTION ERROR: file 'src/northbridge/amd/pi/agesawrapper.c', line 302
DmiTable:1002cd43, AcpiPstatein: 1001014f, AcpiSrat:0,AcpiSlit:0, Mce:100119ef, Cmc:10011ab1,Alib:10012420, AcpiIvrs:0 in agesawrapper_amdinitlate
agesawrapper_amdinitlate() returned AGESA_ERROR
BS: BS_POST_DEVICE times (us): entry 4433 run 1652 exit 61567
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 0 exit 0
Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done.
Writing IRQ routing tables to 0xbffdc000...write_pirq_routing_table done.
PIRQ table: 48 bytes.
Wrote the mp table end at: 000f0410 - 000f066c
Wrote the mp table end at: bffdb010 - bffdb26c
MP table: 620 bytes.
ACPI: Writing ACPI tables at bffb7000.
ACPI:    * FACS
ACPI:    * DSDT
ACPI:    * FADT
pm_base: 0x0800
ACPI: added table 1/32, length now 40
ACPI:     * SSDT
ACPI: added table 2/32, length now 44
ACPI:    * MCFG
ACPI:    * MADT
ACPI: added table 3/32, length now 48
current = bffb8d90
ACPI:    * HPET
ACPI: added table 4/32, length now 52
ACPI: added table 5/32, length now 56
ACPI:    * IVRS at bffb8fa0
  AGESA IVRS table NULL. Skipping.
ACPI:    * SRAT at bffb8fa0
  AGESA SRAT table NULL. Skipping.
ACPI:   * SLIT at bffb8fa0
  AGESA SLIT table NULL. Skipping.
ACPI:  * AGESA ALIB SSDT at bffb8fa0
ACPI: added table 6/32, length now 60
ACPI:    * SSDT at bffc2a70
ACPI: added table 7/32, length now 64
ACPI:    * SSDT for PState at bffc360c
ACPI: done.
ACPI tables: 50704 bytes.
smbios_write_tables: bffb6000
Root Device (AMD DB-FP3)
CPU_CLUSTER: 0 (AMD FAM15 Root Complex)
APIC: 10 (AMD CPU Family 15h Model 30)
DOMAIN: 0000 (AMD FAM15 Root Complex)
PCI: 00:00.0 (AMD FAM15 Northbridge)
PCI: 00:00.2 (AMD FAM15 Northbridge)
PCI: 00:01.0 (AMD FAM15 Northbridge)
PCI: 00:01.1 (AMD FAM15 Northbridge)
PCI: 00:02.0 (AMD FAM15 Northbridge)
PCI: 00:02.1 (AMD FAM15 Northbridge)
PCI: 00:02.2 (AMD FAM15 Northbridge)
PCI: 00:03.0 (AMD FAM15 Northbridge)
PCI: 00:03.1 (AMD FAM15 Northbridge)
PCI: 00:03.2 (AMD FAM15 Northbridge)
PCI: 00:03.3 (AMD FAM15 Northbridge)
PCI: 00:03.4 (AMD FAM15 Northbridge)
PCI: 00:03.5 (AMD FAM15 Northbridge)
PCI: 00:04.0 (AMD FAM15 Northbridge)
PCI: 00:10.0 (ATI HUDSON)
PCI: 00:10.1 (ATI HUDSON)
PCI: 00:11.0 (ATI HUDSON)
PCI: 00:12.0 (ATI HUDSON)
PCI: 00:12.2 (ATI HUDSON)
PCI: 00:13.0 (ATI HUDSON)
PCI: 00:13.2 (ATI HUDSON)
PCI: 00:14.0 (ATI HUDSON)
I2C: 01:50 (unknown)
I2C: 01:51 (unknown)
I2C: 01:52 (unknown)
I2C: 01:53 (unknown)
PCI: 00:14.1 (ATI HUDSON)
PCI: 00:14.2 (ATI HUDSON)
PCI: 00:14.3 (ATI HUDSON)
PNP: 004e.0 (Fintek F81216H/D/DG/F/FG Super I/O)
PNP: 004e.1 (Fintek F81216H/D/DG/F/FG Super I/O)
PNP: 004e.2 (Fintek F81216H/D/DG/F/FG Super I/O)
PNP: 004e.3 (Fintek F81216H/D/DG/F/FG Super I/O)
PNP: 004e.8 (Fintek F81216H/D/DG/F/FG Super I/O)
PCI: 00:14.4 (ATI HUDSON)
PCI: 00:14.5 (ATI HUDSON)
PCI: 00:14.7 (ATI HUDSON)
PCI: 00:15.0 (ATI HUDSON)
PCI: 00:15.1 (ATI HUDSON)
PCI: 00:15.2 (ATI HUDSON)
PCI: 00:15.3 (ATI HUDSON)
PCI: 00:16.0 (ATI HUDSON)
PCI: 00:18.0 (AMD FAM15 Northbridge)
PCI: 00:18.1 (AMD FAM15 Northbridge)
PCI: 00:18.2 (AMD FAM15 Northbridge)
PCI: 00:18.3 (AMD FAM15 Northbridge)
PCI: 00:18.4 (AMD FAM15 Northbridge)
PCI: 00:18.5 (AMD FAM15 Northbridge)
APIC: 11 (unknown)
APIC: 12 (unknown)
APIC: 13 (unknown)
PCI: 02:00.0 (unknown)
PCI: 02:00.1 (unknown)
PCI: 02:00.2 (unknown)
PCI: 02:00.3 (unknown)
PCI: 02:00.4 (unknown)
SMBIOS tables: 325 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum 5fe3
Table forward entry ends at 0x00000528.
... aligned to 0x00001000
Writing coreboot table at 0xbffae000
rom_table_end = 0xbffae000
... aligned to 0xbffb0000
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000c0000-00000000bffadfff: RAM
 3. 00000000bffae000-00000000bfffffff: CONFIGURATION TABLES
 4. 00000000c0000000-00000000dfffffff: RESERVED
 5. 00000000f8000000-00000000fbffffff: RESERVED
 6. 0000000100000000-000000011effffff: RAM
Wrote coreboot table at: bffae000, 0x160 bytes, checksum 8423
coreboot table: 376 bytes.
IMD ROOT    0. bffff000 00001000
IMD SMALL   1. bfffe000 00001000
CONSOLE     2. bffde000 00020000
AGESA RSVD  3. bffdd000 00001000
IRQ TABLE   4. bffdc000 00001000
SMP TABLE   5. bffdb000 00001000
ACPI        6. bffb7000 00024000
SMBIOS      7. bffb6000 00000800
COREBOOT    8. bffae000 00008000
IMD small region:
  IMD ROOT    0. bfffec00 00000400
  TIME STAMP  1. bfffe920 000002e0
  GDT         2. bfffe720 00000200
BS: BS_WRITE_TABLES times (us): entry 0 run 178458 exit 0
CBFS: located payload @ ff8343f8, 55333 bytes.
Loading segment from rom address 0xff8343f8
  code (compression=1)
  New segment dstaddr 0xe60a4 memsize 0x19f5c srcaddr 0xff834430 filesize 0xd7ed
Loading segment from rom address 0xff834414
  Entry Point 0x000fd503
Bounce Buffer at bfd9f000, 2154672 bytes
Loading Segment: addr: 0x00000000000e60a4 memsz: 0x0000000000019f5c filesz: 0x000000000000d7ed
lb: [0x0000000000200000, 0x0000000000307058)
Post relocation: addr: 0x00000000000e60a4 memsz: 0x0000000000019f5c filesz: 0x000000000000d7ed
using LZMA
[ 0x000e60a4, 00100000, 0x00100000) <- ff834430
dest 000e60a4, end 00100000, bouncebuffer bfd9f000
Loaded segments
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 39878 exit 0
Jumping to boot code at 000fd503(bffae000)
CPU0: stack: 00222000 - 00223000, lowest used address 00222618, stack used: 2536 bytes
entry    = 0x000fd503
lb_start = 0x00200000
lb_size  = 0x00107058
buffer   = 0xbfd9f000
SeaBIOS (version rel-1.7.5-118-ged675ad-dirty-20141212_181319-toonie.localdomain)
Found coreboot cbmem console @ bffde000
Found mainboard AMD DB-FP3
Relocating init from 0x000e7210 to 0xbff63570 (size 43472)
Found CBFS header at 0xfffffc50
CPU Mhz=2697
Found 31 PCI devices (max PCI bus is 02)
Copying SMBIOS entry point from 0xbffb6000 to 0x000f1bc0
Copying ACPI RSDP from 0xbffb7000 to 0x000f1b90
Copying MPTABLE from 0xbffdb000/bffdb010 to 0x000f1920
Copying PIR from 0xbffdc000 to 0x000f18f0
Using pmtimer, ioport 0x818
Scan for VGA option rom
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version rel-1.7.5-118-ged675ad-dirty-20141212_181319-toonie.localdomain)
XHCI init on dev 00:10.0: regs @ 0xf0968000, 4 ports, 32 slots, 32 byte contexts
XHCI    extcap 0x1 @ f0968500
XHCI    protocol USB  3.00, 2 ports (offset 1), def 0
XHCI    protocol USB  2.00, 2 ports (offset 3), def 10
XHCI    extcap 0xa @ f0968540
WARNING - Timeout at i8042_flush:71!
XHCI init on dev 00:10.1: regs @ 0xf096a000, 4 ports, 32 slots, 32 byte contexts
XHCI    extcap 0x1 @ f096a500
XHCI    protocol USB  3.00, 2 ports (offset 1), def 0
XHCI    protocol USB  2.00, 2 ports (offset 3), def 10
XHCI    extcap 0xa @ f096a540
Found 0 lpt ports
Found 2 serial ports
ATA controller 1 at 2410/2420/0 (irq 15 dev 88)
EHCI init on dev 00:12.2 (regs=0xf096f820)
ATA controller 2 at 2418/2424/0 (irq 15 dev 88)
EHCI init on dev 00:13.2 (regs=0xf096f920)
EHCI init on dev 02:00.4 (regs=0xf0818020)
OHCI init on dev 00:12.0 (regs=0xf096c000)
OHCI init on dev 00:13.0 (regs=0xf096d000)
ata0-0: ST3750525AS ATA-8 Hard-Disk (698 GiBytes)
Searching bootorder for: /pci@i0cf8/*@11/drive@0/disk@0
OHCI init on dev 00:14.5 (regs=0xf096e000)
XHCI port #3: 0x00200603, powered, enabled, pls 0, speed 1 [Full]
USB keyboard initialized
XHCI no devices found
WARNING - Timeout at ehci_waittick:177!
All threads complete.
Scan for option roms

Press F12 for boot menu.

Searching bootorder for: HALT
drive 0x000f18a0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=1465149168
Space available for UMB: cf800-ef000, f0000-f18a0
Returned 241664 bytes of ZoneHigh
e820 map has 7 items:
  0: 0000000000000000 - 000000000009fc00 = 1 RAM
  1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
  2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
  3: 0000000000100000 - 00000000bffa9000 = 1 RAM
  4: 00000000bffa9000 - 00000000e0000000 = 2 RESERVED
  5: 00000000f8000000 - 00000000fc000000 = 2 RESERVED
  6: 0000000100000000 - 000000011f000000 = 1 RAM
enter handle_19:
  NULL
Booting from Hard Disk...
Booting from 0000:7c00