Paul Menzel | 2628571 | 2017-04-17 10:57:51 +0200 | [diff] [blame] | 1 | coreboot.rom: 1024 kB, bootblocksize 2936, romsize 1048576, offset 0x0 |
| 2 | alignment: 64 bytes, architecture: x86 |
| 3 | |
| 4 | Name Offset Type Size |
| 5 | cmos_layout.bin 0x0 cmos_layout 2704 |
| 6 | cmos.default 0xac0 cmos_default 256 |
| 7 | cpu_microcode_blob.bin 0xc00 microcode 14336 |
| 8 | fallback/romstage 0x4480 stage 80408 |
| 9 | fallback/ramstage 0x17f00 stage 64533 |
| 10 | fallback/payload 0x27b80 payload 55894 |
| 11 | normal/dsdt.aml 0x35640 raw 9796 |
| 12 | config 0x37cc0 raw 595 |
| 13 | revision 0x37f80 raw 575 |
| 14 | payload_config 0x38200 raw 1497 |
| 15 | payload_revision 0x38840 raw 70 |
| 16 | etc/pci-optionrom-exec 0x38900 raw 1 |
| 17 | (empty) 0x38980 null 21848 |
| 18 | pci14e4,1659.rom 0x3df00 raw 70144 |
| 19 | normal/romstage 0x4f140 stage 78488 |
| 20 | normal/ramstage 0x62400 stage 62321 |
| 21 | normal/payload 0x717c0 payload 55178 |
| 22 | vgaroms/seavgabios.bin 0x7ef80 raw 28672 |
| 23 | bootsplash.jpg 0x86000 raw 28931 |
| 24 | (empty) 0x8d140 null 467672 |