| Paul Menzel | 2628571 | 2017-04-17 10:57:51 +0200 | [diff] [blame] | 1 |
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| 2 |
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| 3 | coreboot-4.0-6741-g7aa704b Mon Aug 18 00:07:08 CEST 2014 starting...
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| 4 |
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| 5 | Mobile Intel(R) 82945GM/GME Express Chipset
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| 6 | (G)MCH capable of up to FSB 800 MHz
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| 7 | (G)MCH capable of up to DDR2-667
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| 8 | Setting up static southbridge registers... GPIOS... done.
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| 9 | Disabling Watchdog reboot... done.
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| 10 | Setting up static northbridge registers... done.
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| 11 | Waiting for MCHBAR to come up...ok
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| 12 | PM1_CNT: 00001c00
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| 13 | SMBus controller enabled.
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| 14 | Setting up RAM controller.
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| 15 | This mainboard supports Dual Channel Operation.
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| 16 | DDR II Channel 0 Socket 0: x16DS
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| 17 | DDR II Channel 1 Socket 0: x16DS
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| 18 | Memory will be driven at 667MHz with CAS=5 clocks
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| 19 | tRAS = 15 cycles
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| 20 | tRP = 5 cycles
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| 21 | tRCD = 5 cycles
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| 22 | Refresh: 7.8us
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| 23 | tWR = 5 cycles
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| 24 | DIMM 0 side 0 = 256 MB
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| 25 | DIMM 0 side 1 = 256 MB
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| 26 | DIMM 2 side 0 = 256 MB
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| 27 | DIMM 2 side 1 = 256 MB
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| 28 | tRFC = 35 cycles
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| 29 | Setting Graphics Frequency...
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| 30 | FSB: 667 MHz Voltage: 1.05V Render: 250MHz Display: 200MHz
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| 31 | Setting Memory Frequency... CLKCFG=0x00010023, CLKCFG=0x00010043, ok
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| 32 | Setting mode of operation for memory channels...Dual Channel Interleaved.
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| 33 | Programming Clock Crossing...MEM=667 FSB=667... ok
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| 34 | Setting RAM size...
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| 35 | C0DRB = 0x10101008
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| 36 | C1DRB = 0x10101008
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| 37 | TOLUD = 0x0040
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| 38 | Setting row attributes...
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| 39 | C0DRA = 0x0033
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| 40 | C1DRA = 0x0033
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| 41 | one dimm per channel config..
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| 42 | Initializing System Memory IO...
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| 43 | Programming Dual Channel RCOMP
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| 44 | Table Index: 0
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| 45 | Programming DLL Timings...
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| 46 | Enabling System Memory IO...
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| 47 | jedec enable sequence: bank 0
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| 48 | jedec enable sequence: bank 1
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| 49 | bankaddr from bank size of rank 0
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| 50 | jedec enable sequence: bank 4
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| 51 | jedec enable sequence: bank 5
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| 52 | bankaddr from bank size of rank 4
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| 53 | receive_enable_autoconfig() for channel 0
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| 54 | find_strobes_low()
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| 55 | set_receive_enable() medium=0x3, coarse=0x5
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| 56 | set_receive_enable() medium=0x1, coarse=0x5
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| 57 | find_strobes_edge()
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| 58 | set_receive_enable() medium=0x1, coarse=0x5
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| 59 | add_quarter_clock() mediumcoarse=15 fine=b6
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| 60 | set_receive_enable() medium=0x3, coarse=0x5
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| 61 | find_preamble()
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| 62 | set_receive_enable() medium=0x3, coarse=0x4
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| 63 | set_receive_enable() medium=0x3, coarse=0x3
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| 64 | add_quarter_clock() mediumcoarse=0f fine=36
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| 65 | normalize()
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| 66 | set_receive_enable() medium=0x0, coarse=0x4
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| 67 | receive_enable_autoconfig() for channel 1
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| 68 | find_strobes_low()
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| 69 | set_receive_enable() medium=0x3, coarse=0x5
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| 70 | set_receive_enable() medium=0x1, coarse=0x5
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| 71 | find_strobes_edge()
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| 72 | set_receive_enable() medium=0x1, coarse=0x5
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| 73 | add_quarter_clock() mediumcoarse=15 fine=b0
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| 74 | set_receive_enable() medium=0x3, coarse=0x5
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| 75 | find_preamble()
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| 76 | set_receive_enable() medium=0x3, coarse=0x4
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| 77 | set_receive_enable() medium=0x3, coarse=0x3
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| 78 | add_quarter_clock() mediumcoarse=0f fine=30
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| 79 | normalize()
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| 80 | set_receive_enable() medium=0x0, coarse=0x4
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| 81 | RAM initialization finished.
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| 82 | Setting up Egress Port RCRB
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| 83 | Loading port arbitration table ...ok
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| 84 | Wait for VC1 negotiation ...ok
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| 85 | Setting up DMI RCRB
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| 86 | Wait for VC1 negotiation ...done..
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| 87 | Internal graphics: enabled
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| 88 | Waiting for DMI hardware...ok
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| 89 | Enabling PCI Ex |
| 90 | |
| 91 | *** Log truncated, 177 characters dropped. *** |
| 92 | |
| 93 | Trying CBFS ramstage loader.
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| 94 | CBFS: loading stage fallback/ramstage @ 0x100000 (270396 bytes), entry @ 0x100000
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| 95 | coreboot-4.0-6741-g7aa704b Mon Aug 18 00:07:08 CEST 2014 booting...
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| 96 | BS: Entering BS_PRE_DEVICE state.
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| 97 | CBMEM: recovering 5/254 entries from root @ 3f7ff000
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| 98 | Moving GDT to 3f7eb000...ok
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| 99 | BS: Exiting BS_PRE_DEVICE state.
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| 100 | BS: BS_PRE_DEVICE times (us): entry 21 run 17 exit 0
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| 101 | BS: Entering BS_DEV_INIT_CHIPS state.
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| 102 | BS: Exiting BS_DEV_INIT_CHIPS state.
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| 103 | BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 21 exit 0
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| 104 | BS: Entering BS_DEV_ENUMERATE state.
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| 105 | Enumerating buses...
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| 106 | Show all devs...Before device enumeration.
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| 107 | Root Device: enabled 1
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| 108 | CPU_CLUSTER: 0: enabled 1
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| 109 | APIC: 00: enabled 1
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| 110 | DOMAIN: 0000: enabled 1
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| 111 | PCI: 00:00.0: enabled 1
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| 112 | PCI: 00:02.0: enabled 1
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| 113 | PCI: 00:02.1: enabled 1
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| 114 | PCI: 00:1b.0: enabled 1
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| 115 | PCI: 00:1c.0: enabled 1
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| 116 | PCI: 00:1c.1: enabled 1
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| 117 | PCI: 00:1d.0: enabled 1
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| 118 | PCI: 00:1d.1: enabled 1
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| 119 | PCI: 00:1d.2: enabled 1
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| 120 | PCI: 00:1d.3: enabled 1
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| 121 | PCI: 00:1d.7: enabled 1
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| 122 | PCI: 00:1f.0: enabled 1
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| 123 | PCI: 00:1f.1: enabled 1
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| 124 | PCI: 00:1f.2: enabled 1
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| 125 | PCI: 00:1f.3: enabled 1
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| 126 | Compare with tree...
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| 127 | Root Device: enabled 1
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| 128 | CPU_CLUSTER: 0: enabled 1
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| 129 | APIC: 00: enabled 1
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| 130 | DOMAIN: 0000: enabled 1
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| 131 | PCI: 00:00.0: enabled 1
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| 132 | PCI: 00:02.0: enabled 1
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| 133 | PCI: 00:02.1: enabled 1
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| 134 | PCI: 00:1b.0: enabled 1
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| 135 | PCI: 00:1c.0: enabled 1
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| 136 | PCI: 00:1c.1: enabled 1
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| 137 | PCI: 00:1d.0: enabled 1
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| 138 | PCI: 00:1d.1: enabled 1
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| 139 | PCI: 00:1d.2: enabled 1
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| 140 | PCI: 00:1d.3: enabled 1
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| 141 | PCI: 00:1d.7: enabled 1
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| 142 | PCI: 00:1f.0: enabled 1
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| 143 | PCI: 00:1f.1: enabled 1
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| 144 | PCI: 00:1f.2: enabled 1
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| 145 | PCI: 00:1f.3: enabled 1
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| 146 | scan_static_bus for Root Device
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| 147 | CPU_CLUSTER: 0 enabled
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| 148 | DOMAIN: 0000 enabled
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| 149 | DOMAIN: 0000 scanning...
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| 150 | PCI: pci_scan_bus for bus 00
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| 151 | PCI: 00:00.0 [8086/27a0] ops
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| 152 | PCI: 00:00.0 [8086/27a0] enabled
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| 153 | PCI: 00:02.0 [8086/27a2] ops
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| 154 | PCI: 00:02.0 [8086/27a2] enabled
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| 155 | PCI: 00:02.1 [8086/27a6] ops
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| 156 | PCI: 00:02.1 [8086/27a6] enabled
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| 157 | PCI: 00:1b.0 [8086/27d8] ops
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| 158 | PCI: 00:1b.0 [8086/27d8] enabled
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| 159 | PCI: 00:1c.0 [8086/0000] bus ops
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| 160 | PCI: 00:1c.0 [8086/27d0] enabled
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| 161 | PCI: 00:1c.1 [8086/0000] bus ops
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| 162 | PCI: 00:1c.1 [8086/27d2] enabled
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| 163 | PCI: 00:1d.0 [8086/27c8] ops
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| 164 | PCI: 00:1d.0 [8086/27c8] enabled
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| 165 | PCI: 00:1d.1 [8086/27c9] ops
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| 166 | PCI: 00:1d.1 [8086/27c9] enabled
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| 167 | PCI: 00:1d.2 [8086/27ca] ops
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| 168 | PCI: 00:1d.2 [8086/27ca] enabled
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| 169 | PCI: 00:1d.3 [8086/27cb] ops
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| 170 | PCI: 00:1d.3 [8086/27cb] enabled
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| 171 | PCI: 00:1d.7 [8086/27cc] ops
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| 172 | PCI: 00:1d.7 [8086/27cc] enabled
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| 173 | PCI: 00:1e.0 [8086/2448] bus ops
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| 174 | PCI: 00:1e.0 [8086/2448] enabled
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| 175 | PCI: 00:1f.0 [8086/27b9] bus ops
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| 176 | PCI: 00:1f.0 [8086/27b9] enabled
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| 177 | PCI: 00:1f.1 [8086/27df] ops
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| 178 | PCI: 00:1f.1 [8086/27df] enabled
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| 179 | PCI: 00:1f.2 [8086/0000] ops
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| 180 | PCI: 00:1f.2 [8086/27c4] enabled
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| 181 | PCI: 00:1f.3 [8086/27da] bus ops
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| 182 | PCI: 00:1f.3 [8086/27da] enabled
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| 183 | do_pci_scan_bridge for PCI: 00:1c.0
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| 184 | PCI: pci_scan_bus for bus 01
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| 185 | PCI: 01:00.0 [11ab/4362] enabled
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| 186 | PCI: pci_scan_bus returning with max=001
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| 187 | do_pci_scan_bridge returns max 1
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| 188 | do_pci_scan_bridge for PCI: 00:1c.1
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| 189 | PCI: pci_scan_bus for bus 02
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| 190 | PCI: 02:00.0 [168c/0024] enabled
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| 191 | PCI: pci_scan_bus returning with max=002
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| 192 | do_pci_scan_bridge returns max 2
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| 193 | do_pci_scan_bridge for PCI: 00:1e.0
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| 194 | PCI: pci_scan_bus for bus 03
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| 195 | PCI: 03:03.0 [11c1/5811] enabled
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| 196 | PCI: pci_scan_bus returning with max=003
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| 197 | do_pci_scan_bridge returns max 3
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| 198 | scan_static_bus for PCI: 00:1f.0
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| 199 | scan_static_bus for PCI: 00:1f.0 done
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| 200 | scan_static_bus for PCI: 00:1f.3
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| 201 | scan_static_bus for PCI: 00:1f.3 done
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| 202 | PCI: pci_scan_bus returning with max=003
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| 203 | scan_static_bus for Root Device done
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| 204 | done
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| 205 | BS: Exiting BS_DEV_ENUMERATE state.
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| 206 | BS: BS_DEV_ENUMERATE times (us): entry 0 run 1775 exit 0
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| 207 | BS: Entering BS_DEV_RESOURCES state.
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| 208 | found VGA at PCI: 00:02.0
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| 209 | Setting up VGA for PCI: 00:02.0
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| 210 | Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
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| 211 | Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
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| 212 | Allocating resources...
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| 213 | Reading resources...
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| 214 | Root Device read_resources bus 0 link: 0
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| 215 | CPU_CLUSTER: 0 read_resources bus 0 link: 0
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| 216 | APIC: 00 missing read_resources
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| 217 | CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
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| 218 | DOMAIN: 0000 read_resources bus 0 link: 0
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| 219 | Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
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| 220 | PCI: 00:1c.0 read_resources bus 1 link: 0
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| 221 | PCI: 00:1c.0 read_resources bus 1 link: 0 done
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| 222 | PCI: 00:1c.1 read_resources bus 2 link: 0
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| 223 | PCI: 00:1c.1 read_resources bus 2 link: 0 done
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| 224 | PCI: 00:1e.0 read_resources bus 3 link: 0
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| 225 | PCI: 00:1e.0 read_resources bus 3 link: 0 done
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| 226 | DOMAIN: 0000 read_resources bus 0 link: 0 done
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| 227 | Root Device read_resources bus 0 link: 0 done
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| 228 | Done reading resources.
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| 229 | Show resources in subtree (Root Device)...After reading.
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| 230 | Root Device child on link 0 CPU_CLUSTER: 0
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| 231 | CPU_CLUSTER: 0 child on link 0 APIC: 00
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| 232 | APIC: 00
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| 233 | DOMAIN: 0000 child on link 0 PCI: 00:00.0
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| 234 | DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
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| 235 | DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
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| 236 | PCI: 00:00.0
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| 237 | PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags e0000200 index cf
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| 238 | PCI: 00:02.0
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| 239 | PCI: 00:02.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 10
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| 240 | PCI: 00:02.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 14
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| 241 | PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 18
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| 242 | PCI: 00:02.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 1c
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| 243 | PCI: 00:02.1
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| 244 | PCI: 00:02.1 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 10
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| 245 | PCI: 00:1b.0
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| 246 | PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
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| 247 | PCI: 00:1c.0 child on link 0 PCI: 01:00.0
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| 248 | PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
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| 249 | PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
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| 250 | PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
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| 251 | PCI: 01:00.0
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| 252 | PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
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| 253 | PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 18
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| 254 | PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 index 30
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| 255 | PCI: 00:1c.1 child on link 0 PCI: 02:00.0
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| 256 | PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
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| 257 | PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
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| 258 | PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
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| 259 | PCI: 02:00.0
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| 260 | PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
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| 261 | PCI: 00:1d.0
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| 262 | PCI: 00:1d.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
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| 263 | PCI: 00:1d.1
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| 264 | PCI: 00:1d.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
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| 265 | PCI: 00:1d.2
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| 266 | PCI: 00:1d.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
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| 267 | PCI: 00:1d.3
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| 268 | PCI: 00:1d.3 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
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| 269 | PCI: 00:1d.7
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| 270 | PCI: 00:1d.7 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 10
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| 271 | PCI: 00:1e.0 child on link 0 PCI: 03:03.0
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| 272 | PCI: 00:1e.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
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| 273 | PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
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| 274 | PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
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| 275 | PCI: 03:03.0
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| 276 | PCI: 03:03.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
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| 277 | PCI: 00:1f.0
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| 278 | PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
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| 279 | PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
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| 280 | PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
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| 281 | PCI: 00:1f.1
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| 282 | PCI: 00:1f.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
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| 283 | PCI: 00:1f.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
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| 284 | PCI: 00:1f.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
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| 285 | PCI: 00:1f.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
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| 286 | PCI: 00:1f.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
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| 287 | PCI: 00:1f.2
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| 288 | PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
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| 289 | PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
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| 290 | PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
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| 291 | PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
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| 292 | PCI: 00:1f.2 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
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| 293 | PCI: 00:1f.2 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 24
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| 294 | PCI: 00:1f.3
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| 295 | PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
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| 296 | DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
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| 297 | PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
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| 298 | PCI: 01:00.0 18 * [0x0 - 0xff] io
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| 299 | PCI: 00:1c.0 compute_resources_io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
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| 300 | PCI: 00:1c.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
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| 301 | PCI: 00:1c.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
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| 302 | PCI: 00:1e.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
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| 303 | PCI: 00:1e.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
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| 304 | PCI: 00:1c.0 1c * [0x0 - 0xfff] io
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| 305 | PCI: 00:1d.0 20 * [0x1000 - 0x101f] io
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| 306 | PCI: 00:1d.1 20 * [0x1020 - 0x103f] io
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| 307 | PCI: 00:1d.2 20 * [0x1040 - 0x105f] io
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| 308 | PCI: 00:1d.3 20 * [0x1060 - 0x107f] io
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| 309 | PCI: 00:1f.1 20 * [0x1080 - 0x108f] io
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| 310 | PCI: 00:1f.2 20 * [0x1090 - 0x109f] io
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| 311 | PCI: 00:02.0 14 * [0x10a0 - 0x10a7] io
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| 312 | PCI: 00:1f.1 10 * [0x10a8 - 0x10af] io
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| 313 | PCI: 00:1f.1 18 * [0x10b0 - 0x10b7] io
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| 314 | PCI: 00:1f.2 10 * [0x10b8 - 0x10bf] io
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| 315 | PCI: 00:1f.2 18 * [0x10c0 - 0x10c7] io
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| 316 | PCI: 00:1f.1 14 * [0x10c8 - 0x10cb] io
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| 317 | PCI: 00:1f.1 1c * [0x10cc - 0x10cf] io
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| 318 | PCI: 00:1f.2 14 * [0x10d0 - 0x10d3] io
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| 319 | PCI: 00:1f.2 1c * [0x10d4 - 0x10d7] io
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| 320 | DOMAIN: 0000 compute_resources_io: base: 10d8 size: 10d8 align: 12 gran: 0 limit: ffff done
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| 321 | DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
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| 322 | PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
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| 323 | PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
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| 324 | PCI: 00:1c.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
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| 325 | PCI: 01:00.0 30 * [0x0 - 0x1ffff] mem
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| 326 | PCI: 01:00.0 10 * [0x20000 - 0x23fff] mem
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| 327 | PCI: 00:1c.0 compute_resources_mem: base: 24000 size: 100000 align: 20 gran: 20 limit: ffffffff done
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| 328 | PCI: 00:1c.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
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| 329 | PCI: 00:1c.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
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| 330 | PCI: 00:1c.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
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| 331 | PCI: 02:00.0 10 * [0x0 - 0xffff] mem
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| 332 | PCI: 00:1c.1 compute_resources_mem: base: 10000 size: 100000 align: 20 gran: 20 limit: ffffffff done
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| 333 | PCI: 00:1e.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
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| 334 | PCI: 00:1e.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
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| 335 | PCI: 00:1e.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
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| 336 | PCI: 03:03.0 10 * [0x0 - 0xfff] mem
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| 337 | PCI: 00:1e.0 compute_resources_mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
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| 338 | PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
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| 339 | PCI: 00:1c.0 20 * [0x10000000 - 0x100fffff] mem
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| 340 | PCI: 00:1c.1 20 * [0x10100000 - 0x101fffff] mem
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| 341 | PCI: 00:1e.0 20 * [0x10200000 - 0x102fffff] mem
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| 342 | PCI: 00:02.0 10 * [0x10300000 - 0x1037ffff] mem
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| 343 | PCI: 00:02.1 10 * [0x10380000 - 0x103fffff] mem
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| 344 | PCI: 00:02.0 1c * [0x10400000 - 0x1043ffff] mem
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| 345 | PCI: 00:1b.0 10 * [0x10440000 - 0x10443fff] mem
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| 346 | PCI: 00:1d.7 10 * [0x10444000 - 0x104443ff] mem
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| 347 | PCI: 00:1f.2 24 * [0x10444400 - 0x104447ff] mem
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| 348 | DOMAIN: 0000 compute_resources_mem: base: 10444800 size: 10444800 align: 28 gran: 0 limit: ffffffff done
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| 349 | avoid_fixed_resources: DOMAIN: 0000
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| 350 | avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
|
| 351 | avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
|
| 352 | constrain_resources: DOMAIN: 0000
|
| 353 | constrain_resources: PCI: 00:00.0
|
| 354 | constrain_resources: PCI: 00:02.0
|
| 355 | constrain_resources: PCI: 00:02.1
|
| 356 | constrain_resources: PCI: 00:1b.0
|
| 357 | constrain_resources: PCI: 00:1c.0
|
| 358 | constrain_resources: PCI: 01:00.0
|
| 359 | constrain_resources: PCI: 00:1c.1
|
| 360 | constrain_resources: PCI: 02:00.0
|
| 361 | constrain_resources: PCI: 00:1d.0
|
| 362 | constrain_resources: PCI: 00:1d.1
|
| 363 | constrain_resources: PCI: 00:1d.2
|
| 364 | constrain_resources: PCI: 00:1d.3
|
| 365 | constrain_resources: PCI: 00:1d.7
|
| 366 | constrain_resources: PCI: 00:1e.0
|
| 367 | constrain_resources: PCI: 03:03.0
|
| 368 | constrain_resources: PCI: 00:1f.0
|
| 369 | constrain_resources: PCI: 00:1f.1
|
| 370 | constrain_resources: PCI: 00:1f.2
|
| 371 | constrain_resources: PCI: 00:1f.3
|
| 372 | avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 0000ffff
|
| 373 | lim->base 00001000 lim->limit 0000ffff
|
| 374 | avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff
|
| 375 | lim->base 00000000 lim->limit efffffff
|
| 376 | Setting resources...
|
| 377 | DOMAIN: 0000 allocate_resources_io: base:1000 size:10d8 align:12 gran:0 limit:ffff
|
| 378 | Assigned: PCI: 00:1c.0 1c * [0x1000 - 0x1fff] io
|
| 379 | Assigned: PCI: 00:1d.0 20 * [0x2000 - 0x201f] io
|
| 380 | Assigned: PCI: 00:1d.1 20 * [0x2020 - 0x203f] io
|
| 381 | Assigned: PCI: 00:1d.2 20 * [0x2040 - 0x205f] io
|
| 382 | Assigned: PCI: 00:1d.3 20 * [0x2060 - 0x207f] io
|
| 383 | Assigned: PCI: 00:1f.1 20 * [0x2080 - 0x208f] io
|
| 384 | Assigned: PCI: 00:1f.2 20 * [0x2090 - 0x209f] io
|
| 385 | Assigned: PCI: 00:02.0 14 * [0x20a0 - 0x20a7] io
|
| 386 | Assigned: PCI: 00:1f.1 10 * [0x20a8 - 0x20af] io
|
| 387 | Assigned: PCI: 00:1f.1 18 * [0x20b0 - 0x20b7] io
|
| 388 | Assigned: PCI: 00:1f.2 10 * [0x20b8 - 0x20bf] io
|
| 389 | Assigned: PCI: 00:1f.2 18 * [0x20c0 - 0x20c7] io
|
| 390 | Assigned: PCI: 00:1f.1 14 * [0x20c8 - 0x20cb] io
|
| 391 | Assigned: PCI: 00:1f.1 1c * [0x20cc - 0x20cf] io
|
| 392 | Assigned: PCI: 00:1f.2 14 * [0x20d0 - 0x20d3] io
|
| 393 | Assigned: PCI: 00:1f.2 1c * [0x20d4 - 0x20d7] io
|
| 394 | DOMAIN: 0000 allocate_resources_io: next_base: 20d8 size: 10d8 align: 12 gran: 0 done
|
| 395 | PCI: 00:1c.0 allocate_resources_io: base:1000 size:1000 align:12 gran:12 limit:ffff
|
| 396 | Assigned: PCI: 01:00.0 18 * [0x1000 - 0x10ff] io
|
| 397 | PCI: 00:1c.0 allocate_resources_io: next_base: 1100 size: 1000 align: 12 gran: 12 done
|
| 398 | PCI: 00:1c.1 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
|
| 399 | PCI: 00:1c.1 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
|
| 400 | PCI: 00:1e.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
|
| 401 | PCI: 00:1e.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
|
| 402 | DOMAIN: 0000 allocate_resources_mem: base:d0000000 size:10444800 align:28 gran:0 limit:efffffff
|
| 403 | Assigned: PCI: 00:02.0 18 * [0xd0000000 - 0xdfffffff] prefmem
|
| 404 | Assigned: PCI: 00:1c.0 20 * [0xe0000000 - 0xe00fffff] mem
|
| 405 | Assigned: PCI: 00:1c.1 20 * [0xe0100000 - 0xe01fffff] mem
|
| 406 | Assigned: PCI: 00:1e.0 20 * [0xe0200000 - 0xe02fffff] mem
|
| 407 | Assigned: PCI: 00:02.0 10 * [0xe0300000 - 0xe037ffff] mem
|
| 408 | Assigned: PCI: 00:02.1 10 * [0xe0380000 - 0xe03fffff] mem
|
| 409 | Assigned: PCI: 00:02.0 1c * [0xe0400000 - 0xe043ffff] mem
|
| 410 | Assigned: PCI: 00:1b.0 10 * [0xe0440000 - 0xe0443fff] mem
|
| 411 | Assigned: PCI: 00:1d.7 10 * [0xe0444000 - 0xe04443ff] mem
|
| 412 | Assigned: PCI: 00:1f.2 24 * [0xe0444400 - 0xe04447ff] mem
|
| 413 | DOMAIN: 0000 allocate_resources_mem: next_base: e0444800 size: 10444800 align: 28 gran: 0 done
|
| 414 | PCI: 00:1c.0 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
|
| 415 | PCI: 00:1c.0 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
|
| 416 | PCI: 00:1c.0 allocate_resources_mem: base:e0000000 size:100000 align:20 gran:20 limit:efffffff
|
| 417 | Assigned: PCI: 01:00.0 30 * [0xe0000000 - 0xe001ffff] mem
|
| 418 | Assigned: PCI: 01:00.0 10 * [0xe0020000 - 0xe0023fff] mem
|
| 419 | PCI: 00:1c.0 allocate_resources_mem: next_base: e0024000 size: 100000 align: 20 gran: 20 done
|
| 420 | PCI: 00:1c.1 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
|
| 421 | PCI: 00:1c.1 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
|
| 422 | PCI: 00:1c.1 allocate_resources_mem: base:e0100000 size:100000 align:20 gran:20 limit:efffffff
|
| 423 | Assigned: PCI: 02:00.0 10 * [0xe0100000 - 0xe010ffff] mem
|
| 424 | PCI: 00:1c.1 allocate_resources_mem: next_base: e0110000 size: 100000 align: 20 gran: 20 done
|
| 425 | PCI: 00:1e.0 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
|
| 426 | PCI: 00:1e.0 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
|
| 427 | PCI: 00:1e.0 allocate_resources_mem: base:e0200000 size:100000 align:20 gran:20 limit:efffffff
|
| 428 | Assigned: PCI: 03:03.0 10 * [0xe0200000 - 0xe0200fff] mem
|
| 429 | PCI: 00:1e.0 allocate_resources_mem: next_base: e0201000 size: 100000 align: 20 gran: 20 done
|
| 430 | Root Device assign_resources, bus 0 link: 0
|
| 431 | pci_tolm: 0xd0000000
|
| 432 | Base of stolen memory: 0x3f800000
|
| 433 | Top of Low Used DRAM: 0x40000000
|
| 434 | IGD decoded, subtracting 8M UMA
|
| 435 | Available memory: 1040384K (1016M)
|
| 436 | Adding PCIe config bar
|
| 437 | DOMAIN: 0000 assign_resources, bus 0 link: 0
|
| 438 | PCI: 00:00.0 cf <- [0x00f0000000 - 0x00f3ffffff] size 0x04000000 gran 0x00 mem<mmconfig>
|
| 439 | PCI: 00:02.0 10 <- [0x00e0300000 - 0x00e037ffff] size 0x00080000 gran 0x13 mem
|
| 440 | PCI: 00:02.0 14 <- [0x00000020a0 - 0x00000020a7] size 0x00000008 gran 0x03 io
|
| 441 | PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem
|
| 442 | PCI: 00:02.0 1c <- [0x00e0400000 - 0x00e043ffff] size 0x00040000 gran 0x12 mem
|
| 443 | PCI: 00:02.1 10 <- [0x00e0380000 - 0x00e03fffff] size 0x00080000 gran 0x13 mem
|
| 444 | PCI: 00:1b.0 10 <- [0x00e0440000 - 0x00e0443fff] size 0x00004000 gran 0x0e mem64
|
| 445 | PCI: 00:1c.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io
|
| 446 | PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem
|
| 447 | PCI: 00:1c.0 20 <- [0x00e0000000 - 0x00e00fffff] size 0x00100000 gran 0x14 bus 01 mem
|
| 448 | PCI: 00:1c.0 assign_resources, bus 1 link: 0
|
| 449 | PCI: 01:00.0 10 <- [0x00e0020000 - 0x00e0023fff] size 0x00004000 gran 0x0e mem64
|
| 450 | PCI: 01:00.0 18 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
|
| 451 | PCI: 01:00.0 30 <- [0x00e0000000 - 0x00e001ffff] size 0x00020000 gran 0x11 romem
|
| 452 | PCI: 00:1c.0 assign_resources, bus 1 link: 0
|
| 453 | PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
|
| 454 | PCI: 00:1c.1 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 prefmem
|
| 455 | PCI: 00:1c.1 20 <- [0x00e0100000 - 0x00e01fffff] size 0x00100000 gran 0x14 bus 02 mem
|
| 456 | PCI: 00:1c.1 assign_resources, bus 2 link: 0
|
| 457 | PCI: 02:00.0 10 <- [0x00e0100000 - 0x00e010ffff] size 0x00010000 gran 0x10 mem64
|
| 458 | PCI: 00:1c.1 assign_resources, bus 2 link: 0
|
| 459 | PCI: 00:1d.0 20 <- [0x0000002000 - 0x000000201f] size 0x00000020 gran 0x05 io
|
| 460 | PCI: 00:1d.1 20 <- [0x0000002020 - 0x000000203f] size 0x00000020 gran 0x05 io
|
| 461 | PCI: 00:1d.2 20 <- [0x0000002040 - 0x000000205f] size 0x00000020 gran 0x05 io
|
| 462 | PCI: 00:1d.3 20 <- [0x0000002060 - 0x000000207f] size 0x00000020 gran 0x05 io
|
| 463 | PCI: 00:1d.7 10 <- [0x00e0444000 - 0x00e04443ff] size 0x00000400 gran 0x0a mem
|
| 464 | PCI: 00:1e.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io
|
| 465 | PCI: 00:1e.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 prefmem
|
| 466 | PCI: 00:1e.0 20 <- [0x00e0200000 - 0x00e02fffff] size 0x00100000 gran 0x14 bus 03 mem
|
| 467 | PCI: 00:1e.0 assign_resources, bus 3 link: 0
|
| 468 | PCI: 03:03.0 10 <- [0x00e0200000 - 0x00e0200fff] size 0x00001000 gran 0x0c mem
|
| 469 | PCI: 00:1e.0 assign_resources, bus 3 link: 0
|
| 470 | PCI: 00:1f.1 10 <- [0x00000020a8 - 0x00000020af] size 0x00000008 gran 0x03 io
|
| 471 | PCI: 00:1f.1 14 <- [0x00000020c8 - 0x00000020cb] size 0x00000004 gran 0x02 io
|
| 472 | PCI: 00:1f.1 18 <- [0x00000020b0 - 0x00000020b7] size 0x00000008 gran 0x03 io
|
| 473 | PCI: 00:1f.1 1c <- [0x00000020cc - 0x00000020cf] size 0x00000004 gran 0x02 io
|
| 474 | PCI: 00:1f.1 20 <- [0x0000002080 - 0x000000208f] size 0x00000010 gran 0x04 io
|
| 475 | PCI: 00:1f.2 10 <- [0x00000020b8 - 0x00000020bf] size 0x00000008 gran 0x03 io
|
| 476 | PCI: 00:1f.2 14 <- [0x00000020d0 - 0x00000020d3] size 0x00000004 gran 0x02 io
|
| 477 | PCI: 00:1f.2 18 <- [0x00000020c0 - 0x00000020c7] size 0x00000008 gran 0x03 io
|
| 478 | PCI: 00:1f.2 1c <- [0x00000020d4 - 0x00000020d7] size 0x00000004 gran 0x02 io
|
| 479 | PCI: 00:1f.2 20 <- [0x0000002090 - 0x000000209f] size 0x00000010 gran 0x04 io
|
| 480 | PCI: 00:1f.2 24 <- [0x00e0444400 - 0x00e04447ff] size 0x00000400 gran 0x0a mem
|
| 481 | DOMAIN: 0000 assign_resources, bus 0 link: 0
|
| 482 | Root Device assign_resources, bus 0 link: 0
|
| 483 | Done setting resources.
|
| 484 | Show resources in subtree (Root Device)...After assigning values.
|
| 485 | Root Device child on link 0 CPU_CLUSTER: 0
|
| 486 | CPU_CLUSTER: 0 child on link 0 APIC: 00
|
| 487 | APIC: 00
|
| 488 | DOMAIN: 0000 child on link 0 PCI: 00:00.0
|
| 489 | DOMAIN: 0000 resource base 1000 size 10d8 align 12 gran 0 limit ffff flags 40040100 index 10000000
|
| 490 | DOMAIN: 0000 resource base d0000000 size 10444800 align 28 gran 0 limit efffffff flags 40040200 index 10000100
|
| 491 | DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
|
| 492 | DOMAIN: 0000 resource base c0000 size 3ff40000 align 0 gran 0 limit 0 flags e0004200 index 4
|
| 493 | DOMAIN: 0000 resource base 3f800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 5
|
| 494 | DOMAIN: 0000 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 7
|
| 495 | PCI: 00:00.0
|
| 496 | PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags e0000200 index cf
|
| 497 | PCI: 00:02.0
|
| 498 | PCI: 00:02.0 resource base e0300000 size 80000 align 19 gran 19 limit efffffff flags 60000200 index 10
|
| 499 | PCI: 00:02.0 resource base 20a0 size 8 align 3 gran 3 limit ffff flags 60000100 index 14
|
| 500 | PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001200 index 18
|
| 501 | PCI: 00:02.0 resource base e0400000 size 40000 align 18 gran 18 limit efffffff flags 60000200 index 1c
|
| 502 | PCI: 00:02.1
|
| 503 | PCI: 00:02.1 resource base e0380000 size 80000 align 19 gran 19 limit efffffff flags 60000200 index 10
|
| 504 | PCI: 00:1b.0
|
| 505 | PCI: 00:1b.0 resource base e0440000 size 4000 align 14 gran 14 limit efffffff flags 60000201 index 10
|
| 506 | PCI: 00:1c.0 child on link 0 PCI: 01:00.0
|
| 507 | PCI: 00:1c.0 resource base 1000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c
|
| 508 | PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
|
| 509 | PCI: 00:1c.0 resource base e0000000 size 100000 align 20 gran 20 limit efffffff flags 60080202 index 20
|
| 510 | PCI: 01:00.0
|
| 511 | PCI: 01:00.0 resource base e0020000 size 4000 align 14 gran 14 limit efffffff flags 60000201 index 10
|
| 512 | PCI: 01:00.0 resource base 1000 size 100 align 8 gran 8 limit ffff flags 60000100 index 18
|
| 513 | PCI: 01:00.0 resource base e0000000 size 20000 align 17 gran 17 limit efffffff flags 60002200 index 30
|
| 514 | PCI: 00:1c.1 child on link 0 PCI: 02:00.0
|
| 515 | PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
|
| 516 | PCI: 00:1c.1 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
|
| 517 | PCI: 00:1c.1 resource base e0100000 size 100000 align 20 gran 20 limit efffffff flags 60080202 index 20
|
| 518 | PCI: 02:00.0
|
| 519 | PCI: 02:00.0 resource base e0100000 size 10000 align 16 gran 16 limit efffffff flags 60000201 index 10
|
| 520 | PCI: 00:1d.0
|
| 521 | PCI: 00:1d.0 resource base 2000 size 20 align 5 gran 5 limit ffff flags 60000100 index 20
|
| 522 | PCI: 00:1d.1
|
| 523 | PCI: 00:1d.1 resource base 2020 size 20 align 5 gran 5 limit ffff flags 60000100 index 20
|
| 524 | PCI: 00:1d.2
|
| 525 | PCI: 00:1d.2 resource base 2040 size 20 align 5 gran 5 limit ffff flags 60000100 index 20
|
| 526 | PCI: 00:1d.3
|
| 527 | PCI: 00:1d.3 resource base 2060 size 20 align 5 gran 5 limit ffff flags 60000100 index 20
|
| 528 | PCI: 00:1d.7
|
| 529 | PCI: 00:1d.7 resource base e0444000 size 400 align 10 gran 10 limit efffffff flags 60000200 index 10
|
| 530 | PCI: 00:1e.0 child on link 0 PCI: 03:03.0
|
| 531 | PCI: 00:1e.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
|
| 532 | PCI: 00:1e.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
|
| 533 | PCI: 00:1e.0 resource base e0200000 size 100000 align 20 gran 20 limit efffffff flags 60080202 index 20
|
| 534 | PCI: 03:03.0
|
| 535 | PCI: 03:03.0 resource base e0200000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 10
|
| 536 | PCI: 00:1f.0
|
| 537 | PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
|
| 538 | PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
|
| 539 | PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
|
| 540 | PCI: 00:1f.1
|
| 541 | PCI: 00:1f.1 resource base 20a8 size 8 align 3 gran 3 limit ffff flags 60000100 index 10
|
| 542 | PCI: 00:1f.1 resource base 20c8 size 4 align 2 gran 2 limit ffff flags 60000100 index 14
|
| 543 | PCI: 00:1f.1 resource base 20b0 size 8 align 3 gran 3 limit ffff flags 60000100 index 18
|
| 544 | PCI: 00:1f.1 resource base 20cc size 4 align 2 gran 2 limit ffff flags 60000100 index 1c
|
| 545 | PCI: 00:1f.1 resource base 2080 size 10 align 4 gran 4 limit ffff flags 60000100 index 20
|
| 546 | PCI: 00:1f.2
|
| 547 | PCI: 00:1f.2 resource base 20b8 size 8 align 3 gran 3 limit ffff flags 60000100 index 10
|
| 548 | PCI: 00:1f.2 resource base 20d0 size 4 align 2 gran 2 limit ffff flags 60000100 index 14
|
| 549 | PCI: 00:1f.2 resource base 20c0 size 8 align 3 gran 3 limit ffff flags 60000100 index 18
|
| 550 | PCI: 00:1f.2 resource base 20d4 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c
|
| 551 | PCI: 00:1f.2 resource base 2090 size 10 align 4 gran 4 limit ffff flags 60000100 index 20
|
| 552 | PCI: 00:1f.2 resource base e0444400 size 400 align 10 gran 10 limit efffffff flags 60000200 index 24
|
| 553 | PCI: 00:1f.3
|
| 554 | PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
|
| 555 | Done allocating resources.
|
| 556 | BS: Exiting BS_DEV_RESOURCES state.
|
| 557 | BS: BS_DEV_RESOURCES times (us): entry 0 run 11610 exit 0
|
| 558 | BS: Entering BS_DEV_ENABLE state.
|
| 559 | Enabling resources...
|
| 560 | PCI: 00:00.0 subsystem <- 8086/7270
|
| 561 | PCI: 00:00.0 cmd <- 06
|
| 562 | PCI: 00:02.0 subsystem <- 8086/7270
|
| 563 | PCI: 00:02.0 cmd <- 03
|
| 564 | PCI: 00:02.1 subsystem <- 17aa/201a
|
| 565 | PCI: 00:02.1 cmd <- 02
|
| 566 | PCI: 00:1b.0 subsystem <- 8384/7680
|
| 567 | PCI: 00:1b.0 cmd <- 102
|
| 568 | PCI: 00:1c.0 bridge ctrl <- 0003
|
| 569 | PCI: 00:1c.0 subsystem <- 0000/0000
|
| 570 | PCI: 00:1c.0 cmd <- 107
|
| 571 | PCI: 00:1c.1 bridge ctrl <- 0003
|
| 572 | PCI: 00:1c.1 subsystem <- 0000/0000
|
| 573 | PCI: 00:1c.1 cmd <- 106
|
| 574 | PCI: 00:1d.0 subsystem <- 8086/7270
|
| 575 | PCI: 00:1d.0 cmd <- 01
|
| 576 | PCI: 00:1d.1 subsystem <- 8086/7270
|
| 577 | PCI: 00:1d.1 cmd <- 01
|
| 578 | PCI: 00:1d.2 subsystem <- 8086/7270
|
| 579 | PCI: 00:1d.2 cmd <- 01
|
| 580 | PCI: 00:1d.3 subsystem <- 8086/7270
|
| 581 | PCI: 00:1d.3 cmd <- 01
|
| 582 | PCI: 00:1d.7 subsystem <- 8086/7270
|
| 583 | PCI: 00:1d.7 cmd <- 102
|
| 584 | PCI: 00:1e.0 bridge ctrl <- 0003
|
| 585 | PCI: 00:1e.0 cmd <- 06 (NOT WRITTEN!)
|
| 586 | PCI: 00:1f.0 subsystem <- 8086/7270
|
| 587 | PCI: 00:1f.0 cmd <- 107
|
| 588 | PCI: 00:1f.1 subsystem <- 8086/7270
|
| 589 | PCI: 00:1f.1 cmd <- 01
|
| 590 | PCI: 00:1f.2 subsystem <- 8086/7270
|
| 591 | PCI: 00:1f.2 cmd <- 03
|
| 592 | PCI: 00:1f.3 subsystem <- 8086/7270
|
| 593 | PCI: 00:1f.3 cmd <- 101
|
| 594 | PCI: 01:00.0 cmd <- 03
|
| 595 | PCI: 02:00.0 cmd <- 02
|
| 596 | PCI: 03:03.0 cmd <- 02
|
| 597 | done.
|
| 598 | BS: Exiting BS_DEV_ENABLE state.
|
| 599 | BS: BS_DEV_ENABLE times (us): entry 0 run 619 exit 0
|
| 600 | BS: Entering BS_DEV_INIT state.
|
| 601 | Initializing devices...
|
| 602 | Root Device init
|
| 603 | Root Device init 7 usecs
|
| 604 | CPU_CLUSTER: 0 init
|
| 605 | start_eip=0x00001000, code_size=0x00000031
|
| 606 | Initializing SMM handler... ... pmbase = 0x0500
|
| 607 |
|
| 608 | SMI_STS: PM1
|
| 609 | PM1_STS: WAK PWRBTN
|
| 610 | GPE0_STS: GPIO13 GPIO12 GPIO11 GPIO9 GPIO8 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0
|
| 611 | ALT_GP_SMI_STS: GPI13 GPI12 GPI11 GPI9 GPI8 GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0
|
| 612 | TCO_STS:
|
| 613 | ... raise SMI#
|
| 614 | Initializing CPU #0
|
| 615 | CPU: vendor Intel device 6f6
|
| 616 | CPU: family 06, model 0f, stepping 06
|
| 617 | Enabling cache
|
| 618 | microcode: sig=0x6f6 pf=0x20 revision=0x0
|
| 619 | Microcode size field is 0
|
| 620 | Microcode size field is 0
|
| 621 | Microcode size field is 0
|
| 622 | Microcode size field is 0
|
| 623 | microcode: updated to revision 0xd1 date=2010-10-01
|
| 624 | CPU: Intel(R) Core(TM)2 CPU T7200 @ 2.00GHz.
|
| 625 | MTRR: Physical address space:
|
| 626 | 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
|
| 627 | 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
|
| 628 | 0x00000000000c0000 - 0x000000003f800000 size 0x3f740000 type 6
|
| 629 | 0x000000003f800000 - 0x00000000d0000000 size 0x90800000 type 0
|
| 630 | 0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1
|
| 631 | 0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0
|
| 632 | MTRR addr 0x0-0x10 set to 6 type @ 0
|
| 633 | MTRR addr 0x10-0x20 set to 6 type @ 1
|
| 634 | MTRR addr 0x20-0x30 set to 6 type @ 2
|
| 635 | MTRR addr 0x30-0x40 set to 6 type @ 3
|
| 636 | MTRR addr 0x40-0x50 set to 6 type @ 4
|
| 637 | MTRR addr 0x50-0x60 set to 6 type @ 5
|
| 638 | MTRR addr 0x60-0x70 set to 6 type @ 6
|
| 639 | MTRR addr 0x70-0x80 set to 6 type @ 7
|
| 640 | MTRR addr 0x80-0x84 set to 6 type @ 8
|
| 641 | MTRR addr 0x84-0x88 set to 6 type @ 9
|
| 642 | MTRR addr 0x88-0x8c set to 6 type @ 10
|
| 643 | MTRR addr 0x8c-0x90 set to 6 type @ 11
|
| 644 | MTRR addr 0x90-0x94 set to 6 type @ 12
|
| 645 | MTRR addr 0x94-0x98 set to 6 type @ 13
|
| 646 | MTRR addr 0x98-0x9c set to 6 type @ 14
|
| 647 | MTRR addr 0x9c-0xa0 set to 6 type @ 15
|
| 648 | MTRR addr 0xa0-0xa4 set to 0 type @ 16
|
| 649 | MTRR addr 0xa4-0xa8 set to 0 type @ 17
|
| 650 | MTRR addr 0xa8-0xac set to 0 type @ 18
|
| 651 | MTRR addr 0xac-0xb0 set to 0 type @ 19
|
| 652 | MTRR addr 0xb0-0xb4 set to 0 type @ 20
|
| 653 | MTRR addr 0xb4-0xb8 set to 0 type @ 21
|
| 654 | MTRR addr 0xb8-0xbc set to 0 type @ 22
|
| 655 | MTRR addr 0xbc-0xc0 set to 0 type @ 23
|
| 656 | MTRR addr 0xc0-0xc1 set to 6 type @ 24
|
| 657 | MTRR addr 0xc1-0xc2 set to 6 type @ 25
|
| 658 | MTRR addr 0xc2-0xc3 set to 6 type @ 26
|
| 659 | MTRR addr 0xc3-0xc4 set to 6 type @ 27
|
| 660 | MTRR addr 0xc4-0xc5 set to 6 type @ 28
|
| 661 | MTRR addr 0xc5-0xc6 set to 6 type @ 29
|
| 662 | MTRR addr 0xc6-0xc7 set to 6 type @ 30
|
| 663 | MTRR addr 0xc7-0xc8 set to 6 type @ 31
|
| 664 | MTRR addr 0xc8-0xc9 set to 6 type @ 32
|
| 665 | MTRR addr 0xc9-0xca set to 6 type @ 33
|
| 666 | MTRR addr 0xca-0xcb set to 6 type @ 34
|
| 667 | MTRR addr 0xcb-0xcc set to 6 type @ 35
|
| 668 | MTRR addr 0xcc-0xcd set to 6 type @ 36
|
| 669 | MTRR addr 0xcd-0xce set to 6 type @ 37
|
| 670 | MTRR addr 0xce-0xcf set to 6 type @ 38
|
| 671 | MTRR addr 0xcf-0xd0 set to 6 type @ 39
|
| 672 | MTRR addr 0xd0-0xd1 set to 6 type @ 40
|
| 673 | MTRR addr 0xd1-0xd2 set to 6 type @ 41
|
| 674 | MTRR addr 0xd2-0xd3 set to 6 type @ 42
|
| 675 | MTRR addr 0xd3-0xd4 set to 6 type @ 43
|
| 676 | MTRR addr 0xd4-0xd5 set to 6 type @ 44
|
| 677 | MTRR addr 0xd5-0xd6 set to 6 type @ 45
|
| 678 | MTRR addr 0xd6-0xd7 set to 6 type @ 46
|
| 679 | MTRR addr 0xd7-0xd8 set to 6 type @ 47
|
| 680 | MTRR addr 0xd8-0xd9 set to 6 type @ 48
|
| 681 | MTRR addr 0xd9-0xda set to 6 type @ 49
|
| 682 | MTRR addr 0xda-0xdb set to 6 type @ 50
|
| 683 | MTRR addr 0xdb-0xdc set to 6 type @ 51
|
| 684 | MTRR addr 0xdc-0xdd set to 6 type @ 52
|
| 685 | MTRR addr 0xdd-0xde set to 6 type @ 53
|
| 686 | MTRR addr 0xde-0xdf set to 6 type @ 54
|
| 687 | MTRR addr 0xdf-0xe0 set to 6 type @ 55
|
| 688 | MTRR addr 0xe0-0xe1 set to 6 type @ 56
|
| 689 | MTRR addr 0xe1-0xe2 set to 6 type @ 57
|
| 690 | MTRR addr 0xe2-0xe3 set to 6 type @ 58
|
| 691 | MTRR addr 0xe3-0xe4 set to 6 type @ 59
|
| 692 | MTRR addr 0xe4-0xe5 set to 6 type @ 60
|
| 693 | MTRR addr 0xe5-0xe6 set to 6 type @ 61
|
| 694 | MTRR addr 0xe6-0xe7 set to 6 type @ 62
|
| 695 | MTRR addr 0xe7-0xe8 set to 6 type @ 63
|
| 696 | MTRR addr 0xe8-0xe9 set to 6 type @ 64
|
| 697 | MTRR addr 0xe9-0xea set to 6 type @ 65
|
| 698 | MTRR addr 0xea-0xeb set to 6 type @ 66
|
| 699 | MTRR addr 0xeb-0xec set to 6 type @ 67
|
| 700 | MTRR addr 0xec-0xed set to 6 type @ 68
|
| 701 | MTRR addr 0xed-0xee set to 6 type @ 69
|
| 702 | MTRR addr 0xee-0xef set to 6 type @ 70
|
| 703 | MTRR addr 0xef-0xf0 set to 6 type @ 71
|
| 704 | MTRR addr 0xf0-0xf1 set to 6 type @ 72
|
| 705 | MTRR addr 0xf1-0xf2 set to 6 type @ 73
|
| 706 | MTRR addr 0xf2-0xf3 set to 6 type @ 74
|
| 707 | MTRR addr 0xf3-0xf4 set to 6 type @ 75
|
| 708 | MTRR addr 0xf4-0xf5 set to 6 type @ 76
|
| 709 | MTRR addr 0xf5-0xf6 set to 6 type @ 77
|
| 710 | MTRR addr 0xf6-0xf7 set to 6 type @ 78
|
| 711 | MTRR addr 0xf7-0xf8 set to 6 type @ 79
|
| 712 | MTRR addr 0xf8-0xf9 set to 6 type @ 80
|
| 713 | MTRR addr 0xf9-0xfa set to 6 type @ 81
|
| 714 | MTRR addr 0xfa-0xfb set to 6 type @ 82
|
| 715 | MTRR addr 0xfb-0xfc set to 6 type @ 83
|
| 716 | MTRR addr 0xfc-0xfd set to 6 type @ 84
|
| 717 | MTRR addr 0xfd-0xfe set to 6 type @ 85
|
| 718 | MTRR addr 0xfe-0xff set to 6 type @ 86
|
| 719 | MTRR addr 0xff-0x100 set to 6 type @ 87
|
| 720 | MTRR: Fixed MSR 0x250 0x0606060606060606
|
| 721 | MTRR: Fixed MSR 0x258 0x0606060606060606
|
| 722 | MTRR: Fixed MSR 0x259 0x0000000000000000
|
| 723 | MTRR: Fixed MSR 0x268 0x0606060606060606
|
| 724 | MTRR: Fixed MSR 0x269 0x0606060606060606
|
| 725 | MTRR: Fixed MSR 0x26a 0x0606060606060606
|
| 726 | MTRR: Fixed MSR 0x26b 0x0606060606060606
|
| 727 | MTRR: Fixed MSR 0x26c 0x0606060606060606
|
| 728 | MTRR: Fixed MSR 0x26d 0x0606060606060606
|
| 729 | MTRR: Fixed MSR 0x26e 0x0606060606060606
|
| 730 | MTRR: Fixed MSR 0x26f 0x0606060606060606
|
| 731 | call enable_fixed_mtrr()
|
| 732 | CPU physical address size: 36 bits
|
| 733 | MTRR: default type WB/UC MTRR counts: 6/3.
|
| 734 | MTRR: UC selected as default type.
|
| 735 | MTRR: 0 base 0x0000000000000000 mask 0x0000000fc0000000 type 6
|
| 736 | MTRR: 1 base 0x000000003f800000 mask 0x0000000fff800000 type 0
|
| 737 | MTRR: 2 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1
|
| 738 |
|
| 739 | MTRR check
|
| 740 | Fixed MTRRs : Enabled
|
| 741 | Variable MTRRs: Enabled
|
| 742 |
|
| 743 | Setting up local apic... apic_id: 0x00 done.
|
| 744 | CPU: 0 2 siblings
|
| 745 | CPU: 0 has sibling 1
|
| 746 | CPU #0 initialized
|
| 747 | CPU1: stack_base 0013c000, stack_end 0013cff8
|
| 748 | Asserting INIT.
|
| 749 | Waiting for send to finish...
|
| 750 | +Deasserting INIT.
|
| 751 | Waiting for send to finish...
|
| 752 | +#startup loops: 2.
|
| 753 | Sending STARTUP #1 to 1.
|
| 754 | After apic_write.
|
| 755 | Startup point 1.
|
| 756 | Waiting for send to finish...
|
| 757 | +Sending STARTUP #2 to 1.
|
| 758 | After apic_write.
|
| 759 | Startup point 1.
|
| 760 | Waiting for send to finish...
|
| 761 | +After Startup.
|
| 762 | Initializing CPU #1
|
| 763 | Waiting for 1 CPUS to stop
|
| 764 | CPU: vendor Intel device 6f6
|
| 765 | CPU: family 06, model 0f, stepping 06
|
| 766 | Enabling cache
|
| 767 | microcode: sig=0x6f6 pf=0x20 revision=0x0
|
| 768 | Microcode size field is 0
|
| 769 | Microcode size field is 0
|
| 770 | Microcode size field is 0
|
| 771 | Microcode size field is 0
|
| 772 | microcode: updated to revision 0xd1 date=2010-10-01
|
| 773 | CPU: Intel(R) Core(TM)2 CPU T7200 @ 2.00GHz.
|
| 774 | MTRR: Fixed MSR 0x250 0x0606060606060606
|
| 775 | MTRR: Fixed MSR 0x258 0x0606060606060606
|
| 776 | MTRR: Fixed MSR 0x259 0x0000000000000000
|
| 777 | MTRR: Fixed MSR 0x268 0x0606060606060606
|
| 778 | MTRR: Fixed MSR 0x269 0x0606060606060606
|
| 779 | MTRR: Fixed MSR 0x26a 0x0606060606060606
|
| 780 | MTRR: Fixed MSR 0x26b 0x0606060606060606
|
| 781 | MTRR: Fixed MSR 0x26c 0x0606060606060606
|
| 782 | MTRR: Fixed MSR 0x26d 0x0606060606060606
|
| 783 | MTRR: Fixed MSR 0x26e 0x0606060606060606
|
| 784 | MTRR: Fixed MSR 0x26f 0x0606060606060606
|
| 785 | call enable_fixed_mtrr()
|
| 786 | CPU physical address size: 36 bits
|
| 787 | MTRR: 0 base 0x0000000000000000 mask 0x0000000fc0000000 type 6
|
| 788 | MTRR: 1 base 0x000000003f800000 mask 0x0000000fff800000 type 0
|
| 789 | MTRR: 2 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1
|
| 790 |
|
| 791 | MTRR check
|
| 792 | Fixed MTRRs : Enabled
|
| 793 | Variable MTRRs: Enabled
|
| 794 |
|
| 795 | Setting up local apic... apic_id: 0x01 done.
|
| 796 | CPU: 1 2 siblings
|
| 797 | CPU #1 initialized
|
| 798 | CPU 1 going down...
|
| 799 | All AP CPUs stopped (1915 loops)
|
| 800 | CPU1: stack: 0013c000 - 0013d000, lowest used address 0013ccd0, stack used: 816 bytes
|
| 801 | CPU_CLUSTER: 0 init 54103 usecs
|
| 802 | PCI: 00:00.0 init
|
| 803 | Normal boot.
|
| 804 | PCI: 00:00.0 init 2 usecs
|
| 805 | PCI: 00:02.0 init
|
| 806 | Initializing VGA without OPROM.
|
| 807 | GMADR=0xd0000008 GTTADR=0xe0400000
|
| 808 | i915lightup: graphics d0000000 mmio e0300000 addrport 20a0 physbase 3f820000
|
| 809 | EDID:
|
| 810 | 00 ff ff ff ff ff ff 00 06 10 5f 9c 00 00 00 00
|
| 811 | 08 10 01 03 80 1d 12 78 0a 2f 30 97 58 53 8b 29
|
| 812 | 25 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
|
| 813 | 01 01 01 01 01 01 bc 1b 00 a0 50 20 17 30 30 20
|
| 814 | 36 00 1e b3 10 00 00 18 00 00 00 01 00 06 10 20
|
| 815 | 00 00 00 00 00 00 00 00 0a 20 00 00 00 fe 00 4c
|
| 816 | 50 31 33 33 57 58 31 2d 54 4c 41 31 00 00 00 fe
|
| 817 | 00 43 6f 6c 6f 72 20 4c 43 44 0a 20 20 20 00 c2
|
| 818 | Extracted contents:
|
| 819 | header: 00 ff ff ff ff ff ff 00
|
| 820 | serial number: 06 10 5f 9c 00 00 00 00 08 10
|
| 821 | version: 01 03
|
| 822 | basic params: 80 1d 12 78 0a
|
| 823 | chroma info: 2f 30 97 58 53 8b 29 25 50 54
|
| 824 | established: 00 00 00
|
| 825 | standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
|
| 826 | descriptor 1: bc 1b 00 a0 50 20 17 30 30 20 36 00 1e b3 10 00 00 18
|
| 827 | descriptor 2: 00 00 00 01 00 06 10 20 00 00 00 00 00 00 00 00 0a 20
|
| 828 | descriptor 3: 00 00 00 fe 00 4c 50 31 33 33 57 58 31 2d 54 4c 41 31
|
| 829 | descriptor 4: 00 00 00 fe 00 43 6f 6c 6f 72 20 4c 43 44 0a 20 20 20
|
| 830 | extensions: 00
|
| 831 | checksum: c2
|
| 832 |
|
| 833 | Manufacturer: APP Model 9c5f Serial Number 0
|
| 834 | Made week 8 of 2006
|
| 835 | EDID version: 1.3
|
| 836 | Digital display
|
| 837 | Maximum image size: 29 cm x 18 cm
|
| 838 | Gamma: 220%
|
| 839 | Check DPMS levels
|
| 840 | Supported color formats: RGB 4:4:4, YCrCb 4:2:2
|
| 841 | First detailed timing is preferred timing
|
| 842 | Established timings supported:
|
| 843 | Standard timings supported:
|
| 844 | Detailed timings
|
| 845 | Hex of detail: bc1b00a050201730302036001eb310000018
|
| 846 | Did detailed timing
|
| 847 | Detailed mode (IN HEX): Clock 71000 KHz, 11e mm x b3 mm
|
| 848 | 0500 0530 0550 05a0 hborder 0
|
| 849 | 0320 0323 0329 0337 vborder 0
|
| 850 | -hsync -vsync
|
| 851 | Hex of detail: 000000010006102000000000000000000a20
|
| 852 | Manufacturer-specified data, tag 1
|
| 853 | Hex of detail: 000000fe004c503133335758312d544c4131
|
| 854 | ASCII string: LP133WX1
|
| 855 | Hex of detail: 000000fe00436f6c6f72204c43440a202020
|
| 856 | ASCII string: Color
|
| 857 | Checksum
|
| 858 | Checksum: 0xc2 (valid)
|
| 859 |
|
| 860 | Unknown extension block
|
| 861 |
|
| 862 | EDID block does NOT conform to EDID 1.3!
|
| 863 | Missing name descriptor
|
| 864 | Missing monitor ranges
|
| 865 | Detailed block string not properly terminated
|
| 866 | EDID block does not conform at all!
|
| 867 | Detailed blocks filled with garbage
|
| 868 | bringing up panel at resolution 1280 x 800
|
| 869 | Borders 0 x 0
|
| 870 | Blank 160 x 23
|
| 871 | Sync 32 x 6
|
| 872 | Front porch 48 x 3
|
| 873 | Spread spectrum clock
|
| 874 | Single channel
|
| 875 | Polarities 1, 1
|
| 876 | Pixel N=7, M1=21, M2=11, P1=2
|
| 877 | Pixel clock 142040 kHz
|
| 878 | waiting for panel powerup
|
| 879 | panel powered up
|
| 880 | gtt_setup is enabled.
|
| 881 | 8M UMA
|
| 882 | GTT PGETBL_CTL register: 0x3f800001
|
| 883 | GTT Enabled
|
| 884 | memset d0000000 to 0x00 for 4096000 bytes
|
| 885 | PCI: 00:02.0 init 21500 usecs
|
| 886 | PCI: 00:02.1 init
|
| 887 | PCI: 00:02.1 init 735 usecs
|
| 888 | PCI: 00:1b.0 init
|
| 889 | Azalia: codec type: Azalia
|
| 890 | Azalia: base = e0440000
|
| 891 | Azalia: codec_mask = 01
|
| 892 | Azalia: Initializing codec #0
|
| 893 | Azalia: codec viddid: 83847680
|
| 894 | Azalia: verb_size: 44
|
| 895 | Azalia: verb loaded.
|
| 896 | PCI: 00:1b.0 init 4899 usecs
|
| 897 | PCI: 00:1c.0 init
|
| 898 | Initializing ICH7 PCIe bridge.
|
| 899 | PCI: 00:1c.0 init 19 usecs
|
| 900 | PCI: 00:1c.1 init
|
| 901 | Initializing ICH7 PCIe bridge.
|
| 902 | PCI: 00:1c.1 init 19 usecs
|
| 903 | PCI: 00:1d.0 init
|
| 904 | UHCI: Setting up controller.. done.
|
| 905 | PCI: 00:1d.0 init 6 usecs
|
| 906 | PCI: 00:1d.1 init
|
| 907 | UHCI: Setting up controller.. done.
|
| 908 | PCI: 00:1d.1 init 6 usecs
|
| 909 | PCI: 00:1d.2 init
|
| 910 | UHCI: Setting up controller.. done.
|
| 911 | PCI: 00:1d.2 init 6 usecs
|
| 912 | PCI: 00:1d.3 init
|
| 913 | UHCI: Setting up controller.. done.
|
| 914 | PCI: 00:1d.3 init 6 usecs
|
| 915 | PCI: 00:1d.7 init
|
| 916 | EHCI: Setting up controller.. done.
|
| 917 | PCI: 00:1d.7 init 11 usecs
|
| 918 | PCI: 00:1e.0 init
|
| 919 | PCI: 00:1e.0 init 12 usecs
|
| 920 | PCI: 00:1f.0 init
|
| 921 | i82801gx: lpc_init
|
| 922 | IOAPIC: Initializing IOAPIC at 0xfec00000
|
| 923 | IOAPIC: Bootstrap Processor Local APIC = 0x00
|
| 924 | IOAPIC: ID = 0x02
|
| 925 | IOAPIC: Dumping registers
|
| 926 | reg 0x0000: 0x02000000
|
| 927 | reg 0x0001: 0x00170020
|
| 928 | reg 0x0002: 0x00170020
|
| 929 | WARNING: No CMOS option 'power_on_after_fail'.
|
| 930 | Set power on after power failure.
|
| 931 | NMI sources enabled.
|
| 932 | rtc_failed = 0x0
|
| 933 | RTC Init
|
| 934 | Disabling ACPI via APMC:
|
| 935 | done.
|
| 936 | Locking SMM.
|
| 937 | PCI: 00:1f.0 init 2196 usecs
|
| 938 | PCI: 00:1f.1 init
|
| 939 | i82801gx_ide: initializing... IDE0 IDE1
|
| 940 | PCI: 00:1f.1 init 11 usecs
|
| 941 | PCI: 00:1f.2 init
|
| 942 | i82801gx_sata: initializing...
|
| 943 | SATA controller in AHCI mode.
|
| 944 | PCI: 00:1f.2 init 26 usecs
|
| 945 | PCI: 01:00.0 init
|
| 946 | PCI: 01:00.0 init 0 usecs
|
| 947 | PCI: 02:00.0 init
|
| 948 | PCI: 02:00.0 init 0 usecs
|
| 949 | PCI: 03:03.0 init
|
| 950 | PCI: 03:03.0 init 0 usecs
|
| 951 | Devices initialized
|
| 952 | Show all devs...After init.
|
| 953 | Root Device: enabled 1
|
| 954 | CPU_CLUSTER: 0: enabled 1
|
| 955 | APIC: 00: enabled 1
|
| 956 | DOMAIN: 0000: enabled 1
|
| 957 | PCI: 00:00.0: enabled 1
|
| 958 | PCI: 00:02.0: enabled 1
|
| 959 | PCI: 00:02.1: enabled 1
|
| 960 | PCI: 00:1b.0: enabled 1
|
| 961 | PCI: 00:1c.0: enabled 1
|
| 962 | PCI: 00:1c.1: enabled 1
|
| 963 | PCI: 00:1d.0: enabled 1
|
| 964 | PCI: 00:1d.1: enabled 1
|
| 965 | PCI: 00:1d.2: enabled 1
|
| 966 | PCI: 00:1d.3: enabled 1
|
| 967 | PCI: 00:1d.7: enabled 1
|
| 968 | PCI: 00:1f.0: enabled 1
|
| 969 | PCI: 00:1f.1: enabled 1
|
| 970 | PCI: 00:1f.2: enabled 1
|
| 971 | PCI: 00:1f.3: enabled 1
|
| 972 | PCI: 00:1e.0: enabled 1
|
| 973 | PCI: 01:00.0: enabled 1
|
| 974 | PCI: 02:00.0: enabled 1
|
| 975 | PCI: 03:03.0: enabled 1
|
| 976 | APIC: 01: enabled 1
|
| 977 | BS: Exiting BS_DEV_INIT state.
|
| 978 | BS: BS_DEV_INIT times (us): entry 0 run 83682 exit 0
|
| 979 | BS: Entering BS_POST_DEVICE state.
|
| 980 | Finalize devices...
|
| 981 | Devices finalized
|
| 982 | BS: Exiting BS_POST_DEVICE state.
|
| 983 | BS: BS_POST_DEVICE times (us): entry 0 run 5 exit 0
|
| 984 | BS: Entering BS_OS_RESUME_CHECK state.
|
| 985 | BS: Exiting BS_OS_RESUME_CHECK state.
|
| 986 | BS: BS_OS_RESUME_CHECK times (us): entry 0 run 3 exit 0
|
| 987 | BS: Entering BS_WRITE_TABLES state.
|
| 988 | ACPI: Writing ACPI tables at 3f7df000.
|
| 989 | ACPI: * HPET
|
| 990 | ACPI: added table 1/32, length now 40
|
| 991 | ACPI: * MADT
|
| 992 | ACPI: added table 2/32, length now 44
|
| 993 | ACPI: * MCFG
|
| 994 | ACPI: added table 3/32, length now 48
|
| 995 | ACPI: * FACS
|
| 996 | ACPI: Patching up global NVS in DSDT at offset 0x01f8 -> 0x3f7e1de0
|
| 997 | ACPI: * DSDT @ 3f7df340 Length 2aa0
|
| 998 | ACPI: * FADT
|
| 999 | ACPI: added table 4/32, length now 52
|
| 1000 | ACPI: * SSDT
|
| 1001 | Found 1 CPU(s) with 2 core(s) each.
|
| 1002 | clocks between 1000 and 2000 MHz.
|
| 1003 | adding 4 P-States between busratio 6 and c, incl. P0
|
| 1004 | PSS: 2000MHz power 35000 control 0xc28 status 0xc28
|
| 1005 | PSS: 1666MHz power 31666 control 0xa21 status 0xa21
|
| 1006 | PSS: 1333MHz power 28333 control 0x81a status 0x81a
|
| 1007 | PSS: 1000MHz power 25000 control 0x613 status 0x613
|
| 1008 | clocks between 1000 and 2000 MHz.
|
| 1009 | adding 4 P-States between busratio 6 and c, incl. P0
|
| 1010 | PSS: 2000MHz power 35000 control 0xc28 status 0xc28
|
| 1011 | PSS: 1666MHz power 31666 control 0xa21 status 0xa21
|
| 1012 | PSS: 1333MHz power 28333 control 0x81a status 0x81a
|
| 1013 | PSS: 1000MHz power 25000 control 0x613 status 0x613
|
| 1014 | ACPI: added table 5/32, length now 56
|
| 1015 | current = 3f7e2210
|
| 1016 | ACPI: done.
|
| 1017 | Laptop handling...
|
| 1018 | ACPI tables: 12816 bytes.
|
| 1019 | smbios_write_tables: 3f7de000
|
| 1020 | Root Device (Apple MacBook2,1)
|
| 1021 | CPU_CLUSTER: 0 (Intel i945 Northbridge)
|
| 1022 | APIC: 00 (Socket mFCPGA478 CPU)
|
| 1023 | DOMAIN: 0000 (Intel i945 Northbridge)
|
| 1024 | PCI: 00:00.0 (Intel i945 Northbridge)
|
| 1025 | PCI: 00:02.0 (Intel i945 Northbridge)
|
| 1026 | PCI: 00:02.1 (Intel i945 Northbridge)
|
| 1027 | PCI: 00:1b.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
|
| 1028 | PCI: 00:1c.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
|
| 1029 | PCI: 00:1c.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
|
| 1030 | PCI: 00:1d.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
|
| 1031 | PCI: 00:1d.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
|
| 1032 | PCI: 00:1d.2 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
|
| 1033 | PCI: 00:1d.3 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
|
| 1034 | PCI: 00:1d.7 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
|
| 1035 | PCI: 00:1f.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
|
| 1036 | PCI: 00:1f.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
|
| 1037 | PCI: 00:1f.2 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
|
| 1038 | PCI: 00:1f.3 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
|
| 1039 | PCI: 00:1e.0 (unknown)
|
| 1040 | PCI: 01:00.0 (unknown)
|
| 1041 | PCI: 02:00.0 (unknown)
|
| 1042 | PCI: 03:03.0 (unknown)
|
| 1043 | APIC: 01 (unknown)
|
| 1044 | SMBIOS tables: 342 bytes.
|
| 1045 | Writing table forward entry at 0x00000500
|
| 1046 | Wrote coreboot table at: 00000500, 0x10 bytes, checksum 6071
|
| 1047 | Table forward entry ends at 0x00000528.
|
| 1048 | ... aligned to 0x00001000
|
| 1049 | Writing coreboot table at 0x3f6d6000
|
| 1050 | rom_table_end = 0x3f6d6000
|
| 1051 | ... aligned to 0x3f6e0000
|
| 1052 | 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
|
| 1053 | 1. 0000000000001000-000000000009ffff: RAM
|
| 1054 | 2. 00000000000c0000-000000003f6d5fff: RAM
|
| 1055 | 3. 000000003f6d6000-000000003f7fffff: CONFIGURATION TABLES
|
| 1056 | 4. 000000003f800000-000000003fffffff: RESERVED
|
| 1057 | 5. 00000000f0000000-00000000f3ffffff: RESERVED
|
| 1058 | Wrote coreboot table at: 3f6d6000, 0x8a4 bytes, checksum feca
|
| 1059 | coreboot table: 2236 bytes.
|
| 1060 | CBMEM ROOT 0. 3f7ff000 00001000
|
| 1061 | CAR GLOBALS 1. 3f7fe000 00001000
|
| 1062 | CONSOLE 2. 3f7ee000 00010000
|
| 1063 | TIME STAMP 3. 3f7ed000 00001000
|
| 1064 | ROMSTAGE 4. 3f7ec000 00001000
|
| 1065 | GDT 5. 3f7eb000 00001000
|
| 1066 | ACPI 6. 3f7df000 0000c000
|
| 1067 | SMBIOS 7. 3f7de000 00001000
|
| 1068 | ACPI RESUME 8. 3f6de000 00100000
|
| 1069 | COREBOOT 9. 3f6d6000 00008000
|
| 1070 | BS: Exiting BS_WRITE_TABLES state.
|
| 1071 | BS: BS_WRITE_TABLES times (us): entry 0 run 1753 exit 0
|
| 1072 | BS: Entering BS_PAYLOAD_LOAD state.
|
| 1073 | CBFS: located payload @ ffe3d878, 245110 bytes.
|
| 1074 | Loading segment from rom address 0xffe3d878
|
| 1075 | code (compression=1)
|
| 1076 | New segment dstaddr 0x8200 memsize 0x17d18 srcaddr 0xffe3d8cc filesize 0x83ea
|
| 1077 | (cleaned up) New segment addr 0x8200 size 0x17d18 offset 0xffe3d8cc filesize 0x83ea
|
| 1078 | Loading segment from rom address 0xffe3d894
|
| 1079 | code (compression=1)
|
| 1080 | New segment dstaddr 0x100000 memsize 0xa33b4 srcaddr 0xffe45cb6 filesize 0x33938
|
| 1081 | (cleaned up) New segment addr 0x100000 size 0xa33b4 offset 0xffe45cb6 filesize 0x33938
|
| 1082 | Loading segment from rom address 0xffe3d8b0
|
| 1083 | Entry Point 0x00008200
|
| 1084 | Bounce Buffer at 3f5f0000, 938992 bytes
|
| 1085 | Loading Segment: addr: 0x0000000000008200 memsz: 0x0000000000017d18 filesz: 0x00000000000083ea
|
| 1086 | lb: [0x0000000000100000, 0x000000000014203c)
|
| 1087 | Post relocation: addr: 0x0000000000008200 memsz: 0x0000000000017d18 filesz: 0x00000000000083ea
|
| 1088 | using LZMA
|
| 1089 | [ 0x00008200, 000185e3, 0x0001ff18) <- ffe3d8cc
|
| 1090 | Clearing Segment: addr: 0x00000000000185e3 memsz: 0x0000000000007935
|
| 1091 | dest 00008200, end 0001ff18, bouncebuffer 3f5f0000
|
| 1092 | Loading Segment: addr: 0x0000000000100000 memsz: 0x00000000000a33b4 filesz: 0x0000000000033938
|
| 1093 | lb: [0x0000000000100000, 0x000000000014203c)
|
| 1094 | segment: [0x0000000000100000, 0x0000000000133938, 0x00000000001a33b4)
|
| 1095 | bounce: [0x000000003f5f0000, 0x000000003f623938, 0x000000003f6933b4)
|
| 1096 | Post relocation: addr: 0x000000003f5f0000 memsz: 0x00000000000a33b4 filesz: 0x0000000000033938
|
| 1097 | using LZMA
|
| 1098 | [ 0x3f5f0000, 3f6933b4, 0x3f6933b4) <- ffe45cb6
|
| 1099 | dest 3f5f0000, end 3f6933b4, bouncebuffer 3f5f0000
|
| 1100 | move suffix around: from 3f63203c, to 14203c, amount: 61378
|
| 1101 | Loaded segments
|
| 1102 | BS: Exiting BS_PAYLOAD_LOAD state.
|
| 1103 | BS: BS_PAYLOAD_LOAD times (us): entry 0 run 139103 exit 0
|
| 1104 | BS: Entering BS_PAYLOAD_BOOT state.
|
| 1105 | ICH7 watchdog disabled
|
| 1106 | Jumping to boot code at 00008200
|
| 1107 | CPU0: stack: 0013d000 - 0013e000, lowest used address 0013dacc, stack used: 1332 bytes
|
| 1108 | entry = 0x00008200
|
| 1109 | lb_start = 0x00100000
|
| 1110 | lb_size = 0x0004203c
|
| 1111 | buffer = 0x3f5f0000
|
| 1112 | error: terminal `serial_usb0' isn't found. |
| 1113 |
error: terminal `serial_usb0' isn't found. |
| 1114 |
error: file `/boot/grub/i386-coreboot/progress.mod' not found. |
| 1115 |
error: file `/boot/grub/i386-coreboot/true.mod' not found. |
| 1116 |
error: file `/boot/grub/i386-coreboot/gfxterm.mod' not found. |
| 1117 |
|