| |
| *** Pre-CBMEM romstage console overflowed, log truncated! *** |
| AP [4404] = cc186465 |
| OTHP [440c] = a08b4 |
| OTHP [440c] = 8b4 |
| REFI [4698] = 6cd01860 |
| SRFTP [46a4] = 41f88200 |
| Done dimm mapping |
| Update PCI-E configuration space: |
| PCI(0, 0, 0)[a0] = 0 |
| PCI(0, 0, 0)[a4] = 4 |
| PCI(0, 0, 0)[bc] = c2a00000 |
| PCI(0, 0, 0)[a8] = 3b600000 |
| PCI(0, 0, 0)[ac] = 4 |
| PCI(0, 0, 0)[b8] = c0000000 |
| PCI(0, 0, 0)[b0] = c0a00000 |
| PCI(0, 0, 0)[b4] = c0800000 |
| PCI(0, 0, 0)[7c] = 7f |
| PCI(0, 0, 0)[70] = fe000000 |
| PCI(0, 0, 0)[74] = 3 |
| PCI(0, 0, 0)[78] = fe000c00 |
| Done memory map |
| RCOMP...done |
| COMP2 done |
| COMP1 done |
| FORCE RCOMP and wait 20us...done |
| Done io registers |
| CPE |
| CP5b |
| CP5c |
| OTHP [400c] = 8b4 |
| OTHP [440c] = 8b4 |
| t123: 1767, 6000, 7620 |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : NO |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Recovery |
| ME: Current Operation State : Bring up |
| ME: Current Operation Mode : Normal |
| ME: Error Code : No Error |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Pseudo-global reset |
| ME: Progress Phase State : Waiting for DID BIOS message |
| ME: FWS2: 0x161f017a |
| ME: Bist in progress: 0x0 |
| ME: ICC Status : 0x1 |
| ME: Invoke MEBx : 0x1 |
| ME: CPU replaced : 0x1 |
| ME: MBP ready : 0x1 |
| ME: MFS failure : 0x1 |
| ME: Warm reset req : 0x0 |
| ME: CPU repl valid : 0x1 |
| ME: (Reserved) : 0x0 |
| ME: FW update req : 0x0 |
| ME: (Reserved) : 0x0 |
| ME: Current state : 0x1f |
| ME: Current PM event: 0x6 |
| ME: Progress code : 0x1 |
| Full training required |
| PASSED! Tell ME that DRAM is ready |
| ME: FWS2: 0x162c017a |
| ME: Bist in progress: 0x0 |
| ME: ICC Status : 0x1 |
| ME: Invoke MEBx : 0x1 |
| ME: CPU replaced : 0x1 |
| ME: MBP ready : 0x1 |
| ME: MFS failure : 0x1 |
| ME: Warm reset req : 0x0 |
| ME: CPU repl valid : 0x1 |
| ME: (Reserved) : 0x0 |
| ME: FW update req : 0x0 |
| ME: (Reserved) : 0x0 |
| ME: Current state : 0x2c |
| ME: Current PM event: 0x6 |
| ME: Progress code : 0x1 |
| ME: Requested BIOS Action: Continue to boot |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : NO |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Recovery |
| ME: Current Operation State : Bring up |
| ME: Current Operation Mode : Normal |
| ME: Error Code : No Error |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Pseudo-global reset |
| ME: Progress Phase State : 0x2c |
| memcfg DDR3 ref clock 133 MHz |
| memcfg DDR3 clock 1596 MHz |
| memcfg channel assignment: A: 0, B 1, C 2 |
| memcfg channel[0] config (00620020): |
| ECC inactive |
| enhanced interleave mode on |
| rank interleave on |
| DIMMA 8192 MB width x8 dual rank, selected |
| DIMMB 0 MB width x8 single rank |
| memcfg channel[1] config (00620020): |
| ECC inactive |
| enhanced interleave mode on |
| rank interleave on |
| DIMMA 8192 MB width x8 dual rank, selected |
| DIMMB 0 MB width x8 single rank |
| CBMEM: |
| IMD: root @ bffff000 254 entries. |
| IMD: root @ bfffec00 62 entries. |
| CBMEM entry for DIMM info: 0xbfffe880 |
| POST: 0x3b |
| POST: 0x3c |
| POST: 0x3d |
| TPM initialization. |
| TPM: Init |
| Found TPM ST33ZP24 by ST Microelectronics |
| TPM: Open |
| TPM: Startup |
| TPM: command 0x99 returned 0x0 |
| TPM: OK. |
| POST: 0x3f |
| MTRR Range: Start=ff000000 End=0 (Size 1000000) |
| MTRR Range: Start=0 End=1000000 (Size 1000000) |
| MTRR Range: Start=bf800000 End=c0000000 (Size 800000) |
| MTRR Range: Start=c0000000 End=c0800000 (Size 800000) |
| CBFS: 'Master Header Locator' located CBFS at [20100:bfffc0) |
| CBFS: Locating 'fallback/ramstage' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 153a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 154c0 |
| CBFS: File @ offset 154c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 154c0 |
| CBFS: Checking offset 1ad40 |
| CBFS: File @ offset 1ad40 size 38d |
| CBFS: Unmatched 'config' at 1ad40 |
| CBFS: Checking offset 1b140 |
| CBFS: File @ offset 1b140 size 245 |
| CBFS: Unmatched 'revision' at 1b140 |
| CBFS: Checking offset 1b3c0 |
| CBFS: File @ offset 1b3c0 size 100 |
| CBFS: Unmatched 'cmos.default' at 1b3c0 |
| CBFS: Checking offset 1b500 |
| CBFS: File @ offset 1b500 size 778 |
| CBFS: Unmatched 'cmos_layout.bin' at 1b500 |
| CBFS: Checking offset 1bcc0 |
| CBFS: File @ offset 1bcc0 size 34ff |
| CBFS: Unmatched 'fallback/dsdt.aml' at 1bcc0 |
| CBFS: Checking offset 1f240 |
| CBFS: File @ offset 1f240 size c58 |
| CBFS: Unmatched '' at 1f240 |
| CBFS: Checking offset 1fec0 |
| CBFS: File @ offset 1fec0 size 10000 |
| CBFS: Unmatched 'mrc.cache' at 1fec0 |
| CBFS: Checking offset 2ff00 |
| CBFS: File @ offset 2ff00 size 1743f |
| CBFS: Found @ offset 2ff00 size 1743f |
| Decompressing stage fallback/ramstage @ 0xbff92fc0 (281232 bytes) |
| Loading module at bff93000 with entry bff93000. filesize: 0x32e70 memsize: 0x44a50 |
| Processing 3212 relocs. Offset value of 0xbfe93000 |
| |
| |
| coreboot-4.6-596-g12983db91d-dirty Wed Jun 28 18:24:23 UTC 2017 ramstage starting... |
| POST: 0x39 |
| POST: 0x80 |
| Normal boot. |
| POST: 0x70 |
| BS: BS_PRE_DEVICE times (us): entry 0 run 2 exit 0 |
| POST: 0x71 |
| BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 3 exit 0 |
| POST: 0x72 |
| Enumerating buses... |
| Show all devs... Before device enumeration. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 0 |
| PCI: 00:1c.4: enabled 0 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 00ff.1: enabled 1 |
| PNP: 0c31.0: enabled 1 |
| PNP: 00ff.2: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| I2C: 00:54: enabled 1 |
| I2C: 00:55: enabled 1 |
| I2C: 00:56: enabled 1 |
| I2C: 00:57: enabled 1 |
| I2C: 00:5c: enabled 1 |
| I2C: 00:5d: enabled 1 |
| I2C: 00:5e: enabled 1 |
| I2C: 00:5f: enabled 1 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 1 |
| Compare with tree... |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 0 |
| PCI: 00:1c.4: enabled 0 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 00ff.1: enabled 1 |
| PNP: 0c31.0: enabled 1 |
| PNP: 00ff.2: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| I2C: 00:54: enabled 1 |
| I2C: 00:55: enabled 1 |
| I2C: 00:56: enabled 1 |
| I2C: 00:57: enabled 1 |
| I2C: 00:5c: enabled 1 |
| I2C: 00:5d: enabled 1 |
| I2C: 00:5e: enabled 1 |
| I2C: 00:5f: enabled 1 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 1 |
| Root Device scanning... |
| root_dev_scan_bus for Root Device |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| DOMAIN: 0000 scanning... |
| PCI: pci_scan_bus for bus 00 |
| POST: 0x24 |
| PCI: 00:00.0 [8086/0154] ops |
| PCI: 00:00.0 [8086/0154] enabled |
| Capability: type 0x0d @ 0x88 |
| Capability: type 0x01 @ 0x80 |
| Capability: type 0x05 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| Capability: type 0x0d @ 0x88 |
| Capability: type 0x01 @ 0x80 |
| Capability: type 0x05 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| PCI: 00:01.0 subordinate bus PCI Express |
| PCI: 00:01.0 [8086/0151] disabled |
| PCI: 00:02.0 [8086/0000] ops |
| PCI: 00:02.0 [8086/0166] enabled |
| memalign Enter, boundary 8, size 152, free_mem_ptr bffd3a50 |
| memalign bffd3a50 |
| PCI: 00:04.0 [8086/0153] enabled |
| PCI: 00:14.0 [8086/0000] ops |
| PCI: 00:14.0 [8086/1e31] enabled |
| PCI: 00:16.0 [8086/1e3a] ops |
| PCI: 00:16.0 [8086/1e3a] enabled |
| PCI: 00:16.1: Disabling device |
| PCI: 00:16.2: Disabling device |
| PCI: 00:16.3: Disabling device |
| PCI: 00:19.0 [8086/1502] enabled |
| PCI: 00:1a.0 [8086/0000] ops |
| PCI: 00:1a.0 [8086/1e2d] enabled |
| PCI: 00:1b.0 [8086/0000] ops |
| PCI: 00:1b.0 [8086/1e20] enabled |
| PCH: PCIe Root Port coalescing is enabled |
| PCI: 00:1c.0 [8086/0000] bus ops |
| PCI: 00:1c.0 [8086/1e10] enabled |
| PCI: 00:1c.1 [8086/0000] bus ops |
| PCI: 00:1c.1 [8086/1e12] enabled |
| PCI: 00:1c.2 [8086/0000] bus ops |
| PCI: 00:1c.2 [8086/1e14] enabled |
| PCI: 00:1c.3: Disabling device |
| PCI: 00:1c.4: Disabling device |
| PCI: 00:1c.4: check set enabled |
| PCI: 00:1c.5: Disabling device |
| PCI: 00:1c.6: Disabling device |
| PCI: 00:1c.7: Disabling device |
| PCH: RPFN 0x76543210 -> 0xfedcb210 |
| PCI: 00:1d.0 [8086/0000] ops |
| PCI: 00:1d.0 [8086/1e26] enabled |
| PCI: 00:1e.0: Disabling device |
| PCI: 00:1f.0 [8086/0000] bus ops |
| PCI: 00:1f.0 [8086/1e55] enabled |
| PCI: 00:1f.2 [8086/0000] ops |
| CBFS: 'Master Header Locator' located CBFS at [20100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 153a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 154c0 |
| CBFS: File @ offset 154c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 154c0 |
| CBFS: Checking offset 1ad40 |
| CBFS: File @ offset 1ad40 size 38d |
| CBFS: Unmatched 'config' at 1ad40 |
| CBFS: Checking offset 1b140 |
| CBFS: File @ offset 1b140 size 245 |
| CBFS: Unmatched 'revision' at 1b140 |
| CBFS: Checking offset 1b3c0 |
| CBFS: File @ offset 1b3c0 size 100 |
| CBFS: Unmatched 'cmos.default' at 1b3c0 |
| CBFS: Checking offset 1b500 |
| CBFS: File @ offset 1b500 size 778 |
| CBFS: Found @ offset 1b500 size 778 |
| PCI: 00:1f.2 [8086/1e01] enabled |
| PCI: 00:1f.3 [8086/0000] bus ops |
| PCI: 00:1f.3 [8086/1e22] enabled |
| PCI: 00:1f.5: Disabling device |
| PCI: Static device PCI: 00:1f.6 not found, disabling it. |
| POST: 0x25 |
| PCI: 00:1c.0 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.0 |
| PCI: pci_scan_bus for bus 01 |
| POST: 0x24 |
| PCI: 01:00.0 [1180/0000] ops |
| PCI: 01:00.0 [1180/e822] enabled |
| POST: 0x25 |
| POST: 0x55 |
| Capability: type 0x05 @ 0x50 |
| Capability: type 0x01 @ 0x78 |
| Capability: type 0x10 @ 0x80 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| scan_bus: scanning of bus PCI: 00:1c.0 took 217 usecs |
| PCI: 00:1c.1 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.1 |
| memalign Enter, boundary 8, size 36, free_mem_ptr bffd3ae8 |
| memalign bffd3ae8 |
| PCI: pci_scan_bus for bus 02 |
| POST: 0x24 |
| memalign Enter, boundary 8, size 152, free_mem_ptr bffd3b0c |
| memalign bffd3b10 |
| PCI: 02:00.0 [168c/0030] enabled |
| POST: 0x25 |
| POST: 0x55 |
| Capability: type 0x01 @ 0x40 |
| Capability: type 0x05 @ 0x50 |
| Capability: type 0x10 @ 0x70 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpointASPM: Enabled L0s and L1 |
| scan_bus: scanning of bus PCI: 00:1c.1 took 207 usecs |
| PCI: 00:1c.2 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.2 |
| memalign Enter, boundary 8, size 36, free_mem_ptr bffd3ba8 |
| memalign bffd3ba8 |
| PCI: pci_scan_bus for bus 03 |
| POST: 0x24 |
| POST: 0x25 |
| POST: 0x55 |
| memalign Enter, boundary 8, size 152, free_mem_ptr bffd3bcc |
| memalign bffd3bd0 |
| scan_bus: scanning of bus PCI: 00:1c.2 took 52 usecs |
| PCI: 00:1f.0 scanning... |
| scan_lpc_bus for PCI: 00:1f.0 |
| memalign Enter, boundary 8, size 2560, free_mem_ptr bffd3c68 |
| memalign bffd3c68 |
| CBFS: 'Master Header Locator' located CBFS at [20100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 153a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 154c0 |
| CBFS: File @ offset 154c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 154c0 |
| CBFS: Checking offset 1ad40 |
| CBFS: File @ offset 1ad40 size 38d |
| CBFS: Unmatched 'config' at 1ad40 |
| CBFS: Checking offset 1b140 |
| CBFS: File @ offset 1b140 size 245 |
| CBFS: Unmatched 'revision' at 1b140 |
| CBFS: Checking offset 1b3c0 |
| CBFS: File @ offset 1b3c0 size 100 |
| CBFS: Unmatched 'cmos.default' at 1b3c0 |
| CBFS: Checking offset 1b500 |
| CBFS: File @ offset 1b500 size 778 |
| CBFS: Found @ offset 1b500 size 778 |
| CBFS: 'Master Header Locator' located CBFS at [20100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 153a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 154c0 |
| CBFS: File @ offset 154c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 154c0 |
| CBFS: Checking offset 1ad40 |
| CBFS: File @ offset 1ad40 size 38d |
| CBFS: Unmatched 'config' at 1ad40 |
| CBFS: Checking offset 1b140 |
| CBFS: File @ offset 1b140 size 245 |
| CBFS: Unmatched 'revision' at 1b140 |
| CBFS: Checking offset 1b3c0 |
| CBFS: File @ offset 1b3c0 size 100 |
| CBFS: Unmatched 'cmos.default' at 1b3c0 |
| CBFS: Checking offset 1b500 |
| CBFS: File @ offset 1b500 size 778 |
| CBFS: Found @ offset 1b500 size 778 |
| PNP: 00ff.1 enabled |
| PNP: 0c31.0 enabled |
| recv_ec_data: 0x47 |
| recv_ec_data: 0x32 |
| recv_ec_data: 0x48 |
| recv_ec_data: 0x54 |
| recv_ec_data: 0x33 |
| recv_ec_data: 0x35 |
| recv_ec_data: 0x57 |
| recv_ec_data: 0x57 |
| recv_ec_data: 0x16 |
| recv_ec_data: 0x03 |
| recv_ec_data: 0x40 |
| recv_ec_data: 0x11 |
| EC Firmware ID G2HT35WW-3.22, Version 4.01B |
| CBFS: 'Master Header Locator' located CBFS at [20100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 153a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 154c0 |
| CBFS: File @ offset 154c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 154c0 |
| CBFS: Checking offset 1ad40 |
| CBFS: File @ offset 1ad40 size 38d |
| CBFS: Unmatched 'config' at 1ad40 |
| CBFS: Checking offset 1b140 |
| CBFS: File @ offset 1b140 size 245 |
| CBFS: Unmatched 'revision' at 1b140 |
| CBFS: Checking offset 1b3c0 |
| CBFS: File @ offset 1b3c0 size 100 |
| CBFS: Unmatched 'cmos.default' at 1b3c0 |
| CBFS: Checking offset 1b500 |
| CBFS: File @ offset 1b500 size 778 |
| CBFS: Found @ offset 1b500 size 778 |
| recv_ec_data: 0x00 |
| CBFS: 'Master Header Locator' located CBFS at [20100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 153a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 154c0 |
| CBFS: File @ offset 154c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 154c0 |
| CBFS: Checking offset 1ad40 |
| CBFS: File @ offset 1ad40 size 38d |
| CBFS: Unmatched 'config' at 1ad40 |
| CBFS: Checking offset 1b140 |
| CBFS: File @ offset 1b140 size 245 |
| CBFS: Unmatched 'revision' at 1b140 |
| CBFS: Checking offset 1b3c0 |
| CBFS: File @ offset 1b3c0 size 100 |
| CBFS: Unmatched 'cmos.default' at 1b3c0 |
| CBFS: Checking offset 1b500 |
| CBFS: File @ offset 1b500 size 778 |
| CBFS: Found @ offset 1b500 size 778 |
| recv_ec_data: 0x70 |
| recv_ec_data: 0x90 |
| CBFS: 'Master Header Locator' located CBFS at [20100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 153a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 154c0 |
| CBFS: File @ offset 154c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 154c0 |
| CBFS: Checking offset 1ad40 |
| CBFS: File @ offset 1ad40 size 38d |
| CBFS: Unmatched 'config' at 1ad40 |
| CBFS: Checking offset 1b140 |
| CBFS: File @ offset 1b140 size 245 |
| CBFS: Unmatched 'revision' at 1b140 |
| CBFS: Checking offset 1b3c0 |
| CBFS: File @ offset 1b3c0 size 100 |
| CBFS: Unmatched 'cmos.default' at 1b3c0 |
| CBFS: Checking offset 1b500 |
| CBFS: File @ offset 1b500 size 778 |
| CBFS: Found @ offset 1b500 size 778 |
| CBFS: 'Master Header Locator' located CBFS at [20100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 153a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 154c0 |
| CBFS: File @ offset 154c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 154c0 |
| CBFS: Checking offset 1ad40 |
| CBFS: File @ offset 1ad40 size 38d |
| CBFS: Unmatched 'config' at 1ad40 |
| CBFS: Checking offset 1b140 |
| CBFS: File @ offset 1b140 size 245 |
| CBFS: Unmatched 'revision' at 1b140 |
| CBFS: Checking offset 1b3c0 |
| CBFS: File @ offset 1b3c0 size 100 |
| CBFS: Unmatched 'cmos.default' at 1b3c0 |
| CBFS: Checking offset 1b500 |
| CBFS: File @ offset 1b500 size 778 |
| CBFS: Found @ offset 1b500 size 778 |
| recv_ec_data: 0x70 |
| CBFS: 'Master Header Locator' located CBFS at [20100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 153a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 154c0 |
| CBFS: File @ offset 154c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 154c0 |
| CBFS: Checking offset 1ad40 |
| CBFS: File @ offset 1ad40 size 38d |
| CBFS: Unmatched 'config' at 1ad40 |
| CBFS: Checking offset 1b140 |
| CBFS: File @ offset 1b140 size 245 |
| CBFS: Unmatched 'revision' at 1b140 |
| CBFS: Checking offset 1b3c0 |
| CBFS: File @ offset 1b3c0 size 100 |
| CBFS: Unmatched 'cmos.default' at 1b3c0 |
| CBFS: Checking offset 1b500 |
| CBFS: File @ offset 1b500 size 778 |
| CBFS: Found @ offset 1b500 size 778 |
| recv_ec_data: 0x70 |
| CBFS: 'Master Header Locator' located CBFS at [20100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 153a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 154c0 |
| CBFS: File @ offset 154c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 154c0 |
| CBFS: Checking offset 1ad40 |
| CBFS: File @ offset 1ad40 size 38d |
| CBFS: Unmatched 'config' at 1ad40 |
| CBFS: Checking offset 1b140 |
| CBFS: File @ offset 1b140 size 245 |
| CBFS: Unmatched 'revision' at 1b140 |
| CBFS: Checking offset 1b3c0 |
| CBFS: File @ offset 1b3c0 size 100 |
| CBFS: Unmatched 'cmos.default' at 1b3c0 |
| CBFS: Checking offset 1b500 |
| CBFS: File @ offset 1b500 size 778 |
| CBFS: Found @ offset 1b500 size 778 |
| recv_ec_data: 0x00 |
| CBFS: 'Master Header Locator' located CBFS at [20100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 153a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 154c0 |
| CBFS: File @ offset 154c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 154c0 |
| CBFS: Checking offset 1ad40 |
| CBFS: File @ offset 1ad40 size 38d |
| CBFS: Unmatched 'config' at 1ad40 |
| CBFS: Checking offset 1b140 |
| CBFS: File @ offset 1b140 size 245 |
| CBFS: Unmatched 'revision' at 1b140 |
| CBFS: Checking offset 1b3c0 |
| CBFS: File @ offset 1b3c0 size 100 |
| CBFS: Unmatched 'cmos.default' at 1b3c0 |
| CBFS: Checking offset 1b500 |
| CBFS: File @ offset 1b500 size 778 |
| CBFS: Found @ offset 1b500 size 778 |
| recv_ec_data: 0xa6 |
| CBFS: 'Master Header Locator' located CBFS at [20100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 153a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 154c0 |
| CBFS: File @ offset 154c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 154c0 |
| CBFS: Checking offset 1ad40 |
| CBFS: File @ offset 1ad40 size 38d |
| CBFS: Unmatched 'config' at 1ad40 |
| CBFS: Checking offset 1b140 |
| CBFS: File @ offset 1b140 size 245 |
| CBFS: Unmatched 'revision' at 1b140 |
| CBFS: Checking offset 1b3c0 |
| CBFS: File @ offset 1b3c0 size 100 |
| CBFS: Unmatched 'cmos.default' at 1b3c0 |
| CBFS: Checking offset 1b500 |
| CBFS: File @ offset 1b500 size 778 |
| CBFS: Found @ offset 1b500 size 778 |
| recv_ec_data: 0xa6 |
| recv_ec_data: 0x70 |
| PNP: 00ff.2 enabled |
| scan_lpc_bus for PCI: 00:1f.0 done |
| scan_bus: scanning of bus PCI: 00:1f.0 took 4818 usecs |
| PCI: 00:1f.3 scanning... |
| scan_generic_bus for PCI: 00:1f.3 |
| bus: PCI: 00:1f.3[0]->I2C: 01:54 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled |
| scan_generic_bus for PCI: 00:1f.3 done |
| scan_bus: scanning of bus PCI: 00:1f.3 took 20 usecs |
| POST: 0x55 |
| scan_bus: scanning of bus DOMAIN: 0000 took 5725 usecs |
| root_dev_scan_bus for Root Device done |
| scan_bus: scanning of bus Root Device took 5732 usecs |
| done |
| BS: BS_DEV_ENUMERATE times (us): entry 0 run 5837 exit 0 |
| POST: 0x73 |
| found VGA at PCI: 00:02.0 |
| Setting up VGA for PCI: 00:02.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| Allocating resources... |
| Reading resources... |
| Root Device read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 |
| Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000. |
| PCI: 00:1a.0 EHCI BAR hook registered |
| PCI: 00:1c.0 read_resources bus 1 link: 0 |
| PCI: 00:1c.0 read_resources bus 1 link: 0 done |
| PCI: 00:1c.1 read_resources bus 2 link: 0 |
| PCI: 00:1c.1 read_resources bus 2 link: 0 done |
| PCI: 00:1c.2 read_resources bus 3 link: 0 |
| PCI: 00:1c.2 read_resources bus 3 link: 0 done |
| More than one caller of pci_ehci_read_resources from PCI: 00:1d.0 |
| PCI: 00:1f.0 read_resources bus 0 link: 0 |
| PNP: 00ff.1 missing read_resources |
| PNP: 00ff.2 missing read_resources |
| PCI: 00:1f.0 read_resources bus 0 link: 0 done |
| PCI: 00:1f.3 read_resources bus 1 link: 0 |
| PCI: 00:1f.3 read_resources bus 1 link: 0 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 done |
| Root Device read_resources bus 0 link: 0 done |
| Done reading resources. |
| Show resources in subtree (Root Device)...After reading. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: acac |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 |
| PCI: 00:00.0 |
| PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 |
| PCI: 00:01.0 |
| PCI: 00:02.0 |
| PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18 |
| PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20 |
| PCI: 00:04.0 |
| PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:14.0 |
| PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:16.0 |
| PCI: 00:16.0 resource base 0 size 10 align 12 gran 4 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:19.0 |
| PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 |
| PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 |
| PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 |
| PCI: 00:1a.0 |
| PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:1c.0 child on link 0 PCI: 01:00.0 |
| PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 01:00.0 |
| PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| PCI: 00:1c.1 child on link 0 PCI: 02:00.0 |
| PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 02:00.0 |
| PCI: 02:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10 |
| PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30 |
| PCI: 00:1c.2Unknown device path type: 0 |
| child on link 0 |
| PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| Unknown device path type: 0 |
| |
| Unknown device path type: 0 |
| resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10 |
| Unknown device path type: 0 |
| resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14 |
| Unknown device path type: 0 |
| resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18 |
| PCI: 00:1c.3 |
| PCI: 00:1c.4 |
| PCI: 00:1c.5 |
| PCI: 00:1c.6 |
| PCI: 00:1c.7 |
| PCI: 00:1d.0 |
| PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| PCI: 00:1e.0 |
| PCI: 00:1f.0 child on link 0 PNP: 00ff.1 |
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200 |
| PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300 |
| PNP: 00ff.1 |
| PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 |
| PNP: 0c31.0 |
| PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0 |
| PNP: 00ff.2 |
| PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 |
| PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 |
| PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 |
| PCI: 00:1f.2 |
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 |
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 |
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 |
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c |
| PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 |
| PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24 |
| PCI: 00:1f.3 child on link 0 I2C: 01:54 |
| PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 |
| PCI: 00:1f.3 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10 |
| I2C: 01:54 |
| I2C: 01:55 |
| I2C: 01:56 |
| I2C: 01:57 |
| I2C: 01:5c |
| I2C: 01:5d |
| I2C: 01:5e |
| I2C: 01:5f |
| PCI: 00:1f.5 |
| PCI: 00:1f.6 |
| DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff |
| PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| Unknown device path type: 0 |
| 18 * [0x0 - 0xfff] io |
| PCI: 00:1c.2 io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.2 1c * [0x0 - 0xfff] io |
| PCI: 00:02.0 20 * [0x1000 - 0x103f] io |
| PCI: 00:19.0 18 * [0x1040 - 0x105f] io |
| PCI: 00:1f.2 20 * [0x1060 - 0x107f] io |
| PCI: 00:1f.2 10 * [0x1080 - 0x1087] io |
| PCI: 00:1f.2 18 * [0x1088 - 0x108f] io |
| PCI: 00:1f.2 14 * [0x1090 - 0x1093] io |
| PCI: 00:1f.2 1c * [0x1094 - 0x1097] io |
| DOMAIN: 0000 io: base: 1098 size: 1098 align: 12 gran: 0 limit: ffff done |
| DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff |
| PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 01:00.0 10 * [0x0 - 0xff] mem |
| PCI: 00:1c.0 mem: base: 100 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 02:00.0 10 * [0x0 - 0x1ffff] mem |
| PCI: 02:00.0 30 * [0x20000 - 0x2ffff] mem |
| PCI: 00:1c.1 mem: base: 30000 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| Unknown device path type: 0 |
| 14 * [0x0 - 0x7fffff] prefmem |
| PCI: 00:1c.2 prefmem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done |
| PCI: 00:1c.2 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| Unknown device path type: 0 |
| 10 * [0x0 - 0x7fffff] mem |
| PCI: 00:1c.2 mem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done |
| PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem |
| PCI: 00:1c.2 24 * [0x10000000 - 0x107fffff] prefmem |
| PCI: 00:1c.2 20 * [0x10800000 - 0x10ffffff] mem |
| PCI: 00:02.0 10 * [0x11000000 - 0x113fffff] mem |
| PCI: 00:1c.0 20 * [0x11400000 - 0x114fffff] mem |
| PCI: 00:1c.1 20 * [0x11500000 - 0x115fffff] mem |
| PCI: 00:19.0 10 * [0x11600000 - 0x1161ffff] mem |
| PCI: 00:14.0 10 * [0x11620000 - 0x1162ffff] mem |
| PCI: 00:04.0 10 * [0x11630000 - 0x11637fff] mem |
| PCI: 00:1b.0 10 * [0x11638000 - 0x1163bfff] mem |
| PCI: 00:19.0 14 * [0x1163c000 - 0x1163cfff] mem |
| PCI: 00:1f.2 24 * [0x1163d000 - 0x1163d7ff] mem |
| PCI: 00:1a.0 10 * [0x1163e000 - 0x1163e3ff] mem |
| PCI: 00:1d.0 10 * [0x1163f000 - 0x1163f3ff] mem |
| PCI: 00:1f.3 10 * [0x11640000 - 0x116400ff] mem |
| PCI: 00:16.0 10 * [0x11641000 - 0x1164100f] mem |
| DOMAIN: 0000 mem: base: 11641010 size: 11641010 align: 28 gran: 0 limit: ffffffff done |
| avoid_fixed_resources: DOMAIN: 0000 |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff |
| constrain_resources: PCI: 00:00.0 60 base f8000000 limit fbffffff mem (fixed) |
| constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed) |
| constrain_resources: PCI: 00:1f.0 10000200 base 00001600 limit 0000167b io (fixed) |
| skipping PNP: 00ff.2@60 fixed resource, size=0! |
| skipping PNP: 00ff.2@62 fixed resource, size=0! |
| skipping PNP: 00ff.2@64 fixed resource, size=0! |
| skipping PNP: 00ff.2@66 fixed resource, size=0! |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 base 0000167c limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 base e0000000 limit f7ffffff |
| Setting resources... |
| DOMAIN: 0000 io: base:167c size:1098 align:12 gran:0 limit:ffff |
| PCI: 00:1c.2 1c * [0x2000 - 0x2fff] io |
| PCI: 00:02.0 20 * [0x3000 - 0x303f] io |
| PCI: 00:19.0 18 * [0x3040 - 0x305f] io |
| PCI: 00:1f.2 20 * [0x3060 - 0x307f] io |
| PCI: 00:1f.2 10 * [0x3080 - 0x3087] io |
| PCI: 00:1f.2 18 * [0x3088 - 0x308f] io |
| PCI: 00:1f.2 14 * [0x3090 - 0x3093] io |
| PCI: 00:1f.2 1c * [0x3094 - 0x3097] io |
| DOMAIN: 0000 io: next_base: 3098 size: 1098 align: 12 gran: 0 done |
| PCI: 00:1c.0 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:1c.0 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| PCI: 00:1c.1 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:1c.1 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| PCI: 00:1c.2 io: base:2000 size:1000 align:12 gran:12 limit:2fff |
| Unknown device path type: 0 |
| 18 * [0x2000 - 0x2fff] io |
| PCI: 00:1c.2 io: next_base: 3000 size: 1000 align: 12 gran: 12 done |
| DOMAIN: 0000 mem: base:e0000000 size:11641010 align:28 gran:0 limit:f7ffffff |
| PCI: 00:02.0 18 * [0xe0000000 - 0xefffffff] prefmem |
| PCI: 00:1c.2 24 * [0xf0000000 - 0xf07fffff] prefmem |
| PCI: 00:1c.2 20 * [0xf0800000 - 0xf0ffffff] mem |
| PCI: 00:02.0 10 * [0xf1000000 - 0xf13fffff] mem |
| PCI: 00:1c.0 20 * [0xf1400000 - 0xf14fffff] mem |
| PCI: 00:1c.1 20 * [0xf1500000 - 0xf15fffff] mem |
| PCI: 00:19.0 10 * [0xf1600000 - 0xf161ffff] mem |
| PCI: 00:14.0 10 * [0xf1620000 - 0xf162ffff] mem |
| PCI: 00:04.0 10 * [0xf1630000 - 0xf1637fff] mem |
| PCI: 00:1b.0 10 * [0xf1638000 - 0xf163bfff] mem |
| PCI: 00:19.0 14 * [0xf163c000 - 0xf163cfff] mem |
| PCI: 00:1f.2 24 * [0xf163d000 - 0xf163d7ff] mem |
| PCI: 00:1a.0 10 * [0xf163e000 - 0xf163e3ff] mem |
| PCI: 00:1d.0 10 * [0xf163f000 - 0xf163f3ff] mem |
| PCI: 00:1f.3 10 * [0xf1640000 - 0xf16400ff] mem |
| PCI: 00:16.0 10 * [0xf1641000 - 0xf164100f] mem |
| DOMAIN: 0000 mem: next_base: f1641010 size: 11641010 align: 28 gran: 0 done |
| PCI: 00:1c.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:1c.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.0 mem: base:f1400000 size:100000 align:20 gran:20 limit:f14fffff |
| PCI: 01:00.0 10 * [0xf1400000 - 0xf14000ff] mem |
| PCI: 00:1c.0 mem: next_base: f1400100 size: 100000 align: 20 gran: 20 done |
| PCI: 00:1c.1 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:1c.1 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.1 mem: base:f1500000 size:100000 align:20 gran:20 limit:f15fffff |
| PCI: 02:00.0 10 * [0xf1500000 - 0xf151ffff] mem |
| PCI: 02:00.0 30 * [0xf1520000 - 0xf152ffff] mem |
| PCI: 00:1c.1 mem: next_base: f1530000 size: 100000 align: 20 gran: 20 done |
| PCI: 00:1c.2 prefmem: base:f0000000 size:800000 align:22 gran:20 limit:f07fffff |
| Unknown device path type: 0 |
| 14 * [0xf0000000 - 0xf07fffff] prefmem |
| PCI: 00:1c.2 prefmem: next_base: f0800000 size: 800000 align: 22 gran: 20 done |
| PCI: 00:1c.2 mem: base:f0800000 size:800000 align:22 gran:20 limit:f0ffffff |
| Unknown device path type: 0 |
| 10 * [0xf0800000 - 0xf0ffffff] mem |
| PCI: 00:1c.2 mem: next_base: f1000000 size: 800000 align: 22 gran: 20 done |
| Root Device assign_resources, bus 0 link: 0 |
| TOUUD 0x43b600000 TOLUD 0xc2a00000 TOM 0x400000000 |
| MEBASE 0x3fe000000 |
| IGD decoded, subtracting 32M UMA and 2M GTT |
| TSEG base 0xc0000000 size 8M |
| Available memory below 4GB: 3072M |
| Available memory above 4GB: 13238M |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| PCI: 00:02.0 10 <- [0x00f1000000 - 0x00f13fffff] size 0x00400000 gran 0x16 mem64 |
| PCI: 00:02.0 18 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem64 |
| PCI: 00:02.0 20 <- [0x0000003000 - 0x000000303f] size 0x00000040 gran 0x06 io |
| PCI: 00:04.0 10 <- [0x00f1630000 - 0x00f1637fff] size 0x00008000 gran 0x0f mem64 |
| PCI: 00:14.0 10 <- [0x00f1620000 - 0x00f162ffff] size 0x00010000 gran 0x10 mem64 |
| PCI: 00:16.0 10 <- [0x00f1641000 - 0x00f164100f] size 0x00000010 gran 0x04 mem64 |
| PCI: 00:19.0 10 <- [0x00f1600000 - 0x00f161ffff] size 0x00020000 gran 0x11 mem |
| PCI: 00:19.0 14 <- [0x00f163c000 - 0x00f163cfff] size 0x00001000 gran 0x0c mem |
| PCI: 00:19.0 18 <- [0x0000003040 - 0x000000305f] size 0x00000020 gran 0x05 io |
| PCI: 00:1a.0 EHCI Debug Port hook triggered |
| PCI: 00:1a.0 10 <- [0x00f163e000 - 0x00f163e3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1a.0 10 <- [0x00f163e000 - 0x00f163e3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1a.0 EHCI Debug Port relocated |
| PCI: 00:1b.0 10 <- [0x00f1638000 - 0x00f163bfff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io |
| PCI: 00:1c.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 prefmem |
| PCI: 00:1c.0 20 <- [0x00f1400000 - 0x00f14fffff] size 0x00100000 gran 0x14 bus 01 mem |
| PCI: 00:1c.0 assign_resources, bus 1 link: 0 |
| PCI: 01:00.0 10 <- [0x00f1400000 - 0x00f14000ff] size 0x00000100 gran 0x08 mem |
| PCI: 00:1c.0 assign_resources, bus 1 link: 0 |
| PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io |
| PCI: 00:1c.1 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem |
| PCI: 00:1c.1 20 <- [0x00f1500000 - 0x00f15fffff] size 0x00100000 gran 0x14 bus 02 mem |
| PCI: 00:1c.1 assign_resources, bus 2 link: 0 |
| PCI: 02:00.0 10 <- [0x00f1500000 - 0x00f151ffff] size 0x00020000 gran 0x11 mem64 |
| PCI: 02:00.0 30 <- [0x00f1520000 - 0x00f152ffff] size 0x00010000 gran 0x10 romem |
| PCI: 00:1c.1 assign_resources, bus 2 link: 0 |
| PCI: 00:1c.2 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 03 io |
| PCI: 00:1c.2 24 <- [0x00f0000000 - 0x00f07fffff] size 0x00800000 gran 0x14 bus 03 prefmem |
| PCI: 00:1c.2 20 <- [0x00f0800000 - 0x00f0ffffff] size 0x00800000 gran 0x14 bus 03 mem |
| PCI: 00:1c.2 assign_resources, bus 3 link: 0 |
| Unknown device path type: 0 |
| missing set_resources |
| PCI: 00:1c.2 assign_resources, bus 3 link: 0 |
| PCI: 00:1d.0 10 <- [0x00f163f000 - 0x00f163f3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1f.0 assign_resources, bus 0 link: 0 |
| PNP: 00ff.1 missing set_resources |
| PNP: 00ff.2 missing set_resources |
| PCI: 00:1f.0 assign_resources, bus 0 link: 0 |
| PCI: 00:1f.2 10 <- [0x0000003080 - 0x0000003087] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 14 <- [0x0000003090 - 0x0000003093] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 18 <- [0x0000003088 - 0x000000308f] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 1c <- [0x0000003094 - 0x0000003097] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 20 <- [0x0000003060 - 0x000000307f] size 0x00000020 gran 0x05 io |
| PCI: 00:1f.2 24 <- [0x00f163d000 - 0x00f163d7ff] size 0x00000800 gran 0x0b mem |
| PCI: 00:1f.3 10 <- [0x00f1640000 - 0x00f16400ff] size 0x00000100 gran 0x08 mem64 |
| PCI: 00:1f.3 assign_resources, bus 1 link: 0 |
| PCI: 00:1f.3 assign_resources, bus 1 link: 0 |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| Root Device assign_resources, bus 0 link: 0 |
| Done setting resources. |
| Show resources in subtree (Root Device)...After assigning values. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: acac |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 167c size 1098 align 12 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base e0000000 size 11641010 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100 |
| DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 |
| DOMAIN: 0000 resource base 100000 size bff00000 align 0 gran 0 limit 0 flags e0004200 index 4 |
| DOMAIN: 0000 resource base 100000000 size 33b600000 align 0 gran 0 limit 0 flags e0004200 index 5 |
| DOMAIN: 0000 resource base c0000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6 |
| DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7 |
| DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8 |
| DOMAIN: 0000 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9 |
| DOMAIN: 0000 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a |
| PCI: 00:00.0 |
| PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 |
| PCI: 00:01.0 |
| PCI: 00:02.0 |
| PCI: 00:02.0 resource base f1000000 size 400000 align 22 gran 22 limit f13fffff flags 60000201 index 10 |
| PCI: 00:02.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001201 index 18 |
| PCI: 00:02.0 resource base 3000 size 40 align 6 gran 6 limit 303f flags 60000100 index 20 |
| PCI: 00:04.0 |
| PCI: 00:04.0 resource base f1630000 size 8000 align 15 gran 15 limit f1637fff flags 60000201 index 10 |
| PCI: 00:14.0 |
| PCI: 00:14.0 resource base f1620000 size 10000 align 16 gran 16 limit f162ffff flags 60000201 index 10 |
| PCI: 00:16.0 |
| PCI: 00:16.0 resource base f1641000 size 10 align 12 gran 4 limit f164100f flags 60000201 index 10 |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:19.0 |
| PCI: 00:19.0 resource base f1600000 size 20000 align 17 gran 17 limit f161ffff flags 60000200 index 10 |
| PCI: 00:19.0 resource base f163c000 size 1000 align 12 gran 12 limit f163cfff flags 60000200 index 14 |
| PCI: 00:19.0 resource base 3040 size 20 align 5 gran 5 limit 305f flags 60000100 index 18 |
| PCI: 00:1a.0 |
| PCI: 00:1a.0 resource base f163e000 size 400 align 12 gran 10 limit f163e3ff flags 60000200 index 10 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base f1638000 size 4000 align 14 gran 14 limit f163bfff flags 60000201 index 10 |
| PCI: 00:1c.0 child on link 0 PCI: 01:00.0 |
| PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:1c.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 |
| PCI: 00:1c.0 resource base f1400000 size 100000 align 20 gran 20 limit f14fffff flags 60080202 index 20 |
| PCI: 01:00.0 |
| PCI: 01:00.0 resource base f1400000 size 100 align 12 gran 8 limit f14000ff flags 60000200 index 10 |
| PCI: 00:1c.1 child on link 0 PCI: 02:00.0 |
| PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:1c.1 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 |
| PCI: 00:1c.1 resource base f1500000 size 100000 align 20 gran 20 limit f15fffff flags 60080202 index 20 |
| PCI: 02:00.0 |
| PCI: 02:00.0 resource base f1500000 size 20000 align 17 gran 17 limit f151ffff flags 60000201 index 10 |
| PCI: 02:00.0 resource base f1520000 size 10000 align 16 gran 16 limit f152ffff flags 60002200 index 30 |
| PCI: 00:1c.2Unknown device path type: 0 |
| child on link 0 |
| PCI: 00:1c.2 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c |
| PCI: 00:1c.2 resource base f0000000 size 800000 align 22 gran 20 limit f07fffff flags 60081202 index 24 |
| PCI: 00:1c.2 resource base f0800000 size 800000 align 22 gran 20 limit f0ffffff flags 60080202 index 20 |
| Unknown device path type: 0 |
| |
| Unknown device path type: 0 |
| resource base f0800000 size 800000 align 22 gran 22 limit f0ffffff flags 40000200 index 10 |
| Unknown device path type: 0 |
| resource base f0000000 size 800000 align 22 gran 22 limit f07fffff flags 40001200 index 14 |
| Unknown device path type: 0 |
| resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 40000100 index 18 |
| PCI: 00:1c.3 |
| PCI: 00:1c.4 |
| PCI: 00:1c.5 |
| PCI: 00:1c.6 |
| PCI: 00:1c.7 |
| PCI: 00:1d.0 |
| PCI: 00:1d.0 resource base f163f000 size 400 align 12 gran 10 limit f163f3ff flags 60000200 index 10 |
| PCI: 00:1e.0 |
| PCI: 00:1f.0 child on link 0 PNP: 00ff.1 |
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200 |
| PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300 |
| PNP: 00ff.1 |
| PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 |
| PNP: 0c31.0 |
| PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0 |
| PNP: 00ff.2 |
| PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 |
| PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 |
| PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 |
| PCI: 00:1f.2 |
| PCI: 00:1f.2 resource base 3080 size 8 align 3 gran 3 limit 3087 flags 60000100 index 10 |
| PCI: 00:1f.2 resource base 3090 size 4 align 2 gran 2 limit 3093 flags 60000100 index 14 |
| PCI: 00:1f.2 resource base 3088 size 8 align 3 gran 3 limit 308f flags 60000100 index 18 |
| PCI: 00:1f.2 resource base 3094 size 4 align 2 gran 2 limit 3097 flags 60000100 index 1c |
| PCI: 00:1f.2 resource base 3060 size 20 align 5 gran 5 limit 307f flags 60000100 index 20 |
| PCI: 00:1f.2 resource base f163d000 size 800 align 12 gran 11 limit f163d7ff flags 60000200 index 24 |
| PCI: 00:1f.3 child on link 0 I2C: 01:54 |
| PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 |
| PCI: 00:1f.3 resource base f1640000 size 100 align 12 gran 8 limit f16400ff flags 60000201 index 10 |
| I2C: 01:54 |
| I2C: 01:55 |
| I2C: 01:56 |
| I2C: 01:57 |
| I2C: 01:5c |
| I2C: 01:5d |
| I2C: 01:5e |
| I2C: 01:5f |
| PCI: 00:1f.5 |
| PCI: 00:1f.6 |
| Done allocating resources. |
| BS: BS_DEV_RESOURCES times (us): entry 0 run 2292 exit 0 |
| POST: 0x74 |
| Enabling resources... |
| PCI: 00:00.0 subsystem <- 17aa/21fa |
| PCI: 00:00.0 cmd <- 06 |
| PCI: 00:02.0 subsystem <- 17aa/21fa |
| PCI: 00:02.0 cmd <- 03 |
| PCI: 00:04.0 cmd <- 02 |
| PCI: 00:14.0 subsystem <- 17aa/21fa |
| PCI: 00:14.0 cmd <- 102 |
| PCI: 00:16.0 subsystem <- 17aa/21fa |
| PCI: 00:16.0 cmd <- 02 |
| PCI: 00:19.0 subsystem <- 17aa/21f3 |
| PCI: 00:19.0 cmd <- 103 |
| PCI: 00:1a.0 subsystem <- 17aa/21fa |
| PCI: 00:1a.0 cmd <- 102 |
| PCI: 00:1b.0 subsystem <- 17aa/21fa |
| PCI: 00:1b.0 cmd <- 102 |
| PCI: 00:1c.0 bridge ctrl <- 0003 |
| PCI: 00:1c.0 subsystem <- 17aa/21fa |
| PCI: 00:1c.0 cmd <- 106 |
| PCI: 00:1c.1 bridge ctrl <- 0003 |
| PCI: 00:1c.1 subsystem <- 17aa/21fa |
| PCI: 00:1c.1 cmd <- 106 |
| PCI: 00:1c.2 bridge ctrl <- 0003 |
| PCI: 00:1c.2 subsystem <- 17aa/21fa |
| PCI: 00:1c.2 cmd <- 107 |
| PCI: 00:1d.0 subsystem <- 17aa/21fa |
| PCI: 00:1d.0 cmd <- 102 |
| pch_decode_init |
| PCI: 00:1f.0 subsystem <- 17aa/21fa |
| PCI: 00:1f.0 cmd <- 107 |
| PCI: 00:1f.2 subsystem <- 17aa/21fa |
| PCI: 00:1f.2 cmd <- 03 |
| PCI: 00:1f.3 subsystem <- 17aa/21fa |
| PCI: 00:1f.3 cmd <- 103 |
| PCI: 01:00.0 subsystem <- 17aa/21fa |
| PCI: 01:00.0 cmd <- 06 |
| PCI: 02:00.0 cmd <- 02 |
| done. |
| BS: BS_DEV_ENABLE times (us): entry 0 run 128 exit 0 |
| read 6000 from 07e4 |
| wrote 00000004 to 0890 |
| read 03040103 from 0894 |
| read 00000000 from 0880 |
| wrote 00000000 to 0880 |
| POST: 0x75 |
| Initializing devices... |
| Root Device init ... |
| Root Device init finished in 0 usecs |
| POST: 0x75 |
| CPU_CLUSTER: 0 init ... |
| start_eip=0x00001000, code_size=0x00000031 |
| Setting up SMI for CPU |
| Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8 |
| Processing 12 relocs. Offset value of 0x00038000 |
| Adjusting 00038002: 0x00000024 -> 0x00038024 |
| Adjusting 0003801d: 0x0000003c -> 0x0003803c |
| Adjusting 00038026: 0x00000024 -> 0x00038024 |
| Adjusting 00038054: 0x00000120 -> 0x00038120 |
| Adjusting 00038066: 0x000001a8 -> 0x000381a8 |
| Adjusting 0003806f: 0x00000100 -> 0x00038100 |
| Adjusting 00038077: 0x00000104 -> 0x00038104 |
| Adjusting 00038081: 0x00000110 -> 0x00038110 |
| Adjusting 0003808a: 0x00000114 -> 0x00038114 |
| Adjusting 000380ab: 0x00000118 -> 0x00038118 |
| Adjusting 000380b2: 0x0000010c -> 0x0003810c |
| Adjusting 000380b8: 0x00000108 -> 0x00038108 |
| SMM Module: stub loaded at 00038000. Will call bffadb6c(bffd39c0) |
| Installing SMM handler to 0xc0000000 |
| Loading module at c0010000 with entry c001156d. filesize: 0x3a20 memsize: 0x7a40 |
| Processing 228 relocs. Offset value of 0xc0010000 |
| Adjusting c0010592: 0x00002f64 -> 0xc0012f64 |
| Adjusting c00105b1: 0x00002f64 -> 0xc0012f64 |
| Adjusting c001066e: 0x00003245 -> 0xc0013245 |
| Adjusting c0010685: 0x00002f64 -> 0xc0012f64 |
| Adjusting c00106fb: 0x00002f74 -> 0xc0012f74 |
| Adjusting c001072e: 0x00002f8f -> 0xc0012f8f |
| Adjusting c0010763: 0x00002f98 -> 0xc0012f98 |
| Adjusting c00107ba: 0x00002fb9 -> 0xc0012fb9 |
| Adjusting c0010831: 0x00002fce -> 0xc0012fce |
| Adjusting c0010868: 0x00002fec -> 0xc0012fec |
| Adjusting c001088c: 0x0000300d -> 0xc001300d |
| Adjusting c00108a5: 0x00003030 -> 0xc0013030 |
| Adjusting c0010a7f: 0x00003a00 -> 0xc0013a00 |
| Adjusting c0010a96: 0x0000305c -> 0xc001305c |
| Adjusting c0010aa9: 0x00003a00 -> 0xc0013a00 |
| Adjusting c0010ab5: 0x00003280 -> 0xc0013280 |
| Adjusting c0010aba: 0x0000329d -> 0xc001329d |
| Adjusting c0010abf: 0x000032a0 -> 0xc00132a0 |
| Adjusting c0010ac4: 0x00003068 -> 0xc0013068 |
| Adjusting c0010af7: 0x00003a04 -> 0xc0013a04 |
| Adjusting c0010b0d: 0x00000ad3 -> 0xc0010ad3 |
| Adjusting c0010b21: 0x00003a04 -> 0xc0013a04 |
| Adjusting c0010b33: 0x00003a04 -> 0xc0013a04 |
| Adjusting c0010b46: 0x000030b1 -> 0xc00130b1 |
| Adjusting c0010b4f: 0x0000308c -> 0xc001308c |
| Adjusting c001107b: 0x000030d6 -> 0xc00130d6 |
| Adjusting c00112d5: 0x00003a20 -> 0xc0013a20 |
| Adjusting c00112f7: 0x000030dd -> 0xc00130dd |
| Adjusting c0011324: 0x000030f6 -> 0xc00130f6 |
| Adjusting c001134d: 0x00003a18 -> 0xc0013a18 |
| Adjusting c0011367: 0x00003980 -> 0xc0013980 |
| Adjusting c001137b: 0x00003899 -> 0xc0013899 |
| Adjusting c001139a: 0x000038ca -> 0xc00138ca |
| Adjusting c00113b1: 0x000038d4 -> 0xc00138d4 |
| Adjusting c00113c8: 0x000038d9 -> 0xc00138d9 |
| Adjusting c00113df: 0x000038e2 -> 0xc00138e2 |
| Adjusting c00113f6: 0x000038ef -> 0xc00138ef |
| Adjusting c001140d: 0x000038fb -> 0xc00138fb |
| Adjusting c0011424: 0x00003908 -> 0xc0013908 |
| Adjusting c001143b: 0x00003913 -> 0xc0013913 |
| Adjusting c0011452: 0x0000391f -> 0xc001391f |
| Adjusting c0011469: 0x00003929 -> 0xc0013929 |
| Adjusting c0011480: 0x0000392e -> 0xc001392e |
| Adjusting c0011497: 0x00003936 -> 0xc0013936 |
| Adjusting c00114ae: 0x0000393d -> 0xc001393d |
| Adjusting c00114c5: 0x00003942 -> 0xc0013942 |
| Adjusting c00114dc: 0x00003948 -> 0xc0013948 |
| Adjusting c00114f2: 0x0000394d -> 0xc001394d |
| Adjusting c0011508: 0x00003958 -> 0xc0013958 |
| Adjusting c001151e: 0x0000395d -> 0xc001395d |
| Adjusting c0011534: 0x00003966 -> 0xc0013966 |
| Adjusting c001154a: 0x00003972 -> 0xc0013972 |
| Adjusting c001155b: 0x00003243 -> 0xc0013243 |
| Adjusting c0011577: 0x00003a20 -> 0xc0013a20 |
| Adjusting c0011585: 0x00003a20 -> 0xc0013a20 |
| Adjusting c0011596: 0x00003108 -> 0xc0013108 |
| Adjusting c00115aa: 0x00003a08 -> 0xc0013a08 |
| Adjusting c00115b5: 0x00003a08 -> 0xc0013a08 |
| Adjusting c00115c8: 0x00003a24 -> 0xc0013a24 |
| Adjusting c00115d4: 0x00003135 -> 0xc0013135 |
| Adjusting c00115e4: 0x00003a0c -> 0xc0013a0c |
| Adjusting c00115ed: 0x00003a0c -> 0xc0013a0c |
| Adjusting c001160a: 0x00003a24 -> 0xc0013a24 |
| Adjusting c0011613: 0x00003a08 -> 0xc0013a08 |
| Adjusting c0011643: 0x000032ba -> 0xc00132ba |
| Adjusting c00116db: 0x00003a28 -> 0xc0013a28 |
| Adjusting c00116eb: 0x00003a28 -> 0xc0013a28 |
| Adjusting c0011711: 0x00003a28 -> 0xc0013a28 |
| Adjusting c0011779: 0x00003140 -> 0xc0013140 |
| Adjusting c001178c: 0x00003150 -> 0xc0013150 |
| Adjusting c001186c: 0x0000318f -> 0xc001318f |
| Adjusting c00118a2: 0x00003a14 -> 0xc0013a14 |
| Adjusting c00118c4: 0x000031ae -> 0xc00131ae |
| Adjusting c00118dc: 0x000031b0 -> 0xc00131b0 |
| Adjusting c00118f6: 0x00003a14 -> 0xc0013a14 |
| Adjusting c0011921: 0x00003a14 -> 0xc0013a14 |
| Adjusting c0011943: 0x000031ae -> 0xc00131ae |
| Adjusting c001195b: 0x000031dd -> 0xc00131dd |
| Adjusting c0011975: 0x00003a10 -> 0xc0013a10 |
| Adjusting c0011993: 0x00003a14 -> 0xc0013a14 |
| Adjusting c00119b2: 0x000031ae -> 0xc00131ae |
| Adjusting c00119c5: 0x0000321d -> 0xc001321d |
| Adjusting c00119df: 0x00003a10 -> 0xc0013a10 |
| Adjusting c00119f2: 0x00003207 -> 0xc0013207 |
| Adjusting c0011a80: 0x00003a14 -> 0xc0013a14 |
| Adjusting c0011a85: 0x00003a10 -> 0xc0013a10 |
| Adjusting c0011a98: 0x00002f50 -> 0xc0012f50 |
| Adjusting c0011ac2: 0x00002f48 -> 0xc0012f48 |
| Adjusting c0011ac7: 0x0000325a -> 0xc001325a |
| Adjusting c0011dbc: 0x00003a2c -> 0xc0013a2c |
| Adjusting c0011deb: 0x00003a30 -> 0xc0013a30 |
| Adjusting c0011dfe: 0x00003a2c -> 0xc0013a2c |
| Adjusting c0011e21: 0x00003a30 -> 0xc0013a30 |
| Adjusting c0011e6f: 0x000032c9 -> 0xc00132c9 |
| Adjusting c0011ebc: 0x000032c9 -> 0xc00132c9 |
| Adjusting c0011f06: 0x00003a2c -> 0xc0013a2c |
| Adjusting c0011f9c: 0x000032e5 -> 0xc00132e5 |
| Adjusting c001202a: 0x0000330d -> 0xc001330d |
| Adjusting c00120bf: 0x00003423 -> 0xc0013423 |
| Adjusting c0012104: 0x00003375 -> 0xc0013375 |
| Adjusting c0012115: 0x000033bd -> 0xc00133bd |
| Adjusting c0012161: 0x000033dd -> 0xc00133dd |
| Adjusting c0012191: 0x00003401 -> 0xc0013401 |
| Adjusting c00121b9: 0x00003339 -> 0xc0013339 |
| Adjusting c00121ee: 0x00003357 -> 0xc0013357 |
| Adjusting c0012204: 0x00003a30 -> 0xc0013a30 |
| Adjusting c001227f: 0x00003520 -> 0xc0013520 |
| Adjusting c0012284: 0x0000345c -> 0xc001345c |
| Adjusting c00122b1: 0x00003464 -> 0xc0013464 |
| Adjusting c00122e0: 0x000032e5 -> 0xc00132e5 |
| Adjusting c001236f: 0x0000330d -> 0xc001330d |
| Adjusting c0012391: 0x00003a30 -> 0xc0013a30 |
| Adjusting c001241d: 0x00003423 -> 0xc0013423 |
| Adjusting c0012462: 0x000034ae -> 0xc00134ae |
| Adjusting c0012473: 0x000033bd -> 0xc00133bd |
| Adjusting c0012493: 0x00003a30 -> 0xc0013a30 |
| Adjusting c00124c7: 0x000034f5 -> 0xc00134f5 |
| Adjusting c001250c: 0x00003339 -> 0xc0013339 |
| Adjusting c0012537: 0x00003487 -> 0xc0013487 |
| Adjusting c0012600: 0x00003a18 -> 0xc0013a18 |
| Adjusting c001260f: 0x00003531 -> 0xc0013531 |
| Adjusting c001262d: 0x0000353c -> 0xc001353c |
| Adjusting c001264a: 0x00003544 -> 0xc0013544 |
| Adjusting c0012661: 0x0000354a -> 0xc001354a |
| Adjusting c0012678: 0x00003552 -> 0xc0013552 |
| Adjusting c001268f: 0x00003558 -> 0xc0013558 |
| Adjusting c00126a6: 0x0000355d -> 0xc001355d |
| Adjusting c00126bd: 0x00003565 -> 0xc0013565 |
| Adjusting c00126d4: 0x0000356e -> 0xc001356e |
| Adjusting c00126ea: 0x00003572 -> 0xc0013572 |
| Adjusting c0012700: 0x0000357b -> 0xc001357b |
| Adjusting c0012716: 0x00003584 -> 0xc0013584 |
| Adjusting c001272c: 0x000038f5 -> 0xc00138f5 |
| Adjusting c0012742: 0x0000358a -> 0xc001358a |
| Adjusting c0012758: 0x00003590 -> 0xc0013590 |
| Adjusting c001276e: 0x00003597 -> 0xc0013597 |
| Adjusting c0012784: 0x000035a0 -> 0xc00135a0 |
| Adjusting c0012795: 0x00003243 -> 0xc0013243 |
| Adjusting c0012806: 0x00003a38 -> 0xc0013a38 |
| Adjusting c001283d: 0x000035b1 -> 0xc00135b1 |
| Adjusting c001285c: 0x000035bf -> 0xc00135bf |
| Adjusting c0012872: 0x000035dc -> 0xc00135dc |
| Adjusting c0012891: 0x000035e9 -> 0xc00135e9 |
| Adjusting c00128a1: 0x000035f6 -> 0xc00135f6 |
| Adjusting c00128b0: 0x000035ab -> 0xc00135ab |
| Adjusting c00128bb: 0x000035a6 -> 0xc00135a6 |
| Adjusting c00128c4: 0x00003607 -> 0xc0013607 |
| Adjusting c00128de: 0x00003619 -> 0xc0013619 |
| Adjusting c00128fb: 0x00003a18 -> 0xc0013a18 |
| Adjusting c0012923: 0x00003639 -> 0xc0013639 |
| Adjusting c0012934: 0x00003a18 -> 0xc0013a18 |
| Adjusting c0012961: 0x0000365b -> 0xc001365b |
| Adjusting c001297f: 0x0000364a -> 0xc001364a |
| Adjusting c0012988: 0x00003a18 -> 0xc0013a18 |
| Adjusting c001299a: 0x0000366c -> 0xc001366c |
| Adjusting c00129b0: 0x00003a18 -> 0xc0013a18 |
| Adjusting c00129c2: 0x00003682 -> 0xc0013682 |
| Adjusting c00129cc: 0x00003a3c -> 0xc0013a3c |
| Adjusting c00129d6: 0x00003697 -> 0xc0013697 |
| Adjusting c0012a15: 0x00003a34 -> 0xc0013a34 |
| Adjusting c0012a1f: 0x000036c2 -> 0xc00136c2 |
| Adjusting c0012a42: 0x00003a34 -> 0xc0013a34 |
| Adjusting c0012a63: 0x00003a3c -> 0xc0013a3c |
| Adjusting c0012a6a: 0x000036db -> 0xc00136db |
| Adjusting c0012a6f: 0x00003a38 -> 0xc0013a38 |
| Adjusting c0012a7a: 0x00003a18 -> 0xc0013a18 |
| Adjusting c0012a8c: 0x000036f5 -> 0xc00136f5 |
| Adjusting c0012a9e: 0x00003a18 -> 0xc0013a18 |
| Adjusting c0012ade: 0x00003704 -> 0xc0013704 |
| Adjusting c0012af9: 0x0000371a -> 0xc001371a |
| Adjusting c0012b0e: 0x00003a18 -> 0xc0013a18 |
| Adjusting c0012b20: 0x00003728 -> 0xc0013728 |
| Adjusting c0012b37: 0x00003a18 -> 0xc0013a18 |
| Adjusting c0012b45: 0x0000373e -> 0xc001373e |
| Adjusting c0012b5d: 0x0000374e -> 0xc001374e |
| Adjusting c0012b74: 0x00003748 -> 0xc0013748 |
| Adjusting c0012b8b: 0x00003753 -> 0xc0013753 |
| Adjusting c0012ba2: 0x0000375c -> 0xc001375c |
| Adjusting c0012bbd: 0x00003761 -> 0xc0013761 |
| Adjusting c0012bd3: 0x00003769 -> 0xc0013769 |
| Adjusting c0012be9: 0x0000376e -> 0xc001376e |
| Adjusting c0012bff: 0x00003772 -> 0xc0013772 |
| Adjusting c0012c10: 0x00003243 -> 0xc0013243 |
| Adjusting c0012c1d: 0x00003a18 -> 0xc0013a18 |
| Adjusting c0012c2e: 0x00003779 -> 0xc0013779 |
| Adjusting c0012c43: 0x00003a18 -> 0xc0013a18 |
| Adjusting c0012c6c: 0x00003785 -> 0xc0013785 |
| Adjusting c0012c89: 0x00003a18 -> 0xc0013a18 |
| Adjusting c0012ca2: 0x00003799 -> 0xc0013799 |
| Adjusting c0012cba: 0x00003978 -> 0xc0013978 |
| Adjusting c0012cbf: 0x00003a38 -> 0xc0013a38 |
| Adjusting c0012d43: 0x00003878 -> 0xc0013878 |
| Adjusting c0012d4a: 0x000037ad -> 0xc00137ad |
| Adjusting c0012d56: 0x000037c5 -> 0xc00137c5 |
| Adjusting c0012d62: 0x000037e9 -> 0xc00137e9 |
| Adjusting c0012db1: 0x0000380d -> 0xc001380d |
| Adjusting c0012dba: 0x00003832 -> 0xc0013832 |
| Adjusting c0012dc8: 0x00003a18 -> 0xc0013a18 |
| Adjusting c0012dfb: 0x00003856 -> 0xc0013856 |
| Adjusting c0012e0c: 0x00003a18 -> 0xc0013a18 |
| Adjusting c0012e38: 0x00003a18 -> 0xc0013a18 |
| Adjusting c0012e5c: 0x00003a18 -> 0xc0013a18 |
| Adjusting c0012ef7: 0x00003890 -> 0xc0013890 |
| Adjusting c0012f03: 0x00003a38 -> 0xc0013a38 |
| Adjusting c0012f1a: 0x00003a18 -> 0xc0013a18 |
| Adjusting c0012f48: 0x00002f30 -> 0xc0012f30 |
| Adjusting c0012f50: 0x0000057d -> 0xc001057d |
| Adjusting c0012f54: 0x00002f30 -> 0xc0012f30 |
| Adjusting c0012f5c: 0x000005ee -> 0xc00105ee |
| Adjusting c0012f68: 0x00003048 -> 0xc0013048 |
| Adjusting c0013048: 0x000008ee -> 0xc00108ee |
| Adjusting c001304c: 0x000008fa -> 0xc00108fa |
| Adjusting c0013050: 0x000008fd -> 0xc00108fd |
| Adjusting c0013878: 0x00002d47 -> 0xc0012d47 |
| Adjusting c001387c: 0x00002d53 -> 0xc0012d53 |
| Adjusting c0013880: 0x00002df8 -> 0xc0012df8 |
| Adjusting c0013884: 0x00002d5f -> 0xc0012d5f |
| Adjusting c0013888: 0x00002dae -> 0xc0012dae |
| Adjusting c001388c: 0x00002db7 -> 0xc0012db7 |
| Adjusting c0013990: 0x00002c54 -> 0xc0012c54 |
| Adjusting c0013994: 0x00002944 -> 0xc0012944 |
| Adjusting c00139a0: 0x00002b2f -> 0xc0012b2f |
| Adjusting c00139a4: 0x000025f8 -> 0xc00125f8 |
| Adjusting c00139a8: 0x000028f4 -> 0xc00128f4 |
| Adjusting c00139ac: 0x00002b0c -> 0xc0012b0c |
| Adjusting c00139b4: 0x00002a9b -> 0xc0012a9b |
| Adjusting c00139b8: 0x00002a78 -> 0xc0012a78 |
| Adjusting c00139d4: 0x000027a6 -> 0xc00127a6 |
| Loading module at c0008000 with entry c0008000. filesize: 0x1a8 memsize: 0x1a8 |
| Processing 12 relocs. Offset value of 0xc0008000 |
| Adjusting c0008002: 0x00000024 -> 0xc0008024 |
| Adjusting c000801d: 0x0000003c -> 0xc000803c |
| Adjusting c0008026: 0x00000024 -> 0xc0008024 |
| Adjusting c0008054: 0x00000120 -> 0xc0008120 |
| Adjusting c0008066: 0x000001a8 -> 0xc00081a8 |
| Adjusting c000806f: 0x00000100 -> 0xc0008100 |
| Adjusting c0008077: 0x00000104 -> 0xc0008104 |
| Adjusting c0008081: 0x00000110 -> 0xc0008110 |
| Adjusting c000808a: 0x00000114 -> 0xc0008114 |
| Adjusting c00080ab: 0x00000118 -> 0xc0008118 |
| Adjusting c00080b2: 0x0000010c -> 0xc000810c |
| Adjusting c00080b8: 0x00000108 -> 0xc0008108 |
| SMM Module: placing jmp sequence at c0007c00 rel16 0x03fd |
| SMM Module: placing jmp sequence at c0007800 rel16 0x07fd |
| SMM Module: placing jmp sequence at c0007400 rel16 0x0bfd |
| SMM Module: stub loaded at c0008000. Will call c001156d(00000000) |
| Initializing southbridge SMI... ... pmbase = 0x0500 |
| |
| SMI_STS: MCSMI |
| PM1_STS: |
| GPE0_STS: GPIO14 GPIO13 GPIO11 GPIO10 GPIO9 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO1 GPIO0 TCO_SCI |
| ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI1 GPI0 |
| TCO_STS: |
| ... raise SMI# |
| In relocation handler: cpu 0 |
| New SMBASE=0xc0000000 IEDBASE=0xc0400000 @ 0003fc00 |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Relocation complete. |
| Locking SMM. |
| Initializing CPU #0 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| POST: 0x60 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [20100:bfffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 153a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 154c0 |
| CBFS: File @ offset 154c0 size 5800 |
| CBFS: Found @ offset 154c0 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x1b |
| CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4668 |
| memalign bffd4668 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4680 |
| memalign bffd4680 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4698 |
| memalign bffd4698 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd46b0 |
| memalign bffd46b0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd46c8 |
| memalign bffd46c8 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd46e0 |
| memalign bffd46e0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd46f8 |
| memalign bffd46f8 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4710 |
| memalign bffd4710 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4728 |
| memalign bffd4728 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4740 |
| memalign bffd4740 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4758 |
| memalign bffd4758 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4770 |
| memalign bffd4770 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4788 |
| memalign bffd4788 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd47a0 |
| memalign bffd47a0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd47b8 |
| memalign bffd47b8 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd47d0 |
| memalign bffd47d0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd47e8 |
| memalign bffd47e8 |
| MTRR: Physical address space: |
| 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 |
| 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 |
| 0x00000000000c0000 - 0x00000000c0000000 size 0xbff40000 type 6 |
| 0x00000000c0000000 - 0x00000000e0000000 size 0x20000000 type 0 |
| 0x00000000e0000000 - 0x00000000f0000000 size 0x10000000 type 1 |
| 0x00000000f0000000 - 0x0000000100000000 size 0x10000000 type 0 |
| 0x0000000100000000 - 0x000000043b600000 size 0x33b600000 type 6 |
| MTRR addr 0x0-0x10 set to 6 type @ 0 |
| MTRR addr 0x10-0x20 set to 6 type @ 1 |
| MTRR addr 0x20-0x30 set to 6 type @ 2 |
| MTRR addr 0x30-0x40 set to 6 type @ 3 |
| MTRR addr 0x40-0x50 set to 6 type @ 4 |
| MTRR addr 0x50-0x60 set to 6 type @ 5 |
| MTRR addr 0x60-0x70 set to 6 type @ 6 |
| MTRR addr 0x70-0x80 set to 6 type @ 7 |
| MTRR addr 0x80-0x84 set to 6 type @ 8 |
| MTRR addr 0x84-0x88 set to 6 type @ 9 |
| MTRR addr 0x88-0x8c set to 6 type @ 10 |
| MTRR addr 0x8c-0x90 set to 6 type @ 11 |
| MTRR addr 0x90-0x94 set to 6 type @ 12 |
| MTRR addr 0x94-0x98 set to 6 type @ 13 |
| MTRR addr 0x98-0x9c set to 6 type @ 14 |
| MTRR addr 0x9c-0xa0 set to 6 type @ 15 |
| MTRR addr 0xa0-0xa4 set to 0 type @ 16 |
| MTRR addr 0xa4-0xa8 set to 0 type @ 17 |
| MTRR addr 0xa8-0xac set to 0 type @ 18 |
| MTRR addr 0xac-0xb0 set to 0 type @ 19 |
| MTRR addr 0xb0-0xb4 set to 0 type @ 20 |
| MTRR addr 0xb4-0xb8 set to 0 type @ 21 |
| MTRR addr 0xb8-0xbc set to 0 type @ 22 |
| MTRR addr 0xbc-0xc0 set to 0 type @ 23 |
| MTRR addr 0xc0-0xc1 set to 6 type @ 24 |
| MTRR addr 0xc1-0xc2 set to 6 type @ 25 |
| MTRR addr 0xc2-0xc3 set to 6 type @ 26 |
| MTRR addr 0xc3-0xc4 set to 6 type @ 27 |
| MTRR addr 0xc4-0xc5 set to 6 type @ 28 |
| MTRR addr 0xc5-0xc6 set to 6 type @ 29 |
| MTRR addr 0xc6-0xc7 set to 6 type @ 30 |
| MTRR addr 0xc7-0xc8 set to 6 type @ 31 |
| MTRR addr 0xc8-0xc9 set to 6 type @ 32 |
| MTRR addr 0xc9-0xca set to 6 type @ 33 |
| MTRR addr 0xca-0xcb set to 6 type @ 34 |
| MTRR addr 0xcb-0xcc set to 6 type @ 35 |
| MTRR addr 0xcc-0xcd set to 6 type @ 36 |
| MTRR addr 0xcd-0xce set to 6 type @ 37 |
| MTRR addr 0xce-0xcf set to 6 type @ 38 |
| MTRR addr 0xcf-0xd0 set to 6 type @ 39 |
| MTRR addr 0xd0-0xd1 set to 6 type @ 40 |
| MTRR addr 0xd1-0xd2 set to 6 type @ 41 |
| MTRR addr 0xd2-0xd3 set to 6 type @ 42 |
| MTRR addr 0xd3-0xd4 set to 6 type @ 43 |
| MTRR addr 0xd4-0xd5 set to 6 type @ 44 |
| MTRR addr 0xd5-0xd6 set to 6 type @ 45 |
| MTRR addr 0xd6-0xd7 set to 6 type @ 46 |
| MTRR addr 0xd7-0xd8 set to 6 type @ 47 |
| MTRR addr 0xd8-0xd9 set to 6 type @ 48 |
| MTRR addr 0xd9-0xda set to 6 type @ 49 |
| MTRR addr 0xda-0xdb set to 6 type @ 50 |
| MTRR addr 0xdb-0xdc set to 6 type @ 51 |
| MTRR addr 0xdc-0xdd set to 6 type @ 52 |
| MTRR addr 0xdd-0xde set to 6 type @ 53 |
| MTRR addr 0xde-0xdf set to 6 type @ 54 |
| MTRR addr 0xdf-0xe0 set to 6 type @ 55 |
| MTRR addr 0xe0-0xe1 set to 6 type @ 56 |
| MTRR addr 0xe1-0xe2 set to 6 type @ 57 |
| MTRR addr 0xe2-0xe3 set to 6 type @ 58 |
| MTRR addr 0xe3-0xe4 set to 6 type @ 59 |
| MTRR addr 0xe4-0xe5 set to 6 type @ 60 |
| MTRR addr 0xe5-0xe6 set to 6 type @ 61 |
| MTRR addr 0xe6-0xe7 set to 6 type @ 62 |
| MTRR addr 0xe7-0xe8 set to 6 type @ 63 |
| MTRR addr 0xe8-0xe9 set to 6 type @ 64 |
| MTRR addr 0xe9-0xea set to 6 type @ 65 |
| MTRR addr 0xea-0xeb set to 6 type @ 66 |
| MTRR addr 0xeb-0xec set to 6 type @ 67 |
| MTRR addr 0xec-0xed set to 6 type @ 68 |
| MTRR addr 0xed-0xee set to 6 type @ 69 |
| MTRR addr 0xee-0xef set to 6 type @ 70 |
| MTRR addr 0xef-0xf0 set to 6 type @ 71 |
| MTRR addr 0xf0-0xf1 set to 6 type @ 72 |
| MTRR addr 0xf1-0xf2 set to 6 type @ 73 |
| MTRR addr 0xf2-0xf3 set to 6 type @ 74 |
| MTRR addr 0xf3-0xf4 set to 6 type @ 75 |
| MTRR addr 0xf4-0xf5 set to 6 type @ 76 |
| MTRR addr 0xf5-0xf6 set to 6 type @ 77 |
| MTRR addr 0xf6-0xf7 set to 6 type @ 78 |
| MTRR addr 0xf7-0xf8 set to 6 type @ 79 |
| MTRR addr 0xf8-0xf9 set to 6 type @ 80 |
| MTRR addr 0xf9-0xfa set to 6 type @ 81 |
| MTRR addr 0xfa-0xfb set to 6 type @ 82 |
| MTRR addr 0xfb-0xfc set to 6 type @ 83 |
| MTRR addr 0xfc-0xfd set to 6 type @ 84 |
| MTRR addr 0xfd-0xfe set to 6 type @ 85 |
| MTRR addr 0xfe-0xff set to 6 type @ 86 |
| MTRR addr 0xff-0x100 set to 6 type @ 87 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| MTRR: default type WB/UC MTRR counts: 3/11. |
| MTRR: WB selected as default type. |
| MTRR: 0 base 0x00000000c0000000 mask 0x0000000fe0000000 type 0 |
| MTRR: 1 base 0x00000000e0000000 mask 0x0000000ff0000000 type 1 |
| MTRR: 2 base 0x00000000f0000000 mask 0x0000000ff0000000 type 0 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Setting up local APIC... apic_id: 0x00 done. |
| POST: 0x9b |
| VMX is locked, so set_vmx will do nothing |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2600 |
| Turbo is available but hidden |
| Turbo has been enabled |
| CPU: 0 has 2 cores, 2 threads per core |
| memalign Enter, boundary 8, size 152, free_mem_ptr bffd4800 |
| memalign bffd4800 |
| CPU: 0 has core 1 |
| CPU1: stack_base bffcc000, stack_end bffccff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 1. |
| After apic_write. |
| In relocation handler: cpu 1 |
| New SMBASE=0xbffffc00 IEDBASE=0xc0400000 @ 0003fc00 |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 1. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #1 |
| memalign Enter, boundary 8, size 152, free_mem_ptr bffd4898 |
| CPU: vendor Intel device 306a9 |
| memalign bffd4898 |
| CPU: family 06, model 3a, stepping 09 |
| CPU: 0 has core 2 |
| POST: 0x60 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [20100:bfffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 153a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 154c0 |
| CBFS: File @ offset 154c0 size 5800 |
| CBFS: Found @ offset 154c0 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x1b |
| CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Setting up local APIC... apic_id: 0x01 done. |
| POST: 0x9b |
| VMX is locked, so set_vmx will do nothing |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2600 |
| CPU #1 initialized |
| CPU2: stack_base bffcb000, stack_end bffcbff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 2. |
| After apic_write. |
| In relocation handler: cpu 2 |
| Startup point 1. |
| Waiting for send to finish... |
| +New SMBASE=0xbffff800 IEDBASE=0xc0400000 @ 0003fc00 |
| Sending STARTUP #2 to 2. |
| After apic_write. |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| memalign Enter, boundary 8, size 152, free_mem_ptr bffd4930 |
| memalign bffd4930 |
| CPU: 0 has core 3 |
| Initializing CPU #2 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| POST: 0x60 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [20100:bfffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 153a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 154c0 |
| CBFS: File @ offset 154c0 size 5800 |
| CBFS: Found @ offset 154c0 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x0 |
| microcode: updated to revision 0x1b date=2014-05-29 |
| CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Setting up local APIC... apic_id: 0x02 done. |
| POST: 0x9b |
| VMX is locked, so set_vmx will do nothing |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2600 |
| CPU #2 initialized |
| CPU3: stack_base bffca000, stack_end bffcaff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 3. |
| After apic_write. |
| In relocation handler: cpu 3 |
| New SMBASE=0xbffff400 IEDBASE=0xc0400000 @ 0003fc00 |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 3. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU #0 initialized |
| Waiting for 1 CPUS to stop |
| Initializing CPU #3 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| POST: 0x60 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [20100:bfffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 153a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 154c0 |
| CBFS: File @ offset 154c0 size 5800 |
| CBFS: Found @ offset 154c0 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x1b |
| CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Setting up local APIC... apic_id: 0x03 done. |
| POST: 0x9b |
| VMX is locked, so set_vmx will do nothing |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2600 |
| CPU #3 initialized |
| All AP CPUs stopped (435 loops) |
| CPU0: stack: bffcd000 - bffce000, lowest used address bffcda20, stack used: 1504 bytes |
| CPU1: stack: bffcc000 - bffcd000, lowest used address bffccc54, stack used: 940 bytes |
| CPU2: stack: bffcb000 - bffcc000, lowest used address bffcbc54, stack used: 940 bytes |
| CPU3: stack: bffca000 - bffcb000, lowest used address bffcac54, stack used: 940 bytes |
| CPU_CLUSTER: 0 init finished in 87433 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 00:00.0 init ... |
| Disabling PEG12. |
| Disabling PEG11. |
| Disabling PEG10. |
| Disabling PEG60. |
| Disabling Device 7. |
| Disabling PEG IO clock. |
| Set BIOS_RESET_CPL |
| CPU TDP: 35 Watts |
| PCI: 00:00.0 init finished in 1014 usecs |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 00:02.0 init ... |
| GT Power Management Init |
| IVB GT2 25W-35W Power Meter Weights |
| GT Power Management Init (post VBIOS) |
| Initializing VGA without OPROM. |
| EDID: |
| 00 ff ff ff ff ff ff 00 30 e4 d8 02 00 00 00 00 |
| 00 16 01 03 80 1c 10 78 ea 88 55 99 5b 55 8f 26 |
| 1d 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 |
| 01 01 01 01 01 01 60 1d 56 d8 50 00 18 30 30 40 |
| 47 00 15 9c 10 00 00 1b 00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 fe 00 4c |
| 47 20 44 69 73 70 6c 61 79 0a 20 20 00 00 00 fe |
| 00 4c 50 31 32 35 57 48 32 2d 53 4c 42 33 00 59 |
| Extracted contents: |
| header: 00 ff ff ff ff ff ff 00 |
| serial number: 30 e4 d8 02 00 00 00 00 00 16 |
| version: 01 03 |
| basic params: 80 1c 10 78 ea |
| chroma info: 88 55 99 5b 55 8f 26 1d 50 54 |
| established: 00 00 00 |
| standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 |
| descriptor 1: 60 1d 56 d8 50 00 18 30 30 40 47 00 15 9c 10 00 00 1b |
| descriptor 2: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
| descriptor 3: 00 00 00 fe 00 4c 47 20 44 69 73 70 6c 61 79 0a 20 20 |
| descriptor 4: 00 00 00 fe 00 4c 50 31 32 35 57 48 32 2d 53 4c 42 33 |
| extensions: 00 |
| checksum: 59 |
| |
| Manufacturer: LGD Model 2d8 Serial Number 0 |
| Made week 0 of 2012 |
| EDID version: 1.3 |
| Digital display |
| Maximum image size: 28 cm x 16 cm |
| Gamma: 220% |
| Check DPMS levels |
| DPMS levels: Standby Suspend Off |
| Supported color formats: RGB 4:4:4, YCrCb 4:2:2 |
| First detailed timing is preferred timing |
| Established timings supported: |
| Standard timings supported: |
| Detailed timings |
| Hex of detail: 601d56d85000183030404700159c1000001b |
| Detailed mode (IN HEX): Clock 75200 KHz, 115 mm x 9c mm |
| 0556 0586 05c6 062e hborder 0 |
| 0300 0304 030b 0318 vborder 0 |
| +hsync -vsync |
| Did detailed timing |
| Hex of detail: 000000000000000000000000000000000000 |
| Manufacturer-specified data, tag 0 |
| Hex of detail: 000000fe004c4720446973706c61790a2020 |
| ASCII string: LG Display |
| Hex of detail: 000000fe004c503132355748322d534c4233 |
| ASCII string: LP125WH2-SLB3 |
| Checksum |
| Checksum: 0x59 (valid) |
| WARNING: EDID block does NOT fully conform to EDID 1.3. |
| Missing name descriptor |
| Missing monitor ranges |
| bringing up panel at resolution 1376 x 768 |
| Borders 0 x 0 |
| Blank 216 x 24 |
| Sync 64 x 7 |
| Front porch 48 x 4 |
| Spread spectrum clock |
| Single channel |
| Polarities 0, 1 |
| Data M1=5256861, N1=8388608 |
| Link frequency 270000 kHz |
| Link M1=146023, N1=524288 |
| Pixel N=9, M1=14, M2=9, P1=1 |
| Pixel clock 150476 kHz |
| waiting for panel powerup |
| panel powered up |
| PCI: 00:02.0 init finished in 42682 usecs |
| POST: 0x75 |
| PCI: 00:04.0 init ... |
| PCI: 00:04.0 init finished in 0 usecs |
| POST: 0x75 |
| PCI: 00:14.0 init ... |
| XHCI: Setting up controller.. done. |
| PCI: 00:14.0 init finished in 6 usecs |
| POST: 0x75 |
| PCI: 00:16.0 init ... |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : YES |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Recovery |
| ME: Current Operation State : M0 with UMA |
| ME: Current Operation Mode : Normal |
| ME: Error Code : Image Failure |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Pseudo-global reset |
| ME: Progress Phase State : M0 kernel load |
| ME: BIOS path: Error |
| PCI: 00:16.0 init finished in 15 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 00:19.0 init ... |
| PCI: 00:19.0 init finished in 0 usecs |
| POST: 0x75 |
| PCI: 00:1a.0 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1a.0 init finished in 12 usecs |
| POST: 0x75 |
| PCI: 00:1b.0 init ... |
| Azalia: base = f1638000 |
| Azalia: codec_mask = 09 |
| Azalia: Initializing codec #3 |
| Azalia: codec viddid: 80862806 |
| Azalia: verb_size: 16 |
| Azalia: verb loaded. |
| Azalia: Initializing codec #0 |
| Azalia: codec viddid: 10ec0269 |
| Azalia: verb_size: 76 |
| Azalia: verb loaded. |
| PCI: 00:1b.0 init finished in 5971 usecs |
| POST: 0x75 |
| PCI: 00:1c.0 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.0 init finished in 10 usecs |
| POST: 0x75 |
| PCI: 00:1c.1 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.1 init finished in 10 usecs |
| POST: 0x75 |
| PCI: 00:1c.2 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.2 init finished in 13 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 00:1d.0 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1d.0 init finished in 12 usecs |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 00:1f.0 init ... |
| pch: lpc_init |
| IOAPIC: Initializing IOAPIC at 0xfec00000 |
| IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| IOAPIC: ID = 0x02 |
| IOAPIC: Dumping registers |
| reg 0x0000: 0x02000000 |
| reg 0x0001: 0x00170020 |
| reg 0x0002: 0x00170020 |
| CBFS: 'Master Header Locator' located CBFS at [20100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 153a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 154c0 |
| CBFS: File @ offset 154c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 154c0 |
| CBFS: Checking offset 1ad40 |
| CBFS: File @ offset 1ad40 size 38d |
| CBFS: Unmatched 'config' at 1ad40 |
| CBFS: Checking offset 1b140 |
| CBFS: File @ offset 1b140 size 245 |
| CBFS: Unmatched 'revision' at 1b140 |
| CBFS: Checking offset 1b3c0 |
| CBFS: File @ offset 1b3c0 size 100 |
| CBFS: Unmatched 'cmos.default' at 1b3c0 |
| CBFS: Checking offset 1b500 |
| CBFS: File @ offset 1b500 size 778 |
| CBFS: Found @ offset 1b500 size 778 |
| Set power off after power failure. |
| CBFS: 'Master Header Locator' located CBFS at [20100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 153a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 154c0 |
| CBFS: File @ offset 154c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 154c0 |
| CBFS: Checking offset 1ad40 |
| CBFS: File @ offset 1ad40 size 38d |
| CBFS: Unmatched 'config' at 1ad40 |
| CBFS: Checking offset 1b140 |
| CBFS: File @ offset 1b140 size 245 |
| CBFS: Unmatched 'revision' at 1b140 |
| CBFS: Checking offset 1b3c0 |
| CBFS: File @ offset 1b3c0 size 100 |
| CBFS: Unmatched 'cmos.default' at 1b3c0 |
| CBFS: Checking offset 1b500 |
| CBFS: File @ offset 1b500 size 778 |
| CBFS: Found @ offset 1b500 size 778 |
| NMI sources enabled. |
| PantherPoint PM init |
| rtc_failed = 0x0 |
| RTC Init |
| Enabling BIOS updates outside of SMM... Disabling ACPI via APMC: |
| done. |
| pch_spi_init |
| PCI: 00:1f.0 init finished in 1557 usecs |
| POST: 0x75 |
| PCI: 00:1f.2 init ... |
| SATA: Initializing... |
| CBFS: 'Master Header Locator' located CBFS at [20100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 153a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 154c0 |
| CBFS: File @ offset 154c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 154c0 |
| CBFS: Checking offset 1ad40 |
| CBFS: File @ offset 1ad40 size 38d |
| CBFS: Unmatched 'config' at 1ad40 |
| CBFS: Checking offset 1b140 |
| CBFS: File @ offset 1b140 size 245 |
| CBFS: Unmatched 'revision' at 1b140 |
| CBFS: Checking offset 1b3c0 |
| CBFS: File @ offset 1b3c0 size 100 |
| CBFS: Unmatched 'cmos.default' at 1b3c0 |
| CBFS: Checking offset 1b500 |
| CBFS: File @ offset 1b500 size 778 |
| CBFS: Found @ offset 1b500 size 778 |
| SATA: Controller in AHCI mode. |
| ABAR: f163d000 |
| PCI: 00:1f.2 init finished in 408 usecs |
| POST: 0x75 |
| PCI: 00:1f.3 init ... |
| PCI: 00:1f.3 init finished in 7 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 01:00.0 init ... |
| PCI: 01:00.0 init finished in 14 usecs |
| POST: 0x75 |
| PCI: 02:00.0 init ... |
| PCI: 02:00.0 init finished in 0 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PNP: 00ff.2 init ... |
| PNP: 00ff.2 init finished in 0 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:54 init ... |
| I2C: 01:54 init finished in 1 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:55 init ... |
| I2C: 01:55 init finished in 1 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:56 init ... |
| I2C: 01:56 init finished in 0 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:57 init ... |
| I2C: 01:57 init finished in 0 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5c init ... |
| Locking EEPROM RFID |
| init EEPROM done |
| I2C: 01:5c init finished in 25862 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5d init ... |
| I2C: 01:5d init finished in 0 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5e init ... |
| I2C: 01:5e init finished in 0 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5f init ... |
| I2C: 01:5f init finished in 0 usecs |
| Devices initialized |
| Show all devs... After init. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 01:00.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 0 |
| PCI: 00:1c.4: enabled 0 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 00ff.1: enabled 1 |
| PNP: 0c31.0: enabled 1 |
| PNP: 00ff.2: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| I2C: 01:54: enabled 1 |
| I2C: 01:55: enabled 1 |
| I2C: 01:56: enabled 1 |
| I2C: 01:57: enabled 1 |
| I2C: 01:5c: enabled 1 |
| I2C: 01:5d: enabled 1 |
| I2C: 01:5e: enabled 1 |
| I2C: 01:5f: enabled 1 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| PCI: 00:04.0: enabled 1 |
| PCI: 02:00.0: enabled 1 |
| Unknown device path type: 0 |
| : enabled 1 |
| APIC: 01: enabled 1 |
| APIC: 02: enabled 1 |
| APIC: 03: enabled 1 |
| BS: BS_DEV_INIT times (us): entry 11 run 165190 exit 0 |
| POST: 0x76 |
| Finalize devices... |
| PCI: 00:1f.0 final |
| Devices finalized |
| BS: BS_POST_DEVICE times (us): entry 0 run 4 exit 0 |
| POST: 0x77 |
| BS: BS_OS_RESUME_CHECK times (us): entry 0 run 3 exit 0 |
| Updating MRC cache data. |
| No MRC cache in cbmem. Can't update flash. |
| POST: 0x79 |
| POST: 0x9c |
| CBFS: 'Master Header Locator' located CBFS at [20100:bfffc0) |
| CBFS: Locating 'fallback/dsdt.aml' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 153a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 154c0 |
| CBFS: File @ offset 154c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 154c0 |
| CBFS: Checking offset 1ad40 |
| CBFS: File @ offset 1ad40 size 38d |
| CBFS: Unmatched 'config' at 1ad40 |
| CBFS: Checking offset 1b140 |
| CBFS: File @ offset 1b140 size 245 |
| CBFS: Unmatched 'revision' at 1b140 |
| CBFS: Checking offset 1b3c0 |
| CBFS: File @ offset 1b3c0 size 100 |
| CBFS: Unmatched 'cmos.default' at 1b3c0 |
| CBFS: Checking offset 1b500 |
| CBFS: File @ offset 1b500 size 778 |
| CBFS: Unmatched 'cmos_layout.bin' at 1b500 |
| CBFS: Checking offset 1bcc0 |
| CBFS: File @ offset 1bcc0 size 34ff |
| CBFS: Found @ offset 1bcc0 size 34ff |
| CBFS: 'Master Header Locator' located CBFS at [20100:bfffc0) |
| CBFS: Locating 'fallback/slic' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 153a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 154c0 |
| CBFS: File @ offset 154c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 154c0 |
| CBFS: Checking offset 1ad40 |
| CBFS: File @ offset 1ad40 size 38d |
| CBFS: Unmatched 'config' at 1ad40 |
| CBFS: Checking offset 1b140 |
| CBFS: File @ offset 1b140 size 245 |
| CBFS: Unmatched 'revision' at 1b140 |
| CBFS: Checking offset 1b3c0 |
| CBFS: File @ offset 1b3c0 size 100 |
| CBFS: Unmatched 'cmos.default' at 1b3c0 |
| CBFS: Checking offset 1b500 |
| CBFS: File @ offset 1b500 size 778 |
| CBFS: Unmatched 'cmos_layout.bin' at 1b500 |
| CBFS: Checking offset 1bcc0 |
| CBFS: File @ offset 1bcc0 size 34ff |
| CBFS: Unmatched 'fallback/dsdt.aml' at 1bcc0 |
| CBFS: Checking offset 1f240 |
| CBFS: File @ offset 1f240 size c58 |
| CBFS: Unmatched '' at 1f240 |
| CBFS: Checking offset 1fec0 |
| CBFS: File @ offset 1fec0 size 10000 |
| CBFS: Unmatched 'mrc.cache' at 1fec0 |
| CBFS: Checking offset 2ff00 |
| CBFS: File @ offset 2ff00 size 1743f |
| CBFS: Unmatched 'fallback/ramstage' at 2ff00 |
| CBFS: Checking offset 47380 |
| CBFS: File @ offset 47380 size 18bd8 |
| CBFS: Unmatched 'img/coreinfo' at 47380 |
| CBFS: Checking offset 5ff80 |
| CBFS: File @ offset 5ff80 size 2255c |
| CBFS: Unmatched 'img/nvramcui' at 5ff80 |
| CBFS: Checking offset 82540 |
| CBFS: File @ offset 82540 size 8de72 |
| CBFS: Unmatched 'fallback/payload' at 82540 |
| CBFS: Checking offset 110400 |
| CBFS: File @ offset 110400 size ee48 |
| CBFS: Unmatched 'img/tint' at 110400 |
| CBFS: Checking offset 11f280 |
| CBFS: File @ offset 11f280 size 2c02c |
| CBFS: Unmatched 'img/memtest' at 11f280 |
| CBFS: Checking offset 14b300 |
| CBFS: File @ offset 14b300 size 11f2 |
| CBFS: Unmatched 'grub.cfg' at 14b300 |
| CBFS: Checking offset 14c540 |
| CBFS: File @ offset 14c540 size 11ea |
| CBFS: Unmatched 'grubtest.cfg' at 14c540 |
| CBFS: Checking offset 14d780 |
| CBFS: File @ offset 14d780 size a91698 |
| CBFS: Unmatched '' at 14d780 |
| CBFS: Checking offset bdee40 |
| CBFS: File @ offset bdee40 size 1068 |
| CBFS: 'fallback/slic' not found. |
| ACPI: Writing ACPI tables at bff21000. |
| ACPI: * FACS |
| ACPI: * DSDT |
| ACPI: * FADT |
| ACPI: added table 1/32, length now 40 |
| ACPI: * SSDT |
| Found 1 CPU(s) with 4 core(s) each. |
| PSS: 2601MHz power 35000 control 0x2100 status 0x2100 |
| PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 31561 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 28247 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 25084 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 22064 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 19135 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 16344 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 13666 control 0xc00 status 0xc00 |
| PSS: 2601MHz power 35000 control 0x2100 status 0x2100 |
| PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 31561 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 28247 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 25084 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 22064 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 19135 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 16344 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 13666 control 0xc00 status 0xc00 |
| PSS: 2601MHz power 35000 control 0x2100 status 0x2100 |
| PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 31561 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 28247 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 25084 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 22064 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 19135 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 16344 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 13666 control 0xc00 status 0xc00 |
| PSS: 2601MHz power 35000 control 0x2100 status 0x2100 |
| PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 31561 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 28247 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 25084 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 22064 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 19135 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 16344 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 13666 control 0xc00 status 0xc00 |
| \_SB.PCI0.LPCB.TPM: LPC TPM PNP: 0c31.0 |
| ACPI: added table 2/32, length now 44 |
| ACPI: * MCFG |
| ACPI: added table 3/32, length now 48 |
| ACPI: * TCPA |
| TCPA log created at bff10000 |
| ACPI: added table 4/32, length now 52 |
| ACPI: * MADT |
| ACPI: added table 5/32, length now 56 |
| current = bff26220 |
| ACPI: * DMAR |
| ACPI: added table 6/32, length now 60 |
| current = bff262d0 |
| GET_VBIOS: aa55 8086 0 0 3 |
| ... VBIOS found at 000c0000 |
| ACPI: * HPET |
| ACPI: added table 7/32, length now 64 |
| ACPI: done. |
| ACPI tables: 29456 bytes. |
| smbios_write_tables: bff0f000 |
| memalign Enter, boundary 8, size 35, free_mem_ptr bffd49c8 |
| memalign bffd49c8 |
| recv_ec_data: 0x47 |
| recv_ec_data: 0x32 |
| recv_ec_data: 0x48 |
| recv_ec_data: 0x54 |
| recv_ec_data: 0x33 |
| recv_ec_data: 0x35 |
| recv_ec_data: 0x57 |
| recv_ec_data: 0x57 |
| recv_ec_data: 0x16 |
| recv_ec_data: 0x03 |
| Create SMBIOS type 17 |
| Root Device (LENOVO ThinkPad X230) |
| CPU_CLUSTER: 0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| APIC: 00 (unknown) |
| APIC: acac (Intel SandyBridge/IvyBridge CPU) |
| DOMAIN: 0000 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:00.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:01.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:02.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:14.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:19.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1a.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1b.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 01:00.0 (unknown) |
| PCI: 00:1c.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.4 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.7 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1d.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1e.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PNP: 00ff.1 (Lenovo Power Management Hardware Hub 7) |
| PNP: 0c31.0 (LPC TPM) |
| PNP: 00ff.2 (Lenovo H8 EC) |
| PCI: 00:1f.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| I2C: 01:54 (AT24RF08C) |
| I2C: 01:55 (AT24RF08C) |
| I2C: 01:56 (AT24RF08C) |
| I2C: 01:57 (AT24RF08C) |
| I2C: 01:5c (AT24RF08C) |
| I2C: 01:5d (AT24RF08C) |
| I2C: 01:5e (AT24RF08C) |
| I2C: 01:5f (AT24RF08C) |
| PCI: 00:1f.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:04.0 (unknown) |
| PCI: 02:00.0 (unknown) |
| Unknown device path type: 0 |
| (unknown) |
| APIC: 01 (unknown) |
| APIC: 02 (unknown) |
| APIC: 03 (unknown) |
| SMBIOS tables: 629 bytes. |
| Writing table forward entry at 0x00000500 |
| Wrote coreboot table at: 00000500, 0x10 bytes, checksum efe9 |
| Writing coreboot table at 0xbff45000 |
| CBFS: 'Master Header Locator' located CBFS at [20100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 153a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 154c0 |
| CBFS: File @ offset 154c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 154c0 |
| CBFS: Checking offset 1ad40 |
| CBFS: File @ offset 1ad40 size 38d |
| CBFS: Unmatched 'config' at 1ad40 |
| CBFS: Checking offset 1b140 |
| CBFS: File @ offset 1b140 size 245 |
| CBFS: Unmatched 'revision' at 1b140 |
| CBFS: Checking offset 1b3c0 |
| CBFS: File @ offset 1b3c0 size 100 |
| CBFS: Unmatched 'cmos.default' at 1b3c0 |
| CBFS: Checking offset 1b500 |
| CBFS: File @ offset 1b500 size 778 |
| CBFS: Found @ offset 1b500 size 778 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd49eb |
| memalign bffd49f0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4a08 |
| memalign bffd4a08 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4a20 |
| memalign bffd4a20 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4a38 |
| memalign bffd4a38 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4a50 |
| memalign bffd4a50 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4a68 |
| memalign bffd4a68 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4a80 |
| memalign bffd4a80 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4a98 |
| memalign bffd4a98 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4ab0 |
| memalign bffd4ab0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4ac8 |
| memalign bffd4ac8 |
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1. 0000000000001000-000000000009ffff: RAM |
| 2. 00000000000a0000-00000000000fffff: RESERVED |
| 3. 0000000000100000-00000000bff0efff: RAM |
| 4. 00000000bff0f000-00000000bfffffff: CONFIGURATION TABLES |
| 5. 00000000c0000000-00000000c29fffff: RESERVED |
| 6. 00000000f8000000-00000000fbffffff: RESERVED |
| 7. 00000000fed40000-00000000fed44fff: RESERVED |
| 8. 00000000fed90000-00000000fed91fff: RESERVED |
| 9. 0000000100000000-000000043b5fffff: RAM |
| read 6008 from 07e4 |
| wrote 00000004 to 0890 |
| read 03040103 from 0894 |
| read 00000000 from 0880 |
| wrote 00000000 to 0880 |
| read 00000000 from 07e8 |
| wrote 00000000 to 07e8 |
| wrote 00001000 to 0890 |
| read 4990001c from 0894 |
| flash size 0xc00000 bytes |
| SF: Detected Opaque HW-sequencing with sector size 0x1000, total 0xc00000 |
| CBFS: 'Master Header Locator' located CBFS at [20100:bfffc0) |
| FMAP: Found "FLASH" version 1.1 at 20000. |
| FMAP: base = ff400000 size = c00000 #areas = 3 |
| Wrote coreboot table at: bff45000, 0xb14 bytes, checksum fed3 |
| coreboot table: 2860 bytes. |
| IMD ROOT 0. bffff000 00001000 |
| IMD SMALL 1. bfffe000 00001000 |
| CONSOLE 2. bffde000 00020000 |
| TIME STAMP 3. bffdd000 00000400 |
| ROMSTG STCK 4. bffd8000 00005000 |
| RAMSTAGE 5. bff92000 00046000 |
| 57a9e100 6. bff4d000 00044a50 |
| COREBOOT 7. bff45000 00008000 |
| ACPI 8. bff21000 00024000 |
| ACPI GNVS 9. bff20000 00001000 |
| TCPA LOG 10. bff10000 00010000 |
| SMBIOS 11. bff0f000 00000800 |
| IMD small region: |
| IMD ROOT 0. bfffec00 00000400 |
| CAR GLOBALS 1. bfffea40 000001c0 |
| USBDEBUG 2. bfffe9e0 00000058 |
| MEM INFO 3. bfffe880 00000141 |
| ROMSTAGE 4. bfffe860 00000004 |
| 57a9e000 5. bfffe840 00000010 |
| BS: BS_WRITE_TABLES times (us): entry 1 run 32599 exit 0 |
| POST: 0x7a |
| CBFS: 'Master Header Locator' located CBFS at [20100:bfffc0) |
| CBFS: Locating 'fallback/payload' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 153a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 154c0 |
| CBFS: File @ offset 154c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 154c0 |
| CBFS: Checking offset 1ad40 |
| CBFS: File @ offset 1ad40 size 38d |
| CBFS: Unmatched 'config' at 1ad40 |
| CBFS: Checking offset 1b140 |
| CBFS: File @ offset 1b140 size 245 |
| CBFS: Unmatched 'revision' at 1b140 |
| CBFS: Checking offset 1b3c0 |
| CBFS: File @ offset 1b3c0 size 100 |
| CBFS: Unmatched 'cmos.default' at 1b3c0 |
| CBFS: Checking offset 1b500 |
| CBFS: File @ offset 1b500 size 778 |
| CBFS: Unmatched 'cmos_layout.bin' at 1b500 |
| CBFS: Checking offset 1bcc0 |
| CBFS: File @ offset 1bcc0 size 34ff |
| CBFS: Unmatched 'fallback/dsdt.aml' at 1bcc0 |
| CBFS: Checking offset 1f240 |
| CBFS: File @ offset 1f240 size c58 |
| CBFS: Unmatched '' at 1f240 |
| CBFS: Checking offset 1fec0 |
| CBFS: File @ offset 1fec0 size 10000 |
| CBFS: Unmatched 'mrc.cache' at 1fec0 |
| CBFS: Checking offset 2ff00 |
| CBFS: File @ offset 2ff00 size 1743f |
| CBFS: Unmatched 'fallback/ramstage' at 2ff00 |
| CBFS: Checking offset 47380 |
| CBFS: File @ offset 47380 size 18bd8 |
| CBFS: Unmatched 'img/coreinfo' at 47380 |
| CBFS: Checking offset 5ff80 |
| CBFS: File @ offset 5ff80 size 2255c |
| CBFS: Unmatched 'img/nvramcui' at 5ff80 |
| CBFS: Checking offset 82540 |
| CBFS: File @ offset 82540 size 8de72 |
| CBFS: Found @ offset 82540 size 8de72 |
| Loading segment from ROM address 0xff4a2678 |
| code (compression=1) |
| memalign Enter, boundary 8, size 28, free_mem_ptr bffd4ae0 |
| memalign bffd4ae0 |
| New segment dstaddr 0x8200 memsize 0x17824 srcaddr 0xff4a26cc filesize 0x83b7 |
| Loading segment from ROM address 0xff4a2694 |
| code (compression=1) |
| memalign Enter, boundary 8, size 28, free_mem_ptr bffd4afc |
| memalign bffd4b00 |
| New segment dstaddr 0x100000 memsize 0x205710 srcaddr 0xff4aaa83 filesize 0x85a67 |
| Loading segment from ROM address 0xff4a26b0 |
| Entry Point 0x00008200 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4b1c |
| memalign bffd4b20 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4b38 |
| memalign bffd4b38 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4b50 |
| memalign bffd4b50 |
| Loading Segment: addr: 0x0000000000008200 memsz: 0x0000000000017824 filesz: 0x00000000000083b7 |
| lb: [0x00000000bff93000, 0x00000000bffd7a50) |
| Post relocation: addr: 0x0000000000008200 memsz: 0x0000000000017824 filesz: 0x00000000000083b7 |
| using LZMA |
| [ 0x00008200, 00017feb, 0x0001fa24) <- ff4a26cc |
| Clearing Segment: addr: 0x0000000000017feb memsz: 0x0000000000007a39 |
| dest 00008200, end 0001fa24, bouncebuffer ffffffff |
| Loading Segment: addr: 0x0000000000100000 memsz: 0x0000000000205710 filesz: 0x0000000000085a67 |
| lb: [0x00000000bff93000, 0x00000000bffd7a50) |
| Post relocation: addr: 0x0000000000100000 memsz: 0x0000000000205710 filesz: 0x0000000000085a67 |
| using LZMA |
| [ 0x00100000, 00305710, 0x00305710) <- ff4aaa83 |
| dest 00100000, end 00305710, bouncebuffer ffffffff |
| Loaded segments |
| BS: BS_PAYLOAD_LOAD times (us): entry 0 run 235723 exit 0 |
| POST: 0x7b |
| PCH watchdog disabled |
| Jumping to boot code at 00008200(bff45000) |
| POST: 0xf8 |
| CPU0: stack: bffcd000 - bffce000, lowest used address bffcd880, stack used: 1920 bytes |
| error: file `/background.jpg' not found. |
|
error: file `/dejavusansmono.pf2' not found. |
|
error: file `/boot/grub/layouts/usqwerty.gkb' not found. |
|
GNU GRUB version 2.02-1 |
|
|
|
+----------------------------------------------------------------------------+||||||||||||||||||||||||+----------------------------------------------------------------------------+ Use the ^ and v keys to select which entry is highlighted. |
|
Press enter to boot the selected OS, `e' to edit the commands |
|
before booting or `c' for a command-line. *Load Operating System (incl. fully encrypted disks) [o] Search ISOLINUX menu (AHCI) [a] Search ISOLINUX menu (USB) [u] Search ISOLINUX menu (CD/DVD) [d] Load test configuration (grubtest.cfg) inside of CBFS [t] Search for GRUB2 configuration on external media [s] Poweroff [p] Reboot [r] The highlighted entry will be executed automatically in 1s. The highlighted entry will be executed automatically in 0s. error: file `/boot/grub/fonts/unicode.pf2' not found. |
|
|