|
|
|
|
| coreboot-4.0-8032-gb10db43 Thu Jan 29 18:47:21 CST 2015 starting...
|
| Disabling Watchdog reboot... done.
|
| SMBus controller enabled.
|
| Setting up static northbridge registers... done.
|
| Initializing Graphics...
|
| Back from haswell_early_initialization()
|
| CPU id(40651) ucode:0000001c Intel(R) Celeron(R) 2955U @ 1.40GHz
|
| AES NOT supported, TXT NOT supported, VT supported
|
| PCH type: LP Mainstream, device id: 9c45, rev id 4
|
| Starting UEFI PEI System Agent
|
| find_current_mrc_cache_local: picked entry 0 from cache block
|
| prepare_mrc_cache: at fffe0010, size fe0 checksum 89b1
|
| System Agent: Starting up...
|
| System Agent: Initializing PCH
|
| install_ppi: overwrite GUID {ed097352-9041-445a-80b6-b29d509e8845}
|
| install_ppi: overwrite GUID {908c7f8b-5c48-47fb-8357-f5fd4e235276}
|
| System Agent: Initializing PCH (SMBUS)
|
| System Agent: Initializing PCH (USB)
|
| System Agent: Initializing PCH (SA Init)
|
| System Agent: Initializing PCH (Me UMA)
|
| System Agent: Initializing Memory
|
| System Agent: Done.
|
| Sanity checking heap.
|
| System Agent Version 1.6.1 Build 2
|
| memcfg DDR3 clock 1600 MHz
|
| memcfg channel assignment: A: 0, B 1, C 2
|
| memcfg channel[0] config (00780008):
|
| ECC inactive
|
| enhanced interleave mode on
|
| rank interleave on
|
| DIMMA 2048 MB width x16 single rank, selected
|
| DIMMB 0 MB width x16 single rank
|
| memcfg channel[1] config (00600008):
|
| ECC inactive
|
| enhanced interleave mode on
|
| rank interleave on
|
| DIMMA 2048 MB width x8 or x32 single rank, selected
|
| DIMMB 0 MB width x8 or x32 single rank
|
| ME: FW Partition Table : OK
|
| ME: Bringup Loader Failure : NO
|
| ME: Firmware Init Complete : NO
|
| ME: Manufacturing Mode : NO
|
| ME: Boot Options Present : NO
|
| ME: Update In Progress : NO
|
| ME: Current Working State : Normal
|
| ME: Current Operation State : Bring up
|
| ME: Current Operation Mode : Normal
|
| ME: Error Code : No Error
|
| ME: Progress Phase : BUP Phase
|
| ME: Power Management Event : Pseudo-global reset
|
| ME: Progress Phase State : 0x2b
|
| CBMEM: root @ 7f7ff000 254 entries.
|
| Relocate MRC DATA from ff7d0320 to 7f7dc000 (4064 bytes)
|
| Trying CBFS ramstage loader.
|
| Decompressing stage fallback/ramstage @ 0x7f790fc0 (278648 bytes)
|
| Loading module at 7f791000 with entry 7f791000. filesize: 0x32430 memsize: 0x44038
|
| Processing 2795 relocs. Offset value of 0x7f791000
|
| coreboot-4.0-8032-gb10db43 Thu Jan 29 18:47:21 CST 2015 booting...
|
| clocks_per_usec: 1400
|
| CBMEM: recovering 9/254 entries from root @ 7f7ff000
|
| Moving GDT to 7f749000...ok
|
| BS: BS_PRE_DEVICE times (us): entry 10 run 4 exit 4
|
| BS: BS_DEV_INIT_CHIPS times (us): entry 3 run 5 exit 3
|
| Enumerating buses...
|
| CPU_CLUSTER: 0 enabled
|
| DOMAIN: 0000 enabled
|
| PCI: pci_scan_bus for bus 00
|
| Normal boot.
|
| PCI: 00:00.0 [8086/0a04] enabled
|
| PCI: 00:02.0 [8086/0a06] enabled
|
| PCI: 00:03.0 [8086/0a0c] enabled
|
| PCI: 00:13.0: Disabling device
|
| PCI: 00:13.0 [8086/9c36] disabled No operations
|
| PCI: 00:14.0 [8086/9c31] enabled
|
| PCI: 00:15.0: Disabling device
|
| IOBP: set 0xce00aa07 to 0x00000100
|
| PCI: 00:15.1: Disabling device
|
| IOBP: set 0xce00aa47 to 0x00000100
|
| PCI: 00:15.2: Disabling device
|
| IOBP: set 0xce00aa87 to 0x00000100
|
| PCI: 00:15.3: Disabling device
|
| IOBP: set 0xce00aac7 to 0x00000100
|
| PCI: 00:15.4: Disabling device
|
| IOBP: set 0xce00ab07 to 0x00000100
|
| PCI: 00:15.5: Disabling device
|
| IOBP: set 0xce00ab47 to 0x00000100
|
| PCI: 00:15.6: Disabling device
|
| IOBP: set 0xce00ab87 to 0x00000100
|
| PCI: 00:16.0 [8086/9c3a] enabled
|
| PCI: 00:16.1: Disabling device
|
| PCI: 00:16.1 [8086/9c3b] disabled No operations
|
| PCI: 00:16.2: Disabling device
|
| PCI: 00:16.3: Disabling device
|
| PCI: 00:17.0: Disabling device
|
| IOBP: set 0xce00ae07 to 0x00000100
|
| PCI: 00:19.0: Disabling device
|
| PCI: 00:1b.0 [8086/9c20] enabled
|
| PCI: 00:1c.0 [8086/9c10] disabled
|
| PCI: 00:1c.1 [8086/9c12] disabled
|
| PCIe Root Port 3 ASPM is disabled
|
| PCI: 00:1c.2 [8086/9c14] enabled
|
| PCIe Root Port 4 ASPM is disabled
|
| PCI: 00:1c.3 [8086/9c16] enabled
|
| PCIe Root Port 5 ASPM is enabled
|
| IOBP: set 0xe9000c40 to 0x05050e00
|
| IOBP: set 0xe9000e40 to 0x05050e00
|
| IOBP: set 0xe9001040 to 0x05050e00
|
| IOBP: set 0xe9001240 to 0x05050e00
|
| PCI: 00:1c.4 [8086/9c18] enabled
|
| PCI: 00:1c.0: Disabling device
|
| PCI: 00:1c.1: Disabling device
|
| PCI: 00:1c.5: Disabling device
|
| PCH: PCIe map 1c.2 -> 1c.0
|
| PCH: PCIe map 1c.3 -> 1c.1
|
| PCH: PCIe map 1c.4 -> 1c.2
|
| PCH: PCIe map 1c.0 -> 1c.3
|
| PCH: PCIe map 1c.1 -> 1c.4
|
| PCI: 00:1c.5 [8086/9c1a] disabled
|
| PCI: 00:1d.0 [8086/9c26] enabled
|
| PCI: 00:1e.0: Disabling device
|
| PCI: 00:1f.0 [8086/9c45] enabled
|
| PCI: 00:1f.2 [8086/9c03] enabled
|
| PCI: 00:1f.3 [8086/9c22] enabled
|
| PCI: 00:1f.6 [8086/9c24] enabled
|
| PCI: pci_scan_bus for bus 01
|
| PCI: 01:00.0 [10ec/8168] enabled
|
| PCI: pci_scan_bus returning with max=001
|
| Enabling Common Clock Configuration
|
| ASPM: Enabled L1
|
| PCI: pci_scan_bus for bus 02
|
| PCI: 02:00.0 [168c/0034] enabled
|
| PCI: pci_scan_bus returning with max=002
|
| Enabling Common Clock Configuration
|
| ASPM: Enabled L0s and L1
|
| PCI: pci_scan_bus for bus 03
|
| PCI: pci_scan_bus returning with max=003
|
| PNP: 002e.0 disabled
|
| PNP: 002e.1 enabled
|
| PNP: 002e.4 enabled
|
| PNP: 002e.7 enabled
|
| PNP: 002e.5 disabled
|
| PNP: 002e.6 disabled
|
| PNP: 002e.a disabled
|
| PCI: pci_scan_bus returning with max=003
|
| done
|
| BS: BS_DEV_ENUMERATE times (us): entry 4 run 2564 exit 4
|
| found VGA at PCI: 00:02.0
|
| Setting up VGA for PCI: 00:02.0
|
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
|
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
|
| Allocating resources...
|
| Reading resources...
|
| APIC: 00 missing read_resources
|
| mc_add_fixed_mmio_resources: Adding PCIEXBAR @ 60 0xf0000000-0xf3ffffff.
|
| mc_add_fixed_mmio_resources: Adding MCHBAR @ 48 0xfed10000-0xfed17fff.
|
| mc_add_fixed_mmio_resources: Adding DMIBAR @ 68 0xfed18000-0xfed18fff.
|
| mc_add_fixed_mmio_resources: Adding EPBAR @ 40 0xfed19000-0xfed19fff.
|
| mc_add_fixed_mmio_resources: Adding GDXCBAR @ 5420 0xfed84000-0xfed84fff.
|
| MC MAP: TOM: 0x100000000
|
| MC MAP: TOUUD: 0x17ce00000
|
| MC MAP: MESEG_BASE: 0xff000000
|
| MC MAP: MESEG_LIMIT: 0x7fff0fffff
|
| MC MAP: REMAP_BASE: 0x100000000
|
| MC MAP: REMAP_LIMIT: 0x17cdfffff
|
| MC MAP: TOLUD: 0x82200000
|
| MC MAP: BGSM: 0x80000000
|
| MC MAP: BDSM: 0x80200000
|
| MC MAP: TESGMB: 0x7f800000
|
| MC MAP: GGC: 0x209
|
| Done reading resources.
|
| skipping PNP: 002e.4@f2 fixed resource, size=0!
|
| Setting resources...
|
| PCI: 00:02.0 10 <- [0x00e0000000 - 0x00e03fffff] size 0x00400000 gran 0x16 mem64
|
| PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64
|
| PCI: 00:02.0 20 <- [0x0000003000 - 0x000000303f] size 0x00000040 gran 0x06 io
|
| PCI: 00:03.0 10 <- [0x00e0710000 - 0x00e0713fff] size 0x00004000 gran 0x0e mem64
|
| PCI: 00:14.0 10 <- [0x00e0700000 - 0x00e070ffff] size 0x00010000 gran 0x10 mem64
|
| PCI: 00:16.0 10 <- [0x00e0719d00 - 0x00e0719d1f] size 0x00000020 gran 0x05 mem64
|
| PCI: 00:1b.0 10 <- [0x00e0714000 - 0x00e0717fff] size 0x00004000 gran 0x0e mem64
|
| PCI: 00:1c.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 01 io
|
| PCI: 00:1c.0 24 <- [0x00e0400000 - 0x00e04fffff] size 0x00100000 gran 0x14 bus 01 prefmem
|
| PCI: 00:1c.0 20 <- [0x00e0500000 - 0x00e05fffff] size 0x00100000 gran 0x14 bus 01 mem
|
| PCI: 01:00.0 10 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
|
| PCI: 01:00.0 18 <- [0x00e0500000 - 0x00e0500fff] size 0x00001000 gran 0x0c mem64
|
| PCI: 01:00.0 20 <- [0x00e0400000 - 0x00e0403fff] size 0x00004000 gran 0x0e prefmem64
|
| PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
|
| PCI: 00:1c.1 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 prefmem
|
| PCI: 00:1c.1 20 <- [0x00e0600000 - 0x00e06fffff] size 0x00100000 gran 0x14 bus 02 mem
|
| PCI: 02:00.0 10 <- [0x00e0600000 - 0x00e067ffff] size 0x00080000 gran 0x13 mem64
|
| PCI: 02:00.0 30 <- [0x00e0680000 - 0x00e068ffff] size 0x00010000 gran 0x10 romem
|
| PCI: 00:1c.2 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io
|
| PCI: 00:1c.2 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 prefmem
|
| PCI: 00:1c.2 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 mem
|
| PCI: 00:1d.0 10 <- [0x00e0719800 - 0x00e0719bff] size 0x00000400 gran 0x0a mem
|
| PNP: 002e.1 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
|
| PNP: 002e.1 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
|
| PNP: 002e.4 60 <- [0x0000000700 - 0x0000000707] size 0x00000008 gran 0x03 io
|
| PNP: 002e.4 62 <- [0x0000000710 - 0x0000000713] size 0x00000004 gran 0x02 io
|
| PNP: 002e.4 70 <- [0x0000000009 - 0x0000000009] size 0x00000001 gran 0x00 irq
|
| PNP: 002e.4 f2 <- [0x0000000020 - 0x000000001f] size 0x00000000 gran 0x00 irq
|
| PNP: 002e.4 f4 <- [0x0000000000 - 0x0000000000] size 0x00000001 gran 0x00 irq
|
| PNP: 002e.4 fa <- [0x0000000012 - 0x0000000012] size 0x00000001 gran 0x00 irq
|
| PNP: 002e.7 60 <- [0x0000000720 - 0x0000000720] size 0x00000001 gran 0x00 io
|
| PNP: 002e.7 62 <- [0x0000000730 - 0x0000000737] size 0x00000008 gran 0x03 io
|
| PCI: 00:1f.2 10 <- [0x0000003060 - 0x0000003067] size 0x00000008 gran 0x03 io
|
| PCI: 00:1f.2 14 <- [0x0000003070 - 0x0000003073] size 0x00000004 gran 0x02 io
|
| PCI: 00:1f.2 18 <- [0x0000003068 - 0x000000306f] size 0x00000008 gran 0x03 io
|
| PCI: 00:1f.2 1c <- [0x0000003074 - 0x0000003077] size 0x00000004 gran 0x02 io
|
| PCI: 00:1f.2 20 <- [0x0000003040 - 0x000000305f] size 0x00000020 gran 0x05 io
|
| PCI: 00:1f.2 24 <- [0x00e0719000 - 0x00e07197ff] size 0x00000800 gran 0x0b mem
|
| PCI: 00:1f.3 10 <- [0x00e0719c00 - 0x00e0719cff] size 0x00000100 gran 0x08 mem64
|
| PCI: 00:1f.6 10 <- [0x00e0718000 - 0x00e0718fff] size 0x00001000 gran 0x0c mem64
|
| Done setting resources.
|
| Done allocating resources.
|
| BS: BS_DEV_RESOURCES times (us): entry 4 run 2716 exit 3
|
| Enabling resources...
|
| PCI: 00:00.0 subsystem <- 1ae0/c000
|
| PCI: 00:00.0 cmd <- 06
|
| PCI: 00:02.0 subsystem <- 1ae0/c000
|
| PCI: 00:02.0 cmd <- 03
|
| PCI: 00:03.0 subsystem <- 1ae0/c000
|
| PCI: 00:03.0 cmd <- 02
|
| PCI: 00:14.0 subsystem <- 1ae0/c000
|
| PCI: 00:14.0 cmd <- 102
|
| PCI: 00:16.0 subsystem <- 1ae0/c000
|
| PCI: 00:16.0 cmd <- 02
|
| PCI: 00:1b.0 subsystem <- 1ae0/c000
|
| PCI: 00:1b.0 cmd <- 102
|
| PCI: 00:1c.0 bridge ctrl <- 0003
|
| PCI: 00:1c.0 subsystem <- 1ae0/c000
|
| PCI: 00:1c.0 cmd <- 07
|
| PCI: 00:1c.1 bridge ctrl <- 0003
|
| PCI: 00:1c.1 subsystem <- 1ae0/c000
|
| PCI: 00:1c.1 cmd <- 06
|
| PCI: 00:1c.2 bridge ctrl <- 0003
|
| PCI: 00:1c.2 subsystem <- 1ae0/c000
|
| PCI: 00:1c.2 cmd <- 00
|
| PCI: 00:1d.0 subsystem <- 1ae0/c000
|
| PCI: 00:1d.0 cmd <- 102
|
| PCI: 00:1f.0 subsystem <- 1ae0/c000
|
| PCI: 00:1f.0 cmd <- 107
|
| PCI: 00:1f.2 subsystem <- 1ae0/c000
|
| PCI: 00:1f.2 cmd <- 103
|
| PCI: 00:1f.3 subsystem <- 1ae0/c000
|
| PCI: 00:1f.3 cmd <- 103
|
| PCI: 00:1f.6 subsystem <- 1ae0/c000
|
| PCI: 00:1f.6 cmd <- 102
|
| PCI: 01:00.0 cmd <- 03
|
| PCI: 02:00.0 cmd <- 02
|
| done.
|
| BS: BS_DEV_ENABLE times (us): entry 4 run 407 exit 3
|
| Initializing devices...
|
| Root Device init
|
| Located 'ethernet_mac' in VPD
|
| Realtek NIC io_base = 0x2000
|
| Programming MAC Address
|
| Root Device init 1258 usecs
|
| CPU_CLUSTER: 0 init
|
| CPU has 2 cores, 2 threads enabled.
|
| MTRR: Physical address space:
|
| 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
|
| 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
|
| 0x00000000000c0000 - 0x0000000080000000 size 0x7ff40000 type 6
|
| 0x0000000080000000 - 0x00000000d0000000 size 0x50000000 type 0
|
| 0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1
|
| 0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0
|
| 0x0000000100000000 - 0x000000017ce00000 size 0x7ce00000 type 6
|
| MTRR: Fixed MSR 0x250 0x0606060606060606
|
| MTRR: Fixed MSR 0x258 0x0606060606060606
|
| MTRR: Fixed MSR 0x259 0x0000000000000000
|
| MTRR: Fixed MSR 0x268 0x0606060606060606
|
| MTRR: Fixed MSR 0x269 0x0606060606060606
|
| MTRR: Fixed MSR 0x26a 0x0606060606060606
|
| MTRR: Fixed MSR 0x26b 0x0606060606060606
|
| MTRR: Fixed MSR 0x26c 0x0606060606060606
|
| MTRR: Fixed MSR 0x26d 0x0606060606060606
|
| MTRR: Fixed MSR 0x26e 0x0606060606060606
|
| MTRR: Fixed MSR 0x26f 0x0606060606060606
|
| MTRR: default type WB/UC MTRR counts: 4/3.
|
| MTRR: UC selected as default type.
|
| MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
|
| MTRR: 1 base 0x00000000d0000000 mask 0x0000007ff0000000 type 1
|
| MTRR: 2 base 0x0000000100000000 mask 0x0000007f00000000 type 6
|
|
|
| MTRR check
|
| Fixed MTRRs : Enabled
|
| Variable MTRRs: Enabled
|
|
|
| Initializing VR config.
|
| PCODE: 24MHz BLCK calibration response: 0
|
| PCODE: 24MHz BLCK calibration value: 0x85000000
|
| PCH Power: PCODE Levels 0x3f1c40c1 0x0044c288
|
| microcode: sig=0x40651 pf=0x40 revision=0x1c
|
| Setting up SMI for CPU
|
| Loading module at 00038000 with entry 00038000. filesize: 0x148 memsize: 0x148
|
| Processing 10 relocs. Offset value of 0x00038000
|
| SMM Module: stub loaded at 00038000. Will call 7f7ac8d0(7f7c86b8)
|
| Installing SMM handler to 0x7f800000
|
| Loading module at 7f810000 with entry 7f810305. filesize: 0x24b8 memsize: 0x64d8
|
| Processing 71 relocs. Offset value of 0x7f810000
|
| Loading module at 7f808000 with entry 7f808000. filesize: 0x148 memsize: 0x148
|
| Processing 10 relocs. Offset value of 0x7f808000
|
| SMM Module: placing jmp sequence at 7f807c00 rel16 0x03fd
|
| SMM Module: stub loaded at 7f808000. Will call 7f810305(00000000)
|
| Initializing Southbridge SMI...
|
| In relocation handler: cpu 0
|
| New SMBASE=0x7f800000 IEDBASE=0x7fc00000
|
| Writing SMRR. base = 0x7f800006, mask=0xff800800
|
| Relocation complete.
|
| CPU: Intel(R) Celeron(R) 2955U @ 1.40GHz.
|
| Loading module at 00030000 with entry 00030000. filesize: 0x138 memsize: 0x138
|
| Processing 16 relocs. Offset value of 0x00030000
|
| Attempting to start 1 APs
|
| Waiting for 10ms after sending INIT.
|
| Waiting for 1st SIPI to complete...done.
|
| Waiting for 2nd SIPI to complete...done.
|
| AP: slot 1 apic_id 2.
|
| In relocation handler: cpu 1
|
| New SMBASE=0x7f7ffc00 IEDBASE=0x7fc00000
|
| Writing SMRR. base = 0x7f800006, mask=0xff800800
|
| Relocation complete.
|
| Initializing CPU #0
|
| CPU: vendor Intel device 40651
|
| CPU: family 06, model 45, stepping 01
|
| Setting up local apic... apic_id: 0x00 done.
|
| VMX is locked, so enable_vmx will do nothing
|
| haswell: energy policy set to 6
|
| haswell: frequency set to 1400
|
| Turbo is unavailable
|
| CPU #0 initialized
|
| Initializing CPU #1
|
| CPU: vendor Intel device 40651
|
| CPU: family 06, model 45, stepping 01
|
| Setting up local apic... apic_id: 0x02 done.
|
| VMX is locked, so enable_vmx will do nothing
|
| haswell: energy policy set to 6
|
| haswell: frequency set to 1400
|
| CPU #1 initialized
|
| Enabling SMIs.
|
| Locking SMM.
|
| CPU_CLUSTER: 0 init 14154 usecs
|
| PCI: 00:00.0 init
|
| Set BIOS_RESET_CPL
|
| CPU TDP: 15 Watts
|
| PCI: 00:00.0 init 1014 usecs
|
| PCI: 00:02.0 init
|
| GT Power Management Init
|
| GT Power Management Init (post VBIOS)
|
| PCI: 00:02.0 init 133 usecs
|
| PCI: 00:03.0 init
|
| Mini-HD: base = e0710000
|
| HDA: Initializing codec #0
|
| HDA: codec viddid: 80862807
|
| HDA: verb loaded.
|
| PCI: 00:03.0 init 1361 usecs
|
| PCI: 00:14.0 init
|
| IOBP: set 0xe5004001 to 0x000000ce
|
| PCI: 00:14.0 init 1096 usecs
|
| PCI: 00:16.0 init
|
| ME: FW Partition Table : OK
|
| ME: Bringup Loader Failure : NO
|
| ME: Firmware Init Complete : NO
|
| ME: Manufacturing Mode : NO
|
| ME: Boot Options Present : NO
|
| ME: Update In Progress : NO
|
| ME: Current Working State : Normal
|
| ME: Current Operation State : M0 with UMA
|
| ME: Current Operation Mode : Normal
|
| ME: Error Code : No Error
|
| ME: Progress Phase : uKernel Phase
|
| ME: Power Management Event : Pseudo-global reset
|
| ME: Progress Phase State : Unknown phase: 0x02 sate: 0x00
|
| ME: BIOS path: Normal
|
| ME: Extend SHA-256: 4822ca12b90cdd73e39caab8cdba777ac831451069f18f0be9b0340e9ad356e3
|
| ME MBP: Header: items: 9, size dw: 37
|
| ME: found version 9.5.13.1706
|
| ME: Wake Event to ME Reset: 0 ms
|
| ME: ME Reset to Platform Reset: 7 ms
|
| ME: Platform Reset to CPU Reset: 43 ms
|
| ME: ICC SET CLOCK ENABLES 0x01220000
|
| PCI: 00:16.0 init 61 usecs
|
| PCI: 00:1b.0 init
|
| Azalia: base = e0714000
|
| Azalia: codec_mask = 01
|
| HDA: Initializing codec #0
|
| HDA: codec viddid: 10ec0283
|
| HDA: verb loaded.
|
| PCI: 00:1b.0 init 3316 usecs
|
| PCI: 00:1c.0 init
|
| Initializing PCH PCIe bridge.
|
| PCI: 00:1c.0 init 10 usecs
|
| PCI: 00:1c.1 init
|
| Initializing PCH PCIe bridge.
|
| PCI: 00:1c.1 init 10 usecs
|
| PCI: 00:1c.2 init
|
| Initializing PCH PCIe bridge.
|
| PCI: 00:1c.2 init 10 usecs
|
| PCI: 00:1d.0 init
|
| EHCI: Setting up controller.. IOBP: set 0xe5004001 to 0x000000ce
|
| done.
|
| PCI: 00:1d.0 init 36 usecs
|
| PCI: 00:1f.0 init
|
| pch: lpc_init
|
| IOAPIC: Initializing IOAPIC at 0xfec00000
|
| IOAPIC: Bootstrap Processor Local APIC = 0x00
|
| IOAPIC: ID = 0x02
|
| Set power state keep after power failure.
|
| NMI sources disabled.
|
| LynxPoint LP PM init
|
| IOBP: set 0xed00015c to 0x1bc33700
|
| IOBP: set 0xed000118 to 0x00c00000
|
| IOBP: set 0xed000120 to 0x00245560
|
| IOBP: set 0xca000000 to 0x00000009
|
| IOBP: set 0xcf000000 to 0x00007007
|
| IOBP: set 0xce00c000 to 0x00000000
|
| rtc_failed = 0x0
|
| RTC Init
|
| Disabling ACPI via APMC:
|
| done.
|
| PCI: 00:1f.0 init 363 usecs
|
| PCI: 00:1f.2 init
|
| SATA: Initializing...
|
| SATA: Controller in AHCI mode.
|
| ABAR: E0719000
|
| PCI: 00:1f.2 init 30 usecs
|
| PCI: 00:1f.3 init
|
| PCI: 00:1f.3 init 8 usecs
|
| PCI: 00:1f.6 init
|
| PCI: 00:1f.6 init 3 usecs
|
| PCI: 01:00.0 init
|
| PCI: 01:00.0 init 4 usecs
|
| PCI: 02:00.0 init
|
| PCI: 02:00.0 init 3 usecs
|
| PNP: 002e.1 init
|
| PNP: 002e.1 init 4 usecs
|
| PNP: 002e.4 init
|
| PNP: 002e.4 init 1061 usecs
|
| PNP: 002e.7 init
|
| PNP: 002e.7 init 3 usecs
|
| Devices initialized
|
| BS: BS_DEV_INIT times (us): entry 10 run 24022 exit 2
|
| Finalize devices...
|
| Devices finalized
|
| BS: BS_POST_DEVICE times (us): entry 2 run 5 exit 2
|
| BS: BS_OS_RESUME_CHECK times (us): entry 2 run 3 exit 2
|
| Updating MRC cache data.
|
| find_current_mrc_cache_local: picked entry 0 from cache block
|
| MRC data in flash is up to date. No update.
|
| ACPI: Writing ACPI tables at 7f714000.
|
| ACPI: * FACS
|
| ACPI: * DSDT
|
| ACPI: * FADT
|
| ACPI: added table 1/32, length now 40
|
| ACPI: * SSDT
|
| Found 1 CPU(s) with 2 core(s) each.
|
| PSS: 1400MHz power 15000 control 0xe00 status 0xe00
|
| PSS: 1200MHz power 12559 control 0xc00 status 0xc00
|
| PSS: 1000MHz power 10217 control 0xa00 status 0xa00
|
| PSS: 800MHz power 7982 control 0x800 status 0x800
|
| PSS: 1400MHz power 15000 control 0xe00 status 0xe00
|
| PSS: 1200MHz power 12559 control 0xc00 status 0xc00
|
| PSS: 1000MHz power 10217 control 0xa00 status 0xa00
|
| PSS: 800MHz power 7982 control 0x800 status 0x800
|
| ACPI: added table 2/32, length now 44
|
| ACPI: * MCFG
|
| ACPI: added table 3/32, length now 48
|
| ACPI: * MADT
|
| ACPI: added table 4/32, length now 52
|
| current = 7f718c80
|
| ACPI: * HPET
|
| ACPI: added table 5/32, length now 56
|
| ACPI: * SSDT2
|
| ACPI: added table 6/32, length now 60
|
| current = 7f718d20
|
| ACPI: done.
|
| ACPI tables: 19744 bytes.
|
| smbios_write_tables: 7f712000
|
| Root Device (Google Panther)
|
| CPU_CLUSTER: 0 (Intel i7 (Haswell) integrated Northbridge)
|
| APIC: 00 (Socket rPGA989 CPU)
|
| APIC: acac (Intel Haswell CPU)
|
| DOMAIN: 0000 (Intel i7 (Haswell) integrated Northbridge)
|
| PCI: 00:00.0 (Intel i7 (Haswell) integrated Northbridge)
|
| PCI: 00:02.0 (Intel i7 (Haswell) integrated Northbridge)
|
| PCI: 00:03.0 (Intel i7 (Haswell) integrated Northbridge)
|
| PCI: 00:13.0 (Intel Series 8 (Lynx Point) Southbridge)
|
| PCI: 00:14.0 (Intel Series 8 (Lynx Point) Southbridge)
|
| PCI: 00:15.0 (Intel Series 8 (Lynx Point) Southbridge)
|
| PCI: 00:15.1 (Intel Series 8 (Lynx Point) Southbridge)
|
| PCI: 00:15.2 (Intel Series 8 (Lynx Point) Southbridge)
|
| PCI: 00:15.3 (Intel Series 8 (Lynx Point) Southbridge)
|
| PCI: 00:15.4 (Intel Series 8 (Lynx Point) Southbridge)
|
| PCI: 00:15.5 (Intel Series 8 (Lynx Point) Southbridge)
|
| PCI: 00:15.6 (Intel Series 8 (Lynx Point) Southbridge)
|
| PCI: 00:16.0 (Intel Series 8 (Lynx Point) Southbridge)
|
| PCI: 00:16.1 (Intel Series 8 (Lynx Point) Southbridge)
|
| PCI: 00:16.2 (Intel Series 8 (Lynx Point) Southbridge)
|
| PCI: 00:16.3 (Intel Series 8 (Lynx Point) Southbridge)
|
| PCI: 00:17.0 (Intel Series 8 (Lynx Point) Southbridge)
|
| PCI: 00:19.0 (Intel Series 8 (Lynx Point) Southbridge)
|
| PCI: 00:1b.0 (Intel Series 8 (Lynx Point) Southbridge)
|
| PCI: 00:1c.3 (Intel Series 8 (Lynx Point) Southbridge)
|
| PCI: 00:1c.4 (Intel Series 8 (Lynx Point) Southbridge)
|
| PCI: 00:1c.0 (Intel Series 8 (Lynx Point) Southbridge)
|
| PCI: 00:1c.1 (Intel Series 8 (Lynx Point) Southbridge)
|
| PCI: 00:1c.2 (Intel Series 8 (Lynx Point) Southbridge)
|
| PCI: 00:1c.5 (Intel Series 8 (Lynx Point) Southbridge)
|
| PCI: 00:1d.0 (Intel Series 8 (Lynx Point) Southbridge)
|
| PCI: 00:1e.0 (Intel Series 8 (Lynx Point) Southbridge)
|
| PCI: 00:1f.0 (Intel Series 8 (Lynx Point) Southbridge)
|
| PNP: 002e.0 (ITE IT8772F Super I/O)
|
| PNP: 002e.1 (ITE IT8772F Super I/O)
|
| PNP: 002e.4 (ITE IT8772F Super I/O)
|
| PNP: 002e.7 (ITE IT8772F Super I/O)
|
| PNP: 002e.5 (ITE IT8772F Super I/O)
|
| PNP: 002e.6 (ITE IT8772F Super I/O)
|
| PNP: 002e.a (ITE IT8772F Super I/O)
|
| PCI: 00:1f.2 (Intel Series 8 (Lynx Point) Southbridge)
|
| PCI: 00:1f.3 (Intel Series 8 (Lynx Point) Southbridge)
|
| PCI: 00:1f.6 (Intel Series 8 (Lynx Point) Southbridge)
|
| PCI: 01:00.0 (unknown)
|
| PCI: 02:00.0 (unknown)
|
| APIC: 02 (unknown)
|
| SMBIOS tables: 330 bytes.
|
| Writing table forward entry at 0x00000500
|
| Wrote coreboot table at: 00000500, 0x10 bytes, checksum e06d
|
| Table forward entry ends at 0x00000528.
|
| ... aligned to 0x00001000
|
| Writing coreboot table at 0x7f70a000
|
| rom_table_end = 0x7f70a000
|
| ... aligned to 0x7f710000
|
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
|
| 1. 0000000000001000-000000000009ffff: RAM
|
| 2. 00000000000a0000-00000000000fffff: RESERVED
|
| 3. 0000000000100000-000000007f709fff: RAM
|
| 4. 000000007f70a000-000000007f7fffff: CONFIGURATION TABLES
|
| 5. 000000007f800000-00000000821fffff: RESERVED
|
| 6. 00000000f0000000-00000000f3ffffff: RESERVED
|
| 7. 00000000fed10000-00000000fed19fff: RESERVED
|
| 8. 00000000fed84000-00000000fed84fff: RESERVED
|
| 9. 0000000100000000-000000017cdfffff: RAM
|
| Wrote coreboot table at: 7f70a000, 0x1b8 bytes, checksum 87bd
|
| coreboot table: 464 bytes.
|
| CBMEM ROOT 0. 7f7ff000 00001000
|
| CAR GLOBALS 1. 7f7fe000 00001000
|
| CONSOLE 2. 7f7de000 00020000
|
| TIME STAMP 3. 7f7dd000 00001000
|
| MRC DATA 4. 7f7dc000 00001000
|
| ROMSTAGE 5. 7f7db000 00001000
|
| ROMSTG STCK 6. 7f7d6000 00005000
|
| RAMSTAGE 7. 7f790000 00046000
|
| RAMSTAGE $ 8. 7f74a000 00046000
|
| GDT 9. 7f749000 00001000
|
| ACPI GNVS 10. 7f748000 00001000
|
| SMM BACKUP 11. 7f738000 00010000
|
| ACPI 12. 7f714000 00024000
|
| GNVS PTR 13. 7f713000 00001000
|
| SMBIOS 14. 7f712000 00001000
|
| COREBOOT 15. 7f70a000 00008000
|
| BS: BS_WRITE_TABLES times (us): entry 4986 run 216 exit 2
|
| CBFS: located payload @ fff3f438, 46543 bytes.
|
| Loading segment from rom address 0xfff3f438
|
| code (compression=1)
|
| New segment dstaddr 0xea900 memsize 0x15700 srcaddr 0xfff3f470 filesize 0xb597
|
| Loading segment from rom address 0xfff3f454
|
| Entry Point 0x000fd3bc
|
| Payload being loaded below 1MiB without region being marked as RAM usable.
|
| Loading Segment: addr: 0x00000000000ea900 memsz: 0x0000000000015700 filesz: 0x000000000000b597
|
| Post relocation: addr: 0x00000000000ea900 memsz: 0x0000000000015700 filesz: 0x000000000000b597
|
| using LZMA
|
| dest 000ea900, end 00100000, bouncebuffer ffffffff
|
| BS: BS_PAYLOAD_LOAD times (us): entry 2 run 17650 exit 2
|
| PCH watchdog disabled
|
| Jumping to boot code at 000fd3bc
|
| SeaBIOS (version rel-1.7.5-161-g6f75635-20150129-MattDevo) |
| Found coreboot cbmem console @ 7f7de000 |
| Found mainboard Google Panther |
| malloc preinit |
| Relocating init from 0x000eb9e0 to 0x7f6c1550 (size 35312) |
| malloc init |
| Found CBFS header at 0xfffff848 |
| Add romfile: cmos_layout.bin (size=1164) |
| Add romfile: pci8086,0406.rom (size=65536) |
| Add romfile: cpu_microcode_blob.bin (size=43072) |
| Add romfile: config (size=5233) |
| Add romfile: revision (size=693) |
| Add romfile: etc/boot-menu-wait (size=8) |
| Add romfile: etc/boot-menu-key (size=1) |
| Add romfile: etc/boot-menu-message (size=27) |
| Add romfile: links (size=558) |
| Add romfile: (size=13912) |
| Add romfile: fallback/romstage (size=40433) |
| Add romfile: fallback/ramstage (size=87462) |
| Add romfile: fallback/payload (size=46543) |
| Add romfile: vpd.bin (size=16384) |
| Add romfile: (size=333080) |
| Add romfile: mrc.bin (size=191236) |
| Add romfile: (size=70744) |
| Add romfile: mrc.cache (size=65536) |
| Add romfile: (size=63512) |
| Copying data 558@0xfff1c6a8 to 558@0x7f6c0320 |
| Add romfile: pci8086,0402.rom (size=65536) |
| Add romfile: pci8086,0406.rom (size=65536) |
| Add romfile: pci8086,040a.rom (size=65536) |
| Add romfile: pci8086,0a06.rom (size=65536) |
| Add romfile: pci8086,0412.rom (size=65536) |
| Add romfile: pci8086,0416.rom (size=65536) |
| Add romfile: pci8086,041a.rom (size=65536) |
| Add romfile: pci8086,0a16.rom (size=65536) |
| Add romfile: pci8086,0422.rom (size=65536) |
| Add romfile: pci8086,0426.rom (size=65536) |
| Add romfile: pci8086,042a.rom (size=65536) |
| Add romfile: pci8086,0a26.rom (size=65536) |
| init ivt |
| init bda |
| init bios32 |
| init PMM |
| init PNPBIOS table |
| init keyboard |
| init pic |
| math cp init |
| CPU Mhz=1397 |
| init timer |
| PCI probe |
| Found 15 PCI devices (max PCI bus is 03) |
| Relocating coreboot bios tables |
| Copying SMBIOS entry point from 0x7f712000 to 0x000f43b0 |
| Copying ACPI RSDP from 0x7f714000 to 0x000f4380 |
| Using pmtimer, ioport 0x1008 |
| Scan for VGA option rom |
| Copying data 65536@0xfff004f8 to 65536@0x000c0000 |
| Running option rom at c000:0003 |
| Turning on vga text mode console |
| SeaBIOS (version rel-1.7.5-161-g6f75635-20150129-MattDevo) |
| init usb |
| XHCI init on dev 00:14.0: regs @ 0xe0700000, 13 ports, 32 slots, 32 byte contexts |
| XHCI protocol USB 2.00, 8 ports (offset 1), def 3018 |
| XHCI protocol USB 3.00, 4 ports (offset 10), def 1000 |
| XHCI extcap 0xc1 @ e0708040 |
| XHCI extcap 0xc0 @ e0708070 |
| XHCI extcap 0x1 @ e0708460 |
| XHCI extcap 0xa @ e0708480 |
| configure_xhci: resetting |
| configure_xhci: setup 16 scratch pad buffers |
| xhci_hub_reset port #2: 0x000206e1, powered, pls 7, speed 1 [Full] |
| XHCI port #2: 0x00200e03, powered, enabled, pls 0, speed 3 [High] |
| set_address 0x7f709fb0 |
| xhci_alloc_pipe: usbdev 0x7f6bf510, ring 0x7f709900, slotid 0, epid 1 |
| xhci_cmd_enable_slot: |
| xhci_process_events: status change port #2 |
| xhci_process_events: status change port #3 |
| xhci_process_events: status change port #4 |
| xhci_process_events: status change port #2 |
| xhci_alloc_pipe: enable slot: got slotid 1 |
| xhci_cmd_address_device: slotid 1 |
| xhci_realloc_pipe: usbdev 0x7f6bf510, ring 0x7f709900, slotid 1, epid 1 |
| config_usb: 0x7f709a20 |
| device rev=0200 cls=00 sub=00 proto=00 size=64 |
| xhci_realloc_pipe: usbdev 0x7f6bf510, ring 0x7f709900, slotid 1, epid 1 |
| xhci_alloc_pipe: usbdev 0x7f6bf510, ring 0x000ef600, slotid 0, epid 3 |
| xhci_cmd_configure_endpoint: slotid 1, add 0x9, del 0x0 |
| xhci_alloc_pipe: usbdev 0x7f6bf510, ring 0x000ef400, slotid 0, epid 4 |
| xhci_cmd_configure_endpoint: slotid 1, add 0x11, del 0x0 |
| Searching bootorder for: /pci@i0cf8/usb@14/storage@2/*@0/*@0,0 |
| Searching bootorder for: /pci@i0cf8/usb@14/usb-*@2 |
| USB MSC vendor='' product='Patriot Memory' rev='PMAP' type=0 removable=1 |
| USB MSC blksize=512 sectors=31277056 |
| Registering bootable: USB MSC Drive Patriot Memory PMAP (type:4 prio:103 data:f4350) |
| xhci_hub_reset port #3: 0x000206e1, powered, pls 7, speed 1 [Full] |
| XHCI port #3: 0x00200603, powered, enabled, pls 0, speed 1 [Full] |
| set_address 0x7f709fb0 |
| xhci_alloc_pipe: usbdev 0x7f6bf510, ring 0x7f709200, slotid 0, epid 1 |
| xhci_cmd_enable_slot: |
| xhci_process_events: status change port #3 |
| xhci_alloc_pipe: enable slot: got slotid 2 |
| xhci_cmd_address_device: slotid 2 |
| xhci_realloc_pipe: usbdev 0x7f6bf510, ring 0x7f709200, slotid 2, epid 1 |
| config_usb: 0x7f709320 |
| device rev=0200 cls=00 sub=00 proto=00 size=8 |
| xhci_realloc_pipe: usbdev 0x7f6bf510, ring 0x7f709200, slotid 2, epid 1 |
| usb_hid_setup 0x7f709320 |
| xhci_alloc_pipe: usbdev 0x7f6bf510, ring 0x000ef200, slotid 0, epid 3 |
| xhci_cmd_configure_endpoint: slotid 2, add 0x9, del 0x0 |
| USB keyboard initialized |
| xhci_hub_reset port #4: 0x000206e1, powered, pls 7, speed 1 [Full] |
| XHCI port #4: 0x00200603, powered, enabled, pls 0, speed 1 [Full] |
| set_address 0x7f709fb0 |
| xhci_alloc_pipe: usbdev 0x7f6bf510, ring 0x7f709000, slotid 0, epid 1 |
| xhci_cmd_enable_slot: |
| xhci_process_events: status change port #4 |
| xhci_alloc_pipe: enable slot: got slotid 3 |
| xhci_cmd_address_device: slotid 3 |
| xhci_realloc_pipe: usbdev 0x7f6bf510, ring 0x7f709000, slotid 3, epid 1 |
| config_usb: 0x7f709120 |
| device rev=0110 cls=e0 sub=01 proto=01 size=64 |
| xhci_realloc_pipe: usbdev 0x7f6bf510, ring 0x7f709000, slotid 3, epid 1 |
| xhci_realloc_pipe: reconf ctl endpoint pkt size: 8 -> 64 |
| xhci_cmd_evaluate_context: slotid 3, add 0x2, del 0x0 |
| init ahci |
| AHCI controller at 1f.2, iobase e0719000, irq 10 |
| AHCI: cap 0xdf34ff01, ports_impl 0x1 |
| AHCI/0: probing |
| AHCI/0: link up |
| AHCI/0: ... finished, status 0x51, ERROR 0x4 |
| Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0 |
| AHCI/0: registering: "AHCI/0: SanDisk SSD U110 16GB ATA-9 Hard-Disk (15272 MiBytes)" |
| Registering bootable: AHCI/0: SanDisk SSD U110 16GB ATA-9 Hard-Disk (15272 MiBytes) (type:2 prio:103 data:f42e0) |
| Scan for option roms |
| Copying data 27@0xfff1c638 to 27@0x7f6bf460 |
| Copying data 1@0xfff1c5f8 to 8@0x00006dc8 |
| |
| Press ESC for boot menu. |
| |
| Copying data 8@0xfff1c5b8 to 8@0x00006dc0 |
| Checking for bootsplash |
| Searching bootorder for: HALT |
| Mapping hd drive 0x000f42e0 to 0 |
| drive 0x000f42e0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=31277232 |
| Mapping hd drive 0x000f4350 to 1 |
| drive 0x000f4350: PCHS=0/0/0 translation=lba LCHS=1024/255/63 s=31277056 |
| finalize PMM |
| malloc finalize |
| Space available for UMB: d0000-ee800, f0000-f42e0 |
| Returned 188416 bytes of ZoneHigh |
| e820 map has 9 items: |
| 0: 0000000000000000 - 000000000009fc00 = 1 RAM |
| 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED |
| 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED |
| 3: 0000000000100000 - 000000007f6f8000 = 1 RAM |
| 4: 000000007f6f8000 - 0000000082200000 = 2 RESERVED |
| 5: 00000000f0000000 - 00000000f4000000 = 2 RESERVED |
| 6: 00000000fed10000 - 00000000fed1a000 = 2 RESERVED |
| 7: 00000000fed84000 - 00000000fed85000 = 2 RESERVED |
| 8: 0000000100000000 - 000000017ce00000 = 1 RAM |
| Jump to int19 |
| enter handle_19: |
| NULL |
| Booting from Hard Disk... |
| Booting from 0000:7c00 |
| |