| idth x8 single rank |
| CBMEM: |
| IMD: root @ bffff000 254 entries. |
| IMD: root @ bfffec00 62 entries. |
| CBMEM entry for DIMM info: 0xbfffe880 |
| POST: 0x3b |
| POST: 0x3c |
| POST: 0x3d |
| TPM initialization. |
| TPM: Init |
| Found TPM ST33ZP24 by ST Microelectronics |
| TPM: Open |
| TPM: Startup |
| TPM: command 0x99 returned 0x0 |
| TPM: OK. |
| POST: 0x3f |
| MTRR Range: Start=ff000000 End=0 (Size 1000000) |
| MTRR Range: Start=0 End=1000000 (Size 1000000) |
| MTRR Range: Start=bf800000 End=c0000000 (Size 800000) |
| MTRR Range: Start=c0000000 End=c0800000 (Size 800000) |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'fallback/ramstage' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Unmatched 'cmos_layout.bin' at 221c0 |
| CBFS: Checking offset 229c0 |
| CBFS: File @ offset 229c0 size 660 |
| CBFS: Unmatched 'payload_config' at 229c0 |
| CBFS: Checking offset 23080 |
| CBFS: File @ offset 23080 size ea |
| CBFS: Unmatched 'payload_revision' at 23080 |
| CBFS: Checking offset 231c0 |
| CBFS: File @ offset 231c0 size 8 |
| CBFS: Unmatched 'etc/ps2-keyboard-spinup' at 231c0 |
| CBFS: Checking offset 23200 |
| CBFS: File @ offset 23200 size f |
| CBFS: Unmatched 'bootorder' at 23200 |
| CBFS: Checking offset 23280 |
| CBFS: File @ offset 23280 size 8 |
| CBFS: Unmatched 'etc/show-boot-menu' at 23280 |
| CBFS: Checking offset 232c0 |
| CBFS: File @ offset 232c0 size 11f2 |
| CBFS: Unmatched 'grub.cfg' at 232c0 |
| CBFS: Checking offset 24500 |
| CBFS: File @ offset 24500 size 998 |
| CBFS: Unmatched '' at 24500 |
| CBFS: Checking offset 24ec0 |
| CBFS: File @ offset 24ec0 size 10000 |
| CBFS: Unmatched 'mrc.cache' at 24ec0 |
| CBFS: Checking offset 34f00 |
| CBFS: File @ offset 34f00 size 17b7e |
| CBFS: Found @ offset 34f00 size 17b7e |
| Decompressing stage fallback/ramstage @ 0xbff93fc0 (277520 bytes) |
| Loading module at bff94000 with entry bff94000. filesize: 0x32a30 memsize: 0x43bd0 |
| Processing 3154 relocs. Offset value of 0xbfe94000 |
| |
| |
| coreboot-4.5-1640-g7e438af995 Tue Apr 25 04:15:46 UTC 2017 ramstage starting... |
| POST: 0x39 |
| POST: 0x80 |
| Normal boot. |
| POST: 0x70 |
| BS: BS_PRE_DEVICE times (us): entry 0 run 2 exit 0 |
| POST: 0x71 |
| BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 3 exit 0 |
| POST: 0x72 |
| Enumerating buses... |
| Show all devs... Before device enumeration. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 0 |
| PCI: 00:1c.4: enabled 0 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 00ff.1: enabled 1 |
| PNP: 0c31.0: enabled 1 |
| PNP: 00ff.2: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| I2C: 00:54: enabled 1 |
| I2C: 00:55: enabled 1 |
| I2C: 00:56: enabled 1 |
| I2C: 00:57: enabled 1 |
| I2C: 00:5c: enabled 1 |
| I2C: 00:5d: enabled 1 |
| I2C: 00:5e: enabled 1 |
| I2C: 00:5f: enabled 1 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 1 |
| Compare with tree... |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 0 |
| PCI: 00:1c.4: enabled 0 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 00ff.1: enabled 1 |
| PNP: 0c31.0: enabled 1 |
| PNP: 00ff.2: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| I2C: 00:54: enabled 1 |
| I2C: 00:55: enabled 1 |
| I2C: 00:56: enabled 1 |
| I2C: 00:57: enabled 1 |
| I2C: 00:5c: enabled 1 |
| I2C: 00:5d: enabled 1 |
| I2C: 00:5e: enabled 1 |
| I2C: 00:5f: enabled 1 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 1 |
| Root Device scanning... |
| root_dev_scan_bus for Root Device |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| DOMAIN: 0000 scanning... |
| PCI: pci_scan_bus for bus 00 |
| POST: 0x24 |
| PCI: 00:00.0 [8086/0154] ops |
| PCI: 00:00.0 [8086/0154] enabled |
| Capability: type 0x0d @ 0x88 |
| Capability: type 0x01 @ 0x80 |
| Capability: type 0x05 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| Capability: type 0x0d @ 0x88 |
| Capability: type 0x01 @ 0x80 |
| Capability: type 0x05 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| PCI: 00:01.0 subordinate bus PCI Express |
| PCI: 00:01.0 [8086/0151] disabled |
| PCI: 00:02.0 [8086/0000] ops |
| PCI: 00:02.0 [8086/0166] enabled |
| memalign Enter, boundary 8, size 152, free_mem_ptr bffd3bd0 |
| memalign bffd3bd0 |
| PCI: 00:04.0 [8086/0153] enabled |
| PCI: 00:14.0 [8086/0000] ops |
| PCI: 00:14.0 [8086/1e31] enabled |
| PCI: 00:16.0 [8086/1e3a] ops |
| PCI: 00:16.0 [8086/1e3a] enabled |
| PCI: 00:16.1: Disabling device |
| PCI: 00:16.2: Disabling device |
| PCI: 00:16.3: Disabling device |
| PCI: 00:19.0 [8086/1502] enabled |
| PCI: 00:1a.0 [8086/0000] ops |
| PCI: 00:1a.0 [8086/1e2d] enabled |
| PCI: 00:1b.0 [8086/0000] ops |
| PCI: 00:1b.0 [8086/1e20] enabled |
| PCH: PCIe Root Port coalescing is enabled |
| PCI: 00:1c.0 [8086/0000] bus ops |
| PCI: 00:1c.0 [8086/1e10] enabled |
| PCI: 00:1c.1 [8086/0000] bus ops |
| PCI: 00:1c.1 [8086/1e12] enabled |
| PCI: 00:1c.2 [8086/0000] bus ops |
| PCI: 00:1c.2 [8086/1e14] enabled |
| PCI: 00:1c.3: Disabling device |
| PCI: 00:1c.4: Disabling device |
| PCI: 00:1c.4: check set enabled |
| PCI: 00:1c.5: Disabling device |
| PCI: 00:1c.6: Disabling device |
| PCI: 00:1c.7: Disabling device |
| PCH: RPFN 0x76543210 -> 0xfedcb210 |
| PCI: 00:1d.0 [8086/0000] ops |
| PCI: 00:1d.0 [8086/1e26] enabled |
| PCI: 00:1e.0: Disabling device |
| PCI: 00:1f.0 [8086/0000] bus ops |
| PCI: 00:1f.0 [8086/1e55] enabled |
| PCI: 00:1f.2 [8086/0000] ops |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Found @ offset 221c0 size 7a0 |
| PCI: 00:1f.2 [8086/1e01] enabled |
| PCI: 00:1f.3 [8086/0000] bus ops |
| PCI: 00:1f.3 [8086/1e22] enabled |
| PCI: 00:1f.5: Disabling device |
| PCI: Static device PCI: 00:1f.6 not found, disabling it. |
| POST: 0x25 |
| PCI: 00:1c.0 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.0 |
| PCI: pci_scan_bus for bus 01 |
| POST: 0x24 |
| PCI: 01:00.0 [1180/0000] ops |
| PCI: 01:00.0 [1180/e822] enabled |
| POST: 0x25 |
| POST: 0x55 |
| Capability: type 0x05 @ 0x50 |
| Capability: type 0x01 @ 0x78 |
| Capability: type 0x10 @ 0x80 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| scan_bus: scanning of bus PCI: 00:1c.0 took 223 usecs |
| PCI: 00:1c.1 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.1 |
| memalign Enter, boundary 8, size 36, free_mem_ptr bffd3c68 |
| memalign bffd3c68 |
| PCI: pci_scan_bus for bus 02 |
| POST: 0x24 |
| memalign Enter, boundary 8, size 152, free_mem_ptr bffd3c8c |
| memalign bffd3c90 |
| PCI: 02:00.0 [168c/0030] enabled |
| POST: 0x25 |
| POST: 0x55 |
| Capability: type 0x01 @ 0x40 |
| Capability: type 0x05 @ 0x50 |
| Capability: type 0x10 @ 0x70 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpointASPM: Enabled L0s and L1 |
| scan_bus: scanning of bus PCI: 00:1c.1 took 210 usecs |
| PCI: 00:1c.2 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.2 |
| memalign Enter, boundary 8, size 36, free_mem_ptr bffd3d28 |
| memalign bffd3d28 |
| PCI: pci_scan_bus for bus 03 |
| POST: 0x24 |
| POST: 0x25 |
| POST: 0x55 |
| memalign Enter, boundary 8, size 152, free_mem_ptr bffd3d4c |
| memalign bffd3d50 |
| scan_bus: scanning of bus PCI: 00:1c.2 took 52 usecs |
| PCI: 00:1f.0 scanning... |
| scan_lpc_bus for PCI: 00:1f.0 |
| memalign Enter, boundary 8, size 2560, free_mem_ptr bffd3de8 |
| memalign bffd3de8 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Found @ offset 221c0 size 7a0 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Found @ offset 221c0 size 7a0 |
| PNP: 00ff.1 enabled |
| PNP: 0c31.0 enabled |
| recv_ec_data: 0x47 |
| recv_ec_data: 0x32 |
| recv_ec_data: 0x48 |
| recv_ec_data: 0x54 |
| recv_ec_data: 0x33 |
| recv_ec_data: 0x35 |
| recv_ec_data: 0x57 |
| recv_ec_data: 0x57 |
| recv_ec_data: 0x16 |
| recv_ec_data: 0x03 |
| recv_ec_data: 0x40 |
| recv_ec_data: 0x11 |
| EC Firmware ID G2HT35WW-3.22, Version 4.01B |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Found @ offset 221c0 size 7a0 |
| recv_ec_data: 0x00 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Found @ offset 221c0 size 7a0 |
| recv_ec_data: 0x70 |
| recv_ec_data: 0x90 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Found @ offset 221c0 size 7a0 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Found @ offset 221c0 size 7a0 |
| recv_ec_data: 0x70 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Found @ offset 221c0 size 7a0 |
| recv_ec_data: 0x70 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Found @ offset 221c0 size 7a0 |
| recv_ec_data: 0x00 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Found @ offset 221c0 size 7a0 |
| recv_ec_data: 0xa6 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Found @ offset 221c0 size 7a0 |
| recv_ec_data: 0xa6 |
| recv_ec_data: 0x70 |
| PNP: 00ff.2 enabled |
| scan_lpc_bus for PCI: 00:1f.0 done |
| scan_bus: scanning of bus PCI: 00:1f.0 took 4756 usecs |
| PCI: 00:1f.3 scanning... |
| scan_generic_bus for PCI: 00:1f.3 |
| bus: PCI: 00:1f.3[0]->I2C: 01:54 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled |
| scan_generic_bus for PCI: 00:1f.3 done |
| scan_bus: scanning of bus PCI: 00:1f.3 took 19 usecs |
| POST: 0x55 |
| scan_bus: scanning of bus DOMAIN: 0000 took 5661 usecs |
| root_dev_scan_bus for Root Device done |
| scan_bus: scanning of bus Root Device took 5668 usecs |
| done |
| BS: BS_DEV_ENUMERATE times (us): entry 0 run 5770 exit 0 |
| POST: 0x73 |
| found VGA at PCI: 00:02.0 |
| Setting up VGA for PCI: 00:02.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| Allocating resources... |
| Reading resources... |
| Root Device read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 |
| Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000. |
| PCI: 00:1a.0 EHCI BAR hook registered |
| PCI: 00:1c.0 read_resources bus 1 link: 0 |
| PCI: 00:1c.0 read_resources bus 1 link: 0 done |
| PCI: 00:1c.1 read_resources bus 2 link: 0 |
| PCI: 00:1c.1 read_resources bus 2 link: 0 done |
| PCI: 00:1c.2 read_resources bus 3 link: 0 |
| PCI: 00:1c.2 read_resources bus 3 link: 0 done |
| More than one caller of pci_ehci_read_resources from PCI: 00:1d.0 |
| PCI: 00:1f.0 read_resources bus 0 link: 0 |
| PNP: 00ff.1 missing read_resources |
| PNP: 00ff.2 missing read_resources |
| PCI: 00:1f.0 read_resources bus 0 link: 0 done |
| PCI: 00:1f.3 read_resources bus 1 link: 0 |
| PCI: 00:1f.3 read_resources bus 1 link: 0 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 done |
| Root Device read_resources bus 0 link: 0 done |
| Done reading resources. |
| Show resources in subtree (Root Device)...After reading. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: acac |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 |
| PCI: 00:00.0 |
| PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 |
| PCI: 00:01.0 |
| PCI: 00:02.0 |
| PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18 |
| PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20 |
| PCI: 00:04.0 |
| PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:14.0 |
| PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:16.0 |
| PCI: 00:16.0 resource base 0 size 10 align 12 gran 4 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:19.0 |
| PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 |
| PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 |
| PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 |
| PCI: 00:1a.0 |
| PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:1c.0 child on link 0 PCI: 01:00.0 |
| PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 01:00.0 |
| PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| PCI: 00:1c.1 child on link 0 PCI: 02:00.0 |
| PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 02:00.0 |
| PCI: 02:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10 |
| PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30 |
| PCI: 00:1c.2Unknown device path type: 0 |
| child on link 0 |
| PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| Unknown device path type: 0 |
| |
| Unknown device path type: 0 |
| resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10 |
| Unknown device path type: 0 |
| resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14 |
| Unknown device path type: 0 |
| resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18 |
| PCI: 00:1c.3 |
| PCI: 00:1c.4 |
| PCI: 00:1c.5 |
| PCI: 00:1c.6 |
| PCI: 00:1c.7 |
| PCI: 00:1d.0 |
| PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| PCI: 00:1e.0 |
| PCI: 00:1f.0 child on link 0 PNP: 00ff.1 |
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200 |
| PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300 |
| PNP: 00ff.1 |
| PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 |
| PNP: 0c31.0 |
| PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0 |
| PNP: 00ff.2 |
| PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 |
| PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 |
| PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 |
| PCI: 00:1f.2 |
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 |
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 |
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 |
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c |
| PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 |
| PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24 |
| PCI: 00:1f.3 child on link 0 I2C: 01:54 |
| PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 |
| PCI: 00:1f.3 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10 |
| I2C: 01:54 |
| I2C: 01:55 |
| I2C: 01:56 |
| I2C: 01:57 |
| I2C: 01:5c |
| I2C: 01:5d |
| I2C: 01:5e |
| I2C: 01:5f |
| PCI: 00:1f.5 |
| PCI: 00:1f.6 |
| DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff |
| PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| Unknown device path type: 0 |
| 18 * [0x0 - 0xfff] io |
| PCI: 00:1c.2 io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.2 1c * [0x0 - 0xfff] io |
| PCI: 00:02.0 20 * [0x1000 - 0x103f] io |
| PCI: 00:19.0 18 * [0x1040 - 0x105f] io |
| PCI: 00:1f.2 20 * [0x1060 - 0x107f] io |
| PCI: 00:1f.2 10 * [0x1080 - 0x1087] io |
| PCI: 00:1f.2 18 * [0x1088 - 0x108f] io |
| PCI: 00:1f.2 14 * [0x1090 - 0x1093] io |
| PCI: 00:1f.2 1c * [0x1094 - 0x1097] io |
| DOMAIN: 0000 io: base: 1098 size: 1098 align: 12 gran: 0 limit: ffff done |
| DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff |
| PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 01:00.0 10 * [0x0 - 0xff] mem |
| PCI: 00:1c.0 mem: base: 100 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 02:00.0 10 * [0x0 - 0x1ffff] mem |
| PCI: 02:00.0 30 * [0x20000 - 0x2ffff] mem |
| PCI: 00:1c.1 mem: base: 30000 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| Unknown device path type: 0 |
| 14 * [0x0 - 0x7fffff] prefmem |
| PCI: 00:1c.2 prefmem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done |
| PCI: 00:1c.2 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| Unknown device path type: 0 |
| 10 * [0x0 - 0x7fffff] mem |
| PCI: 00:1c.2 mem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done |
| PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem |
| PCI: 00:1c.2 24 * [0x10000000 - 0x107fffff] prefmem |
| PCI: 00:1c.2 20 * [0x10800000 - 0x10ffffff] mem |
| PCI: 00:02.0 10 * [0x11000000 - 0x113fffff] mem |
| PCI: 00:1c.0 20 * [0x11400000 - 0x114fffff] mem |
| PCI: 00:1c.1 20 * [0x11500000 - 0x115fffff] mem |
| PCI: 00:19.0 10 * [0x11600000 - 0x1161ffff] mem |
| PCI: 00:14.0 10 * [0x11620000 - 0x1162ffff] mem |
| PCI: 00:04.0 10 * [0x11630000 - 0x11637fff] mem |
| PCI: 00:1b.0 10 * [0x11638000 - 0x1163bfff] mem |
| PCI: 00:19.0 14 * [0x1163c000 - 0x1163cfff] mem |
| PCI: 00:1f.2 24 * [0x1163d000 - 0x1163d7ff] mem |
| PCI: 00:1a.0 10 * [0x1163e000 - 0x1163e3ff] mem |
| PCI: 00:1d.0 10 * [0x1163f000 - 0x1163f3ff] mem |
| PCI: 00:1f.3 10 * [0x11640000 - 0x116400ff] mem |
| PCI: 00:16.0 10 * [0x11641000 - 0x1164100f] mem |
| DOMAIN: 0000 mem: base: 11641010 size: 11641010 align: 28 gran: 0 limit: ffffffff done |
| avoid_fixed_resources: DOMAIN: 0000 |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff |
| constrain_resources: PCI: 00:00.0 60 base f8000000 limit fbffffff mem (fixed) |
| constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed) |
| constrain_resources: PCI: 00:1f.0 10000200 base 00001600 limit 0000167b io (fixed) |
| skipping PNP: 00ff.2@60 fixed resource, size=0! |
| skipping PNP: 00ff.2@62 fixed resource, size=0! |
| skipping PNP: 00ff.2@64 fixed resource, size=0! |
| skipping PNP: 00ff.2@66 fixed resource, size=0! |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 base 0000167c limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 base e0000000 limit f7ffffff |
| Setting resources... |
| DOMAIN: 0000 io: base:167c size:1098 align:12 gran:0 limit:ffff |
| PCI: 00:1c.2 1c * [0x2000 - 0x2fff] io |
| PCI: 00:02.0 20 * [0x3000 - 0x303f] io |
| PCI: 00:19.0 18 * [0x3040 - 0x305f] io |
| PCI: 00:1f.2 20 * [0x3060 - 0x307f] io |
| PCI: 00:1f.2 10 * [0x3080 - 0x3087] io |
| PCI: 00:1f.2 18 * [0x3088 - 0x308f] io |
| PCI: 00:1f.2 14 * [0x3090 - 0x3093] io |
| PCI: 00:1f.2 1c * [0x3094 - 0x3097] io |
| DOMAIN: 0000 io: next_base: 3098 size: 1098 align: 12 gran: 0 done |
| PCI: 00:1c.0 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:1c.0 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| PCI: 00:1c.1 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:1c.1 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| PCI: 00:1c.2 io: base:2000 size:1000 align:12 gran:12 limit:2fff |
| Unknown device path type: 0 |
| 18 * [0x2000 - 0x2fff] io |
| PCI: 00:1c.2 io: next_base: 3000 size: 1000 align: 12 gran: 12 done |
| DOMAIN: 0000 mem: base:e0000000 size:11641010 align:28 gran:0 limit:f7ffffff |
| PCI: 00:02.0 18 * [0xe0000000 - 0xefffffff] prefmem |
| PCI: 00:1c.2 24 * [0xf0000000 - 0xf07fffff] prefmem |
| PCI: 00:1c.2 20 * [0xf0800000 - 0xf0ffffff] mem |
| PCI: 00:02.0 10 * [0xf1000000 - 0xf13fffff] mem |
| PCI: 00:1c.0 20 * [0xf1400000 - 0xf14fffff] mem |
| PCI: 00:1c.1 20 * [0xf1500000 - 0xf15fffff] mem |
| PCI: 00:19.0 10 * [0xf1600000 - 0xf161ffff] mem |
| PCI: 00:14.0 10 * [0xf1620000 - 0xf162ffff] mem |
| PCI: 00:04.0 10 * [0xf1630000 - 0xf1637fff] mem |
| PCI: 00:1b.0 10 * [0xf1638000 - 0xf163bfff] mem |
| PCI: 00:19.0 14 * [0xf163c000 - 0xf163cfff] mem |
| PCI: 00:1f.2 24 * [0xf163d000 - 0xf163d7ff] mem |
| PCI: 00:1a.0 10 * [0xf163e000 - 0xf163e3ff] mem |
| PCI: 00:1d.0 10 * [0xf163f000 - 0xf163f3ff] mem |
| PCI: 00:1f.3 10 * [0xf1640000 - 0xf16400ff] mem |
| PCI: 00:16.0 10 * [0xf1641000 - 0xf164100f] mem |
| DOMAIN: 0000 mem: next_base: f1641010 size: 11641010 align: 28 gran: 0 done |
| PCI: 00:1c.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:1c.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.0 mem: base:f1400000 size:100000 align:20 gran:20 limit:f14fffff |
| PCI: 01:00.0 10 * [0xf1400000 - 0xf14000ff] mem |
| PCI: 00:1c.0 mem: next_base: f1400100 size: 100000 align: 20 gran: 20 done |
| PCI: 00:1c.1 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:1c.1 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.1 mem: base:f1500000 size:100000 align:20 gran:20 limit:f15fffff |
| PCI: 02:00.0 10 * [0xf1500000 - 0xf151ffff] mem |
| PCI: 02:00.0 30 * [0xf1520000 - 0xf152ffff] mem |
| PCI: 00:1c.1 mem: next_base: f1530000 size: 100000 align: 20 gran: 20 done |
| PCI: 00:1c.2 prefmem: base:f0000000 size:800000 align:22 gran:20 limit:f07fffff |
| Unknown device path type: 0 |
| 14 * [0xf0000000 - 0xf07fffff] prefmem |
| PCI: 00:1c.2 prefmem: next_base: f0800000 size: 800000 align: 22 gran: 20 done |
| PCI: 00:1c.2 mem: base:f0800000 size:800000 align:22 gran:20 limit:f0ffffff |
| Unknown device path type: 0 |
| 10 * [0xf0800000 - 0xf0ffffff] mem |
| PCI: 00:1c.2 mem: next_base: f1000000 size: 800000 align: 22 gran: 20 done |
| Root Device assign_resources, bus 0 link: 0 |
| TOUUD 0x42f600000 TOLUD 0xcea00000 TOM 0x400000000 |
| MEBASE 0x3fe000000 |
| IGD decoded, subtracting 224M UMA and 2M GTT |
| TSEG base 0xc0000000 size 8M |
| Available memory below 4GB: 3072M |
| Available memory above 4GB: 13046M |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| PCI: 00:02.0 10 <- [0x00f1000000 - 0x00f13fffff] size 0x00400000 gran 0x16 mem64 |
| PCI: 00:02.0 18 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem64 |
| PCI: 00:02.0 20 <- [0x0000003000 - 0x000000303f] size 0x00000040 gran 0x06 io |
| PCI: 00:04.0 10 <- [0x00f1630000 - 0x00f1637fff] size 0x00008000 gran 0x0f mem64 |
| PCI: 00:14.0 10 <- [0x00f1620000 - 0x00f162ffff] size 0x00010000 gran 0x10 mem64 |
| PCI: 00:16.0 10 <- [0x00f1641000 - 0x00f164100f] size 0x00000010 gran 0x04 mem64 |
| PCI: 00:19.0 10 <- [0x00f1600000 - 0x00f161ffff] size 0x00020000 gran 0x11 mem |
| PCI: 00:19.0 14 <- [0x00f163c000 - 0x00f163cfff] size 0x00001000 gran 0x0c mem |
| PCI: 00:19.0 18 <- [0x0000003040 - 0x000000305f] size 0x00000020 gran 0x05 io |
| PCI: 00:1a.0 EHCI Debug Port hook triggered |
| PCI: 00:1a.0 10 <- [0x00f163e000 - 0x00f163e3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1a.0 10 <- [0x00f163e000 - 0x00f163e3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1a.0 EHCI Debug Port relocated |
| PCI: 00:1b.0 10 <- [0x00f1638000 - 0x00f163bfff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io |
| PCI: 00:1c.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 prefmem |
| PCI: 00:1c.0 20 <- [0x00f1400000 - 0x00f14fffff] size 0x00100000 gran 0x14 bus 01 mem |
| PCI: 00:1c.0 assign_resources, bus 1 link: 0 |
| PCI: 01:00.0 10 <- [0x00f1400000 - 0x00f14000ff] size 0x00000100 gran 0x08 mem |
| PCI: 00:1c.0 assign_resources, bus 1 link: 0 |
| PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io |
| PCI: 00:1c.1 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem |
| PCI: 00:1c.1 20 <- [0x00f1500000 - 0x00f15fffff] size 0x00100000 gran 0x14 bus 02 mem |
| PCI: 00:1c.1 assign_resources, bus 2 link: 0 |
| PCI: 02:00.0 10 <- [0x00f1500000 - 0x00f151ffff] size 0x00020000 gran 0x11 mem64 |
| PCI: 02:00.0 30 <- [0x00f1520000 - 0x00f152ffff] size 0x00010000 gran 0x10 romem |
| PCI: 00:1c.1 assign_resources, bus 2 link: 0 |
| PCI: 00:1c.2 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 03 io |
| PCI: 00:1c.2 24 <- [0x00f0000000 - 0x00f07fffff] size 0x00800000 gran 0x14 bus 03 prefmem |
| PCI: 00:1c.2 20 <- [0x00f0800000 - 0x00f0ffffff] size 0x00800000 gran 0x14 bus 03 mem |
| PCI: 00:1c.2 assign_resources, bus 3 link: 0 |
| Unknown device path type: 0 |
| missing set_resources |
| PCI: 00:1c.2 assign_resources, bus 3 link: 0 |
| PCI: 00:1d.0 10 <- [0x00f163f000 - 0x00f163f3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1f.0 assign_resources, bus 0 link: 0 |
| PNP: 00ff.1 missing set_resources |
| PNP: 00ff.2 missing set_resources |
| PCI: 00:1f.0 assign_resources, bus 0 link: 0 |
| PCI: 00:1f.2 10 <- [0x0000003080 - 0x0000003087] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 14 <- [0x0000003090 - 0x0000003093] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 18 <- [0x0000003088 - 0x000000308f] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 1c <- [0x0000003094 - 0x0000003097] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 20 <- [0x0000003060 - 0x000000307f] size 0x00000020 gran 0x05 io |
| PCI: 00:1f.2 24 <- [0x00f163d000 - 0x00f163d7ff] size 0x00000800 gran 0x0b mem |
| PCI: 00:1f.3 10 <- [0x00f1640000 - 0x00f16400ff] size 0x00000100 gran 0x08 mem64 |
| PCI: 00:1f.3 assign_resources, bus 1 link: 0 |
| PCI: 00:1f.3 assign_resources, bus 1 link: 0 |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| Root Device assign_resources, bus 0 link: 0 |
| Done setting resources. |
| Show resources in subtree (Root Device)...After assigning values. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: acac |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 167c size 1098 align 12 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base e0000000 size 11641010 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100 |
| DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 |
| DOMAIN: 0000 resource base 100000 size bff00000 align 0 gran 0 limit 0 flags e0004200 index 4 |
| DOMAIN: 0000 resource base 100000000 size 32f600000 align 0 gran 0 limit 0 flags e0004200 index 5 |
| DOMAIN: 0000 resource base c0000000 size ea00000 align 0 gran 0 limit 0 flags f0000200 index 6 |
| DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7 |
| DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8 |
| DOMAIN: 0000 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9 |
| DOMAIN: 0000 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a |
| PCI: 00:00.0 |
| PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 |
| PCI: 00:01.0 |
| PCI: 00:02.0 |
| PCI: 00:02.0 resource base f1000000 size 400000 align 22 gran 22 limit f13fffff flags 60000201 index 10 |
| PCI: 00:02.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001201 index 18 |
| PCI: 00:02.0 resource base 3000 size 40 align 6 gran 6 limit 303f flags 60000100 index 20 |
| PCI: 00:04.0 |
| PCI: 00:04.0 resource base f1630000 size 8000 align 15 gran 15 limit f1637fff flags 60000201 index 10 |
| PCI: 00:14.0 |
| PCI: 00:14.0 resource base f1620000 size 10000 align 16 gran 16 limit f162ffff flags 60000201 index 10 |
| PCI: 00:16.0 |
| PCI: 00:16.0 resource base f1641000 size 10 align 12 gran 4 limit f164100f flags 60000201 index 10 |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:19.0 |
| PCI: 00:19.0 resource base f1600000 size 20000 align 17 gran 17 limit f161ffff flags 60000200 index 10 |
| PCI: 00:19.0 resource base f163c000 size 1000 align 12 gran 12 limit f163cfff flags 60000200 index 14 |
| PCI: 00:19.0 resource base 3040 size 20 align 5 gran 5 limit 305f flags 60000100 index 18 |
| PCI: 00:1a.0 |
| PCI: 00:1a.0 resource base f163e000 size 400 align 12 gran 10 limit f163e3ff flags 60000200 index 10 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base f1638000 size 4000 align 14 gran 14 limit f163bfff flags 60000201 index 10 |
| PCI: 00:1c.0 child on link 0 PCI: 01:00.0 |
| PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:1c.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 |
| PCI: 00:1c.0 resource base f1400000 size 100000 align 20 gran 20 limit f14fffff flags 60080202 index 20 |
| PCI: 01:00.0 |
| PCI: 01:00.0 resource base f1400000 size 100 align 12 gran 8 limit f14000ff flags 60000200 index 10 |
| PCI: 00:1c.1 child on link 0 PCI: 02:00.0 |
| PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:1c.1 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 |
| PCI: 00:1c.1 resource base f1500000 size 100000 align 20 gran 20 limit f15fffff flags 60080202 index 20 |
| PCI: 02:00.0 |
| PCI: 02:00.0 resource base f1500000 size 20000 align 17 gran 17 limit f151ffff flags 60000201 index 10 |
| PCI: 02:00.0 resource base f1520000 size 10000 align 16 gran 16 limit f152ffff flags 60002200 index 30 |
| PCI: 00:1c.2Unknown device path type: 0 |
| child on link 0 |
| PCI: 00:1c.2 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c |
| PCI: 00:1c.2 resource base f0000000 size 800000 align 22 gran 20 limit f07fffff flags 60081202 index 24 |
| PCI: 00:1c.2 resource base f0800000 size 800000 align 22 gran 20 limit f0ffffff flags 60080202 index 20 |
| Unknown device path type: 0 |
| |
| Unknown device path type: 0 |
| resource base f0800000 size 800000 align 22 gran 22 limit f0ffffff flags 40000200 index 10 |
| Unknown device path type: 0 |
| resource base f0000000 size 800000 align 22 gran 22 limit f07fffff flags 40001200 index 14 |
| Unknown device path type: 0 |
| resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 40000100 index 18 |
| PCI: 00:1c.3 |
| PCI: 00:1c.4 |
| PCI: 00:1c.5 |
| PCI: 00:1c.6 |
| PCI: 00:1c.7 |
| PCI: 00:1d.0 |
| PCI: 00:1d.0 resource base f163f000 size 400 align 12 gran 10 limit f163f3ff flags 60000200 index 10 |
| PCI: 00:1e.0 |
| PCI: 00:1f.0 child on link 0 PNP: 00ff.1 |
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200 |
| PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300 |
| PNP: 00ff.1 |
| PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 |
| PNP: 0c31.0 |
| PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0 |
| PNP: 00ff.2 |
| PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 |
| PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 |
| PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 |
| PCI: 00:1f.2 |
| PCI: 00:1f.2 resource base 3080 size 8 align 3 gran 3 limit 3087 flags 60000100 index 10 |
| PCI: 00:1f.2 resource base 3090 size 4 align 2 gran 2 limit 3093 flags 60000100 index 14 |
| PCI: 00:1f.2 resource base 3088 size 8 align 3 gran 3 limit 308f flags 60000100 index 18 |
| PCI: 00:1f.2 resource base 3094 size 4 align 2 gran 2 limit 3097 flags 60000100 index 1c |
| PCI: 00:1f.2 resource base 3060 size 20 align 5 gran 5 limit 307f flags 60000100 index 20 |
| PCI: 00:1f.2 resource base f163d000 size 800 align 12 gran 11 limit f163d7ff flags 60000200 index 24 |
| PCI: 00:1f.3 child on link 0 I2C: 01:54 |
| PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 |
| PCI: 00:1f.3 resource base f1640000 size 100 align 12 gran 8 limit f16400ff flags 60000201 index 10 |
| I2C: 01:54 |
| I2C: 01:55 |
| I2C: 01:56 |
| I2C: 01:57 |
| I2C: 01:5c |
| I2C: 01:5d |
| I2C: 01:5e |
| I2C: 01:5f |
| PCI: 00:1f.5 |
| PCI: 00:1f.6 |
| Done allocating resources. |
| BS: BS_DEV_RESOURCES times (us): entry 0 run 2252 exit 0 |
| POST: 0x74 |
| Enabling resources... |
| PCI: 00:00.0 subsystem <- 17aa/21fa |
| PCI: 00:00.0 cmd <- 06 |
| PCI: 00:02.0 subsystem <- 17aa/21fa |
| PCI: 00:02.0 cmd <- 03 |
| PCI: 00:04.0 cmd <- 02 |
| PCI: 00:14.0 subsystem <- 17aa/21fa |
| PCI: 00:14.0 cmd <- 102 |
| PCI: 00:16.0 subsystem <- 17aa/21fa |
| PCI: 00:16.0 cmd <- 02 |
| PCI: 00:19.0 subsystem <- 17aa/21f3 |
| PCI: 00:19.0 cmd <- 103 |
| PCI: 00:1a.0 subsystem <- 17aa/21fa |
| PCI: 00:1a.0 cmd <- 102 |
| PCI: 00:1b.0 subsystem <- 17aa/21fa |
| PCI: 00:1b.0 cmd <- 102 |
| PCI: 00:1c.0 bridge ctrl <- 0003 |
| PCI: 00:1c.0 subsystem <- 17aa/21fa |
| PCI: 00:1c.0 cmd <- 106 |
| PCI: 00:1c.1 bridge ctrl <- 0003 |
| PCI: 00:1c.1 subsystem <- 17aa/21fa |
| PCI: 00:1c.1 cmd <- 106 |
| PCI: 00:1c.2 bridge ctrl <- 0003 |
| PCI: 00:1c.2 subsystem <- 17aa/21fa |
| PCI: 00:1c.2 cmd <- 107 |
| PCI: 00:1d.0 subsystem <- 17aa/21fa |
| PCI: 00:1d.0 cmd <- 102 |
| pch_decode_init |
| PCI: 00:1f.0 subsystem <- 17aa/21fa |
| PCI: 00:1f.0 cmd <- 107 |
| PCI: 00:1f.2 subsystem <- 17aa/21fa |
| PCI: 00:1f.2 cmd <- 03 |
| PCI: 00:1f.3 subsystem <- 17aa/21fa |
| PCI: 00:1f.3 cmd <- 103 |
| PCI: 01:00.0 subsystem <- 17aa/21fa |
| PCI: 01:00.0 cmd <- 06 |
| PCI: 02:00.0 cmd <- 02 |
| done. |
| BS: BS_DEV_ENABLE times (us): entry 0 run 126 exit 0 |
| read 6000 from 07e4 |
| wrote 00000004 to 0890 |
| read 03040103 from 0894 |
| read 00000000 from 0880 |
| wrote 00000000 to 0880 |
| POST: 0x75 |
| Initializing devices... |
| Root Device init ... |
| Root Device init finished in 0 usecs |
| POST: 0x75 |
| CPU_CLUSTER: 0 init ... |
| start_eip=0x00001000, code_size=0x00000031 |
| Setting up SMI for CPU |
| Loading module at 00038000 with entry 00038000. filesize: 0x160 memsize: 0x160 |
| Processing 10 relocs. Offset value of 0x00038000 |
| Adjusting 00038002: 0x00000024 -> 0x00038024 |
| Adjusting 0003801d: 0x0000003c -> 0x0003803c |
| Adjusting 00038026: 0x00000024 -> 0x00038024 |
| Adjusting 00038054: 0x000000d8 -> 0x000380d8 |
| Adjusting 00038066: 0x00000160 -> 0x00038160 |
| Adjusting 0003806d: 0x000000c0 -> 0x000380c0 |
| Adjusting 00038075: 0x000000c4 -> 0x000380c4 |
| Adjusting 0003807e: 0x000000d0 -> 0x000380d0 |
| Adjusting 00038085: 0x000000cc -> 0x000380cc |
| Adjusting 0003808b: 0x000000c8 -> 0x000380c8 |
| SMM Module: stub loaded at 00038000. Will call bffb04ed(bffd3b40) |
| Installing SMM handler to 0xc0000000 |
| Loading module at c0010000 with entry c001158e. filesize: 0x3aa0 memsize: 0x7ac0 |
| Processing 229 relocs. Offset value of 0xc0010000 |
| Adjusting c0010592: 0x00002fcc -> 0xc0012fcc |
| Adjusting c00105b1: 0x00002fcc -> 0xc0012fcc |
| Adjusting c001066e: 0x000032ad -> 0xc00132ad |
| Adjusting c0010685: 0x00002fcc -> 0xc0012fcc |
| Adjusting c00106fb: 0x00002fdc -> 0xc0012fdc |
| Adjusting c001072e: 0x00002ff7 -> 0xc0012ff7 |
| Adjusting c0010763: 0x00003000 -> 0xc0013000 |
| Adjusting c00107ba: 0x00003021 -> 0xc0013021 |
| Adjusting c0010831: 0x00003036 -> 0xc0013036 |
| Adjusting c0010868: 0x00003054 -> 0xc0013054 |
| Adjusting c001088c: 0x00003075 -> 0xc0013075 |
| Adjusting c00108a5: 0x00003098 -> 0xc0013098 |
| Adjusting c0010a7f: 0x00003a80 -> 0xc0013a80 |
| Adjusting c0010a8e: 0x000030c4 -> 0xc00130c4 |
| Adjusting c0010a93: 0x00003a80 -> 0xc0013a80 |
| Adjusting c0010a99: 0x00003a80 -> 0xc0013a80 |
| Adjusting c0010aae: 0x000032e8 -> 0xc00132e8 |
| Adjusting c0010ab3: 0x00003305 -> 0xc0013305 |
| Adjusting c0010ab8: 0x00003308 -> 0xc0013308 |
| Adjusting c0010abd: 0x000030d0 -> 0xc00130d0 |
| Adjusting c0010af0: 0x00003a84 -> 0xc0013a84 |
| Adjusting c0010b06: 0x00000acc -> 0xc0010acc |
| Adjusting c0010b1a: 0x00003a84 -> 0xc0013a84 |
| Adjusting c0010b2c: 0x00003a84 -> 0xc0013a84 |
| Adjusting c0010b3f: 0x00003119 -> 0xc0013119 |
| Adjusting c0010b48: 0x000030f4 -> 0xc00130f4 |
| Adjusting c0011074: 0x0000313e -> 0xc001313e |
| Adjusting c00112c0: 0x00003aa0 -> 0xc0013aa0 |
| Adjusting c00112da: 0x00003aa8 -> 0xc0013aa8 |
| Adjusting c00112e5: 0x0000331d -> 0xc001331d |
| Adjusting c00112ff: 0x00003aa8 -> 0xc0013aa8 |
| Adjusting c0011318: 0x00003145 -> 0xc0013145 |
| Adjusting c0011345: 0x0000315e -> 0xc001315e |
| Adjusting c001136e: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0011388: 0x00003a00 -> 0xc0013a00 |
| Adjusting c001139c: 0x0000390d -> 0xc001390d |
| Adjusting c00113bb: 0x0000393e -> 0xc001393e |
| Adjusting c00113d2: 0x00003948 -> 0xc0013948 |
| Adjusting c00113e9: 0x0000394d -> 0xc001394d |
| Adjusting c0011400: 0x00003956 -> 0xc0013956 |
| Adjusting c0011417: 0x00003963 -> 0xc0013963 |
| Adjusting c001142e: 0x0000396f -> 0xc001396f |
| Adjusting c0011445: 0x0000397c -> 0xc001397c |
| Adjusting c001145c: 0x00003987 -> 0xc0013987 |
| Adjusting c0011473: 0x00003993 -> 0xc0013993 |
| Adjusting c001148a: 0x0000399d -> 0xc001399d |
| Adjusting c00114a1: 0x000039a2 -> 0xc00139a2 |
| Adjusting c00114b8: 0x000039aa -> 0xc00139aa |
| Adjusting c00114cf: 0x000039b1 -> 0xc00139b1 |
| Adjusting c00114e6: 0x000039b6 -> 0xc00139b6 |
| Adjusting c00114fd: 0x000039bc -> 0xc00139bc |
| Adjusting c0011513: 0x000039c1 -> 0xc00139c1 |
| Adjusting c0011529: 0x000039cc -> 0xc00139cc |
| Adjusting c001153f: 0x000039d1 -> 0xc00139d1 |
| Adjusting c0011555: 0x000039da -> 0xc00139da |
| Adjusting c001156b: 0x000039e6 -> 0xc00139e6 |
| Adjusting c001157c: 0x000032ab -> 0xc00132ab |
| Adjusting c0011598: 0x00003aa0 -> 0xc0013aa0 |
| Adjusting c00115a6: 0x00003aa0 -> 0xc0013aa0 |
| Adjusting c00115b7: 0x00003170 -> 0xc0013170 |
| Adjusting c00115cb: 0x00003a88 -> 0xc0013a88 |
| Adjusting c00115d6: 0x00003a88 -> 0xc0013a88 |
| Adjusting c00115e9: 0x00003aa4 -> 0xc0013aa4 |
| Adjusting c00115f5: 0x0000319d -> 0xc001319d |
| Adjusting c0011605: 0x00003a8c -> 0xc0013a8c |
| Adjusting c001160e: 0x00003a8c -> 0xc0013a8c |
| Adjusting c001162b: 0x00003aa4 -> 0xc0013aa4 |
| Adjusting c0011634: 0x00003a88 -> 0xc0013a88 |
| Adjusting c0011664: 0x0000332f -> 0xc001332f |
| Adjusting c001173c: 0x000031a8 -> 0xc00131a8 |
| Adjusting c001174f: 0x000031b8 -> 0xc00131b8 |
| Adjusting c001178f: 0x000031f7 -> 0xc00131f7 |
| Adjusting c001187f: 0x00003a94 -> 0xc0013a94 |
| Adjusting c00118a1: 0x00003216 -> 0xc0013216 |
| Adjusting c00118b9: 0x00003218 -> 0xc0013218 |
| Adjusting c00118d3: 0x00003a94 -> 0xc0013a94 |
| Adjusting c00118fe: 0x00003a94 -> 0xc0013a94 |
| Adjusting c0011920: 0x00003216 -> 0xc0013216 |
| Adjusting c0011938: 0x00003245 -> 0xc0013245 |
| Adjusting c0011952: 0x00003a90 -> 0xc0013a90 |
| Adjusting c0011970: 0x00003a94 -> 0xc0013a94 |
| Adjusting c001198f: 0x00003216 -> 0xc0013216 |
| Adjusting c00119a2: 0x00003285 -> 0xc0013285 |
| Adjusting c00119bc: 0x00003a90 -> 0xc0013a90 |
| Adjusting c00119cf: 0x0000326f -> 0xc001326f |
| Adjusting c0011a95: 0x00003a94 -> 0xc0013a94 |
| Adjusting c0011a9a: 0x00003a90 -> 0xc0013a90 |
| Adjusting c0011aad: 0x00002fb8 -> 0xc0012fb8 |
| Adjusting c0011ad7: 0x00002fb0 -> 0xc0012fb0 |
| Adjusting c0011adc: 0x000032c2 -> 0xc00132c2 |
| Adjusting c0011e25: 0x00003aac -> 0xc0013aac |
| Adjusting c0011e54: 0x00003ab0 -> 0xc0013ab0 |
| Adjusting c0011e67: 0x00003aac -> 0xc0013aac |
| Adjusting c0011e8a: 0x00003ab0 -> 0xc0013ab0 |
| Adjusting c0011ed8: 0x0000333e -> 0xc001333e |
| Adjusting c0011f25: 0x0000333e -> 0xc001333e |
| Adjusting c0011f6f: 0x00003aac -> 0xc0013aac |
| Adjusting c0012005: 0x0000335a -> 0xc001335a |
| Adjusting c0012093: 0x00003382 -> 0xc0013382 |
| Adjusting c0012128: 0x00003498 -> 0xc0013498 |
| Adjusting c001216d: 0x000033ea -> 0xc00133ea |
| Adjusting c001217e: 0x00003432 -> 0xc0013432 |
| Adjusting c00121ca: 0x00003452 -> 0xc0013452 |
| Adjusting c00121fa: 0x00003476 -> 0xc0013476 |
| Adjusting c0012222: 0x000033ae -> 0xc00133ae |
| Adjusting c0012257: 0x000033cc -> 0xc00133cc |
| Adjusting c001226d: 0x00003ab0 -> 0xc0013ab0 |
| Adjusting c00122e8: 0x00003594 -> 0xc0013594 |
| Adjusting c00122ed: 0x000034d1 -> 0xc00134d1 |
| Adjusting c001231a: 0x000034d9 -> 0xc00134d9 |
| Adjusting c0012349: 0x0000335a -> 0xc001335a |
| Adjusting c00123d8: 0x00003382 -> 0xc0013382 |
| Adjusting c00123fa: 0x00003ab0 -> 0xc0013ab0 |
| Adjusting c0012486: 0x00003498 -> 0xc0013498 |
| Adjusting c00124cb: 0x00003523 -> 0xc0013523 |
| Adjusting c00124dc: 0x00003432 -> 0xc0013432 |
| Adjusting c00124fc: 0x00003ab0 -> 0xc0013ab0 |
| Adjusting c0012530: 0x0000356a -> 0xc001356a |
| Adjusting c0012575: 0x000033ae -> 0xc00133ae |
| Adjusting c00125a0: 0x000034fc -> 0xc00134fc |
| Adjusting c0012669: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012678: 0x000035a5 -> 0xc00135a5 |
| Adjusting c0012696: 0x000035b0 -> 0xc00135b0 |
| Adjusting c00126b3: 0x000035b8 -> 0xc00135b8 |
| Adjusting c00126ca: 0x000035be -> 0xc00135be |
| Adjusting c00126e1: 0x000035c6 -> 0xc00135c6 |
| Adjusting c00126f8: 0x000035cc -> 0xc00135cc |
| Adjusting c001270f: 0x000035d1 -> 0xc00135d1 |
| Adjusting c0012726: 0x000035d9 -> 0xc00135d9 |
| Adjusting c001273d: 0x000035e2 -> 0xc00135e2 |
| Adjusting c0012753: 0x000035e6 -> 0xc00135e6 |
| Adjusting c0012769: 0x000035ef -> 0xc00135ef |
| Adjusting c001277f: 0x000035f8 -> 0xc00135f8 |
| Adjusting c0012795: 0x00003969 -> 0xc0013969 |
| Adjusting c00127ab: 0x000035fe -> 0xc00135fe |
| Adjusting c00127c1: 0x00003604 -> 0xc0013604 |
| Adjusting c00127d7: 0x0000360b -> 0xc001360b |
| Adjusting c00127ed: 0x00003614 -> 0xc0013614 |
| Adjusting c00127fe: 0x000032ab -> 0xc00132ab |
| Adjusting c001286f: 0x00003ab8 -> 0xc0013ab8 |
| Adjusting c00128a6: 0x00003625 -> 0xc0013625 |
| Adjusting c00128c5: 0x00003633 -> 0xc0013633 |
| Adjusting c00128db: 0x00003650 -> 0xc0013650 |
| Adjusting c00128fa: 0x0000365d -> 0xc001365d |
| Adjusting c001290a: 0x0000366a -> 0xc001366a |
| Adjusting c0012919: 0x0000361f -> 0xc001361f |
| Adjusting c0012924: 0x0000361a -> 0xc001361a |
| Adjusting c001292d: 0x0000367b -> 0xc001367b |
| Adjusting c0012947: 0x0000368d -> 0xc001368d |
| Adjusting c0012964: 0x00003a98 -> 0xc0013a98 |
| Adjusting c001298c: 0x000036ad -> 0xc00136ad |
| Adjusting c001299d: 0x00003a98 -> 0xc0013a98 |
| Adjusting c00129ca: 0x000036cf -> 0xc00136cf |
| Adjusting c00129e8: 0x000036be -> 0xc00136be |
| Adjusting c00129f1: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012a03: 0x000036e0 -> 0xc00136e0 |
| Adjusting c0012a19: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012a2b: 0x000036f6 -> 0xc00136f6 |
| Adjusting c0012a35: 0x00003abc -> 0xc0013abc |
| Adjusting c0012a3f: 0x0000370b -> 0xc001370b |
| Adjusting c0012a7e: 0x00003ab4 -> 0xc0013ab4 |
| Adjusting c0012a88: 0x00003736 -> 0xc0013736 |
| Adjusting c0012aab: 0x00003ab4 -> 0xc0013ab4 |
| Adjusting c0012acc: 0x00003abc -> 0xc0013abc |
| Adjusting c0012ad3: 0x0000374f -> 0xc001374f |
| Adjusting c0012ad8: 0x00003ab8 -> 0xc0013ab8 |
| Adjusting c0012ae3: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012af5: 0x00003769 -> 0xc0013769 |
| Adjusting c0012b07: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012b47: 0x00003778 -> 0xc0013778 |
| Adjusting c0012b62: 0x0000378e -> 0xc001378e |
| Adjusting c0012b77: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012b89: 0x0000379c -> 0xc001379c |
| Adjusting c0012ba0: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012bae: 0x000037b2 -> 0xc00137b2 |
| Adjusting c0012bc6: 0x000037c2 -> 0xc00137c2 |
| Adjusting c0012bdd: 0x000037bc -> 0xc00137bc |
| Adjusting c0012bf4: 0x000037c7 -> 0xc00137c7 |
| Adjusting c0012c0b: 0x000037d0 -> 0xc00137d0 |
| Adjusting c0012c26: 0x000037d5 -> 0xc00137d5 |
| Adjusting c0012c3c: 0x000037dd -> 0xc00137dd |
| Adjusting c0012c52: 0x000037e2 -> 0xc00137e2 |
| Adjusting c0012c68: 0x000037e6 -> 0xc00137e6 |
| Adjusting c0012c79: 0x000032ab -> 0xc00132ab |
| Adjusting c0012c86: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012c97: 0x000037ed -> 0xc00137ed |
| Adjusting c0012cac: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012cd5: 0x000037f9 -> 0xc00137f9 |
| Adjusting c0012cf2: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012d0b: 0x0000380d -> 0xc001380d |
| Adjusting c0012d23: 0x000039ec -> 0xc00139ec |
| Adjusting c0012d28: 0x00003ab8 -> 0xc0013ab8 |
| Adjusting c0012dac: 0x000038ec -> 0xc00138ec |
| Adjusting c0012db3: 0x00003821 -> 0xc0013821 |
| Adjusting c0012dbf: 0x00003839 -> 0xc0013839 |
| Adjusting c0012dcb: 0x0000385d -> 0xc001385d |
| Adjusting c0012e1a: 0x00003881 -> 0xc0013881 |
| Adjusting c0012e23: 0x000038a6 -> 0xc00138a6 |
| Adjusting c0012e31: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012e64: 0x000038ca -> 0xc00138ca |
| Adjusting c0012e75: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012ea1: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012ec5: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012f60: 0x00003904 -> 0xc0013904 |
| Adjusting c0012f6c: 0x00003ab8 -> 0xc0013ab8 |
| Adjusting c0012f83: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012fb0: 0x00002f98 -> 0xc0012f98 |
| Adjusting c0012fb8: 0x0000057d -> 0xc001057d |
| Adjusting c0012fbc: 0x00002f98 -> 0xc0012f98 |
| Adjusting c0012fc4: 0x000005ee -> 0xc00105ee |
| Adjusting c0012fd0: 0x000030b0 -> 0xc00130b0 |
| Adjusting c00130b0: 0x000008ee -> 0xc00108ee |
| Adjusting c00130b4: 0x000008fa -> 0xc00108fa |
| Adjusting c00130b8: 0x000008fd -> 0xc00108fd |
| Adjusting c00138ec: 0x00002db0 -> 0xc0012db0 |
| Adjusting c00138f0: 0x00002dbc -> 0xc0012dbc |
| Adjusting c00138f4: 0x00002e61 -> 0xc0012e61 |
| Adjusting c00138f8: 0x00002dc8 -> 0xc0012dc8 |
| Adjusting c00138fc: 0x00002e17 -> 0xc0012e17 |
| Adjusting c0013900: 0x00002e20 -> 0xc0012e20 |
| Adjusting c0013a10: 0x00002cbd -> 0xc0012cbd |
| Adjusting c0013a14: 0x000029ad -> 0xc00129ad |
| Adjusting c0013a20: 0x00002b98 -> 0xc0012b98 |
| Adjusting c0013a24: 0x00002661 -> 0xc0012661 |
| Adjusting c0013a28: 0x0000295d -> 0xc001295d |
| Adjusting c0013a2c: 0x00002b75 -> 0xc0012b75 |
| Adjusting c0013a34: 0x00002b04 -> 0xc0012b04 |
| Adjusting c0013a38: 0x00002ae1 -> 0xc0012ae1 |
| Adjusting c0013a54: 0x0000280f -> 0xc001280f |
| Loading module at c0008000 with entry c0008000. filesize: 0x160 memsize: 0x160 |
| Processing 10 relocs. Offset value of 0xc0008000 |
| Adjusting c0008002: 0x00000024 -> 0xc0008024 |
| Adjusting c000801d: 0x0000003c -> 0xc000803c |
| Adjusting c0008026: 0x00000024 -> 0xc0008024 |
| Adjusting c0008054: 0x000000d8 -> 0xc00080d8 |
| Adjusting c0008066: 0x00000160 -> 0xc0008160 |
| Adjusting c000806d: 0x000000c0 -> 0xc00080c0 |
| Adjusting c0008075: 0x000000c4 -> 0xc00080c4 |
| Adjusting c000807e: 0x000000d0 -> 0xc00080d0 |
| Adjusting c0008085: 0x000000cc -> 0xc00080cc |
| Adjusting c000808b: 0x000000c8 -> 0xc00080c8 |
| SMM Module: placing jmp sequence at c0007c00 rel16 0x03fd |
| SMM Module: placing jmp sequence at c0007800 rel16 0x07fd |
| SMM Module: placing jmp sequence at c0007400 rel16 0x0bfd |
| SMM Module: stub loaded at c0008000. Will call c001158e(00000000) |
| Initializing southbridge SMI... ... pmbase = 0x0500 |
| |
| SMI_STS: MCSMI |
| PM1_STS: |
| GPE0_STS: GPIO14 GPIO13 GPIO11 GPIO10 GPIO9 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO1 GPIO0 |
| ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI1 GPI0 |
| TCO_STS: |
| ... raise SMI# |
| In relocation handler: cpu 0 |
| New SMBASE=0xc0000000 IEDBASE=0xc0400000 @ 0003fc00 |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Relocation complete. |
| Locking SMM. |
| Initializing CPU #0 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| POST: 0x60 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Found @ offset 156c0 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x1b |
| CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd47e8 |
| memalign bffd47e8 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4800 |
| memalign bffd4800 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4818 |
| memalign bffd4818 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4830 |
| memalign bffd4830 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4848 |
| memalign bffd4848 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4860 |
| memalign bffd4860 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4878 |
| memalign bffd4878 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4890 |
| memalign bffd4890 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd48a8 |
| memalign bffd48a8 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd48c0 |
| memalign bffd48c0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd48d8 |
| memalign bffd48d8 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd48f0 |
| memalign bffd48f0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4908 |
| memalign bffd4908 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4920 |
| memalign bffd4920 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4938 |
| memalign bffd4938 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4950 |
| memalign bffd4950 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4968 |
| memalign bffd4968 |
| MTRR: Physical address space: |
| 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 |
| 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 |
| 0x00000000000c0000 - 0x00000000c0000000 size 0xbff40000 type 6 |
| 0x00000000c0000000 - 0x00000000e0000000 size 0x20000000 type 0 |
| 0x00000000e0000000 - 0x00000000f0000000 size 0x10000000 type 1 |
| 0x00000000f0000000 - 0x0000000100000000 size 0x10000000 type 0 |
| 0x0000000100000000 - 0x000000042f600000 size 0x32f600000 type 6 |
| MTRR addr 0x0-0x10 set to 6 type @ 0 |
| MTRR addr 0x10-0x20 set to 6 type @ 1 |
| MTRR addr 0x20-0x30 set to 6 type @ 2 |
| MTRR addr 0x30-0x40 set to 6 type @ 3 |
| MTRR addr 0x40-0x50 set to 6 type @ 4 |
| MTRR addr 0x50-0x60 set to 6 type @ 5 |
| MTRR addr 0x60-0x70 set to 6 type @ 6 |
| MTRR addr 0x70-0x80 set to 6 type @ 7 |
| MTRR addr 0x80-0x84 set to 6 type @ 8 |
| MTRR addr 0x84-0x88 set to 6 type @ 9 |
| MTRR addr 0x88-0x8c set to 6 type @ 10 |
| MTRR addr 0x8c-0x90 set to 6 type @ 11 |
| MTRR addr 0x90-0x94 set to 6 type @ 12 |
| MTRR addr 0x94-0x98 set to 6 type @ 13 |
| MTRR addr 0x98-0x9c set to 6 type @ 14 |
| MTRR addr 0x9c-0xa0 set to 6 type @ 15 |
| MTRR addr 0xa0-0xa4 set to 0 type @ 16 |
| MTRR addr 0xa4-0xa8 set to 0 type @ 17 |
| MTRR addr 0xa8-0xac set to 0 type @ 18 |
| MTRR addr 0xac-0xb0 set to 0 type @ 19 |
| MTRR addr 0xb0-0xb4 set to 0 type @ 20 |
| MTRR addr 0xb4-0xb8 set to 0 type @ 21 |
| MTRR addr 0xb8-0xbc set to 0 type @ 22 |
| MTRR addr 0xbc-0xc0 set to 0 type @ 23 |
| MTRR addr 0xc0-0xc1 set to 6 type @ 24 |
| MTRR addr 0xc1-0xc2 set to 6 type @ 25 |
| MTRR addr 0xc2-0xc3 set to 6 type @ 26 |
| MTRR addr 0xc3-0xc4 set to 6 type @ 27 |
| MTRR addr 0xc4-0xc5 set to 6 type @ 28 |
| MTRR addr 0xc5-0xc6 set to 6 type @ 29 |
| MTRR addr 0xc6-0xc7 set to 6 type @ 30 |
| MTRR addr 0xc7-0xc8 set to 6 type @ 31 |
| MTRR addr 0xc8-0xc9 set to 6 type @ 32 |
| MTRR addr 0xc9-0xca set to 6 type @ 33 |
| MTRR addr 0xca-0xcb set to 6 type @ 34 |
| MTRR addr 0xcb-0xcc set to 6 type @ 35 |
| MTRR addr 0xcc-0xcd set to 6 type @ 36 |
| MTRR addr 0xcd-0xce set to 6 type @ 37 |
| MTRR addr 0xce-0xcf set to 6 type @ 38 |
| MTRR addr 0xcf-0xd0 set to 6 type @ 39 |
| MTRR addr 0xd0-0xd1 set to 6 type @ 40 |
| MTRR addr 0xd1-0xd2 set to 6 type @ 41 |
| MTRR addr 0xd2-0xd3 set to 6 type @ 42 |
| MTRR addr 0xd3-0xd4 set to 6 type @ 43 |
| MTRR addr 0xd4-0xd5 set to 6 type @ 44 |
| MTRR addr 0xd5-0xd6 set to 6 type @ 45 |
| MTRR addr 0xd6-0xd7 set to 6 type @ 46 |
| MTRR addr 0xd7-0xd8 set to 6 type @ 47 |
| MTRR addr 0xd8-0xd9 set to 6 type @ 48 |
| MTRR addr 0xd9-0xda set to 6 type @ 49 |
| MTRR addr 0xda-0xdb set to 6 type @ 50 |
| MTRR addr 0xdb-0xdc set to 6 type @ 51 |
| MTRR addr 0xdc-0xdd set to 6 type @ 52 |
| MTRR addr 0xdd-0xde set to 6 type @ 53 |
| MTRR addr 0xde-0xdf set to 6 type @ 54 |
| MTRR addr 0xdf-0xe0 set to 6 type @ 55 |
| MTRR addr 0xe0-0xe1 set to 6 type @ 56 |
| MTRR addr 0xe1-0xe2 set to 6 type @ 57 |
| MTRR addr 0xe2-0xe3 set to 6 type @ 58 |
| MTRR addr 0xe3-0xe4 set to 6 type @ 59 |
| MTRR addr 0xe4-0xe5 set to 6 type @ 60 |
| MTRR addr 0xe5-0xe6 set to 6 type @ 61 |
| MTRR addr 0xe6-0xe7 set to 6 type @ 62 |
| MTRR addr 0xe7-0xe8 set to 6 type @ 63 |
| MTRR addr 0xe8-0xe9 set to 6 type @ 64 |
| MTRR addr 0xe9-0xea set to 6 type @ 65 |
| MTRR addr 0xea-0xeb set to 6 type @ 66 |
| MTRR addr 0xeb-0xec set to 6 type @ 67 |
| MTRR addr 0xec-0xed set to 6 type @ 68 |
| MTRR addr 0xed-0xee set to 6 type @ 69 |
| MTRR addr 0xee-0xef set to 6 type @ 70 |
| MTRR addr 0xef-0xf0 set to 6 type @ 71 |
| MTRR addr 0xf0-0xf1 set to 6 type @ 72 |
| MTRR addr 0xf1-0xf2 set to 6 type @ 73 |
| MTRR addr 0xf2-0xf3 set to 6 type @ 74 |
| MTRR addr 0xf3-0xf4 set to 6 type @ 75 |
| MTRR addr 0xf4-0xf5 set to 6 type @ 76 |
| MTRR addr 0xf5-0xf6 set to 6 type @ 77 |
| MTRR addr 0xf6-0xf7 set to 6 type @ 78 |
| MTRR addr 0xf7-0xf8 set to 6 type @ 79 |
| MTRR addr 0xf8-0xf9 set to 6 type @ 80 |
| MTRR addr 0xf9-0xfa set to 6 type @ 81 |
| MTRR addr 0xfa-0xfb set to 6 type @ 82 |
| MTRR addr 0xfb-0xfc set to 6 type @ 83 |
| MTRR addr 0xfc-0xfd set to 6 type @ 84 |
| MTRR addr 0xfd-0xfe set to 6 type @ 85 |
| MTRR addr 0xfe-0xff set to 6 type @ 86 |
| MTRR addr 0xff-0x100 set to 6 type @ 87 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| MTRR: default type WB/UC MTRR counts: 3/9. |
| MTRR: WB selected as default type. |
| MTRR: 0 base 0x00000000c0000000 mask 0x0000000fe0000000 type 0 |
| MTRR: 1 base 0x00000000e0000000 mask 0x0000000ff0000000 type 1 |
| MTRR: 2 base 0x00000000f0000000 mask 0x0000000ff0000000 type 0 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Setting up local APIC... apic_id: 0x00 done. |
| POST: 0x9b |
| VMX is locked, so set_vmx will do nothing |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2600 |
| Turbo is available but hidden |
| Turbo has been enabled |
| CPU: 0 has 2 cores, 2 threads per core |
| memalign Enter, boundary 8, size 152, free_mem_ptr bffd4980 |
| memalign bffd4980 |
| CPU: 0 has core 1 |
| CPU1: stack_base bffcd000, stack_end bffcdff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 1. |
| After apic_write. |
| In relocation handler: cpu 1 |
| New SMBASE=0xbffffc00 IEDBASE=0xc0400000 @ 0003fc00 |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 1. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #1 |
| memalign Enter, boundary 8, size 152, free_mem_ptr bffd4a18 |
| CPU: vendor Intel device 306a9 |
| memalign bffd4a18 |
| CPU: family 06, model 3a, stepping 09 |
| CPU: 0 has core 2 |
| POST: 0x60 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Found @ offset 156c0 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x1b |
| CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Setting up local APIC... apic_id: 0x01 done. |
| POST: 0x9b |
| VMX is locked, so set_vmx will do nothing |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2600 |
| CPU #1 initialized |
| CPU2: stack_base bffcc000, stack_end bffccff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 2. |
| After apic_write. |
| In relocation handler: cpu 2 |
| Startup point 1. |
| Waiting for send to finish... |
| +New SMBASE=0xbffff800 IEDBASE=0xc0400000 @ 0003fc00 |
| Sending STARTUP #2 to 2. |
| After apic_write. |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| memalign Enter, boundary 8, size 152, free_mem_ptr bffd4ab0 |
| memalign bffd4ab0 |
| CPU: 0 has core 3 |
| Initializing CPU #2 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| POST: 0x60 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Found @ offset 156c0 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x0 |
| microcode: updated to revision 0x1b date=2014-05-29 |
| CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Setting up local APIC... apic_id: 0x02 done. |
| POST: 0x9b |
| VMX is locked, so set_vmx will do nothing |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2600 |
| CPU #2 initialized |
| CPU3: stack_base bffcb000, stack_end bffcbff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 3. |
| After apic_write. |
| In relocation handler: cpu 3 |
| New SMBASE=0xbffff400 IEDBASE=0xc0400000 @ 0003fc00 |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 3. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU #0 initialized |
| Waiting for 1 CPUS to stop |
| Initializing CPU #3 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| POST: 0x60 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Found @ offset 156c0 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x1b |
| CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Setting up local APIC... apic_id: 0x03 done. |
| POST: 0x9b |
| VMX is locked, so set_vmx will do nothing |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2600 |
| CPU #3 initialized |
| All AP CPUs stopped (433 loops) |
| CPU0: stack: bffce000 - bffcf000, lowest used address bffcea20, stack used: 1504 bytes |
| CPU1: stack: bffcd000 - bffce000, lowest used address bffcdc54, stack used: 940 bytes |
| CPU2: stack: bffcc000 - bffcd000, lowest used address bffccc54, stack used: 940 bytes |
| CPU3: stack: bffcb000 - bffcc000, lowest used address bffcbc54, stack used: 940 bytes |
| CPU_CLUSTER: 0 init finished in 87596 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 00:00.0 init ... |
| Disabling PEG12. |
| Disabling PEG11. |
| Disabling PEG10. |
| Disabling PEG60. |
| Disabling PEG IO clock. |
| Set BIOS_RESET_CPL |
| CPU TDP: 35 Watts |
| PCI: 00:00.0 init finished in 1012 usecs |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 00:02.0 init ... |
| GT Power Management Init |
| IVB GT2 25W-35W Power Meter Weights |
| GT Power Management Init (post VBIOS) |
| Initializing VGA without OPROM. |
| |
| [0.166209] CONFIG => |
| [0.166209] (Primary => |
| [0.166210] (Port => Internal, |
| [0.166210] Framebuffer => |
| [0.166211] (Width => 1366, |
| [0.166211] Height => 768, |
| [0.166212] Stride => 1408, |
| [0.166212] Offset => 0x00000000, |
| [0.166213] BPC => 8), |
| [0.166213] Mode => |
| [0.166214] (Dotclock => 75200000, |
| [0.166214] H_Visible => 1366, |
| [0.166215] H_Sync_Begin => 1414, |
| [0.166215] H_Sync_End => 1478, |
| [0.166216] H_Total => 1582, |
| [0.166216] V_Visible => 768, |
| [0.166217] V_Sync_Begin => 772, |
| [0.166217] V_Sync_End => 779, |
| [0.166218] V_Total => 792, |
| [0.166218] H_Sync_Active_High => True, |
| [0.166219] V_Sync_Active_High => False, |
| [0.166219] BPC => 5)), |
| [0.166220] Secondary => |
| [0.166220] (Port => Disabled, |
| [0.166221] Framebuffer => |
| [0.166221] (Width => 1, |
| [0.166222] Height => 1, |
| [0.166222] Stride => 1, |
| [0.166223] Offset => 0x00000000, |
| [0.166223] BPC => 8), |
| [0.166224] Mode => |
| [0.166224] (Dotclock => 24000000, |
| [0.166225] H_Visible => 1, |
| [0.166225] H_Sync_Begin => 1, |
| [0.166226] H_Sync_End => 1, |
| [0.166226] H_Total => 1, |
| [0.166227] V_Visible => 1, |
| [0.166227] V_Sync_Begin => 1, |
| [0.166228] V_Sync_End => 1, |
| [0.166228] V_Total => 1, |
| [0.166229] H_Sync_Active_High => False, |
| [0.166229] V_Sync_Active_High => False, |
| [0.166230] BPC => 5)), |
| [0.166230] Tertiary => |
| [0.166231] (Port => Disabled, |
| [0.166231] Framebuffer => |
| [0.166232] (Width => 1, |
| [0.166232] Height => 1, |
| [0.166233] Stride => 1, |
| [0.166233] Offset => 0x00000000, |
| [0.166234] BPC => 8), |
| [0.166234] Mode => |
| [0.166235] (Dotclock => 24000000, |
| [0.166235] H_Visible => 1, |
| [0.166236] H_Sync_Begin => 1, |
| [0.166236] H_Sync_End => 1, |
| [0.166237] H_Total => 1, |
| [0.166237] V_Visible => 1, |
| [0.166238] V_Sync_Begin => 1, |
| [0.166238] V_Sync_End => 1, |
| [0.166239] V_Total => 1, |
| [0.166239] H_Sync_Active_High => False, |
| [0.166240] V_Sync_Active_High => False, |
| [0.166240] BPC => 5))); |
| PCI: 00:02.0 init finished in 70864 usecs |
| POST: 0x75 |
| PCI: 00:04.0 init ... |
| PCI: 00:04.0 init finished in 0 usecs |
| POST: 0x75 |
| PCI: 00:14.0 init ... |
| XHCI: Setting up controller.. done. |
| PCI: 00:14.0 init finished in 6 usecs |
| POST: 0x75 |
| PCI: 00:16.0 init ... |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : YES |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Recovery |
| ME: Current Operation State : M0 with UMA |
| ME: Current Operation Mode : Normal |
| ME: Error Code : Image Failure |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Pseudo-global reset |
| ME: Progress Phase State : M0 kernel load |
| ME: BIOS path: Error |
| PCI: 00:16.0 init finished in 15 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 00:19.0 init ... |
| PCI: 00:19.0 init finished in 0 usecs |
| POST: 0x75 |
| PCI: 00:1a.0 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1a.0 init finished in 12 usecs |
| POST: 0x75 |
| PCI: 00:1b.0 init ... |
| Azalia: base = f1638000 |
| Azalia: codec_mask = 09 |
| Azalia: Initializing codec #3 |
| Azalia: codec viddid: 80862806 |
| Azalia: verb_size: 16 |
| Azalia: verb loaded. |
| Azalia: Initializing codec #0 |
| Azalia: codec viddid: 10ec0269 |
| Azalia: verb_size: 76 |
| Azalia: verb loaded. |
| PCI: 00:1b.0 init finished in 5971 usecs |
| POST: 0x75 |
| PCI: 00:1c.0 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.0 init finished in 9 usecs |
| POST: 0x75 |
| PCI: 00:1c.1 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.1 init finished in 10 usecs |
| POST: 0x75 |
| PCI: 00:1c.2 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.2 init finished in 13 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 00:1d.0 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1d.0 init finished in 12 usecs |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 00:1f.0 init ... |
| pch: lpc_init |
| IOAPIC: Initializing IOAPIC at 0xfec00000 |
| IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| IOAPIC: ID = 0x02 |
| IOAPIC: Dumping registers |
| reg 0x0000: 0x02000000 |
| reg 0x0001: 0x00170020 |
| reg 0x0002: 0x00170020 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Found @ offset 221c0 size 7a0 |
| Set power off after power failure. |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Found @ offset 221c0 size 7a0 |
| NMI sources enabled. |
| PantherPoint PM init |
| rtc_failed = 0x0 |
| RTC Init |
| Enabling BIOS updates outside of SMM... Disabling ACPI via APMC: |
| done. |
| pch_spi_init |
| PCI: 00:1f.0 init finished in 1653 usecs |
| POST: 0x75 |
| PCI: 00:1f.2 init ... |
| SATA: Initializing... |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Found @ offset 221c0 size 7a0 |
| SATA: Controller in AHCI mode. |
| ABAR: f163d000 |
| PCI: 00:1f.2 init finished in 428 usecs |
| POST: 0x75 |
| PCI: 00:1f.3 init ... |
| PCI: 00:1f.3 init finished in 7 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 01:00.0 init ... |
| PCI: 01:00.0 init finished in 15 usecs |
| POST: 0x75 |
| PCI: 02:00.0 init ... |
| PCI: 02:00.0 init finished in 0 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PNP: 00ff.2 init ... |
| PNP: 00ff.2 init finished in 0 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:54 init ... |
| I2C: 01:54 init finished in 1 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:55 init ... |
| I2C: 01:55 init finished in 0 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:56 init ... |
| I2C: 01:56 init finished in 0 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:57 init ... |
| I2C: 01:57 init finished in 0 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5c init ... |
| Locking EEPROM RFID |
| init EEPROM done |
| I2C: 01:5c init finished in 25884 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5d init ... |
| I2C: 01:5d init finished in 0 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5e init ... |
| I2C: 01:5e init finished in 0 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5f init ... |
| I2C: 01:5f init finished in 0 usecs |
| Devices initialized |
| Show all devs... After init. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 01:00.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 0 |
| PCI: 00:1c.4: enabled 0 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 00ff.1: enabled 1 |
| PNP: 0c31.0: enabled 1 |
| PNP: 00ff.2: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| I2C: 01:54: enabled 1 |
| I2C: 01:55: enabled 1 |
| I2C: 01:56: enabled 1 |
| I2C: 01:57: enabled 1 |
| I2C: 01:5c: enabled 1 |
| I2C: 01:5d: enabled 1 |
| I2C: 01:5e: enabled 1 |
| I2C: 01:5f: enabled 1 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| PCI: 00:04.0: enabled 1 |
| PCI: 02:00.0: enabled 1 |
| Unknown device path type: 0 |
| : enabled 1 |
| APIC: 01: enabled 1 |
| APIC: 02: enabled 1 |
| APIC: 03: enabled 1 |
| BS: BS_DEV_INIT times (us): entry 11 run 193666 exit 0 |
| POST: 0x76 |
| Finalize devices... |
| PCI: 00:1f.0 final |
| Devices finalized |
| BS: BS_POST_DEVICE times (us): entry 0 run 4 exit 0 |
| POST: 0x77 |
| BS: BS_OS_RESUME_CHECK times (us): entry 0 run 3 exit 0 |
| Updating MRC cache data. |
| No MRC cache in cbmem. Can't update flash. |
| POST: 0x79 |
| POST: 0x9c |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'fallback/dsdt.aml' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Unmatched 'cmos_layout.bin' at 221c0 |
| CBFS: Checking offset 229c0 |
| CBFS: File @ offset 229c0 size 660 |
| CBFS: Unmatched 'payload_config' at 229c0 |
| CBFS: Checking offset 23080 |
| CBFS: File @ offset 23080 size ea |
| CBFS: Unmatched 'payload_revision' at 23080 |
| CBFS: Checking offset 231c0 |
| CBFS: File @ offset 231c0 size 8 |
| CBFS: Unmatched 'etc/ps2-keyboard-spinup' at 231c0 |
| CBFS: Checking offset 23200 |
| CBFS: File @ offset 23200 size f |
| CBFS: Unmatched 'bootorder' at 23200 |
| CBFS: Checking offset 23280 |
| CBFS: File @ offset 23280 size 8 |
| CBFS: Unmatched 'etc/show-boot-menu' at 23280 |
| CBFS: Checking offset 232c0 |
| CBFS: File @ offset 232c0 size 11f2 |
| CBFS: Unmatched 'grub.cfg' at 232c0 |
| CBFS: Checking offset 24500 |
| CBFS: File @ offset 24500 size 998 |
| CBFS: Unmatched '' at 24500 |
| CBFS: Checking offset 24ec0 |
| CBFS: File @ offset 24ec0 size 10000 |
| CBFS: Unmatched 'mrc.cache' at 24ec0 |
| CBFS: Checking offset 34f00 |
| CBFS: File @ offset 34f00 size 17b7e |
| CBFS: Unmatched 'fallback/ramstage' at 34f00 |
| CBFS: Checking offset 4cac0 |
| CBFS: File @ offset 4cac0 size 345d |
| CBFS: Found @ offset 4cac0 size 345d |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'fallback/slic' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Unmatched 'cmos_layout.bin' at 221c0 |
| CBFS: Checking offset 229c0 |
| CBFS: File @ offset 229c0 size 660 |
| CBFS: Unmatched 'payload_config' at 229c0 |
| CBFS: Checking offset 23080 |
| CBFS: File @ offset 23080 size ea |
| CBFS: Unmatched 'payload_revision' at 23080 |
| CBFS: Checking offset 231c0 |
| CBFS: File @ offset 231c0 size 8 |
| CBFS: Unmatched 'etc/ps2-keyboard-spinup' at 231c0 |
| CBFS: Checking offset 23200 |
| CBFS: File @ offset 23200 size f |
| CBFS: Unmatched 'bootorder' at 23200 |
| CBFS: Checking offset 23280 |
| CBFS: File @ offset 23280 size 8 |
| CBFS: Unmatched 'etc/show-boot-menu' at 23280 |
| CBFS: Checking offset 232c0 |
| CBFS: File @ offset 232c0 size 11f2 |
| CBFS: Unmatched 'grub.cfg' at 232c0 |
| CBFS: Checking offset 24500 |
| CBFS: File @ offset 24500 size 998 |
| CBFS: Unmatched '' at 24500 |
| CBFS: Checking offset 24ec0 |
| CBFS: File @ offset 24ec0 size 10000 |
| CBFS: Unmatched 'mrc.cache' at 24ec0 |
| CBFS: Checking offset 34f00 |
| CBFS: File @ offset 34f00 size 17b7e |
| CBFS: Unmatched 'fallback/ramstage' at 34f00 |
| CBFS: Checking offset 4cac0 |
| CBFS: File @ offset 4cac0 size 345d |
| CBFS: Unmatched 'fallback/dsdt.aml' at 4cac0 |
| CBFS: Checking offset 4ff80 |
| CBFS: File @ offset 4ff80 size 18bd8 |
| CBFS: Unmatched 'img/coreinfo' at 4ff80 |
| CBFS: Checking offset 68b80 |
| CBFS: File @ offset 68b80 size 2255c |
| CBFS: Unmatched 'img/nvramcui' at 68b80 |
| CBFS: Checking offset 8b140 |
| CBFS: File @ offset 8b140 size 109ee |
| CBFS: Unmatched 'fallback/payload' at 8b140 |
| CBFS: Checking offset 9bb80 |
| CBFS: File @ offset 9bb80 size ee48 |
| CBFS: Unmatched 'img/tint' at 9bb80 |
| CBFS: Checking offset aaa00 |
| CBFS: File @ offset aaa00 size 2c02c |
| CBFS: Unmatched 'img/memtest' at aaa00 |
| CBFS: Checking offset d6a80 |
| CBFS: File @ offset d6a80 size 8dad3 |
| CBFS: Unmatched 'img/grub2' at d6a80 |
| CBFS: Checking offset 164580 |
| CBFS: File @ offset 164580 size 11ea |
| CBFS: Unmatched 'grubtest.cfg' at 164580 |
| CBFS: Checking offset 1657c0 |
| CBFS: File @ offset 1657c0 size a7e658 |
| CBFS: Unmatched '' at 1657c0 |
| CBFS: Checking offset be3e40 |
| CBFS: File @ offset be3e40 size 1068 |
| CBFS: 'fallback/slic' not found. |
| ACPI: Writing ACPI tables at bff23000. |
| ACPI: * FACS |
| ACPI: * DSDT |
| ACPI: * IGD OpRegion |
| GET_VBIOS: aa55 3a7e 0 0 0 |
| VBIOS not found. |
| ACPI: * FADT |
| ACPI: added table 1/32, length now 40 |
| ACPI: * SSDT |
| Found 1 CPU(s) with 4 core(s) each. |
| PSS: 2601MHz power 35000 control 0x2100 status 0x2100 |
| PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 31561 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 28247 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 25084 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 22064 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 19135 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 16344 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 13666 control 0xc00 status 0xc00 |
| PSS: 2601MHz power 35000 control 0x2100 status 0x2100 |
| PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 31561 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 28247 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 25084 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 22064 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 19135 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 16344 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 13666 control 0xc00 status 0xc00 |
| PSS: 2601MHz power 35000 control 0x2100 status 0x2100 |
| PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 31561 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 28247 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 25084 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 22064 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 19135 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 16344 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 13666 control 0xc00 status 0xc00 |
| PSS: 2601MHz power 35000 control 0x2100 status 0x2100 |
| PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 31561 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 28247 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 25084 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 22064 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 19135 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 16344 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 13666 control 0xc00 status 0xc00 |
| Using default TPM ACPI path: '\_SB_.PCI0.LPCB' |
| \_SB_.PCI0.LPCB.TPM: LPC TPM PNP: 0c31.0 |
| ACPI: added table 2/32, length now 44 |
| ACPI: * MCFG |
| ACPI: added table 3/32, length now 48 |
| ACPI: * TCPA |
| TCPA log created at bff10000 |
| ACPI: added table 4/32, length now 52 |
| ACPI: * MADT |
| ACPI: added table 5/32, length now 56 |
| current = bff28180 |
| ACPI: * DMAR |
| ACPI: added table 6/32, length now 60 |
| current = bff28230 |
| ACPI: * HPET |
| ACPI: added table 7/32, length now 64 |
| ACPI: done. |
| ACPI tables: 21104 bytes. |
| smbios_write_tables: bff0f000 |
| memalign Enter, boundary 8, size 30, free_mem_ptr bffd4b48 |
| memalign bffd4b48 |
| recv_ec_data: 0x47 |
| recv_ec_data: 0x32 |
| recv_ec_data: 0x48 |
| recv_ec_data: 0x54 |
| recv_ec_data: 0x33 |
| recv_ec_data: 0x35 |
| recv_ec_data: 0x57 |
| recv_ec_data: 0x57 |
| recv_ec_data: 0x16 |
| recv_ec_data: 0x03 |
| Create SMBIOS type 17 |
| Root Device (LENOVO ThinkPad X230) |
| CPU_CLUSTER: 0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| APIC: 00 (unknown) |
| APIC: acac (Intel SandyBridge/IvyBridge CPU) |
| DOMAIN: 0000 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:00.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:01.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:02.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:14.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:19.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1a.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1b.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 01:00.0 (unknown) |
| PCI: 00:1c.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.4 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.7 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1d.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1e.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PNP: 00ff.1 (Lenovo Power Management Hardware Hub 7) |
| PNP: 0c31.0 (LPC TPM) |
| PNP: 00ff.2 (Lenovo H8 EC) |
| PCI: 00:1f.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| I2C: 01:54 (AT24RF08C) |
| I2C: 01:55 (AT24RF08C) |
| I2C: 01:56 (AT24RF08C) |
| I2C: 01:57 (AT24RF08C) |
| I2C: 01:5c (AT24RF08C) |
| I2C: 01:5d (AT24RF08C) |
| I2C: 01:5e (AT24RF08C) |
| I2C: 01:5f (AT24RF08C) |
| PCI: 00:1f.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:04.0 (unknown) |
| PCI: 02:00.0 (unknown) |
| Unknown device path type: 0 |
| (unknown) |
| APIC: 01 (unknown) |
| APIC: 02 (unknown) |
| APIC: 03 (unknown) |
| SMBIOS tables: 624 bytes. |
| Writing table forward entry at 0x00000500 |
| Wrote coreboot table at: 00000500, 0x10 bytes, checksum cfe9 |
| Writing coreboot table at 0xbff47000 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Found @ offset 221c0 size 7a0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4b66 |
| memalign bffd4b68 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4b80 |
| memalign bffd4b80 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4b98 |
| memalign bffd4b98 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4bb0 |
| memalign bffd4bb0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4bc8 |
| memalign bffd4bc8 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4be0 |
| memalign bffd4be0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4bf8 |
| memalign bffd4bf8 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4c10 |
| memalign bffd4c10 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4c28 |
| memalign bffd4c28 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4c40 |
| memalign bffd4c40 |
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1. 0000000000001000-000000000009ffff: RAM |
| 2. 00000000000a0000-00000000000fffff: RESERVED |
| 3. 0000000000100000-00000000bff0efff: RAM |
| 4. 00000000bff0f000-00000000bfffffff: CONFIGURATION TABLES |
| 5. 00000000c0000000-00000000ce9fffff: RESERVED |
| 6. 00000000f8000000-00000000fbffffff: RESERVED |
| 7. 00000000fed40000-00000000fed44fff: RESERVED |
| 8. 00000000fed90000-00000000fed91fff: RESERVED |
| 9. 0000000100000000-000000042f5fffff: RAM |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| FMAP: Found "FLASH" version 1.1 at 1b000. |
| FMAP: base = ff400000 size = c00000 #areas = 3 |
| Wrote coreboot table at: bff47000, 0xb40 bytes, checksum 59c |
| coreboot table: 2904 bytes. |
| IMD ROOT 0. bffff000 00001000 |
| IMD SMALL 1. bfffe000 00001000 |
| CONSOLE 2. bffde000 00020000 |
| TIME STAMP 3. bffdd000 00000400 |
| ROMSTG STCK 4. bffd8000 00005000 |
| RAMSTAGE 5. bff93000 00045000 |
| 57a9e100 6. bff4f000 00043bd0 |
| COREBOOT 7. bff47000 00008000 |
| ACPI 8. bff23000 00024000 |
| ACPI GNVS 9. bff22000 00001000 |
| 4f444749 10. bff20000 00002000 |
| TCPA LOG 11. bff10000 00010000 |
| SMBIOS 12. bff0f000 00000800 |
| IMD small region: |
| IMD ROOT 0. bfffec00 00000400 |
| CAR GLOBALS 1. bfffea40 000001c0 |
| USBDEBUG 2. bfffe9e0 00000058 |
| MEM INFO 3. bfffe880 00000141 |
| ROMSTAGE 4. bfffe860 00000004 |
| 57a9e000 5. bfffe840 00000010 |
| BS: BS_WRITE_TABLES times (us): entry 1 run 33612 exit 0 |
| POST: 0x7a |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'fallback/payload' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Unmatched 'cmos_layout.bin' at 221c0 |
| CBFS: Checking offset 229c0 |
| CBFS: File @ offset 229c0 size 660 |
| CBFS: Unmatched 'payload_config' at 229c0 |
| CBFS: Checking offset 23080 |
| CBFS: File @ offset 23080 size ea |
| CBFS: Unmatched 'payload_revision' at 23080 |
| CBFS: Checking offset 231c0 |
| CBFS: File @ offset 231c0 size 8 |
| CBFS: Unmatched 'etc/ps2-keyboard-spinup' at 231c0 |
| CBFS: Checking offset 23200 |
| CBFS: File @ offset 23200 size f |
| CBFS: Unmatched 'bootorder' at 23200 |
| CBFS: Checking offset 23280 |
| CBFS: File @ offset 23280 size 8 |
| CBFS: Unmatched 'etc/show-boot-menu' at 23280 |
| CBFS: Checking offset 232c0 |
| CBFS: File @ offset 232c0 size 11f2 |
| CBFS: Unmatched 'grub.cfg' at 232c0 |
| CBFS: Checking offset 24500 |
| CBFS: File @ offset 24500 size 998 |
| CBFS: Unmatched '' at 24500 |
| CBFS: Checking offset 24ec0 |
| CBFS: File @ offset 24ec0 size 10000 |
| CBFS: Unmatched 'mrc.cache' at 24ec0 |
| CBFS: Checking offset 34f00 |
| CBFS: File @ offset 34f00 size 17b7e |
| CBFS: Unmatched 'fallback/ramstage' at 34f00 |
| CBFS: Checking offset 4cac0 |
| CBFS: File @ offset 4cac0 size 345d |
| CBFS: Unmatched 'fallback/dsdt.aml' at 4cac0 |
| CBFS: Checking offset 4ff80 |
| CBFS: File @ offset 4ff80 size 18bd8 |
| CBFS: Unmatched 'img/coreinfo' at 4ff80 |
| CBFS: Checking offset 68b80 |
| CBFS: File @ offset 68b80 size 2255c |
| CBFS: Unmatched 'img/nvramcui' at 68b80 |
| CBFS: Checking offset 8b140 |
| CBFS: File @ offset 8b140 size 109ee |
| CBFS: Found @ offset 8b140 size 109ee |
| Loading segment from ROM address 0xff4a6278 |
| code (compression=1) |
| memalign Enter, boundary 8, size 28, free_mem_ptr bffd4c58 |
| memalign bffd4c58 |
| New segment dstaddr 0xdf860 memsize 0x207a0 srcaddr 0xff4a62b0 filesize 0x109b6 |
| Loading segment from ROM address 0xff4a6294 |
| Entry Point 0x000ff06e |
| Payload being loaded at below 1MiB without region being marked as RAM usable. |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4c74 |
| memalign bffd4c78 |
| Loading Segment: addr: 0x00000000000df860 memsz: 0x00000000000207a0 filesz: 0x00000000000109b6 |
| lb: [0x00000000bff94000, 0x00000000bffd7bd0) |
| Post relocation: addr: 0x00000000000df860 memsz: 0x00000000000207a0 filesz: 0x00000000000109b6 |
| using LZMA |
| [ 0x000df860, 00100000, 0x00100000) <- ff4a62b0 |
| dest 000df860, end 00100000, bouncebuffer ffffffff |
| Loaded segments |
| BS: BS_PAYLOAD_LOAD times (us): entry 0 run 28865 exit 0 |
| POST: 0x7b |
| PCH watchdog disabled |
| Jumping to boot code at 000ff06e(bff47000) |
| POST: 0xf8 |
| CPU0: stack: bffce000 - bffcf000, lowest used address bffcea20, stack used: 1504 bytes |
| ase 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:1c.0 child on link 0 PCI: 01:00.0 |
| PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 01:00.0 |
| PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| PCI: 00:1c.1 child on link 0 PCI: 02:00.0 |
| PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 02:00.0 |
| PCI: 02:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10 |
| PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30 |
| PCI: 00:1c.2Unknown device path type: 0 |
| child on link 0 |
| PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| Unknown device path type: 0 |
| |
| Unknown device path type: 0 |
| resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10 |
| Unknown device path type: 0 |
| resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14 |
| Unknown device path type: 0 |
| resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18 |
| PCI: 00:1c.3 |
| PCI: 00:1c.4 |
| PCI: 00:1c.5 |
| PCI: 00:1c.6 |
| PCI: 00:1c.7 |
| PCI: 00:1d.0 |
| PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| PCI: 00:1e.0 |
| PCI: 00:1f.0 child on link 0 PNP: 00ff.1 |
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200 |
| PCI: 00:1f.0 resource base 15e0 size c align 0 gra |
| *** Pre-CBMEM console overflowed, log truncated *** |
| 41f88200 |
| DBP [4400] = 1c8bbb |
| RAP [4404] = cc186465 |
| OTHP [440c] = a08b4 |
| OTHP [440c] = 8b4 |
| REFI [4698] = 6cd01860 |
| SRFTP [46a4] = 41f88200 |
| Done dimm mapping |
| Update PCI-E configuration space: |
| PCI(0, 0, 0)[a0] = 0 |
| PCI(0, 0, 0)[a4] = 4 |
| PCI(0, 0, 0)[bc] = cea00000 |
| PCI(0, 0, 0)[a8] = 2f600000 |
| PCI(0, 0, 0)[ac] = 4 |
| PCI(0, 0, 0)[b8] = c0000000 |
| PCI(0, 0, 0)[b0] = c0a00000 |
| PCI(0, 0, 0)[b4] = c0800000 |
| PCI(0, 0, 0)[7c] = 7f |
| PCI(0, 0, 0)[70] = fe000000 |
| PCI(0, 0, 0)[74] = 3 |
| PCI(0, 0, 0)[78] = fe000c00 |
| Done memory map |
| RCOMP...done |
| COMP2 done |
| COMP1 done |
| FORCE RCOMP and wait 20us...done |
| Done io registers |
| CPE |
| CP5b |
| CP5c |
| OTHP [400c] = 8b4 |
| OTHP [440c] = 8b4 |
| t123: 1767, 6000, 7620 |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : NO |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Recovery |
| ME: Current Operation State : Bring up |
| ME: Current Operation Mode : Normal |
| ME: Error Code : No Error |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Pseudo-global reset |
| ME: Progress Phase State : Waiting for DID BIOS message |
| ME: FWS2: 0x161f017a |
| ME: Bist in progress: 0x0 |
| ME: ICC Status : 0x1 |
| ME: Invoke MEBx : 0x1 |
| ME: CPU replaced : 0x1 |
| ME: MBP ready : 0x1 |
| ME: MFS failure : 0x1 |
| ME: Warm reset req : 0x0 |
| ME: CPU repl valid : 0x1 |
| ME: (Reserved) : 0x0 |
| ME: FW update req : 0x0 |
| ME: (Reserved) : 0x0 |
| ME: Current state : 0x1f |
| ME: Current PM event: 0x6 |
| ME: Progress code : 0x1 |
| Full training required |
| PASSED! Tell ME that DRAM is ready |
| ME: FWS2: 0x162c017a |
| ME: Bist in progress: 0x0 |
| ME: ICC Status : 0x1 |
| ME: Invoke MEBx : 0x1 |
| ME: CPU replaced : 0x1 |
| ME: MBP ready : 0x1 |
| ME: MFS failure : 0x1 |
| ME: Warm reset req : 0x0 |
| ME: CPU repl valid : 0x1 |
| ME: (Reserved) : 0x0 |
| ME: FW update req : 0x0 |
| ME: (Reserved) : 0x0 |
| ME: Current state : 0x2c |
| ME: Current PM event: 0x6 |
| ME: Progress code : 0x1 |
| ME: Requested BIOS Action: Continue to boot |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : NO |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Recovery |
| ME: Current Operation State : Bring up |
| ME: Current Operation Mode : Normal |
| ME: Error Code : No Error |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Pseudo-global reset |
| ME: Progress Phase State : 0x2c |
| memcfg DDR3 clock 1600 MHz |
| memcfg channel assignment: A: 0, B 1, C 2 |
| memcfg channel[0] config (00620020): |
| ECC inactive |
| enhanced interleave mode on |
| rank interleave on |
| DIMMA 8192 MB width x8 dual rank, selected |
| DIMMB 0 MB width x8 single rank |
| memcfg channel[1] config (00620020): |
| ECC inactive |
| enhanced interleave mode on |
| rank interleave on |
| DIMMA 8192 MB width x8 dual rank, selected |
| DIMMB 0 MB width x8 single rank |
| CBMEM: |
| IMD: root @ bffff000 254 entries. |
| IMD: root @ bfffec00 62 entries. |
| CBMEM entry for DIMM info: 0xbfffe880 |
| POST: 0x3b |
| POST: 0x3c |
| POST: 0x3d |
| TPM initialization. |
| TPM: Init |
| Found TPM ST33ZP24 by ST Microelectronics |
| TPM: Open |
| TPM: Startup |
| TPM: command 0x99 returned 0x0 |
| TPM: OK. |
| POST: 0x3f |
| MTRR Range: Start=ff000000 End=0 (Size 1000000) |
| MTRR Range: Start=0 End=1000000 (Size 1000000) |
| MTRR Range: Start=bf800000 End=c0000000 (Size 800000) |
| MTRR Range: Start=c0000000 End=c0800000 (Size 800000) |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'fallback/ramstage' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Unmatched 'cmos_layout.bin' at 221c0 |
| CBFS: Checking offset 229c0 |
| CBFS: File @ offset 229c0 size 660 |
| CBFS: Unmatched 'payload_config' at 229c0 |
| CBFS: Checking offset 23080 |
| CBFS: File @ offset 23080 size ea |
| CBFS: Unmatched 'payload_revision' at 23080 |
| CBFS: Checking offset 231c0 |
| CBFS: File @ offset 231c0 size 8 |
| CBFS: Unmatched 'etc/ps2-keyboard-spinup' at 231c0 |
| CBFS: Checking offset 23200 |
| CBFS: File @ offset 23200 size f |
| CBFS: Unmatched 'bootorder' at 23200 |
| CBFS: Checking offset 23280 |
| CBFS: File @ offset 23280 size 8 |
| CBFS: Unmatched 'etc/show-boot-menu' at 23280 |
| CBFS: Checking offset 232c0 |
| CBFS: File @ offset 232c0 size 11f2 |
| CBFS: Unmatched 'grub.cfg' at 232c0 |
| CBFS: Checking offset 24500 |
| CBFS: File @ offset 24500 size 998 |
| CBFS: Unmatched '' at 24500 |
| CBFS: Checking offset 24ec0 |
| CBFS: File @ offset 24ec0 size 10000 |
| CBFS: Unmatched 'mrc.cache' at 24ec0 |
| CBFS: Checking offset 34f00 |
| CBFS: File @ offset 34f00 size 17b7e |
| CBFS: Found @ offset 34f00 size 17b7e |
| Decompressing stage fallback/ramstage @ 0xbff93fc0 (277520 bytes) |
| Loading module at bff94000 with entry bff94000. filesize: 0x32a30 memsize: 0x43bd0 |
| Processing 3154 relocs. Offset value of 0xbfe94000 |
| |
| |
| coreboot-4.5-1640-g7e438af995 Tue Apr 25 04:15:46 UTC 2017 ramstage starting... |
| POST: 0x39 |
| POST: 0x80 |
| Normal boot. |
| POST: 0x70 |
| BS: BS_PRE_DEVICE times (us): entry 0 run 2 exit 0 |
| POST: 0x71 |
| BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 3 exit 0 |
| POST: 0x72 |
| Enumerating buses... |
| Show all devs... Before device enumeration. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 0 |
| PCI: 00:1c.4: enabled 0 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 00ff.1: enabled 1 |
| PNP: 0c31.0: enabled 1 |
| PNP: 00ff.2: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| I2C: 00:54: enabled 1 |
| I2C: 00:55: enabled 1 |
| I2C: 00:56: enabled 1 |
| I2C: 00:57: enabled 1 |
| I2C: 00:5c: enabled 1 |
| I2C: 00:5d: enabled 1 |
| I2C: 00:5e: enabled 1 |
| I2C: 00:5f: enabled 1 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 1 |
| Compare with tree... |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 0 |
| PCI: 00:1c.4: enabled 0 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 00ff.1: enabled 1 |
| PNP: 0c31.0: enabled 1 |
| PNP: 00ff.2: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| I2C: 00:54: enabled 1 |
| I2C: 00:55: enabled 1 |
| I2C: 00:56: enabled 1 |
| I2C: 00:57: enabled 1 |
| I2C: 00:5c: enabled 1 |
| I2C: 00:5d: enabled 1 |
| I2C: 00:5e: enabled 1 |
| I2C: 00:5f: enabled 1 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 1 |
| Root Device scanning... |
| root_dev_scan_bus for Root Device |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| DOMAIN: 0000 scanning... |
| PCI: pci_scan_bus for bus 00 |
| POST: 0x24 |
| PCI: 00:00.0 [8086/0154] ops |
| PCI: 00:00.0 [8086/0154] enabled |
| Capability: type 0x0d @ 0x88 |
| Capability: type 0x01 @ 0x80 |
| Capability: type 0x05 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| Capability: type 0x0d @ 0x88 |
| Capability: type 0x01 @ 0x80 |
| Capability: type 0x05 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| PCI: 00:01.0 subordinate bus PCI Express |
| PCI: 00:01.0 [8086/0151] disabled |
| PCI: 00:02.0 [8086/0000] ops |
| PCI: 00:02.0 [8086/0166] enabled |
| memalign Enter, boundary 8, size 152, free_mem_ptr bffd3bd0 |
| memalign bffd3bd0 |
| PCI: 00:04.0 [8086/0153] enabled |
| PCI: 00:14.0 [8086/0000] ops |
| PCI: 00:14.0 [8086/1e31] enabled |
| PCI: 00:16.0 [8086/1e3a] ops |
| PCI: 00:16.0 [8086/1e3a] enabled |
| PCI: 00:16.1: Disabling device |
| PCI: 00:16.2: Disabling device |
| PCI: 00:16.3: Disabling device |
| PCI: 00:19.0 [8086/1502] enabled |
| PCI: 00:1a.0 [8086/0000] ops |
| PCI: 00:1a.0 [8086/1e2d] enabled |
| PCI: 00:1b.0 [8086/0000] ops |
| PCI: 00:1b.0 [8086/1e20] enabled |
| PCH: PCIe Root Port coalescing is enabled |
| PCI: 00:1c.0 [8086/0000] bus ops |
| PCI: 00:1c.0 [8086/1e10] enabled |
| PCI: 00:1c.1 [8086/0000] bus ops |
| PCI: 00:1c.1 [8086/1e12] enabled |
| PCI: 00:1c.2 [8086/0000] bus ops |
| PCI: 00:1c.2 [8086/1e14] enabled |
| PCI: 00:1c.3: Disabling device |
| PCI: 00:1c.4: Disabling device |
| PCI: 00:1c.4: check set enabled |
| PCI: 00:1c.5: Disabling device |
| PCI: 00:1c.6: Disabling device |
| PCI: 00:1c.7: Disabling device |
| PCH: RPFN 0x76543210 -> 0xfedcb210 |
| PCI: 00:1d.0 [8086/0000] ops |
| PCI: 00:1d.0 [8086/1e26] enabled |
| PCI: 00:1e.0: Disabling device |
| PCI: 00:1f.0 [8086/0000] bus ops |
| PCI: 00:1f.0 [8086/1e55] enabled |
| PCI: 00:1f.2 [8086/0000] ops |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Found @ offset 221c0 size 7a0 |
| PCI: 00:1f.2 [8086/1e01] enabled |
| PCI: 00:1f.3 [8086/0000] bus ops |
| PCI: 00:1f.3 [8086/1e22] enabled |
| PCI: 00:1f.5: Disabling device |
| PCI: Static device PCI: 00:1f.6 not found, disabling it. |
| POST: 0x25 |
| PCI: 00:1c.0 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.0 |
| PCI: pci_scan_bus for bus 01 |
| POST: 0x24 |
| PCI: 01:00.0 [1180/0000] ops |
| PCI: 01:00.0 [1180/e822] enabled |
| POST: 0x25 |
| POST: 0x55 |
| Capability: type 0x05 @ 0x50 |
| Capability: type 0x01 @ 0x78 |
| Capability: type 0x10 @ 0x80 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| scan_bus: scanning of bus PCI: 00:1c.0 took 223 usecs |
| PCI: 00:1c.1 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.1 |
| memalign Enter, boundary 8, size 36, free_mem_ptr bffd3c68 |
| memalign bffd3c68 |
| PCI: pci_scan_bus for bus 02 |
| POST: 0x24 |
| memalign Enter, boundary 8, size 152, free_mem_ptr bffd3c8c |
| memalign bffd3c90 |
| PCI: 02:00.0 [168c/0030] enabled |
| POST: 0x25 |
| POST: 0x55 |
| Capability: type 0x01 @ 0x40 |
| Capability: type 0x05 @ 0x50 |
| Capability: type 0x10 @ 0x70 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpointASPM: Enabled L0s and L1 |
| scan_bus: scanning of bus PCI: 00:1c.1 took 210 usecs |
| PCI: 00:1c.2 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.2 |
| memalign Enter, boundary 8, size 36, free_mem_ptr bffd3d28 |
| memalign bffd3d28 |
| PCI: pci_scan_bus for bus 03 |
| POST: 0x24 |
| POST: 0x25 |
| POST: 0x55 |
| memalign Enter, boundary 8, size 152, free_mem_ptr bffd3d4c |
| memalign bffd3d50 |
| scan_bus: scanning of bus PCI: 00:1c.2 took 52 usecs |
| PCI: 00:1f.0 scanning... |
| scan_lpc_bus for PCI: 00:1f.0 |
| memalign Enter, boundary 8, size 2560, free_mem_ptr bffd3de8 |
| memalign bffd3de8 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Found @ offset 221c0 size 7a0 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Found @ offset 221c0 size 7a0 |
| PNP: 00ff.1 enabled |
| PNP: 0c31.0 enabled |
| recv_ec_data: 0x47 |
| recv_ec_data: 0x32 |
| recv_ec_data: 0x48 |
| recv_ec_data: 0x54 |
| recv_ec_data: 0x33 |
| recv_ec_data: 0x35 |
| recv_ec_data: 0x57 |
| recv_ec_data: 0x57 |
| recv_ec_data: 0x16 |
| recv_ec_data: 0x03 |
| recv_ec_data: 0x40 |
| recv_ec_data: 0x11 |
| EC Firmware ID G2HT35WW-3.22, Version 4.01B |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Found @ offset 221c0 size 7a0 |
| recv_ec_data: 0x00 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Found @ offset 221c0 size 7a0 |
| recv_ec_data: 0x70 |
| recv_ec_data: 0x90 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Found @ offset 221c0 size 7a0 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Found @ offset 221c0 size 7a0 |
| recv_ec_data: 0x70 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Found @ offset 221c0 size 7a0 |
| recv_ec_data: 0x70 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Found @ offset 221c0 size 7a0 |
| recv_ec_data: 0x00 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Found @ offset 221c0 size 7a0 |
| recv_ec_data: 0xa6 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 155a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 156c0 |
| CBFS: File @ offset 156c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 156c0 |
| CBFS: Checking offset 1af40 |
| CBFS: File @ offset 1af40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1af40 |
| CBFS: Checking offset 219c0 |
| CBFS: File @ offset 219c0 size 3ca |
| CBFS: Unmatched 'config' at 219c0 |
| CBFS: Checking offset 21e00 |
| CBFS: File @ offset 21e00 size 240 |
| CBFS: Unmatched 'revision' at 21e00 |
| CBFS: Checking offset 22080 |
| CBFS: File @ offset 22080 size 100 |
| CBFS: Unmatched 'cmos.default' at 22080 |
| CBFS: Checking offset 221c0 |
| CBFS: File @ offset 221c0 size 7a0 |
| CBFS: Found @ offset 221c0 size 7a0 |
| recv_ec_data: 0xa6 |
| recv_ec_data: 0x70 |
| PNP: 00ff.2 enabled |
| scan_lpc_bus for PCI: 00:1f.0 done |
| scan_bus: scanning of bus PCI: 00:1f.0 took 4715 usecs |
| PCI: 00:1f.3 scanning... |
| scan_generic_bus for PCI: 00:1f.3 |
| bus: PCI: 00:1f.3[0]->I2C: 01:54 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled |
| scan_generic_bus for PCI: 00:1f.3 done |
| scan_bus: scanning of bus PCI: 00:1f.3 took 18 usecs |
| POST: 0x55 |
| scan_bus: scanning of bus DOMAIN: 0000 took 5619 usecs |
| root_dev_scan_bus for Root Device done |
| scan_bus: scanning of bus Root Device took 5626 usecs |
| done |
| BS: BS_DEV_ENUMERATE times (us): entry 0 run 5728 exit 0 |
| POST: 0x73 |
| found VGA at PCI: 00:02.0 |
| Setting up VGA for PCI: 00:02.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| Allocating resources... |
| Reading resources... |
| Root Device read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 |
| Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000. |
| PCI: 00:1a.0 EHCI BAR hook registered |
| PCI: 00:1c.0 read_resources bus 1 link: 0 |
| PCI: 00:1c.0 read_resources bus 1 link: 0 done |
| PCI: 00:1c.1 read_resources bus 2 link: 0 |
| PCI: 00:1c.1 read_resources bus 2 link: 0 done |
| PCI: 00:1c.2 read_resources bus 3 link: 0 |
| PCI: 00:1c.2 read_resources bus 3 link: 0 done |
| More than one caller of pci_ehci_read_resources from PCI: 00:1d.0 |
| PCI: 00:1f.0 read_resources bus 0 link: 0 |
| PNP: 00ff.1 missing read_resources |
| PNP: 00ff.2 missing read_resources |
| PCI: 00:1f.0 read_resources bus 0 link: 0 done |
| PCI: 00:1f.3 read_resources bus 1 link: 0 |
| PCI: 00:1f.3 read_resources bus 1 link: 0 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 done |
| Root Device read_resources bus 0 link: 0 done |
| Done reading resources. |
| Show resources in subtree (Root Device)...After reading. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: acac |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 |
| PCI: 00:00.0 |
| PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 |
| PCI: 00:01.0 |
| PCI: 00:02.0 |
| PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18 |
| PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20 |
| PCI: 00:04.0 |
| PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:14.0 |
| PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:16.0 |
| PCI: 00:16.0 resource base 0 size 10 align 12 gran 4 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:19.0 |
| PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 |
| PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 |
| PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 |
| PCI: 00:1a.0 |
| PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:1c.0 child on link 0 PCI: 01:00.0 |
| PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| *** Pre-CBMEM console overflowed, log truncated *** |
| 41f88200 |
| DBP [4400] = 1c8bbb |
| RAP [4404] = cc186465 |
| OTHP [440c] = a08b4 |
| OTHP [440c] = 8b4 |
| REFI [4698] = 6cd01860 |
| SRFTP [46a4] = 41f88200 |
| Done dimm mapping |
| Update PCI-E configuration space: |
| PCI(0, 0, 0)[a0] = 0 |
| PCI(0, 0, 0)[a4] = 4 |
| PCI(0, 0, 0)[bc] = cea00000 |
| PCI(0, 0, 0)[a8] = 2f600000 |
| PCI(0, 0, 0)[ac] = 4 |
| PCI(0, 0, 0)[b8] = c0000000 |
| PCI(0, 0, 0)[b0] = c0a00000 |
| PCI(0, 0, 0)[b4] = c0800000 |
| PCI(0, 0, 0)[7c] = 7f |
| PCI(0, 0, 0)[70] = fe000000 |
| PCI(0, 0, 0)[74] = 3 |
| PCI(0, 0, 0)[78] = fe000c00 |
| Done memory map |
| RCOMP...done |
| COMP2 done |
| COMP1 done |
| FORCE RCOMP and wait 20us...done |
| Done io registers |
| CPE |
| CP5b |
| CP5c |
| OTHP [400c] = 8b4 |
| OTHP [440c] = 8b4 |
| t123: 1767, 6000, 7620 |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : NO |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Recovery |
| ME: Current Operation State : Bring up |
| ME: Current Operation Mode : Normal |
| ME: Error Code : No Error |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Pseudo-global reset |
| ME: Progress Phase State : Waiting for DID BIOS message |
| ME: FWS2: 0x161f017a |
| ME: Bist in progress: 0x0 |
| ME: ICC Status : 0x1 |
| ME: Invoke MEBx : 0x1 |
| ME: CPU replaced : 0x1 |
| ME: MBP ready : 0x1 |
| ME: MFS failure : 0x1 |
| ME: Warm reset req : 0x0 |
| ME: CPU repl valid : 0x1 |
| ME: (Reserved) : 0x0 |
| ME: FW update req : 0x0 |
| ME: (Reserved) : 0x0 |
| ME: Current state : 0x1f |
| ME: Current PM event: 0x6 |
| ME: Progress code : 0x1 |
| Full training required |
| PASSED! Tell ME that DRAM is ready |
| ME: FWS2: 0x162c017a |
| ME: Bist in progress: 0x0 |
| ME: ICC Status : 0x1 |
| ME: Invoke MEBx : 0x1 |
| ME: CPU replaced : 0x1 |
| ME: MBP ready : 0x1 |
| ME: MFS failure : 0x1 |
| ME: Warm reset req : 0x0 |
| ME: CPU repl valid : 0x1 |
| ME: (Reserved) : 0x0 |
| ME: FW update req : 0x0 |
| ME: (Reserved) : 0x0 |
| ME: Current state : 0x2c |
| ME: Current PM event: 0x6 |
| ME: Progress code : 0x1 |
| ME: Requested BIOS Action: Continue to boot |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : NO |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Recovery |
| ME: Current Operation State : Bring up |
| ME: Current Operation Mode : Normal |
| ME: Error Code : No Error |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Pseudo-global reset |
| ME: Progress Phase State : 0x2c |
| memcfg DDR3 clock 1600 MHz |
| memcfg channel assignment: A: 0, B 1, C 2 |
| memcfg channel[0] config (00620020): |
| ECC inactive |
| enhanced interleave mode on |
| rank interleave on |
| DIMMA 8192 MB width x8 dual rank, selected |
| DIMMB 0 MB width x8 single rank |
| memcfg channel[1] config (00620020): |
| ECC inactive |
| enhanced interleave mode on |
| rank interleave on |
| DIMMA 8192 MB width x8 dual rank, selected |
| DIMMB 0 MB w |
| -2147460535 bytes lost |