| |
| |
| coreboot-4.0-11681-g74d165b-dirty Tue Dec 1 23:39:03 UTC 2015 ramstage starting... |
| BS: BS_PRE_DEVICE times (us): entry 0 run 1 exit 0 |
| BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 5 exit 0 |
| Enumerating buses... |
| Show all devs... Before device enumeration. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:02.0: enabled 0 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 1 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1d.1: enabled 1 |
| PCI: 00:1d.2: enabled 1 |
| PCI: 00:1d.3: enabled 1 |
| PCI: 00:1d.7: enabled 1 |
| PCI: 00:1e.0: enabled 1 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 004e.0: enabled 0 |
| PNP: 004e.1: enabled 1 |
| PNP: 004e.2: enabled 1 |
| PNP: 004e.3: enabled 1 |
| PNP: 004e.5: enabled 1 |
| PNP: 004e.6: enabled 0 |
| PNP: 004e.7: enabled 0 |
| PNP: 004e.8: enabled 0 |
| PNP: 004e.9: enabled 0 |
| PNP: 004e.a: enabled 0 |
| PNP: 004e.b: enabled 1 |
| PCI: 00:1f.1: enabled 0 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| PCI: 00:1f.4: enabled 0 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| Compare with tree... |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:02.0: enabled 0 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 1 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1d.1: enabled 1 |
| PCI: 00:1d.2: enabled 1 |
| PCI: 00:1d.3: enabled 1 |
| PCI: 00:1d.7: enabled 1 |
| PCI: 00:1e.0: enabled 1 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 004e.0: enabled 0 |
| PNP: 004e.1: enabled 1 |
| PNP: 004e.2: enabled 1 |
| PNP: 004e.3: enabled 1 |
| PNP: 004e.5: enabled 1 |
| PNP: 004e.6: enabled 0 |
| PNP: 004e.7: enabled 0 |
| PNP: 004e.8: enabled 0 |
| PNP: 004e.9: enabled 0 |
| PNP: 004e.a: enabled 0 |
| PNP: 004e.b: enabled 1 |
| PCI: 00:1f.1: enabled 0 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| PCI: 00:1f.4: enabled 0 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| Root Device scanning... |
| root_dev_scan_bus for Root Device |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| DOMAIN: 0000 scanning... |
| PCI: pci_scan_bus for bus 00 |
| PCI: 00:00.0 [8086/a000] enabled |
| PCI: 00:1b.0 [8086/27d8] ops |
| PCI: 00:1b.0 [8086/27d8] enabled |
| PCI: 00:1c.0 [8086/0000] bus ops |
| PCI: 00:1c.0 [8086/27d0] enabled |
| PCI: 00:1c.1 [8086/0000] bus ops |
| PCI: 00:1c.1 [8086/27d2] enabled |
| PCI: 00:1c.2 [8086/0000] bus ops |
| PCI: 00:1c.2 [8086/27d4] enabled |
| PCI: 00:1c.3 [8086/0000] bus ops |
| PCI: 00:1c.3 [8086/27d6] enabled |
| PCI: 00:1d.0 [8086/27c8] ops |
| PCI: 00:1d.0 [8086/27c8] enabled |
| PCI: 00:1d.1 [8086/27c9] ops |
| PCI: 00:1d.1 [8086/27c9] enabled |
| PCI: 00:1d.2 [8086/27ca] ops |
| PCI: 00:1d.2 [8086/27ca] enabled |
| PCI: 00:1d.3 [8086/27cb] ops |
| PCI: 00:1d.3 [8086/27cb] enabled |
| PCI: 00:1d.7 [8086/27cc] ops |
| PCI: 00:1d.7 [8086/27cc] enabled |
| PCI: 00:1e.0 [8086/2448] bus ops |
| PCI: 00:1e.0 [8086/2448] enabled |
| PCI: 00:1f.0 [8086/0000] bus ops |
| PCI: 00:1f.0 [8086/27bc] enabled |
| PCI: 00:1f.2 [8086/0000] ops |
| PCI: 00:1f.2 [8086/27c0] enabled |
| PCI: 00:1f.3 [8086/27da] bus ops |
| PCI: 00:1f.3 [8086/27da] enabled |
| PCI: 00:1c.0 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.0 |
| PCI: pci_scan_bus for bus 01 |
| PCI: 01:00.0 [10ec/8168] enabled |
| scan_bus: scanning of bus PCI: 00:1c.0 took 11115 usecs |
| PCI: 00:1c.1 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.1 |
| PCI: pci_scan_bus for bus 02 |
| scan_bus: scanning of bus PCI: 00:1c.1 took 8147 usecs |
| PCI: 00:1c.2 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.2 |
| PCI: pci_scan_bus for bus 03 |
| scan_bus: scanning of bus PCI: 00:1c.2 took 8147 usecs |
| PCI: 00:1c.3 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.3 |
| PCI: pci_scan_bus for bus 04 |
| scan_bus: scanning of bus PCI: 00:1c.3 took 8147 usecs |
| PCI: 00:1e.0 scanning... |
| do_pci_scan_bridge for PCI: 00:1e.0 |
| PCI: pci_scan_bus for bus 05 |
| scan_bus: scanning of bus PCI: 00:1e.0 took 8157 usecs |
| PCI: 00:1f.0 scanning... |
| scan_lpc_bus for PCI: 00:1f.0 |
| PNP: 004e.0 disabled |
| PNP: 004e.1 enabled |
| PNP: 004e.2 enabled |
| PNP: 004e.3 enabled |
| PNP: 004e.5 enabled |
| PNP: 004e.6 disabled |
| PNP: 004e.7 disabled |
| PNP: 004e.8 disabled |
| PNP: 004e.9 disabled |
| PNP: 004e.a disabled |
| PNP: 004e.b enabled |
| scan_lpc_bus for PCI: 00:1f.0 done |
| scan_bus: scanning of bus PCI: 00:1f.0 took 28938 usecs |
| PCI: 00:1f.3 scanning... |
| scan_smbus for PCI: 00:1f.3 |
| scan_smbus for PCI: 00:1f.3 done |
| scan_bus: scanning of bus PCI: 00:1f.3 took 7776 usecs |
| scan_bus: scanning of bus DOMAIN: 0000 took 203310 usecs |
| root_dev_scan_bus for Root Device done |
| scan_bus: scanning of bus Root Device took 221117 usecs |
| done |
| BS: BS_DEV_ENUMERATE times (us): entry 0 run 391742 exit 0 |
| Allocating resources... |
| Reading resources... |
| Root Device read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 done |
| TOUUD 0x100000000 TOLUD 0xc0000000 TOM 0x200000000 |
| 8M UMA and 1M GTT |
| Available memory below 4GB: 3063M |
| Adding UMA memory area base=0xbf700000 size=0x900000 |
| DOMAIN: 0000 read_resources bus 0 link: 0 |
| PCI: 00:1c.0 read_resources bus 1 link: 0 |
| PCI: 00:1c.0 read_resources bus 1 link: 0 done |
| PCI: 00:1c.1 read_resources bus 2 link: 0 |
| PCI: 00:1c.1 read_resources bus 2 link: 0 done |
| PCI: 00:1c.2 read_resources bus 3 link: 0 |
| PCI: 00:1c.2 read_resources bus 3 link: 0 done |
| PCI: 00:1c.3 read_resources bus 4 link: 0 |
| PCI: 00:1c.3 read_resources bus 4 link: 0 done |
| PCI: 00:1e.0 read_resources bus 5 link: 0 |
| PCI: 00:1e.0 read_resources bus 5 link: 0 done |
| PCI: 00:1f.0 read_resources bus 0 link: 0 |
| PCI: 00:1f.0 read_resources bus 0 link: 0 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 done |
| Root Device read_resources bus 0 link: 0 done |
| Done reading resources. |
| Show resources in subtree (Root Device)...After reading. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 |
| DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 |
| DOMAIN: 0000 resource base c0000 size bf640000 align 0 gran 0 limit 0 flags e0004200 index 4 |
| DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 5 |
| DOMAIN: 0000 resource base bf700000 size 900000 align 0 gran 0 limit 0 flags f0000200 index 7 |
| PCI: 00:00.0 |
| PCI: 00:02.0 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:1c.0 child on link 0 PCI: 01:00.0 |
| PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 01:00.0 |
| PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10 |
| PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 1201 index 18 |
| PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20 |
| PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 index 30 |
| PCI: 00:1c.1 |
| PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 00:1c.2 |
| PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 00:1c.3 |
| PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 00:1d.0 |
| PCI: 00:1d.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 |
| PCI: 00:1d.1 |
| PCI: 00:1d.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 |
| PCI: 00:1d.2 |
| PCI: 00:1d.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 |
| PCI: 00:1d.3 |
| PCI: 00:1d.3 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 |
| PCI: 00:1d.7 |
| PCI: 00:1d.7 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| PCI: 00:1e.0 |
| PCI: 00:1e.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 00:1f.0 child on link 0 PNP: 004e.0 |
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PNP: 004e.0 |
| PNP: 004e.0 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60 |
| PNP: 004e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 004e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 |
| PNP: 004e.1 |
| PNP: 004e.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 |
| PNP: 004e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 004e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000800 index 74 |
| PNP: 004e.2 |
| PNP: 004e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 |
| PNP: 004e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 004e.3 |
| PNP: 004e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 |
| PNP: 004e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 004e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index f1 |
| PNP: 004e.5 |
| PNP: 004e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60 |
| PNP: 004e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62 |
| PNP: 004e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 004e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72 |
| PNP: 004e.5 resource base 80 size 1 align 0 gran 0 limit 0 flags c0000400 index f0 |
| PNP: 004e.6 |
| PNP: 004e.7 |
| PNP: 004e.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60 |
| PNP: 004e.7 resource base 0 size 2 align 1 gran 1 limit 7ff flags 100 index 62 |
| PNP: 004e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 004e.8 |
| PNP: 004e.9 |
| PNP: 004e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 30 |
| PNP: 004e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0 |
| PNP: 004e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f1 |
| PNP: 004e.a |
| PNP: 004e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 004e.b |
| PNP: 004e.b resource base 290 size 8 align 3 gran 3 limit fff flags c0000100 index 60 |
| PNP: 004e.b resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PCI: 00:1f.1 |
| PCI: 00:1f.2 |
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 |
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 |
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 |
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c |
| PCI: 00:1f.2 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 |
| PCI: 00:1f.2 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 24 |
| PCI: 00:1f.3 |
| PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 |
| PCI: 00:1f.4 |
| PCI: 00:1f.5 |
| PCI: 00:1f.6 |
| DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff |
| PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 01:00.0 10 * [0x0 - 0xff] io |
| PCI: 00:1c.0 io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1e.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1e.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.0 1c * [0x0 - 0xfff] io |
| PCI: 00:1d.0 20 * [0x1000 - 0x101f] io |
| PCI: 00:1d.1 20 * [0x1020 - 0x103f] io |
| PCI: 00:1d.2 20 * [0x1040 - 0x105f] io |
| PCI: 00:1d.3 20 * [0x1060 - 0x107f] io |
| PCI: 00:1f.2 20 * [0x1080 - 0x108f] io |
| PCI: 00:1f.2 10 * [0x1090 - 0x1097] io |
| PCI: 00:1f.2 18 * [0x1098 - 0x109f] io |
| PCI: 00:1f.2 14 * [0x10a0 - 0x10a3] io |
| PCI: 00:1f.2 1c * [0x10a4 - 0x10a7] io |
| DOMAIN: 0000 io: base: 10a8 size: 10a8 align: 12 gran: 0 limit: ffff done |
| DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff |
| PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 01:00.0 20 * [0x0 - 0x3fff] prefmem |
| PCI: 01:00.0 18 * [0x4000 - 0x4fff] prefmem |
| PCI: 00:1c.0 prefmem: base: 5000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 01:00.0 30 * [0x0 - 0x1ffff] mem |
| PCI: 00:1c.0 mem: base: 20000 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.2 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 00:1c.2 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.3 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 00:1c.3 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1e.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 00:1e.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.0 24 * [0x0 - 0xfffff] prefmem |
| PCI: 00:1c.0 20 * [0x100000 - 0x1fffff] mem |
| PCI: 00:1b.0 10 * [0x200000 - 0x203fff] mem |
| PCI: 00:1d.7 10 * [0x204000 - 0x2043ff] mem |
| PCI: 00:1f.2 24 * [0x205000 - 0x2053ff] mem |
| DOMAIN: 0000 mem: base: 205400 size: 205400 align: 20 gran: 0 limit: ffffffff done |
| avoid_fixed_resources: DOMAIN: 0000 |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff |
| constrain_resources: DOMAIN: 0000 03 base 00000000 limit 0009ffff mem (fixed) |
| constrain_resources: DOMAIN: 0000 04 base 000c0000 limit bf6fffff mem (fixed) |
| constrain_resources: DOMAIN: 0000 07 base bf700000 limit bfffffff mem (fixed) |
| constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed) |
| constrain_resources: PCI: 00:1f.0 10000100 base ff800000 limit ffffffff mem (fixed) |
| constrain_resources: PCI: 00:1f.0 03 base fec00000 limit fec00fff mem (fixed) |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 base fe900000 limit febfffff |
| Setting resources... |
| DOMAIN: 0000 io: base:1000 size:10a8 align:12 gran:0 limit:ffff |
| PCI: 00:1c.0 1c * [0x1000 - 0x1fff] io |
| PCI: 00:1d.0 20 * [0x2000 - 0x201f] io |
| PCI: 00:1d.1 20 * [0x2020 - 0x203f] io |
| PCI: 00:1d.2 20 * [0x2040 - 0x205f] io |
| PCI: 00:1d.3 20 * [0x2060 - 0x207f] io |
| PCI: 00:1f.2 20 * [0x2080 - 0x208f] io |
| PCI: 00:1f.2 10 * [0x2090 - 0x2097] io |
| PCI: 00:1f.2 18 * [0x2098 - 0x209f] io |
| PCI: 00:1f.2 14 * [0x20a0 - 0x20a3] io |
| PCI: 00:1f.2 1c * [0x20a4 - 0x20a7] io |
| DOMAIN: 0000 io: next_base: 20a8 size: 10a8 align: 12 gran: 0 done |
| PCI: 00:1c.0 io: base:1000 size:1000 align:12 gran:12 limit:1fff |
| PCI: 01:00.0 10 * [0x1000 - 0x10ff] io |
| PCI: 00:1c.0 io: next_base: 1100 size: 1000 align: 12 gran: 12 done |
| PCI: 00:1c.1 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:1c.1 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| PCI: 00:1c.2 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:1c.2 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| PCI: 00:1c.3 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:1c.3 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| PCI: 00:1e.0 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:1e.0 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| DOMAIN: 0000 mem: base:fe900000 size:205400 align:20 gran:0 limit:febfffff |
| PCI: 00:1c.0 24 * [0xfe900000 - 0xfe9fffff] prefmem |
| PCI: 00:1c.0 20 * [0xfea00000 - 0xfeafffff] mem |
| PCI: 00:1b.0 10 * [0xfeb00000 - 0xfeb03fff] mem |
| PCI: 00:1d.7 10 * [0xfeb04000 - 0xfeb043ff] mem |
| PCI: 00:1f.2 24 * [0xfeb05000 - 0xfeb053ff] mem |
| DOMAIN: 0000 mem: next_base: feb05400 size: 205400 align: 20 gran: 0 done |
| PCI: 00:1c.0 prefmem: base:fe900000 size:100000 align:20 gran:20 limit:fe9fffff |
| PCI: 01:00.0 20 * [0xfe900000 - 0xfe903fff] prefmem |
| PCI: 01:00.0 18 * [0xfe904000 - 0xfe904fff] prefmem |
| PCI: 00:1c.0 prefmem: next_base: fe905000 size: 100000 align: 20 gran: 20 done |
| PCI: 00:1c.0 mem: base:fea00000 size:100000 align:20 gran:20 limit:feafffff |
| PCI: 01:00.0 30 * [0xfea00000 - 0xfea1ffff] mem |
| PCI: 00:1c.0 mem: next_base: fea20000 size: 100000 align: 20 gran: 20 done |
| PCI: 00:1c.1 prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff |
| PCI: 00:1c.1 prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.1 mem: base:febfffff size:0 align:20 gran:20 limit:febfffff |
| PCI: 00:1c.1 mem: next_base: febfffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.2 prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff |
| PCI: 00:1c.2 prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.2 mem: base:febfffff size:0 align:20 gran:20 limit:febfffff |
| PCI: 00:1c.2 mem: next_base: febfffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.3 prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff |
| PCI: 00:1c.3 prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.3 mem: base:febfffff size:0 align:20 gran:20 limit:febfffff |
| PCI: 00:1c.3 mem: next_base: febfffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1e.0 prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff |
| PCI: 00:1e.0 prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1e.0 mem: base:febfffff size:0 align:20 gran:20 limit:febfffff |
| PCI: 00:1e.0 mem: next_base: febfffff size: 0 align: 20 gran: 20 done |
| Root Device assign_resources, bus 0 link: 0 |
| DOMAIN: 0000 03 <- [0x0000000000 - 0x000009ffff] size 0x000a0000 gran 0x00 mem |
| DOMAIN: 0000 04 <- [0x00000c0000 - 0x00bf6fffff] size 0xbf640000 gran 0x00 mem |
| DOMAIN: 0000 05 <- [0x00000a0000 - 0x00000bffff] size 0x00020000 gran 0x00 mem |
| DOMAIN: 0000 07 <- [0x00bf700000 - 0x00bfffffff] size 0x00900000 gran 0x00 mem |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| PCI: 00:1b.0 10 <- [0x00feb00000 - 0x00feb03fff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:1c.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io |
| PCI: 00:1c.0 24 <- [0x00fe900000 - 0x00fe9fffff] size 0x00100000 gran 0x14 bus 01 prefmem |
| PCI: 00:1c.0 20 <- [0x00fea00000 - 0x00feafffff] size 0x00100000 gran 0x14 bus 01 mem |
| PCI: 00:1c.0 assign_resources, bus 1 link: 0 |
| PCI: 01:00.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io |
| PCI: 01:00.0 18 <- [0x00fe904000 - 0x00fe904fff] size 0x00001000 gran 0x0c prefmem64 |
| PCI: 01:00.0 20 <- [0x00fe900000 - 0x00fe903fff] size 0x00004000 gran 0x0e prefmem64 |
| PCI: 01:00.0 30 <- [0x00fea00000 - 0x00fea1ffff] size 0x00020000 gran 0x11 romem |
| PCI: 00:1c.0 assign_resources, bus 1 link: 0 |
| PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io |
| PCI: 00:1c.1 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 02 prefmem |
| PCI: 00:1c.1 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 02 mem |
| PCI: 00:1c.2 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io |
| PCI: 00:1c.2 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 03 prefmem |
| PCI: 00:1c.2 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 03 mem |
| PCI: 00:1c.3 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io |
| PCI: 00:1c.3 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 04 prefmem |
| PCI: 00:1c.3 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 04 mem |
| PCI: 00:1d.0 20 <- [0x0000002000 - 0x000000201f] size 0x00000020 gran 0x05 io |
| PCI: 00:1d.1 20 <- [0x0000002020 - 0x000000203f] size 0x00000020 gran 0x05 io |
| PCI: 00:1d.2 20 <- [0x0000002040 - 0x000000205f] size 0x00000020 gran 0x05 io |
| PCI: 00:1d.3 20 <- [0x0000002060 - 0x000000207f] size 0x00000020 gran 0x05 io |
| PCI: 00:1d.7 10 <- [0x00feb04000 - 0x00feb043ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1e.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 05 io |
| PCI: 00:1e.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 05 prefmem |
| PCI: 00:1e.0 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 05 mem |
| PCI: 00:1f.0 assign_resources, bus 0 link: 0 |
| PNP: 004e.1 60 <- [0x0000000378 - 0x000000037f] size 0x00000008 gran 0x03 io |
| PNP: 004e.1 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq |
| PNP: 004e.1 74 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 drq |
| PNP: 004e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io |
| PNP: 004e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq |
| PNP: 004e.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io |
| PNP: 004e.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq |
| PNP: 004e.3 f1 <- [0x0000000000 - 0x0000000000] size 0x00000001 gran 0x00 irq |
| PNP: 004e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io |
| PNP: 004e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io |
| PNP: 004e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq |
| PNP: 004e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq |
| PNP: 004e.5 f0 <- [0x0000000080 - 0x0000000080] size 0x00000001 gran 0x00 irq |
| PNP: 004e.b 60 <- [0x0000000290 - 0x0000000297] size 0x00000008 gran 0x03 io |
| PNP: 004e.b 70 <- [0x0000000000 - 0x0000000000] size 0x00000001 gran 0x00 irq |
| PCI: 00:1f.0 assign_resources, bus 0 link: 0 |
| PCI: 00:1f.2 10 <- [0x0000002090 - 0x0000002097] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 14 <- [0x00000020a0 - 0x00000020a3] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 18 <- [0x0000002098 - 0x000000209f] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 1c <- [0x00000020a4 - 0x00000020a7] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 20 <- [0x0000002080 - 0x000000208f] size 0x00000010 gran 0x04 io |
| PCI: 00:1f.2 24 <- [0x00feb05000 - 0x00feb053ff] size 0x00000400 gran 0x0a mem |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| Root Device assign_resources, bus 0 link: 0 |
| Done setting resources. |
| Show resources in subtree (Root Device)...After assigning values. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 1000 size 10a8 align 12 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base fe900000 size 205400 align 20 gran 0 limit febfffff flags 40040200 index 10000100 |
| DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 |
| DOMAIN: 0000 resource base c0000 size bf640000 align 0 gran 0 limit 0 flags e0004200 index 4 |
| DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 5 |
| DOMAIN: 0000 resource base bf700000 size 900000 align 0 gran 0 limit 0 flags f0000200 index 7 |
| PCI: 00:00.0 |
| PCI: 00:02.0 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base feb00000 size 4000 align 14 gran 14 limit feb03fff flags 60000201 index 10 |
| PCI: 00:1c.0 child on link 0 PCI: 01:00.0 |
| PCI: 00:1c.0 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c |
| PCI: 00:1c.0 resource base fe900000 size 100000 align 20 gran 20 limit fe9fffff flags 60081202 index 24 |
| PCI: 00:1c.0 resource base fea00000 size 100000 align 20 gran 20 limit feafffff flags 60080202 index 20 |
| PCI: 01:00.0 |
| PCI: 01:00.0 resource base 1000 size 100 align 8 gran 8 limit 10ff flags 60000100 index 10 |
| PCI: 01:00.0 resource base fe904000 size 1000 align 12 gran 12 limit fe904fff flags 60001201 index 18 |
| PCI: 01:00.0 resource base fe900000 size 4000 align 14 gran 14 limit fe903fff flags 60001201 index 20 |
| PCI: 01:00.0 resource base fea00000 size 20000 align 17 gran 17 limit fea1ffff flags 60002200 index 30 |
| PCI: 00:1c.1 |
| PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:1c.1 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24 |
| PCI: 00:1c.1 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60080202 index 20 |
| PCI: 00:1c.2 |
| PCI: 00:1c.2 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:1c.2 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24 |
| PCI: 00:1c.2 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60080202 index 20 |
| PCI: 00:1c.3 |
| PCI: 00:1c.3 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:1c.3 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24 |
| PCI: 00:1c.3 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60080202 index 20 |
| PCI: 00:1d.0 |
| PCI: 00:1d.0 resource base 2000 size 20 align 5 gran 5 limit 201f flags 60000100 index 20 |
| PCI: 00:1d.1 |
| PCI: 00:1d.1 resource base 2020 size 20 align 5 gran 5 limit 203f flags 60000100 index 20 |
| PCI: 00:1d.2 |
| PCI: 00:1d.2 resource base 2040 size 20 align 5 gran 5 limit 205f flags 60000100 index 20 |
| PCI: 00:1d.3 |
| PCI: 00:1d.3 resource base 2060 size 20 align 5 gran 5 limit 207f flags 60000100 index 20 |
| PCI: 00:1d.7 |
| PCI: 00:1d.7 resource base feb04000 size 400 align 12 gran 10 limit feb043ff flags 60000200 index 10 |
| PCI: 00:1e.0 |
| PCI: 00:1e.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:1e.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24 |
| PCI: 00:1e.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60080202 index 20 |
| PCI: 00:1f.0 child on link 0 PNP: 004e.0 |
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PNP: 004e.0 |
| PNP: 004e.0 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60 |
| PNP: 004e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 004e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 |
| PNP: 004e.1 |
| PNP: 004e.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 |
| PNP: 004e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| PNP: 004e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000800 index 74 |
| PNP: 004e.2 |
| PNP: 004e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 |
| PNP: 004e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| PNP: 004e.3 |
| PNP: 004e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 |
| PNP: 004e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| PNP: 004e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags e0000400 index f1 |
| PNP: 004e.5 |
| PNP: 004e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60 |
| PNP: 004e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 62 |
| PNP: 004e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| PNP: 004e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72 |
| PNP: 004e.5 resource base 80 size 1 align 0 gran 0 limit 0 flags e0000400 index f0 |
| PNP: 004e.6 |
| PNP: 004e.7 |
| PNP: 004e.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60 |
| PNP: 004e.7 resource base 0 size 2 align 1 gran 1 limit 7ff flags 100 index 62 |
| PNP: 004e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 004e.8 |
| PNP: 004e.9 |
| PNP: 004e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 30 |
| PNP: 004e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0 |
| PNP: 004e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f1 |
| PNP: 004e.a |
| PNP: 004e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 004e.b |
| PNP: 004e.b resource base 290 size 8 align 3 gran 3 limit fff flags e0000100 index 60 |
| PNP: 004e.b resource base 0 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| PCI: 00:1f.1 |
| PCI: 00:1f.2 |
| PCI: 00:1f.2 resource base 2090 size 8 align 3 gran 3 limit 2097 flags 60000100 index 10 |
| PCI: 00:1f.2 resource base 20a0 size 4 align 2 gran 2 limit 20a3 flags 60000100 index 14 |
| PCI: 00:1f.2 resource base 2098 size 8 align 3 gran 3 limit 209f flags 60000100 index 18 |
| PCI: 00:1f.2 resource base 20a4 size 4 align 2 gran 2 limit 20a7 flags 60000100 index 1c |
| PCI: 00:1f.2 resource base 2080 size 10 align 4 gran 4 limit 208f flags 60000100 index 20 |
| PCI: 00:1f.2 resource base feb05000 size 400 align 12 gran 10 limit feb053ff flags 60000200 index 24 |
| PCI: 00:1f.3 |
| PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 |
| PCI: 00:1f.4 |
| PCI: 00:1f.5 |
| PCI: 00:1f.6 |
| Done allocating resources. |
| BS: BS_DEV_RESOURCES times (us): entry 0 run 2343003 exit 0 |
| Enabling resources... |
| PCI: 00:00.0 subsystem <- 0000/0000 |
| PCI: 00:00.0 cmd <- 06 |
| PCI: 00:1b.0 subsystem <- 0000/0000 |
| PCI: 00:1b.0 cmd <- 102 |
| PCI: 00:1c.0 bridge ctrl <- 0003 |
| PCI: 00:1c.0 subsystem <- 0000/0000 |
| PCI: 00:1c.0 cmd <- 107 |
| PCI: 00:1c.1 bridge ctrl <- 0003 |
| PCI: 00:1c.1 subsystem <- 0000/0000 |
| PCI: 00:1c.1 cmd <- 100 |
| PCI: 00:1c.2 bridge ctrl <- 0003 |
| PCI: 00:1c.2 subsystem <- 0000/0000 |
| PCI: 00:1c.2 cmd <- 100 |
| PCI: 00:1c.3 bridge ctrl <- 0003 |
| PCI: 00:1c.3 subsystem <- 0000/0000 |
| PCI: 00:1c.3 cmd <- 100 |
| PCI: 00:1d.0 subsystem <- 0000/0000 |
| PCI: 00:1d.0 cmd <- 01 |
| PCI: 00:1d.1 subsystem <- 0000/0000 |
| PCI: 00:1d.1 cmd <- 01 |
| PCI: 00:1d.2 subsystem <- 0000/0000 |
| PCI: 00:1d.2 cmd <- 01 |
| PCI: 00:1d.3 subsystem <- 0000/0000 |
| PCI: 00:1d.3 cmd <- 01 |
| PCI: 00:1d.7 subsystem <- 0000/0000 |
| PCI: 00:1d.7 cmd <- 102 |
| PCI: 00:1e.0 bridge ctrl <- 0003 |
| PCI: 00:1e.0 subsystem <- 0000/0000 |
| PCI: 00:1e.0 cmd <- 100 (NOT WRITTEN!) |
| PCI: 00:1f.0 subsystem <- 0000/0000 |
| PCI: 00:1f.0 cmd <- 107 |
| PCI: 00:1f.2 subsystem <- 0000/0000 |
| PCI: 00:1f.2 cmd <- 03 |
| PCI: 00:1f.3 subsystem <- 0000/0000 |
| PCI: 00:1f.3 cmd <- 101 |
| PCI: 01:00.0 cmd <- 03 |
| done. |
| BS: BS_DEV_ENABLE times (us): entry 0 run 101657 exit 0 |
| Initializing devices... |
| CPU_CLUSTER: 0 init ... |
| start_eip=0x00001000, code_size=0x00000031 |
| Initializing CPU #0 |
| CPU: vendor Intel device 106ca |
| CPU: family 06, model 1c, stepping 0a |
| Enabling cache |
| CBFS @ 0 size ff000 |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 0 size 8c00 |
| microcode: sig=0x106ca pf=0x8 revision=0x0 |
| microcode: updated to revision 0x107 date=2009-08-25 |
| CPU: Intel(R) Atom(TM) CPU D510 @ 1.66GHz. |
| MTRR: Physical address space: |
| 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 |
| 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 |
| 0x00000000000c0000 - 0x00000000bf700000 size 0xbf640000 type 6 |
| 0x00000000bf700000 - 0x0000000100000000 size 0x40900000 type 0 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| MTRR: default type WB/UC MTRR counts: 3/4. |
| MTRR: WB selected as default type. |
| MTRR: 0 base 0x00000000bf700000 mask 0x0000000ffff00000 type 0 |
| MTRR: 1 base 0x00000000bf800000 mask 0x0000000fff800000 type 0 |
| MTRR: 2 base 0x00000000c0000000 mask 0x0000000fc0000000 type 0 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local apic... apic_id: 0x00 done. |
| CPU: 0 4 siblings |
| CPU: 0 has sibling 1 |
| CPU: 0 has sibling 2 |
| CPU: 0 has sibling 3 |
| CPU #0 initialized |
| CPU1: stack_base 00123000, stack_end 00123ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 1. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 1. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #1 |
| CPU: vendor Intel device 106ca |
| CPU: family 06, model 1c, stepping 0a |
| Enabling cache |
| CBFS @ 0 size ff000 |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 0 size 8c00 |
| microcode: sig=0x106ca pf=0x8 revision=0x107 |
| CPU: Intel(R) Atom(TM) CPU D510 @ 1.66GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local apic... apic_id: 0x01 done. |
| CPU: 1 4 siblings |
| CPU #1 initialized |
| CPU 1 going down... |
| CPU2: stack_base 00122000, stack_end 00122ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 2. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 2. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #2 |
| CPU: vendor Intel device 106ca |
| CPU: family 06, model 1c, stepping 0a |
| Enabling cache |
| CBFS @ 0 size ff000 |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 0 size 8c00 |
| microcode: sig=0x106ca pf=0x8 revision=0x0 |
| microcode: updated to revision 0x107 date=2009-08-25 |
| CPU: Intel(R) Atom(TM) CPU D510 @ 1.66GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local apic... apic_id: 0x02 done. |
| CPU: 2 4 siblings |
| CPU #2 initialized |
| CPU 2 going down... |
| CPU3: stack_base 00121000, stack_end 00121ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 3. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 3. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #3 |
| Waiting for 1 CPUS to stop |
| CPU: vendor Intel device 106ca |
| CPU: family 06, model 1c, stepping 0a |
| Enabling cache |
| CBFS @ 0 size ff000 |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 0 size 8c00 |
| microcode: sig=0x106ca pf=0x8 revision=0x107 |
| CPU: Intel(R) Atom(TM) CPU D510 @ 1.66GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local apic... apic_id: 0x03 done. |
| CPU: 3 4 siblings |
| CPU #3 initialized |
| CPU 3 going down... |
| All AP CPUs stopped (8300 loops) |
| CPU0: stack: 00124000 - 00125000, lowest used address 00124b4c, stack used: 1204 bytes |
| CPU1: stack: 00123000 - 00124000, lowest used address 00123c98, stack used: 872 bytes |
| CPU2: stack: 00122000 - 00123000, lowest used address 00122c98, stack used: 872 bytes |
| CPU3: stack: 00121000 - 00122000, lowest used address 00121c98, stack used: 872 bytes |
| Initializing SMM handler... ... pmbase = 0x0500 |
| |
| SMI_STS: PM1 |
| PM1_STS: WAK PWRBTN TMROF |
| GPE0_STS: GPIO15 GPIO14 GPIO11 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 |
| ALT_GP_SMI_STS: GPI15 GPI14 GPI11 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 |
| TCO_STS: INTRD_DET |
| ... raise SMI# |
| considering CPU 0x00 for SMM init |
| considering CPU 0x01 for SMM init |
| CPU1: stack_base 00123000, stack_end 00123ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 1. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 1. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #1 |
| CPU: vendor Intel device 106ca |
| CPU: family 06, model 1c, stepping 0a |
| Enabling cache |
| CBFS @ 0 size ff000 |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 0 size 8c00 |
| microcode: sig=0x106ca pf=0x8 revision=0x107 |
| CPU: Intel(R) Atom(TM) CPU D510 @ 1.66GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local apic... apic_id: 0x01 done. |
| CPU: 1 4 siblings |
| CPU #1 initialized |
| CPU 1 going down... |
| considering CPU 0x02 for SMM init |
| CPU2: stack_base 00122000, stack_end 00122ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 2. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 2. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #2 |
| CPU: vendor Intel device 106ca |
| CPU: family 06, model 1c, stepping 0a |
| Enabling cache |
| CBFS @ 0 size ff000 |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 0 size 8c00 |
| microcode: sig=0x106ca pf=0x8 revision=0x107 |
| CPU: Intel(R) Atom(TM) CPU D510 @ 1.66GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local apic... apic_id: 0x02 done. |
| CPU: 2 4 siblings |
| CPU #2 initialized |
| CPU 2 going down... |
| considering CPU 0x03 for SMM init |
| CPU3: stack_base 00121000, stack_end 00121ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 3. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 3. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #3 |
| CPU: vendor Intel device 106ca |
| CPU: family 06, model 1c, stepping 0a |
| Enabling cache |
| CBFS @ 0 size ff000 |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 0 size 8c00 |
| microcode: sig=0x106ca pf=0x8 revision=0x107 |
| CPU: Intel(R) Atom(TM) CPU D510 @ 1.66GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local apic... apic_id: 0x03 done. |
| CPU: 3 4 siblings |
| CPU #3 initialized |
| CPU 3 going down... |
| CPU_CLUSTER: 0 init finished in 1037295 usecs |
| DOMAIN: 0000 init ... |
| DOMAIN: 0000 init finished in 2013 usecs |
| PCI: 00:00.0 init ... |
| PCI: 00:00.0 init finished in 2014 usecs |
| PCI: 00:1b.0 init ... |
| Azalia: codec type: Azalia |
| Azalia: base = feb00000 |
| Azalia: codec_mask = 04 |
| Azalia: Initializing codec #2 |
| Azalia: codec viddid: 10ec0662 |
| Azalia: No verb! |
| PCI: 00:1b.0 init finished in 18952 usecs |
| PCI: 00:1c.0 init ... |
| Initializing ICH7 PCIe bridge. |
| PCI: 00:1c.0 init finished in 4807 usecs |
| PCI: 00:1c.1 init ... |
| Initializing ICH7 PCIe bridge. |
| PCI: 00:1c.1 init finished in 4816 usecs |
| PCI: 00:1c.2 init ... |
| Initializing ICH7 PCIe bridge. |
| PCI: 00:1c.2 init finished in 4817 usecs |
| PCI: 00:1c.3 init ... |
| Initializing ICH7 PCIe bridge. |
| PCI: 00:1c.3 init finished in 4808 usecs |
| PCI: 00:1d.0 init ... |
| UHCI: Setting up controller.. done. |
| PCI: 00:1d.0 init finished in 5257 usecs |
| PCI: 00:1d.1 init ... |
| UHCI: Setting up controller.. done. |
| PCI: 00:1d.1 init finished in 5257 usecs |
| PCI: 00:1d.2 init ... |
| UHCI: Setting up controller.. done. |
| PCI: 00:1d.2 init finished in 5258 usecs |
| PCI: 00:1d.3 init ... |
| UHCI: Setting up controller.. done. |
| PCI: 00:1d.3 init finished in 5258 usecs |
| PCI: 00:1d.7 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1d.7 init finished in 5249 usecs |
| PCI: 00:1e.0 init ... |
| PCI: 00:1e.0 init finished in 2018 usecs |
| PCI: 00:1f.0 init ... |
| i82801gx: lpc_init |
| IOAPIC: Initializing IOAPIC at 0xfec00000 |
| IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| IOAPIC: ID = 0x02 |
| IOAPIC: Dumping registers |
| reg 0x0000: 0x02000000 |
| reg 0x0001: 0x00170020 |
| reg 0x0002: 0x00170020 |
| Set power on after power failure. |
| NMI sources disabled. |
| rtc_failed = 0x0 |
| RTC Init |
| Disabling ACPI via APMC: |
| done. |
| Locking SMM. |
| PCI: 00:1f.0 init finished in 34340 usecs |
| PCI: 00:1f.2 init ... |
| i82801gx_sata: initializing... |
| SATA controller in combined mode. |
| PCI: 00:1f.2 init finished in 7875 usecs |
| PCI: 01:00.0 init ... |
| PCI: 01:00.0 init finished in 2013 usecs |
| PNP: 004e.1 init ... |
| PNP: 004e.1 init finished in 1923 usecs |
| PNP: 004e.2 init ... |
| PNP: 004e.2 init finished in 1925 usecs |
| PNP: 004e.3 init ... |
| PNP: 004e.3 init finished in 1925 usecs |
| PNP: 004e.5 init ... |
| PNP: 004e.5 init finished in 1925 usecs |
| PNP: 004e.b init ... |
| PNP: 004e.b init finished in 1925 usecs |
| Devices initialized |
| Show all devs... After init. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:02.0: enabled 0 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 1 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1d.1: enabled 1 |
| PCI: 00:1d.2: enabled 1 |
| PCI: 00:1d.3: enabled 1 |
| PCI: 00:1d.7: enabled 1 |
| PCI: 00:1e.0: enabled 1 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 004e.0: enabled 0 |
| PNP: 004e.1: enabled 1 |
| PNP: 004e.2: enabled 1 |
| PNP: 004e.3: enabled 1 |
| PNP: 004e.5: enabled 1 |
| PNP: 004e.6: enabled 0 |
| PNP: 004e.7: enabled 0 |
| PNP: 004e.8: enabled 0 |
| PNP: 004e.9: enabled 0 |
| PNP: 004e.a: enabled 0 |
| PNP: 004e.b: enabled 1 |
| PCI: 00:1f.1: enabled 0 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| PCI: 00:1f.4: enabled 0 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| PCI: 01:00.0: enabled 1 |
| APIC: 01: enabled 1 |
| APIC: 02: enabled 1 |
| APIC: 03: enabled 1 |
| BS: BS_DEV_INIT times (us): entry 0 run 1333988 exit 0 |
| CBMEM: |
| IMD: root @ bf6ff000 254 entries. |
| IMD: root @ bf6fec00 62 entries. |
| Moving GDT to bf6fea00...ok |
| Finalize devices... |
| Devices finalized |
| BS: BS_POST_DEVICE times (us): entry 9296 run 3506 exit 0 |
| BS: BS_OS_RESUME_CHECK times (us): entry 0 run 1 exit 0 |
| CBFS @ 0 size ff000 |
| CBFS: Locating 'fallback/dsdt.aml' |
| CBFS: Found @ offset 14080 size 1dfb |
| CBFS @ 0 size ff000 |
| CBFS: Locating 'fallback/slic' |
| CBFS: 'fallback/slic' not found. |
| ACPI: Writing ACPI tables at bf6ba000. |
| ACPI: * FACS |
| ACPI: * DSDT |
| ACPI: * FADT |
| ACPI: added table 1/32, length now 40 |
| ACPI: * SSDT |
| ACPI: * MCFG |
| ACPI: * TCPA |
| TCPA log created at bf6aa000 |
| ACPI: added table 2/32, length now 44 |
| ACPI: * MADT |
| ACPI: added table 3/32, length now 48 |
| current = bf6bc250 |
| ACPI: * HPET |
| ACPI: added table 4/32, length now 52 |
| ACPI: done. |
| ACPI tables: 8848 bytes. |
| smbios_write_tables: bf6a9000 |
| Root Device (Intel D510MO) |
| CPU_CLUSTER: 0 (Intel Pineview Northbridge) |
| APIC: 00 (unknown) |
| DOMAIN: 0000 (Intel Pineview Northbridge) |
| PCI: 00:00.0 (Intel Pineview Northbridge) |
| PCI: 00:02.0 (Intel Pineview Northbridge) |
| PCI: 00:1b.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1c.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1c.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1c.2 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1c.3 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1d.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1d.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1d.2 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1d.3 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1d.7 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1e.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1f.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PNP: 004e.0 (Winbond W83627THG Super I/O) |
| PNP: 004e.1 (Winbond W83627THG Super I/O) |
| PNP: 004e.2 (Winbond W83627THG Super I/O) |
| PNP: 004e.3 (Winbond W83627THG Super I/O) |
| PNP: 004e.5 (Winbond W83627THG Super I/O) |
| PNP: 004e.6 (Winbond W83627THG Super I/O) |
| PNP: 004e.7 (Winbond W83627THG Super I/O) |
| PNP: 004e.8 (Winbond W83627THG Super I/O) |
| PNP: 004e.9 (Winbond W83627THG Super I/O) |
| PNP: 004e.a (Winbond W83627THG Super I/O) |
| PNP: 004e.b (Winbond W83627THG Super I/O) |
| PCI: 00:1f.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1f.2 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1f.3 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1f.4 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1f.5 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1f.6 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 01:00.0 (unknown) |
| APIC: 01 (unknown) |
| APIC: 02 (unknown) |
| APIC: 03 (unknown) |
| SMBIOS tables: 344 bytes. |
| Writing table forward entry at 0x00000500 |
| Wrote coreboot table at: 00000500, 0x10 bytes, checksum 3074 |
| Table forward entry ends at 0x00000528. |
| ... aligned to 0x00001000 |
| Writing coreboot table at 0xbf6a1000 |
| rom_table_end = 0xbf6a1000 |
| ... aligned to 0xbf6b0000 |
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1. 0000000000001000-000000000009ffff: RAM |
| 2. 00000000000a0000-00000000000bffff: RESERVED |
| 3. 00000000000c0000-00000000bf6a0fff: RAM |
| 4. 00000000bf6a1000-00000000bf6fffff: CONFIGURATION TABLES |
| 5. 00000000bf700000-00000000bfffffff: RESERVED |
| CBFS @ 0 size ff000 |
| No FMAP found at 0 offset. |
| Wrote coreboot table at: bf6a1000, 0x228 bytes, checksum 942c |
| coreboot table: 576 bytes. |
| IMD ROOT 0. bf6ff000 00001000 |
| IMD SMALL 1. bf6fe000 00001000 |
| CONSOLE 2. bf6de000 00020000 |
| ACPI 3. bf6ba000 00024000 |
| TCPA LOG 4. bf6aa000 00010000 |
| SMBIOS 5. bf6a9000 00000800 |
| COREBOOT 6. bf6a1000 00008000 |
| IMD small region: |
| IMD ROOT 0. bf6fec00 00000400 |
| GDT 1. bf6fea00 00000200 |
| ACPI GNVS 2. bf6fe900 00000100 |
| BS: BS_WRITE_TABLES times (us): entry 0 run 323884 exit 0 |
| CBFS provider active. |
| CBFS @ 0 size ff000 |
| CBFS: Locating 'fallback/payload' |
| CBFS: Found @ offset 1e2c0 size 45551 |
| 'fallback/payload' located at offset: 1e2f8 size: 45551 |
| Loading segment from rom address 0xfff1e2f8 |
| code (compression=1) |
| New segment dstaddr 0x8200 memsize 0x1aec4 srcaddr 0xfff1e34c filesize 0x94b0 |
| Loading segment from rom address 0xfff1e314 |
| code (compression=1) |
| New segment dstaddr 0x100000 memsize 0xbcd38 srcaddr 0xfff277fc filesize 0x3c04d |
| Loading segment from rom address 0xfff1e330 |
| Entry Point 0x00008200 |
| Bounce Buffer at bf597000, 1089192 bytes |
| Loading Segment: addr: 0x0000000000008200 memsz: 0x000000000001aec4 filesz: 0x00000000000094b0 |
| lb: [0x0000000000100000, 0x000000000014d170) |
| Post relocation: addr: 0x0000000000008200 memsz: 0x000000000001aec4 filesz: 0x00000000000094b0 |
| using LZMA |
| [ 0x00008200, 0001b69b, 0x000230c4) <- fff1e34c |
| Clearing Segment: addr: 0x000000000001b69b memsz: 0x0000000000007a29 |
| dest 00008200, end 000230c4, bouncebuffer bf597000 |
| Loading Segment: addr: 0x0000000000100000 memsz: 0x00000000000bcd38 filesz: 0x000000000003c04d |
| lb: [0x0000000000100000, 0x000000000014d170) |
| segment: [0x0000000000100000, 0x000000000013c04d, 0x00000000001bcd38) |
| bounce: [0x00000000bf597000, 0x00000000bf5d304d, 0x00000000bf653d38) |
| Post relocation: addr: 0x00000000bf597000 memsz: 0x00000000000bcd38 filesz: 0x000000000003c04d |
| using LZMA |
| [ 0xbf597000, bf653d38, 0xbf653d38) <- fff277fc |
| dest bf597000, end bf653d38, bouncebuffer bf597000 |
| move suffix around: from bf5e4170, to 14d170, amount: 6fbc8 |
| Loaded segments |
| BS: BS_PAYLOAD_LOAD times (us): entry 0 run 290381 exit 0 |
| ICH7 watchdog disabled |
| Jumping to boot code at 00008200(bf6a1000) |
| CPU0: stack: 00124000 - 00125000, lowest used address 00124b4c, stack used: 1204 bytes |
| entry = 0x00008200 |
| lb_start = 0x00100000 |
| lb_size = 0x0004d170 |
| buffer = 0xbf597000 |
| |