|
|
|
|
| coreboot-4.0-6728-g8801011 Sam Aug 16 09:48:47 CEST 2014 starting...
|
| running main(bist = 0)
|
| WARNING: Ignoring S4-assertion-width violation.
|
| Stepping B3
|
| 2 CPU cores
|
| iTPM enabled
|
| ME enabled
|
| AMT enabled
|
| capable of DDR2 of 800 MHz or lower
|
| VT-d enabled
|
| GMCH: GM45
|
| TXT enabled
|
| Render frequency: 533 MHz
|
| IGD enabled
|
| PCIe-to-GMCH enabled
|
| GMCH supports DDR3 with 1067 MT or less
|
| GMCH supports FSB with up to 1067 MHz
|
| SMBus controller enabled.
|
| 0:50:b
|
| 2:51:b
|
| DDR mask 5, DDR 3
|
| Bank 0 populated:
|
| Raw card type: F
|
| Row addr bits: 14
|
| Col addr bits: 10
|
| byte width: 1
|
| page size: 1024
|
| banks: 8
|
| ranks: 2
|
| tAAmin: 105
|
| tCKmin: 15
|
| Max clock: 533 MHz
|
| CAS: 0x01c0
|
| Bank 1 populated:
|
| Raw card type: F
|
| Row addr bits: 14
|
| Col addr bits: 10
|
| byte width: 1
|
| page size: 1024
|
| banks: 8
|
| ranks: 2
|
| tAAmin: 105
|
| tCKmin: 15
|
| Max clock: 533 MHz
|
| CAS: 0x01c0
|
| Trying CAS 7, tCK 15.
|
| Found compatible clock / CAS pair: 533 / 7.
|
| Timing values:
|
| tCLK: 15
|
| tRAS: 20
|
| tRP: 7
|
| tRCD: 7
|
| tRFC: 68
|
| tWR: 8
|
| tRD: 11
|
| tRRD: 4
|
| tFAW: 20
|
| tWL: 6
|
| Changing memory frequency: old 3, new 6.
|
| Setting IGD memory frequencies for VCO #1.
|
| Memory configured in dual-channel assymetric mode.
|
| Memory map:
|
| TOM = 512MB
|
| TOLUD = 512MB
|
| TOUUD = 512MB
|
| REMAP: base = 65535MB
|
| limit = 0MB
|
| usedMEsize: 0MB
|
| Performing Jedec initialization at address 0x00000000.
|
| Performing Jedec initialization at address 0x08000000.
|
| Performing Jedec initialization at address 0x10000000.
|
| Performing Jedec initialization at address 0x18000000.
|
| Final timings for group 0 on channel 0: 6.1.0.5.4
|
| Final timings for group 1 on channel 0: 6.0.2.7.7
|
| Final timings for group 2 on channel 0: 6.1.2.3.6
|
| Final timings for group 3 on channel 0: 6.1.2.1.0
|
| Final timings for group 0 on channel 1: 6.1.0.3.0
|
| Final timings for group 1 on channel 1: 6.0.2.7.5
|
| Final timings for group 2 on channel 1: 6.1.2.1.2
|
| Final timings for group 3 on channel 1: 6.1.0.8.3
|
| Lower bound for byte lane 0 on channel 0: 0.0
|
| Upper bound for byte lane 0 on channel 0: 8.4
|
| Final timings for byte lane 0 on channel 0: 4.2
|
| Lower bound for byte lane 1 on channel 0: 0.0
|
| Upper bound for byte lane 1 on channel 0: 9.3
|
| Final timings for byte lane 1 on channel 0: 4.5
|
| Lower bound for byte lane 2 on channel 0: 0.0
|
| Upper bound for byte lane 2 on channel 0: 8.3
|
| Final timings for byte lane 2 on channel 0: 4.1
|
| Lower bound for byte lane 3 on channel 0: 0.0
|
| Upper bound for byte lane 3 on channel 0: 9.4
|
| Final timings for byte lane 3 on channel 0: 4.6
|
| Lower bound for byte lane 4 on channel 0: 0.0
|
| Upper bound for byte lane 4 on channel 0: 9.3
|
| Final timings for byte lane 4 on channel 0: 4.5
|
| Lower bound for byte lane 5 on channel 0: 0.0
|
| Upper bound for byte lane 5 on channel 0: 7.7
|
| Final timings for byte lane 5 on channel 0: 3.7
|
| Lower bound for byte lane 6 |
| |
| *** Log truncated, 2353 characters dropped. *** |
| |
| exit main()
|
| Trying CBFS ramstage loader.
|
| CBFS: loading stage fallback/ramstage @ 0x100000 (299068 bytes), entry @ 0x100000
|
| coreboot-4.0-6728-g8801011 Sam Aug 16 09:48:47 CEST 2014 booting...
|
| BS: Entering BS_PRE_DEVICE state.
|
| CBMEM: recovering 5/254 entries from root @ bdbff000
|
| Moving GDT to bdbdb000...ok
|
| BS: Exiting BS_PRE_DEVICE state.
|
| BS: Entering BS_DEV_INIT_CHIPS state.
|
| Initializing i82801ix southbridge...
|
| BS: Exiting BS_DEV_INIT_CHIPS state.
|
| BS: Entering BS_DEV_ENUMERATE state.
|
| Enumerating buses...
|
| Show all devs...Before device enumeration.
|
| Root Device: enabled 1
|
| CPU_CLUSTER: 0: enabled 1
|
| APIC: 00: enabled 1
|
| APIC: acac: enabled 0
|
| DOMAIN: 0000: enabled 1
|
| PCI: 00:00.0: enabled 1
|
| PCI: 00:02.0: enabled 1
|
| PCI: 00:02.1: enabled 1
|
| PCI: 00:03.0: enabled 1
|
| PCI: 00:03.1: enabled 0
|
| PCI: 00:03.2: enabled 0
|
| PCI: 00:03.3: enabled 0
|
| IOAPIC: 02: enabled 1
|
| PCI: 00:19.0: enabled 1
|
| PCI: 00:1a.0: enabled 1
|
| PCI: 00:1a.1: enabled 1
|
| PCI: 00:1a.2: enabled 1
|
| PCI: 00:1a.7: enabled 1
|
| PCI: 00:1b.0: enabled 1
|
| PCI: 00:1c.0: enabled 1
|
| PCI: 00:1c.1: enabled 1
|
| PCI: 00:1c.2: enabled 1
|
| PCI: 00:1c.3: enabled 1
|
| PCI: 00:1c.4: enabled 0
|
| PCI: 00:1c.5: enabled 0
|
| PCI: 00:1d.0: enabled 1
|
| PCI: 00:1d.1: enabled 1
|
| PCI: 00:1d.2: enabled 1
|
| PCI: 00:1d.7: enabled 1
|
| PCI: 00:1e.0: enabled 1
|
| PCI: 00:03.0: enabled 1
|
| PCI: 00:03.1: enabled 1
|
| PCI: 00:03.2: enabled 0
|
| PCI: 00:03.3: enabled 0
|
| PCI: 00:03.4: enabled 0
|
| PCI: 00:1f.0: enabled 1
|
| PNP: 00ff.1: enabled 1
|
| PNP: 00ff.2: enabled 1
|
| PCI: 00:1f.2: enabled 1
|
| PCI: 00:1f.3: enabled 1
|
| I2C: 00:54: enabled 1
|
| I2C: 00:55: enabled 1
|
| I2C: 00:56: enabled 1
|
| I2C: 00:57: enabled 1
|
| I2C: 00:5c: enabled 1
|
| I2C: 00:5d: enabled 1
|
| I2C: 00:5e: enabled 1
|
| I2C: 00:5f: enabled 1
|
| PCI: 00:1f.5: enabled 0
|
| PCI: 00:1f.6: enabled 0
|
| Compare with tree...
|
| Root Device: enabled 1
|
| CPU_CLUSTER: 0: enabled 1
|
| APIC: 00: enabled 1
|
| APIC: acac: enabled 0
|
| DOMAIN: 0000: enabled 1
|
| PCI: 00:00.0: enabled 1
|
| PCI: 00:02.0: enabled 1
|
| PCI: 00:02.1: enabled 1
|
| PCI: 00:03.0: enabled 1
|
| PCI: 00:03.1: enabled 0
|
| PCI: 00:03.2: enabled 0
|
| PCI: 00:03.3: enabled 0
|
| IOAPIC: 02: enabled 1
|
| PCI: 00:19.0: enabled 1
|
| PCI: 00:1a.0: enabled 1
|
| PCI: 00:1a.1: enabled 1
|
| PCI: 00:1a.2: enabled 1
|
| PCI: 00:1a.7: enabled 1
|
| PCI: 00:1b.0: enabled 1
|
| PCI: 00:1c.0: enabled 1
|
| PCI: 00:1c.1: enabled 1
|
| PCI: 00:1c.2: enabled 1
|
| PCI: 00:1c.3: enabled 1
|
| PCI: 00:1c.4: enabled 0
|
| PCI: 00:1c.5: enabled 0
|
| PCI: 00:1d.0: enabled 1
|
| PCI: 00:1d.1: enabled 1
|
| PCI: 00:1d.2: enabled 1
|
| PCI: 00:1d.7: enabled 1
|
| PCI: 00:1e.0: enabled 1
|
| PCI: 00:03.0: enabled 1
|
| PCI: 00:03.1: enabled 1
|
| PCI: 00:03.2: enabled 0
|
| PCI: 00:03.3: enabled 0
|
| PCI: 00:03.4: enabled 0
|
| PCI: 00:1f.0: enabled 1
|
| PNP: 00ff.1: enabled 1
|
| PNP: 00ff.2: enabled 1
|
| PCI: 00:1f.2: enabled 1
|
| PCI: 00:1f.3: enabled 1
|
| I2C: 00:54: enabled 1
|
| I2C: 00:55: enabled 1
|
| I2C: 00:56: enabled 1
|
| I2C: 00:57: enabled 1
|
| I2C: 00:5c: enabled 1
|
| I2C: 00:5d: enabled 1
|
| I2C: 00:5e: enabled 1
|
| I2C: 00:5f: enabled 1
|
| PCI: 00:1f.5: enabled 0
|
| PCI: 00:1f.6: enabled 0
|
| scan_static_bus for Root Device
|
| CPU_CLUSTER: 0 enabled
|
| Normal boot.
|
| DOMAIN: 0000 enabled
|
| DOMAIN: 0000 scanning...
|
| PCI: pci_scan_bus for bus 00
|
| PCI: 00:00.0 [8086/2a40] enabled
|
| child IOAPIC: 02 not a PCI device
|
| PCI: 00:02.0 [8086/0000] ops
|
| PCI: 00:02.0 [8086/2a42] enabled
|
| PCI: 00:02.1 [8086/2a43] enabled
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| PCI: 00:03.0 [8086/2a44] enabled
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| PCI: 00:19.0 [8086/10f5] enabled
|
| child IOAPIC: 02 not a PCI device
|
| PCI: 00:1a.0 [8086/2937] enabled
|
| child IOAPIC: 02 not a PCI device
|
| PCI: 00:1a.1 [8086/2938] enabled
|
| child IOAPIC: 02 not a PCI device
|
| PCI: 00:1a.2 [8086/2939] enabled
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| PCI: 00:1a.7 [8086/0000] ops
|
| PCI: 00:1a.7 [8086/293c] enabled
|
| child IOAPIC: 02 not a PCI device
|
| PCI: 00:1b.0 [8086/293e] ops
|
| PCI: 00:1b.0 [8086/293e] enabled
|
| child IOAPIC: 02 not a PCI device
|
| PCI: 00:1c.0 [8086/0000] bus ops
|
| PCI: 00:1c.0 [8086/2940] enabled
|
| child IOAPIC: 02 not a PCI device
|
| PCI: 00:1c.1 [8086/0000] bus ops
|
| PCI: 00:1c.1 [8086/2942] enabled
|
| child IOAPIC: 02 not a PCI device
|
| PCI: 00:1c.2 [8086/0000] bus ops
|
| PCI: 00:1c.2 [8086/2944] enabled
|
| child IOAPIC: 02 not a PCI device
|
| PCI: 00:1c.3 [8086/0000] bus ops
|
| PCI: 00:1c.3 [8086/2946] enabled
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| PCI: 00:1d.0 [8086/2934] enabled
|
| child IOAPIC: 02 not a PCI device
|
| PCI: 00:1d.1 [8086/2935] enabled
|
| child IOAPIC: 02 not a PCI device
|
| PCI: 00:1d.2 [8086/2936] enabled
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| PCI: 00:1d.7 [8086/0000] ops
|
| PCI: 00:1d.7 [8086/293a] enabled
|
| child IOAPIC: 02 not a PCI device
|
| PCI: 00:1e.0 [8086/0000] bus ops
|
| PCI: 00:1e.0 [8086/2448] enabled
|
| child IOAPIC: 02 not a PCI device
|
| PCI: 00:1f.0 [8086/0000] bus ops
|
| PCI: 00:1f.0 [8086/2917] enabled
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| PCI: 00:1f.2 [8086/0000] ops
|
| PCI: 00:1f.2 [8086/2928] enabled
|
| child IOAPIC: 02 not a PCI device
|
| PCI: 00:1f.3 [8086/0000] bus ops
|
| PCI: 00:1f.3 [8086/2930] enabled
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| child IOAPIC: 02 not a PCI device
|
| PCI: Left over static devices:
|
| IOAPIC: 02
|
| PCI: Check your devicetree.cb.
|
| do_pci_scan_bridge for PCI: 00:1c.0
|
| PCI: pci_scan_bus for bus 01
|
| PCI: pci_scan_bus returning with max=001
|
| do_pci_scan_bridge returns max 1
|
| do_pci_scan_bridge for PCI: 00:1c.1
|
| PCI: pci_scan_bus for bus 02
|
| PCI: 02:00.0 [8086/4236] enabled
|
| PCI: pci_scan_bus returning with max=002
|
| Capability: type 0x01 @ 0xc8
|
| Capability: type 0x05 @ 0xd0
|
| Capability: type 0x10 @ 0xe0
|
| Capability: type 0x10 @ 0x40
|
| do_pci_scan_bridge returns max 2
|
| do_pci_scan_bridge for PCI: 00:1c.2
|
| PCI: pci_scan_bus for bus 03
|
| PCI: pci_scan_bus returning with max=003
|
| do_pci_scan_bridge returns max 3
|
| do_pci_scan_bridge for PCI: 00:1c.3
|
| PCI: pci_scan_bus for bus 04
|
| PCI: pci_scan_bus returning with max=004
|
| do_pci_scan_bridge returns max 4
|
| do_pci_scan_bridge for PCI: 00:1e.0
|
| PCI: pci_scan_bus for bus 05
|
| PCI: Static device PCI: 05:03.0 not found, disabling it.
|
| PCI: Static device PCI: 05:03.1 not found, disabling it.
|
| PCI: pci_scan_bus returning with max=005
|
| do_pci_scan_bridge returns max 5
|
| scan_static_bus for PCI: 00:1f.0
|
| WARNING: No CMOS option 'touchpad'.
|
| PNP: 00ff.1 enabled
|
| recv_ec_data: 0x37
|
| recv_ec_data: 0x58
|
| recv_ec_data: 0x48
|
| recv_ec_data: 0x54
|
| recv_ec_data: 0x32
|
| recv_ec_data: 0x35
|
| recv_ec_data: 0x57
|
| recv_ec_data: 0x57
|
| recv_ec_data: 0x06
|
| recv_ec_data: 0x03
|
| recv_ec_data: 0x70
|
| recv_ec_data: 0x10
|
| EC Firmware ID 7XHT25WW-3.6, Version 7.01A
|
| recv_ec_data: 0x00
|
| recv_ec_data: 0x10
|
| recv_ec_data: 0x20
|
| recv_ec_data: 0x30
|
| recv_ec_data: 0x00
|
| recv_ec_data: 0x00
|
| recv_ec_data: 0xa6
|
| recv_ec_data: 0x01
|
| recv_ec_data: 0x70
|
| dock is not connected
|
| PNP: 00ff.2 enabled
|
| scan_static_bus for PCI: 00:1f.0 done
|
| scan_static_bus for PCI: 00:1f.3
|
| smbus: PCI: 00:1f.3[0]->I2C: 01:54 enabled
|
| smbus: PCI: 00:1f.3[0]->I2C: 01:55 enabled
|
| smbus: PCI: 00:1f.3[0]->I2C: 01:56 enabled
|
| smbus: PCI: 00:1f.3[0]->I2C: 01:57 enabled
|
| smbus: PCI: 00:1f.3[0]->I2C: 01:5c enabled
|
| smbus: PCI: 00:1f.3[0]->I2C: 01:5d enabled
|
| smbus: PCI: 00:1f.3[0]->I2C: 01:5e enabled
|
| smbus: PCI: 00:1f.3[0]->I2C: 01:5f enabled
|
| scan_static_bus for PCI: 00:1f.3 done
|
| PCI: pci_scan_bus returning with max=005
|
| scan_static_bus for Root Device done
|
| done
|
| BS: Exiting BS_DEV_ENUMERATE state.
|
| BS: Entering BS_DEV_RESOURCES state.
|
| found VGA at PCI: 00:02.0
|
| Setting up VGA for PCI: 00:02.0
|
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
|
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
|
| Allocating resources...
|
| Reading resources...
|
| Root Device read_resources bus 0 link: 0
|
| CPU_CLUSTER: 0 read_resources bus 0 link: 0
|
| APIC: 00 missing read_resources
|
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
|
| TOUUD 0x13c000000 TOLUD 0xc0000000 TOM 0x100000000
|
| IGD decoded, subtracting 32M UMA and 4M GTT
|
| Available memory below 4GB: 3036M
|
| Available memory above 4GB: 960M
|
| Adding UMA memory area base=0xbdc00000 size=0x2400000
|
| Adding PCIe config bar base=0xf0000000 size=0x4000000
|
| DOMAIN: 0000 read_resources bus 0 link: 0
|
| PCI: 00:1c.0 read_resources bus 1 link: 0
|
| PCI: 00:1c.0 read_resources bus 1 link: 0 done
|
| PCI: 00:1c.1 read_resources bus 2 link: 0
|
| PCI: 00:1c.1 read_resources bus 2 link: 0 done
|
| PCI: 00:1c.2 read_resources bus 3 link: 0
|
| PCI: 00:1c.2 read_resources bus 3 link: 0 done
|
| PCI: 00:1c.3 read_resources bus 4 link: 0
|
| PCI: 00:1c.3 read_resources bus 4 link: 0 done
|
| PCI: 00:1e.0 read_resources bus 5 link: 0
|
| PCI: 00:1e.0 read_resources bus 5 link: 0 done
|
| PCI: 00:1f.0 read_resources bus 0 link: 0
|
| PNP: 00ff.1 missing read_resources
|
| PNP: 00ff.2 missing read_resources
|
| PCI: 00:1f.0 read_resources bus 0 link: 0 done
|
| PCI: 00:1f.3 read_resources bus 1 link: 0
|
| PCI: 00:1f.3 read_resources bus 1 link: 0 done
|
| DOMAIN: 0000 read_resources bus 0 link: 0 done
|
| Root Device read_resources bus 0 link: 0 done
|
| Done reading resources.
|
| Show resources in subtree (Root Device)...After reading.
|
| Root Device child on link 0 CPU_CLUSTER: 0
|
| CPU_CLUSTER: 0 child on link 0 APIC: 00
|
| APIC: 00
|
| APIC: acac
|
| DOMAIN: 0000 child on link 0 PCI: 00:00.0
|
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
|
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
|
| DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
|
| DOMAIN: 0000 resource base 100000 size bdb00000 align 0 gran 0 limit 0 flags e0004200 index 4
|
| DOMAIN: 0000 resource base 100000000 size 3c000000 align 0 gran 0 limit 0 flags e0004200 index 5
|
| DOMAIN: 0000 resource base bdc00000 size 2400000 align 0 gran 0 limit 0 flags f0000200 index 6
|
| DOMAIN: 0000 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 7
|
| PCI: 00:00.0
|
| PCI: 00:02.0
|
| PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10
|
| PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
|
| PCI: 00:02.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 20
|
| PCI: 00:02.1
|
| PCI: 00:02.1 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 10
|
| PCI: 00:03.0
|
| PCI: 00:03.0 resource base 0 size 10 align 4 gran 4 limit ffffffffffffffff flags 201 index 10
|
| PCI: 00:03.1
|
| PCI: 00:03.2
|
| PCI: 00:03.3
|
| PCI: 00:19.0
|
| PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
|
| PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
|
| PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
|
| PCI: 00:1a.0
|
| PCI: 00:1a.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
|
| PCI: 00:1a.1
|
| PCI: 00:1a.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
|
| PCI: 00:1a.2
|
| PCI: 00:1a.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
|
| PCI: 00:1a.7
|
| PCI: 00:1a.7 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 10
|
| PCI: 00:1b.0
|
| PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
|
| PCI: 00:1c.0
|
| PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
|
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
|
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
|
| PCI: 00:1c.1 child on link 0 PCI: 02:00.0
|
| PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
|
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
|
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
|
| PCI: 02:00.0
|
| PCI: 02:00.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
|
| PCI: 00:1c.2
|
| PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
|
| PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
|
| PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
|
| PCI: 00:1c.3
|
| PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
|
| PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
|
| PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
|
| PCI: 00:1c.4
|
| PCI: 00:1c.5
|
| PCI: 00:1d.0
|
| PCI: 00:1d.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
|
| PCI: 00:1d.1
|
| PCI: 00:1d.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
|
| PCI: 00:1d.2
|
| PCI: 00:1d.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
|
| PCI: 00:1d.7
|
| PCI: 00:1d.7 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 10
|
| PCI: 00:1e.0 child on link 0 PCI: 05:03.0
|
| PCI: 00:1e.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
|
| PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
|
| PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
|
| PCI: 05:03.0
|
| PCI: 05:03.1
|
| PCI: 05:03.2
|
| PCI: 05:03.3
|
| PCI: 05:03.4
|
| PCI: 00:1f.0 child on link 0 PNP: 00ff.1
|
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
|
| PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
|
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
|
| PNP: 00ff.1
|
| PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77
|
| PNP: 00ff.2
|
| PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
|
| PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
|
| PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64
|
| PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66
|
| PCI: 00:1f.2
|
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
|
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
|
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
|
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
|
| PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
|
| PCI: 00:1f.2 resource base 0 size 800 align 11 gran 11 limit ffffffff flags 200 index 24
|
| PCI: 00:1f.3 child on link 0 I2C: 01:54
|
| PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
|
| PCI: 00:1f.3 resource base 0 size 100 align 8 gran 8 limit ffffffffffffffff flags 201 index 10
|
| I2C: 01:54
|
| I2C: 01:55
|
| I2C: 01:56
|
| I2C: 01:57
|
| I2C: 01:5c
|
| I2C: 01:5d
|
| I2C: 01:5e
|
| I2C: 01:5f
|
| PCI: 00:1f.5
|
| PCI: 00:1f.6
|
| DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
|
| PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
|
| PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
|
| PCI: 00:1c.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
|
| PCI: 00:1c.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
|
| PCI: 00:1c.2 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
|
| PCI: 00:1c.2 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
|
| PCI: 00:1c.3 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
|
| PCI: 00:1c.3 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
|
| PCI: 00:1e.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
|
| PCI: 00:1e.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
|
| PCI: 00:19.0 18 * [0x0 - 0x1f] io
|
| PCI: 00:1a.0 20 * [0x20 - 0x3f] io
|
| PCI: 00:1a.1 20 * [0x40 - 0x5f] io
|
| PCI: 00:1a.2 20 * [0x60 - 0x7f] io
|
| PCI: 00:1d.0 20 * [0x80 - 0x9f] io
|
| PCI: 00:1d.1 20 * [0xa0 - 0xbf] io
|
| PCI: 00:1d.2 20 * [0xc0 - 0xdf] io
|
| PCI: 00:1f.2 20 * [0xe0 - 0xff] io
|
| PCI: 00:02.0 20 * [0x400 - 0x407] io
|
| PCI: 00:1f.2 10 * [0x408 - 0x40f] io
|
| PCI: 00:1f.2 18 * [0x410 - 0x417] io
|
| PCI: 00:1f.2 14 * [0x418 - 0x41b] io
|
| PCI: 00:1f.2 1c * [0x41c - 0x41f] io
|
| DOMAIN: 0000 compute_resources_io: base: 420 size: 420 align: 5 gran: 0 limit: ffff done
|
| DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
|
| PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
|
| PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
|
| PCI: 00:1c.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
|
| PCI: 00:1c.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
|
| PCI: 00:1c.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
|
| PCI: 00:1c.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
|
| PCI: 00:1c.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
|
| PCI: 02:00.0 10 * [0x0 - 0x1fff] mem
|
| PCI: 00:1c.1 compute_resources_mem: base: 2000 size: 100000 align: 20 gran: 20 limit: ffffffff done
|
| PCI: 00:1c.2 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
|
| PCI: 00:1c.2 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
|
| PCI: 00:1c.2 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
|
| PCI: 00:1c.2 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
|
| PCI: 00:1c.3 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
|
| PCI: 00:1c.3 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
|
| PCI: 00:1c.3 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
|
| PCI: 00:1c.3 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
|
| PCI: 00:1e.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
|
| PCI: 00:1e.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
|
| PCI: 00:1e.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
|
| PCI: 00:1e.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
|
| PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
|
| PCI: 00:02.0 10 * [0x10000000 - 0x103fffff] mem
|
| PCI: 00:02.1 10 * [0x10400000 - 0x104fffff] mem
|
| PCI: 00:1c.1 20 * [0x10500000 - 0x105fffff] mem
|
| PCI: 00:19.0 10 * [0x10600000 - 0x1061ffff] mem
|
| PCI: 00:1b.0 10 * [0x10620000 - 0x10623fff] mem
|
| PCI: 00:19.0 14 * [0x10624000 - 0x10624fff] mem
|
| PCI: 00:1f.2 24 * [0x10625000 - 0x106257ff] mem
|
| PCI: 00:1a.7 10 * [0x10625800 - 0x10625bff] mem
|
| PCI: 00:1d.7 10 * [0x10625c00 - 0x10625fff] mem
|
| PCI: 00:1f.3 10 * [0x10626000 - 0x106260ff] mem
|
| PCI: 00:03.0 10 * [0x10626100 - 0x1062610f] mem
|
| DOMAIN: 0000 compute_resources_mem: base: 10626110 size: 10626110 align: 28 gran: 0 limit: ffffffff done
|
| avoid_fixed_resources: DOMAIN: 0000
|
| avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
|
| avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
|
| constrain_resources: DOMAIN: 0000
|
| constrain_resources: PCI: 00:00.0
|
| constrain_resources: PCI: 00:02.0
|
| constrain_resources: PCI: 00:02.1
|
| constrain_resources: PCI: 00:03.0
|
| constrain_resources: PCI: 00:19.0
|
| constrain_resources: PCI: 00:1a.0
|
| constrain_resources: PCI: 00:1a.1
|
| constrain_resources: PCI: 00:1a.2
|
| constrain_resources: PCI: 00:1a.7
|
| constrain_resources: PCI: 00:1b.0
|
| constrain_resources: PCI: 00:1c.0
|
| constrain_resources: PCI: 00:1c.1
|
| constrain_resources: PCI: 02:00.0
|
| constrain_resources: PCI: 00:1c.2
|
| constrain_resources: PCI: 00:1c.3
|
| constrain_resources: PCI: 00:1d.0
|
| constrain_resources: PCI: 00:1d.1
|
| constrain_resources: PCI: 00:1d.2
|
| constrain_resources: PCI: 00:1d.7
|
| constrain_resources: PCI: 00:1e.0
|
| constrain_resources: PCI: 00:1f.0
|
| constrain_resources: PNP: 00ff.1
|
| constrain_resources: PNP: 00ff.2
|
| skipping PNP: 00ff.2@60 fixed resource, size=0!
|
| skipping PNP: 00ff.2@62 fixed resource, size=0!
|
| skipping PNP: 00ff.2@64 fixed resource, size=0!
|
| skipping PNP: 00ff.2@66 fixed resource, size=0!
|
| constrain_resources: PCI: 00:1f.2
|
| constrain_resources: PCI: 00:1f.3
|
| constrain_resources: I2C: 01:54
|
| constrain_resources: I2C: 01:55
|
| constrain_resources: I2C: 01:56
|
| constrain_resources: I2C: 01:57
|
| constrain_resources: I2C: 01:5c
|
| constrain_resources: I2C: 01:5d
|
| constrain_resources: I2C: 01:5e
|
| constrain_resources: I2C: 01:5f
|
| avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 0000ffff
|
| lim->base 000015f0 lim->limit 0000ffff
|
| avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff
|
| lim->base c0000000 lim->limit efffffff
|
| Setting resources...
|
| DOMAIN: 0000 allocate_resources_io: base:15f0 size:420 align:5 gran:0 limit:ffff
|
| Assigned: PCI: 00:19.0 18 * [0x1800 - 0x181f] io
|
| Assigned: PCI: 00:1a.0 20 * [0x1820 - 0x183f] io
|
| Assigned: PCI: 00:1a.1 20 * [0x1840 - 0x185f] io
|
| Assigned: PCI: 00:1a.2 20 * [0x1860 - 0x187f] io
|
| Assigned: PCI: 00:1d.0 20 * [0x1880 - 0x189f] io
|
| Assigned: PCI: 00:1d.1 20 * [0x18a0 - 0x18bf] io
|
| Assigned: PCI: 00:1d.2 20 * [0x18c0 - 0x18df] io
|
| Assigned: PCI: 00:1f.2 20 * [0x18e0 - 0x18ff] io
|
| Assigned: PCI: 00:02.0 20 * [0x1c00 - 0x1c07] io
|
| Assigned: PCI: 00:1f.2 10 * [0x1c08 - 0x1c0f] io
|
| Assigned: PCI: 00:1f.2 18 * [0x1c10 - 0x1c17] io
|
| Assigned: PCI: 00:1f.2 14 * [0x1c18 - 0x1c1b] io
|
| Assigned: PCI: 00:1f.2 1c * [0x1c1c - 0x1c1f] io
|
| DOMAIN: 0000 allocate_resources_io: next_base: 1c20 size: 420 align: 5 gran: 0 done
|
| PCI: 00:1c.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
|
| PCI: 00:1c.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
|
| PCI: 00:1c.1 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
|
| PCI: 00:1c.1 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
|
| PCI: 00:1c.2 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
|
| PCI: 00:1c.2 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
|
| PCI: 00:1c.3 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
|
| PCI: 00:1c.3 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
|
| PCI: 00:1e.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
|
| PCI: 00:1e.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
|
| DOMAIN: 0000 allocate_resources_mem: base:d0000000 size:10626110 align:28 gran:0 limit:efffffff
|
| Assigned: PCI: 00:02.0 18 * [0xd0000000 - 0xdfffffff] prefmem
|
| Assigned: PCI: 00:02.0 10 * [0xe0000000 - 0xe03fffff] mem
|
| Assigned: PCI: 00:02.1 10 * [0xe0400000 - 0xe04fffff] mem
|
| Assigned: PCI: 00:1c.1 20 * [0xe0500000 - 0xe05fffff] mem
|
| Assigned: PCI: 00:19.0 10 * [0xe0600000 - 0xe061ffff] mem
|
| Assigned: PCI: 00:1b.0 10 * [0xe0620000 - 0xe0623fff] mem
|
| Assigned: PCI: 00:19.0 14 * [0xe0624000 - 0xe0624fff] mem
|
| Assigned: PCI: 00:1f.2 24 * [0xe0625000 - 0xe06257ff] mem
|
| Assigned: PCI: 00:1a.7 10 * [0xe0625800 - 0xe0625bff] mem
|
| Assigned: PCI: 00:1d.7 10 * [0xe0625c00 - 0xe0625fff] mem
|
| Assigned: PCI: 00:1f.3 10 * [0xe0626000 - 0xe06260ff] mem
|
| Assigned: PCI: 00:03.0 10 * [0xe0626100 - 0xe062610f] mem
|
| DOMAIN: 0000 allocate_resources_mem: next_base: e0626110 size: 10626110 align: 28 gran: 0 done
|
| PCI: 00:1c.0 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
|
| PCI: 00:1c.0 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
|
| PCI: 00:1c.0 allocate_resources_mem: base:efffffff size:0 align:20 gran:20 limit:efffffff
|
| PCI: 00:1c.0 allocate_resources_mem: next_base: efffffff size: 0 align: 20 gran: 20 done
|
| PCI: 00:1c.1 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
|
| PCI: 00:1c.1 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
|
| PCI: 00:1c.1 allocate_resources_mem: base:e0500000 size:100000 align:20 gran:20 limit:efffffff
|
| Assigned: PCI: 02:00.0 10 * [0xe0500000 - 0xe0501fff] mem
|
| PCI: 00:1c.1 allocate_resources_mem: next_base: e0502000 size: 100000 align: 20 gran: 20 done
|
| PCI: 00:1c.2 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
|
| PCI: 00:1c.2 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
|
| PCI: 00:1c.2 allocate_resources_mem: base:efffffff size:0 align:20 gran:20 limit:efffffff
|
| PCI: 00:1c.2 allocate_resources_mem: next_base: efffffff size: 0 align: 20 gran: 20 done
|
| PCI: 00:1c.3 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
|
| PCI: 00:1c.3 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
|
| PCI: 00:1c.3 allocate_resources_mem: base:efffffff size:0 align:20 gran:20 limit:efffffff
|
| PCI: 00:1c.3 allocate_resources_mem: next_base: efffffff size: 0 align: 20 gran: 20 done
|
| PCI: 00:1e.0 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
|
| PCI: 00:1e.0 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
|
| PCI: 00:1e.0 allocate_resources_mem: base:efffffff size:0 align:20 gran:20 limit:efffffff
|
| PCI: 00:1e.0 allocate_resources_mem: next_base: efffffff size: 0 align: 20 gran: 20 done
|
| Root Device assign_resources, bus 0 link: 0
|
| DOMAIN: 0000 03 <- [0x0000000000 - 0x000009ffff] size 0x000a0000 gran 0x00 mem
|
| DOMAIN: 0000 04 <- [0x0000100000 - 0x00bdbfffff] size 0xbdb00000 gran 0x00 mem
|
| DOMAIN: 0000 05 <- [0x0100000000 - 0x013bffffff] size 0x3c000000 gran 0x00 mem
|
| DOMAIN: 0000 06 <- [0x00bdc00000 - 0x00bfffffff] size 0x02400000 gran 0x00 mem
|
| DOMAIN: 0000 07 <- [0x00f0000000 - 0x00f3ffffff] size 0x04000000 gran 0x00 mem
|
| DOMAIN: 0000 assign_resources, bus 0 link: 0
|
| PCI: 00:02.0 10 <- [0x00e0000000 - 0x00e03fffff] size 0x00400000 gran 0x16 mem64
|
| PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64
|
| PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c07] size 0x00000008 gran 0x03 io
|
| PCI: 00:02.1 10 <- [0x00e0400000 - 0x00e04fffff] size 0x00100000 gran 0x14 mem64
|
| PCI: 00:03.0 10 <- [0x00e0626100 - 0x00e062610f] size 0x00000010 gran 0x04 mem64
|
| PCI: 00:19.0 10 <- [0x00e0600000 - 0x00e061ffff] size 0x00020000 gran 0x11 mem
|
| PCI: 00:19.0 14 <- [0x00e0624000 - 0x00e0624fff] size 0x00001000 gran 0x0c mem
|
| PCI: 00:19.0 18 <- [0x0000001800 - 0x000000181f] size 0x00000020 gran 0x05 io
|
| PCI: 00:1a.0 20 <- [0x0000001820 - 0x000000183f] size 0x00000020 gran 0x05 io
|
| PCI: 00:1a.1 20 <- [0x0000001840 - 0x000000185f] size 0x00000020 gran 0x05 io
|
| PCI: 00:1a.2 20 <- [0x0000001860 - 0x000000187f] size 0x00000020 gran 0x05 io
|
| PCI: 00:1a.7 10 <- [0x00e0625800 - 0x00e0625bff] size 0x00000400 gran 0x0a mem
|
| PCI: 00:1b.0 10 <- [0x00e0620000 - 0x00e0623fff] size 0x00004000 gran 0x0e mem64
|
| PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
|
| PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem
|
| PCI: 00:1c.0 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 mem
|
| PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
|
| PCI: 00:1c.1 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 prefmem
|
| PCI: 00:1c.1 20 <- [0x00e0500000 - 0x00e05fffff] size 0x00100000 gran 0x14 bus 02 mem
|
| PCI: 00:1c.1 assign_resources, bus 2 link: 0
|
| PCI: 02:00.0 10 <- [0x00e0500000 - 0x00e0501fff] size 0x00002000 gran 0x0d mem64
|
| PCI: 00:1c.1 assign_resources, bus 2 link: 0
|
| PCI: 00:1c.2 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io
|
| PCI: 00:1c.2 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 prefmem
|
| PCI: 00:1c.2 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 mem
|
| PCI: 00:1c.3 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io
|
| PCI: 00:1c.3 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 04 prefmem
|
| PCI: 00:1c.3 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 04 mem
|
| PCI: 00:1d.0 20 <- [0x0000001880 - 0x000000189f] size 0x00000020 gran 0x05 io
|
| PCI: 00:1d.1 20 <- [0x00000018a0 - 0x00000018bf] size 0x00000020 gran 0x05 io
|
| PCI: 00:1d.2 20 <- [0x00000018c0 - 0x00000018df] size 0x00000020 gran 0x05 io
|
| PCI: 00:1d.7 10 <- [0x00e0625c00 - 0x00e0625fff] size 0x00000400 gran 0x0a mem
|
| PCI: 00:1e.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 05 io
|
| PCI: 00:1e.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 05 prefmem
|
| PCI: 00:1e.0 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 05 mem
|
| PCI: 00:1e.0 assign_resources, bus 5 link: 0
|
| PCI: 00:1e.0 assign_resources, bus 5 link: 0
|
| PCI: 00:1f.0 assign_resources, bus 0 link: 0
|
| PNP: 00ff.1 missing set_resources
|
| PNP: 00ff.2 missing set_resources
|
| PCI: 00:1f.0 assign_resources, bus 0 link: 0
|
| PCI: 00:1f.2 10 <- [0x0000001c08 - 0x0000001c0f] size 0x00000008 gran 0x03 io
|
| PCI: 00:1f.2 14 <- [0x0000001c18 - 0x0000001c1b] size 0x00000004 gran 0x02 io
|
| PCI: 00:1f.2 18 <- [0x0000001c10 - 0x0000001c17] size 0x00000008 gran 0x03 io
|
| PCI: 00:1f.2 1c <- [0x0000001c1c - 0x0000001c1f] size 0x00000004 gran 0x02 io
|
| PCI: 00:1f.2 20 <- [0x00000018e0 - 0x00000018ff] size 0x00000020 gran 0x05 io
|
| PCI: 00:1f.2 24 <- [0x00e0625000 - 0x00e06257ff] size 0x00000800 gran 0x0b mem
|
| PCI: 00:1f.3 10 <- [0x00e0626000 - 0x00e06260ff] size 0x00000100 gran 0x08 mem64
|
| PCI: 00:1f.3 assign_resources, bus 1 link: 0
|
| PCI: 00:1f.3 assign_resources, bus 1 link: 0
|
| DOMAIN: 0000 assign_resources, bus 0 link: 0
|
| Root Device assign_resources, bus 0 link: 0
|
| Done setting resources.
|
| Show resources in subtree (Root Device)...After assigning values.
|
| Root Device child on link 0 CPU_CLUSTER: 0
|
| CPU_CLUSTER: 0 child on link 0 APIC: 00
|
| APIC: 00
|
| APIC: acac
|
| DOMAIN: 0000 child on link 0 PCI: 00:00.0
|
| DOMAIN: 0000 resource base 15f0 size 420 align 5 gran 0 limit ffff flags 40040100 index 10000000
|
| DOMAIN: 0000 resource base d0000000 size 10626110 align 28 gran 0 limit efffffff flags 40040200 index 10000100
|
| DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
|
| DOMAIN: 0000 resource base 100000 size bdb00000 align 0 gran 0 limit 0 flags e0004200 index 4
|
| DOMAIN: 0000 resource base 100000000 size 3c000000 align 0 gran 0 limit 0 flags e0004200 index 5
|
| DOMAIN: 0000 resource base bdc00000 size 2400000 align 0 gran 0 limit 0 flags f0000200 index 6
|
| DOMAIN: 0000 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 7
|
| PCI: 00:00.0
|
| PCI: 00:02.0
|
| PCI: 00:02.0 resource base e0000000 size 400000 align 22 gran 22 limit efffffff flags 60000201 index 10
|
| PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001201 index 18
|
| PCI: 00:02.0 resource base 1c00 size 8 align 3 gran 3 limit ffff flags 60000100 index 20
|
| PCI: 00:02.1
|
| PCI: 00:02.1 resource base e0400000 size 100000 align 20 gran 20 limit efffffff flags 60000201 index 10
|
| PCI: 00:03.0
|
| PCI: 00:03.0 resource base e0626100 size 10 align 4 gran 4 limit efffffff flags 60000201 index 10
|
| PCI: 00:03.1
|
| PCI: 00:03.2
|
| PCI: 00:03.3
|
| PCI: 00:19.0
|
| PCI: 00:19.0 resource base e0600000 size 20000 align 17 gran 17 limit efffffff flags 60000200 index 10
|
| PCI: 00:19.0 resource base e0624000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 14
|
| PCI: 00:19.0 resource base 1800 size 20 align 5 gran 5 limit ffff flags 60000100 index 18
|
| PCI: 00:1a.0
|
| PCI: 00:1a.0 resource base 1820 size 20 align 5 gran 5 limit ffff flags 60000100 index 20
|
| PCI: 00:1a.1
|
| PCI: 00:1a.1 resource base 1840 size 20 align 5 gran 5 limit ffff flags 60000100 index 20
|
| PCI: 00:1a.2
|
| PCI: 00:1a.2 resource base 1860 size 20 align 5 gran 5 limit ffff flags 60000100 index 20
|
| PCI: 00:1a.7
|
| PCI: 00:1a.7 resource base e0625800 size 400 align 10 gran 10 limit efffffff flags 60000200 index 10
|
| PCI: 00:1b.0
|
| PCI: 00:1b.0 resource base e0620000 size 4000 align 14 gran 14 limit efffffff flags 60000201 index 10
|
| PCI: 00:1c.0
|
| PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
|
| PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
|
| PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20
|
| PCI: 00:1c.1 child on link 0 PCI: 02:00.0
|
| PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
|
| PCI: 00:1c.1 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
|
| PCI: 00:1c.1 resource base e0500000 size 100000 align 20 gran 20 limit efffffff flags 60080202 index 20
|
| PCI: 02:00.0
|
| PCI: 02:00.0 resource base e0500000 size 2000 align 13 gran 13 limit efffffff flags 60000201 index 10
|
| PCI: 00:1c.2
|
| PCI: 00:1c.2 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
|
| PCI: 00:1c.2 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
|
| PCI: 00:1c.2 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20
|
| PCI: 00:1c.3
|
| PCI: 00:1c.3 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
|
| PCI: 00:1c.3 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
|
| PCI: 00:1c.3 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20
|
| PCI: 00:1c.4
|
| PCI: 00:1c.5
|
| PCI: 00:1d.0
|
| PCI: 00:1d.0 resource base 1880 size 20 align 5 gran 5 limit ffff flags 60000100 index 20
|
| PCI: 00:1d.1
|
| PCI: 00:1d.1 resource base 18a0 size 20 align 5 gran 5 limit ffff flags 60000100 index 20
|
| PCI: 00:1d.2
|
| PCI: 00:1d.2 resource base 18c0 size 20 align 5 gran 5 limit ffff flags 60000100 index 20
|
| PCI: 00:1d.7
|
| PCI: 00:1d.7 resource base e0625c00 size 400 align 10 gran 10 limit efffffff flags 60000200 index 10
|
| PCI: 00:1e.0 child on link 0 PCI: 05:03.0
|
| PCI: 00:1e.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
|
| PCI: 00:1e.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
|
| PCI: 00:1e.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20
|
| PCI: 05:03.0
|
| PCI: 05:03.1
|
| PCI: 05:03.2
|
| PCI: 05:03.3
|
| PCI: 05:03.4
|
| PCI: 00:1f.0 child on link 0 PNP: 00ff.1
|
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
|
| PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
|
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
|
| PNP: 00ff.1
|
| PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77
|
| PNP: 00ff.2
|
| PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
|
| PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
|
| PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64
|
| PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66
|
| PCI: 00:1f.2
|
| PCI: 00:1f.2 resource base 1c08 size 8 align 3 gran 3 limit ffff flags 60000100 index 10
|
| PCI: 00:1f.2 resource base 1c18 size 4 align 2 gran 2 limit ffff flags 60000100 index 14
|
| PCI: 00:1f.2 resource base 1c10 size 8 align 3 gran 3 limit ffff flags 60000100 index 18
|
| PCI: 00:1f.2 resource base 1c1c size 4 align 2 gran 2 limit ffff flags 60000100 index 1c
|
| PCI: 00:1f.2 resource base 18e0 size 20 align 5 gran 5 limit ffff flags 60000100 index 20
|
| PCI: 00:1f.2 resource base e0625000 size 800 align 11 gran 11 limit efffffff flags 60000200 index 24
|
| PCI: 00:1f.3 child on link 0 I2C: 01:54
|
| PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
|
| PCI: 00:1f.3 resource base e0626000 size 100 align 8 gran 8 limit efffffff flags 60000201 index 10
|
| I2C: 01:54
|
| I2C: 01:55
|
| I2C: 01:56
|
| I2C: 01:57
|
| I2C: 01:5c
|
| I2C: 01:5d
|
| I2C: 01:5e
|
| I2C: 01:5f
|
| PCI: 00:1f.5
|
| PCI: 00:1f.6
|
| Done allocating resources.
|
| BS: Exiting BS_DEV_RESOURCES state.
|
| BS: Entering BS_DEV_ENABLE state.
|
| Enabling resources...
|
| PCI: 00:00.0 subsystem <- 17aa/20e0
|
| PCI: 00:00.0 cmd <- 06
|
| PCI: 00:02.0 subsystem <- 17aa/20e4
|
| PCI: 00:02.0 cmd <- 03
|
| PCI: 00:02.1 subsystem <- 17aa/20e4
|
| PCI: 00:02.1 cmd <- 02
|
| PCI: 00:03.0 subsystem <- 17aa/20e6
|
| PCI: 00:03.0 cmd <- 02
|
| PCI: 00:19.0 subsystem <- 0000/0000
|
| PCI: 00:19.0 cmd <- 103
|
| PCI: 00:1a.0 subsystem <- 17aa/20f0
|
| PCI: 00:1a.0 cmd <- 01
|
| PCI: 00:1a.1 subsystem <- 17aa/20f0
|
| PCI: 00:1a.1 cmd <- 01
|
| PCI: 00:1a.2 subsystem <- 17aa/20f0
|
| PCI: 00:1a.2 cmd <- 01
|
| PCI: 00:1a.7 subsystem <- 17aa/20f1
|
| PCI: 00:1a.7 cmd <- 102
|
| PCI: 00:1b.0 subsystem <- 17aa/20f2
|
| PCI: 00:1b.0 cmd <- 102
|
| PCI: 00:1c.0 bridge ctrl <- 0003
|
| PCI: 00:1c.0 subsystem <- 17aa/20f3
|
| PCI: 00:1c.0 cmd <- 100
|
| PCI: 00:1c.1 bridge ctrl <- 0003
|
| PCI: 00:1c.1 subsystem <- 17aa/20f3
|
| PCI: 00:1c.1 cmd <- 106
|
| PCI: 00:1c.2 bridge ctrl <- 0003
|
| PCI: 00:1c.2 subsystem <- 17aa/20f3
|
| PCI: 00:1c.2 cmd <- 100
|
| PCI: 00:1c.3 bridge ctrl <- 0003
|
| PCI: 00:1c.3 subsystem <- 17aa/20f3
|
| PCI: 00:1c.3 cmd <- 100
|
| PCI: 00:1d.0 subsystem <- 17aa/20f0
|
| PCI: 00:1d.0 cmd <- 01
|
| PCI: 00:1d.1 subsystem <- 17aa/20f0
|
| PCI: 00:1d.1 cmd <- 01
|
| PCI: 00:1d.2 subsystem <- 17aa/20f0
|
| PCI: 00:1d.2 cmd <- 01
|
| PCI: 00:1d.7 subsystem <- 17aa/20f1
|
| PCI: 00:1d.7 cmd <- 102
|
| PCI: 00:1e.0 bridge ctrl <- 0003
|
| PCI: 00:1e.0 subsystem <- 17aa/20f4
|
| PCI: 00:1e.0 cmd <- 100
|
| PCI: 00:1f.0 subsystem <- 17aa/20f5
|
| PCI: 00:1f.0 cmd <- 107
|
| PCI: 00:1f.2 subsystem <- 17aa/20f8
|
| PCI: 00:1f.2 cmd <- 03
|
| PCI: 00:1f.3 subsystem <- 17aa/20f9
|
| PCI: 00:1f.3 cmd <- 103
|
| PCI: 02:00.0 cmd <- 02
|
| done.
|
| BS: Exiting BS_DEV_ENABLE state.
|
| BS: Entering BS_DEV_INIT state.
|
| Initializing devices...
|
| Root Device init
|
| Keyboard init...
|
| No PS/2 keyboard detected.
|
| CPU_CLUSTER: 0 init
|
| start_eip=0x00001000, code_size=0x00000031
|
| Initializing SMM handler... ... pmbase = 0x0600
|
|
|
| SMI_STS: MCSMI
|
| PM1_STS:
|
| GPE0_STS: GPIO14 GPIO13 GPIO11 GPIO10 GPIO9 GPIO8 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0
|
| ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI8 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0
|
| TCO_STS:
|
| ... raise SMI#
|
| Initializing CPU #0
|
| CPU: vendor Intel device 10676
|
| CPU: family 06, model 17, stepping 06
|
| Enabling cache
|
| microcode: sig=0x10676 pf=0x80 revision=0x0
|
| microcode: updated to revision 0x60f date=2010-09-29
|
| CPU: Intel(R) Core(TM)2 Duo CPU P8600 @ 2.40GHz.
|
| MTRR: Physical address space:
|
| 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
|
| 0x00000000000a0000 - 0x0000000000100000 size 0x00060000 type 0
|
| 0x0000000000100000 - 0x00000000bdc00000 size 0xbdb00000 type 6
|
| 0x00000000bdc00000 - 0x00000000d0000000 size 0x12400000 type 0
|
| 0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1
|
| 0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0
|
| 0x0000000100000000 - 0x000000013c000000 size 0x3c000000 type 6
|
| MTRR addr 0x0-0x10 set to 6 type @ 0
|
| MTRR addr 0x10-0x20 set to 6 type @ 1
|
| MTRR addr 0x20-0x30 set to 6 type @ 2
|
| MTRR addr 0x30-0x40 set to 6 type @ 3
|
| MTRR addr 0x40-0x50 set to 6 type @ 4
|
| MTRR addr 0x50-0x60 set to 6 type @ 5
|
| MTRR addr 0x60-0x70 set to 6 type @ 6
|
| MTRR addr 0x70-0x80 set to 6 type @ 7
|
| MTRR addr 0x80-0x84 set to 6 type @ 8
|
| MTRR addr 0x84-0x88 set to 6 type @ 9
|
| MTRR addr 0x88-0x8c set to 6 type @ 10
|
| MTRR addr 0x8c-0x90 set to 6 type @ 11
|
| MTRR addr 0x90-0x94 set to 6 type @ 12
|
| MTRR addr 0x94-0x98 set to 6 type @ 13
|
| MTRR addr 0x98-0x9c set to 6 type @ 14
|
| MTRR addr 0x9c-0xa0 set to 6 type @ 15
|
| MTRR addr 0xa0-0xa4 set to 0 type @ 16
|
| MTRR addr 0xa4-0xa8 set to 0 type @ 17
|
| MTRR addr 0xa8-0xac set to 0 type @ 18
|
| MTRR addr 0xac-0xb0 set to 0 type @ 19
|
| MTRR addr 0xb0-0xb4 set to 0 type @ 20
|
| MTRR addr 0xb4-0xb8 set to 0 type @ 21
|
| MTRR addr 0xb8-0xbc set to 0 type @ 22
|
| MTRR addr 0xbc-0xc0 set to 0 type @ 23
|
| MTRR addr 0xc0-0xc1 set to 0 type @ 24
|
| MTRR addr 0xc1-0xc2 set to 0 type @ 25
|
| MTRR addr 0xc2-0xc3 set to 0 type @ 26
|
| MTRR addr 0xc3-0xc4 set to 0 type @ 27
|
| MTRR addr 0xc4-0xc5 set to 0 type @ 28
|
| MTRR addr 0xc5-0xc6 set to 0 type @ 29
|
| MTRR addr 0xc6-0xc7 set to 0 type @ 30
|
| MTRR addr 0xc7-0xc8 set to 0 type @ 31
|
| MTRR addr 0xc8-0xc9 set to 0 type @ 32
|
| MTRR addr 0xc9-0xca set to 0 type @ 33
|
| MTRR addr 0xca-0xcb set to 0 type @ 34
|
| MTRR addr 0xcb-0xcc set to 0 type @ 35
|
| MTRR addr 0xcc-0xcd set to 0 type @ 36
|
| MTRR addr 0xcd-0xce set to 0 type @ 37
|
| MTRR addr 0xce-0xcf set to 0 type @ 38
|
| MTRR addr 0xcf-0xd0 set to 0 type @ 39
|
| MTRR addr 0xd0-0xd1 set to 0 type @ 40
|
| MTRR addr 0xd1-0xd2 set to 0 type @ 41
|
| MTRR addr 0xd2-0xd3 set to 0 type @ 42
|
| MTRR addr 0xd3-0xd4 set to 0 type @ 43
|
| MTRR addr 0xd4-0xd5 set to 0 type @ 44
|
| MTRR addr 0xd5-0xd6 set to 0 type @ 45
|
| MTRR addr 0xd6-0xd7 set to 0 type @ 46
|
| MTRR addr 0xd7-0xd8 set to 0 type @ 47
|
| MTRR addr 0xd8-0xd9 set to 0 type @ 48
|
| MTRR addr 0xd9-0xda set to 0 type @ 49
|
| MTRR addr 0xda-0xdb set to 0 type @ 50
|
| MTRR addr 0xdb-0xdc set to 0 type @ 51
|
| MTRR addr 0xdc-0xdd set to 0 type @ 52
|
| MTRR addr 0xdd-0xde set to 0 type @ 53
|
| MTRR addr 0xde-0xdf set to 0 type @ 54
|
| MTRR addr 0xdf-0xe0 set to 0 type @ 55
|
| MTRR addr 0xe0-0xe1 set to 0 type @ 56
|
| MTRR addr 0xe1-0xe2 set to 0 type @ 57
|
| MTRR addr 0xe2-0xe3 set to 0 type @ 58
|
| MTRR addr 0xe3-0xe4 set to 0 type @ 59
|
| MTRR addr 0xe4-0xe5 set to 0 type @ 60
|
| MTRR addr 0xe5-0xe6 set to 0 type @ 61
|
| MTRR addr 0xe6-0xe7 set to 0 type @ 62
|
| MTRR addr 0xe7-0xe8 set to 0 type @ 63
|
| MTRR addr 0xe8-0xe9 set to 0 type @ 64
|
| MTRR addr 0xe9-0xea set to 0 type @ 65
|
| MTRR addr 0xea-0xeb set to 0 type @ 66
|
| MTRR addr 0xeb-0xec set to 0 type @ 67
|
| MTRR addr 0xec-0xed set to 0 type @ 68
|
| MTRR addr 0xed-0xee set to 0 type @ 69
|
| MTRR addr 0xee-0xef set to 0 type @ 70
|
| MTRR addr 0xef-0xf0 set to 0 type @ 71
|
| MTRR addr 0xf0-0xf1 set to 0 type @ 72
|
| MTRR addr 0xf1-0xf2 set to 0 type @ 73
|
| MTRR addr 0xf2-0xf3 set to 0 type @ 74
|
| MTRR addr 0xf3-0xf4 set to 0 type @ 75
|
| MTRR addr 0xf4-0xf5 set to 0 type @ 76
|
| MTRR addr 0xf5-0xf6 set to 0 type @ 77
|
| MTRR addr 0xf6-0xf7 set to 0 type @ 78
|
| MTRR addr 0xf7-0xf8 set to 0 type @ 79
|
| MTRR addr 0xf8-0xf9 set to 0 type @ 80
|
| MTRR addr 0xf9-0xfa set to 0 type @ 81
|
| MTRR addr 0xfa-0xfb set to 0 type @ 82
|
| MTRR addr 0xfb-0xfc set to 0 type @ 83
|
| MTRR addr 0xfc-0xfd set to 0 type @ 84
|
| MTRR addr 0xfd-0xfe set to 0 type @ 85
|
| MTRR addr 0xfe-0xff set to 0 type @ 86
|
| MTRR addr 0xff-0x100 set to 0 type @ 87
|
| MTRR: Fixed MSR 0x250 0x0606060606060606
|
| MTRR: Fixed MSR 0x258 0x0606060606060606
|
| MTRR: Fixed MSR 0x259 0x0000000000000000
|
| MTRR: Fixed MSR 0x268 0x0000000000000000
|
| MTRR: Fixed MSR 0x269 0x0000000000000000
|
| MTRR: Fixed MSR 0x26a 0x0000000000000000
|
| MTRR: Fixed MSR 0x26b 0x0000000000000000
|
| MTRR: Fixed MSR 0x26c 0x0000000000000000
|
| MTRR: Fixed MSR 0x26d 0x0000000000000000
|
| MTRR: Fixed MSR 0x26e 0x0000000000000000
|
| MTRR: Fixed MSR 0x26f 0x0000000000000000
|
| call enable_fixed_mtrr()
|
| CPU physical address size: 36 bits
|
| MTRR: default type WB/UC MTRR counts: 6/16.
|
| MTRR: WB selected as default type.
|
| MTRR: 0 base 0x0000000000000000 mask 0x0000000ffff00000 type 0
|
| MTRR: 1 base 0x00000000bdc00000 mask 0x0000000fffc00000 type 0
|
| MTRR: 2 base 0x00000000be000000 mask 0x0000000ffe000000 type 0
|
| MTRR: 3 base 0x00000000c0000000 mask 0x0000000ff0000000 type 0
|
| MTRR: 4 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1
|
| MTRR: 5 base 0x00000000e0000000 mask 0x0000000fe0000000 type 0
|
|
|
| MTRR check
|
| Fixed MTRRs : Enabled
|
| Variable MTRRs: Enabled
|
|
|
| Setting up local apic... apic_id: 0x00 done.
|
| writing P-State 1: 0, 0, 6, 0x17, 15000; encoded: 0x0617
|
| writing P-State 1: 0, 0, 6, 0x17, 15000; encoded: 0x0617
|
| writing P-State 1: 0, 0, 6, 0x17, 15000; encoded: 0x0617
|
| writing P-State 1: 0, 0, 6, 0x17, 15000; encoded: 0x0617
|
| writing P-State 1: 0, 0, 6, 0x17, 15000; encoded: 0x0617
|
| writing P-State 0: 0, 0, 9, 0x22, 35000; encoded: 0x0922
|
| WARNING: No CMOS option 'hyper_threading'.
|
| CPU: 0 2 siblings
|
| CPU: 0 has sibling 1
|
| CPU #0 initialized
|
| CPU1: stack_base 00143000, stack_end 00143ff8
|
| Asserting INIT.
|
| Waiting for send to finish...
|
| +Deasserting INIT.
|
| Waiting for send to finish...
|
| +#startup loops: 2.
|
| Sending STARTUP #1 to 1.
|
| After apic_write.
|
| Startup point 1.
|
| Waiting for send to finish...
|
| +Sending STARTUP #2 to 1.
|
| After apic_write.
|
| Startup point 1.
|
| Waiting for send to finish...
|
| +After Startup.
|
| Initializing CPU #1
|
| Waiting for 1 CPUS to stop
|
| CPU: vendor Intel device 10676
|
| CPU: family 06, model 17, stepping 06
|
| Enabling cache
|
| microcode: sig=0x10676 pf=0x80 revision=0x0
|
| microcode: updated to revision 0x60f date=2010-09-29
|
| CPU: Intel(R) Core(TM)2 Duo CPU P8600 @ 2.40GHz.
|
| MTRR: Fixed MSR 0x250 0x0606060606060606
|
| MTRR: Fixed MSR 0x258 0x0606060606060606
|
| MTRR: Fixed MSR 0x259 0x0000000000000000
|
| MTRR: Fixed MSR 0x268 0x0000000000000000
|
| MTRR: Fixed MSR 0x269 0x0000000000000000
|
| MTRR: Fixed MSR 0x26a 0x0000000000000000
|
| MTRR: Fixed MSR 0x26b 0x0000000000000000
|
| MTRR: Fixed MSR 0x26c 0x0000000000000000
|
| MTRR: Fixed MSR 0x26d 0x0000000000000000
|
| MTRR: Fixed MSR 0x26e 0x0000000000000000
|
| MTRR: Fixed MSR 0x26f 0x0000000000000000
|
| call enable_fixed_mtrr()
|
| CPU physical address size: 36 bits
|
| MTRR: 0 base 0x0000000000000000 mask 0x0000000ffff00000 type 0
|
| MTRR: 1 base 0x00000000bdc00000 mask 0x0000000fffc00000 type 0
|
| MTRR: 2 base 0x00000000be000000 mask 0x0000000ffe000000 type 0
|
| MTRR: 3 base 0x00000000c0000000 mask 0x0000000ff0000000 type 0
|
| MTRR: 4 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1
|
| MTRR: 5 base 0x00000000e0000000 mask 0x0000000fe0000000 type 0
|
|
|
| MTRR check
|
| Fixed MTRRs : Enabled
|
| Variable MTRRs: Enabled
|
|
|
| Setting up local apic... apic_id: 0x01 done.
|
| writing P-State 2: 0, 0, 6, 0x17, 15000; encoded: 0x0617
|
| writing P-State 2: 0, 0, 6, 0x17, 15000; encoded: 0x0617
|
| writing P-State 2: 0, 0, 6, 0x17, 15000; encoded: 0x0617
|
| writing P-State 2: 0, 0, 6, 0x17, 15000; encoded: 0x0617
|
| writing P-State 2: 0, 0, 6, 0x17, 15000; encoded: 0x0617
|
| writing P-State 1: 0, 0, 9, 0x22, 35000; encoded: 0x0922
|
| CPU: 1 2 siblings
|
| CPU #1 initialized
|
| All AP CPUs stopped (1151 loops)
|
| CPU1: stack: 00143000 - 00144000, lowest used address 00143c80, stack used: 896 bytes
|
| DOMAIN: 0000 init
|
| PCI: 00:00.0 init
|
| PCI: 00:02.0 init
|
| Initializing VGA without OPROM. MMIO 0xe0000000
|
| EDID:
|
| 00 ff ff ff ff ff ff 00 30 ae 10 40 00 00 00 00
|
| 2d 12 01 03 80 1a 10 78 ea 85 c5 94 57 4f 8a 27
|
| 20 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
|
| 01 01 01 01 01 01 ee 1a 00 80 50 20 10 30 10 30
|
| 13 00 05 a3 10 00 00 19 d0 17 00 c6 50 20 19 30
|
| 30 20 36 00 05 a3 10 00 00 19 00 00 00 0f 00 81
|
| 0a 3c 81 0a 32 16 01 00 4c a3 57 31 00 00 00 fe
|
| 00 4c 54 4e 31 32 31 41 54 30 33 30 30 31 00 3d
|
| Extracted contents:
|
| header: 00 ff ff ff ff ff ff 00
|
| serial number: 30 ae 10 40 00 00 00 00 2d 12
|
| version: 01 03
|
| basic params: 80 1a 10 78 ea
|
| chroma info: 85 c5 94 57 4f 8a 27 20 50 54
|
| established: 00 00 00
|
| standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
|
| descriptor 1: ee 1a 00 80 50 20 10 30 10 30 13 00 05 a3 10 00 00 19
|
| descriptor 2: d0 17 00 c6 50 20 19 30 30 20 36 00 05 a3 10 00 00 19
|
| descriptor 3: 00 00 00 0f 00 81 0a 3c 81 0a 32 16 01 00 4c a3 57 31
|
| descriptor 4: 00 00 00 fe 00 4c 54 4e 31 32 31 41 54 30 33 30 30 31
|
| extensions: 00
|
| checksum: 3d
|
|
|
| Manufacturer: LEN Model 4010 Serial Number 0
|
| Made week 45 of 2008
|
| EDID version: 1.3
|
| Digital display
|
| Maximum image size: 26 cm x 16 cm
|
| Gamma: 220%
|
| Check DPMS levels
|
| DPMS levels: Standby Suspend Off
|
| Supported color formats: RGB 4:4:4, YCrCb 4:2:2
|
| First detailed timing is preferred timing
|
| Established timings supported:
|
| Standard timings supported:
|
| Detailed timings
|
| Hex of detail: ee1a0080502010301030130005a310000019
|
| Did detailed timing
|
| Detailed mode (IN HEX): Clock 68940 KHz, 105 mm x a3 mm
|
| 0500 0510 0540 0580 hborder 0
|
| 0320 0321 0324 0330 vborder 0
|
| -hsync -vsync
|
| Hex of detail: d01700c6502019303020360005a310000019
|
| Detailed mode (IN HEX): Clock 68940 KHz, 105 mm x a3 mm
|
| 0500 0510 0540 0580 hborder 0
|
| 0320 0321 0324 0330 vborder 0
|
| -hsync -vsync
|
| Hex of detail: 0000000f00810a3c810a321601004ca35731
|
| Manufacturer-specified data, tag 15
|
| Hex of detail: 000000fe004c544e31323141543033303031
|
| ASCII string: LTN121AT03001
|
| Checksum
|
| Checksum: 0x3d (valid)
|
|
|
| Unknown extension block
|
|
|
| EDID block does NOT conform to EDID 1.3!
|
| Missing name descriptor
|
| Missing monitor ranges
|
| EDID block does not conform at all!
|
| Detailed blocks filled with garbage
|
| bringing up panel at resolution 1280 x 800
|
| Borders 0 x 0
|
| Blank 128 x 16
|
| Sync 48 x 3
|
| Front porch 16 x 1
|
| Spread spectrum clock
|
| Single channel
|
| Polarities 1, 1
|
| Data M1=1204813, N1=8388608
|
| Link frequency 270000 kHz
|
| Link M1=133868, N1=524288
|
| Pixel N=8, M1=24, M2=9, P1=2
|
| Pixel clock 138214 kHz
|
| waiting for panel powerup
|
| panel powered up
|
| PCI: 00:02.1 init
|
| PCI: 00:03.0 init
|
| PCI: 00:19.0 init
|
| PCI: 00:1a.0 init
|
| PCI: 00:1a.1 init
|
| PCI: 00:1a.2 init
|
| PCI: 00:1a.7 init
|
| EHCI: Setting up controller.. done.
|
| PCI: 00:1b.0 init
|
| Azalia: base = e0620000
|
| Azalia: codec_mask = 01
|
| HD Audio: Initializing codec #0
|
| Azalia: codec viddid: 14f15051
|
| Azalia: verb_size: 32
|
| Azalia: verb loaded.
|
| PCI: 00:1c.0 init
|
| Initializing ICH9 PCIe root port.
|
| PCI: 00:1c.1 init
|
| Initializing ICH9 PCIe root port.
|
| PCI: 00:1c.2 init
|
| Initializing ICH9 PCIe root port.
|
| PCI: 00:1c.3 init
|
| Initializing ICH9 PCIe root port.
|
| PCI: 00:1d.0 init
|
| PCI: 00:1d.1 init
|
| PCI: 00:1d.2 init
|
| PCI: 00:1d.7 init
|
| EHCI: Setting up controller.. done.
|
| PCI: 00:1e.0 init
|
| PCI: 00:1f.0 init
|
| i82801ix: lpc_init
|
| IOAPIC: Initializing IOAPIC at 0xfec00000
|
| IOAPIC: Bootstrap Processor Local APIC = 0x00
|
| IOAPIC: ID = 0x02
|
| IOAPIC: Dumping registers
|
| reg 0x0000: 0x02000000
|
| reg 0x0001: 0x00170020
|
| reg 0x0002: 0x00170020
|
| IOAPIC: 24 interrupts
|
| IOAPIC: Enabling interrupts on FSB
|
| IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
|
| IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
|
| IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
|
| IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
|
| IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
|
| IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
|
| IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
|
| IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
|
| IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
|
| IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
|
| IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
|
| IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
|
| IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
|
| IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
|
| IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
|
| IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
|
| IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
|
| IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
|
| IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
|
| IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
|
| IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
|
| IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
|
| IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
|
| IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
|
| WARNING: No CMOS option 'power_on_after_fail'.
|
| Set power on after power failure.
|
| WARNING: No CMOS option 'nmi'.
|
| NMI sources disabled.
|
| rtc_failed = 0x0
|
| RTC Init
|
| Disabling ACPI via APMC:
|
| done.
|
| Locking SMM.
|
| PCI: 00:1f.2 init
|
| i82801ix_sata: initializing...
|
| SATA controller in AHCI mode.
|
| ABAR: E0625000
|
| PCI: 00:1f.3 init
|
| PCI: 02:00.0 init
|
| smbus: PCI: 00:1f.3[0]->I2C: 01:54 init
|
| smbus: PCI: 00:1f.3[0]->I2C: 01:55 init
|
| smbus: PCI: 00:1f.3[0]->I2C: 01:56 init
|
| smbus: PCI: 00:1f.3[0]->I2C: 01:57 init
|
| smbus: PCI: 00:1f.3[0]->I2C: 01:5c init
|
| Locking EEPROM RFID
|
| init EEPROM done
|
| smbus: PCI: 00:1f.3[0]->I2C: 01:5d init
|
| smbus: PCI: 00:1f.3[0]->I2C: 01:5e init
|
| smbus: PCI: 00:1f.3[0]->I2C: 01:5f init
|
| Devices initialized
|
| Show all devs...After init.
|
| Root Device: enabled 1
|
| CPU_CLUSTER: 0: enabled 1
|
| APIC: 00: enabled 1
|
| APIC: acac: enabled 0
|
| DOMAIN: 0000: enabled 1
|
| PCI: 00:00.0: enabled 1
|
| PCI: 00:02.0: enabled 1
|
| PCI: 00:02.1: enabled 1
|
| PCI: 00:03.0: enabled 1
|
| PCI: 00:03.1: enabled 0
|
| PCI: 00:03.2: enabled 0
|
| PCI: 00:03.3: enabled 0
|
| IOAPIC: 02: enabled 1
|
| PCI: 00:19.0: enabled 1
|
| PCI: 00:1a.0: enabled 1
|
| PCI: 00:1a.1: enabled 1
|
| PCI: 00:1a.2: enabled 1
|
| PCI: 00:1a.7: enabled 1
|
| PCI: 00:1b.0: enabled 1
|
| PCI: 00:1c.0: enabled 1
|
| PCI: 00:1c.1: enabled 1
|
| PCI: 00:1c.2: enabled 1
|
| PCI: 00:1c.3: enabled 1
|
| PCI: 00:1c.4: enabled 0
|
| PCI: 00:1c.5: enabled 0
|
| PCI: 00:1d.0: enabled 1
|
| PCI: 00:1d.1: enabled 1
|
| PCI: 00:1d.2: enabled 1
|
| PCI: 00:1d.7: enabled 1
|
| PCI: 00:1e.0: enabled 1
|
| PCI: 05:03.0: enabled 0
|
| PCI: 05:03.1: enabled 0
|
| PCI: 05:03.2: enabled 0
|
| PCI: 05:03.3: enabled 0
|
| PCI: 05:03.4: enabled 0
|
| PCI: 00:1f.0: enabled 1
|
| PNP: 00ff.1: enabled 1
|
| PNP: 00ff.2: enabled 1
|
| PCI: 00:1f.2: enabled 1
|
| PCI: 00:1f.3: enabled 1
|
| I2C: 01:54: enabled 1
|
| I2C: 01:55: enabled 1
|
| I2C: 01:56: enabled 1
|
| I2C: 01:57: enabled 1
|
| I2C: 01:5c: enabled 1
|
| I2C: 01:5d: enabled 1
|
| I2C: 01:5e: enabled 1
|
| I2C: 01:5f: enabled 1
|
| PCI: 00:1f.5: enabled 0
|
| PCI: 00:1f.6: enabled 0
|
| PCI: 02:00.0: enabled 1
|
| APIC: 01: enabled 1
|
| BS: Exiting BS_DEV_INIT state.
|
| BS: Entering BS_POST_DEVICE state.
|
| Finalize devices...
|
| Devices finalized
|
| BS: Exiting BS_POST_DEVICE state.
|
| BS: Entering BS_OS_RESUME_CHECK state.
|
| BS: Exiting BS_OS_RESUME_CHECK state.
|
| BS: Entering BS_WRITE_TABLES state.
|
| Writing ISA IRQs
|
| no IRQ found for PCI: 00:00.0
|
| fixed IRQ entry for: PCI: 00:02.0: INTA# -> IOAPIC 2 PIN 16
|
| no IRQ found for PCI: 00:02.1
|
| no IRQ found for PCI: 00:03.0
|
| no IRQ found for PCI: 00:19.0
|
| fixed IRQ entry for: PCI: 00:1a.0: INTA# -> IOAPIC 2 PIN 16
|
| fixed IRQ entry for: PCI: 00:1a.1: INTB# -> IOAPIC 2 PIN 17
|
| fixed IRQ entry for: PCI: 00:1a.2: INTC# -> IOAPIC 2 PIN 18
|
| fixed IRQ entry for: PCI: 00:1a.7: INTC# -> IOAPIC 2 PIN 18
|
| fixed IRQ entry for: PCI: 00:1b.0: INTA# -> IOAPIC 2 PIN 16
|
| fixed IRQ entry for: PCI: 00:1c.0: INTA# -> IOAPIC 2 PIN 16
|
| no IRQ found for PCI: 00:1c.1
|
| no IRQ found for PCI: 00:1c.2
|
| no IRQ found for PCI: 00:1c.3
|
| fixed IRQ entry for: PCI: 00:1d.0: INTA# -> IOAPIC 2 PIN 16
|
| fixed IRQ entry for: PCI: 00:1d.1: INTB# -> IOAPIC 2 PIN 17
|
| fixed IRQ entry for: PCI: 00:1d.2: INTC# -> IOAPIC 2 PIN 18
|
| fixed IRQ entry for: PCI: 00:1d.7: INTA# -> IOAPIC 2 PIN 16
|
| no IRQ found for PCI: 00:1e.0
|
| no IRQ found for PCI: 00:1f.0
|
| fixed IRQ entry for: PCI: 00:1f.2: INTB# -> IOAPIC 2 PIN 17
|
| fixed IRQ entry for: PCI: 00:1f.3: INTC# -> IOAPIC 2 PIN 18
|
| no IRQ found for PCI: 02:00.0
|
| Wrote the mp table end at: 000f0010 - 000f0194
|
| MPTABLE len: 404
|
| Writing ISA IRQs
|
| no IRQ found for PCI: 00:00.0
|
| fixed IRQ entry for: PCI: 00:02.0: INTA# -> IOAPIC 2 PIN 16
|
| no IRQ found for PCI: 00:02.1
|
| no IRQ found for PCI: 00:03.0
|
| no IRQ found for PCI: 00:19.0
|
| fixed IRQ entry for: PCI: 00:1a.0: INTA# -> IOAPIC 2 PIN 16
|
| fixed IRQ entry for: PCI: 00:1a.1: INTB# -> IOAPIC 2 PIN 17
|
| fixed IRQ entry for: PCI: 00:1a.2: INTC# -> IOAPIC 2 PIN 18
|
| fixed IRQ entry for: PCI: 00:1a.7: INTC# -> IOAPIC 2 PIN 18
|
| fixed IRQ entry for: PCI: 00:1b.0: INTA# -> IOAPIC 2 PIN 16
|
| fixed IRQ entry for: PCI: 00:1c.0: INTA# -> IOAPIC 2 PIN 16
|
| no IRQ found for PCI: 00:1c.1
|
| no IRQ found for PCI: 00:1c.2
|
| no IRQ found for PCI: 00:1c.3
|
| fixed IRQ entry for: PCI: 00:1d.0: INTA# -> IOAPIC 2 PIN 16
|
| fixed IRQ entry for: PCI: 00:1d.1: INTB# -> IOAPIC 2 PIN 17
|
| fixed IRQ entry for: PCI: 00:1d.2: INTC# -> IOAPIC 2 PIN 18
|
| fixed IRQ entry for: PCI: 00:1d.7: INTA# -> IOAPIC 2 PIN 16
|
| no IRQ found for PCI: 00:1e.0
|
| no IRQ found for PCI: 00:1f.0
|
| fixed IRQ entry for: PCI: 00:1f.2: INTB# -> IOAPIC 2 PIN 17
|
| fixed IRQ entry for: PCI: 00:1f.3: INTC# -> IOAPIC 2 PIN 18
|
| no IRQ found for PCI: 02:00.0
|
| Wrote the mp table end at: bdbda010 - bdbda194
|
| MPTABLE len: 404
|
| MP table: 404 bytes.
|
| ACPI: Writing ACPI tables at bdbce000.
|
| ACPI: * HPET
|
| ACPI: added table 1/32, length now 40
|
| ACPI: * MADT
|
| ACPI: added table 2/32, length now 44
|
| ACPI: * MCFG
|
| ACPI: added table 3/32, length now 48
|
| ACPI: * DMAR
|
| ACPI: added table 4/32, length now 52
|
| ACPI: * FACS
|
| ACPI: Patching up global NVS in DSDT at offset 0x01ff -> 0xbdbd19e0
|
| ACPI: * DSDT @ bdbce3f0 Length 35e1
|
| ACPI: * FADT
|
| ACPI: added table 5/32, length now 56
|
| ACPI: * SSDT
|
| Found 1 CPU(s) with 2 core(s) each.
|
| clocks between 800 and 2533 MHz.
|
| adding 4 P-States between busratio 6 and 9, incl. P0
|
| PSS: 2401MHz power 35000 control 0x4927 status 0x4927
|
| PSS: 2400MHz power 35000 control 0x922 status 0x922
|
| PSS: 1600MHz power 15000 control 0x617 status 0x617
|
| PSS: 800MHz power 12000 control 0x8611 status 0x8611
|
| clocks between 800 and 2533 MHz.
|
| adding 4 P-States between busratio 6 and 9, incl. P0
|
| PSS: 2401MHz power 35000 control 0x4927 status 0x4927
|
| PSS: 2400MHz power 35000 control 0x922 status 0x922
|
| PSS: 1600MHz power 15000 control 0x617 status 0x617
|
| PSS: 800MHz power 12000 control 0x8611 status 0x8611
|
| ACPI: added table 6/32, length now 60
|
| current = bdbd1ed0
|
| ACPI: done.
|
| ACPI tables: 16080 bytes.
|
| smbios_write_tables: bdbcd000
|
| Root Device (LENOVO 7458CY9)
|
| recv_ec_data: 0x37
|
| recv_ec_data: 0x58
|
| recv_ec_data: 0x48
|
| recv_ec_data: 0x54
|
| recv_ec_data: 0x32
|
| recv_ec_data: 0x35
|
| recv_ec_data: 0x57
|
| recv_ec_data: 0x57
|
| recv_ec_data: 0x06
|
| recv_ec_data: 0x03
|
| CPU_CLUSTER: 0 (Intel GM45 Northbridge)
|
| APIC: 00 (Socket BGA956 CPU)
|
| APIC: acac (Intel Penryn CPU)
|
| DOMAIN: 0000 (Intel GM45 Northbridge)
|
| PCI: 00:00.0 (Intel GM45 Northbridge)
|
| PCI: 00:02.0 (Intel GM45 Northbridge)
|
| PCI: 00:02.1 (Intel GM45 Northbridge)
|
| PCI: 00:03.0 (Intel GM45 Northbridge)
|
| PCI: 00:03.1 (Intel GM45 Northbridge)
|
| PCI: 00:03.2 (Intel GM45 Northbridge)
|
| PCI: 00:03.3 (Intel GM45 Northbridge)
|
| IOAPIC: 02 (IOAPIC)
|
| PCI: 00:19.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
|
| PCI: 00:1a.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
|
| PCI: 00:1a.1 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
|
| PCI: 00:1a.2 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
|
| PCI: 00:1a.7 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
|
| PCI: 00:1b.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
|
| PCI: 00:1c.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
|
| PCI: 00:1c.1 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
|
| PCI: 00:1c.2 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
|
| PCI: 00:1c.3 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
|
| PCI: 00:1c.4 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
|
| PCI: 00:1c.5 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
|
| PCI: 00:1d.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
|
| PCI: 00:1d.1 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
|
| PCI: 00:1d.2 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
|
| PCI: 00:1d.7 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
|
| PCI: 00:1e.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
|
| PCI: 05:03.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
|
| PCI: 05:03.1 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
|
| PCI: 05:03.2 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
|
| PCI: 05:03.3 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
|
| PCI: 05:03.4 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
|
| PCI: 00:1f.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
|
| PNP: 00ff.1 (Lenovo Power Management Hardware Hub 7)
|
| PNP: 00ff.2 (Lenovo H8 EC)
|
| PCI: 00:1f.2 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
|
| PCI: 00:1f.3 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
|
| I2C: 01:54 (AT24RF08C)
|
| I2C: 01:55 (AT24RF08C)
|
| I2C: 01:56 (AT24RF08C)
|
| I2C: 01:57 (AT24RF08C)
|
| I2C: 01:5c (AT24RF08C)
|
| I2C: 01:5d (AT24RF08C)
|
| I2C: 01:5e (AT24RF08C)
|
| I2C: 01:5f (AT24RF08C)
|
| PCI: 00:1f.5 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
|
| PCI: 00:1f.6 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge)
|
| PCI: 02:00.0 (unknown)
|
| APIC: 01 (unknown)
|
| SMBIOS tables: 424 bytes.
|
| Writing table forward entry at 0x00000500
|
| Wrote coreboot table at: 00000500, 0x10 bytes, checksum f231
|
| Table forward entry ends at 0x00000528.
|
| ... aligned to 0x00001000
|
| Writing coreboot table at 0xbdac5000
|
| rom_table_end = 0xbdac5000
|
| ... aligned to 0xbdad0000
|
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
|
| 1. 0000000000001000-000000000009ffff: RAM
|
| 2. 0000000000100000-00000000bdac4fff: RAM
|
| 3. 00000000bdac5000-00000000bdbfffff: CONFIGURATION TABLES
|
| 4. 00000000bdc00000-00000000bfffffff: RESERVED
|
| 5. 00000000f0000000-00000000f3ffffff: RESERVED
|
| 6. 0000000100000000-000000013bffffff: RAM
|
| Wrote coreboot table at: bdac5000, 0x7f8 bytes, checksum 561b
|
| coreboot table: 2064 bytes.
|
| CBMEM ROOT 0. bdbff000 00001000
|
| CAR GLOBALS 1. bdbfe000 00001000
|
| CONSOLE 2. bdbde000 00020000
|
| TIME STAMP 3. bdbdd000 00001000
|
| ROMSTAGE 4. bdbdc000 00001000
|
| GDT 5. bdbdb000 00001000
|
| SMP TABLE 6. bdbda000 00001000
|
| ACPI 7. bdbce000 0000c000
|
| SMBIOS 8. bdbcd000 00001000
|
| ACPI RESUME 9. bdacd000 00100000
|
| COREBOOT 10. bdac5000 00008000
|
| BS: Exiting BS_WRITE_TABLES state.
|
| BS: Entering BS_PAYLOAD_LOAD state.
|
| CBFS: located payload @ fff33438, 245032 bytes.
|
| Loading segment from rom address 0xfff33438
|
| code (compression=1)
|
| New segment dstaddr 0x8200 memsize 0x17d18 srcaddr 0xfff3348c filesize 0x83ea
|
| (cleaned up) New segment addr 0x8200 size 0x17d18 offset 0xfff3348c filesize 0x83ea
|
| Loading segment from rom address 0xfff33454
|
| code (compression=1)
|
| New segment dstaddr 0x100000 memsize 0xa33d4 srcaddr 0xfff3b876 filesize 0x338ea
|
| (cleaned up) New segment addr 0x100000 size 0xa33d4 offset 0xfff3b876 filesize 0x338ea
|
| Loading segment from rom address 0xfff33470
|
| Entry Point 0x00008200
|
| Bounce Buffer at bd9d8000, 967696 bytes
|
| Loading Segment: addr: 0x0000000000008200 memsz: 0x0000000000017d18 filesz: 0x00000000000083ea
|
| lb: [0x0000000000100000, 0x000000000014903c)
|
| Post relocation: addr: 0x0000000000008200 memsz: 0x0000000000017d18 filesz: 0x00000000000083ea
|
| using LZMA
|
| [ 0x00008200, 000185e3, 0x0001ff18) <- fff3348c
|
| Clearing Segment: addr: 0x00000000000185e3 memsz: 0x0000000000007935
|
| dest 00008200, end 0001ff18, bouncebuffer bd9d8000
|
| Loading Segment: addr: 0x0000000000100000 memsz: 0x00000000000a33d4 filesz: 0x00000000000338ea
|
| lb: [0x0000000000100000, 0x000000000014903c)
|
| segment: [0x0000000000100000, 0x00000000001338ea, 0x00000000001a33d4)
|
| bounce: [0x00000000bd9d8000, 0x00000000bda0b8ea, 0x00000000bda7b3d4)
|
| Post relocation: addr: 0x00000000bd9d8000 memsz: 0x00000000000a33d4 filesz: 0x00000000000338ea
|
| using LZMA
|
| [ 0xbd9d8000, bda7b3d4, 0xbda7b3d4) <- fff3b876
|
| dest bd9d8000, end bda7b3d4, bouncebuffer bd9d8000
|
| move suffix around: from bda2103c, to 14903c, amount: 5a398
|
| Loaded segments
|
| BS: Exiting BS_PAYLOAD_LOAD state.
|
| BS: Entering BS_PAYLOAD_BOOT state.
|
| ICH7 watchdog disabled
|
| Jumping to boot code at 00008200
|
| CPU0: stack: 00144000 - 00145000, lowest used address 00144abc, stack used: 1348 bytes
|
| entry = 0x00008200
|
| lb_start = 0x00100000
|
| lb_size = 0x0004903c
|
| buffer = 0xbd9d8000
|
| error: terminal `serial_usb0' isn't found. |
|
error: terminal `serial_usb0' isn't found. |
|
error: file `/boot/grub/i386-coreboot/progress.mod' not found. |
|
error: file `/boot/grub/i386-coreboot/true.mod' not found. |
|
error: file `/boot/grub/i386-coreboot/gfxterm.mod' not found. |
|
|