| |
| *** Pre-CBMEM romstage console overflowed, log truncated! *** |
| 2,1) ctrl=50000400 pids=004b4b69 ret=0 |
| dbgp: start (@ 1,1) ctrl=50000438 |
| dbgp: status (@ 1,1) ctrl=50000418 pids=00d2c32d ret=8 |
| dbgp: buf: 40 0b 00 00 01 00 00 00 |
| dbgp: start (@ 1,1) ctrl=50000420 |
| dbgp: status (@ 1,1) ctrl=50000400 pids=005a4b69 ret=0 |
| dbgp: status (@ 2,1) ctrl=50000400 pids=001e4b69 ret=0 |
| FTDI SET_BITMODE failed. |
| Could not enable debug dongle. |
| Could not probe gadget on debug port. |
| debug_port: 1 |
| n_ports: 8 |
| PORTSC #1: 00001005 |
| PORTSC #2: 00001000 |
| PORTSC #3: 00001000 |
| PORTSC #4: 00001803 |
| PORTSC #5: 00001000 |
| PORTSC #6: 00001000 |
| PORTSC #7: 00001000 |
| PORTSC #8: 00001000 |
| |
| |
| coreboot-4.6-1287-g3d9de62bc7 Thu Aug 31 02:37:07 UTC 2017 romstage starting... |
| SMBus controller enabled. |
| PM1_CNT: 00000000 |
| Initializing memory |
| Setting up RAM controller. |
| Dimms per channel: 1 |
| 4 CPU cores |
| Capable of DDR2 of 800 MHz or lower |
| fefffaac: 80 08 08 0e 0a 61 40 00 05 25 40 00 82 08 00 00 .....a@..%@..... |
| fefffabc: 0c 08 38 01 02 00 03 3d 50 50 60 32 1e 32 2d 01 ..8....=PP`2.2-. |
| fefffacc: 17 25 05 12 3c 1e 1e 00 00 39 7f 80 14 1e 00 00 .%..<....9...... |
| fefffadc: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 c3 ................ |
| fefffd34: 80 08 08 0e 0a 61 40 00 05 25 40 00 82 08 00 00 .....a@..%@..... |
| fefffd44: 0c 08 38 01 02 00 03 3d 50 50 60 32 1e 32 2d 01 ..8....=PP`2.2-. |
| fefffd54: 17 25 05 12 3c 1e 1e 00 00 39 7f 80 14 1e 00 00 .%..<....9...... |
| fefffd64: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 c3 ................ |
| DIMM 0 |
| Sides : 2 |
| Banks : 1 |
| Ranks : 2 |
| Rows : 14 |
| Cols : 10 |
| Page size : 1024 |
| Width : 8 |
| DIMM 2 |
| Sides : 2 |
| Banks : 1 |
| Ranks : 2 |
| Rows : 14 |
| Cols : 10 |
| Page size : 1024 |
| Width : 8 |
| Config[CH0] : 2 |
| Config[CH1] : 2 |
| Selected timings: |
| FSB: 1334MHz |
| DDR: 667MHz |
| CAS: 5 |
| tRAS: 15 |
| tRP: 5 |
| tRCD: 5 |
| tWR: 5 |
| tRFC: 43 |
| tWTR: 4 |
| tRRD: 3 |
| tRTP: 4 |
| Done clk crossing |
| Done launch |
| Done timings |
| DimmA populated only in channel 0 |
| DimmA populated only in channel 1 |
| Done ODT |
| Done pre-jedec |
| MRS... |
| CH0: Found Rank 0 |
| Jedec step 0 |
| Jedec step 1 |
| Jedec step 2 |
| Jedec step 3 |
| Jedec step 4 |
| Jedec step 5 |
| Jedec step 6 |
| Jedec step 7 |
| Jedec step 8 |
| Jedec step 9 |
| Jedec step 10 |
| Jedec step 11 |
| CH0: Found Rank 1 |
| Jedec step 0 |
| Jedec step 1 |
| Jedec step 2 |
| Jedec step 3 |
| Jedec step 4 |
| Jedec step 5 |
| Jedec step 6 |
| Jedec step 7 |
| Jedec step 8 |
| Jedec step 9 |
| Jedec step 10 |
| Jedec step 11 |
| CH1: Found Rank 0 |
| Jedec step 0 |
| Jedec step 1 |
| Jedec step 2 |
| Jedec step 3 |
| Jedec step 4 |
| Jedec step 5 |
| Jedec step 6 |
| Jedec step 7 |
| Jedec step 8 |
| Jedec step 9 |
| Jedec step 10 |
| Jedec step 11 |
| CH1: Found Rank 1 |
| Jedec step 0 |
| Jedec step 1 |
| Jedec step 2 |
| Jedec step 3 |
| Jedec step 4 |
| Jedec step 5 |
| Jedec step 6 |
| Jedec step 7 |
| Jedec step 8 |
| Jedec step 9 |
| Jedec step 10 |
| Jedec step 11 |
| MRS done |
| Done jedec steps |
| Done post-jedec |
| Done rcven |
| Done dummy reads |
| Total memory: 2048 + 2048 = 4096MiB |
| Done DRADRB |
| Done memory map |
| Done enhanced mode |
| Done PRCOMP |
| Done power settings |
| Done ddr2 |
| RAM initialization finished. |
| Memory initialized |
| Done Egress Port |
| Done DMI setup |
| CBMEM: |
| IMD: root @ 7bbff000 254 entries. |
| IMD: root @ 7bbfec00 62 entries. |
| x4x late init complete |
| MTRR Range: Start=ff800000 End=0 (Size 800000) |
| MTRR Range: Start=0 End=1000000 (Size 1000000) |
| MTRR Range: Start=7b800000 End=7bc00000 (Size 400000) |
| MTRR Range: Start=7b400000 End=7b800000 (Size 400000) |
| CBFS: 'Master Header Locator' located CBFS at [100:7fffc0) |
| CBFS: Locating 'fallback/ramstage' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size b84c |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset b940 |
| CBFS: File @ offset b940 size 29000 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at b940 |
| CBFS: Checking offset 349c0 |
| CBFS: File @ offset 349c0 size 11504 |
| CBFS: Found @ offset 349c0 size 11504 |
| Decompressing stage fallback/ramstage @ 0x7bb9efc0 (231664 bytes) |
| Loading module at 7bb9f000 with entry 7bb9f000. filesize: 0x2bf88 memsize: 0x388b0 |
| Processing 2268 relocs. Offset value of 0x7ba9f000 |
| |
| *** Pre-CBMEM ramstage console overflowed, log truncated! *** |
| status (@ 2,1) ctrl=50000400 pids=004b4b69 ret=0 |
| EHCI debug device renamed to 127. |
| dbgp: start (@ 1,1) ctrl=50000438 |
| dbgp: status (@ 1,1) ctrl=50000418 pids=00d2c32d ret=8 |
| dbgp: buf: 00 09 01 00 00 00 00 00 |
| dbgp: start (@ 1,1) ctrl=50000420 |
| dbgp: status (@ 1,1) ctrl=50000400 pids=005a4b69 ret=0 |
| dbgp: status (@ 2,1) ctrl=50000400 pids=004b4b69 ret=0 |
| dbgp: start (@ 1,1) ctrl=50000438 |
| dbgp: status (@ 1,1) ctrl=50000418 pids=00d2c32d ret=8 |
| dbgp: buf: 40 0b 00 00 01 00 00 00 |
| dbgp: start (@ 1,1) ctrl=50000420 |
| dbgp: status (@ 1,1) ctrl=50000400 pids=005a4b69 ret=0 |
| dbgp: status (@ 2,1) ctrl=50000400 pids=001e4b69 ret=0 |
| FTDI SET_BITMODE failed. |
| Could not enable debug dongle. |
| Could not probe gadget on debug port. |
| debug_port: 1 |
| n_ports: 8 |
| PORTSC #1: 00001005 |
| PORTSC #2: 00001000 |
| PORTSC #3: 00001000 |
| PORTSC #4: 00001803 |
| PORTSC #5: 00001000 |
| PORTSC #6: 00001000 |
| PORTSC #7: 00001000 |
| PORTSC #8: 00001000 |
| |
| |
| coreboot-4.6-1287-g3d9de62bc7 Thu Aug 31 02:37:07 UTC 2017 ramstage starting... |
| Normal boot. |
| Enumerating buses... |
| Show all devs... Before device enumeration. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 1 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:03.0: enabled 0 |
| PCI: 00:03.1: enabled 0 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 0 |
| PCI: 00:1c.3: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1d.1: enabled 1 |
| PCI: 00:1d.2: enabled 1 |
| PCI: 00:1d.3: enabled 1 |
| PCI: 00:1d.7: enabled 1 |
| PCI: 00:1e.0: enabled 1 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 002e.0: enabled 0 |
| PNP: 002e.1: enabled 1 |
| PNP: 002e.2: enabled 1 |
| PNP: 002e.3: enabled 0 |
| PNP: 002e.5: enabled 1 |
| PNP: 002e.6: enabled 0 |
| PNP: 002e.7: enabled 0 |
| PNP: 002e.8: enabled 0 |
| PNP: 002e.9: enabled 0 |
| PNP: 002e.109: enabled 0 |
| PNP: 002e.209: enabled 1 |
| PNP: 002e.309: enabled 0 |
| PNP: 002e.a: enabled 1 |
| PNP: 002e.b: enabled 1 |
| PNP: 002e.c: enabled 0 |
| PCI: 00:1f.1: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| PCI: 00:1f.4: enabled 0 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| Compare with tree... |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 1 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:03.0: enabled 0 |
| PCI: 00:03.1: enabled 0 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 0 |
| PCI: 00:1c.3: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1d.1: enabled 1 |
| PCI: 00:1d.2: enabled 1 |
| PCI: 00:1d.3: enabled 1 |
| PCI: 00:1d.7: enabled 1 |
| PCI: 00:1e.0: enabled 1 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 002e.0: enabled 0 |
| PNP: 002e.1: enabled 1 |
| PNP: 002e.2: enabled 1 |
| PNP: 002e.3: enabled 0 |
| PNP: 002e.5: enabled 1 |
| PNP: 002e.6: enabled 0 |
| PNP: 002e.7: enabled 0 |
| PNP: 002e.8: enabled 0 |
| PNP: 002e.9: enabled 0 |
| PNP: 002e.109: enabled 0 |
| PNP: 002e.209: enabled 1 |
| PNP: 002e.309: enabled 0 |
| PNP: 002e.a: enabled 1 |
| PNP: 002e.b: enabled 1 |
| PNP: 002e.c: enabled 0 |
| PCI: 00:1f.1: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| PCI: 00:1f.4: enabled 0 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| Root Device scanning... |
| root_dev_scan_bus for Root Device |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| DOMAIN: 0000 scanning... |
| PCI: pci_scan_bus for bus 00 |
| PCI: 00:00.0 [8086/2e30] enabled |
| Capability: type 0x0d @ 0x88 |
| Capability: type 0x01 @ 0x80 |
| Capability: type 0x05 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| Capability: type 0x0d @ 0x88 |
| Capability: type 0x01 @ 0x80 |
| Capability: type 0x05 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| PCI: 00:01.0 subordinate bus PCI Express |
| PCI: 00:01.0 [8086/2e31] enabled |
| PCI: 00:02.0 [8086/0000] ops |
| PCI: 00:02.0 [8086/2e32] enabled |
| memalign Enter, boundary 8, size 152, free_mem_ptr 7bbd38b0 |
| memalign 7bbd38b0 |
| PCI: 00:02.1 [8086/2e33] enabled |
| PCI: 00:1b.0 [8086/27d8] ops |
| PCI: 00:1b.0 [8086/27d8] enabled |
| PCI: 00:1c.0 [8086/0000] bus ops |
| PCI: 00:1c.0 [8086/27d0] enabled |
| PCI: 00:1c.1 [8086/0000] bus ops |
| PCI: 00:1c.1 [8086/27d2] enabled |
| PCI: 00:1d.0 [8086/27c8] ops |
| PCI: 00:1d.0 [8086/27c8] enabled |
| PCI: 00:1d.1 [8086/27c9] ops |
| PCI: 00:1d.1 [8086/27c9] enabled |
| PCI: 00:1d.2 [8086/27ca] ops |
| PCI: 00:1d.2 [8086/27ca] enabled |
| PCI: 00:1d.3 [8086/27cb] ops |
| PCI: 00:1d.3 [8086/27cb] enabled |
| PCI: 00:1d.7 [8086/27cc] ops |
| PCI: 00:1d.7 [8086/27cc] enabled |
| PCI: 00:1e.0 [8086/244e] bus ops |
| PCI: 00:1e.0 [8086/244e] enabled |
| PCI: 00:1f.0 [8086/0000] bus ops |
| PCI: 00:1f.0 [8086/27b8] enabled |
| PCI: 00:1f.1 [8086/27df] ops |
| PCI: 00:1f.1 [8086/27df] enabled |
| Set SATA mode early |
| PCI: 00:1f.2 [8086/0000] ops |
| Set SATA mode early |
| PCI: 00:1f.2 [8086/27c0] enabled |
| PCI: 00:1f.3 [8086/27da] bus ops |
| PCI: 00:1f.3 [8086/27da] enabled |
| PCI: 00:01.0 scanning... |
| do_pci_scan_bridge for PCI: 00:01.0 |
| memalign Enter, boundary 8, size 36, free_mem_ptr 7bbd3948 |
| memalign 7bbd3948 |
| PCI: pci_scan_bus for bus 01 |
| memalign Enter, boundary 8, size 152, free_mem_ptr 7bbd396c |
| memalign 7bbd3970 |
| PCI: 01:00.0 [1912/0014] enabled |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x05 @ 0x70 |
| Capability: type 0x11 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| Capability: type 0x0d @ 0x88 |
| Capability: type 0x01 @ 0x80 |
| Capability: type 0x05 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| scan_bus: scanning of bus PCI: 00:01.0 took 0 usecs |
| PCI: 00:1c.0 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.0 |
| memalign Enter, boundary 8, size 36, free_mem_ptr 7bbd3a08 |
| memalign 7bbd3a08 |
| PCI: pci_scan_bus for bus 02 |
| memalign Enter, boundary 8, size 152, free_mem_ptr 7bbd3a2c |
| memalign 7bbd3a30 |
| PCI: 02:00.0 [168c/002a] enabled |
| scan_bus: scanning of bus PCI: 00:1c.0 took 0 usecs |
| PCI: 00:1c.1 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.1 |
| memalign Enter, boundary 8, size 36, free_mem_ptr 7bbd3ac8 |
| memalign 7bbd3ac8 |
| PCI: pci_scan_bus for bus 03 |
| memalign Enter, boundary 8, size 152, free_mem_ptr 7bbd3aec |
| memalign 7bbd3af0 |
| PCI: 03:00.0 [10ec/8136] enabled |
| scan_bus: scanning of bus PCI: 00:1c.1 took 0 usecs |
| PCI: 00:1e.0 scanning... |
| do_pci_scan_bridge for PCI: 00:1e.0 |
| memalign Enter, boundary 8, size 36, free_mem_ptr 7bbd3b88 |
| memalign 7bbd3b88 |
| PCI: pci_scan_bus for bus 04 |
| scan_bus: scanning of bus PCI: 00:1e.0 took 0 usecs |
| PCI: 00:1f.0 scanning... |
| scan_lpc_bus for PCI: 00:1f.0 |
| PNP: 002e.0 disabled |
| PNP: 002e.1 enabled |
| PNP: 002e.2 enabled |
| PNP: 002e.3 disabled |
| PNP: 002e.5 enabled |
| PNP: 002e.6 disabled |
| PNP: 002e.7 disabled |
| PNP: 002e.8 disabled |
| PNP: 002e.9 disabled |
| PNP: 002e.109 disabled |
| PNP: 002e.209 enabled |
| PNP: 002e.309 disabled |
| PNP: 002e.a enabled |
| PNP: 002e.b enabled |
| PNP: 002e.c disabled |
| scan_lpc_bus for PCI: 00:1f.0 done |
| scan_bus: scanning of bus PCI: 00:1f.0 took 0 usecs |
| PCI: 00:1f.3 scanning... |
| scan_generic_bus for PCI: 00:1f.3 |
| scan_generic_bus for PCI: 00:1f.3 done |
| scan_bus: scanning of bus PCI: 00:1f.3 took 0 usecs |
| scan_bus: scanning of bus DOMAIN: 0000 took 0 usecs |
| root_dev_scan_bus for Root Device done |
| scan_bus: scanning of bus Root Device took 0 usecs |
| done |
| found VGA at PCI: 00:02.0 |
| Setting up VGA for PCI: 00:02.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| Allocating resources... |
| Reading resources... |
| Root Device read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 done |
| memalign Enter, boundary 8, size 2560, free_mem_ptr 7bbd3bac |
| memalign 7bbd3bb0 |
| TOUUD 0x180000000 TOLUD 0x80000000 TOM 0x100000000 |
| IGD decoded, subtracting 64M UMA and 1M GTT |
| TSEG decoded, subtracting 1M |
| Available memory below 4GB: 1982M |
| Available memory above 4GB: 2048M |
| Adding UMA memory area base=0x7be00000 size=0x04200000 |
| Adding PCIe config bar base=0xe0000000 size=0x10000000 |
| DOMAIN: 0000 read_resources bus 0 link: 0 |
| PCI: 00:01.0 read_resources bus 1 link: 0 |
| PCI: 00:01.0 read_resources bus 1 link: 0 done |
| PCI: 00:1c.0 read_resources bus 2 link: 0 |
| PCI: 00:1c.0 read_resources bus 2 link: 0 done |
| PCI: 00:1c.1 read_resources bus 3 link: 0 |
| PCI: 00:1c.1 read_resources bus 3 link: 0 done |
| PCI: 00:1d.7 EHCI BAR hook registered |
| PCI: 00:1e.0 read_resources bus 4 link: 0 |
| PCI: 00:1e.0 read_resources bus 4 link: 0 done |
| PCI: 00:1f.0 read_resources bus 0 link: 0 |
| PNP: 002e.1 missing read_resources |
| PNP: 002e.2 missing read_resources |
| PNP: 002e.5 missing read_resources |
| PNP: 002e.209 missing read_resources |
| PNP: 002e.a missing read_resources |
| PNP: 002e.b missing read_resources |
| PCI: 00:1f.0 read_resources bus 0 link: 0 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 done |
| Root Device read_resources bus 0 link: 0 done |
| Done reading resources. |
| Show resources in subtree (Root Device)...After reading. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: acac |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 |
| DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 |
| DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 4 |
| DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 5 |
| DOMAIN: 0000 resource base 100000 size 7bd00000 align 0 gran 0 limit 0 flags e0004200 index 6 |
| DOMAIN: 0000 resource base 100000000 size 80000000 align 0 gran 0 limit 0 flags e0004200 index 7 |
| DOMAIN: 0000 resource base 7be00000 size 4200000 align 0 gran 0 limit 0 flags f0000200 index 8 |
| DOMAIN: 0000 resource base fed10000 size 12f0000 align 0 gran 0 limit 0 flags f0000200 index 9 |
| DOMAIN: 0000 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index a |
| PCI: 00:00.0 |
| PCI: 00:01.0 child on link 0 PCI: 01:00.0 |
| PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 01:00.0 |
| PCI: 01:00.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:02.0 |
| PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18 |
| PCI: 00:02.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 20 |
| PCI: 00:02.1 |
| PCI: 00:02.1 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:03.0 |
| PCI: 00:03.1 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:1c.0 child on link 0 PCI: 02:00.0 |
| PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 02:00.0 |
| PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:1c.1 child on link 0 PCI: 03:00.0 |
| PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 03:00.0 |
| PCI: 03:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10 |
| PCI: 03:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 1201 index 18 |
| PCI: 03:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 1201 index 20 |
| PCI: 03:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 index 30 |
| PCI: 00:1c.2 |
| PCI: 00:1c.3 |
| PCI: 00:1d.0 |
| PCI: 00:1d.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 |
| PCI: 00:1d.1 |
| PCI: 00:1d.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 |
| PCI: 00:1d.2 |
| PCI: 00:1d.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 |
| PCI: 00:1d.3 |
| PCI: 00:1d.3 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 |
| PCI: 00:1d.7 |
| PCI: 00:1d.7 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| PCI: 00:1e.0 |
| PCI: 00:1e.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 00:1f.0 child on link 0 PNP: 002e.0 |
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PNP: 002e.0 |
| PNP: 002e.1 |
| PNP: 002e.1 resource base 70 size 0 align 0 gran 0 limit 0 flags c0000400 index 28 |
| PNP: 002e.1 resource base d2 size 0 align 0 gran 0 limit 0 flags c0000400 index 2c |
| PNP: 002e.1 resource base 378 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 002e.1 resource base 7 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.1 resource base 3 size 0 align 0 gran 0 limit 0 flags c0000800 index 74 |
| PNP: 002e.2 |
| PNP: 002e.2 resource base 3f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 002e.2 resource base 4 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.3 |
| PNP: 002e.5 |
| PNP: 002e.5 resource base 60 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 002e.5 resource base 64 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 |
| PNP: 002e.5 resource base 1 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.5 resource base c size 0 align 0 gran 0 limit 0 flags c0000400 index 72 |
| PNP: 002e.6 |
| PNP: 002e.7 |
| PNP: 002e.8 |
| PNP: 002e.9 |
| PNP: 002e.109 |
| PNP: 002e.209 |
| PNP: 002e.209 resource base 73 size 0 align 0 gran 0 limit 0 flags c0000400 index f4 |
| PNP: 002e.309 |
| PNP: 002e.a |
| PNP: 002e.a resource base 10 size 0 align 0 gran 0 limit 0 flags c0000400 index e4 |
| PNP: 002e.b |
| PNP: 002e.b resource base 290 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 002e.b resource base 0 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.c |
| PCI: 00:1f.1 |
| PCI: 00:1f.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 |
| PCI: 00:1f.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 |
| PCI: 00:1f.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 |
| PCI: 00:1f.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c |
| PCI: 00:1f.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 |
| PCI: 00:1f.2 |
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 |
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 |
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 |
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c |
| PCI: 00:1f.2 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 |
| PCI: 00:1f.3 |
| PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 |
| PCI: 00:1f.4 |
| PCI: 00:1f.5 |
| PCI: 00:1f.6 |
| DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff |
| PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 03:00.0 10 * [0x0 - 0xff] io |
| PCI: 00:1c.1 io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1e.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1e.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.1 1c * [0x0 - 0xfff] io |
| PCI: 00:1d.0 20 * [0x1000 - 0x101f] io |
| PCI: 00:1d.1 20 * [0x1020 - 0x103f] io |
| PCI: 00:1d.2 20 * [0x1040 - 0x105f] io |
| PCI: 00:1d.3 20 * [0x1060 - 0x107f] io |
| PCI: 00:1f.1 20 * [0x1080 - 0x108f] io |
| PCI: 00:1f.2 20 * [0x1090 - 0x109f] io |
| PCI: 00:02.0 20 * [0x10a0 - 0x10a7] io |
| PCI: 00:1f.1 10 * [0x10a8 - 0x10af] io |
| PCI: 00:1f.1 18 * [0x10b0 - 0x10b7] io |
| PCI: 00:1f.2 10 * [0x10b8 - 0x10bf] io |
| PCI: 00:1f.2 18 * [0x10c0 - 0x10c7] io |
| PCI: 00:1f.1 14 * [0x10c8 - 0x10cb] io |
| PCI: 00:1f.1 1c * [0x10cc - 0x10cf] io |
| PCI: 00:1f.2 14 * [0x10d0 - 0x10d3] io |
| PCI: 00:1f.2 1c * [0x10d4 - 0x10d7] io |
| DOMAIN: 0000 io: base: 10d8 size: 10d8 align: 12 gran: 0 limit: ffff done |
| DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff |
| PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:01.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 01:00.0 10 * [0x0 - 0x1fff] mem |
| PCI: 00:01.0 mem: base: 2000 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 02:00.0 10 * [0x0 - 0xffff] mem |
| PCI: 00:1c.0 mem: base: 10000 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 03:00.0 20 * [0x0 - 0xffff] prefmem |
| PCI: 03:00.0 18 * [0x10000 - 0x10fff] prefmem |
| PCI: 00:1c.1 prefmem: base: 11000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 03:00.0 30 * [0x0 - 0x1ffff] mem |
| PCI: 00:1c.1 mem: base: 20000 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1e.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 00:1e.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem |
| PCI: 00:02.0 10 * [0x10000000 - 0x103fffff] mem |
| PCI: 00:01.0 20 * [0x10400000 - 0x104fffff] mem |
| PCI: 00:02.1 10 * [0x10500000 - 0x105fffff] mem |
| PCI: 00:1c.0 20 * [0x10600000 - 0x106fffff] mem |
| PCI: 00:1c.1 24 * [0x10700000 - 0x107fffff] prefmem |
| PCI: 00:1c.1 20 * [0x10800000 - 0x108fffff] mem |
| PCI: 00:1b.0 10 * [0x10900000 - 0x10903fff] mem |
| PCI: 00:1d.7 10 * [0x10904000 - 0x109043ff] mem |
| DOMAIN: 0000 mem: base: 10904400 size: 10904400 align: 28 gran: 0 limit: ffffffff done |
| avoid_fixed_resources: DOMAIN: 0000 |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff |
| constrain_resources: DOMAIN: 0000 03 base 00000000 limit 0009ffff mem (fixed) |
| constrain_resources: DOMAIN: 0000 04 base 000a0000 limit 000bffff mem (fixed) |
| constrain_resources: DOMAIN: 0000 05 base 000c0000 limit 000fffff mem (fixed) |
| constrain_resources: DOMAIN: 0000 06 base 00100000 limit 7bdfffff mem (fixed) |
| constrain_resources: DOMAIN: 0000 08 base 7be00000 limit 7fffffff mem (fixed) |
| constrain_resources: DOMAIN: 0000 09 base fed10000 limit ffffffff mem (fixed) |
| constrain_resources: DOMAIN: 0000 0a base e0000000 limit efffffff mem (fixed) |
| constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed) |
| skipping PNP: 002e.1@28 fixed resource, size=0! |
| skipping PNP: 002e.1@2c fixed resource, size=0! |
| skipping PNP: 002e.1@60 fixed resource, size=0! |
| skipping PNP: 002e.1@70 fixed resource, size=0! |
| skipping PNP: 002e.1@74 fixed resource, size=0! |
| skipping PNP: 002e.2@60 fixed resource, size=0! |
| skipping PNP: 002e.2@70 fixed resource, size=0! |
| skipping PNP: 002e.5@60 fixed resource, size=0! |
| skipping PNP: 002e.5@62 fixed resource, size=0! |
| skipping PNP: 002e.5@70 fixed resource, size=0! |
| skipping PNP: 002e.5@72 fixed resource, size=0! |
| skipping PNP: 002e.209@f4 fixed resource, size=0! |
| skipping PNP: 002e.a@e4 fixed resource, size=0! |
| skipping PNP: 002e.b@60 fixed resource, size=0! |
| skipping PNP: 002e.b@70 fixed resource, size=0! |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff |
| Setting resources... |
| DOMAIN: 0000 io: base:1000 size:10d8 align:12 gran:0 limit:ffff |
| PCI: 00:1c.1 1c * [0x1000 - 0x1fff] io |
| PCI: 00:1d.0 20 * [0x2000 - 0x201f] io |
| PCI: 00:1d.1 20 * [0x2020 - 0x203f] io |
| PCI: 00:1d.2 20 * [0x2040 - 0x205f] io |
| PCI: 00:1d.3 20 * [0x2060 - 0x207f] io |
| PCI: 00:1f.1 20 * [0x2080 - 0x208f] io |
| PCI: 00:1f.2 20 * [0x2090 - 0x209f] io |
| PCI: 00:02.0 20 * [0x20a0 - 0x20a7] io |
| PCI: 00:1f.1 10 * [0x20a8 - 0x20af] io |
| PCI: 00:1f.1 18 * [0x20b0 - 0x20b7] io |
| PCI: 00:1f.2 10 * [0x20b8 - 0x20bf] io |
| PCI: 00:1f.2 18 * [0x20c0 - 0x20c7] io |
| PCI: 00:1f.1 14 * [0x20c8 - 0x20cb] io |
| PCI: 00:1f.1 1c * [0x20cc - 0x20cf] io |
| PCI: 00:1f.2 14 * [0x20d0 - 0x20d3] io |
| PCI: 00:1f.2 1c * [0x20d4 - 0x20d7] io |
| DOMAIN: 0000 io: next_base: 20d8 size: 10d8 align: 12 gran: 0 done |
| PCI: 00:01.0 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:01.0 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| PCI: 00:1c.0 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:1c.0 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| PCI: 00:1c.1 io: base:1000 size:1000 align:12 gran:12 limit:1fff |
| PCI: 03:00.0 10 * [0x1000 - 0x10ff] io |
| PCI: 00:1c.1 io: next_base: 1100 size: 1000 align: 12 gran: 12 done |
| PCI: 00:1e.0 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:1e.0 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| DOMAIN: 0000 mem: base:c0000000 size:10904400 align:28 gran:0 limit:dfffffff |
| PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem |
| PCI: 00:02.0 10 * [0xd0000000 - 0xd03fffff] mem |
| PCI: 00:01.0 20 * [0xd0400000 - 0xd04fffff] mem |
| PCI: 00:02.1 10 * [0xd0500000 - 0xd05fffff] mem |
| PCI: 00:1c.0 20 * [0xd0600000 - 0xd06fffff] mem |
| PCI: 00:1c.1 24 * [0xd0700000 - 0xd07fffff] prefmem |
| PCI: 00:1c.1 20 * [0xd0800000 - 0xd08fffff] mem |
| PCI: 00:1b.0 10 * [0xd0900000 - 0xd0903fff] mem |
| PCI: 00:1d.7 10 * [0xd0904000 - 0xd09043ff] mem |
| DOMAIN: 0000 mem: next_base: d0904400 size: 10904400 align: 28 gran: 0 done |
| PCI: 00:01.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff |
| PCI: 00:01.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:01.0 mem: base:d0400000 size:100000 align:20 gran:20 limit:d04fffff |
| PCI: 01:00.0 10 * [0xd0400000 - 0xd0401fff] mem |
| PCI: 00:01.0 mem: next_base: d0402000 size: 100000 align: 20 gran: 20 done |
| PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff |
| PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.0 mem: base:d0600000 size:100000 align:20 gran:20 limit:d06fffff |
| PCI: 02:00.0 10 * [0xd0600000 - 0xd060ffff] mem |
| PCI: 00:1c.0 mem: next_base: d0610000 size: 100000 align: 20 gran: 20 done |
| PCI: 00:1c.1 prefmem: base:d0700000 size:100000 align:20 gran:20 limit:d07fffff |
| PCI: 03:00.0 20 * [0xd0700000 - 0xd070ffff] prefmem |
| PCI: 03:00.0 18 * [0xd0710000 - 0xd0710fff] prefmem |
| PCI: 00:1c.1 prefmem: next_base: d0711000 size: 100000 align: 20 gran: 20 done |
| PCI: 00:1c.1 mem: base:d0800000 size:100000 align:20 gran:20 limit:d08fffff |
| PCI: 03:00.0 30 * [0xd0800000 - 0xd081ffff] mem |
| PCI: 00:1c.1 mem: next_base: d0820000 size: 100000 align: 20 gran: 20 done |
| PCI: 00:1e.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff |
| PCI: 00:1e.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1e.0 mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff |
| PCI: 00:1e.0 mem: next_base: dfffffff size: 0 align: 20 gran: 20 done |
| Root Device assign_resources, bus 0 link: 0 |
| DOMAIN: 0000 03 <- [0x0000000000 - 0x000009ffff] size 0x000a0000 gran 0x00 mem |
| DOMAIN: 0000 04 <- [0x00000a0000 - 0x00000bffff] size 0x00020000 gran 0x00 mem |
| DOMAIN: 0000 05 <- [0x00000c0000 - 0x00000fffff] size 0x00040000 gran 0x00 mem |
| DOMAIN: 0000 06 <- [0x0000100000 - 0x007bdfffff] size 0x7bd00000 gran 0x00 mem |
| DOMAIN: 0000 07 <- [0x0100000000 - 0x017fffffff] size 0x80000000 gran 0x00 mem |
| DOMAIN: 0000 08 <- [0x007be00000 - 0x007fffffff] size 0x04200000 gran 0x00 mem |
| DOMAIN: 0000 09 <- [0x00fed10000 - 0x00ffffffff] size 0x012f0000 gran 0x00 mem |
| DOMAIN: 0000 0a <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x00 mem |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| PCI: 00:01.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io |
| PCI: 00:01.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem |
| PCI: 00:01.0 20 <- [0x00d0400000 - 0x00d04fffff] size 0x00100000 gran 0x14 bus 01 mem |
| PCI: 00:01.0 assign_resources, bus 1 link: 0 |
| PCI: 01:00.0 10 <- [0x00d0400000 - 0x00d0401fff] size 0x00002000 gran 0x0d mem64 |
| PCI: 00:01.0 assign_resources, bus 1 link: 0 |
| PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d03fffff] size 0x00400000 gran 0x16 mem64 |
| PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64 |
| PCI: 00:02.0 20 <- [0x00000020a0 - 0x00000020a7] size 0x00000008 gran 0x03 io |
| PCI: 00:02.1 10 <- [0x00d0500000 - 0x00d05fffff] size 0x00100000 gran 0x14 mem64 |
| PCI: 00:1b.0 10 <- [0x00d0900000 - 0x00d0903fff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io |
| PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem |
| PCI: 00:1c.0 20 <- [0x00d0600000 - 0x00d06fffff] size 0x00100000 gran 0x14 bus 02 mem |
| PCI: 00:1c.0 assign_resources, bus 2 link: 0 |
| PCI: 02:00.0 10 <- [0x00d0600000 - 0x00d060ffff] size 0x00010000 gran 0x10 mem64 |
| PCI: 00:1c.0 assign_resources, bus 2 link: 0 |
| PCI: 00:1c.1 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 03 io |
| PCI: 00:1c.1 24 <- [0x00d0700000 - 0x00d07fffff] size 0x00100000 gran 0x14 bus 03 prefmem |
| PCI: 00:1c.1 20 <- [0x00d0800000 - 0x00d08fffff] size 0x00100000 gran 0x14 bus 03 mem |
| PCI: 00:1c.1 assign_resources, bus 3 link: 0 |
| PCI: 03:00.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io |
| PCI: 03:00.0 18 <- [0x00d0710000 - 0x00d0710fff] size 0x00001000 gran 0x0c prefmem64 |
| PCI: 03:00.0 20 <- [0x00d0700000 - 0x00d070ffff] size 0x00010000 gran 0x10 prefmem64 |
| PCI: 03:00.0 30 <- [0x00d0800000 - 0x00d081ffff] size 0x00020000 gran 0x11 romem |
| PCI: 00:1c.1 assign_resources, bus 3 link: 0 |
| PCI: 00:1d.0 20 <- [0x0000002000 - 0x000000201f] size 0x00000020 gran 0x05 io |
| PCI: 00:1d.1 20 <- [0x0000002020 - 0x000000203f] size 0x00000020 gran 0x05 io |
| PCI: 00:1d.2 20 <- [0x0000002040 - 0x000000205f] size 0x00000020 gran 0x05 io |
| PCI: 00:1d.3 20 <- [0x0000002060 - 0x000000207f] size 0x00000020 gran 0x05 io |
| PCI: 00:1d.7 EHCI Debug Port hook triggered |
| PCI: 00:1d.7 10 <- [0x00d0904000 - 0x00d09043ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1d.7 10 <- [0x00d0904000 - 0x00d09043ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1d.7 EHCI Debug Port relocated |
| PCI: 00:1e.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io |
| PCI: 00:1e.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 04 prefmem |
| PCI: 00:1e.0 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 04 mem |
| PCI: 00:1f.0 assign_resources, bus 0 link: 0 |
| PNP: 002e.1 missing set_resources |
| PNP: 002e.2 missing set_resources |
| PNP: 002e.5 missing set_resources |
| PNP: 002e.209 missing set_resources |
| PNP: 002e.a missing set_resources |
| PNP: 002e.b missing set_resources |
| PCI: 00:1f.0 assign_resources, bus 0 link: 0 |
| PCI: 00:1f.1 10 <- [0x00000020a8 - 0x00000020af] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.1 14 <- [0x00000020c8 - 0x00000020cb] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.1 18 <- [0x00000020b0 - 0x00000020b7] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.1 1c <- [0x00000020cc - 0x00000020cf] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.1 20 <- [0x0000002080 - 0x000000208f] size 0x00000010 gran 0x04 io |
| PCI: 00:1f.2 10 <- [0x00000020b8 - 0x00000020bf] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 14 <- [0x00000020d0 - 0x00000020d3] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 18 <- [0x00000020c0 - 0x00000020c7] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 1c <- [0x00000020d4 - 0x00000020d7] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 20 <- [0x0000002090 - 0x000000209f] size 0x00000010 gran 0x04 io |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| Root Device assign_resources, bus 0 link: 0 |
| Done setting resources. |
| Show resources in subtree (Root Device)...After assigning values. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: acac |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 1000 size 10d8 align 12 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base c0000000 size 10904400 align 28 gran 0 limit dfffffff flags 40040200 index 10000100 |
| DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 |
| DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 4 |
| DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 5 |
| DOMAIN: 0000 resource base 100000 size 7bd00000 align 0 gran 0 limit 0 flags e0004200 index 6 |
| DOMAIN: 0000 resource base 100000000 size 80000000 align 0 gran 0 limit 0 flags e0004200 index 7 |
| DOMAIN: 0000 resource base 7be00000 size 4200000 align 0 gran 0 limit 0 flags f0000200 index 8 |
| DOMAIN: 0000 resource base fed10000 size 12f0000 align 0 gran 0 limit 0 flags f0000200 index 9 |
| DOMAIN: 0000 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index a |
| PCI: 00:00.0 |
| PCI: 00:01.0 child on link 0 PCI: 01:00.0 |
| PCI: 00:01.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:01.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24 |
| PCI: 00:01.0 resource base d0400000 size 100000 align 20 gran 20 limit d04fffff flags 60080202 index 20 |
| PCI: 01:00.0 |
| PCI: 01:00.0 resource base d0400000 size 2000 align 13 gran 13 limit d0401fff flags 60000201 index 10 |
| PCI: 00:02.0 |
| PCI: 00:02.0 resource base d0000000 size 400000 align 22 gran 22 limit d03fffff flags 60000201 index 10 |
| PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18 |
| PCI: 00:02.0 resource base 20a0 size 8 align 3 gran 3 limit 20a7 flags 60000100 index 20 |
| PCI: 00:02.1 |
| PCI: 00:02.1 resource base d0500000 size 100000 align 20 gran 20 limit d05fffff flags 60000201 index 10 |
| PCI: 00:03.0 |
| PCI: 00:03.1 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base d0900000 size 4000 align 14 gran 14 limit d0903fff flags 60000201 index 10 |
| PCI: 00:1c.0 child on link 0 PCI: 02:00.0 |
| PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24 |
| PCI: 00:1c.0 resource base d0600000 size 100000 align 20 gran 20 limit d06fffff flags 60080202 index 20 |
| PCI: 02:00.0 |
| PCI: 02:00.0 resource base d0600000 size 10000 align 16 gran 16 limit d060ffff flags 60000201 index 10 |
| PCI: 00:1c.1 child on link 0 PCI: 03:00.0 |
| PCI: 00:1c.1 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c |
| PCI: 00:1c.1 resource base d0700000 size 100000 align 20 gran 20 limit d07fffff flags 60081202 index 24 |
| PCI: 00:1c.1 resource base d0800000 size 100000 align 20 gran 20 limit d08fffff flags 60080202 index 20 |
| PCI: 03:00.0 |
| PCI: 03:00.0 resource base 1000 size 100 align 8 gran 8 limit 10ff flags 60000100 index 10 |
| PCI: 03:00.0 resource base d0710000 size 1000 align 12 gran 12 limit d0710fff flags 60001201 index 18 |
| PCI: 03:00.0 resource base d0700000 size 10000 align 16 gran 16 limit d070ffff flags 60001201 index 20 |
| PCI: 03:00.0 resource base d0800000 size 20000 align 17 gran 17 limit d081ffff flags 60002200 index 30 |
| PCI: 00:1c.2 |
| PCI: 00:1c.3 |
| PCI: 00:1d.0 |
| PCI: 00:1d.0 resource base 2000 size 20 align 5 gran 5 limit 201f flags 60000100 index 20 |
| PCI: 00:1d.1 |
| PCI: 00:1d.1 resource base 2020 size 20 align 5 gran 5 limit 203f flags 60000100 index 20 |
| PCI: 00:1d.2 |
| PCI: 00:1d.2 resource base 2040 size 20 align 5 gran 5 limit 205f flags 60000100 index 20 |
| PCI: 00:1d.3 |
| PCI: 00:1d.3 resource base 2060 size 20 align 5 gran 5 limit 207f flags 60000100 index 20 |
| PCI: 00:1d.7 |
| PCI: 00:1d.7 resource base d0904000 size 400 align 12 gran 10 limit d09043ff flags 60000200 index 10 |
| PCI: 00:1e.0 |
| PCI: 00:1e.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:1e.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24 |
| PCI: 00:1e.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080202 index 20 |
| PCI: 00:1f.0 child on link 0 PNP: 002e.0 |
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PNP: 002e.0 |
| PNP: 002e.1 |
| PNP: 002e.1 resource base 70 size 0 align 0 gran 0 limit 0 flags c0000400 index 28 |
| PNP: 002e.1 resource base d2 size 0 align 0 gran 0 limit 0 flags c0000400 index 2c |
| PNP: 002e.1 resource base 378 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 002e.1 resource base 7 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.1 resource base 3 size 0 align 0 gran 0 limit 0 flags c0000800 index 74 |
| PNP: 002e.2 |
| PNP: 002e.2 resource base 3f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 002e.2 resource base 4 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.3 |
| PNP: 002e.5 |
| PNP: 002e.5 resource base 60 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 002e.5 resource base 64 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 |
| PNP: 002e.5 resource base 1 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.5 resource base c size 0 align 0 gran 0 limit 0 flags c0000400 index 72 |
| PNP: 002e.6 |
| PNP: 002e.7 |
| PNP: 002e.8 |
| PNP: 002e.9 |
| PNP: 002e.109 |
| PNP: 002e.209 |
| PNP: 002e.209 resource base 73 size 0 align 0 gran 0 limit 0 flags c0000400 index f4 |
| PNP: 002e.309 |
| PNP: 002e.a |
| PNP: 002e.a resource base 10 size 0 align 0 gran 0 limit 0 flags c0000400 index e4 |
| PNP: 002e.b |
| PNP: 002e.b resource base 290 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 002e.b resource base 0 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.c |
| PCI: 00:1f.1 |
| PCI: 00:1f.1 resource base 20a8 size 8 align 3 gran 3 limit 20af flags 60000100 index 10 |
| PCI: 00:1f.1 resource base 20c8 size 4 align 2 gran 2 limit 20cb flags 60000100 index 14 |
| PCI: 00:1f.1 resource base 20b0 size 8 align 3 gran 3 limit 20b7 flags 60000100 index 18 |
| PCI: 00:1f.1 resource base 20cc size 4 align 2 gran 2 limit 20cf flags 60000100 index 1c |
| PCI: 00:1f.1 resource base 2080 size 10 align 4 gran 4 limit 208f flags 60000100 index 20 |
| PCI: 00:1f.2 |
| PCI: 00:1f.2 resource base 20b8 size 8 align 3 gran 3 limit 20bf flags 60000100 index 10 |
| PCI: 00:1f.2 resource base 20d0 size 4 align 2 gran 2 limit 20d3 flags 60000100 index 14 |
| PCI: 00:1f.2 resource base 20c0 size 8 align 3 gran 3 limit 20c7 flags 60000100 index 18 |
| PCI: 00:1f.2 resource base 20d4 size 4 align 2 gran 2 limit 20d7 flags 60000100 index 1c |
| PCI: 00:1f.2 resource base 2090 size 10 align 4 gran 4 limit 209f flags 60000100 index 20 |
| PCI: 00:1f.3 |
| PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 |
| PCI: 00:1f.4 |
| PCI: 00:1f.5 |
| PCI: 00:1f.6 |
| Done allocating resources. |
| Enabling resources... |
| PCI: 00:00.0 subsystem <- 1849/2e30 |
| PCI: 00:00.0 cmd <- 06 |
| PCI: 00:01.0 bridge ctrl <- 0003 |
| PCI: 00:01.0 cmd <- 06 |
| PCI: 00:02.0 subsystem <- 1849/2e32 |
| PCI: 00:02.0 cmd <- 03 |
| PCI: 00:02.1 cmd <- 02 |
| PCI: 00:1b.0 subsystem <- 1849/3662 |
| PCI: 00:1b.0 cmd <- 102 |
| PCI: 00:1c.0 bridge ctrl <- 0003 |
| PCI: 00:1c.0 subsystem <- 1458/5000 |
| PCI: 00:1c.0 cmd <- 106 |
| PCI: 00:1c.1 bridge ctrl <- 0003 |
| PCI: 00:1c.1 subsystem <- 1458/5000 |
| PCI: 00:1c.1 cmd <- 107 |
| PCI: 00:1d.0 subsystem <- 1849/27c8 |
| PCI: 00:1d.0 cmd <- 01 |
| PCI: 00:1d.1 subsystem <- 1849/27c9 |
| PCI: 00:1d.1 cmd <- 01 |
| PCI: 00:1d.2 subsystem <- 1849/27ca |
| PCI: 00:1d.2 cmd <- 01 |
| PCI: 00:1d.3 subsystem <- 1849/27cb |
| PCI: 00:1d.3 cmd <- 01 |
| PCI: 00:1d.7 subsystem <- 1849/27cc |
| PCI: 00:1d.7 cmd <- 106 |
| PCI: 00:1e.0 bridge ctrl <- 0003 |
| PCI: 00:1e.0 subsystem <- 1458/5000 |
| PCI: 00:1e.0 cmd <- 100 |
| PCI: 00:1f.0 subsystem <- 1849/27b8 |
| PCI: 00:1f.0 cmd <- 107 |
| PCI: 00:1f.1 subsystem <- 1849/27df |
| PCI: 00:1f.1 cmd <- 01 |
| PCI: 00:1f.2 subsystem <- 1849/27c0 |
| PCI: 00:1f.2 cmd <- 01 |
| PCI: 00:1f.3 subsystem <- 1849/27da |
| PCI: 00:1f.3 cmd <- 101 |
| PCI: 01:00.0 cmd <- 02 |
| PCI: 02:00.0 cmd <- 02 |
| PCI: 03:00.0 cmd <- 03 |
| done. |
| Initializing devices... |
| Root Device init ... |
| CPU_CLUSTER: 0 init ... |
| start_eip=0x00001000, code_size=0x00000031 |
| Initializing SMM handler... ... pmbase = 0x0500 |
| |
| SMI_STS: PM1 |
| PM1_STS: WAK PWRBTN |
| GPE0_STS: GPIO13 GPIO12 GPIO11 GPIO9 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0 THRM |
| ALT_GP_SMI_STS: GPI13 GPI12 GPI11 GPI9 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0 |
| TCO_STS: |
| ... raise SMI# |
| Initializing CPU #0 |
| CPU: vendor Intel device 10677 |
| CPU: family 06, model 17, stepping 07 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [100:7fffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size b84c |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset b940 |
| CBFS: File @ offset b940 size 29000 |
| CBFS: Found @ offset b940 size 29000 |
| microcode: sig=0x10677 pf=0x10 revision=0x0 |
| Microcode size field is 0 |
| Microcode size field is 0 |
| Microcode size field is 0 |
| Microcode size field is 0 |
| Microcode size field is 0 |
| Microcode size field is 0 |
| microcode: updated to revision 0x70a date=2010-09-29 |
| CPU: Intel(R) Xeon(R) CPU X3320 @ 2.50GHz. |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7bbd45b0 |
| memalign 7bbd45b0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7bbd45c8 |
| memalign 7bbd45c8 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7bbd45e0 |
| memalign 7bbd45e0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7bbd45f8 |
| memalign 7bbd45f8 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7bbd4610 |
| memalign 7bbd4610 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7bbd4628 |
| memalign 7bbd4628 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7bbd4640 |
| memalign 7bbd4640 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7bbd4658 |
| memalign 7bbd4658 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7bbd4670 |
| memalign 7bbd4670 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7bbd4688 |
| memalign 7bbd4688 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7bbd46a0 |
| memalign 7bbd46a0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7bbd46b8 |
| memalign 7bbd46b8 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7bbd46d0 |
| memalign 7bbd46d0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7bbd46e8 |
| memalign 7bbd46e8 |
| MTRR: Physical address space: |
| 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 |
| 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 |
| 0x00000000000c0000 - 0x000000007be00000 size 0x7bd40000 type 6 |
| 0x000000007be00000 - 0x00000000c0000000 size 0x44200000 type 0 |
| 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1 |
| 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0 |
| 0x0000000100000000 - 0x0000000180000000 size 0x80000000 type 6 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| MTRR: default type WB/UC MTRR counts: 6/8. |
| MTRR: WB selected as default type. |
| MTRR: 0 base 0x000000007be00000 mask 0x0000000fffe00000 type 0 |
| MTRR: 1 base 0x000000007c000000 mask 0x0000000ffc000000 type 0 |
| MTRR: 2 base 0x0000000080000000 mask 0x0000000fc0000000 type 0 |
| MTRR: 3 base 0x00000000c0000000 mask 0x0000000ff0000000 type 1 |
| MTRR: 4 base 0x00000000d0000000 mask 0x0000000ff0000000 type 0 |
| MTRR: 5 base 0x00000000e0000000 mask 0x0000000fe0000000 type 0 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x00 done. |
| VMX status: enabled, locked |
| writing P-State 1: 0, 0, 6, 0x1a, 15000; encoded: 0x061a |
| writing P-State 1: 0, 0, 6, 0x1a, 15000; encoded: 0x061a |
| writing P-State 1: 0, 0, 6, 0x1a, 15000; encoded: 0x061a |
| writing P-State 1: 0, 0, 6, 0x1a, 15000; encoded: 0x061a |
| writing P-State 1: 0, 0, 6, 0x1a, 15000; encoded: 0x061a |
| writing P-State 0: 0, 1, 7, 0x1f, 35000; encoded: 0x471f |
| CPU: 0 4 siblings |
| memalign Enter, boundary 8, size 152, free_mem_ptr 7bbd4700 |
| memalign 7bbd4700 |
| CPU: 0 has sibling 1 |
| memalign Enter, boundary 8, size 152, free_mem_ptr 7bbd4798 |
| memalign 7bbd4798 |
| CPU: 0 has sibling 2 |
| memalign Enter, boundary 8, size 152, free_mem_ptr 7bbd4830 |
| memalign 7bbd4830 |
| CPU: 0 has sibling 3 |
| CPU #0 initialized |
| CPU1: stack_base 7bbcd000, stack_end 7bbcdff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 1. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 1. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #1 |
| CPU: vendor Intel device 10677 |
| CPU: family 06, model 17, stepping 07 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [100:7fffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size b84c |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset b940 |
| CBFS: File @ offset b940 size 29000 |
| CBFS: Found @ offset b940 size 29000 |
| microcode: sig=0x10677 pf=0x10 revision=0x0 |
| Microcode size field is 0 |
| Microcode size field is 0 |
| Microcode size field is 0 |
| Microcode size field is 0 |
| Microcode size field is 0 |
| Microcode size field is 0 |
| microcode: updated to revision 0x70a date=2010-09-29 |
| CPU: Intel(R) Xeon(R) CPU X3320 @ 2.50GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x01 done. |
| VMX status: enabled, locked |
| writing P-State 1: 0, 0, 6, 0x1a, 15000; encoded: 0x061a |
| writing P-State 1: 0, 0, 6, 0x1a, 15000; encoded: 0x061a |
| writing P-State 1: 0, 0, 6, 0x1a, 15000; encoded: 0x061a |
| writing P-State 1: 0, 0, 6, 0x1a, 15000; encoded: 0x061a |
| writing P-State 1: 0, 0, 6, 0x1a, 15000; encoded: 0x061a |
| writing P-State 0: 0, 1, 7, 0x1f, 35000; encoded: 0x471f |
| CPU: 1 4 siblings |
| CPU #1 initialized |
| CPU 1 going down... |
| CPU2: stack_base 7bbcc000, stack_end 7bbccff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 2. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 2. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #2 |
| CPU: vendor Intel device 10677 |
| CPU: family 06, model 17, stepping 07 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [100:7fffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size b84c |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset b940 |
| CBFS: File @ offset b940 size 29000 |
| CBFS: Found @ offset b940 size 29000 |
| microcode: sig=0x10677 pf=0x10 revision=0x0 |
| Microcode size field is 0 |
| Microcode size field is 0 |
| Microcode size field is 0 |
| Microcode size field is 0 |
| Microcode size field is 0 |
| Microcode size field is 0 |
| microcode: updated to revision 0x70a date=2010-09-29 |
| CPU: Intel(R) Xeon(R) CPU X3320 @ 2.50GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x02 done. |
| VMX status: enabled, locked |
| writing P-State 1: 0, 0, 6, 0x1a, 15000; encoded: 0x061a |
| writing P-State 1: 0, 0, 6, 0x1a, 15000; encoded: 0x061a |
| writing P-State 1: 0, 0, 6, 0x1a, 15000; encoded: 0x061a |
| writing P-State 1: 0, 0, 6, 0x1a, 15000; encoded: 0x061a |
| writing P-State 1: 0, 0, 6, 0x1a, 15000; encoded: 0x061a |
| writing P-State 0: 0, 1, 7, 0x1f, 35000; encoded: 0x471f |
| CPU: 2 4 siblings |
| CPU #2 initialized |
| CPU 2 going down... |
| CPU3: stack_base 7bbcb000, stack_end 7bbcbff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 3. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 3. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #3 |
| Waiting for 1 CPUS to stop |
| CPU: vendor Intel device 10677 |
| CPU: family 06, model 17, stepping 07 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [100:7fffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size b84c |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset b940 |
| CBFS: File @ offset b940 size 29000 |
| CBFS: Found @ offset b940 size 29000 |
| microcode: sig=0x10677 pf=0x10 revision=0x0 |
| Microcode size field is 0 |
| Microcode size field is 0 |
| Microcode size field is 0 |
| Microcode size field is 0 |
| Microcode size field is 0 |
| Microcode size field is 0 |
| microcode: updated to revision 0x70a date=2010-09-29 |
| CPU: Intel(R) Xeon(R) CPU X3320 @ 2.50GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x03 done. |
| VMX status: enabled, locked |
| writing P-State 1: 0, 0, 6, 0x1a, 15000; encoded: 0x061a |
| writing P-State 1: 0, 0, 6, 0x1a, 15000; encoded: 0x061a |
| writing P-State 1: 0, 0, 6, 0x1a, 15000; encoded: 0x061a |
| writing P-State 1: 0, 0, 6, 0x1a, 15000; encoded: 0x061a |
| writing P-State 1: 0, 0, 6, 0x1a, 15000; encoded: 0x061a |
| writing P-State 0: 0, 1, 7, 0x1f, 35000; encoded: 0x471f |
| CPU: 3 4 siblings |
| CPU #3 initialized |
| CPU 3 going down... |
| All AP CPUs stopped (3680 loops) |
| CPU0: stack: 7bbce000 - 7bbcf000, lowest used address 7bbcea80, stack used: 1408 bytes |
| CPU1: stack: 7bbcd000 - 7bbce000, lowest used address 7bbcdc10, stack used: 1008 bytes |
| CPU2: stack: 7bbcc000 - 7bbcd000, lowest used address 7bbccc10, stack used: 1008 bytes |
| CPU3: stack: 7bbcb000 - 7bbcc000, lowest used address 7bbcbc10, stack used: 1008 bytes |
| DOMAIN: 0000 init ... |
| PCI: 00:00.0 init ... |
| PCI: 00:02.0 init ... |
| Initializing VGA without OPROM. MMIO 0xd0000000 |
| EDID: |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
| Extracted contents: |
| header: 00 00 00 00 00 00 00 00 |
| serial number: 00 00 00 00 00 00 00 00 00 00 |
| version: 00 00 |
| basic params: 00 00 00 00 00 |
| chroma info: 00 00 00 00 00 00 00 00 00 00 |
| established: 00 00 00 |
| standard: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
| descriptor 1: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
| descriptor 2: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
| descriptor 3: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
| descriptor 4: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
| extensions: 00 |
| checksum: 00 |
| |
| No header found |
| EDID is null, using 640 x 480 @ 60Hz modebringing up panel at resolution 640 x 480 |
| Borders 0 x 0 |
| Blank 160 x 45 |
| Sync 96 x 2 |
| Front porch 16 x 10 |
| DREF clock |
| Polarities 0, 0 |
| Pixel N=3, M1=17, M2=8, P1=8, P2=10 |
| Pixel clock 25200 kHz |
| PCI: 00:02.1 init ... |
| PCI: 00:1b.0 init ... |
| Azalia: codec type: Azalia |
| Azalia: base = d0900000 |
| Azalia: codec_mask = 01 |
| Azalia: Initializing codec #0 |
| Azalia: codec viddid: 11064397 |
| Azalia: No verb! |
| PCI: 00:1c.0 init ... |
| Initializing ICH7 PCIe bridge. |
| PCI: 00:1c.1 init ... |
| Initializing ICH7 PCIe bridge. |
| PCI: 00:1d.0 init ... |
| UHCI: Setting up controller.. done. |
| PCI: 00:1d.1 init ... |
| UHCI: Setting up controller.. done. |
| PCI: 00:1d.2 init ... |
| UHCI: Setting up controller.. done. |
| PCI: 00:1d.3 init ... |
| UHCI: Setting up controller.. done. |
| PCI: 00:1d.7 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1e.0 init ... |
| PCI: 00:1f.0 init ... |
| i82801gx: lpc_init |
| IOAPIC: Initializing IOAPIC at 0xfec00000 |
| IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| IOAPIC: ID = 0x02 |
| IOAPIC: Dumping registers |
| reg 0x0000: 0x02000000 |
| reg 0x0001: 0x00170020 |
| reg 0x0002: 0x00170020 |
| Set power on after power failure. |
| NMI sources disabled. |
| rtc_failed = 0x0 |
| RTC Init |
| Disabling ACPI via APMC: |
| done. |
| Locking SMM. |
| PCI: 00:1f.1 init ... |
| i82801gx_ide: initializing... IDE0 |
| PCI: 00:1f.2 init ... |
| i82801gx_sata: initializing... |
| SATA controller in plain mode. |
| PCI: 01:00.0 init ... |
| PCI: 02:00.0 init ... |
| PCI: 03:00.0 init ... |
| Devices initialized |
| Show all devs... After init. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 1 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:03.0: enabled 0 |
| PCI: 00:03.1: enabled 0 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 0 |
| PCI: 00:1c.3: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1d.1: enabled 1 |
| PCI: 00:1d.2: enabled 1 |
| PCI: 00:1d.3: enabled 1 |
| PCI: 00:1d.7: enabled 1 |
| PCI: 00:1e.0: enabled 1 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 002e.0: enabled 0 |
| PNP: 002e.1: enabled 1 |
| PNP: 002e.2: enabled 1 |
| PNP: 002e.3: enabled 0 |
| PNP: 002e.5: enabled 1 |
| PNP: 002e.6: enabled 0 |
| PNP: 002e.7: enabled 0 |
| PNP: 002e.8: enabled 0 |
| PNP: 002e.9: enabled 0 |
| PNP: 002e.109: enabled 0 |
| PNP: 002e.209: enabled 1 |
| PNP: 002e.309: enabled 0 |
| PNP: 002e.a: enabled 1 |
| PNP: 002e.b: enabled 1 |
| PNP: 002e.c: enabled 0 |
| PCI: 00:1f.1: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| PCI: 00:1f.4: enabled 0 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| PCI: 00:02.1: enabled 1 |
| PCI: 01:00.0: enabled 1 |
| PCI: 02:00.0: enabled 1 |
| PCI: 03:00.0: enabled 1 |
| APIC: 01: enabled 1 |
| APIC: 02: enabled 1 |
| APIC: 03: enabled 1 |
| Finalize devices... |
| Devices finalized |
| CBFS: 'Master Header Locator' located CBFS at [100:7fffc0) |
| CBFS: Locating 'fallback/dsdt.aml' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size b84c |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset b940 |
| CBFS: File @ offset b940 size 29000 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at b940 |
| CBFS: Checking offset 349c0 |
| CBFS: File @ offset 349c0 size 11504 |
| CBFS: Unmatched 'fallback/ramstage' at 349c0 |
| CBFS: Checking offset 45f00 |
| CBFS: File @ offset 45f00 size 6800 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 45f00 |
| CBFS: Checking offset 4c780 |
| CBFS: File @ offset 4c780 size 2a4 |
| CBFS: Unmatched 'config' at 4c780 |
| CBFS: Checking offset 4ca80 |
| CBFS: File @ offset 4ca80 size 240 |
| CBFS: Unmatched 'revision' at 4ca80 |
| CBFS: Checking offset 4cd00 |
| CBFS: File @ offset 4cd00 size 4bc |
| CBFS: Unmatched 'cmos_layout.bin' at 4cd00 |
| CBFS: Checking offset 4d200 |
| CBFS: File @ offset 4d200 size 201d |
| CBFS: Found @ offset 4d200 size 201d |
| CBFS: 'Master Header Locator' located CBFS at [100:7fffc0) |
| CBFS: Locating 'fallback/slic' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size b84c |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset b940 |
| CBFS: File @ offset b940 size 29000 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at b940 |
| CBFS: Checking offset 349c0 |
| CBFS: File @ offset 349c0 size 11504 |
| CBFS: Unmatched 'fallback/ramstage' at 349c0 |
| CBFS: Checking offset 45f00 |
| CBFS: File @ offset 45f00 size 6800 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 45f00 |
| CBFS: Checking offset 4c780 |
| CBFS: File @ offset 4c780 size 2a4 |
| CBFS: Unmatched 'config' at 4c780 |
| CBFS: Checking offset 4ca80 |
| CBFS: File @ offset 4ca80 size 240 |
| CBFS: Unmatched 'revision' at 4ca80 |
| CBFS: Checking offset 4cd00 |
| CBFS: File @ offset 4cd00 size 4bc |
| CBFS: Unmatched 'cmos_layout.bin' at 4cd00 |
| CBFS: Checking offset 4d200 |
| CBFS: File @ offset 4d200 size 201d |
| CBFS: Unmatched 'fallback/dsdt.aml' at 4d200 |
| CBFS: Checking offset 4f280 |
| CBFS: File @ offset 4f280 size 18ed8 |
| CBFS: Unmatched 'img/coreinfo' at 4f280 |
| CBFS: Checking offset 68180 |
| CBFS: File @ offset 68180 size 228dc |
| CBFS: Unmatched 'img/nvramcui' at 68180 |
| CBFS: Checking offset 8aac0 |
| CBFS: File @ offset 8aac0 size f65f |
| CBFS: Unmatched 'fallback/payload' at 8aac0 |
| CBFS: Checking offset 9a180 |
| CBFS: File @ offset 9a180 size 660 |
| CBFS: Unmatched 'payload_config' at 9a180 |
| CBFS: Checking offset 9a840 |
| CBFS: File @ offset 9a840 size ea |
| CBFS: Unmatched 'payload_revision' at 9a840 |
| CBFS: Checking offset 9a980 |
| CBFS: File @ offset 9a980 size 2c02c |
| CBFS: Unmatched 'img/memtest' at 9a980 |
| CBFS: Checking offset c6a00 |
| CBFS: File @ offset c6a00 size 738498 |
| CBFS: Unmatched '' at c6a00 |
| CBFS: Checking offset 7feec0 |
| CBFS: File @ offset 7feec0 size 1000 |
| CBFS: 'fallback/slic' not found. |
| ACPI: Writing ACPI tables at 7bb29000. |
| ACPI: * FACS |
| ACPI: * DSDT |
| ACPI: * FADT |
| ACPI: added table 1/32, length now 40 |
| ACPI: * SSDT |
| Found 1 CPU(s) with 4 core(s) each. |
| clocks between 2000 and 2500 MHz. |
| adding 2 P-States between busratio 6 and 7, incl. P0 |
| PSS: 2500MHz power 35000 control 0x471f status 0x471f |
| PSS: 2000MHz power 15000 control 0x61a status 0x61a |
| clocks between 2000 and 2500 MHz. |
| adding 2 P-States between busratio 6 and 7, incl. P0 |
| PSS: 2500MHz power 35000 control 0x471f status 0x471f |
| PSS: 2000MHz power 15000 control 0x61a status 0x61a |
| clocks between 2000 and 2500 MHz. |
| adding 2 P-States between busratio 6 and 7, incl. P0 |
| PSS: 2500MHz power 35000 control 0x471f status 0x471f |
| PSS: 2000MHz power 15000 control 0x61a status 0x61a |
| clocks between 2000 and 2500 MHz. |
| adding 2 P-States between busratio 6 and 7, incl. P0 |
| PSS: 2500MHz power 35000 control 0x471f status 0x471f |
| PSS: 2000MHz power 15000 control 0x61a status 0x61a |
| ACPI: added table 2/32, length now 44 |
| ACPI: * MCFG |
| ACPI: added table 3/32, length now 48 |
| ACPI: * TCPA |
| TCPA log created at 7bb19000 |
| ACPI: added table 4/32, length now 52 |
| ACPI: * MADT |
| ACPI: added table 5/32, length now 56 |
| current = 7bb2b850 |
| current = 7bb2b850 |
| ACPI: * HPET |
| ACPI: added table 6/32, length now 60 |
| ACPI: done. |
| ACPI tables: 10384 bytes. |
| smbios_write_tables: 7bb18000 |
| Root Device (ASROCK G41C-GS) |
| CPU_CLUSTER: 0 (Intel 4-Series Northbridge) |
| APIC: 00 (unknown) |
| APIC: acac (Intel Penryn CPU) |
| DOMAIN: 0000 (Intel 4-Series Northbridge) |
| PCI: 00:00.0 (Intel 4-Series Northbridge) |
| PCI: 00:01.0 (Intel 4-Series Northbridge) |
| PCI: 00:02.0 (Intel 4-Series Northbridge) |
| PCI: 00:03.0 (Intel 4-Series Northbridge) |
| PCI: 00:03.1 (Intel 4-Series Northbridge) |
| PCI: 00:1b.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1c.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1c.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1c.2 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1c.3 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1d.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1d.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1d.2 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1d.3 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1d.7 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1e.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1f.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PNP: 002e.0 (unknown) |
| PNP: 002e.1 (unknown) |
| PNP: 002e.2 (unknown) |
| PNP: 002e.3 (unknown) |
| PNP: 002e.5 (unknown) |
| PNP: 002e.6 (unknown) |
| PNP: 002e.7 (unknown) |
| PNP: 002e.8 (unknown) |
| PNP: 002e.9 (unknown) |
| PNP: 002e.109 (unknown) |
| PNP: 002e.209 (unknown) |
| PNP: 002e.309 (unknown) |
| PNP: 002e.a (unknown) |
| PNP: 002e.b (unknown) |
| PNP: 002e.c (unknown) |
| PCI: 00:1f.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1f.2 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1f.3 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1f.4 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1f.5 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:1f.6 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) |
| PCI: 00:02.1 (unknown) |
| PCI: 01:00.0 (unknown) |
| PCI: 02:00.0 (unknown) |
| PCI: 03:00.0 (unknown) |
| APIC: 01 (unknown) |
| APIC: 02 (unknown) |
| APIC: 03 (unknown) |
| SMBIOS tables: 344 bytes. |
| Writing table forward entry at 0x00000500 |
| Wrote coreboot table at: 00000500, 0x10 bytes, checksum b429 |
| Writing coreboot table at 0x7bb4d000 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7bbd48c8 |
| memalign 7bbd48c8 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7bbd48e0 |
| memalign 7bbd48e0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7bbd48f8 |
| memalign 7bbd48f8 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7bbd4910 |
| memalign 7bbd4910 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7bbd4928 |
| memalign 7bbd4928 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7bbd4940 |
| memalign 7bbd4940 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7bbd4958 |
| memalign 7bbd4958 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7bbd4970 |
| memalign 7bbd4970 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7bbd4988 |
| memalign 7bbd4988 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7bbd49a0 |
| memalign 7bbd49a0 |
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1. 0000000000001000-000000000009ffff: RAM |
| 2. 00000000000a0000-00000000000fffff: RESERVED |
| 3. 0000000000100000-000000007bb17fff: RAM |
| 4. 000000007bb18000-000000007bbfffff: CONFIGURATION TABLES |
| 5. 000000007bc00000-000000007bdfffff: RAM |
| 6. 000000007be00000-000000007fffffff: RESERVED |
| 7. 00000000e0000000-00000000efffffff: RESERVED |
| 8. 00000000fed10000-00000000ffffffff: RESERVED |
| 9. 0000000100000000-000000017fffffff: RAM |
| CBFS: 'Master Header Locator' located CBFS at [100:7fffc0) |
| FMAP: Found "FLASH" version 1.1 at 0. |
| FMAP: base = ff800000 size = 800000 #areas = 3 |
| Wrote coreboot table at: 7bb4d000, 0x338 bytes, checksum c6e6 |
| coreboot table: 848 bytes. |
| IMD ROOT 0. 7bbff000 00001000 |
| IMD SMALL 1. 7bbfe000 00001000 |
| CONSOLE 2. 7bbde000 00020000 |
| TIME STAMP 3. 7bbdd000 00000400 |
| ROMSTG STCK 4. 7bbd8000 00005000 |
| RAMSTAGE 5. 7bb9e000 0003a000 |
| 57a9e100 6. 7bb65000 000388b0 |
| SMM BACKUP 7. 7bb55000 00010000 |
| COREBOOT 8. 7bb4d000 00008000 |
| ACPI 9. 7bb29000 00024000 |
| TCPA LOG 10. 7bb19000 00010000 |
| SMBIOS 11. 7bb18000 00000800 |
| IMD small region: |
| IMD ROOT 0. 7bbfec00 00000400 |
| CAR GLOBALS 1. 7bbfea40 000001c0 |
| USBDEBUG 2. 7bbfe9e0 00000058 |
| ROMSTAGE 3. 7bbfe9c0 00000004 |
| 57a9e000 4. 7bbfe9a0 00000010 |
| ACPI GNVS 5. 7bbfe8a0 00000100 |
| CBFS: 'Master Header Locator' located CBFS at [100:7fffc0) |
| CBFS: Locating 'fallback/payload' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size b84c |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset b940 |
| CBFS: File @ offset b940 size 29000 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at b940 |
| CBFS: Checking offset 349c0 |
| CBFS: File @ offset 349c0 size 11504 |
| CBFS: Unmatched 'fallback/ramstage' at 349c0 |
| CBFS: Checking offset 45f00 |
| CBFS: File @ offset 45f00 size 6800 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 45f00 |
| CBFS: Checking offset 4c780 |
| CBFS: File @ offset 4c780 size 2a4 |
| CBFS: Unmatched 'config' at 4c780 |
| CBFS: Checking offset 4ca80 |
| CBFS: File @ offset 4ca80 size 240 |
| CBFS: Unmatched 'revision' at 4ca80 |
| CBFS: Checking offset 4cd00 |
| CBFS: File @ offset 4cd00 size 4bc |
| CBFS: Unmatched 'cmos_layout.bin' at 4cd00 |
| CBFS: Checking offset 4d200 |
| CBFS: File @ offset 4d200 size 201d |
| CBFS: Unmatched 'fallback/dsdt.aml' at 4d200 |
| CBFS: Checking offset 4f280 |
| CBFS: File @ offset 4f280 size 18ed8 |
| CBFS: Unmatched 'img/coreinfo' at 4f280 |
| CBFS: Checking offset 68180 |
| CBFS: File @ offset 68180 size 228dc |
| CBFS: Unmatched 'img/nvramcui' at 68180 |
| CBFS: Checking offset 8aac0 |
| CBFS: File @ offset 8aac0 size f65f |
| CBFS: Found @ offset 8aac0 size f65f |
| Loading segment from ROM address 0xff88abf8 |
| code (compression=1) |
| memalign Enter, boundary 8, size 28, free_mem_ptr 7bbd49b8 |
| memalign 7bbd49b8 |
| New segment dstaddr 0xe31c0 memsize 0x1ce40 srcaddr 0xff88ac30 filesize 0xf627 |
| Loading segment from ROM address 0xff88ac14 |
| Entry Point 0x000ff06e |
| Payload being loaded at below 1MiB without region being marked as RAM usable. |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7bbd49d4 |
| memalign 7bbd49d8 |
| Loading Segment: addr: 0x00000000000e31c0 memsz: 0x000000000001ce40 filesz: 0x000000000000f627 |
| lb: [0x000000007bb9f000, 0x000000007bbd78b0) |
| Post relocation: addr: 0x00000000000e31c0 memsz: 0x000000000001ce40 filesz: 0x000000000000f627 |
| using LZMA |
| [ 0x000e31c0, 00100000, 0x00100000) <- ff88ac30 |
| dest 000e31c0, end 00100000, bouncebuffer ffffffff |
| Loaded segments |
| ICH7 watchdog disabled |
| Jumping to boot code at 000ff06e(7bb4d000) |
| CPU0: stack: 7bbce000 - 7bbcf000, lowest used address 7bbcea80, stack used: 1408 bytes |
| SeaBIOS (version rel-1.10.2-0-g5f4c7b1) |
| BUILD: gcc: (coreboot toolchain v1.44 March 3rd, 2017) 6.3.0 binutils: (GNU Binutils) 2.28 |
| Found coreboot cbmem console @ 7bbde000 |
| Found mainboard ASROCK G41C-GS |
| Relocating init from 0x000e4740 to 0x7bdb3d80 (size 49600) |
| Found CBFS header at 0xff800138 |
| multiboot: eax=7bbca9e0, ebx=7bbca998 |
| Found 20 PCI devices (max PCI bus is 04) |
| Copying SMBIOS entry point from 0x7bb18000 to 0x000f08e0 |
| Copying ACPI RSDP from 0x7bb29000 to 0x000f08b0 |
| Using pmtimer, ioport 0x508 |
| Scan for VGA option rom |
| Running option rom at c000:0003 |
| pmm call arg1=0 |
| Turning on vga text mode console |
| SeaBIOS (version rel-1.10.2-0-g5f4c7b1) |
| XHCI init on dev 01:00.0: regs @ 0xd0400000, 8 ports, 32 slots, 64 byte contexts |
| XHCI extcap 0x1 @ 0xd0400500 |
| XHCI protocol USB 3.00, 4 ports (offset 1), def 0 |
| XHCI protocol USB 2.00, 4 ports (offset 5), def 0 |
| XHCI extcap 0xc0 @ 0xd0400540 |
| XHCI extcap 0xa @ 0xd0400550 |
| EHCI init on dev 00:1d.7 (regs=0xd0904020) |
| UHCI init on dev 00:1d.0 (io=2000) |
| UHCI init on dev 00:1d.1 (io=2020) |
| UHCI init on dev 00:1d.2 (io=2040) |
| UHCI init on dev 00:1d.3 (io=2060) |
| ATA controller 1 at 1f0/3f4/0 (irq 14 dev f9) |
| ATA controller 2 at 170/374/0 (irq 15 dev f9) |
| ATA controller 3 at 20b8/20d0/0 (irq 0 dev fa) |
| ATA controller 4 at 20c0/20d4/0 (irq 0 dev fa) |
| Found 1 lpt ports |
| Found 0 serial ports |
| Searching bootorder for: /rom@img/memtest |
| Searching bootorder for: /rom@img/nvramcui |
| Searching bootorder for: /rom@img/coreinfo |
| Got ps2 nak (status=51) |
| Searching bootorder for: /pci@i0cf8/usb@1d,7/storage@1/*@0/*@0,0 |
| Searching bootorder for: /pci@i0cf8/usb@1d,7/usb-*@1 |
| USB MSC vendor='PNY' product='USB 3.0 FD' rev='1.00' type=0 removable=1 |
| USB MSC blksize=512 sectors=61069066 |
| XHCI no devices found |
| All threads complete. |
| Scan for option roms |
| |
| Press ESC for boot menu. |
| |
| Searching bootorder for: HALT |
| drive 0x000f0800: PCHS=0/0/0 translation=lba LCHS=1024/255/63 s=61069066 |
| Space available for UMB: c6800-ed000, f0000-f0800 |
| Returned 221184 bytes of ZoneHigh |
| e820 map has 10 items: |
| 0: 0000000000000000 - 000000000009fc00 = 1 RAM |
| 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED |
| 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED |
| 3: 0000000000100000 - 000000007bb18000 = 1 RAM |
| 4: 000000007bb18000 - 000000007bc00000 = 2 RESERVED |
| 5: 000000007bc00000 - 000000007bdf6000 = 1 RAM |
| 6: 000000007bdf6000 - 0000000080000000 = 2 RESERVED |
| 7: 00000000e0000000 - 00000000f0000000 = 2 RESERVED |
| 8: 00000000fed10000 - 0000000100000000 = 2 RESERVED |
| 9: 0000000100000000 - 0000000180000000 = 1 RAM |
| enter handle_19: |
| NULL |
| Booting from Hard Disk... |
| Booting from 0000:7c00 |
| |