blob: 7c25d5e09d02649c10bbbfd245808e72da576f7f [file] [log] [blame]
coreboot-4.6-1260-g7bb032588459 Mon Aug 28 20:05:00 UTC 2017 romstage starting...
APIC 00: CPU Family_Model = 00500f01
APIC 00: ** Enter AmdInitReset [00020007]
AmdInitReset() returned AGESA_SUCCESS
APIC 00: Heap in LocalCache (2) at 0x00400000
APIC 00: ** Exit AmdInitReset [00020007]
APIC 00: ** Enter AmdInitEarly [00020002]
AmdInitEarly() returned AGESA_SUCCESS
APIC 00: Heap in LocalCache (2) at 0x00400000
APIC 00: ** Exit AmdInitEarly [00020002]
APIC 00: ** Enter AmdInitPost [00020006]
AmdInitPost() returned AGESA_WARNING
EventLog: EventClass = 4, EventInfo = 4012200.
Param1 = 0, Param2 = 0.
Param3 = 0, Param4 = 0.
APIC 00: Heap in TempMem (3) at 0x000b0000
APIC 00: ** Exit AmdInitPost [00020006]
CBMEM:
IMD: root @ 66fff000 254 entries.
IMD: root @ 66ffec00 62 entries.
Move CAR stack.
CAR disabled.
CBFS: 'Master Header Locator' located CBFS at [100:3fffc0)
CBFS: Locating 'fallback/ramstage'
CBFS: Found @ offset 2cf40 size 17570
Decompressing stage fallback/ramstage @ 0x66ecbfc0 (1021648 bytes)
Loading module at 66ecc000 with entry 66ecc000. filesize: 0x31568 memsize: 0xf9690
Processing 2720 relocs. Offset value of 0x66dcc000
coreboot-4.6-1260-g7bb032588459 Mon Aug 28 20:05:00 UTC 2017 ramstage starting...
APIC 00: ** Enter AmdInitEnv [00020003]
Wiped HEAP at [10000000 - 1002ffff]
AmdInitEnv() returned AGESA_SUCCESS
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit AmdInitEnv [00020003]
BS: BS_PRE_DEVICE times (us): entry 21620 run 2 exit 0
SB800: sb800_init
SB800 - Smbus.c - alink_ab_indx - Start.
SB800 - Smbus.c - alink_ab_indx - End.
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 8791 exit 0
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 1
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 00:50: enabled 1
I2C: 00:51: enabled 1
PCI: 00:14.1: enabled 1
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PNP: 004e.0: enabled 0
PNP: 004e.3: enabled 0
PNP: 004e.4: enabled 0
PNP: 004e.5: enabled 1
PNP: 004e.6: enabled 0
PNP: 004e.a: enabled 0
PNP: 004e.10: enabled 1
PNP: 004e.11: enabled 1
PCI: 00:14.4: enabled 1
PCI: 00:14.5: enabled 0
PCI: 00:14.6: enabled 0
PCI: 00:15.0: enabled 0
PCI: 00:15.1: enabled 0
PCI: 00:15.2: enabled 0
PCI: 00:15.3: enabled 0
PCI: 00:16.0: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
PCI: 00:18.6: enabled 1
PCI: 00:18.7: enabled 1
Compare with tree...
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 1
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 00:50: enabled 1
I2C: 00:51: enabled 1
PCI: 00:14.1: enabled 1
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PNP: 004e.0: enabled 0
PNP: 004e.3: enabled 0
PNP: 004e.4: enabled 0
PNP: 004e.5: enabled 1
PNP: 004e.6: enabled 0
PNP: 004e.a: enabled 0
PNP: 004e.10: enabled 1
PNP: 004e.11: enabled 1
PCI: 00:14.4: enabled 1
PCI: 00:14.5: enabled 0
PCI: 00:14.6: enabled 0
PCI: 00:15.0: enabled 0
PCI: 00:15.1: enabled 0
PCI: 00:15.2: enabled 0
PCI: 00:15.3: enabled 0
PCI: 00:16.0: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
PCI: 00:18.6: enabled 1
PCI: 00:18.7: enabled 1
Mainboard Persimmon Enable.
Root Device scanning...
root_dev_scan_bus for Root Device
setup_bsp_ramtop, TOP MEM: msr.lo = 0x7f000000, msr.hi = 0x00000000
setup_bsp_ramtop, TOP MEM2: msr.lo = 0x00000000, msr.hi = 0x00000000
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
CPU_CLUSTER: 0 scanning...
AP siblings=1
CPU: APIC: 00 enabled
CPU: APIC: 01 enabled
scan_bus: scanning of bus CPU_CLUSTER: 0 took 7926 usecs
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [1022/1510] ops
PCI: 00:00.0 [1022/1510] enabled
PCI: 00:01.0 [1002/9802] enabled
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:04.0 subordinate bus PCI Express
PCI: 00:04.0 [1022/1512] enabled
PCI: Static device PCI: 00:06.0 not found, disabling it.
PCI: 00:11.0 [1002/4393] ops
PCI: 00:11.0 [1002/4393] enabled
PCI: 00:12.0 [1002/4397] ops
PCI: 00:12.0 [1002/4397] enabled
PCI: 00:12.2 [1002/4396] ops
PCI: 00:12.2 [1002/4396] enabled
PCI: 00:13.0 [1002/4397] ops
PCI: 00:13.0 [1002/4397] enabled
PCI: 00:13.2 [1002/4396] ops
PCI: 00:13.2 [1002/4396] enabled
IOAPIC: Clearing IOAPIC at fec00000
IOAPIC: 24 interrupts
IOAPIC: reg 0x00000000 value 0x00000000 0x00010000
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
IOAPIC: Dumping registers
reg 0x0000: 0x02000000
reg 0x0001: 0x00178021
reg 0x0002: 0x02000000
IOAPIC: 24 interrupts
IOAPIC: Enabling interrupts on FSB
IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
PCI: 00:14.0 [1002/4385] enabled
PCI: Static device PCI: 00:14.1 not found, disabling it.
PCI: 00:14.2 [1002/4383] ops
PCI: 00:14.2 [1002/4383] enabled
PCI: 00:14.3 [1002/439d] bus ops
PCI: 00:14.3 [1002/439d] enabled
PCI: 00:14.4 [1002/4384] enabled
PCI: 00:14.5 [1002/4399] ops
PCI: 00:14.5 [1002/4399] disabled
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:15.0 subordinate bus PCI Express
PCI: 00:15.0 [1002/43a0] disabled
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:15.1 subordinate bus PCI Express
PCI: 00:15.1 [1002/43a1] disabled
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:15.2 subordinate bus PCI Express
PCI: 00:15.2 [1002/43a2] disabled
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:15.3 subordinate bus PCI Express
PCI: 00:15.3 [1002/43a3] disabled
PCI: 00:16.0 [1002/4397] ops
PCI: 00:16.0 [1002/4397] disabled
SB800: sb_Before_Pci_Init
PCI: 00:18.0 [1022/1700] enabled
PCI: 00:18.1 [1022/1701] enabled
PCI: 00:18.2 [1022/1702] enabled
PCI: 00:18.3 [1022/1703] enabled
PCI: 00:18.4 [1022/1704] enabled
PCI: 00:18.5 [1022/1718] enabled
PCI: 00:18.6 [1022/1716] enabled
PCI: 00:18.7 [1022/1719] enabled
PCI: 00:04.0 scanning...
do_pci_scan_bridge for PCI: 00:04.0
PCI: pci_scan_bus for bus 01
PCI: 01:00.0 [10ec/8168] enabled
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x70
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
scan_bus: scanning of bus PCI: 00:04.0 took 24154 usecs
PCI: 00:14.3 scanning...
scan_lpc_bus for PCI: 00:14.3
PNP: 004e.0 disabled
PNP: 004e.3 disabled
PNP: 004e.4 disabled
PNP: 004e.5 enabled
PNP: 004e.6 disabled
PNP: 004e.a disabled
PNP: 004e.10 enabled
PNP: 004e.11 enabled
scan_lpc_bus for PCI: 00:14.3 done
scan_bus: scanning of bus PCI: 00:14.3 took 23470 usecs
PCI: 00:14.4 scanning...
do_pci_scan_bridge for PCI: 00:14.4
PCI: pci_scan_bus for bus 02
scan_bus: scanning of bus PCI: 00:14.4 took 8150 usecs
scan_bus: scanning of bus DOMAIN: 0000 took 537909 usecs
root_dev_scan_bus for Root Device done
scan_bus: scanning of bus Root Device took 580664 usecs
done
BS: BS_DEV_ENUMERATE times (us): entry 0 run 807314 exit 0
found VGA at PCI: 00:01.0
Setting up VGA for PCI: 00:01.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
Fam14h - domain_read_resources
DOMAIN: 0000 read_resources bus 0 link: 0
Fam14h - nb_read_resources
Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000.
PCI: 00:04.0 read_resources bus 1 link: 0
PCI: 00:04.0 read_resources bus 1 link: 0 done
PCI: 00:14.0 read_resources bus 0 link: 0
I2C: 00:50 missing read_resources
I2C: 00:51 missing read_resources
PCI: 00:14.0 read_resources bus 0 link: 0 done
SB800 - Lpc.c - lpc_read_resources - Start.
SB800 - Lpc.c - lpc_read_resources - End.
PCI: 00:14.3 read_resources bus 0 link: 0
PCI: 00:14.3 read_resources bus 0 link: 0 done
PCI: 00:14.4 read_resources bus 2 link: 0
PCI: 00:14.4 read_resources bus 2 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
APIC: 01
DOMAIN: 0000 child on link 0 PCI: 00:00.0
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
PCI: 00:00.0
PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
PCI: 00:01.0
PCI: 00:01.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10
PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 14
PCI: 00:01.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 18
PCI: 00:04.0 child on link 0 PCI: 01:00.0
PCI: 00:04.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 01:00.0
PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 1201 index 18
PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20
PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 index 30
PCI: 00:05.0
PCI: 00:06.0
PCI: 00:07.0
PCI: 00:08.0
PCI: 00:11.0
PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
PCI: 00:11.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 24
PCI: 00:12.0
PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:12.2
PCI: 00:12.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 00:13.0
PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:13.2
PCI: 00:13.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 00:14.0 child on link 0 I2C: 00:50
I2C: 00:50
I2C: 00:51
PCI: 00:14.1
PCI: 00:14.2
PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
PCI: 00:14.3 child on link 0 PNP: 004e.0
PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PNP: 004e.0
PNP: 004e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 004e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 004e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
PNP: 004e.3
PNP: 004e.3 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
PNP: 004e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 004e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 004e.4
PNP: 004e.4 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
PNP: 004e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 004e.5
PNP: 004e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
PNP: 004e.5 resource base 64 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
PNP: 004e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 004e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 72
PNP: 004e.6
PNP: 004e.6 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 004e.a
PNP: 004e.10
PNP: 004e.10 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 004e.10 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 004e.11
PNP: 004e.11 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 004e.11 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PCI: 00:14.4
PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 00:14.5
PCI: 00:14.6
PCI: 00:15.0
PCI: 00:15.1
PCI: 00:15.2
PCI: 00:15.3
PCI: 00:16.0
PCI: 00:16.2
PCI: 00:18.0
PCI: 00:18.1
PCI: 00:18.2
PCI: 00:18.3
PCI: 00:18.4
PCI: 00:18.5
PCI: 00:18.6
PCI: 00:18.7
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:04.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 01:00.0 10 * [0x0 - 0xff] io
PCI: 00:04.0 io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:04.0 1c * [0x0 - 0xfff] io
PCI: 00:01.0 14 * [0x1000 - 0x10ff] io
PCI: 00:11.0 20 * [0x1400 - 0x140f] io
PCI: 00:11.0 10 * [0x1410 - 0x1417] io
PCI: 00:11.0 18 * [0x1418 - 0x141f] io
PCI: 00:11.0 14 * [0x1420 - 0x1423] io
PCI: 00:11.0 1c * [0x1424 - 0x1427] io
DOMAIN: 0000 io: base: 1428 size: 1428 align: 12 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:04.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 01:00.0 20 * [0x0 - 0x3fff] prefmem
PCI: 01:00.0 18 * [0x4000 - 0x4fff] prefmem
PCI: 00:04.0 prefmem: base: 5000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:04.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 30 * [0x0 - 0x1ffff] mem
PCI: 00:04.0 mem: base: 20000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:01.0 10 * [0x0 - 0xfffffff] prefmem
PCI: 00:04.0 24 * [0x10000000 - 0x100fffff] prefmem
PCI: 00:04.0 20 * [0x10100000 - 0x101fffff] mem
PCI: 00:01.0 18 * [0x10200000 - 0x1023ffff] mem
PCI: 00:14.2 10 * [0x10240000 - 0x10243fff] mem
PCI: 00:12.0 10 * [0x10244000 - 0x10244fff] mem
PCI: 00:13.0 10 * [0x10245000 - 0x10245fff] mem
PCI: 00:11.0 24 * [0x10246000 - 0x102463ff] mem
PCI: 00:12.2 10 * [0x10247000 - 0x102470ff] mem
PCI: 00:13.2 10 * [0x10248000 - 0x102480ff] mem
DOMAIN: 0000 mem: base: 10248100 size: 10248100 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI: 00:00.0 c0010058 base f8000000 limit fbffffff mem (fixed)
constrain_resources: PCI: 00:14.3 10000000 base 00000000 limit 00000fff io (fixed)
skipping PNP: 004e.5@62 fixed resource, size=0!
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 base e0000000 limit f7ffffff
Setting resources...
DOMAIN: 0000 io: base:1000 size:1428 align:12 gran:0 limit:ffff
PCI: 00:04.0 1c * [0x1000 - 0x1fff] io
PCI: 00:01.0 14 * [0x2000 - 0x20ff] io
PCI: 00:11.0 20 * [0x2400 - 0x240f] io
PCI: 00:11.0 10 * [0x2410 - 0x2417] io
PCI: 00:11.0 18 * [0x2418 - 0x241f] io
PCI: 00:11.0 14 * [0x2420 - 0x2423] io
PCI: 00:11.0 1c * [0x2424 - 0x2427] io
DOMAIN: 0000 io: next_base: 2428 size: 1428 align: 12 gran: 0 done
PCI: 00:04.0 io: base:1000 size:1000 align:12 gran:12 limit:1fff
PCI: 01:00.0 10 * [0x1000 - 0x10ff] io
PCI: 00:04.0 io: next_base: 1100 size: 1000 align: 12 gran: 12 done
PCI: 00:14.4 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:14.4 io: next_base: ffff size: 0 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:e0000000 size:10248100 align:28 gran:0 limit:f7ffffff
PCI: 00:01.0 10 * [0xe0000000 - 0xefffffff] prefmem
PCI: 00:04.0 24 * [0xf0000000 - 0xf00fffff] prefmem
PCI: 00:04.0 20 * [0xf0100000 - 0xf01fffff] mem
PCI: 00:01.0 18 * [0xf0200000 - 0xf023ffff] mem
PCI: 00:14.2 10 * [0xf0240000 - 0xf0243fff] mem
PCI: 00:12.0 10 * [0xf0244000 - 0xf0244fff] mem
PCI: 00:13.0 10 * [0xf0245000 - 0xf0245fff] mem
PCI: 00:11.0 24 * [0xf0246000 - 0xf02463ff] mem
PCI: 00:12.2 10 * [0xf0247000 - 0xf02470ff] mem
PCI: 00:13.2 10 * [0xf0248000 - 0xf02480ff] mem
DOMAIN: 0000 mem: next_base: f0248100 size: 10248100 align: 28 gran: 0 done
PCI: 00:04.0 prefmem: base:f0000000 size:100000 align:20 gran:20 limit:f00fffff
PCI: 01:00.0 20 * [0xf0000000 - 0xf0003fff] prefmem
PCI: 01:00.0 18 * [0xf0004000 - 0xf0004fff] prefmem
PCI: 00:04.0 prefmem: next_base: f0005000 size: 100000 align: 20 gran: 20 done
PCI: 00:04.0 mem: base:f0100000 size:100000 align:20 gran:20 limit:f01fffff
PCI: 01:00.0 30 * [0xf0100000 - 0xf011ffff] mem
PCI: 00:04.0 mem: next_base: f0120000 size: 100000 align: 20 gran: 20 done
PCI: 00:14.4 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:14.4 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:14.4 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:14.4 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
Fam14h - domain_set_resources
amsr - incoming dev = 66efa480
adsr: (before) basek = 0, limitk = 7effffff.
adsr: (after) basek = 0, limitk = 1fbfff, sizek = 1fc000.
adsr - 0xa0000 to 0xbffff resource.
adsr: mmio_basek=00380000, basek=00000300, limitk=001fbfff
0: mmio_basek=00380000, basek=00000300, limitk=001fbfff
adsr - mmio_basek = 380000.
add_uma_resource_below_tolm: uma size 0x18000000, memory start 0x67000000
DOMAIN: 0000 assign_resources, bus 0 link: 0
Fam14h - nb_set_resources
Fam14h - create_vga_resource
Fam14h - set_resource
PCI: 00:01.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem
PCI: 00:01.0 14 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
PCI: 00:01.0 18 <- [0x00f0200000 - 0x00f023ffff] size 0x00040000 gran 0x12 mem
PCI: 00:04.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io
PCI: 00:04.0 24 <- [0x00f0000000 - 0x00f00fffff] size 0x00100000 gran 0x14 bus 01 prefmem
PCI: 00:04.0 20 <- [0x00f0100000 - 0x00f01fffff] size 0x00100000 gran 0x14 bus 01 mem
PCI: 00:04.0 assign_resources, bus 1 link: 0
PCI: 01:00.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
PCI: 01:00.0 18 <- [0x00f0004000 - 0x00f0004fff] size 0x00001000 gran 0x0c prefmem64
PCI: 01:00.0 20 <- [0x00f0000000 - 0x00f0003fff] size 0x00004000 gran 0x0e prefmem64
PCI: 01:00.0 30 <- [0x00f0100000 - 0x00f011ffff] size 0x00020000 gran 0x11 romem
PCI: 00:04.0 assign_resources, bus 1 link: 0
PCI: 00:11.0 10 <- [0x0000002410 - 0x0000002417] size 0x00000008 gran 0x03 io
PCI: 00:11.0 14 <- [0x0000002420 - 0x0000002423] size 0x00000004 gran 0x02 io
PCI: 00:11.0 18 <- [0x0000002418 - 0x000000241f] size 0x00000008 gran 0x03 io
PCI: 00:11.0 1c <- [0x0000002424 - 0x0000002427] size 0x00000004 gran 0x02 io
PCI: 00:11.0 20 <- [0x0000002400 - 0x000000240f] size 0x00000010 gran 0x04 io
PCI: 00:11.0 24 <- [0x00f0246000 - 0x00f02463ff] size 0x00000400 gran 0x0a mem
PCI: 00:12.0 10 <- [0x00f0244000 - 0x00f0244fff] size 0x00001000 gran 0x0c mem
PCI: 00:12.2 10 <- [0x00f0247000 - 0x00f02470ff] size 0x00000100 gran 0x08 mem
PCI: 00:13.0 10 <- [0x00f0245000 - 0x00f0245fff] size 0x00001000 gran 0x0c mem
PCI: 00:13.2 10 <- [0x00f0248000 - 0x00f02480ff] size 0x00000100 gran 0x08 mem
PCI: 00:14.2 10 <- [0x00f0240000 - 0x00f0243fff] size 0x00004000 gran 0x0e mem64
SB800 - Lpc.c - lpc_set_resources - Start.
PCI: 00:14.3 assign_resources, bus 0 link: 0
PNP: 004e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
PNP: 004e.5 62 <- [0x0000000064 - 0x0000000063] size 0x00000000 gran 0x00 io
PNP: 004e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
ERROR: PNP: 004e.5 72 irq size: 0x0000000001 not assigned
PNP: 004e.10 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 004e.10 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 004e.11 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
PNP: 004e.11 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
PCI: 00:14.3 assign_resources, bus 0 link: 0
SB800 - Lpc.c - lpc_set_resources - End.
PCI: 00:14.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:14.4 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:14.4 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 mem
DOMAIN: 0000 assign_resources, bus 0 link: 0
adsr - leaving this lovely routine.
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
APIC: 01
DOMAIN: 0000 child on link 0 PCI: 00:00.0
DOMAIN: 0000 resource base 1000 size 1428 align 12 gran 0 limit ffff flags 40040100 index 10000000
DOMAIN: 0000 resource base e0000000 size 10248100 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100
DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10
DOMAIN: 0000 resource base c0000 size 7ef3fc00 align 0 gran 0 limit 0 flags e0004200 index 20
DOMAIN: 0000 resource base 67000000 size 18000000 align 0 gran 0 limit 0 flags f0000200 index 7
PCI: 00:00.0
PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
PCI: 00:01.0
PCI: 00:01.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001200 index 10
PCI: 00:01.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 14
PCI: 00:01.0 resource base f0200000 size 40000 align 18 gran 18 limit f023ffff flags 60000200 index 18
PCI: 00:04.0 child on link 0 PCI: 01:00.0
PCI: 00:04.0 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c
PCI: 00:04.0 resource base f0000000 size 100000 align 20 gran 20 limit f00fffff flags 60081202 index 24
PCI: 00:04.0 resource base f0100000 size 100000 align 20 gran 20 limit f01fffff flags 60080202 index 20
PCI: 01:00.0
PCI: 01:00.0 resource base 1000 size 100 align 8 gran 8 limit 10ff flags 60000100 index 10
PCI: 01:00.0 resource base f0004000 size 1000 align 12 gran 12 limit f0004fff flags 60001201 index 18
PCI: 01:00.0 resource base f0000000 size 4000 align 14 gran 14 limit f0003fff flags 60001201 index 20
PCI: 01:00.0 resource base f0100000 size 20000 align 17 gran 17 limit f011ffff flags 60002200 index 30
PCI: 00:05.0
PCI: 00:06.0
PCI: 00:07.0
PCI: 00:08.0
PCI: 00:11.0
PCI: 00:11.0 resource base 2410 size 8 align 3 gran 3 limit 2417 flags 60000100 index 10
PCI: 00:11.0 resource base 2420 size 4 align 2 gran 2 limit 2423 flags 60000100 index 14
PCI: 00:11.0 resource base 2418 size 8 align 3 gran 3 limit 241f flags 60000100 index 18
PCI: 00:11.0 resource base 2424 size 4 align 2 gran 2 limit 2427 flags 60000100 index 1c
PCI: 00:11.0 resource base 2400 size 10 align 4 gran 4 limit 240f flags 60000100 index 20
PCI: 00:11.0 resource base f0246000 size 400 align 12 gran 10 limit f02463ff flags 60000200 index 24
PCI: 00:12.0
PCI: 00:12.0 resource base f0244000 size 1000 align 12 gran 12 limit f0244fff flags 60000200 index 10
PCI: 00:12.2
PCI: 00:12.2 resource base f0247000 size 100 align 12 gran 8 limit f02470ff flags 60000200 index 10
PCI: 00:13.0
PCI: 00:13.0 resource base f0245000 size 1000 align 12 gran 12 limit f0245fff flags 60000200 index 10
PCI: 00:13.2
PCI: 00:13.2 resource base f0248000 size 100 align 12 gran 8 limit f02480ff flags 60000200 index 10
PCI: 00:14.0 child on link 0 I2C: 00:50
I2C: 00:50
I2C: 00:51
PCI: 00:14.1
PCI: 00:14.2
PCI: 00:14.2 resource base f0240000 size 4000 align 14 gran 14 limit f0243fff flags 60000201 index 10
PCI: 00:14.3 child on link 0 PNP: 004e.0
PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PNP: 004e.0
PNP: 004e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 004e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 004e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
PNP: 004e.3
PNP: 004e.3 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
PNP: 004e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 004e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 004e.4
PNP: 004e.4 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
PNP: 004e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 004e.5
PNP: 004e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60
PNP: 004e.5 resource base 64 size 0 align 0 gran 0 limit 0 flags e0000100 index 62
PNP: 004e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 004e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 72
PNP: 004e.6
PNP: 004e.6 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 004e.a
PNP: 004e.10
PNP: 004e.10 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 004e.10 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 004e.11
PNP: 004e.11 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 004e.11 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PCI: 00:14.4
PCI: 00:14.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20
PCI: 00:14.5
PCI: 00:14.6
PCI: 00:15.0
PCI: 00:15.1
PCI: 00:15.2
PCI: 00:15.3
PCI: 00:16.0
PCI: 00:16.2
PCI: 00:18.0
PCI: 00:18.1
PCI: 00:18.2
PCI: 00:18.3
PCI: 00:18.4
PCI: 00:18.5
PCI: 00:18.6
PCI: 00:18.7
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 1832524 exit 0
APIC 00: ** Enter AmdInitMid [00020005]
SB800: sb_After_Pci_Init
SB800: sb_Mid_Post_Init
AmdInitMid() returned AGESA_SUCCESS
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit AmdInitMid [00020005]
PCI_INTR tables: Writing registers C00/C01 for PIC mode PCI IRQ routing:
PCI_INTR_INDEX PCI_INTR_DATA
0x00 INTA# : 0x0A
0x01 INTB# : 0x0B
0x02 INTC# : 0x0A
0x03 INTD# : 0x0B
0x04 INTE# : 0x0A
0x05 INTF# : 0x0B
0x06 INTG# : 0x0A
0x07 INTH# : 0x0B
0x08 Misc : 0x00
0x09 Misc0 : 0xF0
0x0A Misc1 : 0x00
0x0B Misc2 : 0x00
0x0C Ser IRQ INTA : 0x1F
0x0D Ser IRQ INTB : 0x1F
0x0E Ser IRQ INTC : 0x1F
0x0F Ser IRQ INTD : 0x1F
0x10 SCI : 0x1F
0x11 SMBUS0 : 0x1F
0x12 ASF : 0x1F
0x13 HDA : 0x0A
0x14 FC : 0x1F
0x15 GEC : 0x1F
0x16 PerMon : 0x1F
0x20 IMC INT0 : 0x1F
0x21 IMC INT1 : 0x1F
0x22 IMC INT2 : 0x1F
0x23 IMC INT3 : 0x1F
0x24 IMC INT4 : 0x1F
0x25 IMC INT5 : 0x1F
0x30 Dev18.0 INTA : 0x0A
0x31 Dev18.2 INTB : 0x0B
0x32 Dev19.0 INTA : 0x0A
0x33 Dev19.2 INTB : 0x0B
0x34 Dev22.0 INTA : 0x0A
0x35 Dev22.2 INTB : 0x0B
0x36 Dev20.5 INTC : 0x0A
0x40 IDE : 0x0B
0x41 SATA : 0x0B
0x50 GPPInt0 : 0x0A
0x51 GPPInt1 : 0x0B
0x52 GPPInt2 : 0x0A
0x53 GPPInt3 : 0x0B
PCI_INTR tables: Writing registers C00/C01 for APIC mode PCI IRQ routing:
PCI_INTR_INDEX PCI_INTR_DATA
0x00 INTA# : 0x10
0x01 INTB# : 0x11
0x02 INTC# : 0x12
0x03 INTD# : 0x13
0x04 INTE# : 0x14
0x05 INTF# : 0x15
0x06 INTG# : 0x16
0x07 INTH# : 0x17
0x08 Misc : 0x00
0x09 Misc0 : 0x00
0x0A Misc1 : 0x00
0x0B Misc2 : 0x00
0x0C Ser IRQ INTA : 0x1F
0x0D Ser IRQ INTB : 0x1F
0x0E Ser IRQ INTC : 0x1F
0x0F Ser IRQ INTD : 0x1F
0x10 SCI : 0x09
0x11 SMBUS0 : 0x1F
0x12 ASF : 0x1F
0x13 HDA : 0x10
0x14 FC : 0x1F
0x15 GEC : 0x12
0x16 PerMon : 0x1F
0x20 IMC INT0 : 0x1F
0x21 IMC INT1 : 0x1F
0x22 IMC INT2 : 0x1F
0x23 IMC INT3 : 0x1F
0x24 IMC INT4 : 0x1F
0x25 IMC INT5 : 0x1F
0x30 Dev18.0 INTA : 0x12
0x31 Dev18.2 INTB : 0x11
0x32 Dev19.0 INTA : 0x12
0x33 Dev19.2 INTB : 0x11
0x34 Dev22.0 INTA : 0x12
0x35 Dev22.2 INTB : 0x11
0x36 Dev20.5 INTC : 0x12
0x40 IDE : 0x11
0x41 SATA : 0x13
0x50 GPPInt0 : 0x10
0x51 GPPInt1 : 0x11
0x52 GPPInt2 : 0x12
0x53 GPPInt3 : 0x13
PCI_CFG IRQ: Write PCI config space IRQ assignments
PCI IRQ: Found device 0:01.00 using PIN A
Found this device in pirq_data table entry 0
Orig INT_PIN : 1 (PIN A)
PCI_INTR idx : 0x00 (INTA# )
INT_LINE : 0xA (IRQ 10)
PCI IRQ: Found device 0:04.00 using PIN A
Found this device in pirq_data table entry 1
Orig INT_PIN : 1 (PIN A)
PCI_INTR idx : 0x00 (INTA# )
INT_LINE : 0xA (IRQ 10)
PCI IRQ: Found device 0:11.00 using PIN A
Found this device in pirq_data table entry 3
Orig INT_PIN : 1 (PIN A)
PCI_INTR idx : 0x41 (SATA )
INT_LINE : 0xB (IRQ 11)
PCI IRQ: Found device 0:12.00 using PIN A
Found this device in pirq_data table entry 4
Orig INT_PIN : 1 (PIN A)
PCI_INTR idx : 0x30 (Dev18.0 INTA)
INT_LINE : 0xA (IRQ 10)
PCI IRQ: Found device 0:12.02 using PIN B
Found this device in pirq_data table entry 5
Orig INT_PIN : 2 (PIN B)
PCI_INTR idx : 0x31 (Dev18.2 INTB)
INT_LINE : 0xB (IRQ 11)
PCI IRQ: Found device 0:13.00 using PIN A
Found this device in pirq_data table entry 6
Orig INT_PIN : 1 (PIN A)
PCI_INTR idx : 0x32 (Dev19.0 INTA)
INT_LINE : 0xA (IRQ 10)
PCI IRQ: Found device 0:13.02 using PIN B
Found this device in pirq_data table entry 7
Orig INT_PIN : 2 (PIN B)
PCI_INTR idx : 0x33 (Dev19.2 INTB)
INT_LINE : 0xB (IRQ 11)
PCI IRQ: Found device 0:14.02 using PIN A
Found this device in pirq_data table entry 10
Orig INT_PIN : 1 (PIN A)
PCI_INTR idx : 0x13 (HDA )
INT_LINE : 0xA (IRQ 10)
PCI IRQ: Found device 1:00.00 using PIN A
With INT_PIN swizzled to PIN A
Attached to bridge device 0:04h.00h
Found this device in pirq_data table entry 1
Orig INT_PIN : 1 (PIN A)
PCI_INTR idx : 0x00 (INTA# )
INT_LINE : 0xA (IRQ 10)
PCI_CFG IRQ: Finished writing PCI config space IRQ assignments
Enabling resources...
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 subsystem <- 1022/1510
PCI: 00:01.0 cmd <- 07
PCI: 00:04.0 bridge ctrl <- 0003
PCI: 00:04.0 cmd <- 07
PCI: 00:11.0 subsystem <- 1022/1510
PCI: 00:11.0 cmd <- 03
PCI: 00:12.0 subsystem <- 1022/1510
PCI: 00:12.0 cmd <- 02
PCI: 00:12.2 subsystem <- 1022/1510
PCI: 00:12.2 cmd <- 02
PCI: 00:13.0 subsystem <- 1022/1510
PCI: 00:13.0 cmd <- 02
PCI: 00:13.2 subsystem <- 1022/1510
PCI: 00:13.2 cmd <- 02
PCI: 00:14.0 subsystem <- 1022/1510
PCI: 00:14.0 cmd <- 403
PCI: 00:14.2 subsystem <- 1022/1510
PCI: 00:14.2 cmd <- 02
PCI: 00:14.3 subsystem <- 1022/1510
PCI: 00:14.3 cmd <- 0f
PCI: 00:14.4 bridge ctrl <- 0003
PCI: 00:14.4 cmd <- 21
PCI: 00:18.0 subsystem <- 1022/1510
PCI: 00:18.0 cmd <- 00
PCI: 00:18.1 subsystem <- 1022/1510
PCI: 00:18.1 cmd <- 00
PCI: 00:18.2 subsystem <- 1022/1510
PCI: 00:18.2 cmd <- 00
PCI: 00:18.3 subsystem <- 1022/1510
PCI: 00:18.3 cmd <- 00
PCI: 00:18.4 subsystem <- 1022/1510
PCI: 00:18.4 cmd <- 00
PCI: 00:18.5 subsystem <- 1022/1510
PCI: 00:18.5 cmd <- 00
PCI: 00:18.6 subsystem <- 1022/1510
PCI: 00:18.6 cmd <- 00
PCI: 00:18.7 subsystem <- 1022/1510
PCI: 00:18.7 cmd <- 00
PCI: 01:00.0 cmd <- 03
done.
BS: BS_DEV_ENABLE times (us): entry 372225 run 107215 exit 0
Initializing devices...
Root Device init ...
Root Device init finished in 1915 usecs
CPU_CLUSTER: 0 init ...
start_eip=0x00001000, code_size=0x00000031
Initializing CPU #0
CPU: vendor AMD device 500f01
CPU: family 14, model 00, stepping 01
Model 14 Init.
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Enabling cache
Setting up local APIC... apic_id: 0x00 done.
siblings = 01, CPU #0 initialized
CPU1: stack_base 66efe000, stack_end 66efeff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
Waiting for 1 CPUS to stop
CPU: vendor AMD device 500f01
CPU: family 14, model 00, stepping 01
Model 14 Init.
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Enabling cache
Setting up local APIC... apic_id: 0x01 done.
siblings = 01, CPU #1 initialized
All AP CPUs stopped (2160 loops)
CPU0: stack: 66eff000 - 66f00000, lowest used address 66eff6cc, stack used: 2356 bytes
CPU1: stack: 66efe000 - 66eff000, lowest used address 66efedcc, stack used: 564 bytes
CPU_CLUSTER: 0 init finished in 118081 usecs
DOMAIN: 0000 init ...
DOMAIN: 0000 init finished in 2001 usecs
PCI: 00:00.0 init ...
Northbridge init
PCI: 00:00.0 init finished in 3570 usecs
PCI: 00:01.0 init ...
CBFS: 'Master Header Locator' located CBFS at [100:3fffc0)
CBFS: Locating 'pci1002,9802.rom'
CBFS: Found @ offset 44e80 size e400
In CBFS, ROM address for PCI: 00:01.0 = ffc44fc8
PCI expansion ROM, signature 0xaa55, INIT size 0xe400, data ptr 0x01b0
PCI ROM image, vendor ID 1002, device ID 9802,
PCI ROM image, Class Code 030000, Code Type 00
Copying VGA ROM Image from ffc44fc8 to 0xc0000, 0xe400 bytes
Real mode stub @00000600: 867 bytes
Calling Option ROM...
Unsupported software interrupt #0x15 eax 0x4e08
... Option ROM returned.
VGA Option ROM was run
PCI: 00:01.0 init finished in 111664 usecs
PCI: 00:11.0 init ...
AHCI controller IOMEM base: f0246000, IRQ: 0xB
Number of Ports: 0x6, Port implemented(bit map): 0x3f
AHCI/RAID controller initialized
PCI: 00:11.0 init finished in 13909 usecs
PCI: 00:14.0 init ...
PCI: 00:14.0 init finished in 1998 usecs
PCI: 00:14.3 init ...
SB800 - Late.c - lpc_init - Start.
RTC Init
SB800 - Late.c - lpc_init - End.
PCI: 00:14.3 init finished in 8986 usecs
PCI: 00:18.0 init ...
PCI: 00:18.0 init finished in 1999 usecs
PCI: 00:18.1 init ...
PCI: 00:18.1 init finished in 2001 usecs
PCI: 00:18.2 init ...
PCI: 00:18.2 init finished in 1999 usecs
PCI: 00:18.3 init ...
PCI: 00:18.3 init finished in 1999 usecs
PCI: 00:18.4 init ...
PCI: 00:18.4 init finished in 1999 usecs
PCI: 00:18.5 init ...
PCI: 00:18.5 init finished in 2001 usecs
PCI: 00:18.6 init ...
PCI: 00:18.6 init finished in 2001 usecs
PCI: 00:18.7 init ...
PCI: 00:18.7 init finished in 1999 usecs
PCI: 01:00.0 init ...
PCI: 01:00.0 init finished in 1999 usecs
PNP: 004e.5 init ...
PNP: 004e.5 init finished in 1915 usecs
PNP: 004e.10 init ...
PNP: 004e.10 init finished in 2001 usecs
PNP: 004e.11 init ...
PNP: 004e.11 init finished in 2001 usecs
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 00:50: enabled 1
I2C: 00:51: enabled 1
PCI: 00:14.1: enabled 0
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PNP: 004e.0: enabled 0
PNP: 004e.3: enabled 0
PNP: 004e.4: enabled 0
PNP: 004e.5: enabled 1
PNP: 004e.6: enabled 0
PNP: 004e.a: enabled 0
PNP: 004e.10: enabled 1
PNP: 004e.11: enabled 1
PCI: 00:14.4: enabled 1
PCI: 00:14.5: enabled 0
PCI: 00:14.6: enabled 0
PCI: 00:15.0: enabled 0
PCI: 00:15.1: enabled 0
PCI: 00:15.2: enabled 0
PCI: 00:15.3: enabled 0
PCI: 00:16.0: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
PCI: 00:18.6: enabled 1
PCI: 00:18.7: enabled 1
APIC: 01: enabled 1
PCI: 01:00.0: enabled 1
BS: BS_DEV_INIT times (us): entry 0 run 472088 exit 0
Finalize devices...
Devices finalized
APIC 00: ** Enter AmdInitLate [00020004]
SB800: sb_Late_Post
AmdInitLate() returned AGESA_SUCCESS
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit AmdInitLate [00020004]
BS: BS_POST_DEVICE times (us): entry 0 run 3483 exit 16826
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 1 exit 0
Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done.
Writing IRQ routing tables to 0x66dc8000...write_pirq_routing_table done.
PIRQ table: 48 bytes.
Wrote the mp table end at: 000f0410 - 000f05c4
Wrote the mp table end at: 66dc7010 - 66dc71c4
MP table: 452 bytes.
CBFS: 'Master Header Locator' located CBFS at [100:3fffc0)
CBFS: Locating 'fallback/dsdt.aml'
CBFS: Found @ offset 53300 size 277c
CBFS: 'Master Header Locator' located CBFS at [100:3fffc0)
CBFS: Locating 'fallback/slic'
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at 66da3000.
ACPI: * FACS
ACPI: * DSDT
ACPI: * FADT
ACPI_BLK_BASE: 0x0800
ACPI: added table 1/32, length now 40
ACPI: * SSDT
ACPI: added table 2/32, length now 44
ACPI: * MCFG
ACPI: * TCPA
TCPA log created at 66d93000
ACPI: added table 3/32, length now 48
ACPI: * MADT
ACPI: added table 4/32, length now 52
current = 66da5c30
ACPI: added table 5/32, length now 56
ACPI: * SRAT at 66da5dc8
AGESA SRAT table NULL. Skipping.
ACPI: * SLIT at 66da5dc8
AGESA SLIT table NULL. Skipping.
ACPI: * AGESA ALIB SSDT at 66da5dd0
ACPI: added table 6/32, length now 60
ACPI: * AGESA SSDT Pstate at 66da7460
ACPI: added table 7/32, length now 64
CBFS: 'Master Header Locator' located CBFS at [100:3fffc0)
CBFS: Locating 'pci1002,9802.rom'
CBFS: Found @ offset 44e80 size e400
In CBFS, ROM address for PCI: 00:01.0 = ffc44fc8
PCI expansion ROM, signature 0xaa55, INIT size 0xe400, data ptr 0x01b0
PCI ROM image, vendor ID 1002, device ID 9802,
PCI ROM image, Class Code 030000, Code Type 00
ACPI: * VFCT at 66da7910
Copying initialized VBIOS image from 000c0000
ACPI: added table 8/32, length now 68
ACPI: * HPET
ACPI: added table 9/32, length now 72
ACPI: done.
ACPI tables: 77248 bytes.
smbios_write_tables: 66d92000
Root Device (AMD Persimmon)
CPU_CLUSTER: 0 (AMD Family 14h Root Complex)
APIC: 00 (AMD CPU Family 14h Model 00h-0Fh)
DOMAIN: 0000 (AMD Family 14h Root Complex)
PCI: 00:00.0 (AMD Family 14h Northbridge)
PCI: 00:01.0 (AMD Family 14h Northbridge)
PCI: 00:04.0 (AMD Family 14h Northbridge)
PCI: 00:05.0 (AMD Family 14h Northbridge)
PCI: 00:06.0 (AMD Family 14h Northbridge)
PCI: 00:07.0 (AMD Family 14h Northbridge)
PCI: 00:08.0 (AMD Family 14h Northbridge)
PCI: 00:11.0 (ATI SB800)
PCI: 00:12.0 (ATI SB800)
PCI: 00:12.2 (ATI SB800)
PCI: 00:13.0 (ATI SB800)
PCI: 00:13.2 (ATI SB800)
PCI: 00:14.0 (ATI SB800)
I2C: 00:50 (unknown)
I2C: 00:51 (unknown)
PCI: 00:14.1 (ATI SB800)
PCI: 00:14.2 (ATI SB800)
PCI: 00:14.3 (ATI SB800)
PNP: 004e.0 (Fintek F81865F Super I/O)
PNP: 004e.3 (Fintek F81865F Super I/O)
PNP: 004e.4 (Fintek F81865F Super I/O)
PNP: 004e.5 (Fintek F81865F Super I/O)
PNP: 004e.6 (Fintek F81865F Super I/O)
PNP: 004e.a (Fintek F81865F Super I/O)
PNP: 004e.10 (Fintek F81865F Super I/O)
PNP: 004e.11 (Fintek F81865F Super I/O)
PCI: 00:14.4 (ATI SB800)
PCI: 00:14.5 (ATI SB800)
PCI: 00:14.6 (ATI SB800)
PCI: 00:15.0 (ATI SB800)
PCI: 00:15.1 (ATI SB800)
PCI: 00:15.2 (ATI SB800)
PCI: 00:15.3 (ATI SB800)
PCI: 00:16.0 (ATI SB800)
PCI: 00:16.2 (ATI SB800)
PCI: 00:18.0 (AMD Family 14h Northbridge)
PCI: 00:18.1 (AMD Family 14h Northbridge)
PCI: 00:18.2 (AMD Family 14h Northbridge)
PCI: 00:18.3 (AMD Family 14h Northbridge)
PCI: 00:18.4 (AMD Family 14h Northbridge)
PCI: 00:18.5 (AMD Family 14h Northbridge)
PCI: 00:18.6 (AMD Family 14h Northbridge)
PCI: 00:18.7 (AMD Family 14h Northbridge)
APIC: 01 (unknown)
PCI: 01:00.0 (unknown)
SMBIOS tables: 318 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum 902
Writing coreboot table at 0x66dc9000
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1. 0000000000001000-000000000009ffff: RAM
2. 00000000000c0000-0000000066d91fff: RAM
3. 0000000066d92000-0000000066ffffff: CONFIGURATION TABLES
4. 0000000067000000-000000007effffff: RESERVED
5. 00000000f8000000-00000000fbffffff: RESERVED
CBFS: 'Master Header Locator' located CBFS at [100:3fffc0)
FMAP: Found "FLASH" version 1.1 at 0.
FMAP: base = ffc00000 size = 400000 #areas = 3
Wrote coreboot table at: 66dc9000, 0x2b8 bytes, checksum 3c3e
coreboot table: 720 bytes.
IMD ROOT 0. 66fff000 00001000
IMD SMALL 1. 66ffe000 00001000
CONSOLE 2. 66fde000 00020000
ROMSTG STCK 3. 66fc6000 00018000
RAMSTAGE 4. 66ecb000 000fb000
57a9e100 5. 66dd1000 000f9690
COREBOOT 6. 66dc9000 00008000
IRQ TABLE 7. 66dc8000 00001000
SMP TABLE 8. 66dc7000 00001000
ACPI 9. 66da3000 00024000
TCPA LOG 10. 66d93000 00010000
SMBIOS 11. 66d92000 00000800
IMD small region:
IMD ROOT 0. 66ffec00 00000400
CAR GLOBALS 1. 66ffeac0 00000140
ROMSTAGE 2. 66ffeaa0 00000004
57a9e000 3. 66ffea80 00000010
BS: BS_WRITE_TABLES times (us): entry 0 run 424105 exit 0
CBFS: 'Master Header Locator' located CBFS at [100:3fffc0)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 55b00 size f776
Loading segment from ROM address 0xffc55c38
code (compression=1)
New segment dstaddr 0xe2aa0 memsize 0x1d560 srcaddr 0xffc55c70 filesize 0xf73e
Loading segment from ROM address 0xffc55c54
Entry Point 0x000ff06e
Loading Segment: addr: 0x00000000000e2aa0 memsz: 0x000000000001d560 filesz: 0x000000000000f73e
lb: [0x0000000066ecc000, 0x0000000066fc5690)
Post relocation: addr: 0x00000000000e2aa0 memsz: 0x000000000001d560 filesz: 0x000000000000f73e
using LZMA
[ 0x000e2aa0, 00100000, 0x00100000) <- ffc55c70
dest 000e2aa0, end 00100000, bouncebuffer ffffffff
Loaded segments
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 93322 exit 0
Jumping to boot code at 000ff06e(66dc9000)
CPU0: stack: 66eff000 - 66f00000, lowest used address 66eff6cc, stack used: 2356 bytes
SeaBIOS (version rel-1.10.2-0-g5f4c7b13cdf9)
BUILD: gcc: (Debian 7.2.0-1) 7.2.0 binutils: (GNU Binutils for Debian) 2.29
SeaBIOS (version rel-1.10.2-0-g5f4c7b13cdf9)
BUILD: gcc: (Debian 7.2.0-1) 7.2.0 binutils: (GNU Binutils for Debian) 2.29
Found coreboot cbmem console @ 66fde000
Found mainboard AMD Persimmon
Relocating init from 0x000e4020 to 0x66d46100 (size 48736)
Found CBFS header at 0xffc00138
multiboot: eax=66efac40, ebx=66efabf4
Found 21 PCI devices (max PCI bus is 02)
Copying SMBIOS entry point from 0x66d92000 to 0x000f7340
Copying ACPI RSDP from 0x66da3000 to 0x000f7310
Copying MPTABLE from 0x66dc7000/66dc7010 to 0x000f7140
Copying PIR from 0x66dc8000 to 0x000f7110
Using pmtimer, ioport 0x808
Scan for VGA option rom
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version rel-1.10.2-0-g5f4c7b13cdf9)
EHCI init on dev 00:12.2 (regs=0xf0247020)
EHCI init on dev 00:13.2 (regs=0xf0248020)
OHCI init on dev 00:12.0 (regs=0xf0244000)
OHCI init on dev 00:13.0 (regs=0xf0245000)
AHCI controller at 00:11.0, iobase 0xf0246000, irq 11
Found 0 lpt ports
Found 4 serial ports
Searching bootorder for: /rom@img/memtest
Got ps2 nak (status=51)
USB keyboard initialized
Searching bootorder for: /pci@i0cf8/usb@12,2/storage@3/*@0/*@0,0
Searching bootorder for: /pci@i0cf8/usb@12,2/usb-*@3
USB MSC vendor='ASMT' product='2105' rev='0' type=0 removable=0
USB MSC blksize=512 sectors=15457680
All threads complete.
Scan for option roms
Running option rom at ce80:0003
pmm call arg1=1
pmm call arg1=0
pmm call arg1=1
pmm call arg1=0
Searching bootorder for: /pci@i0cf8/pci-bridge@4/*@0
Press ESC for boot menu.
Searching bootorder for: HALT
drive 0x000f70c0: PCHS=0/0/0 translation=lba LCHS=962/255/63 s=15457680
Space available for UMB: cf800-ee800, f6b60-f70c0
Returned 253952 bytes of ZoneHigh
e820 map has 6 items:
0: 0000000000000000 - 000000000009fc00 = 1 RAM
1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
3: 0000000000100000 - 0000000066d90000 = 1 RAM
4: 0000000066d90000 - 000000007f000000 = 2 RESERVED
5: 00000000f8000000 - 00000000fc000000 = 2 RESERVED
enter handle_19:
NULL
Booting from Hard Disk...
Booting from 0000:7c00