blob: 831cb09212c3072242c3fd8f12b606f6b259a7ba [file] [log] [blame]
coreboot-4.9-1870-gd44d4f0f4e Mon Jun 3 10:14:06 UTC 2019 romstage starting (log level: 7)...
APIC 00: CPU Family_Model = 00500f20
APIC 00: ** Enter AmdInitReset [00020007]
AmdInitReset() returned AGESA_SUCCESS
APIC 00: Heap in LocalCache (2) at 0x00400000
APIC 00: ** Exit AmdInitReset [00020007]
APIC 00: ** Enter AmdInitEarly [00020002]
AmdInitEarly() returned AGESA_SUCCESS
APIC 00: Heap in LocalCache (2) at 0x00400000
APIC 00: ** Exit AmdInitEarly [00020002]
APIC 00: ** Enter AmdInitPost [00020006]
CBFS: 'Master Header Locator' located CBFS at [200:200000)
CBFS: Locating 'spd.bin'
CBFS: Found @ offset 499c0 size 100
AmdInitPost() returned AGESA_WARNING
EventLog: EventClass = 4, EventInfo = 4012200.
Param1 = 0, Param2 = 0.
Param3 = 0, Param4 = 0.
APIC 00: Heap in TempMem (3) at 0x000b0000
APIC 00: ** Exit AmdInitPost [00020006]
CBMEM:
IMD: root @ 7efff000 254 entries.
IMD: root @ 7effec00 62 entries.
MTRR Range: Start=0 End=80000000 (Size 80000000)
MTRR Range: Start=ffe00000 End=0 (Size 200000)
CBFS: 'Master Header Locator' located CBFS at [200:200000)
CBFS: Locating 'fallback/postcar'
CBFS: Found @ offset 49d80 size 3100
Decompressing stage fallback/postcar @ 0x7efbefc0 (28368 bytes)
Loading module at 7efbf000 with entry 7efbf000. filesize: 0x3008 memsize: 0x6e90
Processing 39 relocs. Offset value of 0x7cfbf000
coreboot-4.9-1870-gd44d4f0f4e Mon Jun 3 10:14:06 UTC 2019 ramstage starting (log level: 7)...
Normal boot.
APIC 00: ** Enter AmdInitEnv [00020003]
Wiped HEAP at [10000000 - 1002ffff]
AmdInitEnv() returned AGESA_SUCCESS
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit AmdInitEnv [00020003]
BS: BS_PRE_DEVICE times (us): entry 23550 run 2 exit 0
SB800: sb800_init
SB800 - Smbus.c - alink_ab_indx - Start.
SB800 - Smbus.c - alink_ab_indx - End.
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 8827 exit 0
Enumerating buses...
Mainboard apu1 Enable.
setup_bsp_ramtop, TOP MEM: msr.lo = 0x7f000000, msr.hi = 0x00000000
setup_bsp_ramtop, TOP MEM2: msr.lo = 0x00000000, msr.hi = 0x00000000
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
AP siblings=1
CPU: APIC: 00 enabled
CPU: APIC: 01 enabled
scan_bus: scanning of bus CPU_CLUSTER: 0 took 5538 usecs
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [1022/1510] enabled
PCI: 00:04.0 subordinate bus PCI Express
PCI: 00:04.0 [1022/1512] enabled
PCI: 00:05.0 subordinate bus PCI Express
PCI: 00:05.0 [1022/1513] enabled
PCI: 00:06.0 subordinate bus PCI Express
PCI: 00:06.0 [1022/1514] enabled
PCI: Static device PCI: 00:07.0 not found, disabling it.
PCI: Static device PCI: 00:08.0 not found, disabling it.
PCI: 00:11.0 [1002/4390] enabled
PCI: 00:12.0 [1002/4397] enabled
PCI: 00:12.2 [1002/4396] enabled
PCI: 00:13.0 [1002/4397] enabled
PCI: 00:13.2 [1002/4396] enabled
IOAPIC: Clearing IOAPIC at fec00000
IOAPIC: 24 interrupts
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
IOAPIC: 24 interrupts
IOAPIC: Enabling interrupts on FSB
PCI: 00:14.0 [1002/4385] enabled
PCI: 00:14.2 [1002/4383] disabled
PCI: 00:14.3 [1002/439d] enabled
PCI: 00:14.4 [1002/4384] enabled
PCI: 00:14.5 [1002/4399] disabled
PCI: 00:15.0 subordinate bus PCI Express
PCI: 00:15.0 [1002/43a0] enabled
PCI: 00:15.1 subordinate bus PCI Express
PCI: 00:15.1 [1002/43a1] disabled
PCI: 00:15.2 subordinate bus PCI Express
PCI: 00:15.2 [1002/43a2] disabled
PCI: 00:15.3 subordinate bus PCI Express
PCI: 00:15.3 [1002/43a3] disabled
PCI: 00:16.0 [1002/4397] enabled
SB800: sb_Before_Pci_Init
PCI: 00:16.2 [1002/4396] enabled
PCI: 00:18.0 [1022/1700] enabled
PCI: 00:18.1 [1022/1701] enabled
PCI: 00:18.2 [1022/1702] enabled
PCI: 00:18.3 [1022/1703] enabled
PCI: 00:18.4 [1022/1704] enabled
PCI: 00:18.5 [1022/1718] enabled
PCI: 00:18.6 [1022/1716] enabled
PCI: 00:18.7 [1022/1719] enabled
PCI: Leftover static devices:
PCI: 00:01.0
PCI: 00:07.0
PCI: 00:08.0
PCI: 00:14.1
PCI: Check your devicetree.cb.
PCI: pci_scan_bus for bus 01
PCI: 01:00.0 [10ec/8168] enabled
Failed to enable LTR for dev = PCI: 01:00.0
scan_bus: scanning of bus PCI: 00:04.0 took 9610 usecs
PCI: pci_scan_bus for bus 02
PCI: 02:00.0 [10ec/8168] enabled
Failed to enable LTR for dev = PCI: 02:00.0
scan_bus: scanning of bus PCI: 00:05.0 took 9602 usecs
PCI: pci_scan_bus for bus 03
PCI: 03:00.0 [10ec/8168] enabled
Failed to enable LTR for dev = PCI: 03:00.0
scan_bus: scanning of bus PCI: 00:06.0 took 9601 usecs
PNP: 002e.0 disabled
PNP: 002e.2 enabled
PNP: 002e.3 enabled
PNP: 002e.10 disabled
PNP: 002e.11 disabled
PNP: 002e.8 disabled
PNP: 002e.f disabled
PNP: 002e.7 disabled
PNP: 002e.107 disabled
PNP: 002e.607 disabled
PNP: 002e.e disabled
PNP: 0c31.0 enabled
PNP: 002e.14 enabled
scan_bus: scanning of bus PCI: 00:14.3 took 25595 usecs
PCI: pci_scan_bus for bus 04
scan_bus: scanning of bus PCI: 00:14.4 took 2705 usecs
PCI: pci_scan_bus for bus 05
scan_bus: scanning of bus PCI: 00:15.0 took 2693 usecs
scan_bus: scanning of bus DOMAIN: 0000 took 423831 usecs
scan_bus: scanning of bus Root Device took 455586 usecs
done
BS: BS_DEV_ENUMERATE times (us): entry 0 run 465226 exit 0
Allocating resources...
Reading resources...
Fam14h - domain_read_resources
Fam14h - nb_read_resources
Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000.
SB800 - Lpc.c - lpc_read_resources - Start.
SB800 - Lpc.c - lpc_read_resources - End.
PCI: 00:15.0 register 10(ffffffff), read-only ignoring it
PCI: 00:15.0 register 14(ffffffff), read-only ignoring it
PCI: 00:15.0 register 38(ffffffff), read-only ignoring it
Done reading resources.
Setting resources...
Fam14h - domain_set_resources
amsr - incoming dev = 7eeea8a0
adsr: (before) basek = 0, limitk = 7effffff.
adsr: (after) basek = 0, limitk = 1fbfff, sizek = 1fc000.
adsr - 0xa0000 to 0xbffff resource.
adsr: mmio_basek=003d0000, basek=00000300, limitk=001fbfff
0: mmio_basek=003d0000, basek=00000300, limitk=001fbfff
adsr - mmio_basek = 3d0000.
Fam14h - nb_set_resources
Fam14h - create_vga_resource
Fam14h - set_resource
PCI: 00:04.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io
PCI: 00:04.0 24 <- [0x00f7900000 - 0x00f79fffff] size 0x00100000 gran 0x14 bus 01 prefmem
PCI: 00:04.0 20 <- [0x00f7a00000 - 0x00f7afffff] size 0x00100000 gran 0x14 bus 01 mem
PCI: 01:00.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
PCI: 01:00.0 18 <- [0x00f7a00000 - 0x00f7a00fff] size 0x00001000 gran 0x0c mem64
PCI: 01:00.0 20 <- [0x00f7900000 - 0x00f7903fff] size 0x00004000 gran 0x0e prefmem64
PCI: 00:05.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 02 io
PCI: 00:05.0 24 <- [0x00f7b00000 - 0x00f7bfffff] size 0x00100000 gran 0x14 bus 02 prefmem
PCI: 00:05.0 20 <- [0x00f7c00000 - 0x00f7cfffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 02:00.0 10 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
PCI: 02:00.0 18 <- [0x00f7c00000 - 0x00f7c00fff] size 0x00001000 gran 0x0c mem64
PCI: 02:00.0 20 <- [0x00f7b00000 - 0x00f7b03fff] size 0x00004000 gran 0x0e prefmem64
PCI: 00:06.0 1c <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x0c bus 03 io
PCI: 00:06.0 24 <- [0x00f7d00000 - 0x00f7dfffff] size 0x00100000 gran 0x14 bus 03 prefmem
PCI: 00:06.0 20 <- [0x00f7e00000 - 0x00f7efffff] size 0x00100000 gran 0x14 bus 03 mem
PCI: 03:00.0 10 <- [0x0000003000 - 0x00000030ff] size 0x00000100 gran 0x08 io
PCI: 03:00.0 18 <- [0x00f7e00000 - 0x00f7e00fff] size 0x00001000 gran 0x0c mem64
PCI: 03:00.0 20 <- [0x00f7d00000 - 0x00f7d03fff] size 0x00004000 gran 0x0e prefmem64
PCI: 00:11.0 10 <- [0x0000004010 - 0x0000004017] size 0x00000008 gran 0x03 io
PCI: 00:11.0 14 <- [0x0000004020 - 0x0000004023] size 0x00000004 gran 0x02 io
PCI: 00:11.0 18 <- [0x0000004018 - 0x000000401f] size 0x00000008 gran 0x03 io
PCI: 00:11.0 1c <- [0x0000004024 - 0x0000004027] size 0x00000004 gran 0x02 io
PCI: 00:11.0 20 <- [0x0000004000 - 0x000000400f] size 0x00000010 gran 0x04 io
PCI: 00:11.0 24 <- [0x00f7f03000 - 0x00f7f033ff] size 0x00000400 gran 0x0a mem
PCI: 00:12.0 10 <- [0x00f7f00000 - 0x00f7f00fff] size 0x00001000 gran 0x0c mem
PCI: 00:12.2 10 <- [0x00f7f04000 - 0x00f7f040ff] size 0x00000100 gran 0x08 mem
PCI: 00:13.0 10 <- [0x00f7f01000 - 0x00f7f01fff] size 0x00001000 gran 0x0c mem
PCI: 00:13.2 10 <- [0x00f7f05000 - 0x00f7f050ff] size 0x00000100 gran 0x08 mem
SB800 - Lpc.c - lpc_set_resources - Start.
PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 002e.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
PNP: 002e.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
SB800 - Lpc.c - lpc_set_resources - End.
PCI: 00:14.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io
PCI: 00:14.4 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 04 prefmem
PCI: 00:14.4 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 04 mem
PCI: 00:16.0 10 <- [0x00f7f02000 - 0x00f7f02fff] size 0x00001000 gran 0x0c mem
PCI: 00:16.2 10 <- [0x00f7f06000 - 0x00f7f060ff] size 0x00000100 gran 0x08 mem
adsr - leaving this lovely routine.
Done setting resources.
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 365258 exit 0
APIC 00: ** Enter AmdInitMid [00020005]
SB800: sb_After_Pci_Init
SB800: sb_Mid_Post_Init
AmdInitMid() returned AGESA_SUCCESS
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit AmdInitMid [00020005]
PCI_INTR tables: Writing registers C00/C01 for PIC mode PCI IRQ routing:
PCI_INTR_INDEX PCI_INTR_DATA
0x00 INTA# : 0x0A
0x01 INTB# : 0x0B
0x02 INTC# : 0x0A
0x03 INTD# : 0x0B
0x04 INTE# : 0x0A
0x05 INTF# : 0x0B
0x06 INTG# : 0x0A
0x07 INTH# : 0x0B
0x08 Misc : 0x00
0x09 Misc0 : 0xF1
0x0A Misc1 : 0x00
0x0B Misc2 : 0x00
0x0C Ser IRQ INTA : 0x1F
0x0D Ser IRQ INTB : 0x1F
0x0E Ser IRQ INTC : 0x1F
0x0F Ser IRQ INTD : 0x1F
0x10 SCI : 0x1F
0x11 SMBUS0 : 0x1F
0x12 ASF : 0x1F
0x13 HDA : 0x0A
0x14 FC : 0x1F
0x15 GEC : 0x1F
0x16 PerMon : 0x1F
0x20 IMC INT0 : 0x1F
0x21 IMC INT1 : 0x1F
0x22 IMC INT2 : 0x1F
0x23 IMC INT3 : 0x1F
0x24 IMC INT4 : 0x1F
0x25 IMC INT5 : 0x1F
0x30 Dev18.0 INTA : 0x0A
0x31 Dev18.2 INTB : 0x0B
0x32 Dev19.0 INTA : 0x0A
0x33 Dev19.2 INTB : 0x0B
0x34 Dev22.0 INTA : 0x0A
0x35 Dev22.2 INTB : 0x0B
0x36 Dev20.5 INTC : 0x0A
0x40 IDE : 0x0B
0x41 SATA : 0x0B
0x50 GPPInt0 : 0x0A
0x51 GPPInt1 : 0x0B
0x52 GPPInt2 : 0x0A
0x53 GPPInt3 : 0x0B
PCI_INTR tables: Writing registers C00/C01 for APIC mode PCI IRQ routing:
PCI_INTR_INDEX PCI_INTR_DATA
0x00 INTA# : 0x10
0x01 INTB# : 0x11
0x02 INTC# : 0x12
0x03 INTD# : 0x13
0x04 INTE# : 0x14
0x05 INTF# : 0x15
0x06 INTG# : 0x16
0x07 INTH# : 0x17
0x08 Misc : 0x00
0x09 Misc0 : 0x00
0x0A Misc1 : 0x00
0x0B Misc2 : 0x00
0x0C Ser IRQ INTA : 0x1F
0x0D Ser IRQ INTB : 0x1F
0x0E Ser IRQ INTC : 0x1F
0x0F Ser IRQ INTD : 0x1F
0x10 SCI : 0x09
0x11 SMBUS0 : 0x1F
0x12 ASF : 0x1F
0x13 HDA : 0x10
0x14 FC : 0x1F
0x15 GEC : 0x12
0x16 PerMon : 0x1F
0x20 IMC INT0 : 0x1F
0x21 IMC INT1 : 0x1F
0x22 IMC INT2 : 0x1F
0x23 IMC INT3 : 0x1F
0x24 IMC INT4 : 0x1F
0x25 IMC INT5 : 0x1F
0x30 Dev18.0 INTA : 0x12
0x31 Dev18.2 INTB : 0x11
0x32 Dev19.0 INTA : 0x12
0x33 Dev19.2 INTB : 0x11
0x34 Dev22.0 INTA : 0x12
0x35 Dev22.2 INTB : 0x11
0x36 Dev20.5 INTC : 0x12
0x40 IDE : 0x11
0x41 SATA : 0x13
0x50 GPPInt0 : 0x10
0x51 GPPInt1 : 0x11
0x52 GPPInt2 : 0x12
0x53 GPPInt3 : 0x13
PCI_CFG IRQ: Write PCI config space IRQ assignments
PCI_CFG IRQ: Finished writing PCI config space IRQ assignments
Enabling resources...
PCI: 00:00.0 cmd <- 06
PCI: 00:04.0 bridge ctrl <- 0003
PCI: 00:04.0 cmd <- 07
PCI: 00:05.0 bridge ctrl <- 0003
PCI: 00:05.0 cmd <- 07
PCI: 00:06.0 bridge ctrl <- 0003
PCI: 00:06.0 cmd <- 07
PCI: 00:11.0 subsystem <- 1022/1510
PCI: 00:11.0 cmd <- 03
PCI: 00:12.0 subsystem <- 1022/1510
PCI: 00:12.0 cmd <- 02
PCI: 00:12.2 subsystem <- 1022/1510
PCI: 00:12.2 cmd <- 02
PCI: 00:13.0 subsystem <- 1022/1510
PCI: 00:13.0 cmd <- 02
PCI: 00:13.2 subsystem <- 1022/1510
PCI: 00:13.2 cmd <- 02
PCI: 00:14.0 subsystem <- 1022/1510
PCI: 00:14.0 cmd <- 403
PCI: 00:14.3 subsystem <- 1022/1510
PCI: 00:14.3 cmd <- 0f
PCI: 00:14.4 bridge ctrl <- 0003
PCI: 00:14.4 cmd <- 21
PCI: 00:15.0 bridge ctrl <- ffff
PCI: 00:15.0 cmd <- ffff
PCI: 00:16.0 subsystem <- 1022/1510
PCI: 00:16.0 cmd <- 02
PCI: 00:16.2 subsystem <- 1022/1510
PCI: 00:16.2 cmd <- 02
PCI: 00:18.0 subsystem <- 1022/1510
PCI: 00:18.0 cmd <- 00
PCI: 00:18.1 subsystem <- 1022/1510
PCI: 00:18.1 cmd <- 00
PCI: 00:18.2 subsystem <- 1022/1510
PCI: 00:18.2 cmd <- 00
PCI: 00:18.3 subsystem <- 1022/1510
PCI: 00:18.3 cmd <- 00
PCI: 00:18.4 subsystem <- 1022/1510
PCI: 00:18.4 cmd <- 00
PCI: 00:18.5 subsystem <- 1022/1510
PCI: 00:18.5 cmd <- 00
PCI: 00:18.6 subsystem <- 1022/1510
PCI: 00:18.6 cmd <- 00
PCI: 00:18.7 subsystem <- 1022/1510
PCI: 00:18.7 cmd <- 00
PCI: 01:00.0 cmd <- 03
PCI: 02:00.0 cmd <- 03
PCI: 03:00.0 cmd <- 03
done.
BS: BS_DEV_ENABLE times (us): entry 224434 run 127486 exit 0
Found TPM SLB9665 TT 2.0 by Infineon
tlcl_send_startup: Startup return code is 0
TPM: setup succeeded
Initializing devices...
Root Device init ...
Root Device init finished in 1927 usecs
CPU_CLUSTER: 0 init ...
start_eip=0x00001000, code_size=0x00000031
Initializing CPU #0
CPU: vendor AMD device 500f20
CPU: family 14, model 02, stepping 00
Model 14 Init.
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Enabling cache
Setting up local APIC...
apic_id: 0x00 done.
siblings = 01, CPU #0 initialized
Initializing CPU #1
Waiting for 1 CPUS to stop
CPU: vendor AMD device 500f20
CPU: family 14, model 02, stepping 00
Model 14 Init.
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Enabling cache
Setting up local APIC...
apic_id: 0x01 done.
siblings = 01, CPU #1 initialized
All AP CPUs stopped (2179 loops)
CPU_CLUSTER: 0 init finished in 71560 usecs
DOMAIN: 0000 init ...
DOMAIN: 0000 init finished in 2017 usecs
PCI: 00:00.0 init ...
Northbridge init
PCI: 00:00.0 init finished in 3590 usecs
PCI: 00:11.0 init ...
PCI: 00:11.0 init finished in 2012 usecs
PCI: 00:14.0 init ...
PCI: 00:14.0 init finished in 2017 usecs
PCI: 00:14.3 init ...
SB800 - Late.c - lpc_init - Start.
RTC Init
SB800 - Late.c - lpc_init - End.
PCI: 00:14.3 init finished in 9061 usecs
PCI: 00:18.0 init ...
PCI: 00:18.0 init finished in 2010 usecs
PCI: 00:18.1 init ...
PCI: 00:18.1 init finished in 2017 usecs
PCI: 00:18.2 init ...
PCI: 00:18.2 init finished in 2017 usecs
PCI: 00:18.3 init ...
PCI: 00:18.3 init finished in 2017 usecs
PCI: 00:18.4 init ...
PCI: 00:18.4 init finished in 2017 usecs
PCI: 00:18.5 init ...
PCI: 00:18.5 init finished in 2017 usecs
PCI: 00:18.6 init ...
PCI: 00:18.6 init finished in 2017 usecs
PCI: 00:18.7 init ...
PCI: 00:18.7 init finished in 2017 usecs
PCI: 01:00.0 init ...
PCI: 01:00.0 init finished in 2017 usecs
PCI: 02:00.0 init ...
PCI: 02:00.0 init finished in 2017 usecs
PCI: 03:00.0 init ...
PCI: 03:00.0 init finished in 2016 usecs
PNP: 002e.2 init ...
PNP: 002e.2 init finished in 1957 usecs
PNP: 002e.3 init ...
PNP: 002e.3 init finished in 1957 usecs
PNP: 002e.14 init ...
PNP: 002e.14 init finished in 2021 usecs
Devices initialized
BS: BS_DEV_INIT times (us): entry 15921 run 202211 exit 0
Finalize devices...
Devices finalized
APIC 00: ** Enter AmdInitLate [00020004]
SB800: sb_Late_Post
AmdInitLate() returned AGESA_SUCCESS
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit AmdInitLate [00020004]
APIC 00: ** Enter AmdS3Save [0002000b]
Manufacturer: c2
SF: Detected MX25L1605D with sector size 0x1000, total 0x200000
SF: Successfully erased 4096 bytes @ 0xffff1000
Manufacturer: c2
SF: Detected MX25L1605D with sector size 0x1000, total 0x200000
SF: Successfully erased 4096 bytes @ 0xffff0000
AmdS3Save() returned AGESA_SUCCESS
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit AmdS3Save [0002000b]
BS: BS_POST_DEVICE times (us): entry 0 run 3509 exit 164735
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 2 exit 0
Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done.
Writing IRQ routing tables to 0x7ed6f000...write_pirq_routing_table done.
PIRQ table: 48 bytes.
Wrote the mp table end at: 000f0410 - 000f05cc
Wrote the mp table end at: 7ed6e010 - 7ed6e1cc
MP table: 460 bytes.
CBFS: 'Master Header Locator' located CBFS at [200:200000)
CBFS: Locating 'fallback/dsdt.aml'
CBFS: Found @ offset 4cec0 size 262a
CBFS: 'Master Header Locator' located CBFS at [200:200000)
CBFS: Locating 'fallback/slic'
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at 7ed4a000.
ACPI: * FACS
ACPI: * DSDT
ACPI: * FADT
ACPI_BLK_BASE: 0x0800
ACPI: added table 1/32, length now 40
ACPI: * SSDT
\_SB.PCI0.LIBR.TPM: LPC TPM PNP: 0c31.0
ACPI: added table 2/32, length now 44
ACPI: * MCFG
ACPI: * TPM2
TPM2 log created at 7ed3a000
ACPI: added table 3/32, length now 48
ACPI: * MADT
ACPI: added table 4/32, length now 52
current = 7ed4cc50
ACPI: added table 5/32, length now 56
ACPI: * SRAT at 7ed4cde8
AGESA SRAT table NULL. Skipping.
ACPI: * SLIT at 7ed4cde8
AGESA SLIT table NULL. Skipping.
ACPI: * AGESA ALIB SSDT at 7ed4cdf0
ACPI: added table 6/32, length now 60
ACPI: * AGESA SSDT Pstate at 7ed4e480
ACPI: added table 7/32, length now 64
ACPI: * HPET
ACPI: added table 8/32, length now 68
ACPI: done.
ACPI tables: 18384 bytes.
smbios_write_tables: 7ed39000
SMBIOS tables: 334 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum 8107
Writing coreboot table at 0x7ed70000
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1. 0000000000001000-000000000009ffff: RAM
2. 00000000000c0000-000000007ed38fff: RAM
3. 000000007ed39000-000000007eeaffff: CONFIGURATION TABLES
4. 000000007eeb0000-000000007efb6fff: RAMSTAGE
5. 000000007efb7000-000000007effffff: CONFIGURATION TABLES
6. 00000000f8000000-00000000fbffffff: RESERVED
7. 00000000fed40000-00000000fed44fff: RESERVED
Manufacturer: c2
SF: Detected MX25L1605D with sector size 0x1000, total 0x200000
CBFS: 'Master Header Locator' located CBFS at [200:200000)
FMAP: Found "FLASH" version 1.1 at 0.
FMAP: base = ffe00000 size = 200000 #areas = 3
Wrote coreboot table at: 7ed70000, 0x32c bytes, checksum 58d
coreboot table: 836 bytes.
IMD ROOT 0. 7efff000 00001000
IMD SMALL 1. 7effe000 00001000
CONSOLE 2. 7efde000 00020000
ROMSTG STCK 3. 7efc6000 00018000
AFTER CAR 4. 7efbe000 00008000
57a9e102 5. 7efb7000 00006e90
RAMSTAGE 6. 7eeaf000 00108000
57a9e100 7. 7eda8000 00106960
ACPISCRATCH 8. 7ed78000 00030000
COREBOOT 9. 7ed70000 00008000
IRQ TABLE 10. 7ed6f000 00001000
SMP TABLE 11. 7ed6e000 00001000
ACPI 12. 7ed4a000 00024000
TPM2 TCGLOG13. 7ed3a000 00010000
SMBIOS 14. 7ed39000 00000800
IMD small region:
IMD ROOT 0. 7effec00 00000400
ROMSTAGE 1. 7effebe0 00000004
57a9e002 2. 7effebc0 00000018
57a9e000 3. 7effeba0 00000018
COREBOOTFWD 4. 7effeb60 00000028
Mainboard apu1 Final.
BS: BS_WRITE_TABLES times (us): entry 0 run 272950 exit 0
CBFS: 'Master Header Locator' located CBFS at [200:200000)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 4f540 size 10a1c
Checking segment from ROM address 0xffe4f778
Checking segment from ROM address 0xffe4f794
Loading segment from ROM address 0xffe4f778
code (compression=1)
New segment dstaddr 0x000e0700 memsize 0x1f900 srcaddr 0xffe4f7b0 filesize 0x109e4
Loading Segment: addr: 0x000e0700 memsz: 0x000000000001f900 filesz: 0x00000000000109e4
using LZMA
Loading segment from ROM address 0xffe4f794
Entry Point 0x000fd258
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 107477 exit 0
Jumping to boot code at 000fd258(7ed70000)
SeaBIOS (version rel-1.12.1-0-ga5cab58)
BUILD: gcc: (coreboot toolchain v1.52 June 11th, 2018) 8.1.0 binutils: (GNU Binutils) 2.30
Found coreboot cbmem console @ 7efde000
Found mainboard PC Engines apu1
Relocating init from 0x000e1d60 to 0x7ecec560 (size 51712)
Found CBFS header at 0xffe00238
multiboot: eax=7eeeb200, ebx=7eeeb1b4
Found 25 PCI devices (max PCI bus is 04)
Copying SMBIOS entry point from 0x7ed39000 to 0x000f6280
Copying ACPI RSDP from 0x7ed4a000 to 0x000f6250
Copying MPTABLE from 0x7ed6e000/7ed6e010 to 0x000f6080
Copying PIR from 0x7ed6f000 to 0x000f6050
Using pmtimer, ioport 0x808
Scan for VGA option rom
No VGA found, scan for other display
sercon: using ioport 0x3f8
sercon: configuring as primary display
Turning on vga text mode console
EHCI init on dev 00:12.2 (regs=0xf7f04020)
EHCI init on dev 00:13.2 (regs=0xf7f05020)
EHCI init on dev 00:16.2 (regs=0xf7f06020)
OHCI init on dev 00:12.0 (regs=0xf7f00000)
OHCI init on dev 00:13.0 (regs=0xf7f01000)
OHCI init on dev 00:16.0 (regs=0xf7f02000)
WARNING - Timeout at i8042_flush:71!
AHCI controller at 00:11.0, iobase 0xf7f03000, irq 11
Found 1 lpt ports
Found 2 serial ports
Searching bootorder for: /rom@img/memtest
Searching bootorder for: /pci@i0cf8/usb@16,2/storage@1/*@0/*@0,0
Searching bootorder for: /pci@i0cf8/usb@16,2/usb-*@1
USB MSC vendor='Multiple' product='Card Reader' rev='1.00' type=0 removable=1
USB MSC blksize=512 sectors=15499264
All threads complete.
Scan for option roms
Running option rom at c000:0003
pmm call arg1=1
pmm call arg1=0
pmm call arg1=1
pmm call arg1=0