| 42 entries total: |
| |
| 11:start of bootblock 9,797 (0) |
| 0:1st timestamp 9,797 (0) |
| 12:end of bootblock 15,925 (6,127) |
| 13:starting to load romstage 15,925 (0) |
| 14:finished loading romstage 23,089 (7,164) |
| 1:start of romstage 23,096 (6) |
| 970:[0x3ca] 24,083 (987) |
| 2:before RAM initialization 95,528 (71,445) |
| 950:calling FspMemoryInit 96,270 (741) |
| 951:returning from FspMemoryInit 142,443 (46,173) |
| 3:after RAM initialization 144,515 (2,072) |
| 4:end of romstage 150,910 (6,395) |
| 100:start of postcar 153,659 (2,748) |
| 101:end of postcar 153,659 (0) |
| 8:starting to load ramstage 153,662 (2) |
| 15:starting LZMA decompress (ignore for x86) 170,616 (16,954) |
| 16:finished LZMA decompress (ignore for x86) 192,125 (21,508) |
| 9:finished loading ramstage 192,228 (103) |
| 10:start of ramstage 193,121 (892) |
| 15:starting LZMA decompress (ignore for x86) 238,819 (45,698) |
| 16:finished LZMA decompress (ignore for x86) 272,331 (33,512) |
| 30:device enumeration 284,718 (12,386) |
| 971:[0x3cb] 298,305 (13,587) |
| 15:starting LZMA decompress (ignore for x86) 298,740 (434) |
| 16:finished LZMA decompress (ignore for x86) 298,970 (229) |
| 954:calling FspSiliconInit 299,354 (384) |
| 955:returning from FspSiliconInit 1,534,877 (1,235,523) |
| 40:device configuration 1,542,574 (7,697) |
| 956:calling FspNotify(AfterPciEnumeration) 1,545,197 (2,623) |
| 957:returning from FspNotify(AfterPciEnumeration) 1,545,372 (174) |
| 50:device enable 1,545,373 (1) |
| 60:device initialization 1,584,539 (39,166) |
| 70:device setup done 1,592,873 (8,333) |
| 75:cbmem post 1,592,878 (5) |
| 80:write tables 1,592,885 (7) |
| 85:finalize chips 1,609,337 (16,451) |
| 90:load payload 1,610,381 (1,043) |
| 958:calling FspNotify(ReadyToBoot) 5,230,697 (3,620,316) |
| 959:returning from FspNotify(ReadyToBoot) 5,234,049 (3,352) |
| 960:calling FspNotify(EndOfFirmware) 5,234,049 (0) |
| 961:returning from FspNotify(EndOfFirmware) 5,234,641 (591) |
| 99:selfboot jump 5,235,551 (910) |
| |
| |
| coreboot-4.14-2062-ge54b508db8 Wed Sep 29 19:06:54 UTC 2021 bootblock starting (log level: 8)... |
| CPU: Intel(R) Core(TM) i7-10510U CPU @ 1.80GHz |
| CPU: ID 806ec, Whiskeylake V0, ucode: 000000e9 |
| CPU: AES supported, TXT NOT supported, VT supported |
| MCH: device id 9b61 (rev 0c) is CometLake-U (4+2) |
| PCH: device id 0284 (rev 00) is Cometlake-U Premium |
| IGD: device id 9b41 (rev 02) is CometLake ULT GT2 |
| CBFS: Found 'fallback/romstage' @0x80 size 0xe410 in mcache @0xfef21c2c |
| FMAP: area COREBOOT found @ 650200 (10157568 bytes) |
| TPM: Digest of FMAP: COREBOOT CBFS: fallback/romstage to PCR 2 logged |
| BS: bootblock times (exec / console): total (unknown) / 0 ms |
| |
| |
| coreboot-4.14-2062-ge54b508db8 Wed Sep 29 19:06:54 UTC 2021 romstage starting (log level: 0)... |
| pm1_sts: 8900 pm1_en: 0000 pm1_cnt: 00001c00 |
| gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000 |
| gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000 |
| gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000 |
| gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000 |
| TCO_STS: 0000 0000 |
| GEN_PMCON: e0015039 00000200 |
| GBLRST_CAUSE: 00000000 00000000 |
| prev_sleep_state 5 |
| CBFS: Found 'fspm.bin' @0x6bdc0 size 0x8e000 in mcache @0xfef21e44 |
| FMAP: area COREBOOT found @ 650200 (10157568 bytes) |
| TPM: Digest of FMAP: COREBOOT CBFS: fspm.bin to PCR 2 logged |
| FMAP: area RW_MRC_CACHE found @ 600000 (65536 bytes) |
| CBMEM: |
| IMD: root @ 0x99eff000 254 entries. |
| IMD: root @ 0x99efec00 62 entries. |
| External stage cache: |
| IMD: root @ 0x9abff000 254 entries. |
| IMD: root @ 0x9abfec00 62 entries. |
| FMAP: area RW_MRC_CACHE found @ 600000 (65536 bytes) |
| MRC: Checking cached data update for 'RW_MRC_CACHE'. |
| SF: Detected 00 0000 with sector size 0x1000, total 0x1000000 |
| MRC: 'RW_MRC_CACHE' does not need update. |
| 2 DIMMs found |
| SMM Memory Map |
| SMRAM : 0x9a000000 0x1000000 |
| Subregion 0: 0x9a000000 0xa00000 |
| Subregion 1: 0x9aa00000 0x200000 |
| Subregion 2: 0x9ac00000 0x400000 |
| top_of_ram = 0x9a000000 |
| MTRR Range: Start=99000000 End=9a000000 (Size 1000000) |
| MTRR Range: Start=9a000000 End=9b000000 (Size 1000000) |
| MTRR Range: Start=ff000000 End=0 (Size 1000000) |
| Normal boot |
| CBFS: Found 'fallback/postcar' @0x1298c0 size 0x6a1c in mcache @0xfef21f1c |
| FMAP: area COREBOOT found @ 650200 (10157568 bytes) |
| TPM: Digest of FMAP: COREBOOT CBFS: fallback/postcar to PCR 2 logged |
| Loading module at 0x99b1e000 with entry 0x99b1e031. filesize: 0x6590 memsize: 0xa8a0 |
| Processing 275 relocs. Offset value of 0x97b1e000 |
| BS: romstage times (exec / console): total (unknown) / 0 ms |
| |
| |
| coreboot-4.14-2062-ge54b508db8 Wed Sep 29 19:06:54 UTC 2021 postcar starting (log level: 0)... |
| Normal boot |
| CBFS: Found 'fallback/ramstage' @0x3ee00 size 0x1cba8 in mcache @0x99b2d10c |
| FMAP: area COREBOOT found @ 650200 (10157568 bytes) |
| TPM: Digest of FMAP: COREBOOT CBFS: fallback/ramstage to PCR 2 logged |
| Loading module at 0x99abe000 with entry 0x99abe000. filesize: 0x3c648 memsize: 0x5ed90 |
| Processing 4226 relocs. Offset value of 0x98cbe000 |
| BS: postcar times (exec / console): total (unknown) / 0 ms |
| |
| |
| coreboot-4.14-2062-ge54b508db8 Wed Sep 29 19:06:54 UTC 2021 ramstage starting (log level: 0)... |
| Normal boot |
| ACPI _SWS is PM1 Index 8 GPE Index -1 |
| CBFS: Found 'cpu_microcode_blob.bin' @0xe540 size 0x30800 in mcache @0x99b2d0ac |
| FMAP: area COREBOOT found @ 650200 (10157568 bytes) |
| TPM: Digest of FMAP: COREBOOT CBFS: cpu_microcode_blob.bin to PCR 2 logged |
| microcode: sig=0x806ec pf=0x4 revision=0xe9 |
| Skip microcode update |
| CBFS: Found 'fsps.bin' @0xfadc0 size 0x2ea9c in mcache @0x99b2d2dc |
| FMAP: area COREBOOT found @ 650200 (10157568 bytes) |
| TPM: Digest of FMAP: COREBOOT CBFS: fsps.bin to PCR 2 logged |
| Detected 4 core, 8 thread CPU. |
| Setting up SMI for CPU |
| IED base = 0x9ac00000 |
| IED size = 0x00400000 |
| Will perform SMM setup. |
| CPU: Intel(R) Core(TM) i7-10510U CPU @ 1.80GHz. |
| Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170 |
| Processing 16 relocs. Offset value of 0x00030000 |
| Attempting to start 7 APs |
| Starting CPUs in xapic mode |
| Waiting for 10ms after sending INIT. |
| Waiting for 1st SIPI to complete...done. |
| Waiting for 2nd SIPI to complete...done. |
| AP: slot 2 apic_id 1, MCU rev: 0x000000e9 |
| AP: slot 1 apic_id 3, MCU rev: 0x000000e9 |
| AP: slot 3 apic_id 2, MCU rev: 0x000000e9 |
| AP: slot 4 apic_id 6, MCU rev: 0x000000e9 |
| AP: slot 5 apic_id 7, MCU rev: 0x000000e9 |
| AP: slot 6 apic_id 4, MCU rev: 0x000000e9 |
| AP: slot 7 apic_id 5, MCU rev: 0x000000e9 |
| smm_stub_place_stacks: cpus: 8 : stack space: needed -> 2000 |
| smm_stub_place_stacks: exit, stack_top 0x9a002000 |
| Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1f0 memsize: 0x1f0 |
| Processing 11 relocs. Offset value of 0x00038000 |
| smm_module_setup_stub: stack_end = 0x9a000000 |
| smm_module_setup_stub: stack_top = 0x9a002000 |
| smm_module_setup_stub: stack_size = 0x400 |
| smm_module_setup_stub: runtime.start32_offset = 0x4c |
| smm_module_setup_stub: runtime.smm_size = 0x10000 |
| SMM Module: stub loaded at 0x00038000. Will call 0x99ad896e |
| Installing permanent SMM handler to 0x9a000000 |
| smm_load_module: total_smm_space_needed bdd8, available -> a00000 |
| Loading module at 0x9a9f9000 with entry 0x9a9f9c33. filesize: 0x2d10 memsize: 0x6dd8 |
| Processing 170 relocs. Offset value of 0x9a9f9000 |
| smm_load_module: smram_start: 0x0x9a000000 |
| smm_load_module: smram_end: 0x9aa00000 |
| smm_load_module: stack_top: 0x9a004000 |
| smm_load_module: handler start 0x9a9f9c33 |
| smm_load_module: handler_size 7bb0 |
| smm_load_module: fxsave_area 0x9a9ff000 |
| smm_load_module: fxsave_size 1000 |
| smm_load_module: CONFIG_MSEG_SIZE 0x0 |
| smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0 |
| smm_load_module: handler_mod_params.smbase = 0x9a000000 |
| smm_load_module: per_cpu_save_state_size = 0x400 |
| smm_load_module: num_cpus = 0x8 |
| smm_load_module: total_save_state_size = 0x2000 |
| smm_load_module: cpu0 entry: 0x9a9e9000 |
| smm_create_map: cpus allowed in one segment 30 |
| smm_create_map: min # of segments needed 1 |
| CPU 0x0 |
| smbase 9a9e9000 entry 9a9f1000 |
| ss_start 9a9f8c00 code_end 9a9f11f0 |
| CPU 0x1 |
| smbase 9a9e8c00 entry 9a9f0c00 |
| ss_start 9a9f8800 code_end 9a9f0df0 |
| CPU 0x2 |
| smbase 9a9e8800 entry 9a9f0800 |
| ss_start 9a9f8400 code_end 9a9f09f0 |
| CPU 0x3 |
| smbase 9a9e8400 entry 9a9f0400 |
| ss_start 9a9f8000 code_end 9a9f05f0 |
| CPU 0x4 |
| smbase 9a9e8000 entry 9a9f0000 |
| ss_start 9a9f7c00 code_end 9a9f01f0 |
| CPU 0x5 |
| smbase 9a9e7c00 entry 9a9efc00 |
| ss_start 9a9f7800 code_end 9a9efdf0 |
| CPU 0x6 |
| smbase 9a9e7800 entry 9a9ef800 |
| ss_start 9a9f7400 code_end 9a9ef9f0 |
| CPU 0x7 |
| smbase 9a9e7400 entry 9a9ef400 |
| ss_start 9a9f7000 code_end 9a9ef5f0 |
| smm_stub_place_stacks: cpus: 8 : stack space: needed -> 4000 |
| smm_stub_place_stacks: exit, stack_top 0x9a004000 |
| Loading module at 0x9a9f1000 with entry 0x9a9f1000. filesize: 0x1f0 memsize: 0x1f0 |
| Processing 11 relocs. Offset value of 0x9a9f1000 |
| smm_place_entry_code: smbase 9a9e7400, stack_top 9a004000 |
| SMM Module: placing smm entry code at 9a9f0c00, cpu # 0x1 |
| smm_place_entry_code: copying from 9a9f1000 to 9a9f0c00 0x1f0 bytes |
| SMM Module: placing smm entry code at 9a9f0800, cpu # 0x2 |
| smm_place_entry_code: copying from 9a9f1000 to 9a9f0800 0x1f0 bytes |
| SMM Module: placing smm entry code at 9a9f0400, cpu # 0x3 |
| smm_place_entry_code: copying from 9a9f1000 to 9a9f0400 0x1f0 bytes |
| SMM Module: placing smm entry code at 9a9f0000, cpu # 0x4 |
| smm_place_entry_code: copying from 9a9f1000 to 9a9f0000 0x1f0 bytes |
| SMM Module: placing smm entry code at 9a9efc00, cpu # 0x5 |
| smm_place_entry_code: copying from 9a9f1000 to 9a9efc00 0x1f0 bytes |
| SMM Module: placing smm entry code at 9a9ef800, cpu # 0x6 |
| smm_place_entry_code: copying from 9a9f1000 to 9a9ef800 0x1f0 bytes |
| SMM Module: placing smm entry code at 9a9ef400, cpu # 0x7 |
| smm_place_entry_code: copying from 9a9f1000 to 9a9ef400 0x1f0 bytes |
| smm_module_setup_stub: stack_end = 0x9a000000 |
| smm_module_setup_stub: stack_top = 0x9a004000 |
| smm_module_setup_stub: stack_size = 0x800 |
| smm_module_setup_stub: runtime.start32_offset = 0x4c |
| smm_module_setup_stub: runtime.smm_size = 0xa00000 |
| SMM Module: stub loaded at 0x9a9f1000. Will call 0x9a9f9c33 |
| Clearing SMI status registers |
| SMI_STS: PM1 |
| WAK PRBTNOR PWRBTN smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x9a9e9000, cpu = 0 |
| In relocation handler: CPU 0 |
| New SMBASE=0x9a9e9000 IEDBASE=0x9ac00000 |
| Writing SMRR. base = 0x9a000006, mask=0xff000800 |
| Relocation complete. |
| smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x9a9e8800, cpu = 2 |
| In relocation handler: CPU 2 |
| New SMBASE=0x9a9e8800 IEDBASE=0x9ac00000 |
| Relocation complete. |
| smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x9a9e8000, cpu = 4 |
| In relocation handler: CPU 4 |
| New SMBASE=0x9a9e8000 IEDBASE=0x9ac00000 |
| Writing SMRR. base = 0x9a000006, mask=0xff000800 |
| Relocation complete. |
| smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x9a9e7c00, cpu = 5 |
| In relocation handler: CPU 5 |
| New SMBASE=0x9a9e7c00 IEDBASE=0x9ac00000 |
| Relocation complete. |
| smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x9a9e8c00, cpu = 1 |
| In relocation handler: CPU 1 |
| New SMBASE=0x9a9e8c00 IEDBASE=0x9ac00000 |
| Relocation complete. |
| smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x9a9e8400, cpu = 3 |
| In relocation handler: CPU 3 |
| New SMBASE=0x9a9e8400 IEDBASE=0x9ac00000 |
| Writing SMRR. base = 0x9a000006, mask=0xff000800 |
| Relocation complete. |
| smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x9a9e7800, cpu = 6 |
| In relocation handler: CPU 6 |
| New SMBASE=0x9a9e7800 IEDBASE=0x9ac00000 |
| Writing SMRR. base = 0x9a000006, mask=0xff000800 |
| Relocation complete. |
| smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x9a9e7400, cpu = 7 |
| In relocation handler: CPU 7 |
| New SMBASE=0x9a9e7400 IEDBASE=0x9ac00000 |
| Relocation complete. |
| Initializing CPU #0 |
| CPU: vendor Intel device 806ec |
| CPU: family 06, model 8e, stepping 0c |
| Clearing out pending MCEs |
| Setting up local APIC... |
| apic_id: 0x0 done. |
| Turbo is available but hidden |
| Turbo is available and visible |
| VMX status: enabled |
| IA32_FEATURE_CONTROL status: locked |
| Skip microcode update |
| CPU #0 initialized |
| Initializing CPU #2 |
| Initializing CPU #1 |
| Initializing CPU #3 |
| CPU: vendor Intel device 806ec |
| CPU: family 06, model 8e, stepping 0c |
| CPU: vendor Intel device 806ec |
| CPU: family 06, model 8e, stepping 0c |
| Clearing out pending MCEs |
| CPU: vendor Intel device 806ec |
| CPU: family 06, model 8e, stepping 0c |
| Initializing CPU #7 |
| Initializing CPU #6 |
| CPU: vendor Intel device 806ec |
| CPU: family 06, model 8e, stepping 0c |
| CPU: vendor Intel device 806ec |
| CPU: family 06, model 8e, stepping 0c |
| Clearing out pending MCEs |
| Clearing out pending MCEs |
| Clearing out pending MCEs |
| Initializing CPU #5 |
| Initializing CPU #4 |
| CPU: vendor Intel device 806ec |
| CPU: family 06, model 8e, stepping 0c |
| CPU: vendor Intel device 806ec |
| CPU: family 06, model 8e, stepping 0c |
| Clearing out pending MCEs |
| Clearing out pending MCEs |
| Clearing out pending MCEs |
| Setting up local APIC... |
| Setting up local APIC... |
| apic_id: 0x3 done. |
| Setting up local APIC... |
| apic_id: 0x1 done. |
| Setting up local APIC... |
| apic_id: 0x5 done. |
| apic_id: 0x4 done. |
| Setting up local APIC... |
| Setting up local APIC... |
| Setting up local APIC... |
| apic_id: 0x7 done. |
| apic_id: 0x2 done. |
| VMX status: enabled |
| apic_id: 0x6 done. |
| IA32_FEATURE_CONTROL status: locked |
| VMX status: enabled |
| VMX status: enabled |
| Skip microcode update |
| CPU #2 initialized |
| IA32_FEATURE_CONTROL status: locked |
| IA32_FEATURE_CONTROL status: locked |
| Skip microcode update |
| CPU #1 initialized |
| Skip microcode update |
| CPU #7 initialized |
| VMX status: enabled |
| VMX status: enabled |
| VMX status: enabled |
| IA32_FEATURE_CONTROL status: locked |
| IA32_FEATURE_CONTROL status: locked |
| IA32_FEATURE_CONTROL status: locked |
| Skip microcode update |
| CPU #3 initialized |
| Skip microcode update |
| CPU #6 initialized |
| VMX status: enabled |
| Skip microcode update |
| CPU #5 initialized |
| IA32_FEATURE_CONTROL status: locked |
| Skip microcode update |
| CPU #4 initialized |
| bsp_do_flight_plan done after 1 msecs. |
| CPU: frequency set to 4900 MHz |
| Enabling SMIs. |
| Locking SMM. |
| BS: BS_DEV_INIT_CHIPS entry times (exec / console): 91 / 0 ms |
| gpio_pad_reset_config_override: Logical to Chipset mapping not found |
| CBFS: Found 'vbt.bin' @0xf9e00 size 0x499 in mcache @0x99b2d284 |
| FMAP: area COREBOOT found @ 650200 (10157568 bytes) |
| TPM: Digest of FMAP: COREBOOT CBFS: vbt.bin to PCR 2 logged |
| Found a VBT of 4608 bytes after decompression |
| WEAK: src/soc/intel/cannonlake/fsp_params.c/mainboard_silicon_init_params called |
| No CMOS option 'legacy_8254_timer'. |
| VR config[0]: |
| Psi1Threshold: 80 |
| Psi2Threshold: 20 |
| Psi3Threshold: 4 |
| Psi3Enable: 1 |
| Psi4Enable: 1 |
| ImonSlope: 0 |
| ImonOffset: 0 |
| VrVoltageLimit: 1520 |
| IccMax: 24 |
| AcLoadline: 1030 |
| DcLoadline: 1030 |
| TdcEnable: 1 |
| TdcPowerLimit: 32 |
| VR config[1]: |
| Psi1Threshold: 80 |
| Psi2Threshold: 20 |
| Psi3Threshold: 4 |
| Psi3Enable: 1 |
| Psi4Enable: 1 |
| ImonSlope: 0 |
| ImonOffset: 0 |
| VrVoltageLimit: 1520 |
| IccMax: 280 |
| AcLoadline: 180 |
| DcLoadline: 180 |
| TdcEnable: 1 |
| TdcPowerLimit: 384 |
| VR config[2]: |
| Psi1Threshold: 80 |
| Psi2Threshold: 20 |
| Psi3Threshold: 4 |
| Psi3Enable: 1 |
| Psi4Enable: 1 |
| ImonSlope: 0 |
| ImonOffset: 0 |
| VrVoltageLimit: 1520 |
| IccMax: 124 |
| AcLoadline: 310 |
| DcLoadline: 310 |
| TdcEnable: 1 |
| TdcPowerLimit: 176 |
| VR config[3]: |
| Psi1Threshold: 80 |
| Psi2Threshold: 20 |
| Psi3Threshold: 4 |
| Psi3Enable: 1 |
| Psi4Enable: 1 |
| ImonSlope: 0 |
| ImonOffset: 0 |
| VrVoltageLimit: 1520 |
| IccMax: 124 |
| AcLoadline: 310 |
| DcLoadline: 310 |
| TdcEnable: 1 |
| TdcPowerLimit: 176 |
| PCI 1.0, PIN A, using IRQ #16 |
| PCI 1.1, PIN B, using IRQ #17 |
| PCI 1.2, PIN C, using IRQ #18 |
| PCI 2.0, PIN A, using IRQ #19 |
| PCI 4.0, PIN A, using IRQ #20 |
| PCI 5.0, PIN A, using IRQ #21 |
| PCI 8.0, PIN A, using IRQ #22 |
| PCI 12.0, PIN B, using IRQ #23 |
| PCI 12.5, PIN C, using IRQ #16 |
| PCI 12.6, PIN A, using IRQ #24 |
| PCI 13.0, PIN A, using IRQ #25 |
| PCI 14.0, PIN A, using IRQ #17 |
| PCI 14.1, PIN B, using IRQ #18 |
| PCI 14.3, PIN C, using IRQ #19 |
| PCI 14.5, PIN D, using IRQ #20 |
| PCI 15.0, PIN A, using IRQ #26 |
| PCI 15.1, PIN B, using IRQ #27 |
| PCI 15.2, PIN C, using IRQ #28 |
| PCI 15.3, PIN D, using IRQ #29 |
| PCI 16.0, PIN A, using IRQ #21 |
| PCI 16.1, PIN B, using IRQ #22 |
| PCI 16.2, PIN C, using IRQ #23 |
| PCI 16.3, PIN D, using IRQ #16 |
| PCI 16.4, PIN A, using IRQ #21 |
| PCI 16.5, PIN B, using IRQ #22 |
| PCI 17.0, PIN A, using IRQ #17 |
| PCI 19.0, PIN A, using IRQ #30 |
| PCI 19.1, PIN B, using IRQ #31 |
| PCI 19.2, PIN C, using IRQ #32 |
| PCI 1A.0, PIN A, using IRQ #18 |
| PCI 1C.0, PIN A, using IRQ #16 |
| PCI 1C.1, PIN B, using IRQ #17 |
| PCI 1C.2, PIN C, using IRQ #18 |
| PCI 1C.3, PIN D, using IRQ #19 |
| PCI 1C.4, PIN A, using IRQ #16 |
| PCI 1C.5, PIN B, using IRQ #17 |
| PCI 1C.6, PIN C, using IRQ #18 |
| PCI 1C.7, PIN D, using IRQ #19 |
| PCI 1D.0, PIN A, using IRQ #16 |
| PCI 1D.1, PIN B, using IRQ #17 |
| PCI 1D.2, PIN C, using IRQ #18 |
| PCI 1D.3, PIN D, using IRQ #19 |
| PCI 1D.4, PIN A, using IRQ #16 |
| PCI 1D.5, PIN B, using IRQ #17 |
| PCI 1D.6, PIN C, using IRQ #18 |
| PCI 1D.7, PIN D, using IRQ #19 |
| PCI 1E.0, PIN A, using IRQ #33 |
| PCI 1E.1, PIN B, using IRQ #34 |
| PCI 1E.2, PIN C, using IRQ #35 |
| PCI 1E.3, PIN D, using IRQ #36 |
| PCI 1F.3, PIN B, using IRQ #21 |
| PCI 1F.4, PIN C, using IRQ #22 |
| PCI 1F.6, PIN D, using IRQ #23 |
| PCI 1F.7, PIN A, using IRQ #20 |
| IRQ: Using dynamically assigned PCI IO-APIC IRQs |
| FSPS returned 0 |
| Display FSP Version Info HOB |
| Reference Code - CPU = 9.0.7b.20 |
| uCode Version = 0.0.0.ea |
| TXT ACM version = ff.ff.ff.ffff |
| Reference Code - ME = 9.0.7b.20 |
| MEBx version = 0.0.0.0 |
| ME Firmware Version = Consumer SKU |
| Reference Code - CML PCH = 9.0.7b.20 |
| PCH-CRID Status = Disabled |
| PCH-CRID Original Value = ff.ff.ff.ffff |
| PCH-CRID New Value = ff.ff.ff.ffff |
| OPROM - RST - RAID = ff.ff.ff.ffff |
| ChipsetInit Base Version = ff.ff.ff.ffff |
| ChipsetInit Oem Version = ff.ff.ff.ffff |
| Reference Code - SA - System Agent = 9.0.7b.20 |
| Reference Code - MRC = 0.0.0.53 |
| SA - PCIe Version = 9.0.7b.20 |
| SA-CRID Status = Disabled |
| SA-CRID Original Value = 0.0.0.c |
| SA-CRID New Value = 0.0.0.c |
| OPROM - VBIOS = ff.ff.ff.ffff |
| Found PCIe Root Port #5 at PCI: 00:1c.0. |
| Found PCIe Root Port #9 at PCI: 00:1d.0. |
| Found PCIe Root Port #10 at PCI: 00:1d.1. |
| Found PCIe Root Port #13 at PCI: 00:1d.4. |
| pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing. |
| Remapping PCIe Root Port #5 from PCI: 00:1c.4 to new function number 0. |
| BS: BS_DEV_INIT_CHIPS run times (exec / console): 1250 / 0 ms |
| Enumerating buses... |
| Root Device scanning... |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| DOMAIN: 0000 scanning... |
| PCI: pci_scan_bus for bus 00 |
| PCI: 00:00.0 [8086/9b61] enabled |
| PCI: 00:02.0 [8086/9b41] enabled |
| PCI: 00:04.0 [8086/1903] enabled |
| PCI: 00:08.0 [8086/1911] enabled |
| PCI: 00:12.0 [8086/02f9] enabled |
| PCI: 00:14.0 [8086/02ed] enabled |
| PCI: 00:14.2 [8086/02ef] enabled |
| PCI: 00:14.3 [8086/02f0] enabled |
| PCI: 00:15.0 [8086/02e8] enabled |
| PCI: 00:16.0 [8086/02e0] disabled |
| PCI: 00:17.0 [8086/02d3] enabled |
| PCI: 00:19.0 [8086/02c5] disabled |
| PCI: 00:19.2 [8086/02c7] enabled |
| PCI: 00:1c.0 [8086/02bc] enabled |
| PCI: 00:1d.0 [8086/02b0] enabled |
| PCI: 00:1d.1 [8086/02b1] enabled |
| PCI: 00:1d.4 [8086/02b4] enabled |
| PCI: 00:1f.0 [8086/0284] enabled |
| RTC Init |
| Set power off after power failure. |
| Disabling Deep S3 |
| Disabling Deep S3 |
| Disabling Deep S4 |
| Disabling Deep S4 |
| Disabling Deep S5 |
| Disabling Deep S5 |
| PCI: 00:1f.2 [0000/0000] hidden |
| PCI: 00:1f.3 [8086/02c8] enabled |
| PCI: 00:1f.4 [8086/02a3] enabled |
| PCI: 00:1f.5 [8086/02a4] enabled |
| PCI: Leftover static devices: |
| PCI: 00:12.5 |
| PCI: 00:12.6 |
| PCI: 00:13.0 |
| PCI: 00:14.1 |
| PCI: 00:14.5 |
| PCI: 00:15.1 |
| PCI: 00:15.2 |
| PCI: 00:15.3 |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:16.4 |
| PCI: 00:16.5 |
| PCI: 00:19.1 |
| PCI: 00:1a.0 |
| PCI: 00:1e.0 |
| PCI: 00:1e.1 |
| PCI: 00:1e.2 |
| PCI: 00:1e.3 |
| PCI: 00:1f.1 |
| PCI: 00:1f.6 |
| PCI: Check your devicetree.cb. |
| PCI: 00:02.0 scanning... |
| scan_bus: bus PCI: 00:02.0 finished in 0 msecs |
| PCI: 00:14.0 scanning... |
| scan_bus: bus PCI: 00:14.0 finished in 0 msecs |
| PCI: 00:14.3 scanning... |
| GENERIC: 0.0 enabled |
| scan_bus: bus PCI: 00:14.3 finished in 0 msecs |
| PCI: 00:15.0 scanning... |
| PNP0C50 IRQ is not level triggered. |
| ERROR: BUG ENCOUNTERED at file 'src/drivers/i2c/hid/hid.c', line 82 |
| I2C: 00:2c enabled |
| scan_bus: bus PCI: 00:15.0 finished in 0 msecs |
| PCI: 00:1c.0 scanning... |
| PCI: pci_scan_bus for bus 01 |
| PCI: 01:00.0 subordinate bus PCI Express |
| PCI: 01:00.0 [8086/15e7] enabled |
| PCI: 01:00.0 scanning... |
| PCI: pci_scan_bus for bus 02 |
| PCI: 02:00.0 subordinate bus PCI Express |
| PCI: 02:00.0 [8086/15e7] enabled |
| PCI: 02:01.0 subordinate bus PCI Express |
| PCI: 02:01.0 hot-plug capable |
| PCI: 02:01.0 [8086/15e7] enabled |
| PCI: 02:02.0 subordinate bus PCI Express |
| PCI: 02:02.0 [8086/15e7] enabled |
| PCI: 02:00.0 scanning... |
| PCI: pci_scan_bus for bus 03 |
| PCI: 03:00.0 [8086/15e8] enabled |
| Enabling Common Clock Configuration |
| ASPM: Enabled L1 |
| PCIe: Max_Payload_Size adjusted to 128 |
| scan_bus: bus PCI: 02:00.0 finished in 0 msecs |
| PCI: 02:01.0 scanning... |
| PCI: pci_scan_bus for bus 04 |
| scan_bus: bus PCI: 02:01.0 finished in 0 msecs |
| PCI: 02:02.0 scanning... |
| PCI: pci_scan_bus for bus 25 |
| PCI: 25:00.0 [8086/15e9] enabled |
| Enabling Common Clock Configuration |
| ASPM: Enabled L1 |
| PCIe: Max_Payload_Size adjusted to 128 |
| scan_bus: bus PCI: 02:02.0 finished in 0 msecs |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpoint |
| ASPM: Enabled None |
| PCIe: Max_Payload_Size adjusted to 128 |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpoint |
| ASPM: Enabled None |
| PCIe: Max_Payload_Size adjusted to 128 |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpoint |
| ASPM: Enabled None |
| PCIe: Max_Payload_Size adjusted to 128 |
| scan_bus: bus PCI: 01:00.0 finished in 0 msecs |
| Enabling Common Clock Configuration |
| L1 Sub-State supported from root port 28 |
| L1 Sub-State Support = 0xf |
| CommonModeRestoreTime = 0x28 |
| Power On Value = 0x16, Power On Scale = 0x0 |
| ASPM: Enabled None |
| PCIe: Max_Payload_Size adjusted to 128 |
| PCI: 01:00.0: Enabled LTR |
| PCI: 01:00.0: Programmed LTR max latencies |
| scan_bus: bus PCI: 00:1c.0 finished in 1 msecs |
| PCI: 00:1d.0 scanning... |
| PCI: pci_scan_bus for bus 26 |
| PCI: 26:00.0 [10ec/5287] enabled |
| PCI: 26:00.1 [10ec/8168] enabled |
| Enabling Common Clock Configuration |
| L1 Sub-State supported from root port 29 |
| L1 Sub-State Support = 0xf |
| CommonModeRestoreTime = 0x96 |
| Power On Value = 0xf, Power On Scale = 0x1 |
| ASPM: Enabled L1 |
| PCIe: Max_Payload_Size adjusted to 128 |
| PCI: 26:00.0: Enabled LTR |
| PCI: 26:00.0: Programmed LTR max latencies |
| Enabling Common Clock Configuration |
| ASPM: Enabled L1 |
| PCIe: Max_Payload_Size adjusted to 128 |
| PCI: 26:00.1: Enabled LTR |
| PCI: 26:00.1: Programmed LTR max latencies |
| scan_bus: bus PCI: 00:1d.0 finished in 0 msecs |
| PCI: 00:1d.1 scanning... |
| PCI: 00:1d.1: No LTR support |
| PCI: pci_scan_bus for bus 27 |
| scan_bus: bus PCI: 00:1d.1 finished in 0 msecs |
| PCI: 00:1d.4 scanning... |
| PCI: pci_scan_bus for bus 28 |
| PCI: 28:00.0 [144d/a808] enabled |
| Enabling Common Clock Configuration |
| L1 Sub-State supported from root port 29 |
| L1 Sub-State Support = 0xf |
| CommonModeRestoreTime = 0x28 |
| Power On Value = 0x16, Power On Scale = 0x0 |
| ASPM: Enabled L1 |
| PCIe: Max_Payload_Size adjusted to 128 |
| PCI: 28:00.0: Enabled LTR |
| PCI: 28:00.0: Programmed LTR max latencies |
| scan_bus: bus PCI: 00:1d.4 finished in 0 msecs |
| PCI: 00:1f.0 scanning... |
| PNP: 0c31.0 enabled |
| scan_bus: bus PCI: 00:1f.0 finished in 0 msecs |
| PCI: 00:1f.2 scanning... |
| scan_bus: bus PCI: 00:1f.2 finished in 0 msecs |
| PCI: 00:1f.3 scanning... |
| scan_bus: bus PCI: 00:1f.3 finished in 0 msecs |
| PCI: 00:1f.4 scanning... |
| scan_bus: bus PCI: 00:1f.4 finished in 0 msecs |
| PCI: 00:1f.5 scanning... |
| scan_bus: bus PCI: 00:1f.5 finished in 0 msecs |
| scan_bus: bus DOMAIN: 0000 finished in 7 msecs |
| scan_bus: bus Root Device finished in 7 msecs |
| done |
| BS: BS_DEV_ENUMERATE run times (exec / console): 7 / 0 ms |
| MRC: Could not find region 'UNIFIED_MRC_CACHE' |
| FMAP: area RW_MRC_CACHE found @ 600000 (65536 bytes) |
| MRC: NOT enabling PRR for 'RW_MRC_CACHE'. |
| found VGA at PCI: 00:02.0 |
| Setting up VGA for PCI: 00:02.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| Allocating resources... |
| Reading resources... |
| Done reading resources. |
| === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) === |
| PCI: 02:00.0 io: size: 0 align: 12 gran: 12 limit: ffffffff |
| PCI: 02:00.0 io: size: 0 align: 12 gran: 12 limit: ffffffff done |
| PCI: 02:01.0 io: size: 0 align: 12 gran: 12 limit: ffffffff |
| NONE 18 * [0x0 - 0x1fff] io |
| PCI: 02:01.0 io: size: 2000 align: 12 gran: 12 limit: ffff done |
| PCI: 02:02.0 io: size: 0 align: 12 gran: 12 limit: ffffffff |
| PCI: 02:02.0 io: size: 0 align: 12 gran: 12 limit: ffffffff done |
| PCI: 01:00.0 io: size: 0 align: 12 gran: 12 limit: ffffffff |
| PCI: 02:01.0 1c * [0x0 - 0x1fff] io |
| PCI: 01:00.0 io: size: 2000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 01:00.0 1c * [0x0 - 0x1fff] io |
| PCI: 00:1c.0 io: size: 2000 align: 12 gran: 12 limit: ffff done |
| PCI: 02:00.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 03:00.0 10 * [0x0 - 0x3ffff] mem |
| PCI: 03:00.0 14 * [0x40000 - 0x40fff] mem |
| PCI: 02:00.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 02:01.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff |
| NONE 10 * [0x0 - 0x1ffffff] mem |
| PCI: 02:01.0 mem: size: 2000000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 02:02.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 25:00.0 10 * [0x0 - 0xffff] mem |
| PCI: 02:02.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 01:00.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 02:01.0 20 * [0x0 - 0x1ffffff] mem |
| PCI: 02:00.0 20 * [0x2000000 - 0x20fffff] mem |
| PCI: 02:02.0 20 * [0x2100000 - 0x21fffff] mem |
| PCI: 01:00.0 mem: size: 2200000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 01:00.0 20 * [0x0 - 0x21fffff] mem |
| PCI: 00:1c.0 mem: size: 2200000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 02:00.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 02:00.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 02:01.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| NONE 14 * [0x0 - 0x1fffffff] prefmem |
| PCI: 02:01.0 prefmem: size: 20000000 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 02:02.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 02:02.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 01:00.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 02:01.0 24 * [0x0 - 0x1fffffff] prefmem |
| PCI: 01:00.0 prefmem: size: 20000000 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 01:00.0 24 * [0x0 - 0x1fffffff] prefmem |
| PCI: 00:1c.0 prefmem: size: 20000000 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 26:00.1 10 * [0x0 - 0xff] io |
| PCI: 00:1d.0 io: size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 26:00.0 30 * [0x0 - 0xffff] mem |
| PCI: 26:00.1 20 * [0x10000 - 0x13fff] mem |
| PCI: 26:00.0 10 * [0x14000 - 0x14fff] mem |
| PCI: 26:00.1 18 * [0x15000 - 0x15fff] mem |
| PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1d.4 io: size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1d.4 io: size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1d.4 mem: size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 28:00.0 10 * [0x0 - 0x3fff] mem |
| PCI: 00:1d.4 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1d.4 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1d.4 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) === |
| DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff |
| update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed) |
| update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed) |
| update_constraints: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed) |
| DOMAIN: 0000: Resource ranges: |
| * Base: 1000, Size: 800, Tag: 100 |
| * Base: 1900, Size: d6a0, Tag: 100 |
| * Base: efc0, Size: 1040, Tag: 100 |
| PCI: 00:1c.0 1c * [0x2000 - 0x3fff] limit: 3fff io |
| PCI: 00:1d.0 1c * [0x4000 - 0x4fff] limit: 4fff io |
| PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io |
| PCI: 00:17.0 20 * [0x1040 - 0x105f] limit: 105f io |
| PCI: 00:17.0 18 * [0x1060 - 0x1067] limit: 1067 io |
| PCI: 00:17.0 1c * [0x1068 - 0x106b] limit: 106b io |
| DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done |
| DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff |
| update_constraints: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed) |
| update_constraints: PCI: 00:00.0 01 base fed10000 limit fed17fff mem (fixed) |
| update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed) |
| update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed) |
| update_constraints: PCI: 00:00.0 04 base fc000000 limit fc000fff mem (fixed) |
| update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed) |
| update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed) |
| update_constraints: PCI: 00:00.0 07 base fed91000 limit fed91fff mem (fixed) |
| update_constraints: PCI: 00:00.0 08 base 00000000 limit 0009ffff mem (fixed) |
| update_constraints: PCI: 00:00.0 09 base 000c0000 limit 99efffff mem (fixed) |
| update_constraints: PCI: 00:00.0 0a base 99f00000 limit 9f7fffff mem (fixed) |
| update_constraints: PCI: 00:00.0 0b base 100000000 limit 85e7fffff mem (fixed) |
| update_constraints: PCI: 00:00.0 0c base 000a0000 limit 000bffff mem (fixed) |
| update_constraints: PCI: 00:00.0 0d base 000c0000 limit 000fffff mem (fixed) |
| update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed) |
| update_constraints: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed) |
| update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed) |
| DOMAIN: 0000: Resource ranges: |
| * Base: 9f800000, Size: 40800000, Tag: 200 |
| * Base: f0000000, Size: c000000, Tag: 200 |
| * Base: fc001000, Size: 1fff000, Tag: 200 |
| * Base: fe010000, Size: 22000, Tag: 200 |
| * Base: fe033000, Size: cdd000, Tag: 200 |
| * Base: fed18000, Size: 28000, Tag: 200 |
| * Base: fed45000, Size: 3b000, Tag: 200 |
| * Base: fed84000, Size: c000, Tag: 200 |
| * Base: fed92000, Size: e000, Tag: 200 |
| * Base: feda2000, Size: 125e000, Tag: 200 |
| * Base: 85e800000, Size: 77a1800000, Tag: 100200 |
| PCI: 00:02.0 18 * [0xa0000000 - 0xafffffff] limit: afffffff prefmem |
| PCI: 00:02.0 10 * [0xb0000000 - 0xb0ffffff] limit: b0ffffff mem |
| PCI: 00:1c.0 24 * [0xb1000000 - 0xd0ffffff] limit: d0ffffff prefmem |
| PCI: 00:1c.0 20 * [0xd1000000 - 0xd31fffff] limit: d31fffff mem |
| PCI: 00:1d.0 20 * [0x9f800000 - 0x9f8fffff] limit: 9f8fffff mem |
| PCI: 00:1d.4 20 * [0x9f900000 - 0x9f9fffff] limit: 9f9fffff mem |
| PCI: 00:1f.3 20 * [0x9fa00000 - 0x9fafffff] limit: 9fafffff mem |
| PCI: 00:14.0 10 * [0x9fb00000 - 0x9fb0ffff] limit: 9fb0ffff mem |
| PCI: 00:04.0 10 * [0x9fb10000 - 0x9fb17fff] limit: 9fb17fff mem |
| PCI: 00:14.3 10 * [0x9fb18000 - 0x9fb1bfff] limit: 9fb1bfff mem |
| PCI: 00:1f.3 10 * [0x9fb1c000 - 0x9fb1ffff] limit: 9fb1ffff mem |
| PCI: 00:14.2 10 * [0x9fb20000 - 0x9fb21fff] limit: 9fb21fff mem |
| PCI: 00:17.0 10 * [0x9fb22000 - 0x9fb23fff] limit: 9fb23fff mem |
| PCI: 00:08.0 10 * [0x9fb24000 - 0x9fb24fff] limit: 9fb24fff mem |
| PCI: 00:12.0 10 * [0x9fb25000 - 0x9fb25fff] limit: 9fb25fff mem |
| PCI: 00:14.2 18 * [0x9fb26000 - 0x9fb26fff] limit: 9fb26fff mem |
| PCI: 00:15.0 10 * [0x9fb27000 - 0x9fb27fff] limit: 9fb27fff mem |
| PCI: 00:19.2 18 * [0x9fb28000 - 0x9fb28fff] limit: 9fb28fff mem |
| PCI: 00:1f.5 10 * [0x9fb29000 - 0x9fb29fff] limit: 9fb29fff mem |
| PCI: 00:17.0 24 * [0x9fb2a000 - 0x9fb2a7ff] limit: 9fb2a7ff mem |
| PCI: 00:17.0 14 * [0x9fb2b000 - 0x9fb2b0ff] limit: 9fb2b0ff mem |
| PCI: 00:1f.4 10 * [0x9fb2c000 - 0x9fb2c0ff] limit: 9fb2c0ff mem |
| DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done |
| PCI: 00:1c.0 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff |
| PCI: 00:1c.0: Resource ranges: |
| * Base: 2000, Size: 2000, Tag: 100 |
| PCI: 01:00.0 1c * [0x2000 - 0x3fff] limit: 3fff io |
| PCI: 00:1c.0 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff done |
| PCI: 00:1c.0 prefmem: base: b1000000 size: 20000000 align: 20 gran: 20 limit: d0ffffff |
| PCI: 00:1c.0: Resource ranges: |
| * Base: b1000000, Size: 20000000, Tag: 1200 |
| PCI: 01:00.0 24 * [0xb1000000 - 0xd0ffffff] limit: d0ffffff prefmem |
| PCI: 00:1c.0 prefmem: base: b1000000 size: 20000000 align: 20 gran: 20 limit: d0ffffff done |
| PCI: 00:1c.0 mem: base: d1000000 size: 2200000 align: 20 gran: 20 limit: d31fffff |
| PCI: 00:1c.0: Resource ranges: |
| * Base: d1000000, Size: 2200000, Tag: 200 |
| PCI: 01:00.0 20 * [0xd1000000 - 0xd31fffff] limit: d31fffff mem |
| PCI: 00:1c.0 mem: base: d1000000 size: 2200000 align: 20 gran: 20 limit: d31fffff done |
| PCI: 01:00.0 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff |
| PCI: 01:00.0: Resource ranges: |
| * Base: 2000, Size: 2000, Tag: 100 |
| PCI: 02:01.0 1c * [0x2000 - 0x3fff] limit: 3fff io |
| PCI: 01:00.0 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff done |
| PCI: 01:00.0 prefmem: base: b1000000 size: 20000000 align: 20 gran: 20 limit: d0ffffff |
| PCI: 01:00.0: Resource ranges: |
| * Base: b1000000, Size: 20000000, Tag: 1200 |
| PCI: 02:01.0 24 * [0xb1000000 - 0xd0ffffff] limit: d0ffffff prefmem |
| PCI: 01:00.0 prefmem: base: b1000000 size: 20000000 align: 20 gran: 20 limit: d0ffffff done |
| PCI: 01:00.0 mem: base: d1000000 size: 2200000 align: 20 gran: 20 limit: d31fffff |
| PCI: 01:00.0: Resource ranges: |
| * Base: d1000000, Size: 2200000, Tag: 200 |
| PCI: 02:01.0 20 * [0xd1000000 - 0xd2ffffff] limit: d2ffffff mem |
| PCI: 02:00.0 20 * [0xd3000000 - 0xd30fffff] limit: d30fffff mem |
| PCI: 02:02.0 20 * [0xd3100000 - 0xd31fffff] limit: d31fffff mem |
| PCI: 01:00.0 mem: base: d1000000 size: 2200000 align: 20 gran: 20 limit: d31fffff done |
| PCI: 02:00.0 mem: base: d3000000 size: 100000 align: 20 gran: 20 limit: d30fffff |
| PCI: 02:00.0: Resource ranges: |
| * Base: d3000000, Size: 100000, Tag: 200 |
| PCI: 03:00.0 10 * [0xd3000000 - 0xd303ffff] limit: d303ffff mem |
| PCI: 03:00.0 14 * [0xd3040000 - 0xd3040fff] limit: d3040fff mem |
| PCI: 02:00.0 mem: base: d3000000 size: 100000 align: 20 gran: 20 limit: d30fffff done |
| PCI: 02:01.0 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff |
| PCI: 02:01.0: Resource ranges: |
| * Base: 2000, Size: 2000, Tag: 100 |
| NONE 18 * [0x2000 - 0x3fff] limit: 3fff io |
| PCI: 02:01.0 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff done |
| PCI: 02:01.0 prefmem: base: b1000000 size: 20000000 align: 20 gran: 20 limit: d0ffffff |
| PCI: 02:01.0: Resource ranges: |
| * Base: b1000000, Size: 20000000, Tag: 1200 |
| NONE 14 * [0xb1000000 - 0xd0ffffff] limit: d0ffffff prefmem |
| PCI: 02:01.0 prefmem: base: b1000000 size: 20000000 align: 20 gran: 20 limit: d0ffffff done |
| PCI: 02:01.0 mem: base: d1000000 size: 2000000 align: 20 gran: 20 limit: d2ffffff |
| PCI: 02:01.0: Resource ranges: |
| * Base: d1000000, Size: 2000000, Tag: 200 |
| NONE 10 * [0xd1000000 - 0xd2ffffff] limit: d2ffffff mem |
| PCI: 02:01.0 mem: base: d1000000 size: 2000000 align: 20 gran: 20 limit: d2ffffff done |
| PCI: 02:02.0 mem: base: d3100000 size: 100000 align: 20 gran: 20 limit: d31fffff |
| PCI: 02:02.0: Resource ranges: |
| * Base: d3100000, Size: 100000, Tag: 200 |
| PCI: 25:00.0 10 * [0xd3100000 - 0xd310ffff] limit: d310ffff mem |
| PCI: 02:02.0 mem: base: d3100000 size: 100000 align: 20 gran: 20 limit: d31fffff done |
| PCI: 00:1d.0 io: base: 4000 size: 1000 align: 12 gran: 12 limit: 4fff |
| PCI: 00:1d.0: Resource ranges: |
| * Base: 4000, Size: 1000, Tag: 100 |
| PCI: 26:00.1 10 * [0x4000 - 0x40ff] limit: 40ff io |
| PCI: 00:1d.0 io: base: 4000 size: 1000 align: 12 gran: 12 limit: 4fff done |
| PCI: 00:1d.0 mem: base: 9f800000 size: 100000 align: 20 gran: 20 limit: 9f8fffff |
| PCI: 00:1d.0: Resource ranges: |
| * Base: 9f800000, Size: 100000, Tag: 200 |
| PCI: 26:00.0 30 * [0x9f800000 - 0x9f80ffff] limit: 9f80ffff mem |
| PCI: 26:00.1 20 * [0x9f810000 - 0x9f813fff] limit: 9f813fff mem |
| PCI: 26:00.0 10 * [0x9f814000 - 0x9f814fff] limit: 9f814fff mem |
| PCI: 26:00.1 18 * [0x9f815000 - 0x9f815fff] limit: 9f815fff mem |
| PCI: 00:1d.0 mem: base: 9f800000 size: 100000 align: 20 gran: 20 limit: 9f8fffff done |
| PCI: 00:1d.4 mem: base: 9f900000 size: 100000 align: 20 gran: 20 limit: 9f9fffff |
| PCI: 00:1d.4: Resource ranges: |
| * Base: 9f900000, Size: 100000, Tag: 200 |
| PCI: 28:00.0 10 * [0x9f900000 - 0x9f903fff] limit: 9f903fff mem |
| PCI: 00:1d.4 mem: base: 9f900000 size: 100000 align: 20 gran: 20 limit: 9f9fffff done |
| === Resource allocator: DOMAIN: 0000 - resource allocation complete === |
| PCI: 00:02.0 10 <- [0x00b0000000 - 0x00b0ffffff] size 0x01000000 gran 0x18 mem64 |
| PCI: 00:02.0 18 <- [0x00a0000000 - 0x00afffffff] size 0x10000000 gran 0x1c prefmem64 |
| PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io |
| PCI: 00:04.0 10 <- [0x009fb10000 - 0x009fb17fff] size 0x00008000 gran 0x0f mem64 |
| PCI: 00:08.0 10 <- [0x009fb24000 - 0x009fb24fff] size 0x00001000 gran 0x0c mem64 |
| PCI: 00:12.0 10 <- [0x009fb25000 - 0x009fb25fff] size 0x00001000 gran 0x0c mem64 |
| PCI: 00:14.0 10 <- [0x009fb00000 - 0x009fb0ffff] size 0x00010000 gran 0x10 mem64 |
| PCI: 00:14.2 10 <- [0x009fb20000 - 0x009fb21fff] size 0x00002000 gran 0x0d mem64 |
| PCI: 00:14.2 18 <- [0x009fb26000 - 0x009fb26fff] size 0x00001000 gran 0x0c mem64 |
| PCI: 00:14.3 10 <- [0x009fb18000 - 0x009fb1bfff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:15.0 10 <- [0x009fb27000 - 0x009fb27fff] size 0x00001000 gran 0x0c mem64 |
| PCI: 00:17.0 10 <- [0x009fb22000 - 0x009fb23fff] size 0x00002000 gran 0x0d mem |
| PCI: 00:17.0 14 <- [0x009fb2b000 - 0x009fb2b0ff] size 0x00000100 gran 0x08 mem |
| PCI: 00:17.0 18 <- [0x0000001060 - 0x0000001067] size 0x00000008 gran 0x03 io |
| PCI: 00:17.0 1c <- [0x0000001068 - 0x000000106b] size 0x00000004 gran 0x02 io |
| PCI: 00:17.0 20 <- [0x0000001040 - 0x000000105f] size 0x00000020 gran 0x05 io |
| PCI: 00:17.0 24 <- [0x009fb2a000 - 0x009fb2a7ff] size 0x00000800 gran 0x0b mem |
| PCI: 00:19.2 18 <- [0x009fb28000 - 0x009fb28fff] size 0x00001000 gran 0x0c mem64 |
| PCI: 00:1c.0 1c <- [0x0000002000 - 0x0000003fff] size 0x00002000 gran 0x0c bus 01 io |
| PCI: 00:1c.0 24 <- [0x00b1000000 - 0x00d0ffffff] size 0x20000000 gran 0x14 bus 01 prefmem |
| PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d31fffff] size 0x02200000 gran 0x14 bus 01 mem |
| PCI: 01:00.0 1c <- [0x0000002000 - 0x0000003fff] size 0x00002000 gran 0x0c bus 02 io |
| PCI: 01:00.0 24 <- [0x00b1000000 - 0x00d0ffffff] size 0x20000000 gran 0x14 bus 02 prefmem |
| PCI: 01:00.0 20 <- [0x00d1000000 - 0x00d31fffff] size 0x02200000 gran 0x14 bus 02 mem |
| PCI: 02:00.0 1c <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x0c bus 03 io |
| PCI: 02:00.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 03 prefmem |
| PCI: 02:00.0 20 <- [0x00d3000000 - 0x00d30fffff] size 0x00100000 gran 0x14 bus 03 mem |
| PCI: 03:00.0 10 <- [0x00d3000000 - 0x00d303ffff] size 0x00040000 gran 0x12 mem |
| PCI: 03:00.0 14 <- [0x00d3040000 - 0x00d3040fff] size 0x00001000 gran 0x0c mem |
| PCI: 02:01.0 1c <- [0x0000002000 - 0x0000003fff] size 0x00002000 gran 0x0c bus 04 io |
| PCI: 02:01.0 24 <- [0x00b1000000 - 0x00d0ffffff] size 0x20000000 gran 0x14 bus 04 prefmem |
| PCI: 02:01.0 20 <- [0x00d1000000 - 0x00d2ffffff] size 0x02000000 gran 0x14 bus 04 mem |
| NONE missing set_resources |
| PCI: 02:02.0 1c <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x0c bus 25 io |
| PCI: 02:02.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 25 prefmem |
| PCI: 02:02.0 20 <- [0x00d3100000 - 0x00d31fffff] size 0x00100000 gran 0x14 bus 25 mem |
| PCI: 25:00.0 10 <- [0x00d3100000 - 0x00d310ffff] size 0x00010000 gran 0x10 mem |
| PCI: 00:1d.0 1c <- [0x0000004000 - 0x0000004fff] size 0x00001000 gran 0x0c bus 26 io |
| PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 26 prefmem |
| PCI: 00:1d.0 20 <- [0x009f800000 - 0x009f8fffff] size 0x00100000 gran 0x14 bus 26 mem |
| PCI: 26:00.0 10 <- [0x009f814000 - 0x009f814fff] size 0x00001000 gran 0x0c mem |
| PCI: 26:00.0 30 <- [0x009f800000 - 0x009f80ffff] size 0x00010000 gran 0x10 romem |
| PCI: 26:00.1 10 <- [0x0000004000 - 0x00000040ff] size 0x00000100 gran 0x08 io |
| PCI: 26:00.1 18 <- [0x009f815000 - 0x009f815fff] size 0x00001000 gran 0x0c mem64 |
| PCI: 26:00.1 20 <- [0x009f810000 - 0x009f813fff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:1d.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 27 io |
| PCI: 00:1d.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 27 prefmem |
| PCI: 00:1d.1 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 27 mem |
| PCI: 00:1d.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 28 io |
| PCI: 00:1d.4 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 28 prefmem |
| PCI: 00:1d.4 20 <- [0x009f900000 - 0x009f9fffff] size 0x00100000 gran 0x14 bus 28 mem |
| PCI: 28:00.0 10 <- [0x009f900000 - 0x009f903fff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:1f.3 10 <- [0x009fb1c000 - 0x009fb1ffff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:1f.3 20 <- [0x009fa00000 - 0x009fafffff] size 0x00100000 gran 0x14 mem64 |
| PCI: 00:1f.4 10 <- [0x009fb2c000 - 0x009fb2c0ff] size 0x00000100 gran 0x08 mem64 |
| PCI: 00:1f.5 10 <- [0x009fb29000 - 0x009fb29fff] size 0x00001000 gran 0x0c mem |
| Done setting resources. |
| Done allocating resources. |
| BS: BS_DEV_RESOURCES run times (exec / console): 2 / 0 ms |
| Enabling resources... |
| PCI: 00:00.0 subsystem <- 1558/1404 |
| PCI: 00:00.0 cmd <- 06 |
| PCI: 00:02.0 subsystem <- 1558/1404 |
| PCI: 00:02.0 cmd <- 03 |
| PCI: 00:04.0 subsystem <- 1558/1404 |
| PCI: 00:04.0 cmd <- 02 |
| PCI: 00:08.0 cmd <- 06 |
| PCI: 00:12.0 subsystem <- 1558/1404 |
| PCI: 00:12.0 cmd <- 02 |
| PCI: 00:14.0 subsystem <- 1558/1404 |
| PCI: 00:14.0 cmd <- 02 |
| PCI: 00:14.2 cmd <- 02 |
| PCI: 00:14.3 subsystem <- 1558/1404 |
| PCI: 00:14.3 cmd <- 02 |
| PCI: 00:15.0 subsystem <- 1558/1404 |
| PCI: 00:15.0 cmd <- 02 |
| PCI: 00:17.0 subsystem <- 1558/1404 |
| PCI: 00:17.0 cmd <- 03 |
| PCI: 00:19.2 subsystem <- 1558/1404 |
| PCI: 00:19.2 cmd <- 06 |
| PCI: 00:1c.0 bridge ctrl <- 0013 |
| PCI: 00:1c.0 subsystem <- 1558/1404 |
| PCI: 00:1c.0 cmd <- 07 |
| PCI: 00:1d.0 bridge ctrl <- 0013 |
| PCI: 00:1d.0 subsystem <- 1558/1404 |
| PCI: 00:1d.0 cmd <- 07 |
| PCI: 00:1d.1 bridge ctrl <- 0013 |
| PCI: 00:1d.1 subsystem <- 1558/1404 |
| PCI: 00:1d.1 cmd <- 00 |
| PCI: 00:1d.4 bridge ctrl <- 0013 |
| PCI: 00:1d.4 subsystem <- 1558/1404 |
| PCI: 00:1d.4 cmd <- 06 |
| PCI: 00:1f.0 subsystem <- 1558/1404 |
| PCI: 00:1f.0 cmd <- 07 |
| PCI: 00:1f.3 subsystem <- 1558/1404 |
| PCI: 00:1f.3 cmd <- 02 |
| PCI: 00:1f.4 subsystem <- 1558/1404 |
| PCI: 00:1f.4 cmd <- 03 |
| PCI: 00:1f.5 subsystem <- 1558/1404 |
| PCI: 00:1f.5 cmd <- 406 |
| PCI: 01:00.0 bridge ctrl <- 0013 |
| PCI: 01:00.0 cmd <- 07 |
| PCI: 02:00.0 bridge ctrl <- 0013 |
| PCI: 02:00.0 cmd <- 06 |
| PCI: 02:01.0 bridge ctrl <- 0013 |
| PCI: 02:01.0 cmd <- 07 |
| PCI: 02:02.0 bridge ctrl <- 0013 |
| PCI: 02:02.0 cmd <- 06 |
| PCI: 03:00.0 cmd <- 06 |
| PCI: 25:00.0 cmd <- 02 |
| PCI: 26:00.0 cmd <- 02 |
| PCI: 26:00.1 cmd <- 03 |
| PCI: 28:00.0 cmd <- 02 |
| done. |
| Found TPM SLB9670 TT 2.0 by Infineon |
| tlcl_send_startup: Startup return code is 0 |
| TPM: Write digests cached in TCPA log to PCR |
| TPM: Write digest for FMAP: FMAP into PCR 2 |
| tlcl_extend: response is 0 |
| TPM: Write digest for FMAP: COREBOOT CBFS: bootblock into PCR 2 |
| tlcl_extend: response is 0 |
| TPM: Write digest for FMAP: COREBOOT CBFS: cmos.default into PCR 2 |
| tlcl_extend: response is 0 |
| TPM: Write digest for FMAP: COREBOOT CBFS: fallback/romstage into PCR 2 |
| tlcl_extend: response is 0 |
| TPM: Write digest for FMAP: COREBOOT CBFS: cmos_layout.bin into PCR 2 |
| tlcl_extend: response is 0 |
| TPM: Write digest for FMAP: COREBOOT CBFS: fspm.bin into PCR 2 |
| tlcl_extend: response is 0 |
| TPM: Write digest for FMAP: COREBOOT CBFS: fallback/postcar into PCR 2 |
| tlcl_extend: response is 0 |
| TPM: Write digest for FMAP: COREBOOT CBFS: fallback/ramstage into PCR 2 |
| tlcl_extend: response is 0 |
| TPM: Write digest for FMAP: COREBOOT CBFS: cpu_microcode_blob.bin into PCR 2 |
| tlcl_extend: response is 0 |
| TPM: Write digest for FMAP: COREBOOT CBFS: fsps.bin into PCR 2 |
| tlcl_extend: response is 0 |
| TPM: Write digest for FMAP: COREBOOT CBFS: vbt.bin into PCR 2 |
| tlcl_extend: response is 0 |
| TPM: setup succeeded |
| BS: BS_DEV_INIT entry times (exec / console): 39 / 0 ms |
| Initializing devices... |
| PCI: 00:00.0 init |
| CPU TDP = 15 Watts |
| CPU PL1 = 20 Watts |
| CPU PL2 = 30 Watts |
| PCI: 00:00.0 init finished in 1 msecs |
| PCI: 00:02.0 init |
| GMA: Found VBT in CBFS |
| GMA: Found valid VBT in CBFS |
| framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32 |
| x_res x y_res: 1920 x 1080, size: 8294400 at 0xa0000000 |
| PCI: 00:02.0 init finished in 0 msecs |
| PCI: 00:04.0 init |
| PCI: 00:04.0 init finished in 0 msecs |
| PCI: 00:08.0 init |
| PCI: 00:08.0 init finished in 0 msecs |
| PCI: 00:12.0 init |
| PCI: 00:12.0 init finished in 0 msecs |
| PCI: 00:14.0 init |
| PCI: 00:14.0 init finished in 0 msecs |
| PCI: 00:14.2 init |
| PCI: 00:14.2 init finished in 0 msecs |
| PCI: 00:15.0 init |
| I2C bus 0 version 0x3132322a |
| DW I2C bus 0 at 0x9fb27000 (400 KHz) |
| PCI: 00:15.0 init finished in 0 msecs |
| PCI: 00:1c.0 init |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.0 init finished in 0 msecs |
| PCI: 00:1d.0 init |
| Initializing PCH PCIe bridge. |
| PCI: 00:1d.0 init finished in 0 msecs |
| PCI: 00:1d.1 init |
| Initializing PCH PCIe bridge. |
| PCI: 00:1d.1 init finished in 0 msecs |
| PCI: 00:1d.4 init |
| Initializing PCH PCIe bridge. |
| PCI: 00:1d.4 init finished in 0 msecs |
| PCI: 00:1f.0 init |
| IOAPIC: Initializing IOAPIC at 0xfec00000 |
| IOAPIC: ID = 0x02 |
| PCI: 00:1f.0 init finished in 0 msecs |
| PCI: 00:1f.2 init |
| apm_control: Disabling ACPI. |
| APMC done. |
| PCI: 00:1f.2 init finished in 0 msecs |
| PCI: 00:1f.3 init |
| azalia_audio: base = 0x9fb1c000 |
| azalia_audio: codec_mask = 05 |
| azalia_audio: Initializing codec #2 |
| azalia_audio: codec viddid: 8086280b |
| azalia_audio: verb_size: 16 |
| azalia_audio: verb loaded. |
| azalia_audio: Initializing codec #0 |
| azalia_audio: codec viddid: 10ec0293 |
| azalia_audio: verb_size: 48 |
| azalia_audio: verb loaded. |
| PCI: 00:1f.3 init finished in 6 msecs |
| PCI: 00:1f.4 init |
| PCI: 00:1f.4 init finished in 0 msecs |
| PCI: 03:00.0 init |
| PCI: 03:00.0 init finished in 0 msecs |
| PCI: 25:00.0 init |
| PCI: 25:00.0 init finished in 0 msecs |
| PCI: 26:00.0 init |
| PCI: 26:00.0 init finished in 0 msecs |
| PCI: 26:00.1 init |
| PCI: 26:00.1 init finished in 0 msecs |
| PCI: 28:00.0 init |
| PCI: 28:00.0 init finished in 0 msecs |
| Devices initialized |
| BS: BS_DEV_INIT run times (exec / console): 8 / 0 ms |
| Finalize devices... |
| PCI: 00:17.0 final |
| Devices finalized |
| HECI: No CSE device |
| CBFS: Found 'fallback/dsdt.aml' @0x68700 size 0x34cd in mcache @0x99b2d1f0 |
| FMAP: area COREBOOT found @ 650200 (10157568 bytes) |
| TPM: Extending digest for FMAP: COREBOOT CBFS: fallback/dsdt.aml into PCR 2 |
| tlcl_extend: response is 0 |
| TPM: Digest of FMAP: COREBOOT CBFS: fallback/dsdt.aml to PCR 2 measured |
| CBFS: 'fallback/slic' not found. |
| ACPI: Writing ACPI tables at 99a4b000. |
| ACPI: * FACS |
| ACPI: * DSDT |
| PCI space above 4GB MMIO is at 0x85e800000, len = 0x77a1800000 |
| ACPI: * FADT |
| SCI is IRQ9 |
| ACPI: added table 1/32, length now 40 |
| ACPI: * SSDT |
| Found 1 CPU(s) with 4/8 physical/logical core(s) each. |
| PSS: 1801MHz power 15000 control 0x3100 status 0x3100 |
| PSS: 1800MHz power 15000 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 13013 control 0x1000 status 0x1000 |
| PSS: 1300MHz power 10212 control 0xd00 status 0xd00 |
| PSS: 1000MHz power 7584 control 0xa00 status 0xa00 |
| PSS: 700MHz power 5109 control 0x700 status 0x700 |
| PSS: 400MHz power 2820 control 0x400 status 0x400 |
| PSS: 1801MHz power 15000 control 0x3100 status 0x3100 |
| PSS: 1800MHz power 15000 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 13013 control 0x1000 status 0x1000 |
| PSS: 1300MHz power 10212 control 0xd00 status 0xd00 |
| PSS: 1000MHz power 7584 control 0xa00 status 0xa00 |
| PSS: 700MHz power 5109 control 0x700 status 0x700 |
| PSS: 400MHz power 2820 control 0x400 status 0x400 |
| PSS: 1801MHz power 15000 control 0x3100 status 0x3100 |
| PSS: 1800MHz power 15000 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 13013 control 0x1000 status 0x1000 |
| PSS: 1300MHz power 10212 control 0xd00 status 0xd00 |
| PSS: 1000MHz power 7584 control 0xa00 status 0xa00 |
| PSS: 700MHz power 5109 control 0x700 status 0x700 |
| PSS: 400MHz power 2820 control 0x400 status 0x400 |
| PSS: 1801MHz power 15000 control 0x3100 status 0x3100 |
| PSS: 1800MHz power 15000 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 13013 control 0x1000 status 0x1000 |
| PSS: 1300MHz power 10212 control 0xd00 status 0xd00 |
| PSS: 1000MHz power 7584 control 0xa00 status 0xa00 |
| PSS: 700MHz power 5109 control 0x700 status 0x700 |
| PSS: 400MHz power 2820 control 0x400 status 0x400 |
| PSS: 1801MHz power 15000 control 0x3100 status 0x3100 |
| PSS: 1800MHz power 15000 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 13013 control 0x1000 status 0x1000 |
| PSS: 1300MHz power 10212 control 0xd00 status 0xd00 |
| PSS: 1000MHz power 7584 control 0xa00 status 0xa00 |
| PSS: 700MHz power 5109 control 0x700 status 0x700 |
| PSS: 400MHz power 2820 control 0x400 status 0x400 |
| PSS: 1801MHz power 15000 control 0x3100 status 0x3100 |
| PSS: 1800MHz power 15000 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 13013 control 0x1000 status 0x1000 |
| PSS: 1300MHz power 10212 control 0xd00 status 0xd00 |
| PSS: 1000MHz power 7584 control 0xa00 status 0xa00 |
| PSS: 700MHz power 5109 control 0x700 status 0x700 |
| PSS: 400MHz power 2820 control 0x400 status 0x400 |
| PSS: 1801MHz power 15000 control 0x3100 status 0x3100 |
| PSS: 1800MHz power 15000 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 13013 control 0x1000 status 0x1000 |
| PSS: 1300MHz power 10212 control 0xd00 status 0xd00 |
| PSS: 1000MHz power 7584 control 0xa00 status 0xa00 |
| PSS: 700MHz power 5109 control 0x700 status 0x700 |
| PSS: 400MHz power 2820 control 0x400 status 0x400 |
| PSS: 1801MHz power 15000 control 0x3100 status 0x3100 |
| PSS: 1800MHz power 15000 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 13013 control 0x1000 status 0x1000 |
| PSS: 1300MHz power 10212 control 0xd00 status 0xd00 |
| PSS: 1000MHz power 7584 control 0xa00 status 0xa00 |
| PSS: 700MHz power 5109 control 0x700 status 0x700 |
| PSS: 400MHz power 2820 control 0x400 status 0x400 |
| \_SB.PCI0.PEPD: Intel Power Engine Plug-in |
| \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0 |
| \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c |
| \_SB.PCI0.LPCB.TPM.TPM: LPC TPM PNP: 0c31.0 |
| ACPI: added table 2/32, length now 44 |
| ACPI: * MCFG |
| ACPI: added table 3/32, length now 48 |
| ACPI: * TPM2 |
| TPM2 log created at 0x99a3b000 |
| ACPI: added table 4/32, length now 52 |
| ACPI: * LPIT |
| ACPI: added table 5/32, length now 56 |
| ACPI: * MADT |
| SCI is IRQ9 |
| ACPI: added table 6/32, length now 60 |
| current = 99a508f0 |
| ACPI: * DMAR |
| ACPI: added table 7/32, length now 64 |
| ACPI: added table 8/32, length now 68 |
| ACPI: * HPET |
| ACPI: added table 9/32, length now 72 |
| ACPI: done. |
| ACPI tables: 23072 bytes. |
| smbios_write_tables: 99a3a000 |
| SMBIOS firmware version is set to coreboot_version: '4.14-2062-ge54b508db8' |
| Create SMBIOS type 16 |
| Create SMBIOS type 17 |
| GENERIC: 0.0 (WIFI Device) |
| SMBIOS tables: 963 bytes. |
| Writing table forward entry at 0x00000500 |
| Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7637 |
| Writing coreboot table at 0x99a6f000 |
| CBFS: Found 'cmos_layout.bin' @0xfa300 size 0x288 in mcache @0x99b2d2b4 |
| FMAP: area COREBOOT found @ 650200 (10157568 bytes) |
| TPM: Extending digest for FMAP: COREBOOT CBFS: cmos_layout.bin into PCR 2 |
| tlcl_extend: response is 0 |
| TPM: Digest of FMAP: COREBOOT CBFS: cmos_layout.bin to PCR 2 measured |
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1. 0000000000001000-000000000009ffff: RAM |
| 2. 00000000000a0000-00000000000fffff: RESERVED |
| 3. 0000000000100000-0000000099a39fff: RAM |
| 4. 0000000099a3a000-0000000099abdfff: CONFIGURATION TABLES |
| 5. 0000000099abe000-0000000099b1cfff: RAMSTAGE |
| 6. 0000000099b1d000-0000000099efffff: CONFIGURATION TABLES |
| 7. 0000000099f00000-000000009f7fffff: RESERVED |
| 8. 00000000e0000000-00000000efffffff: RESERVED |
| 9. 00000000fc000000-00000000fc000fff: RESERVED |
| 10. 00000000fe000000-00000000fe00ffff: RESERVED |
| 11. 00000000fed10000-00000000fed17fff: RESERVED |
| 12. 00000000fed40000-00000000fed44fff: RESERVED |
| 13. 00000000fed80000-00000000fed83fff: RESERVED |
| 14. 00000000fed90000-00000000fed91fff: RESERVED |
| 15. 00000000feda0000-00000000feda1fff: RESERVED |
| 16. 0000000100000000-000000085e7fffff: RAM |
| Setting up bootsplash in 1920x1080@32 |
| CBFS: Found 'bootsplash.jpg' @0x5c400 size 0xc2d1 in mcache @0x99b2d1c8 |
| FMAP: area COREBOOT found @ 650200 (10157568 bytes) |
| TPM: Extending digest for FMAP: COREBOOT CBFS: bootsplash.jpg into PCR 2 |
| tlcl_extend: response is 0 |
| TPM: Digest of FMAP: COREBOOT CBFS: bootsplash.jpg to PCR 2 measured |
| Bootsplash image resolution: 1920x1080 |
| Bootsplash could not be decoded. jpeg_decode returned 3. |
| SF: Detected 00 0000 with sector size 0x1000, total 0x1000000 |
| Wrote coreboot table at: 0x99a6f000, 0x76c bytes, checksum 2126 |
| coreboot table: 1924 bytes. |
| IMD ROOT 0. 0x99eff000 0x00001000 |
| IMD SMALL 1. 0x99efe000 0x00001000 |
| FSP MEMORY 2. 0x99b4e000 0x003b0000 |
| CONSOLE 3. 0x99b2e000 0x00020000 |
| RO MCACHE 4. 0x99b2d000 0x000003d0 |
| TIME STAMP 5. 0x99b2c000 0x00000910 |
| TCPA LOG 6. 0x99b2a000 0x000019cc |
| ROMSTG STCK 7. 0x99b29000 0x00001000 |
| AFTER CAR 8. 0x99b1d000 0x0000c000 |
| RAMSTAGE 9. 0x99abd000 0x00060000 |
| REFCODE 10. 0x99a89000 0x00034000 |
| SMM BACKUP 11. 0x99a79000 0x00010000 |
| 4f444749 12. 0x99a77000 0x00002000 |
| COREBOOT 13. 0x99a6f000 0x00008000 |
| ACPI 14. 0x99a4b000 0x00024000 |
| TPM2 TCGLOG15. 0x99a3b000 0x00010000 |
| SMBIOS 16. 0x99a3a000 0x00000800 |
| IMD small region: |
| IMD ROOT 0. 0x99efec00 0x00000400 |
| FSP RUNTIME 1. 0x99efebe0 0x00000004 |
| FMAP 2. 0x99efeac0 0x0000010a |
| POWER STATE 3. 0x99efea80 0x00000040 |
| ROMSTAGE 4. 0x99efea60 0x00000004 |
| MEM INFO 5. 0x99efe880 0x000001e0 |
| ACPI GNVS 6. 0x99efe820 0x00000048 |
| BS: BS_WRITE_TABLES run times (exec / console): 16 / 0 ms |
| MTRR: Physical address space: |
| 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 |
| 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 |
| 0x00000000000c0000 - 0x0000000099f00000 size 0x99e40000 type 6 |
| 0x0000000099f00000 - 0x00000000a0000000 size 0x06100000 type 0 |
| 0x00000000a0000000 - 0x00000000b0000000 size 0x10000000 type 1 |
| 0x00000000b0000000 - 0x0000000100000000 size 0x50000000 type 0 |
| 0x0000000100000000 - 0x000000085e800000 size 0x75e800000 type 6 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| CPU physical address size: 39 bits |
| MTRR: default type WB/UC MTRR counts: 6/10. |
| MTRR: WB selected as default type. |
| MTRR: 0 base 0x0000000099f00000 mask 0x0000007ffff00000 type 0 |
| MTRR: 1 base 0x000000009a000000 mask 0x0000007ffe000000 type 0 |
| MTRR: 2 base 0x000000009c000000 mask 0x0000007ffc000000 type 0 |
| MTRR: 3 base 0x00000000a0000000 mask 0x0000007ff0000000 type 1 |
| MTRR: 4 base 0x00000000b0000000 mask 0x0000007ff0000000 type 0 |
| MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| BS: BS_WRITE_TABLES exit times (exec / console): 1 / 0 ms |
| CBFS: Found 'fallback/payload' @0x130340 size 0x53862c in mcache @0x99b2d360 |
| FMAP: area COREBOOT found @ 650200 (10157568 bytes) |
| CPU physical address size: 39 bits |
| CPU physical address size: 39 bits |
| CPU physical address size: 39 bits |
| CPU physical address size: 39 bits |
| CPU physical address size: 39 bits |
| CPU physical address size: 39 bits |
| CPU physical address size: 39 bits |
| TPM: Extending digest for FMAP: COREBOOT CBFS: fallback/payload into PCR 2 |
| tlcl_extend: response is 0 |
| TPM: Digest of FMAP: COREBOOT CBFS: fallback/payload to PCR 2 measured |
| Checking segment from ROM address 0xff78056c |
| Checking segment from ROM address 0xff780588 |
| Checking segment from ROM address 0xff7805a4 |
| Checking segment from ROM address 0xff7805c0 |
| Checking segment from ROM address 0xff7805dc |
| Loading segment from ROM address 0xff78056c |
| data (compression=0) |
| New segment dstaddr 0x00090000 memsize 0x1080 srcaddr 0xff7805f8 filesize 0x1080 |
| Loading Segment: addr: 0x00090000 memsz: 0x0000000000001080 filesz: 0x0000000000001080 |
| it's not compressed! |
| Loading segment from ROM address 0xff780588 |
| code (compression=0) |
| New segment dstaddr 0x01000000 memsize 0x250a20 srcaddr 0xff781678 filesize 0x250a20 |
| Loading Segment: addr: 0x01000000 memsz: 0x0000000000250a20 filesz: 0x0000000000250a20 |
| it's not compressed! |
| Loading segment from ROM address 0xff7805a4 |
| code (compression=0) |
| New segment dstaddr 0x00040000 memsize 0xd4 srcaddr 0xff9d2098 filesize 0xd4 |
| Loading Segment: addr: 0x00040000 memsz: 0x00000000000000d4 filesz: 0x00000000000000d4 |
| it's not compressed! |
| Loading segment from ROM address 0xff7805c0 |
| data (compression=0) |
| New segment dstaddr 0x04000000 memsize 0x2e6a2c srcaddr 0xff9d216c filesize 0x2e6a2c |
| Loading Segment: addr: 0x04000000 memsz: 0x00000000002e6a2c filesz: 0x00000000002e6a2c |
| it's not compressed! |
| Loading segment from ROM address 0xff7805dc |
| Entry Point 0x00040000 |
| BS: BS_PAYLOAD_LOAD run times (exec / console): 3620 / 0 ms |
| Finalizing chipset. |
| apm_control: Finalizing SMM. |
| APMC done. |
| BS: BS_PAYLOAD_LOAD exit times (exec / console): 4 / 0 ms |
| coreboot TCPA measurements: |
| |
| PCR-2 0f5a3c7890d93c797c73042205984351199a8064e8e985a5b551a1e78939299e SHA256 [FMAP: FMAP] |
| PCR-2 c291a598d0453d3fa5a45d2241d76a81c0826d6e5a9299e5da52785078c73c9d SHA256 [FMAP: COREBOOT CBFS: bootblock] |
| PCR-2 6f662f79fff2bc42c6c283f717772448a778ae8b9b34eb864e26e2e9b70bdd93 SHA256 [FMAP: COREBOOT CBFS: cmos.default] |
| PCR-2 d57e8a29104f15f1087d1d0858d91d0866ee89d4a5e785bb7b785192c66207d4 SHA256 [FMAP: COREBOOT CBFS: fallback/romstage] |
| PCR-2 0a2d102a5cab92ac378b80856811c0569da20a1708560aba938926cc44f21416 SHA256 [FMAP: COREBOOT CBFS: cmos_layout.bin] |
| PCR-2 0a083bfc5589d3e7304848b2132134fb9fb385bbcf10fa9df5e646701f7ad9a3 SHA256 [FMAP: COREBOOT CBFS: fspm.bin] |
| PCR-2 1ccc0cc7fe8e3f590d2fe6d1f0ca622df3baca068ec8528ebb3ecda38435d85e SHA256 [FMAP: COREBOOT CBFS: fallback/postcar] |
| PCR-2 07d84b724c7aa8834615b0f60e003c13dde528b3349605c3a6fc7bc5d42b2486 SHA256 [FMAP: COREBOOT CBFS: fallback/ramstage] |
| PCR-2 57c0c4da1f71de4a9135461f082ecd0b60a1eb62fbfe5a59627c009f2b633625 SHA256 [FMAP: COREBOOT CBFS: cpu_microcode_blob.bin] |
| PCR-2 5748885bffbf7b859e4d2b251751b88b9be953cffae99d1c2c1fbd77df86797b SHA256 [FMAP: COREBOOT CBFS: fsps.bin] |
| PCR-2 a45fceed6d7abeb8115604cd5511c6273109d78af22b807a2994a244b2a50499 SHA256 [FMAP: COREBOOT CBFS: vbt.bin] |
| PCR-2 8ed558edb4859346fc69b7db399fd58c1dbe63b2b8c5ed53932ff6617fba459f SHA256 [FMAP: COREBOOT CBFS: fallback/dsdt.aml] |
| PCR-2 0a2d102a5cab92ac378b80856811c0569da20a1708560aba938926cc44f21416 SHA256 [FMAP: COREBOOT CBFS: cmos_layout.bin] |
| PCR-2 a5dcb646f2b63c7e4a986aa7ee85704e7c98d26f6f237d18da6befdecd3e68fc SHA256 [FMAP: COREBOOT CBFS: bootsplash.jpg] |
| PCR-2 f30a7a27226562b38e190cfe4c87e1dbce720ea370a0b73bd51f14306b8b0385 SHA256 [FMAP: COREBOOT CBFS: fallback/payload] |
| |
| BS: BS_PAYLOAD_BOOT entry times (exec / console): 1 / 0 ms |
| mp_park_aps done after 0 msecs. |
| Jumping to boot code at 0x00040000(0x99a6f000) |