blob: eb4af3cb2347b71c343b6d044af009611a0f18ab [file] [log] [blame]
coreboot-4.0-5803-gb1ccccc Son Apr 20 19:05:31 CEST 2014 starting...
PM1_CNT: 00001c00
SMBus controller enabled.
Intel ME early init
Intel ME firmware is ready
ME: Requested 32MB UMA
SMBus controller enabled.
find_current_mrc_cache_local: No valid MRC cache found.
Timings:
channel 0, slot 0, rank 0
lane 0: 20 (20) 9c (a7) 5f (5f) 78 (78)
lane 1: 20 (20) 8d (98) 59 (59) 72 (72)
lane 2: 20 (20) a8 (b3) 6d (6d) 89 (89)
lane 3: 20 (20) 7b (86) 49 (49) 64 (64)
lane 4: 20 (20) e3 (ee) ab (ab) c6 (c6)
lane 5: 20 (20) c2 (cd) 7f (7f) 97 (97)
lane 6: 20 (20) d5 (e0) 96 (96) b1 (b1)
lane 7: 20 (20) d2 (dd) 8a (8a) a4 (a4)
lane 8: 15 (20) 100 (10b) 7e (7e) 7e (7e)
channel 0, slot 0, rank 1
lane 0: 20 (20) 95 (a0) 5a (5a) 74 (74)
lane 1: 20 (20) 8a (95) 53 (53) 6e (6e)
lane 2: 20 (20) a2 (ad) 6a (6a) 84 (84)
lane 3: 20 (20) 7b (86) 44 (44) 61 (61)
lane 4: 20 (20) dd (e8) aa (aa) c5 (c5)
lane 5: 20 (20) bc (c7) 7a (7a) 94 (94)
lane 6: 20 (20) d1 (dc) 94 (94) b0 (b0)
lane 7: 20 (20) cd (d8) 88 (88) a1 (a1)
lane 8: 15 (20) 100 (10b) 7e (7e) 7e (7e)
channel 1, slot 0, rank 0
lane 0: 20 (20) b4 (bf) 5d (5d) 77 (77)
lane 1: 20 (20) a3 (ae) 56 (56) 70 (70)
lane 2: 20 (20) b8 (c3) 6d (6d) 86 (86)
lane 3: 20 (20) 8d (98) 47 (47) 62 (62)
lane 4: 20 (20) f5 (100) ac (ac) c7 (c7)
lane 5: 20 (20) d9 (e4) 7e (7e) 9a (9a)
lane 6: 20 (20) ea (f5) 94 (94) b0 (b0)
lane 7: 20 (20) e7 (f2) 88 (88) a0 (a0)
lane 8: 15 (20) 100 (10b) 7e (7e) 7e (7e)
channel 1, slot 0, rank 1
lane 0: 20 (20) b4 (bf) 5c (5c) 76 (76)
lane 1: 20 (20) a2 (ad) 58 (58) 71 (71)
lane 2: 20 (20) b5 (c0) 6e (6e) 87 (87)
lane 3: 20 (20) 8c (97) 49 (49) 64 (64)
lane 4: 20 (20) f8 (103) ac (ac) c7 (c7)
lane 5: 20 (20) d4 (df) 7d (7d) 99 (99)
lane 6: 20 (20) e9 (f4) 94 (94) af (af)
lane 7: 20 (20) e5 (f0) 87 (87) a1 (a1)
lane 8: 15 (20) 100 (10b) 7e (7e) 7e (7e)
[178] = 38 (0)
[10b] = 0 (0)
Timings:
channel 0, slot 0, rank 0
lane 0: 20 (20) a7 (a7) 5f (5f) 78 (78)
lane 1: 20 (20) 98 (98) 59 (59) 72 (72)
lane 2: 20 (20) b3 (b3) 6d (6d) 89 (89)
lane 3: 20 (20) 86 (86) 49 (49) 64 (64)
lane 4: 20 (20) ee (ee) ab (ab) c6 (c6)
lane 5: 20 (20) cd (cd) 7f (7f) 97 (97)
lane 6: 20 (20) e0 (e0) 96 (96) b1 (b1)
lane 7: 20 (20) dd (dd) 8a (8a) a4 (a4)
lane 8: 15 (20) 100 (10b) 7e (7e) 7e (7e)
channel 0, slot 0, rank 1
lane 0: 20 (20) a0 (a0) 5a (5a) 74 (74)
lane 1: 20 (20) 95 (95) 53 (53) 6e (6e)
lane 2: 20 (20) ad (ad) 6a (6a) 84 (84)
lane 3: 20 (20) 86 (86) 44 (44) 61 (61)
lane 4: 20 (20) e8 (e8) aa (aa) c5 (c5)
lane 5: 20 (20) c7 (c7) 7a (7a) 94 (94)
lane 6: 20 (20) dc (dc) 94 (94) b0 (b0)
lane 7: 20 (20) d8 (d8) 88 (88) a1 (a1)
lane 8: 15 (20) 100 (10b) 7e (7e) 7e (7e)
channel 1, slot 0, rank 0
lane 0: 20 (20) bf (bf) 5d (5d) 77 (77)
lane 1: 20 (20) ae (ae) 56 (56) 70 (70)
lane 2: 20 (20) c3 (c3) 6d (6d) 86 (86)
lane 3: 20 (20) 98 (98) 47 (47) 62 (62)
lane 4: 20 (20) 1
*** Log truncated, 62613 characters dropped. ***
Adding CBMEM entry as no. 3
Relocate MRC DATA from ff7ff148 to bf6e0400 (1472 bytes)
ME: FW Partition Table : OK
ME: Bringup Loader Failure : NO
ME: Firmware Init Complete : NO
ME: Manufacturing Mode : NO
ME: Boot Options Present : NO
ME: Update In Progress : NO
ME: Current Working State : Normal
ME: Current Operation State : Bring up
ME: Current Operation Mode : Normal
ME: Error Code : No Error
ME: Progress Phase : BUP Phase
ME: Power Management Event : Clean Moff->Mx wake
ME: Progress Phase State : 0x41
Adding CBMEM entry as no. 4
Trying CBFS ramstage loader.
CBFS: loading stage fallback/coreboot_ram @ 0x100000 (430136 bytes), entry @ 0x100000
coreboot-4.0-5803-gb1ccccc Son Apr 20 19:05:31 CEST 2014 booting...
clocks_per_usec: 2128
Enumerating buses...
Show all devs...Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 1
PCI: 00:1d.0: enabled 1
PCI: 00:1f.0: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
Compare with tree...
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 1
PCI: 00:1d.0: enabled 1
PCI: 00:1f.0: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
starting SPI configuration
SPI configured
.. ... pmbase = 0x0500
Keyboard init...
scan_static_bus for Root Device
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/0044] ops
Normal boot.
PCI: 00:00.0 [8086/0044] enabled
Capability: type 0x0d @ 0x88
Capability: type 0x01 @ 0x80
Capability: type 0x05 @ 0x90
Capability: type 0x10 @ 0xa0
Capability: type 0x0d @ 0x88
Capability: type 0x01 @ 0x80
Capability: type 0x05 @ 0x90
Capability: type 0x10 @ 0xa0
PCI: 00:01.0 subordinate bus PCI Express
PCI: 00:01.0 [8086/0045] enabled
PCI: 00:02.0 [8086/0000] ops
PCI: 00:02.0 [8086/0046] enabled
PCI: 00:16.0 [8086/0000] bus ops
PCI: 00:16.0 [8086/3b64] enabled
PCI: 00:1a.0 [8086/0000] ops
PCI: 00:1a.0 [8086/3b3c] enabled
PCI: 00:1b.0 [8086/0000] ops
PCI: 00:1b.0 [8086/3b56] enabled
Capability: type 0x10 @ 0x40
Capability: type 0x05 @ 0x80
Capability: type 0x0d @ 0x90
Capability: type 0x01 @ 0xa0
Capability: type 0x10 @ 0x40
PCI: 00:1c.0 subordinate bus PCI Express
PCI: 00:1c.0 [8086/3b42] enabled
Capability: type 0x10 @ 0x40
Capability: type 0x05 @ 0x80
Capability: type 0x0d @ 0x90
Capability: type 0x01 @ 0xa0
Capability: type 0x10 @ 0x40
PCI: 00:1c.1 subordinate bus PCI Express
PCI: 00:1c.1 [8086/3b44] enabled
PCI: 00:1d.0 [8086/0000] ops
PCI: 00:1d.0 [8086/3b34] enabled
PCI: 00:1e.0 [8086/2448] bus ops
PCI: 00:1e.0 [8086/2448] enabled
PCI: 00:1f.0 [8086/0000] bus ops
PCI: 00:1f.0 [8086/3b09] enabled
PCI: 00:1f.2 [8086/0000] ops
PCI: 00:1f.2 [8086/3b28] enabled
PCI: 00:1f.3 [8086/0000] bus ops
PCI: 00:1f.3 [8086/3b30] enabled
PCI: 00:1f.6 [8086/0000] ops
PCI: 00:1f.6 [8086/3b32] enabled
do_pci_scan_bridge for PCI: 00:01.0
PCI: pci_scan_bus for bus 01
PCI: pci_scan_bus returning with max=001
do_pci_scan_bridge returns max 1
scan_static_bus for PCI: 00:16.0
scan_static_bus for PCI: 00:16.0 done
do_pci_scan_bridge for PCI: 00:1c.0
PCI: pci_scan_bus for bus 02
PCI: 02:00.0 [14e4/1692] enabled
PCI: pci_scan_bus returning with max=002
Capability: type 0x01 @ 0x48
Capability: type 0x09 @ 0x60
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0xcc
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
do_pci_scan_bridge returns max 2
do_pci_scan_bridge for PCI: 00:1c.1
PCI: pci_scan_bus for bus 03
PCI: 03:00.0 [168c/002e] enabled
PCI: pci_scan_bus returning with max=003
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x60
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
do_pci_scan_bridge returns max 3
do_pci_scan_bridge for PCI: 00:1e.0
PCI: pci_scan_bus for bus 04
PCI: pci_scan_bus returning with max=004
do_pci_scan_bridge returns max 4
scan_static_bus for PCI: 00:1f.0
scan_static_bus for PCI: 00:1f.0 done
scan_static_bus for PCI: 00:1f.3
scan_static_bus for PCI: 00:1f.3 done
PCI: pci_scan_bus returning with max=004
scan_static_bus for Root Device done
done
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
APIC: 00 missing read_resources
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0
ram_before_4g_top: 0xbf800000
TOUUD: 0x1340
CBMEM region bf6d0000-bf7fffff (cbmem_late_set_table)
PCI: 00:01.0 read_resources bus 1 link: 0
PCI: 00:01.0 read_resources bus 1 link: 0 done
PCI: 00:1c.0 read_resources bus 2 link: 0
PCI: 00:1c.0 read_resources bus 2 link: 0 done
PCI: 00:1c.1 read_resources bus 3 link: 0
PCI: 00:1c.1 read_resources bus 3 link: 0 done
PCI: 00:1e.0 read_resources bus 4 link: 0
PCI: 00:1e.0 read_resources bus 4 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
DOMAIN: 0000 child on link 0 PCI: 00:00.0
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
PCI: 00:00.0
PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
PCI: 00:00.0 resource base c0000 size bf740000 align 0 gran 0 limit 0 flags e0004200 index 4
PCI: 00:00.0 resource base bf800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 5
PCI: 00:00.0 resource base c1c00000 size 400000 align 0 gran 0 limit 0 flags f0000200 index 6
PCI: 00:00.0 resource base c2000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 7
PCI: 00:00.0 resource base 100000000 size 34000000 align 0 gran 0 limit 0 flags e0004200 index 8
PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index a
PCI: 00:00.0 resource base fed00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index b
PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index c
PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index d
PCI: 00:01.0
PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 00:02.0
PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10
PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit ffffffffffffffff flags d0001201 index 18
PCI: 00:02.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 20
PCI: 00:16.0
PCI: 00:16.0 resource base 0 size 10 align 4 gran 4 limit ffffffffffffffff flags 201 index 10
PCI: 00:1a.0
PCI: 00:1a.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 10
PCI: 00:1b.0
PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
PCI: 00:1c.0 child on link 0 PCI: 02:00.0
PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 02:00.0
PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
PCI: 00:1c.1 child on link 0 PCI: 03:00.0
PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 03:00.0
PCI: 03:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
PCI: 00:1d.0
PCI: 00:1d.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 10
PCI: 00:1e.0
PCI: 00:1e.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 00:1f.0
PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PCI: 00:1f.2
PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
PCI: 00:1f.2 resource base 0 size 800 align 11 gran 11 limit ffffffff flags 200 index 24
PCI: 00:1f.3
PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
PCI: 00:1f.3 resource base 0 size 100 align 8 gran 8 limit ffffffffffffffff flags 201 index 10
PCI: 00:1f.6
PCI: 00:1f.6 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1e.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1e.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1f.2 20 * [0x0 - 0x1f] io
PCI: 00:02.0 20 * [0x20 - 0x27] io
PCI: 00:1f.2 10 * [0x28 - 0x2f] io
PCI: 00:1f.2 18 * [0x30 - 0x37] io
PCI: 00:1f.2 14 * [0x38 - 0x3b] io
PCI: 00:1f.2 1c * [0x3c - 0x3f] io
DOMAIN: 0000 compute_resources_io: base: 40 size: 40 align: 5 gran: 0 limit: ffff done
DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:01.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:01.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:01.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:01.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:00.0 10 * [0x0 - 0xffff] mem
PCI: 00:1c.0 compute_resources_mem: base: 10000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 03:00.0 10 * [0x0 - 0xffff] mem
PCI: 00:1c.1 compute_resources_mem: base: 10000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1e.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1e.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1e.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:1e.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:02.0 10 * [0x0 - 0x3fffff] mem
PCI: 00:1c.0 20 * [0x400000 - 0x4fffff] mem
PCI: 00:1c.1 20 * [0x500000 - 0x5fffff] mem
PCI: 00:1b.0 10 * [0x600000 - 0x603fff] mem
PCI: 00:1f.6 10 * [0x604000 - 0x604fff] mem
PCI: 00:1f.2 24 * [0x605000 - 0x6057ff] mem
PCI: 00:1a.0 10 * [0x605800 - 0x605bff] mem
PCI: 00:1d.0 10 * [0x605c00 - 0x605fff] mem
PCI: 00:1f.3 10 * [0x606000 - 0x6060ff] mem
PCI: 00:16.0 10 * [0x606100 - 0x60610f] mem
DOMAIN: 0000 compute_resources_mem: base: 606110 size: 606110 align: 22 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: DOMAIN: 0000
constrain_resources: PCI: 00:00.0
constrain_resources: PCI: 00:01.0
constrain_resources: PCI: 00:02.0
constrain_resources: PCI: 00:16.0
constrain_resources: PCI: 00:1a.0
constrain_resources: PCI: 00:1b.0
constrain_resources: PCI: 00:1c.0
constrain_resources: PCI: 02:00.0
constrain_resources: PCI: 00:1c.1
constrain_resources: PCI: 03:00.0
constrain_resources: PCI: 00:1d.0
constrain_resources: PCI: 00:1e.0
constrain_resources: PCI: 00:1f.0
constrain_resources: PCI: 00:1f.2
constrain_resources: PCI: 00:1f.3
constrain_resources: PCI: 00:1f.6
avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 0000ffff
lim->base 00001000 lim->limit 0000ffff
avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff
lim->base c4000000 lim->limit cfffffff
Setting resources...
DOMAIN: 0000 allocate_resources_io: base:1000 size:40 align:5 gran:0 limit:ffff
Assigned: PCI: 00:1f.2 20 * [0x1000 - 0x101f] io
Assigned: PCI: 00:02.0 20 * [0x1020 - 0x1027] io
Assigned: PCI: 00:1f.2 10 * [0x1028 - 0x102f] io
Assigned: PCI: 00:1f.2 18 * [0x1030 - 0x1037] io
Assigned: PCI: 00:1f.2 14 * [0x1038 - 0x103b] io
Assigned: PCI: 00:1f.2 1c * [0x103c - 0x103f] io
DOMAIN: 0000 allocate_resources_io: next_base: 1040 size: 40 align: 5 gran: 0 done
PCI: 00:01.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:01.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:1c.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:1c.1 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.1 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:1e.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1e.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
DOMAIN: 0000 allocate_resources_mem: base:cf800000 size:606110 align:22 gran:0 limit:cfffffff
Assigned: PCI: 00:02.0 10 * [0xcf800000 - 0xcfbfffff] mem
Assigned: PCI: 00:1c.0 20 * [0xcfc00000 - 0xcfcfffff] mem
Assigned: PCI: 00:1c.1 20 * [0xcfd00000 - 0xcfdfffff] mem
Assigned: PCI: 00:1b.0 10 * [0xcfe00000 - 0xcfe03fff] mem
Assigned: PCI: 00:1f.6 10 * [0xcfe04000 - 0xcfe04fff] mem
Assigned: PCI: 00:1f.2 24 * [0xcfe05000 - 0xcfe057ff] mem
Assigned: PCI: 00:1a.0 10 * [0xcfe05800 - 0xcfe05bff] mem
Assigned: PCI: 00:1d.0 10 * [0xcfe05c00 - 0xcfe05fff] mem
Assigned: PCI: 00:1f.3 10 * [0xcfe06000 - 0xcfe060ff] mem
Assigned: PCI: 00:16.0 10 * [0xcfe06100 - 0xcfe0610f] mem
DOMAIN: 0000 allocate_resources_mem: next_base: cfe06110 size: 606110 align: 22 gran: 0 done
PCI: 00:01.0 allocate_resources_prefmem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff
PCI: 00:01.0 allocate_resources_prefmem: next_base: cfffffff size: 0 align: 20 gran: 20 done
PCI: 00:01.0 allocate_resources_mem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff
PCI: 00:01.0 allocate_resources_mem: next_base: cfffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.0 allocate_resources_prefmem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff
PCI: 00:1c.0 allocate_resources_prefmem: next_base: cfffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.0 allocate_resources_mem: base:cfc00000 size:100000 align:20 gran:20 limit:cfffffff
Assigned: PCI: 02:00.0 10 * [0xcfc00000 - 0xcfc0ffff] mem
PCI: 00:1c.0 allocate_resources_mem: next_base: cfc10000 size: 100000 align: 20 gran: 20 done
PCI: 00:1c.1 allocate_resources_prefmem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff
PCI: 00:1c.1 allocate_resources_prefmem: next_base: cfffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.1 allocate_resources_mem: base:cfd00000 size:100000 align:20 gran:20 limit:cfffffff
Assigned: PCI: 03:00.0 10 * [0xcfd00000 - 0xcfd0ffff] mem
PCI: 00:1c.1 allocate_resources_mem: next_base: cfd10000 size: 100000 align: 20 gran: 20 done
PCI: 00:1e.0 allocate_resources_prefmem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff
PCI: 00:1e.0 allocate_resources_prefmem: next_base: cfffffff size: 0 align: 20 gran: 20 done
PCI: 00:1e.0 allocate_resources_mem: base:cfffffff size:0 align:20 gran:20 limit:cfffffff
PCI: 00:1e.0 allocate_resources_mem: next_base: cfffffff size: 0 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:01.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:01.0 24 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:01.0 20 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 01 mem
PCI: 00:02.0 10 <- [0x00cf800000 - 0x00cfbfffff] size 0x00400000 gran 0x16 mem64
PCI: 00:02.0 20 <- [0x0000001020 - 0x0000001027] size 0x00000008 gran 0x03 io
PCI: 00:16.0 10 <- [0x00cfe06100 - 0x00cfe0610f] size 0x00000010 gran 0x04 mem64
PCI: 00:1a.0 10 <- [0x00cfe05800 - 0x00cfe05bff] size 0x00000400 gran 0x0a mem
PCI: 00:1b.0 10 <- [0x00cfe00000 - 0x00cfe03fff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:1c.0 24 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:1c.0 20 <- [0x00cfc00000 - 0x00cfcfffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 00:1c.0 assign_resources, bus 2 link: 0
PCI: 02:00.0 10 <- [0x00cfc00000 - 0x00cfc0ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:1c.0 assign_resources, bus 2 link: 0
PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io
PCI: 00:1c.1 24 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 03 prefmem
PCI: 00:1c.1 20 <- [0x00cfd00000 - 0x00cfdfffff] size 0x00100000 gran 0x14 bus 03 mem
PCI: 00:1c.1 assign_resources, bus 3 link: 0
PCI: 03:00.0 10 <- [0x00cfd00000 - 0x00cfd0ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:1c.1 assign_resources, bus 3 link: 0
PCI: 00:1d.0 10 <- [0x00cfe05c00 - 0x00cfe05fff] size 0x00000400 gran 0x0a mem
PCI: 00:1e.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io
PCI: 00:1e.0 24 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 04 prefmem
PCI: 00:1e.0 20 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 04 mem
PCI: 00:1f.2 10 <- [0x0000001028 - 0x000000102f] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 14 <- [0x0000001038 - 0x000000103b] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 18 <- [0x0000001030 - 0x0000001037] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 1c <- [0x000000103c - 0x000000103f] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 20 <- [0x0000001000 - 0x000000101f] size 0x00000020 gran 0x05 io
PCI: 00:1f.2 24 <- [0x00cfe05000 - 0x00cfe057ff] size 0x00000800 gran 0x0b mem
PCI: 00:1f.3 10 <- [0x00cfe06000 - 0x00cfe060ff] size 0x00000100 gran 0x08 mem64
PCI: 00:1f.6 10 <- [0x00cfe04000 - 0x00cfe04fff] size 0x00001000 gran 0x0c mem64
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
DOMAIN: 0000 child on link 0 PCI: 00:00.0
DOMAIN: 0000 resource base 1000 size 40 align 5 gran 0 limit ffff flags 40040100 index 10000000
DOMAIN: 0000 resource base cf800000 size 606110 align 22 gran 0 limit cfffffff flags 40040200 index 10000100
PCI: 00:00.0
PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
PCI: 00:00.0 resource base c0000 size bf740000 align 0 gran 0 limit 0 flags e0004200 index 4
PCI: 00:00.0 resource base bf800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 5
PCI: 00:00.0 resource base c1c00000 size 400000 align 0 gran 0 limit 0 flags f0000200 index 6
PCI: 00:00.0 resource base c2000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 7
PCI: 00:00.0 resource base 100000000 size 34000000 align 0 gran 0 limit 0 flags e0004200 index 8
PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index a
PCI: 00:00.0 resource base fed00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index b
PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index c
PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index d
PCI: 00:01.0
PCI: 00:01.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
PCI: 00:01.0 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60081202 index 24
PCI: 00:01.0 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60080202 index 20
PCI: 00:02.0
PCI: 00:02.0 resource base cf800000 size 400000 align 22 gran 22 limit cfffffff flags 60000201 index 10
PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit ffffffffffffffff flags d0001201 index 18
PCI: 00:02.0 resource base 1020 size 8 align 3 gran 3 limit ffff flags 60000100 index 20
PCI: 00:16.0
PCI: 00:16.0 resource base cfe06100 size 10 align 4 gran 4 limit cfffffff flags 60000201 index 10
PCI: 00:1a.0
PCI: 00:1a.0 resource base cfe05800 size 400 align 10 gran 10 limit cfffffff flags 60000200 index 10
PCI: 00:1b.0
PCI: 00:1b.0 resource base cfe00000 size 4000 align 14 gran 14 limit cfffffff flags 60000201 index 10
PCI: 00:1c.0 child on link 0 PCI: 02:00.0
PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
PCI: 00:1c.0 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60081202 index 24
PCI: 00:1c.0 resource base cfc00000 size 100000 align 20 gran 20 limit cfffffff flags 60080202 index 20
PCI: 02:00.0
PCI: 02:00.0 resource base cfc00000 size 10000 align 16 gran 16 limit cfffffff flags 60000201 index 10
PCI: 00:1c.1 child on link 0 PCI: 03:00.0
PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
PCI: 00:1c.1 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60081202 index 24
PCI: 00:1c.1 resource base cfd00000 size 100000 align 20 gran 20 limit cfffffff flags 60080202 index 20
PCI: 03:00.0
PCI: 03:00.0 resource base cfd00000 size 10000 align 16 gran 16 limit cfffffff flags 60000201 index 10
PCI: 00:1d.0
PCI: 00:1d.0 resource base cfe05c00 size 400 align 10 gran 10 limit cfffffff flags 60000200 index 10
PCI: 00:1e.0
PCI: 00:1e.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
PCI: 00:1e.0 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60081202 index 24
PCI: 00:1e.0 resource base cfffffff size 0 align 20 gran 20 limit cfffffff flags 60080202 index 20
PCI: 00:1f.0
PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PCI: 00:1f.2
PCI: 00:1f.2 resource base 1028 size 8 align 3 gran 3 limit ffff flags 60000100 index 10
PCI: 00:1f.2 resource base 1038 size 4 align 2 gran 2 limit ffff flags 60000100 index 14
PCI: 00:1f.2 resource base 1030 size 8 align 3 gran 3 limit ffff flags 60000100 index 18
PCI: 00:1f.2 resource base 103c size 4 align 2 gran 2 limit ffff flags 60000100 index 1c
PCI: 00:1f.2 resource base 1000 size 20 align 5 gran 5 limit ffff flags 60000100 index 20
PCI: 00:1f.2 resource base cfe05000 size 800 align 11 gran 11 limit cfffffff flags 60000200 index 24
PCI: 00:1f.3
PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
PCI: 00:1f.3 resource base cfe06000 size 100 align 8 gran 8 limit cfffffff flags 60000201 index 10
PCI: 00:1f.6
PCI: 00:1f.6 resource base cfe04000 size 1000 align 12 gran 12 limit cfffffff flags 60000201 index 10
Done allocating resources.
Enabling resources...
PCI: 00:00.0 subsystem <- 1025/0379
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 bridge ctrl <- 0003
PCI: 00:01.0 cmd <- 00
PCI: 00:02.0 subsystem <- 1025/0379
PCI: 00:02.0 cmd <- 03
PCI: 00:16.0 cmd <- 02
PCI: 00:1a.0 subsystem <- 1025/0379
PCI: 00:1a.0 cmd <- 02
PCI: 00:1b.0 subsystem <- 1025/0379
PCI: 00:1b.0 cmd <- 02
PCI: 00:1c.0 bridge ctrl <- 0003
PCI: 00:1c.0 cmd <- 06
PCI: 00:1c.1 bridge ctrl <- 0003
PCI: 00:1c.1 cmd <- 06
PCI: 00:1d.0 subsystem <- 1025/0379
PCI: 00:1d.0 cmd <- 02
PCI: 00:1e.0 bridge ctrl <- 0003
PCI: 00:1e.0 cmd <- 00 (NOT WRITTEN!)
pch_decode_init
PCI: 00:1f.0 subsystem <- 1025/0379
PCI: 00:1f.0 cmd <- 107
PCI: 00:1f.2 subsystem <- 1025/0379
PCI: 00:1f.2 cmd <- 03
PCI: 00:1f.3 subsystem <- 1025/0379
PCI: 00:1f.3 cmd <- 03
PCI: 00:1f.6 cmd <- 02
PCI: 02:00.0 cmd <- 02
PCI: 03:00.0 cmd <- 02
done.
Initializing devices...
Root Device init
CPU_CLUSTER: 0 init
start_eip=0x00001000, code_size=0x00000031
Installing SMM handler to 0xbf800000
Installing IED header to 0xbfc00000
Initializing SMM handler... ... pmbase = 0x0500
SMI_STS: MCSMI PM1
PM1_STS: WAK BM TMROF
GPE0_STS: GPIO15 GPIO10 GPIO9 GPIO7 GPIO6
ALT_GP_SMI_STS: GPI15 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0
TCO_STS:
... raise SMI#
Initializing CPU #0
CPU: vendor Intel device 20655
CPU: family 06, model 25, stepping 05
Enabling cache
microcode: sig=0x20655 pf=0x10 revision=0x3
CPU: Intel(R) Pentium(R) CPU P6200 @ 2.13GHz.
CPU:lapic=0, boot_cpu=1
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x00000000bf800000 size 0xbf740000 type 6
0x00000000bf800000 - 0x00000000d0000000 size 0x10800000 type 0
0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1
0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0
0x0000000100000000 - 0x0000000134000000 size 0x34000000 type 6
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
MTRR: default type WB/UC MTRR counts: 4/5.
MTRR: WB selected as default type.
MTRR: 0 base 0x00000000bf800000 mask 0x0000000fff800000 type 0
MTRR: 1 base 0x00000000c0000000 mask 0x0000000ff0000000 type 0
MTRR: 2 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1
MTRR: 3 base 0x00000000e0000000 mask 0x0000000fe0000000 type 0
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local apic... apic_id: 0x00 done.
model_x06ax: frequency set to 2128
Turbo is unavailable
CPU: 0 has 2 cores, 1 threads per core
CPU: 0 has core 4
CPU1: stack_base 00163000, stack_end 00163ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 4.
After apic_write.
Initializing CPU #1
Startup point 1.
Waiting for send to finish...
+CPU: vendor Intel device 20655
Sending STARTUP #2 to 4.
After apic_write.
CPU: family 06, model 25, stepping 05
Startup point 1.
Waiting for send to finish...
+Enabling cache
After Startup.
CPU #0 initialized
Waiting for 1 CPUS to stop
microcode: sig=0x20655 pf=0x10 revision=0x0
microcode: updated to revision 0x3 date=2011-09-01
CPU: Intel(R) Pentium(R) CPU P6200 @ 2.13GHz.
CPU:lapic=4, boot_cpu=0
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
MTRR: 0 base 0x00000000bf800000 mask 0x0000000fff800000 type 0
MTRR: 1 base 0x00000000c0000000 mask 0x0000000ff0000000 type 0
MTRR: 2 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1
MTRR: 3 base 0x00000000e0000000 mask 0x0000000fe0000000 type 0
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local apic... apic_id: 0x04 done.
model_x06ax: frequency set to 2128
CPU #1 initialized
All AP CPUs stopped (1926 loops)
CPU1: stack: 00163000 - 00164000, lowest used address 00163cc0, stack used: 832 bytes
PCI: 00:00.0 init
Set BIOS_RESET_CPL
PCI: 00:02.0 init
GT Power Management Init
IVB GT1 Power Meter Weights
GT init timeout
Initializing VGA without OPROM. MMIO 0xcf800000
EDID:
00 ff ff ff ff ff ff 00 30 e4 89 02 00 00 00 00
00 13 01 03 80 26 15 78 0a 6c 15 9c 59 55 99 27
18 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 2f 26 40 b8 60 84 0c 30 30 30
23 00 7e d7 10 00 00 19 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 fe 00 00
00 00 4c 47 44 69 73 70 6c 61 79 0a 00 00 00 fe
00 4c 50 31 37 33 57 44 31 2d 54 4c 41 33 00 9b
Extracted contents:
header: 00 ff ff ff ff ff ff 00
serial number: 30 e4 89 02 00 00 00 00 00 13
version: 01 03
basic params: 80 26 15 78 0a
chroma info: 6c 15 9c 59 55 99 27 18 50 54
established: 00 00 00
standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
descriptor 1: 2f 26 40 b8 60 84 0c 30 30 30 23 00 7e d7 10 00 00 19
descriptor 2: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
descriptor 3: 00 00 00 fe 00 00 00 00 4c 47 44 69 73 70 6c 61 79 0a
descriptor 4: 00 00 00 fe 00 4c 50 31 37 33 57 44 31 2d 54 4c 41 33
extensions: 00
checksum: 9b
Manufacturer: LGD Model 289 Serial Number 0
Made week 0 of 2009
EDID version: 1.3
Digital display
Maximum image size: 38 cm x 21 cm
Gamma: 220%
Check DPMS levels
Supported color formats: RGB 4:4:4, YCrCb 4:2:2
First detailed timing is preferred timing
Established timings supported:
Standard timings supported:
Detailed timings
Hex of detail: 2f2640b860840c30303023007ed710000019
Did detailed timing
Detailed mode (IN HEX): Clock 97750 KHz, 17e mm x d7 mm
0640 0670 06a0 06f8 hborder 0
0384 0386 0389 0390 vborder 0
-hsync -vsync
Hex of detail: 000000000000000000000000000000000000
Manufacturer-specified data, tag 0
Hex of detail: 000000fe000000004c47446973706c61790a
ASCII string:
Hex of detail: 000000fe004c503137335744312d544c4133
ASCII string: LP173WD1
Checksum
Checksum: 0x9b (valid)
Unknown extension block
EDID block does NOT conform to EDID 1.3!
Missing name descriptor
Missing monitor ranges
Detailed block string not properly terminated
EDID block does not conform at all!
Detailed blocks filled with garbage
bringing up panel at resolution 1600 x 900
Borders 0 x 0
Blank 184 x 12
Sync 48 x 3
Front porch 48 x 2
DREF clock
Dual channel
Polarities 1, 1
Data M1=1708305, N1=8388608
Link frequency 270000 kHz
Link M1=189811, N1=524288
Pixel N=10, M1=21, M2=9, P1=2
Pixel clock 97714 kHz
waiting for panel powerup
panel powered up
GT Power Management Init (post VBIOS)
GT init timeout
PCI: 00:16.0 init
ME: FW Partition Table : OK
ME: Bringup Loader Failure : NO
ME: Firmware Init Complete : YES
ME: Manufacturing Mode : NO
ME: Boot Options Present : NO
ME: Update In Progress : NO
ME: Current Working State : Normal
ME: Current Operation State : M0 with UMA
ME: Current Operation Mode : Normal
ME: Error Code : No Error
ME: Progress Phase : Host Communication
ME: Power Management Event : Clean Moff->Mx wake
ME: Progress Phase State : Host communication established
ME: BIOS path: Normal
ME: Extend SHA-256: 76d9bd8354e59a8255f86716527869290c66238bb4242fbd9968fbec049999e0
PCI: 00:1a.0 init
EHCI: Setting up controller.. done.
PCI: 00:1b.0 init
Azalia: base = cfe00000
Azalia: V1CTL disabled.
Azalia: codec_mask = 09
Azalia: Initializing codec #3
Azalia: codec viddid: 80862804
Azalia: verb_size: 16
Azalia: verb loaded.
Azalia: Initializing codec #0
Azalia: codec viddid: 10ec0272
Azalia: verb_size: 24
Azalia: verb loaded.
PCI: 00:1d.0 init
EHCI: Setting up controller.. done.
PCI: 00:1e.0 init
PCI init.
PCI: 00:1f.0 init
pch: lpc_init
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x01
IOAPIC: Dumping registers
reg 0x0000: 0x01000000
reg 0x0001: 0x00170020
reg 0x0002: 0x00170020
Set power off after power failure.
NMI sources disabled.
Mobile 5 PM init
rtc_failed = 0x0
RTC Init
i8259_configure_irq_trigger: current interrupts are 0x0
i8259_configure_irq_trigger: try to set interrupts 0x200
Enabling BIOS updates outside of SMM... Disabling ACPI via APMC:
done.
Locking SMM.
PCI: 00:1f.2 init
SATA: Initializing...
SATA: Controller in AHCI mode.
ABAR: CFE05000
PCI: 00:1f.3 init
PCI: 00:1f.6 init
Thermal init start.
Thermal init done.
PCI: 02:00.0 init
PCI: 03:00.0 init
Devices initialized
Show all devs...After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 1
PCI: 00:1d.0: enabled 1
PCI: 00:1f.0: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:16.0: enabled 1
PCI: 00:1e.0: enabled 1
PCI: 00:1f.6: enabled 1
PCI: 02:00.0: enabled 1
PCI: 03:00.0: enabled 1
APIC: 04: enabled 1
CBMEM region bf6d0000-bf7fffff (cbmem_check_toc)
Adding CBMEM entry as no. 5
Moving GDT to bf6e0c00...ok
Finalize devices...
Devices finalized
Updating MRC cache data.
find_current_mrc_cache_local: No valid MRC cache found.
SF: Detected MX25L3205D with page size 1000, total 400000
Need to erase the MRC cache region of 65536 bytes at fffe0000
SF: Successfully erased 65536 bytes @ 0x3e0000
Finally: write MRC cache update to flash at fffe0000
Adding CBMEM entry as no. 6
ACPI: Writing ACPI tables at bf6e0e00.
ACPI: * HPET
ACPI: added table 1/32, length now 40
ACPI: * MADT
ACPI: added table 2/32, length now 44
ACPI: * MCFG
ACPI: added table 3/32, length now 48
ACPI: * FACS
ACPI: Patching up global NVS in DSDT at offset 0x01dd -> 0xbf6e4440
ACPI: * DSDT @ bf6e1150 Length 32ee
ACPI: * FADT
ACPI: added table 4/32, length now 52
ACPI: * SSDT
Found 1 CPU(s) with 2 core(s) each.
PSS: 2133MHz power 25000 control 0x10 status 0x10
PSS: 2000MHz power 23143 control 0xf status 0xf
PSS: 1866MHz power 21371 control 0xe status 0xe
PSS: 1733MHz power 19609 control 0xd status 0xd
PSS: 1600MHz power 17887 control 0xc status 0xc
PSS: 1466MHz power 16196 control 0xb status 0xb
PSS: 1333MHz power 14562 control 0xa status 0xa
PSS: 1200MHz power 12940 control 0x9 status 0x9
PSS: 1066MHz power 11387 control 0x8 status 0x8
PSS: 933MHz power 9832 control 0x7 status 0x7
PSS: 2133MHz power 25000 control 0x10 status 0x10
PSS: 2000MHz power 23143 control 0xf status 0xf
PSS: 1866MHz power 21371 control 0xe status 0xe
PSS: 1733MHz power 19609 control 0xd status 0xd
PSS: 1600MHz power 17887 control 0xc status 0xc
PSS: 1466MHz power 16196 control 0xb status 0xb
PSS: 1333MHz power 14562 control 0xa status 0xa
PSS: 1200MHz power 12940 control 0x9 status 0x9
PSS: 1066MHz power 11387 control 0x8 status 0x8
PSS: 933MHz power 9832 control 0x7 status 0x7
ACPI: added table 5/32, length now 56
current = bf6e4cb0
ACPI: done.
Laptop handling...
ACPI tables: 16048 bytes.
Adding CBMEM entry as no. 7
smbios_write_tables: bf6ec200
Root Device (Packard Bell EasyNote LM85)
CPU_CLUSTER: 0 (Intel i7 (Nehalem) integrated Northbridge)
APIC: 00 (Intel Nehalem CPU)
DOMAIN: 0000 (Intel i7 (Nehalem) integrated Northbridge)
PCI: 00:00.0 (Intel i7 (Nehalem) integrated Northbridge)
PCI: 00:02.0 (Intel i7 (Nehalem) integrated Northbridge)
PCI: 00:1a.0 (unknown)
PCI: 00:1b.0 (unknown)
PCI: 00:1c.0 (unknown)
PCI: 00:1c.1 (unknown)
PCI: 00:1d.0 (unknown)
PCI: 00:1f.0 (unknown)
PCI: 00:1f.2 (unknown)
PCI: 00:1f.3 (unknown)
PCI: 00:01.0 (unknown)
PCI: 00:16.0 (unknown)
PCI: 00:1e.0 (unknown)
PCI: 00:1f.6 (unknown)
PCI: 02:00.0 (unknown)
PCI: 03:00.0 (unknown)
APIC: 04 (unknown)
SMBIOS tables: 376 bytes.
Adding CBMEM entry as no. 8
Adding CBMEM entry as no. 9
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum 765f
Table forward entry ends at 0x00000528.
... aligned to 0x00001000
Writing coreboot table at 0xbf7eca00
rom_table_end = 0xbf7eca00
... aligned to 0xbf7f0000
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1. 0000000000001000-000000000009ffff: RAM
2. 00000000000a0000-00000000000fffff: RESERVED
3. 0000000000100000-00000000bf6cffff: RAM
4. 00000000bf6d0000-00000000bf7fffff: CONFIGURATION TABLES
5. 00000000bf800000-00000000bfffffff: RESERVED
6. 00000000c1c00000-00000000c3ffffff: RESERVED
7. 00000000d0000000-00000000efffffff: RESERVED
8. 00000000fed00000-00000000fedfffff: RESERVED
9. 0000000100000000-0000000133ffffff: RAM
Wrote coreboot table at: bf7eca00, 0x258 bytes, checksum 5712
coreboot table: 624 bytes.
FREE SPACE 0. bf7f4a00 0000b600
CAR GLOBALS 1. bf6d0200 00000200
CONSOLE 2. bf6d0400 00010000
MRC DATA 3. bf6e0400 00000600
ROMSTAGE 4. bf6e0a00 00000200
GDT 5. bf6e0c00 00000200
ACPI 6. bf6e0e00 0000b400
SMBIOS 7. bf6ec200 00000800
ACPI RESUME 8. bf6eca00 00100000
COREBOOT 9. bf7eca00 00008000
CBFS: located payload @ fff46338, 310522 bytes.
Loading segment from rom address 0xfff46338
code (compression=1)
New segment dstaddr 0x8200 memsize 0x17d08 srcaddr 0xfff4638c filesize 0x83aa
(cleaned up) New segment addr 0x8200 size 0x17d08 offset 0xfff4638c filesize 0x83aa
Loading segment from rom address 0xfff46354
code (compression=1)
New segment dstaddr 0x100000 memsize 0xdfefc srcaddr 0xfff4e736 filesize 0x438fc
(cleaned up) New segment addr 0x100000 size 0xdfefc offset 0xfff4e736 filesize 0x438fc
Loading segment from rom address 0xfff46370
Entry Point 0x00008200
Bounce Buffer at bf587000, 1347380 bytes
Loading Segment: addr: 0x0000000000008200 memsz: 0x0000000000017d08 filesz: 0x00000000000083aa
lb: [0x0000000000100000, 0x0000000000169038)
Post relocation: addr: 0x0000000000008200 memsz: 0x0000000000017d08 filesz: 0x00000000000083aa
using LZMA
[ 0x00008200, 000185d7, 0x0001ff08) <- fff4638c
Clearing Segment: addr: 0x00000000000185d7 memsz: 0x0000000000007931
dest 00008200, end 0001ff08, bouncebuffer bf587000
Loading Segment: addr: 0x0000000000100000 memsz: 0x00000000000dfefc filesz: 0x00000000000438fc
lb: [0x0000000000100000, 0x0000000000169038)
segment: [0x0000000000100000, 0x00000000001438fc, 0x00000000001dfefc)
bounce: [0x00000000bf587000, 0x00000000bf5ca8fc, 0x00000000bf666efc)
Post relocation: addr: 0x00000000bf587000 memsz: 0x00000000000dfefc filesz: 0x00000000000438fc
using LZMA
[ 0xbf587000, bf666efc, 0xbf666efc) <- fff4e736
dest bf587000, end bf666efc, bouncebuffer bf587000
move suffix around: from bf5f0038, to 169038, amount: 76ec4
Loaded segments
PCH watchdog disabled
Jumping to boot code at 00008200
CPU0: stack: 00164000 - 00165000, lowest used address 00164a8c, stack used: 1396 bytes
entry = 0x00008200
lb_start = 0x00100000
lb_size = 0x00069038
buffer = 0xbf587000
error: terminal `serial_usb0' isn't found.
error: terminal `serial_usb0' isn't found.
error: file `/boot/grub/i386-coreboot/gfxterm.mod' not found.
error: no suitable video mode found.
error: file `/boot/grub/i386-coreboot/png.mod' not found.
error: file `/boot/grub/i386-coreboot/gfxterm_background.mod' not found.
GNU GRUB version 2.02~beta2
+----------------------------------------------------------------------------+||||||||||||||||||||||||+----------------------------------------------------------------------------+ Use the ^ and v keys to select which entry is highlighted.
Press enter to boot the selected OS, `e' to edit the commands
before booting or `c' for a command-line. *Debian GNU/Linux, with Linux 3.2.0-4-amd64  Debian GNU/Linux, with Linux 3.2.0-4-amd64 (recovery mode)  Xen 4.1-amd64  Memory test (memtest86+)  Memory test (memtest86+, serial console 115200)  Memory test (memtest86+, experimental multiboot)  Memory test (memtest86+, serial console 115200, experimental multiboot)  FreeBSD  Install Debian Sid  SeaBIOS  OFW  OpenBIOS v The highlighted entry will be executed automatically in 5s. The highlighted entry will be executed automatically in 4s. The highlighted entry will be executed automatically in 3s. Loading Linux 3.2.0-4-amd64 ...
Loading initial ramdisk ...