| |
| coreboot-4.15 Tue Nov 9 15:49:46 UTC 2021 bootblock starting (log level: 6)... |
| FMAP: Found "FLASH" version 1.1 at 0x710000. |
| FMAP: base = 0xff800000 size = 0x800000 #areas = 4 |
| FMAP: area COREBOOT found @ 710200 (982528 bytes) |
| CBFS: mcache @0xfefc2e00 built for 16 files, used 0x354 of 0x4000 bytes |
| CBFS: Found 'fallback/romstage' @0x80 size 0xff30 in mcache @0xfefc2e2c |
| BS: bootblock times (exec / console): total (unknown) / 1 ms |
| |
| |
| coreboot-4.15 Tue Nov 9 15:49:46 UTC 2021 romstage starting (log level: 6)... |
| Setting up local APIC 0x0 |
| Setting up static southbridge registers... done. |
| Disabling Watchdog reboot... done. |
| Setting up static northbridge registers... done. |
| SMBus controller enabled |
| Setting up Chipset Initialization Registers (CIR) |
| Intel ME early init |
| Intel ME firmware is ready |
| ME: Requested 32MB UMA |
| CAPID0[0] = 0x010c0009 |
| CAPID0[1] = 0x00316126 |
| CAPID0[2] = 0x00440088 |
| Revision ID: 0x12 |
| Device ID: 0x44 |
| FMAP: area RW_MRC_CACHE found @ 700000 (65536 bytes) |
| CBMEM: |
| IMD: root @ 0x7f7ff000 254 entries. |
| IMD: root @ 0x7f7fec00 62 entries. |
| FMAP: area COREBOOT found @ 710200 (982528 bytes) |
| External stage cache: |
| IMD: root @ 0x7ffff000 254 entries. |
| IMD: root @ 0x7fffec00 62 entries. |
| SMM Memory Map |
| SMRAM : 0x7f800000 0x800000 |
| Subregion 0: 0x7f800000 0x700000 |
| Subregion 1: 0x7ff00000 0x100000 |
| Subregion 2: 0x80000000 0x0 |
| MTRR Range: Start=7f000000 End=7f800000 (Size 800000) |
| MTRR Range: Start=7f800000 End=80000000 (Size 800000) |
| MTRR Range: Start=ff800000 End=0 (Size 800000) |
| Normal boot |
| CBFS: Found 'fallback/postcar' @0x37980 size 0x4df8 in mcache @0xfefc301c |
| Loading module at 0x7f7d1000 with entry 0x7f7d1031. filesize: 0x4aa8 memsize: 0x8db8 |
| Processing 196 relocs. Offset value of 0x7d7d1000 |
| BS: romstage times (exec / console): total (unknown) / 1 ms |
| |
| |
| coreboot-4.15 Tue Nov 9 15:49:46 UTC 2021 postcar starting (log level: 6)... |
| Normal boot |
| FMAP: area COREBOOT found @ 710200 (982528 bytes) |
| CBFS: Found 'fallback/ramstage' @0x13480 size 0x19219 in mcache @0x7f7dd0dc |
| Loading module at 0x7f78c000 with entry 0x7f78c000. filesize: 0x32698 memsize: 0x43508 |
| Processing 3429 relocs. Offset value of 0x7e98c000 |
| BS: postcar times (exec / console): total (unknown) / 0 ms |
| |
| |
| coreboot-4.15 Tue Nov 9 15:49:46 UTC 2021 ramstage starting (log level: 6)... |
| Normal boot |
| Disabling PEG10. |
| Enumerating buses... |
| Root Device scanning... |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| DOMAIN: 0000 scanning... |
| PCI: pci_scan_bus for bus 00 |
| PCI: 00:00.0 [8086/0044] enabled |
| PCI: 00:02.0 [8086/0046] enabled |
| PCI: 00:16.0 [8086/3b64] enabled |
| PCI: 00:16.1: Disabling device |
| PCI: 00:16.2: Disabling device |
| PCI: 00:16.3: Disabling device |
| PCI: 00:19.0 [8086/10ea] enabled |
| PCI: 00:1a.0 [8086/3b3c] enabled |
| PCI: 00:1b.0 [8086/3b56] enabled |
| PCI: 00:1c.0 subordinate bus PCI Express |
| PCI: 00:1c.0 [8086/3b42] enabled |
| PCI: 00:1c.1 subordinate bus PCI Express |
| PCI: 00:1c.1 [8086/3b44] enabled |
| PCI: 00:1c.2: Disabling device |
| PCI: 00:1c.2 [8086/3b46] disabled No operations |
| PCI: 00:1c.3 subordinate bus PCI Express |
| PCI: 00:1c.3 [8086/3b48] enabled |
| PCI: 00:1c.4 subordinate bus PCI Express |
| PCI: 00:1c.4 [8086/3b4a] enabled |
| PCI: 00:1c.5: Disabling device |
| PCI: 00:1c.5 [8086/3b4c] disabled No operations |
| PCI: 00:1c.6: Disabling device |
| PCI: 00:1c.6 [8086/3b4e] disabled No operations |
| PCI: 00:1c.7: Disabling device |
| PCI: 00:1c.7 [8086/3b50] disabled No operations |
| PCI: 00:1d.0 [8086/3b34] enabled |
| PCI: 00:1e.0 [8086/2448] enabled |
| PCI: 00:1f.0 [8086/3b07] enabled |
| PCI: 00:1f.2 [8086/3b2e] enabled |
| PCI: 00:1f.3 [8086/3b30] enabled |
| PCI: 00:1f.4: Disabling device |
| PCI: 00:1f.5: Disabling device |
| PCI: 00:1f.5 [8086/3b2d] disabled No operations |
| PCI: 00:1f.6 [8086/3b32] enabled |
| PCI: Leftover static devices: |
| PCI: 00:01.0 |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:1f.4 |
| PCI: Check your devicetree.cb. |
| PCI: 00:1c.0 scanning... |
| PCI: 00:1c.0: No LTR support |
| PCI: pci_scan_bus for bus 01 |
| scan_bus: bus PCI: 00:1c.0 finished in 0 msecs |
| PCI: 00:1c.1 scanning... |
| PCI: 00:1c.1: No LTR support |
| PCI: pci_scan_bus for bus 02 |
| scan_bus: bus PCI: 00:1c.1 finished in 0 msecs |
| PCI: 00:1c.3 scanning... |
| PCI: 00:1c.3: No LTR support |
| PCI: pci_scan_bus for bus 03 |
| scan_bus: bus PCI: 00:1c.3 finished in 0 msecs |
| PCI: 00:1c.4 scanning... |
| PCI: 00:1c.4: No LTR support |
| PCI: pci_scan_bus for bus 04 |
| PCI: 04:00.0 [168c/002a] enabled |
| Enabling Common Clock Configuration |
| ASPM: Enabled L1 |
| PCIe: Max_Payload_Size adjusted to 128 |
| PCI: 04:00.0: No LTR support |
| scan_bus: bus PCI: 00:1c.4 finished in 0 msecs |
| PCI: 00:1e.0 scanning... |
| PCI: pci_scan_bus for bus 05 |
| scan_bus: bus PCI: 00:1e.0 finished in 0 msecs |
| PCI: 00:1f.0 scanning... |
| PNP: 164e.3 enabled |
| PNP: 164e.2 disabled |
| PNP: 164e.7 disabled |
| PNP: 164e.19 disabled |
| PNP: 0c31.0 enabled |
| PMH7: ID 04 Revision 01 |
| PNP: 00ff.1 enabled |
| H8: EC Firmware ID 6QHT34WW-3.18, Version 5.01B |
| H8: BDC not installed |
| H8: WWAN detection not implemented. Assuming WWAN installed |
| dock is connected |
| PNP: 00ff.2 enabled |
| scan_bus: bus PCI: 00:1f.0 finished in 7 msecs |
| PCI: 00:1f.3 scanning... |
| I2C: 01:54 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled |
| bus: PCI: 00:1f.3[0]->scan_bus: bus PCI: 00:1f.3 finished in 0 msecs |
| scan_bus: bus DOMAIN: 0000 finished in 8 msecs |
| scan_bus: bus Root Device finished in 8 msecs |
| done |
| BS: BS_DEV_ENUMERATE run times (exec / console): 8 / 0 ms |
| FMAP: area RW_MRC_CACHE found @ 700000 (65536 bytes) |
| FMAP: area RW_MRC_CACHE found @ 700000 (65536 bytes) |
| MRC: Checking cached data update for 'RW_MRC_CACHE'. |
| Manufacturer: c2 |
| SF: Detected c2 2017 with sector size 0x1000, total 0x800000 |
| MRC: 'RW_MRC_CACHE' does not need update. |
| found VGA at PCI: 00:02.0 |
| Setting up VGA for PCI: 00:02.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| Allocating resources... |
| Reading resources... |
| Adding PCIe enhanced config space BAR 0xe0000000-0xf0000000. |
| ram_before_4g_top: 0x7f800000 |
| TOUUD: 0x2780 |
| PNP: 0c31.0 missing read_resources |
| PNP: 00ff.1 missing read_resources |
| PNP: 00ff.2 missing read_resources |
| Done reading resources. |
| === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) === |
| PCI: 00:1c.4 io: size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.4 io: size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.4 mem: size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 04:00.0 10 * [0x0 - 0xffff] mem |
| PCI: 00:1c.4 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.4 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.4 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) === |
| DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff |
| update_constraints: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed) |
| update_constraints: PCI: 00:1f.0 10000200 base 00001600 limit 0000167b io (fixed) |
| update_constraints: PCI: 00:1f.0 10000300 base 000015e0 limit 000015eb io (fixed) |
| update_constraints: PCI: 00:1f.0 10000400 base 00001680 limit 0000169b io (fixed) |
| update_constraints: PNP: 164e.3 60 base 00000200 limit 00000207 io (fixed) |
| update_constraints: PNP: 00ff.1 77 base 000015e0 limit 000015ef io (fixed) |
| update_constraints: PCI: 00:1f.3 20 base 00000400 limit 0000041f io (fixed) |
| DOMAIN: 0000: Resource ranges: |
| * Base: 1000, Size: 5e0, Tag: 100 |
| * Base: 15f0, Size: 10, Tag: 100 |
| * Base: 167c, Size: 4, Tag: 100 |
| * Base: 169c, Size: e964, Tag: 100 |
| PCI: 00:19.0 18 * [0x1000 - 0x101f] limit: 101f io |
| PCI: 00:1f.2 20 * [0x1020 - 0x103f] limit: 103f io |
| PCI: 00:02.0 20 * [0x1040 - 0x1047] limit: 1047 io |
| PCI: 00:1f.2 10 * [0x1048 - 0x104f] limit: 104f io |
| PCI: 00:1f.2 18 * [0x1050 - 0x1057] limit: 1057 io |
| PCI: 00:1f.2 14 * [0x1058 - 0x105b] limit: 105b io |
| PCI: 00:1f.2 1c * [0x105c - 0x105f] limit: 105f io |
| DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done |
| DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff |
| update_constraints: PCI: 00:00.0 50 base e0000000 limit efffffff mem (fixed) |
| update_constraints: PCI: 00:00.0 03 base 00000000 limit 0009ffff mem (fixed) |
| update_constraints: PCI: 00:00.0 04 base 00100000 limit 7f7fffff mem (fixed) |
| update_constraints: PCI: 00:00.0 05 base 7f800000 limit 7fffffff mem (fixed) |
| update_constraints: PCI: 00:00.0 06 base 80000000 limit 81bfffff mem (fixed) |
| update_constraints: PCI: 00:00.0 07 base 81c00000 limit 81ffffff mem (fixed) |
| update_constraints: PCI: 00:00.0 08 base 82000000 limit 83ffffff mem (fixed) |
| update_constraints: PCI: 00:00.0 09 base 100000000 limit 277ffffff mem (fixed) |
| update_constraints: PCI: 00:00.0 0a base 1fc000000 limit 1ffffffff mem (fixed) |
| update_constraints: PCI: 00:00.0 0b base fed00000 limit fedfffff mem (fixed) |
| update_constraints: PCI: 00:00.0 0c base 000a0000 limit 000bffff mem (fixed) |
| update_constraints: PCI: 00:00.0 0d base 000c0000 limit 000fffff mem (fixed) |
| update_constraints: PCI: 00:02.0 18 base d0000000 limit dfffffff prefmem (fixed) |
| update_constraints: PCI: 00:1f.0 10000100 base ff800000 limit ffffffff mem (fixed) |
| update_constraints: PCI: 00:1f.0 03 base fec00000 limit fec00fff mem (fixed) |
| DOMAIN: 0000: Resource ranges: |
| * Base: 84000000, Size: 4c000000, Tag: 200 |
| * Base: f0000000, Size: ec00000, Tag: 200 |
| * Base: fec01000, Size: ff000, Tag: 200 |
| * Base: fee00000, Size: a00000, Tag: 200 |
| * Base: 278000000, Size: d88000000, Tag: 100200 |
| PCI: 00:02.0 10 * [0x84000000 - 0x843fffff] limit: 843fffff mem |
| PCI: 00:1c.4 20 * [0x84400000 - 0x844fffff] limit: 844fffff mem |
| PCI: 00:19.0 10 * [0x84500000 - 0x8451ffff] limit: 8451ffff mem |
| PCI: 00:1b.0 10 * [0x84520000 - 0x84523fff] limit: 84523fff mem |
| PCI: 00:19.0 14 * [0x84524000 - 0x84524fff] limit: 84524fff mem |
| PCI: 00:1f.6 10 * [0x84525000 - 0x84525fff] limit: 84525fff mem |
| PCI: 00:1f.2 24 * [0x84526000 - 0x845267ff] limit: 845267ff mem |
| PCI: 00:1a.0 10 * [0x84527000 - 0x845273ff] limit: 845273ff mem |
| PCI: 00:1d.0 10 * [0x84528000 - 0x845283ff] limit: 845283ff mem |
| PCI: 00:1f.3 10 * [0x84529000 - 0x845290ff] limit: 845290ff mem |
| PCI: 00:16.0 10 * [0x8452a000 - 0x8452a00f] limit: 8452a00f mem |
| DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff done |
| PCI: 00:1c.4 mem: base: 84400000 size: 100000 align: 20 gran: 20 limit: 844fffff |
| PCI: 00:1c.4: Resource ranges: |
| * Base: 84400000, Size: 100000, Tag: 200 |
| PCI: 04:00.0 10 * [0x84400000 - 0x8440ffff] limit: 8440ffff mem |
| PCI: 00:1c.4 mem: base: 84400000 size: 100000 align: 20 gran: 20 limit: 844fffff done |
| === Resource allocator: DOMAIN: 0000 - resource allocation complete === |
| PCI: 00:02.0 10 <- [0x0084000000 - 0x00843fffff] size 0x00400000 gran 0x16 mem64 |
| PCI: 00:02.0 20 <- [0x0000001040 - 0x0000001047] size 0x00000008 gran 0x03 io |
| PCI: 00:16.0 10 <- [0x008452a000 - 0x008452a00f] size 0x00000010 gran 0x04 mem64 |
| PCI: 00:19.0 10 <- [0x0084500000 - 0x008451ffff] size 0x00020000 gran 0x11 mem |
| PCI: 00:19.0 14 <- [0x0084524000 - 0x0084524fff] size 0x00001000 gran 0x0c mem |
| PCI: 00:19.0 18 <- [0x0000001000 - 0x000000101f] size 0x00000020 gran 0x05 io |
| PCI: 00:1a.0 10 <- [0x0084527000 - 0x00845273ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1b.0 10 <- [0x0084520000 - 0x0084523fff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io |
| PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem |
| PCI: 00:1c.0 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 01 mem |
| PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io |
| PCI: 00:1c.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem |
| PCI: 00:1c.1 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 02 mem |
| PCI: 00:1c.3 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io |
| PCI: 00:1c.3 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 03 prefmem |
| PCI: 00:1c.3 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 03 mem |
| PCI: 00:1c.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io |
| PCI: 00:1c.4 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 04 prefmem |
| PCI: 00:1c.4 20 <- [0x0084400000 - 0x00844fffff] size 0x00100000 gran 0x14 bus 04 mem |
| PCI: 04:00.0 10 <- [0x0084400000 - 0x008440ffff] size 0x00010000 gran 0x10 mem64 |
| PCI: 00:1d.0 10 <- [0x0084528000 - 0x00845283ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1e.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 05 io |
| PCI: 00:1e.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 05 prefmem |
| PCI: 00:1e.0 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 05 mem |
| PNP: 164e.3 60 <- [0x0000000200 - 0x0000000207] size 0x00000008 gran 0x03 io |
| PNP: 164e.3 29 <- [0x00000000b0 - 0x00000000af] size 0x00000000 gran 0x00 irq |
| PNP: 164e.3 70 <- [0x0000000005 - 0x0000000005] size 0x00000001 gran 0x00 irq |
| PNP: 164e.3 f0 <- [0x0000000082 - 0x0000000081] size 0x00000000 gran 0x00 irq |
| PNP: 00ff.1 missing set_resources |
| PNP: 00ff.2 missing set_resources |
| PCI: 00:1f.2 10 <- [0x0000001048 - 0x000000104f] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 14 <- [0x0000001058 - 0x000000105b] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 18 <- [0x0000001050 - 0x0000001057] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 1c <- [0x000000105c - 0x000000105f] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 20 <- [0x0000001020 - 0x000000103f] size 0x00000020 gran 0x05 io |
| PCI: 00:1f.2 24 <- [0x0084526000 - 0x00845267ff] size 0x00000800 gran 0x0b mem |
| PCI: 00:1f.3 10 <- [0x0084529000 - 0x00845290ff] size 0x00000100 gran 0x08 mem64 |
| PCI: 00:1f.6 10 <- [0x0084525000 - 0x0084525fff] size 0x00001000 gran 0x0c mem64 |
| Done setting resources. |
| Done allocating resources. |
| BS: BS_DEV_RESOURCES run times (exec / console): 1 / 0 ms |
| Enabling resources... |
| PCI: 00:00.0 subsystem <- 17aa/2193 |
| PCI: 00:00.0 cmd <- 06 |
| PCI: 00:02.0 subsystem <- 17aa/215a |
| PCI: 00:02.0 cmd <- 03 |
| PCI: 00:16.0 subsystem <- 8086/3b64 |
| PCI: 00:16.0 cmd <- 02 |
| PCI: 00:19.0 subsystem <- 17aa/2153 |
| PCI: 00:19.0 cmd <- 103 |
| PCI: 00:1a.0 subsystem <- 17aa/2163 |
| PCI: 00:1a.0 cmd <- 102 |
| PCI: 00:1b.0 subsystem <- 17aa/215e |
| PCI: 00:1b.0 cmd <- 102 |
| PCI: 00:1c.0 bridge ctrl <- 0013 |
| PCI: 00:1c.0 cmd <- 100 |
| PCI: 00:1c.1 bridge ctrl <- 0013 |
| PCI: 00:1c.1 cmd <- 100 |
| PCI: 00:1c.3 bridge ctrl <- 0013 |
| PCI: 00:1c.3 cmd <- 100 |
| PCI: 00:1c.4 bridge ctrl <- 0013 |
| PCI: 00:1c.4 cmd <- 106 |
| PCI: 00:1d.0 subsystem <- 17aa/2163 |
| PCI: 00:1d.0 cmd <- 102 |
| PCI: 00:1e.0 bridge ctrl <- 0013 |
| PCI: 00:1e.0 subsystem <- 8086/2448 |
| PCI: 00:1e.0 cmd <- 100 |
| PCI: 00:1f.0 subsystem <- 17aa/2166 |
| PCI: 00:1f.0 cmd <- 107 |
| PCI: 00:1f.2 subsystem <- 17aa/2168 |
| PCI: 00:1f.2 cmd <- 03 |
| PCI: 00:1f.3 subsystem <- 17aa/2167 |
| PCI: 00:1f.3 cmd <- 103 |
| PCI: 00:1f.6 subsystem <- 8086/3b32 |
| PCI: 00:1f.6 cmd <- 02 |
| PCI: 04:00.0 cmd <- 02 |
| done. |
| Initializing devices... |
| CPU_CLUSTER: 0 init |
| MTRR: Physical address space: |
| 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 |
| 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 |
| 0x00000000000c0000 - 0x000000007f800000 size 0x7f740000 type 6 |
| 0x000000007f800000 - 0x00000000d0000000 size 0x50800000 type 0 |
| 0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1 |
| 0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0 |
| 0x0000000100000000 - 0x0000000278000000 size 0x178000000 type 6 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| CPU physical address size: 36 bits |
| MTRR: default type WB/UC MTRR counts: 5/5. |
| MTRR: UC selected as default type. |
| MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6 |
| MTRR: 1 base 0x000000007f800000 mask 0x0000000fff800000 type 0 |
| MTRR: 2 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1 |
| MTRR: 3 base 0x0000000100000000 mask 0x0000000f00000000 type 6 |
| MTRR: 4 base 0x0000000200000000 mask 0x0000000f80000000 type 6 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| CPU has 2 cores, 4 threads enabled. |
| Setting up SMI for CPU |
| Will perform SMM setup. |
| FMAP: area COREBOOT found @ 710200 (982528 bytes) |
| CBFS: Found 'cpu_microcode_blob.bin' @0x10040 size 0x3400 in mcache @0x7f7dd0ac |
| microcode: sig=0x20652 pf=0x10 revision=0x11 |
| CPU: Intel(R) Core(TM) i5 CPU M 540 @ 2.53GHz. |
| Setting up local APIC 0x0 |
| Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178 |
| Processing 18 relocs. Offset value of 0x00030000 |
| Attempting to start 3 APs |
| Starting CPUs in xapic mode |
| Waiting for 10ms after sending INIT. |
| Waiting for SIPI to complete... |
| done. |
| Waiting for SIPI to complete... |
| Setting up local APIC 0x1 |
| done. |
| AP: slot 1 apic_id 1, MCU rev: 0x00000011 |
| Setting up local APIC 0x5 |
| Setting up local APIC 0x4 |
| AP: slot 2 apic_id 5, MCU rev: 0x00000011 |
| AP: slot 3 apic_id 4, MCU rev: 0x00000011 |
| smm_stub_place_stacks: cpus: 4 : stack space: needed -> 1000 |
| smm_stub_place_stacks: exit, stack_top 0x7f801000 |
| Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1e0 memsize: 0x1e0 |
| Processing 11 relocs. Offset value of 0x00038000 |
| smm_module_setup_stub: stack_end = 0x7f800000 |
| smm_module_setup_stub: stack_top = 0x7f801000 |
| smm_module_setup_stub: stack_size = 0x400 |
| smm_module_setup_stub: runtime.start32_offset = 0x4c |
| smm_module_setup_stub: runtime.smm_size = 0x10000 |
| SMM Module: stub loaded at 0x00038000. Will call 0x7f7a6d7b |
| Installing permanent SMM handler to 0x7f800000 |
| smm_load_module: total_smm_space_needed 6688, available -> 700000 |
| Loading module at 0x7fefb000 with entry 0x7fefb225. filesize: 0xe70 memsize: 0x4e88 |
| Processing 51 relocs. Offset value of 0x7fefb000 |
| smm_load_module: smram_start: 0x0x7f800000 |
| smm_load_module: smram_end: 0x7ff00000 |
| smm_load_module: stack_top: 0x7f801000 |
| smm_load_module: handler start 0x7fefb225 |
| smm_load_module: handler_size 5510 |
| smm_load_module: fxsave_area 0x7feff800 |
| smm_load_module: fxsave_size 800 |
| smm_load_module: CONFIG_MSEG_SIZE 0x0 |
| smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0 |
| smm_load_module: handler_mod_params.smbase = 0x7f800000 |
| smm_load_module: per_cpu_save_state_size = 0x400 |
| smm_load_module: num_cpus = 0x4 |
| smm_load_module: total_save_state_size = 0x1000 |
| smm_load_module: cpu0 entry: 0x7feeb000 |
| smm_create_map: cpus allowed in one segment 30 |
| smm_create_map: min # of segments needed 1 |
| smm_stub_place_stacks: cpus: 4 : stack space: needed -> 1000 |
| smm_stub_place_stacks: exit, stack_top 0x7f801000 |
| Loading module at 0x7fef3000 with entry 0x7fef3000. filesize: 0x1e0 memsize: 0x1e0 |
| Processing 11 relocs. Offset value of 0x7fef3000 |
| smm_place_entry_code: smbase 7feea400, stack_top 7f801000 |
| SMM Module: placing smm entry code at 7fef2c00, cpu # 0x1 |
| smm_place_entry_code: copying from 7fef3000 to 7fef2c00 0x1e0 bytes |
| SMM Module: placing smm entry code at 7fef2800, cpu # 0x2 |
| smm_place_entry_code: copying from 7fef3000 to 7fef2800 0x1e0 bytes |
| SMM Module: placing smm entry code at 7fef2400, cpu # 0x3 |
| smm_place_entry_code: copying from 7fef3000 to 7fef2400 0x1e0 bytes |
| smm_module_setup_stub: stack_end = 0x7f800000 |
| smm_module_setup_stub: stack_top = 0x7f801000 |
| smm_module_setup_stub: stack_size = 0x400 |
| smm_module_setup_stub: runtime.start32_offset = 0x4c |
| smm_module_setup_stub: runtime.smm_size = 0x700000 |
| SMM Module: stub loaded at 0x7fef3000. Will call 0x7fefb225 |
| Initializing southbridge SMI... |
| smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7feeb000, cpu = 0 |
| In relocation handler: cpu 0 |
| New SMBASE=0x7feeb000 |
| Writing SMRR. base = 0x7f800006, mask=0xff800800 |
| Relocation complete. |
| smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7feeac00, cpu = 1 |
| microcode: Update skipped, already up-to-date |
| In relocation handler: cpu 1 |
| New SMBASE=0x7feeac00 |
| Writing SMRR. base = 0x7f800006, mask=0xff800800 |
| Relocation complete. |
| smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7feea800, cpu = 2 |
| microcode: Update skipped, already up-to-date |
| In relocation handler: cpu 2 |
| New SMBASE=0x7feea800 |
| Writing SMRR. base = 0x7f800006, mask=0xff800800 |
| Relocation complete. |
| smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7feea400, cpu = 3 |
| microcode: Update skipped, already up-to-date |
| In relocation handler: cpu 3 |
| New SMBASE=0x7feea400 |
| Writing SMRR. base = 0x7f800006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| Initializing CPU #0 |
| CPU: vendor Intel device 20652 |
| CPU: family 06, model 25, stepping 02 |
| CPU: Intel(R) Core(TM) i5 CPU M 540 @ 2.53GHz. |
| CPU:lapic=0, boot_cpu=1 |
| Setting up local APIC 0x0 |
| VMX status: enabled |
| IA32_FEATURE_CONTROL status: locked |
| model_x065x: frequency set to 2527 |
| Turbo is available and visible |
| CPU #0 initialized |
| Initializing CPU #1 |
| Initializing CPU #2 |
| CPU: vendor Intel device 20652 |
| CPU: family 06, model 25, stepping 02 |
| CPU: vendor Intel device 20652 |
| Initializing CPU #3 |
| CPU: family 06, model 25, stepping 02 |
| CPU: Intel(R) Core(TM) i5 CPU M 540 @ 2.53GHz. |
| CPU:lapic=1, boot_cpu=0 |
| CPU: vendor Intel device 20652 |
| Setting up local APIC 0x1 |
| CPU: Intel(R) Core(TM) i5 CPU M 540 @ 2.53GHz. |
| VMX status: enabled |
| CPU:lapic=5, boot_cpu=0 |
| IA32_FEATURE_CONTROL status: locked |
| Setting up local APIC 0x5 |
| CPU: family 06, model 25, stepping 02 |
| VMX status: enabled |
| model_x065x: frequency set to 2527 |
| CPU #1 initialized |
| IA32_FEATURE_CONTROL status: locked |
| CPU: Intel(R) Core(TM) i5 CPU M 540 @ 2.53GHz. |
| CPU:lapic=4, boot_cpu=0 |
| Setting up local APIC 0x4 |
| model_x065x: frequency set to 2527 |
| VMX status: enabled |
| CPU #2 initialized |
| IA32_FEATURE_CONTROL status: locked |
| model_x065x: frequency set to 2527 |
| CPU #3 initialized |
| bsp_do_flight_plan done after 11 msecs. |
| Initializing southbridge SMI... |
| SMI_STS: |
| GPE0_STS: GPIO14 GPIO11 GPIO9 GPIO2 GPIO0 |
| ALT_GP_SMI_STS: GPI14 GPI11 GPI9 GPI7 GPI6 GPI2 GPI1 GPI0 |
| TCO_STS: |
| Locking SMM. |
| CPU_CLUSTER: 0 init finished in 22 msecs |
| PCI: 00:00.0 init |
| PCI: 00:00.0 init finished in 0 msecs |
| PCI: 00:02.0 init |
| CBFS: 'vbt.bin' not found. |
| CBFS: 'pci8086,0046.rom' not found. |
| PCI Option ROM loading disabled for PCI: 00:02.0 |
| GMA: locate_vbt_vbios: ffff ffff ff ff ff |
| GMA: VBT couldn't be found |
| GT Power Management Init (post VBIOS) |
| PCI: 00:02.0 init finished in 223 msecs |
| PCI: 00:16.0 init |
| ME: BIOS path: Normal |
| ME: Extend Register not valid |
| PCI: 00:16.0 init finished in 0 msecs |
| PCI: 00:19.0 init |
| PCI: 00:19.0 init finished in 0 msecs |
| PCI: 00:1a.0 init |
| EHCI: Setting up controller.. done. |
| PCI: 00:1a.0 init finished in 0 msecs |
| PCI: 00:1b.0 init |
| Azalia: base = 0x84520000 |
| Azalia: V1CTL disabled. |
| Azalia: codec_mask = 09 |
| Azalia: Initializing codec #3 |
| Azalia: codec viddid: 80862804 |
| Azalia: verb_size: 16 |
| Azalia: verb loaded. |
| Azalia: Initializing codec #0 |
| Azalia: codec viddid: 14f15069 |
| Azalia: verb_size: 44 |
| Azalia: verb loaded. |
| PCI: 00:1b.0 init finished in 4 msecs |
| PCI: 00:1d.0 init |
| EHCI: Setting up controller.. done. |
| PCI: 00:1d.0 init finished in 0 msecs |
| PCI: 00:1e.0 init |
| PCI init. |
| PCI: 00:1e.0 init finished in 0 msecs |
| PCI: 00:1f.0 init |
| pch: lpc_init |
| IOAPIC: Initializing IOAPIC at 0xfec00000 |
| IOAPIC: ID = 0x01 |
| IOAPIC: 24 interrupts |
| IOAPIC: Clearing IOAPIC at 0xfec00000 |
| IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| Set power off after power failure. |
| NMI sources disabled. |
| Mobile 5 PM init |
| rtc_failed = 0x0 |
| RTC Init |
| apm_control: Disabling ACPI. |
| APMC done. |
| PCI: 00:1f.0 init finished in 0 msecs |
| PCI: 00:1f.2 init |
| SATA: Initializing... |
| SATA: Controller in AHCI mode. |
| ABAR: 0x84526000 |
| PCI: 00:1f.2 init finished in 0 msecs |
| PCI: 00:1f.3 init |
| PCI: 00:1f.3 init finished in 0 msecs |
| PCI: 00:1f.6 init |
| Thermal init start. |
| Thermal init done. |
| PCI: 00:1f.6 init finished in 0 msecs |
| PCI: 04:00.0 init |
| PCI: 04:00.0 init finished in 0 msecs |
| PNP: 164e.3 init |
| PNP: 164e.3 init finished in 0 msecs |
| PNP: 00ff.2 init |
| PNP: 00ff.2 init finished in 0 msecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:54 init |
| I2C: 01:54 init finished in 0 msecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:55 init |
| I2C: 01:55 init finished in 0 msecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:56 init |
| I2C: 01:56 init finished in 0 msecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:57 init |
| I2C: 01:57 init finished in 0 msecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5c init |
| Locking EEPROM RFID |
| init EEPROM done |
| I2C: 01:5c init finished in 26 msecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5d init |
| I2C: 01:5d init finished in 0 msecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5e init |
| I2C: 01:5e init finished in 0 msecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5f init |
| I2C: 01:5f init finished in 0 msecs |
| Devices initialized |
| BS: BS_DEV_INIT run times (exec / console): 277 / 1 ms |
| Finalize devices... |
| PCI: 00:1f.0 final |
| apm_control: Finalizing SMM. |
| APMC done. |
| Devices finalized |
| CBFS: Found 'fallback/dsdt.aml' @0x33b80 size 0x3727 in mcache @0x7f7dd1c8 |
| CBFS: 'fallback/slic' not found. |
| ACPI: Writing ACPI tables at 7f74f000. |
| ACPI: * FACS |
| ACPI: * DSDT |
| ACPI: * FADT |
| ACPI: added table 1/32, length now 40 |
| ACPI: * SSDT |
| Super I/O probe failed, skipping wacom |
| Found 1 CPU(s) with 4 core(s) each. |
| PSS: 2534MHz power 25000 control 0x17 status 0x17 |
| PSS: 2533MHz power 25000 control 0x13 status 0x13 |
| PSS: 2400MHz power 23390 control 0x12 status 0x12 |
| PSS: 2266MHz power 21835 control 0x11 status 0x11 |
| PSS: 2133MHz power 20334 control 0x10 status 0x10 |
| PSS: 2000MHz power 18817 control 0xf status 0xf |
| PSS: 1866MHz power 17351 control 0xe status 0xe |
| PSS: 1733MHz power 15937 control 0xd status 0xd |
| PSS: 1600MHz power 14528 control 0xc status 0xc |
| PSS: 1466MHz power 13163 control 0xb status 0xb |
| PSS: 1333MHz power 11835 control 0xa status 0xa |
| PSS: 1200MHz power 10512 control 0x9 status 0x9 |
| PSS: 2534MHz power 25000 control 0x17 status 0x17 |
| PSS: 2533MHz power 25000 control 0x13 status 0x13 |
| PSS: 2400MHz power 23390 control 0x12 status 0x12 |
| PSS: 2266MHz power 21835 control 0x11 status 0x11 |
| PSS: 2133MHz power 20334 control 0x10 status 0x10 |
| PSS: 2000MHz power 18817 control 0xf status 0xf |
| PSS: 1866MHz power 17351 control 0xe status 0xe |
| PSS: 1733MHz power 15937 control 0xd status 0xd |
| PSS: 1600MHz power 14528 control 0xc status 0xc |
| PSS: 1466MHz power 13163 control 0xb status 0xb |
| PSS: 1333MHz power 11835 control 0xa status 0xa |
| PSS: 1200MHz power 10512 control 0x9 status 0x9 |
| PSS: 2534MHz power 25000 control 0x17 status 0x17 |
| PSS: 2533MHz power 25000 control 0x13 status 0x13 |
| PSS: 2400MHz power 23390 control 0x12 status 0x12 |
| PSS: 2266MHz power 21835 control 0x11 status 0x11 |
| PSS: 2133MHz power 20334 control 0x10 status 0x10 |
| PSS: 2000MHz power 18817 control 0xf status 0xf |
| PSS: 1866MHz power 17351 control 0xe status 0xe |
| PSS: 1733MHz power 15937 control 0xd status 0xd |
| PSS: 1600MHz power 14528 control 0xc status 0xc |
| PSS: 1466MHz power 13163 control 0xb status 0xb |
| PSS: 1333MHz power 11835 control 0xa status 0xa |
| PSS: 1200MHz power 10512 control 0x9 status 0x9 |
| PSS: 2534MHz power 25000 control 0x17 status 0x17 |
| PSS: 2533MHz power 25000 control 0x13 status 0x13 |
| PSS: 2400MHz power 23390 control 0x12 status 0x12 |
| PSS: 2266MHz power 21835 control 0x11 status 0x11 |
| PSS: 2133MHz power 20334 control 0x10 status 0x10 |
| PSS: 2000MHz power 18817 control 0xf status 0xf |
| PSS: 1866MHz power 17351 control 0xe status 0xe |
| PSS: 1733MHz power 15937 control 0xd status 0xd |
| PSS: 1600MHz power 14528 control 0xc status 0xc |
| PSS: 1466MHz power 13163 control 0xb status 0xb |
| PSS: 1333MHz power 11835 control 0xa status 0xa |
| PSS: 1200MHz power 10512 control 0x9 status 0x9 |
| Generating ACPI PIRQ entries |
| ACPI: * H8 |
| H8: BDC not installed |
| H8: WWAN detection not implemented. Assuming WWAN installed |
| ACPI: added table 2/32, length now 44 |
| ACPI: * MCFG |
| ACPI: added table 3/32, length now 48 |
| ACPI: * MADT |
| ACPI: added table 4/32, length now 52 |
| current = 7f753f90 |
| ACPI: * HPET |
| ACPI: added table 5/32, length now 56 |
| ACPI: done. |
| ACPI tables: 20432 bytes. |
| smbios_write_tables: 7f74e000 |
| SMBIOS tables: 714 bytes. |
| Writing table forward entry at 0x00000500 |
| Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 5067 |
| Writing coreboot table at 0x7f773000 |
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1. 0000000000001000-000000000009ffff: RAM |
| 2. 00000000000a0000-00000000000fffff: RESERVED |
| 3. 0000000000100000-000000007f74dfff: RAM |
| 4. 000000007f74e000-000000007f78bfff: CONFIGURATION TABLES |
| 5. 000000007f78c000-000000007f7cffff: RAMSTAGE |
| 6. 000000007f7d0000-000000007f7fffff: CONFIGURATION TABLES |
| 7. 000000007f800000-0000000083ffffff: RESERVED |
| 8. 00000000d0000000-00000000efffffff: RESERVED |
| 9. 00000000fed00000-00000000fedfffff: RESERVED |
| 10. 0000000100000000-00000001fbffffff: RAM |
| 11. 00000001fc000000-00000001ffffffff: RESERVED |
| 12. 0000000200000000-0000000277ffffff: RAM |
| Wrote coreboot table at: 0x7f773000, 0x354 bytes, checksum d29c |
| coreboot table: 876 bytes. |
| IMD ROOT 0. 0x7f7ff000 0x00001000 |
| IMD SMALL 1. 0x7f7fe000 0x00001000 |
| CONSOLE 2. 0x7f7de000 0x00020000 |
| RO MCACHE 3. 0x7f7dd000 0x00000354 |
| TIME STAMP 4. 0x7f7dc000 0x00000910 |
| MRC DATA 5. 0x7f7db000 0x000005c8 |
| ROMSTG STCK 6. 0x7f7da000 0x00001000 |
| AFTER CAR 7. 0x7f7d0000 0x0000a000 |
| RAMSTAGE 8. 0x7f78b000 0x00045000 |
| SMM BACKUP 9. 0x7f77b000 0x00010000 |
| COREBOOT 10. 0x7f773000 0x00008000 |
| ACPI 11. 0x7f74f000 0x00024000 |
| SMBIOS 12. 0x7f74e000 0x00001000 |
| IMD small region: |
| IMD ROOT 0. 0x7f7fec00 0x00000400 |
| FMAP 1. 0x7f7feb20 0x000000e0 |
| ROMSTAGE 2. 0x7f7feb00 0x00000004 |
| BS: BS_WRITE_TABLES run times (exec / console): 28 / 0 ms |
| CBFS: Found 'fallback/payload' @0x3c7c0 size 0x10e4a in mcache @0x7f7dd260 |
| Checking segment from ROM address 0xfff4c9ec |
| Payload being loaded at below 1MiB without region being marked as RAM usable. |
| Checking segment from ROM address 0xfff4ca08 |
| Loading segment from ROM address 0xfff4c9ec |
| code (compression=1) |
| New segment dstaddr 0x000dffa0 memsize 0x20060 srcaddr 0xfff4ca24 filesize 0x10e12 |
| Loading Segment: addr: 0x000dffa0 memsz: 0x0000000000020060 filesz: 0x0000000000010e12 |
| using LZMA |
| Loading segment from ROM address 0xfff4ca08 |
| Entry Point 0x000fd265 |
| BS: BS_PAYLOAD_LOAD run times (exec / console): 31 / 0 ms |
| ICH-NM10-PCH: watchdog disabled |
| Jumping to boot code at 0x000fd265(0x7f773000) |
| SeaBIOS (version rel-1.14.0-0-g155821a) |
| BUILD: gcc: (coreboot toolchain v2021-06-06_54f86a5a07) 8.3.0 binutils: (GNU Binutils) 2.35.1 |
| Found coreboot cbmem console @ 7f7de000 |
| Found mainboard LENOVO ThinkPad X201 |
| Relocating init from 0x000e16c0 to 0x7f700c60 (size 54016) |
| Found CBFS header at 0xfff1022c |
| multiboot: eax=7f7bdddc, ebx=7f7bdda4 |
| Found 17 PCI devices (max PCI bus is 05) |
| Copying SMBIOS entry point from 0x7f74e000 to 0x000f6780 |
| Copying ACPI RSDP from 0x7f74f000 to 0x000f6750 |
| table(50434146)=0x7f7529b0 (via xsdt) |
| Using pmtimer, ioport 0x508 |
| Scan for VGA option rom |
| Running option rom at c000:0003 |
| pmm call arg1=0 |
| Turning on vga text mode console |
| SeaBIOS (version rel-1.14.0-0-g155821a) |
| Machine UUID 47e92900-9bf3-11e2-88a3-862bc1bd2a6d |
| EHCI init on dev 00:1a.0 (regs=0x84527020) |
| EHCI init on dev 00:1d.0 (regs=0x84528020) |
| AHCI controller at 00:1f.2, iobase 0x84526000, irq 11 |
| Searching bootorder for: HALT |
| Found 0 lpt ports |
| Found 0 serial ports |
| Searching bootorder for: /pci@i0cf8/*@1f,2/drive@1/disk@0 |
| Searching bios-geometry for: /pci@i0cf8/*@1f,2/drive@1/disk@0 |
| AHCI/1: registering: "DVD/CD [AHCI/1: HL-DT-ST DVDRAM GU40N ATAPI-7 DVD/CD]" |
| Searching bootorder for: /pci@i0cf8/usb@1d/hub@1/storage@1/*@0/*@0,0 |
| Searching bootorder for: /pci@i0cf8/usb@1d/hub@1/usb-*@1 |
| USB MSC vendor='Generic-' product='Multi-Card' rev='1.00' type=0 removable=1 |
| Initialized USB HUB (0 ports used) |
| Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0 |
| AHCI/0: Set transfer mode to UDMA-6 |
| Searching bios-geometry for: /pci@i0cf8/*@1f,2/drive@0/disk@0 |
| AHCI/0: registering: "AHCI/0: Samsung SSD 840 EVO 250GB ATA-9 Hard-Disk (232 GiBytes)" |
| WARNING - Timeout at ps2_recvbyte:182! |
| Discarding ps2 data aa (status=11) |
| WARNING - Timeout at ps2_recvbyte:182! |
| PS2 keyboard initialized |
| Device reports MEDIUM NOT PRESENT |
| scsi_is_ready returned -1 |
| Unable to configure USB MSC drive. |
| Unable to configure USB MSC device. |
| Initialized USB HUB (0 ports used) |
| All threads complete. |
| Scan for option roms |
| |
| Press ESC for boot menu. |
| |
| Searching bootorder for: HALT |
| drive 0x000f6660: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=488397168 |
| Space available for UMB: c7000-ed000, f5fa0-f6660 |
| Returned 253952 bytes of ZoneHigh |
| e820 map has 10 items: |
| 0: 0000000000000000 - 000000000009fc00 = 1 RAM |
| 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED |
| 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED |
| 3: 0000000000100000 - 000000007f74c000 = 1 RAM |
| 4: 000000007f74c000 - 0000000084000000 = 2 RESERVED |
| 5: 00000000d0000000 - 00000000f0000000 = 2 RESERVED |
| 6: 00000000fed00000 - 00000000fee00000 = 2 RESERVED |
| 7: 0000000100000000 - 00000001fc000000 = 1 RAM |
| 8: 00000001fc000000 - 0000000200000000 = 2 RESERVED |
| 9: 0000000200000000 - 0000000278000000 = 1 RAM |
| enter handle_19: |
| NULL |
| Booting from DVD/CD... |
| Device reports MEDIUM NOT PRESENT |
| Boot failed: Could not read from CDROM (code 0003) |
| enter handle_18: |
| NULL |
| Booting from Hard Disk... |
| Booting from 0000:7c00 |
| |