| # This image was built using coreboot 24.02-107-gff2d86351533-dirty |
| CONFIG_VENDOR_LENOVO=y |
| CONFIG_BOARD_LENOVO_THINKCENTRE_M710S=y |
| CONFIG_USE_COREBOOT_MP_INIT=y |
| CONFIG_PAYLOAD_EDK2=y |
| CONFIG_EDK2_REPO_OFFICIAL=y |
| CONFIG_EDK2_BOOT_MANAGER_ESCAPE=y |
| # CONFIG_EDK2_HAVE_EFI_SHELL is not set |
| # CONFIG_EDK2_PS2_SUPPORT is not set |
| # End of defconfig. Derivable values start here. |
| CONFIG_COREBOOT_BUILD=y |
| CONFIG_LOCALVERSION="" |
| CONFIG_CBFS_PREFIX="fallback" |
| CONFIG_COMPILER_GCC=y |
| CONFIG_ARCH_SUPPORTS_CLANG=y |
| CONFIG_OPTION_BACKEND_NONE=y |
| CONFIG_COMPRESS_RAMSTAGE_LZMA=y |
| CONFIG_SEPARATE_ROMSTAGE=y |
| CONFIG_INCLUDE_CONFIG_FILE=y |
| CONFIG_COLLECT_TIMESTAMPS=y |
| CONFIG_USE_BLOBS=y |
| CONFIG_HAVE_ASAN_IN_RAMSTAGE=y |
| CONFIG_TSEG_STAGE_CACHE=y |
| CONFIG_BOARD_SPECIFIC_OPTIONS=y |
| CONFIG_MAINBOARD_FAMILY="ThinkCentre M710s" |
| CONFIG_MAINBOARD_PART_NUMBER="ThinkCentre M710s" |
| CONFIG_MAINBOARD_VERSION="1.0" |
| CONFIG_MAINBOARD_DIR="lenovo/thinkcentre_m710s" |
| CONFIG_VGA_BIOS_ID="8086,0406" |
| CONFIG_DIMM_MAX=4 |
| CONFIG_DIMM_SPD_SIZE=256 |
| CONFIG_FMDFILE="" |
| CONFIG_MAINBOARD_VENDOR="LENOVO" |
| CONFIG_CBFS_SIZE=0x200000 |
| CONFIG_CONSOLE_SERIAL=y |
| CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160 |
| CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840 |
| CONFIG_MAX_CPUS=8 |
| CONFIG_POST_DEVICE=y |
| CONFIG_POST_IO=y |
| CONFIG_UART_FOR_CONSOLE=0 |
| CONFIG_DEVICETREE="devicetree.cb" |
| CONFIG_OVERRIDE_DEVICETREE="" |
| CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" |
| CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" |
| CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 |
| CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 |
| CONFIG_TPM_PIRQ=0x0 |
| CONFIG_USE_PM_ACPI_TIMER=y |
| CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 |
| CONFIG_ECAM_MMCONF_BUS_NUMBER=256 |
| CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" |
| CONFIG_DCACHE_RAM_BASE=0xfef00000 |
| CONFIG_DCACHE_RAM_SIZE=0x40000 |
| CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 |
| CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 |
| CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 |
| CONFIG_HAVE_INTEL_FIRMWARE=y |
| CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 |
| CONFIG_DRIVERS_INTEL_WIFI=y |
| CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y |
| CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 |
| CONFIG_EDK2_BOOT_TIMEOUT=2 |
| CONFIG_CARDBUS_PLUGIN_SUPPORT=y |
| CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y |
| CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkCentre M710s" |
| CONFIG_DRIVER_LENOVO_SERIALS=y |
| CONFIG_PS2K_EISAID="PNP0303" |
| CONFIG_PS2M_EISAID="PNP0F13" |
| CONFIG_GFX_GMA_PANEL_1_PORT="eDP" |
| CONFIG_TTYS0_BAUD=115200 |
| CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y |
| CONFIG_D3COLD_SUPPORT=y |
| CONFIG_PCIEXP_ASPM=y |
| CONFIG_PCIEXP_L1_SUB_STATE=y |
| CONFIG_PCIEXP_CLK_PM=y |
| CONFIG_GFX_GMA_PANEL_1_ON_EDP=y |
| CONFIG_DRIVERS_UART_8250IO=y |
| CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 |
| CONFIG_EC_GPE_SCI=0x50 |
| CONFIG_EDK2_BOOTSPLASH_FILE="Documentation/coreboot_logo.bmp" |
| CONFIG_BOARD_ROMSIZE_KB_8192=y |
| CONFIG_COREBOOT_ROMSIZE_KB_8192=y |
| CONFIG_COREBOOT_ROMSIZE_KB=8192 |
| CONFIG_ROM_SIZE=0x00800000 |
| CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y |
| CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y |
| CONFIG_POWER_STATE_ON_AFTER_FAILURE=y |
| CONFIG_MAINBOARD_POWER_FAILURE_STATE=1 |
| CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb" |
| CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd" |
| CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd" |
| CONFIG_CBFS_MCACHE_SIZE=0x4000 |
| CONFIG_ROMSTAGE_ADDR=0x2000000 |
| CONFIG_VERSTAGE_ADDR=0x2000000 |
| CONFIG_SMM_TSEG_SIZE=0x800000 |
| CONFIG_SMM_RESERVED_SIZE=0x200000 |
| CONFIG_SMM_MODULE_STACK_SIZE=0x800 |
| CONFIG_ACPI_BERT_SIZE=0x0 |
| CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120 |
| CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 |
| CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000 |
| CONFIG_ACPI_CPU_STRING="CP%02X" |
| CONFIG_STACK_SIZE=0x2000 |
| CONFIG_IFD_CHIPSET="sklkbl" |
| CONFIG_IED_REGION_SIZE=0x400000 |
| CONFIG_MAX_ROOT_PORTS=24 |
| CONFIG_PCR_BASE_ADDRESS=0xfd000000 |
| CONFIG_CPU_BCLK_MHZ=100 |
| CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120 |
| CONFIG_CPU_XTAL_HZ=24000000 |
| CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2 |
| CONFIG_SOC_INTEL_I2C_DEV_MAX=6 |
| CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30 |
| CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35 |
| CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/" |
| CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd" |
| CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254 |
| CONFIG_INTEL_GMA_BCLV_WIDTH=16 |
| CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 |
| CONFIG_INTEL_GMA_BCLM_WIDTH=16 |
| CONFIG_MAX_HECI_DEVICES=5 |
| CONFIG_BOOTBLOCK_IN_CBFS=y |
| CONFIG_HAVE_PAM0_REGISTER=y |
| CONFIG_PCIEXP_COMMON_CLOCK=y |
| CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000 |
| CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10 |
| CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0 |
| CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003 |
| CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003 |
| CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 |
| CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y |
| CONFIG_SOC_INTEL_KABYLAKE=y |
| CONFIG_SKYLAKE_SOC_PCH_H=y |
| CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y |
| CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 |
| CONFIG_CBFS_CACHE_ALIGN=8 |
| CONFIG_SOC_INTEL_COMMON=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y |
| CONFIG_INTEL_CAR_NEM_ENHANCED=y |
| CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y |
| CONFIG_HAVE_HYPERTHREADING=y |
| CONFIG_FSP_HYPERTHREADING=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y |
| CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME" |
| CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A" |
| CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B" |
| CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw" |
| CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash" |
| CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version" |
| CONFIG_SOC_INTEL_CSE_RW_FILE="" |
| CONFIG_SOC_INTEL_CSE_RW_VERSION="" |
| CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom" |
| CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE="" |
| CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy" |
| CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE="" |
| CONFIG_CSE_RESET_CLEAR_EC_AP_IDLE_FLAG=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y |
| CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y |
| CONFIG_SOC_INTEL_CONFIGURE_DDI_A_4_LANES=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y |
| CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0 |
| CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y |
| CONFIG_SA_ENABLE_DPR=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y |
| CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y |
| CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y |
| CONFIG_SOC_INTEL_COMMON_PCH_BASE=y |
| CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y |
| CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y |
| CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y |
| CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y |
| CONFIG_SOC_INTEL_COMMON_BASECODE=y |
| CONFIG_SOC_INTEL_COMMON_RESET=y |
| CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y |
| CONFIG_PAVP=y |
| CONFIG_SOC_INTEL_COMMON_NHLT=y |
| CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y |
| CONFIG_CPU_INTEL_COMMON=y |
| CONFIG_ENABLE_VMX=y |
| CONFIG_SET_IA32_FC_LOCK_BIT=y |
| CONFIG_SET_MSR_AESNI_LOCK_BIT=y |
| CONFIG_CPU_INTEL_COMMON_SMM=y |
| CONFIG_RELOAD_MICROCODE_PATCH=y |
| CONFIG_PARALLEL_MP=y |
| CONFIG_PARALLEL_MP_AP_WORK=y |
| CONFIG_XAPIC_ONLY=y |
| CONFIG_UDELAY_TSC=y |
| CONFIG_TSC_MONOTONIC_TIMER=y |
| CONFIG_TSC_SYNC_MFENCE=y |
| CONFIG_HAVE_SMI_HANDLER=y |
| CONFIG_SMM_TSEG=y |
| CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8 |
| CONFIG_AP_STACK_SIZE=0x800 |
| CONFIG_SMP=y |
| CONFIG_SSE=y |
| CONFIG_SSE2=y |
| CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y |
| CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y |
| CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y |
| CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y |
| CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y |
| CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y |
| CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 |
| CONFIG_RCBA_LENGTH=0x4000 |
| CONFIG_SUPERIO_ITE_COMMON_PRE_RAM=y |
| CONFIG_SUPERIO_ITE_ENV_CTRL=y |
| CONFIG_SUPERIO_ITE_ENV_CTRL_FAN16_CONFIG=y |
| CONFIG_SUPERIO_ITE_ENV_CTRL_8BIT_PWM=y |
| CONFIG_SUPERIO_ITE_ENV_CTRL_PWM_FREQ2=y |
| CONFIG_SUPERIO_ITE_ENV_CTRL_5FANS=y |
| CONFIG_SUPERIO_ITE_ENV_CTRL_7BIT_SLOPE_REG=y |
| CONFIG_SUPERIO_ITE_ENV_CTRL_EXT_ANY_TMPIN=y |
| CONFIG_SUPERIO_ITE_IT8629E=y |
| CONFIG_UDK_BASE=y |
| CONFIG_UDK_2017_BINDING=y |
| CONFIG_UDK_2013_VERSION=2013 |
| CONFIG_UDK_2017_VERSION=2017 |
| CONFIG_UDK_202005_VERSION=202005 |
| CONFIG_UDK_202302_VERSION=202302 |
| CONFIG_UDK_VERSION=2017 |
| CONFIG_ARCH_X86=y |
| CONFIG_ARCH_BOOTBLOCK_X86_32=y |
| CONFIG_ARCH_VERSTAGE_X86_32=y |
| CONFIG_ARCH_ROMSTAGE_X86_32=y |
| CONFIG_ARCH_POSTCAR_X86_32=y |
| CONFIG_ARCH_RAMSTAGE_X86_32=y |
| CONFIG_ARCH_ALL_STAGES_X86_32=y |
| CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y |
| CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y |
| CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y |
| CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 |
| CONFIG_PC80_SYSTEM=y |
| CONFIG_POSTCAR_STAGE=y |
| CONFIG_BOOTBLOCK_SIMPLE=y |
| CONFIG_COLLECT_TIMESTAMPS_TSC=y |
| CONFIG_HAVE_CF9_RESET=y |
| CONFIG_DEBUG_HW_BREAKPOINTS=y |
| CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y |
| CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y |
| CONFIG_HAVE_LINEAR_FRAMEBUFFER=y |
| CONFIG_HAVE_FSP_GOP=y |
| CONFIG_MAINBOARD_HAS_LIBGFXINIT=y |
| CONFIG_MAINBOARD_USE_LIBGFXINIT=y |
| CONFIG_NO_EARLY_GFX_INIT=y |
| CONFIG_WANT_LINEAR_FRAMEBUFFER=y |
| CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y |
| CONFIG_LINEAR_FRAMEBUFFER=y |
| CONFIG_PCI=y |
| CONFIG_ECAM_MMCONF_SUPPORT=y |
| CONFIG_PCIX_PLUGIN_SUPPORT=y |
| CONFIG_AZALIA_HDA_CODEC_SUPPORT=y |
| CONFIG_AZALIA_LOCK_DOWN_R_WO_GCAP=y |
| CONFIG_PCIEXP_PLUGIN_SUPPORT=y |
| CONFIG_ECAM_MMCONF_LENGTH=0x10000000 |
| CONFIG_PCI_ALLOW_BUS_MASTER=y |
| CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y |
| CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y |
| CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 |
| CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 |
| CONFIG_INTEL_GMA_HAVE_VBT=y |
| CONFIG_INTEL_GMA_ADD_VBT=y |
| CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 |
| CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 |
| CONFIG_CACHE_MRC_SETTINGS=y |
| CONFIG_MRC_SETTINGS_PROTECT=y |
| CONFIG_SMMSTORE=y |
| CONFIG_SMMSTORE_V2=y |
| CONFIG_SMMSTORE_SIZE=0x40000 |
| CONFIG_SPI_FLASH=y |
| CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y |
| CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y |
| CONFIG_SPI_FLASH_SMM=y |
| CONFIG_TPM_INIT_RAMSTAGE=y |
| CONFIG_TPM_PPI=y |
| CONFIG_DRIVERS_UART=y |
| CONFIG_DRIVERS_I2C_DESIGNWARE=y |
| CONFIG_FSP_USE_REPO=y |
| CONFIG_PLATFORM_USES_FSP2_0=y |
| CONFIG_PLATFORM_USES_FSP2_X86_32=y |
| CONFIG_HAVE_INTEL_FSP_REPO=y |
| CONFIG_ADD_FSP_BINARIES=y |
| CONFIG_FSP_T_LOCATION=0xfffe0000 |
| CONFIG_FSP_S_CBFS="fsps.bin" |
| CONFIG_FSP_M_CBFS="fspm.bin" |
| CONFIG_FSP_FULL_FD=y |
| CONFIG_FSP_T_RESERVED_SIZE=0x0 |
| CONFIG_FSP_M_XIP=y |
| CONFIG_HAVE_FSP_LOGO_SUPPORT=y |
| CONFIG_FSP_COMPRESS_FSP_S_LZ4=y |
| CONFIG_FSP_STATUS_GLOBAL_RESET_REQUIRED_3=y |
| CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 |
| CONFIG_SOC_INTEL_COMMON_FSP_RESET=y |
| CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y |
| CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y |
| CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y |
| CONFIG_INTEL_GMA_ACPI=y |
| CONFIG_VBT_CBFS_COMPRESSION_LZMA=y |
| CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" |
| CONFIG_GFX_GMA=y |
| CONFIG_GFX_GMA_DYN_CPU=y |
| CONFIG_GFX_GMA_GENERATION="Skylake" |
| CONFIG_GFX_GMA_PCH="Sunrise_Point" |
| CONFIG_GFX_GMA_PANEL_2_PORT="Disabled" |
| CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC" |
| CONFIG_DRIVERS_MC146818=y |
| CONFIG_USE_PC_CMOS_ALTCENTURY=y |
| CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 |
| CONFIG_MEMORY_MAPPED_TPM=y |
| CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000 |
| CONFIG_DRIVERS_WIFI_GENERIC=y |
| CONFIG_DRIVERS_MTK_WIFI=y |
| CONFIG_TPM2=y |
| CONFIG_TPM=y |
| CONFIG_MAINBOARD_HAS_TPM2=y |
| CONFIG_PCR_BOOT_MODE=1 |
| CONFIG_PCR_HWID=1 |
| CONFIG_PCR_SRTM=2 |
| CONFIG_PCR_FW_VER=10 |
| CONFIG_PCR_RUNTIME_DATA=3 |
| CONFIG_PLATFORM_HAS_DRAM_CLEAR=y |
| CONFIG_BOOTMEDIA_LOCK_NONE=y |
| CONFIG_ACPI_HAVE_PCAT_8259=y |
| CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y |
| CONFIG_ACPI_SOC_NVS=y |
| CONFIG_ACPI_CUSTOM_MADT=y |
| CONFIG_ACPI_NO_CUSTOM_MADT=y |
| CONFIG_ACPI_COMMON_MADT_LAPIC=y |
| CONFIG_ACPI_COMMON_MADT_IOAPIC=y |
| CONFIG_HAVE_ACPI_TABLES=y |
| CONFIG_ACPI_LPIT=y |
| CONFIG_BOOT_DEVICE_SPI_FLASH=y |
| CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y |
| CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y |
| CONFIG_RTC=y |
| CONFIG_HEAP_SIZE=0x100000 |
| CONFIG_BOOTBLOCK_CONSOLE=y |
| CONFIG_POSTCAR_CONSOLE=y |
| CONFIG_SQUELCH_EARLY_SMP=y |
| CONFIG_TTYS0_BASE=0x3f8 |
| CONFIG_CONSOLE_SERIAL_115200=y |
| CONFIG_TTYS0_LCS=3 |
| CONFIG_CONSOLE_CBMEM=y |
| CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y |
| CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 |
| CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y |
| CONFIG_CONSOLE_USE_ANSI_ESCAPES=y |
| CONFIG_POST_DEVICE_NONE=y |
| CONFIG_POST_IO_PORT=0x80 |
| CONFIG_HWBASE_DEBUG_CB=y |
| CONFIG_ACPI_S1_NOT_SUPPORTED=y |
| CONFIG_HAVE_ACPI_RESUME=y |
| CONFIG_RESUME_PATH_SAME_AS_BOOT=y |
| CONFIG_HAVE_MONOTONIC_TIMER=y |
| CONFIG_IOAPIC=y |
| CONFIG_ACPI_NHLT=y |
| CONFIG_GENERATE_SMBIOS_TABLES=y |
| CONFIG_SMBIOS_PROVIDED_BY_MOBO=y |
| CONFIG_BIOS_VENDOR="coreboot" |
| CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" |
| CONFIG_PAYLOAD_FILE="build/UEFIPAYLOAD.fd" |
| CONFIG_PAYLOAD_OPTIONS="" |
| CONFIG_EDK2_UEFIPAYLOAD=y |
| CONFIG_EDK2_REPOSITORY="https://github.com/tianocore/edk2" |
| CONFIG_EDK2_TAG_OR_REV="origin/master" |
| CONFIG_EDK2_RELEASE=y |
| CONFIG_EDK2_CPU_TIMER_LIB=y |
| CONFIG_EDK2_FULL_SCREEN_SETUP=y |
| CONFIG_EDK2_SD_MMC_TIMEOUT=10 |
| CONFIG_EDK2_CUSTOM_BUILD_PARAMS="" |
| CONFIG_COMPRESSED_PAYLOAD_LZMA=y |
| CONFIG_COMPRESS_SECONDARY_PAYLOAD=y |
| CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y |
| CONFIG_HAVE_DEBUG_GPIO=y |
| CONFIG_HAVE_DEBUG_SMBUS=y |
| CONFIG_RAMSTAGE_ADA=y |
| CONFIG_RAMSTAGE_LIBHWBASE=y |
| CONFIG_HWBASE_DYNAMIC_MMIO=y |
| CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 |
| CONFIG_HWBASE_DIRECT_PCIDEV=y |
| CONFIG_DECOMPRESS_OFAST=y |
| CONFIG_WARNINGS_ARE_ERRORS=y |
| CONFIG_MAX_REBOOT_CNT=3 |
| CONFIG_RELOCATABLE_MODULES=y |
| CONFIG_GENERIC_GPIO_LIB=y |
| CONFIG_HAVE_BOOTBLOCK=y |
| CONFIG_HAVE_ROMSTAGE=y |
| CONFIG_HAVE_RAMSTAGE=y |