| *** Pre-CBMEM romstage console overflowed, log truncated! *** |
| |
| Starting Ivy Bridge RAM training (full initialization). |
| 100MHz reference clock support: yes |
| PLL_REF100_CFG value: 0x7 |
| Trying CAS 11, tCK 320. |
| Found compatible clock, CAS pair. |
| Selected DRAM frequency: 800 MHz |
| Selected CAS latency : 11T |
| MPLL busy... done in 70 us |
| MPLL frequency is set at : 800 MHz |
| Selected CWL latency : 8T |
| Selected tRCD : 11T |
| Selected tRP : 11T |
| Selected tRAS : 28T |
| Selected tWR : 12T |
| Selected tFAW : 24T |
| Selected tRRD : 5T |
| Selected tRTP : 6T |
| Selected tWTR : 6T |
| Selected tRFC : 128T |
| Done dimm mapping |
| Update PCI-E configuration space: |
| PCI(0, 0, 0)[a0] = 0 |
| PCI(0, 0, 0)[a4] = 1 |
| PCI(0, 0, 0)[bc] = 82a00000 |
| PCI(0, 0, 0)[a8] = 7d600000 |
| PCI(0, 0, 0)[ac] = 1 |
| PCI(0, 0, 0)[b8] = 80000000 |
| PCI(0, 0, 0)[b0] = 80a00000 |
| PCI(0, 0, 0)[b4] = 80800000 |
| Done memory map |
| Done io registers |
| Done jedec reset |
| Done MRS commands |
| Logic delay 2 greater than 1: 0 0 |
| Logic delay 2 greater than 1: 0 1 |
| t123: 1767, 6000, 7620 |
| ME: Wrong mode : 2 |
| ME: FWS2: 0x100a0140 |
| ME: Bist in progress: 0x0 |
| ME: ICC Status : 0x0 |
| ME: Invoke MEBx : 0x0 |
| ME: CPU replaced : 0x0 |
| ME: MBP ready : 0x0 |
| ME: MFS failure : 0x1 |
| ME: Warm reset req : 0x0 |
| ME: CPU repl valid : 0x1 |
| ME: (Reserved) : 0x0 |
| ME: FW update req : 0x0 |
| ME: (Reserved) : 0x0 |
| ME: Current state : 0xa |
| ME: Current PM event: 0x0 |
| ME: Progress code : 0x1 |
| PASSED! Tell ME that DRAM is ready |
| ME: ME is reporting as disabled, so not waiting for a response. |
| ME: FWS2: 0x100a0140 |
| ME: Bist in progress: 0x0 |
| ME: ICC Status : 0x0 |
| ME: Invoke MEBx : 0x0 |
| ME: CPU replaced : 0x0 |
| ME: MBP ready : 0x0 |
| ME: MFS failure : 0x1 |
| ME: Warm reset req : 0x0 |
| ME: CPU repl valid : 0x1 |
| ME: (Reserved) : 0x0 |
| ME: FW update req : 0x0 |
| ME: (Reserved) : 0x0 |
| ME: Current state : 0xa |
| ME: Current PM event: 0x0 |
| ME: Progress code : 0x1 |
| ME: Requested BIOS Action: No DID Ack received |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : YES |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Initializing |
| ME: Current Operation State : Bring up |
| ME: Current Operation Mode : Debug or Disabled by AltDisableBit |
| ME: Error Code : No Error |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Clean Moff->Mx wake |
| ME: Progress Phase State : Check to see if straps say ME DISABLED |
| memcfg DDR3 ref clock 133 MHz |
| memcfg DDR3 clock 1596 MHz |
| memcfg channel assignment: A: 0, B 1, C 2 |
| memcfg channel[0] config (00620010): |
| ECC inactive |
| enhanced interleave mode on |
| rank interleave on |
| DIMMA 4096 MB width x8 dual rank, selected |
| DIMMB 0 MB width x8 single rank |
| memcfg channel[1] config (00000000): |
| ECC inactive |
| enhanced interleave mode off |
| rank interleave off |
| DIMMA 0 MB width x8 single rank, selected |
| DIMMB 0 MB width x8 single rank |
| CBMEM: |
| IMD: root @ 0x7ffff000 254 entries. |
| IMD: root @ 0x7fffec00 62 entries. |
| External stage cache: |
| IMD: root @ 0x803ff000 254 entries. |
| IMD: root @ 0x803fec00 62 entries. |
| CBMEM entry for DIMM info: 0x7ffda000 |
| SMM Memory Map |
| SMRAM : 0x80000000 0x800000 |
| Subregion 0: 0x80000000 0x300000 |
| Subregion 1: 0x80300000 0x100000 |
| Subregion 2: 0x80400000 0x400000 |
| MTRR Range: Start=7f800000 End=80000000 (Size 800000) |
| MTRR Range: Start=80000000 End=80800000 (Size 800000) |
| MTRR Range: Start=ff000000 End=0 (Size 1000000) |
| Normal boot |
| CBFS: Found 'fallback/postcar' @0x47780 size 0x5130 in mcache @0xfeff106c |
| Loading module at 0x7ffcf000 with entry 0x7ffcf031. filesize: 0x4d68 memsize: 0x9078 |
| Processing 226 relocs. Offset value of 0x7dfcf000 |
| BS: romstage times (exec / console): total (unknown) / 2 ms |
| |
| |
| coreboot-4.15-543-g74d2218cc7 Wed Dec 15 23:26:06 UTC 2021 postcar starting (log level: 7)... |
| Normal boot |
| CBFS: Found 'fallback/ramstage' @0x19f80 size 0x1e55a in mcache @0x7ffdd0dc |
| Loading module at 0x7ff77000 with entry 0x7ff77000. filesize: 0x3cb98 memsize: 0x56690 |
| Processing 4342 relocs. Offset value of 0x7f177000 |
| BS: postcar times (exec / console): total (unknown) / 0 ms |
| |
| |
| coreboot-4.15-543-g74d2218cc7 Wed Dec 15 23:26:06 UTC 2021 ramstage starting (log level: 7)... |
| Normal boot |
| Enumerating buses... |
| Root Device scanning... |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| DOMAIN: 0000 scanning... |
| PCI: pci_scan_bus for bus 00 |
| PCI: 00:00.0 [8086/0154] enabled |
| PCI: Static device PCI: 00:01.0 not found, disabling it. |
| PCI: 00:02.0 [8086/0166] enabled |
| PCI: 00:04.0 [8086/0153] enabled |
| PCI: 00:14.0 [8086/1e31] enabled |
| PCI: 00:16.0 [8086/1e3a] enabled |
| PCI: 00:16.1: Disabling device |
| PCI: 00:16.2: Disabling device |
| PCI: 00:16.3: Disabling device |
| PCI: 00:19.0 [8086/1502] enabled |
| PCI: 00:1a.0 [8086/1e2d] enabled |
| PCI: 00:1b.0 [8086/1e20] enabled |
| PCH: PCIe Root Port coalescing is enabled |
| PCI: 00:1c.0 [8086/1e10] enabled |
| PCI: 00:1c.1 [8086/1e12] enabled |
| PCI: 00:1c.2 [8086/1e14] enabled |
| PCI: 00:1c.3: Disabling device |
| PCI: 00:1c.3 [8086/1e16] disabled |
| PCI: 00:1c.4: Disabling device |
| PCI: 00:1c.4: check set enabled |
| PCI: 00:1c.5: Disabling device |
| PCI: 00:1c.6: Disabling device |
| PCI: 00:1c.7: Disabling device |
| PCI: 00:1d.0 [8086/1e26] enabled |
| PCI: 00:1e.0: Disabling device |
| PCI: 00:1e.0 [8086/2448] disabled |
| PCI: 00:1f.0 [8086/1e55] enabled |
| PCI: 00:1f.2 [8086/1e01] enabled |
| PCI: 00:1f.3 [8086/1e22] enabled |
| PCI: 00:1f.5: Disabling device |
| PCI: 00:1f.5 [8086/1e09] disabled No operations |
| PCI: 00:1f.6 [8086/1e24] enabled |
| PCI: Leftover static devices: |
| PCI: 00:01.0 |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:1c.4 |
| PCI: 00:1c.5 |
| PCI: 00:1c.6 |
| PCI: 00:1c.7 |
| PCI: Check your devicetree.cb. |
| PCI: 00:1c.0 scanning... |
| PCI: 00:1c.0: No LTR support |
| PCI: pci_scan_bus for bus 01 |
| PCI: 01:00.0 [1180/e823] enabled |
| PCI: 01:00.1 [1180/e232] enabled |
| PCI: 01:00.2 [1180/e852] enabled |
| PCI: 01:00.3 [1180/e832] enabled |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| PCIe: Max_Payload_Size adjusted to 128 |
| PCI: 01:00.0: No LTR support |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| PCIe: Max_Payload_Size adjusted to 128 |
| PCI: 01:00.1: No LTR support |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| PCIe: Max_Payload_Size adjusted to 128 |
| PCI: 01:00.2: No LTR support |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| PCIe: Max_Payload_Size adjusted to 128 |
| PCI: 01:00.3: No LTR support |
| scan_bus: bus PCI: 00:1c.0 finished in 0 msecs |
| PCI: 00:1c.1 scanning... |
| PCI: 00:1c.1: No LTR support |
| PCI: pci_scan_bus for bus 02 |
| PCI: 02:00.0 [168c/002a] enabled |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| PCIe: Max_Payload_Size adjusted to 128 |
| PCI: 02:00.0: No LTR support |
| scan_bus: bus PCI: 00:1c.1 finished in 0 msecs |
| PCI: 00:1c.2 scanning... |
| PCI: 00:1c.2: No LTR support |
| PCI: pci_scan_bus for bus 03 |
| scan_bus: bus PCI: 00:1c.2 finished in 0 msecs |
| PCI: 00:1f.0 scanning... |
| PMH7: ID 05 Revision 00 |
| PNP: 00ff.1 enabled |
| PNP: 0c31.0 enabled |
| H8: EC Firmware ID G4HT40WW-3.22, Version 4.01B |
| H8: BDC not installed |
| H8: WWAN not installed |
| PNP: 00ff.2 enabled |
| Hybrid graphics: Switching panel to integrated GPU. |
| PNP: 00ff.f disabled |
| scan_bus: bus PCI: 00:1f.0 finished in 4 msecs |
| PCI: 00:1f.3 scanning... |
| I2C: 01:54 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled |
| bus: PCI: 00:1f.3[0]->scan_bus: bus PCI: 00:1f.3 finished in 0 msecs |
| scan_bus: bus DOMAIN: 0000 finished in 5 msecs |
| scan_bus: bus Root Device finished in 6 msecs |
| done |
| BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 0 ms |
| FMAP: area RW_MRC_CACHE found @ 800000 (65536 bytes) |
| FMAP: area RW_MRC_CACHE found @ 800000 (65536 bytes) |
| MRC: Checking cached data update for 'RW_MRC_CACHE'. |
| flash size 0xc00000 bytes |
| SF: Detected 00 0000 with sector size 0x100, total 0xc00000 |
| MRC: no data in 'RW_MRC_CACHE' |
| MRC: cache data 'RW_MRC_CACHE' needs update. |
| SF: Successfully written 2 bytes @ 0x800000 |
| SF: Successfully written 2 bytes @ 0x800002 |
| SF: Successfully written 16 bytes @ 0x800050 |
| SF: Successfully written 1588 bytes @ 0x800060 |
| MRC: updated 'RW_MRC_CACHE'. |
| BS: BS_DEV_ENUMERATE exit times (exec / console): 19 / 0 ms |
| found VGA at PCI: 00:02.0 |
| Setting up VGA for PCI: 00:02.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| Allocating resources... |
| Reading resources... |
| Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000. |
| TOUUD 0x17d600000 TOLUD 0x82a00000 TOM 0x100000000 |
| MEBASE 0x7ffff00000 |
| IGD decoded, subtracting 32M UMA and 2M GTT |
| TSEG base 0x80000000 size 8M |
| Available memory below 4GB: 2048M |
| Available memory above 4GB: 2006M |
| PNP: 00ff.1 missing read_resources |
| PNP: 00ff.2 missing read_resources |
| Done reading resources. |
| === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) === |
| PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 01:00.3 10 * [0x0 - 0x7ff] mem |
| PCI: 01:00.0 10 * [0x1000 - 0x10ff] mem |
| PCI: 01:00.1 10 * [0x2000 - 0x20ff] mem |
| PCI: 01:00.2 10 * [0x3000 - 0x30ff] mem |
| PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 02:00.0 10 * [0x0 - 0xffff] mem |
| PCI: 00:1c.1 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.2 io: size: 0 align: 12 gran: 12 limit: ffff |
| NONE 18 * [0x0 - 0x1fff] io |
| PCI: 00:1c.2 io: size: 2000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff |
| NONE 10 * [0x0 - 0x7fffff] mem |
| PCI: 00:1c.2 mem: size: 800000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| NONE 14 * [0x0 - 0xfffffff] prefmem |
| PCI: 00:1c.2 prefmem: size: 10000000 align: 20 gran: 20 limit: ffffffffffffffff done |
| === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) === |
| DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff |
| update_constraints: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed) |
| update_constraints: PCI: 00:1f.0 10000200 base 00001600 limit 0000167b io (fixed) |
| update_constraints: PCI: 00:1f.0 10000300 base 000015e0 limit 000015eb io (fixed) |
| update_constraints: PNP: 00ff.1 77 base 000015e0 limit 000015ef io (fixed) |
| update_constraints: PCI: 00:1f.3 20 base 00000400 limit 0000041f io (fixed) |
| DOMAIN: 0000: Resource ranges: |
| * Base: 1000, Size: 5e0, Tag: 100 |
| * Base: 15f0, Size: 10, Tag: 100 |
| * Base: 167c, Size: e984, Tag: 100 |
| PCI: 00:1c.2 1c * [0x2000 - 0x3fff] limit: 3fff io |
| PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io |
| PCI: 00:19.0 18 * [0x1040 - 0x105f] limit: 105f io |
| PCI: 00:1f.2 20 * [0x1060 - 0x107f] limit: 107f io |
| PCI: 00:1f.2 10 * [0x1080 - 0x1087] limit: 1087 io |
| PCI: 00:1f.2 18 * [0x1088 - 0x108f] limit: 108f io |
| PCI: 00:1f.2 14 * [0x1090 - 0x1093] limit: 1093 io |
| PCI: 00:1f.2 1c * [0x1094 - 0x1097] limit: 1097 io |
| DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done |
| DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff |
| update_constraints: PCI: 00:00.0 60 base f0000000 limit f3ffffff mem (fixed) |
| update_constraints: PCI: 00:00.0 03 base 00000000 limit 0009ffff mem (fixed) |
| update_constraints: PCI: 00:00.0 04 base 00100000 limit 7fffffff mem (fixed) |
| update_constraints: PCI: 00:00.0 05 base 100000000 limit 17d5fffff mem (fixed) |
| update_constraints: PCI: 00:00.0 06 base 80000000 limit 829fffff mem (fixed) |
| update_constraints: PCI: 00:00.0 07 base 000a0000 limit 000bffff mem (fixed) |
| update_constraints: PCI: 00:00.0 08 base 000c0000 limit 000fffff mem (fixed) |
| update_constraints: PCI: 00:1f.0 10000100 base ff000000 limit ffffffff mem (fixed) |
| update_constraints: PCI: 00:1f.0 03 base fec00000 limit fec00fff mem (fixed) |
| update_constraints: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed) |
| DOMAIN: 0000: Resource ranges: |
| * Base: 82a00000, Size: 6d600000, Tag: 200 |
| * Base: f4000000, Size: ac00000, Tag: 200 |
| * Base: fec01000, Size: 13f000, Tag: 200 |
| * Base: fed45000, Size: 2bb000, Tag: 200 |
| * Base: 17d600000, Size: e82a00000, Tag: 100200 |
| PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem |
| PCI: 00:02.0 10 * [0x82c00000 - 0x82ffffff] limit: 82ffffff mem |
| PCI: 00:1c.2 20 * [0x83000000 - 0x837fffff] limit: 837fffff mem |
| PCI: 00:1c.0 20 * [0x82a00000 - 0x82afffff] limit: 82afffff mem |
| PCI: 00:1c.1 20 * [0x82b00000 - 0x82bfffff] limit: 82bfffff mem |
| PCI: 00:19.0 10 * [0x83800000 - 0x8381ffff] limit: 8381ffff mem |
| PCI: 00:14.0 10 * [0x83820000 - 0x8382ffff] limit: 8382ffff mem |
| PCI: 00:04.0 10 * [0x83830000 - 0x83837fff] limit: 83837fff mem |
| PCI: 00:1b.0 10 * [0x83838000 - 0x8383bfff] limit: 8383bfff mem |
| PCI: 00:19.0 14 * [0x8383c000 - 0x8383cfff] limit: 8383cfff mem |
| PCI: 00:1f.6 10 * [0x8383d000 - 0x8383dfff] limit: 8383dfff mem |
| PCI: 00:1f.2 24 * [0x8383e000 - 0x8383e7ff] limit: 8383e7ff mem |
| PCI: 00:1a.0 10 * [0x8383f000 - 0x8383f3ff] limit: 8383f3ff mem |
| PCI: 00:1d.0 10 * [0x83840000 - 0x838403ff] limit: 838403ff mem |
| PCI: 00:1f.3 10 * [0x83841000 - 0x838410ff] limit: 838410ff mem |
| PCI: 00:16.0 10 * [0x83842000 - 0x8384200f] limit: 8384200f mem |
| PCI: 00:1c.2 24 * [0x17d600000 - 0x18d5fffff] limit: 18d5fffff prefmem |
| DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff done |
| PCI: 00:1c.0 mem: base: 82a00000 size: 100000 align: 20 gran: 20 limit: 82afffff |
| PCI: 00:1c.0: Resource ranges: |
| * Base: 82a00000, Size: 100000, Tag: 200 |
| PCI: 01:00.3 10 * [0x82a00000 - 0x82a007ff] limit: 82a007ff mem |
| PCI: 01:00.0 10 * [0x82a01000 - 0x82a010ff] limit: 82a010ff mem |
| PCI: 01:00.1 10 * [0x82a02000 - 0x82a020ff] limit: 82a020ff mem |
| PCI: 01:00.2 10 * [0x82a03000 - 0x82a030ff] limit: 82a030ff mem |
| PCI: 00:1c.0 mem: base: 82a00000 size: 100000 align: 20 gran: 20 limit: 82afffff done |
| PCI: 00:1c.1 mem: base: 82b00000 size: 100000 align: 20 gran: 20 limit: 82bfffff |
| PCI: 00:1c.1: Resource ranges: |
| * Base: 82b00000, Size: 100000, Tag: 200 |
| PCI: 02:00.0 10 * [0x82b00000 - 0x82b0ffff] limit: 82b0ffff mem |
| PCI: 00:1c.1 mem: base: 82b00000 size: 100000 align: 20 gran: 20 limit: 82bfffff done |
| PCI: 00:1c.2 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff |
| PCI: 00:1c.2: Resource ranges: |
| * Base: 2000, Size: 2000, Tag: 100 |
| NONE 18 * [0x2000 - 0x3fff] limit: 3fff io |
| PCI: 00:1c.2 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff done |
| PCI: 00:1c.2 prefmem: base: 17d600000 size: 10000000 align: 20 gran: 20 limit: 18d5fffff |
| PCI: 00:1c.2: Resource ranges: |
| * Base: 17d600000, Size: 10000000, Tag: 1200 |
| NONE 14 * [0x17d600000 - 0x18d5fffff] limit: 18d5fffff prefmem |
| PCI: 00:1c.2 prefmem: base: 17d600000 size: 10000000 align: 20 gran: 20 limit: 18d5fffff done |
| PCI: 00:1c.2 mem: base: 83000000 size: 800000 align: 20 gran: 20 limit: 837fffff |
| PCI: 00:1c.2: Resource ranges: |
| * Base: 83000000, Size: 800000, Tag: 200 |
| NONE 10 * [0x83000000 - 0x837fffff] limit: 837fffff mem |
| PCI: 00:1c.2 mem: base: 83000000 size: 800000 align: 20 gran: 20 limit: 837fffff done |
| === Resource allocator: DOMAIN: 0000 - resource allocation complete === |
| PCI: 00:02.0 10 <- [0x0082c00000 - 0x0082ffffff] size 0x00400000 gran 0x16 mem64 |
| PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64 |
| PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io |
| PCI: 00:04.0 10 <- [0x0083830000 - 0x0083837fff] size 0x00008000 gran 0x0f mem64 |
| PCI: 00:14.0 10 <- [0x0083820000 - 0x008382ffff] size 0x00010000 gran 0x10 mem64 |
| PCI: 00:16.0 10 <- [0x0083842000 - 0x008384200f] size 0x00000010 gran 0x04 mem64 |
| PCI: 00:19.0 10 <- [0x0083800000 - 0x008381ffff] size 0x00020000 gran 0x11 mem |
| PCI: 00:19.0 14 <- [0x008383c000 - 0x008383cfff] size 0x00001000 gran 0x0c mem |
| PCI: 00:19.0 18 <- [0x0000001040 - 0x000000105f] size 0x00000020 gran 0x05 io |
| PCI: 00:1a.0 10 <- [0x008383f000 - 0x008383f3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1b.0 10 <- [0x0083838000 - 0x008383bfff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io |
| PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem |
| PCI: 00:1c.0 20 <- [0x0082a00000 - 0x0082afffff] size 0x00100000 gran 0x14 bus 01 mem |
| PCI: 01:00.0 10 <- [0x0082a01000 - 0x0082a010ff] size 0x00000100 gran 0x08 mem |
| PCI: 01:00.1 10 <- [0x0082a02000 - 0x0082a020ff] size 0x00000100 gran 0x08 mem |
| PCI: 01:00.2 10 <- [0x0082a03000 - 0x0082a030ff] size 0x00000100 gran 0x08 mem |
| PCI: 01:00.3 10 <- [0x0082a00000 - 0x0082a007ff] size 0x00000800 gran 0x0b mem |
| PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io |
| PCI: 00:1c.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem |
| PCI: 00:1c.1 20 <- [0x0082b00000 - 0x0082bfffff] size 0x00100000 gran 0x14 bus 02 mem |
| PCI: 02:00.0 10 <- [0x0082b00000 - 0x0082b0ffff] size 0x00010000 gran 0x10 mem64 |
| PCI: 00:1c.2 1c <- [0x0000002000 - 0x0000003fff] size 0x00002000 gran 0x0c bus 03 io |
| PCI: 00:1c.2 24 <- [0x017d600000 - 0x018d5fffff] size 0x10000000 gran 0x14 bus 03 prefmem |
| PCI: 00:1c.2 20 <- [0x0083000000 - 0x00837fffff] size 0x00800000 gran 0x14 bus 03 mem |
| NONE missing set_resources |
| PCI: 00:1d.0 10 <- [0x0083840000 - 0x00838403ff] size 0x00000400 gran 0x0a mem |
| PNP: 00ff.1 missing set_resources |
| PNP: 00ff.2 missing set_resources |
| PCI: 00:1f.2 10 <- [0x0000001080 - 0x0000001087] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 14 <- [0x0000001090 - 0x0000001093] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 18 <- [0x0000001088 - 0x000000108f] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 1c <- [0x0000001094 - 0x0000001097] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 20 <- [0x0000001060 - 0x000000107f] size 0x00000020 gran 0x05 io |
| PCI: 00:1f.2 24 <- [0x008383e000 - 0x008383e7ff] size 0x00000800 gran 0x0b mem |
| PCI: 00:1f.3 10 <- [0x0083841000 - 0x00838410ff] size 0x00000100 gran 0x08 mem64 |
| PCI: 00:1f.6 10 <- [0x008383d000 - 0x008383dfff] size 0x00001000 gran 0x0c mem64 |
| Done setting resources. |
| Done allocating resources. |
| BS: BS_DEV_RESOURCES run times (exec / console): 2 / 0 ms |
| Enabling resources... |
| PCI: 00:00.0 subsystem <- 8086/0154 |
| PCI: 00:00.0 cmd <- 06 |
| PCI: 00:02.0 subsystem <- 8086/0166 |
| PCI: 00:02.0 cmd <- 03 |
| PCI: 00:04.0 cmd <- 02 |
| PCI: 00:14.0 subsystem <- 8086/1e31 |
| PCI: 00:14.0 cmd <- 102 |
| PCI: 00:16.0 subsystem <- 8086/1e3a |
| PCI: 00:16.0 cmd <- 02 |
| PCI: 00:19.0 subsystem <- 17aa/21f3 |
| PCI: 00:19.0 cmd <- 103 |
| PCI: 00:1a.0 subsystem <- 8086/1e2d |
| PCI: 00:1a.0 cmd <- 102 |
| PCI: 00:1b.0 subsystem <- 8086/1e20 |
| PCI: 00:1b.0 cmd <- 102 |
| PCI: 00:1c.0 bridge ctrl <- 0013 |
| PCI: 00:1c.0 subsystem <- 8086/1e10 |
| PCI: 00:1c.0 cmd <- 106 |
| PCI: 00:1c.1 bridge ctrl <- 0013 |
| PCI: 00:1c.1 subsystem <- 8086/1e12 |
| PCI: 00:1c.1 cmd <- 106 |
| PCI: 00:1c.2 bridge ctrl <- 0013 |
| PCI: 00:1c.2 subsystem <- 8086/1e14 |
| PCI: 00:1c.2 cmd <- 107 |
| PCI: 00:1d.0 subsystem <- 8086/1e26 |
| PCI: 00:1d.0 cmd <- 102 |
| PCI: 00:1f.0 subsystem <- 8086/1e55 |
| PCI: 00:1f.0 cmd <- 107 |
| PCI: 00:1f.2 subsystem <- 8086/1e03 |
| PCI: 00:1f.2 cmd <- 03 |
| PCI: 00:1f.3 subsystem <- 8086/1e22 |
| PCI: 00:1f.3 cmd <- 103 |
| PCI: 00:1f.6 subsystem <- 8086/1e24 |
| PCI: 00:1f.6 cmd <- 02 |
| PCI: 01:00.0 cmd <- 06 |
| PCI: 01:00.1 cmd <- 06 |
| PCI: 01:00.2 cmd <- 06 |
| PCI: 01:00.3 cmd <- 02 |
| PCI: 02:00.0 cmd <- 02 |
| done. |
| Found TPM ST33ZP24 by ST Microelectronics |
| TPM: Startup |
| TPM: command 0x99 returned 0x0 |
| TPM: Asserting physical presence |
| TPM: command 0x4000000a returned 0x0 |
| TPM: command 0x65 returned 0x801 |
| TPM: Continue self test |
| TPM: command 0x53 returned 0x0 |
| TPM: command 0x65 returned 0x0 |
| TPM: flags disable=0, deactivated=0, nvlocked=1 |
| TPM: setup succeeded |
| BS: BS_DEV_INIT entry times (exec / console): 106 / 0 ms |
| Initializing devices... |
| CPU_CLUSTER: 0 init |
| MTRR: Physical address space: |
| 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 |
| 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 |
| 0x00000000000c0000 - 0x0000000080000000 size 0x7ff40000 type 6 |
| 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 0 |
| 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1 |
| 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0 |
| 0x0000000100000000 - 0x000000017d600000 size 0x7d600000 type 6 |
| 0x000000017d600000 - 0x000000018d600000 size 0x10000000 type 0 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| CPU physical address size: 36 bits |
| MTRR: default type WB/UC MTRR counts: 12/6. |
| MTRR: UC selected as default type. |
| MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6 |
| MTRR: 1 base 0x0000000090000000 mask 0x0000000ff0000000 type 1 |
| MTRR: 2 base 0x0000000100000000 mask 0x0000000f80000000 type 6 |
| MTRR: 3 base 0x000000017d600000 mask 0x0000000fffe00000 type 0 |
| MTRR: 4 base 0x000000017d800000 mask 0x0000000fff800000 type 0 |
| MTRR: 5 base 0x000000017e000000 mask 0x0000000ffe000000 type 0 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| CPU has 4 cores, 8 threads enabled. |
| Setting up SMI for CPU |
| Will perform SMM setup. |
| CBFS: Found 'cpu_microcode_blob.bin' @0x13740 size 0x6800 in mcache @0x7ffdd0ac |
| microcode: sig=0x306a9 pf=0x10 revision=0x21 |
| CPU: Intel(R) Core(TM) i7-3630QM CPU @ 2.40GHz. |
| Setting up local APIC 0x0 |
| Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178 |
| Processing 18 relocs. Offset value of 0x00030000 |
| Attempting to start 7 APs |
| Starting CPUs in xapic mode |
| Waiting for 10ms after sending INIT. |
| Waiting for SIPI to complete... |
| done. |
| Waiting for SIPI to complete... |
| Setting up local APIC 0x1 |
| done. |
| AP: slot 1 apic_id 1, MCU rev: 0x00000021 |
| Setting up local APIC 0x5 |
| AP: slot 2 apic_id 5, MCU rev: 0x00000021 |
| Setting up local APIC 0x4 |
| Setting up local APIC 0x2 |
| AP: slot 3 apic_id 4, MCU rev: 0x00000021 |
| AP: slot 6 apic_id 2, MCU rev: 0x00000021 |
| Setting up local APIC 0x7 |
| Setting up local APIC 0x6 |
| AP: slot 5 apic_id 7, MCU rev: 0x00000021 |
| AP: slot 4 apic_id 6, MCU rev: 0x00000021 |
| Setting up local APIC 0x3 |
| AP: slot 7 apic_id 3, MCU rev: 0x00000021 |
| smm_stub_place_stacks: cpus: 8 : stack space: needed -> 2000 |
| smm_stub_place_stacks: exit, stack_top 0x80002000 |
| Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1e8 memsize: 0x1e8 |
| Processing 11 relocs. Offset value of 0x00038000 |
| smm_module_setup_stub: stack_end = 0x80000000 |
| smm_module_setup_stub: stack_top = 0x80002000 |
| smm_module_setup_stub: stack_size = 0x400 |
| smm_module_setup_stub: runtime.start32_offset = 0x4c |
| smm_module_setup_stub: runtime.smm_size = 0x10000 |
| SMM Module: stub loaded at 0x00038000. Will call 0x7ff983df |
| Installing permanent SMM handler to 0x80000000 |
| smm_load_module: total_smm_space_needed 8fe8, available -> 300000 |
| Loading module at 0x802fa000 with entry 0x802fa74b. filesize: 0x1fa0 memsize: 0x5fe8 |
| Processing 93 relocs. Offset value of 0x802fa000 |
| smm_load_module: smram_start: 0x0x80000000 |
| smm_load_module: smram_end: 0x80300000 |
| smm_load_module: stack_top: 0x80002000 |
| smm_load_module: handler start 0x802fa74b |
| smm_load_module: handler_size 6fd0 |
| smm_load_module: fxsave_area 0x802ff000 |
| smm_load_module: fxsave_size 1000 |
| smm_load_module: CONFIG_MSEG_SIZE 0x0 |
| smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0 |
| smm_load_module: handler_mod_params.smbase = 0x80000000 |
| smm_load_module: per_cpu_save_state_size = 0x400 |
| smm_load_module: num_cpus = 0x8 |
| smm_load_module: total_save_state_size = 0x2000 |
| smm_load_module: cpu0 entry: 0x802ea000 |
| smm_create_map: cpus allowed in one segment 30 |
| smm_create_map: min # of segments needed 1 |
| CPU 0x0 |
| smbase 802ea000 entry 802f2000 |
| ss_start 802f9c00 code_end 802f21e8 |
| CPU 0x1 |
| smbase 802e9c00 entry 802f1c00 |
| ss_start 802f9800 code_end 802f1de8 |
| CPU 0x2 |
| smbase 802e9800 entry 802f1800 |
| ss_start 802f9400 code_end 802f19e8 |
| CPU 0x3 |
| smbase 802e9400 entry 802f1400 |
| ss_start 802f9000 code_end 802f15e8 |
| CPU 0x4 |
| smbase 802e9000 entry 802f1000 |
| ss_start 802f8c00 code_end 802f11e8 |
| CPU 0x5 |
| smbase 802e8c00 entry 802f0c00 |
| ss_start 802f8800 code_end 802f0de8 |
| CPU 0x6 |
| smbase 802e8800 entry 802f0800 |
| ss_start 802f8400 code_end 802f09e8 |
| CPU 0x7 |
| smbase 802e8400 entry 802f0400 |
| ss_start 802f8000 code_end 802f05e8 |
| smm_stub_place_stacks: cpus: 8 : stack space: needed -> 2000 |
| smm_stub_place_stacks: exit, stack_top 0x80002000 |
| Loading module at 0x802f2000 with entry 0x802f2000. filesize: 0x1e8 memsize: 0x1e8 |
| Processing 11 relocs. Offset value of 0x802f2000 |
| smm_place_entry_code: smbase 802e8400, stack_top 80002000 |
| SMM Module: placing smm entry code at 802f1c00, cpu # 0x1 |
| smm_place_entry_code: copying from 802f2000 to 802f1c00 0x1e8 bytes |
| SMM Module: placing smm entry code at 802f1800, cpu # 0x2 |
| smm_place_entry_code: copying from 802f2000 to 802f1800 0x1e8 bytes |
| SMM Module: placing smm entry code at 802f1400, cpu # 0x3 |
| smm_place_entry_code: copying from 802f2000 to 802f1400 0x1e8 bytes |
| SMM Module: placing smm entry code at 802f1000, cpu # 0x4 |
| smm_place_entry_code: copying from 802f2000 to 802f1000 0x1e8 bytes |
| SMM Module: placing smm entry code at 802f0c00, cpu # 0x5 |
| smm_place_entry_code: copying from 802f2000 to 802f0c00 0x1e8 bytes |
| SMM Module: placing smm entry code at 802f0800, cpu # 0x6 |
| smm_place_entry_code: copying from 802f2000 to 802f0800 0x1e8 bytes |
| SMM Module: placing smm entry code at 802f0400, cpu # 0x7 |
| smm_place_entry_code: copying from 802f2000 to 802f0400 0x1e8 bytes |
| smm_module_setup_stub: stack_end = 0x80000000 |
| smm_module_setup_stub: stack_top = 0x80002000 |
| smm_module_setup_stub: stack_size = 0x400 |
| smm_module_setup_stub: runtime.start32_offset = 0x4c |
| smm_module_setup_stub: runtime.smm_size = 0x300000 |
| SMM Module: stub loaded at 0x802f2000. Will call 0x802fa74b |
| Initializing southbridge SMI... |
| smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ea000, cpu = 0 |
| In relocation handler: cpu 0 |
| New SMBASE=0x802ea000 IEDBASE=0x80400000 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802e9c00, cpu = 1 |
| In relocation handler: cpu 1 |
| New SMBASE=0x802e9c00 IEDBASE=0x80400000 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802e8400, cpu = 7 |
| In relocation handler: cpu 7 |
| New SMBASE=0x802e8400 IEDBASE=0x80400000 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802e8800, cpu = 6 |
| In relocation handler: cpu 6 |
| New SMBASE=0x802e8800 IEDBASE=0x80400000 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802e9400, cpu = 3 |
| In relocation handler: cpu 3 |
| New SMBASE=0x802e9400 IEDBASE=0x80400000 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802e9800, cpu = 2 |
| In relocation handler: cpu 2 |
| New SMBASE=0x802e9800 IEDBASE=0x80400000 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802e9000, cpu = 4 |
| In relocation handler: cpu 4 |
| New SMBASE=0x802e9000 IEDBASE=0x80400000 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802e8c00, cpu = 5 |
| In relocation handler: cpu 5 |
| New SMBASE=0x802e8c00 IEDBASE=0x80400000 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| Initializing CPU #0 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| CPU: Intel(R) Core(TM) i7-3630QM CPU @ 2.40GHz. |
| CPU: platform id 4 |
| CPU: cpuid(1) 0x306a9 |
| CPU: AES supported |
| CPU: TXT NOT supported |
| CPU: VT supported |
| Setting up local APIC 0x0 |
| VMX status: enabled |
| IA32_FEATURE_CONTROL status: locked |
| cpu: energy policy set to 6 |
| model_x06ax: frequency set to 2400 |
| Turbo is available but hidden |
| Turbo is available and visible |
| CPU #0 initialized |
| Initializing CPU #1 |
| Initializing CPU #2 |
| Initializing CPU #3 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| Initializing CPU #4 |
| Initializing CPU #5 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| Initializing CPU #6 |
| Initializing CPU #7 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| CPU: Intel(R) Core(TM) i7-3630QM CPU @ 2.40GHz. |
| CPU: Intel(R) Core(TM) i7-3630QM CPU @ 2.40GHz. |
| CPU: platform id 4 |
| CPU: platform id 4 |
| CPU: cpuid(1) 0x306a9 |
| CPU: cpuid(1) 0x306a9 |
| CPU: AES supported |
| CPU: TXT NOT supported |
| CPU: VT supported |
| CPU: AES supported |
| CPU: TXT NOT supported |
| CPU: VT supported |
| Setting up local APIC 0x4 |
| CPU: Intel(R) Core(TM) i7-3630QM CPU @ 2.40GHz. |
| CPU: Intel(R) Core(TM) i7-3630QM CPU @ 2.40GHz. |
| CPU: platform id 4 |
| CPU: platform id 4 |
| CPU: cpuid(1) 0x306a9 |
| CPU: cpuid(1) 0x306a9 |
| CPU: AES supported |
| CPU: TXT NOT supported |
| CPU: VT supported |
| CPU: AES supported |
| CPU: TXT NOT supported |
| CPU: VT supported |
| Setting up local APIC 0x6 |
| Setting up local APIC 0x7 |
| VMX status: enabled |
| VMX status: enabled |
| IA32_FEATURE_CONTROL status: locked |
| IA32_FEATURE_CONTROL status: locked |
| CPU: Intel(R) Core(TM) i7-3630QM CPU @ 2.40GHz. |
| Setting up local APIC 0x5 |
| VMX status: enabled |
| VMX status: enabled |
| IA32_FEATURE_CONTROL status: locked |
| IA32_FEATURE_CONTROL status: locked |
| CPU: platform id 4 |
| CPU: Intel(R) Core(TM) i7-3630QM CPU @ 2.40GHz. |
| CPU: Intel(R) Core(TM) i7-3630QM CPU @ 2.40GHz. |
| CPU: platform id 4 |
| CPU: platform id 4 |
| CPU: cpuid(1) 0x306a9 |
| CPU: cpuid(1) 0x306a9 |
| CPU: AES supported |
| CPU: TXT NOT supported |
| CPU: VT supported |
| CPU: AES supported |
| CPU: TXT NOT supported |
| CPU: VT supported |
| Setting up local APIC 0x3 |
| Setting up local APIC 0x2 |
| cpu: energy policy set to 6 |
| cpu: energy policy set to 6 |
| CPU: cpuid(1) 0x306a9 |
| model_x06ax: frequency set to 2400 |
| CPU #3 initialized |
| model_x06ax: frequency set to 2400 |
| CPU #2 initialized |
| CPU: AES supported |
| CPU: TXT NOT supported |
| CPU: VT supported |
| cpu: energy policy set to 6 |
| cpu: energy policy set to 6 |
| VMX status: enabled |
| VMX status: enabled |
| IA32_FEATURE_CONTROL status: locked |
| IA32_FEATURE_CONTROL status: locked |
| Setting up local APIC 0x1 |
| model_x06ax: frequency set to 2400 |
| model_x06ax: frequency set to 2400 |
| CPU #4 initialized |
| CPU #5 initialized |
| VMX status: enabled |
| IA32_FEATURE_CONTROL status: locked |
| cpu: energy policy set to 6 |
| cpu: energy policy set to 6 |
| model_x06ax: frequency set to 2400 |
| CPU #7 initialized |
| model_x06ax: frequency set to 2400 |
| CPU #6 initialized |
| cpu: energy policy set to 6 |
| model_x06ax: frequency set to 2400 |
| CPU #1 initialized |
| bsp_do_flight_plan done after 29 msecs. |
| Initializing southbridge SMI... |
| SMI_STS: |
| GPE0_STS: GPIO15 GPIO14 GPIO11 GPIO9 GPIO7 GPIO5 GPIO4 GPIO3 GPIO0 |
| ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI5 GPI4 GPI3 GPI1 GPI0 |
| TCO_STS: |
| Locking SMM. |
| CPU_CLUSTER: 0 init finished in 42 msecs |
| PCI: 00:00.0 init |
| Disabling PEG12. |
| Disabling PEG11. |
| Disabling PEG10. |
| Disabling PEG60. |
| Disabling Device 7. |
| Disabling PEG IO clock. |
| Set BIOS_RESET_CPL |
| CPU TDP: 45 Watts |
| PCI: 00:00.0 init finished in 1 msecs |
| PCI: 00:02.0 init |
| CBFS: 'vbt.bin' not found. |
| CBFS: 'pci8086,0166.rom' not found. |
| CBFS: 'pci8086,0106.rom' not found. |
| PCI Option ROM loading disabled for PCI: 00:02.0 |
| GMA: locate_vbt_vbios: 76a6 280b 49 db 97 |
| GMA: VBT couldn't be found |
| GT Power Management Init |
| IVB GT2 35W Power Meter Weights |
| GT Power Management Init (post VBIOS) |
| |
| [0.196211] CONFIG => |
| [0.196211] (Primary => |
| [0.196212] (Port => LVDS , |
| [0.196212] Framebuffer => |
| [0.196213] (Width => 1024, |
| [0.196213] Height => 768, |
| [0.196214] Start_X => 0, |
| [0.196214] Start_Y => 0, |
| [0.196215] Stride => 1024, |
| [0.196215] V_Stride => 768, |
| [0.196216] Tiling => Linear , |
| [0.196216] Rotation => No_Rotation, |
| [0.196217] Offset => 0x00000000, |
| [0.196217] BPC => 8), |
| [0.196218] Mode => |
| [0.196218] (Dotclock => 139000000, |
| [0.196219] H_Visible => 1920, |
| [0.196219] H_Sync_Begin => 1980, |
| [0.196220] H_Sync_End => 2028, |
| [0.196220] H_Total => 2050, |
| [0.196221] V_Visible => 1080, |
| [0.196221] V_Sync_Begin => 1090, |
| [0.196222] V_Sync_End => 1100, |
| [0.196222] V_Total => 1130, |
| [0.196223] H_Sync_Active_High => False, |
| [0.196223] V_Sync_Active_High => False, |
| [0.196224] BPC => 5)), |
| [0.196224] Secondary => |
| [0.196225] (Port => Disabled, |
| [0.196225] Framebuffer => |
| [0.196226] (Width => 1, |
| [0.196226] Height => 1, |
| [0.196227] Start_X => 0, |
| [0.196227] Start_Y => 0, |
| [0.196228] Stride => 1, |
| [0.196228] V_Stride => 1, |
| [0.196229] Tiling => Linear , |
| [0.196229] Rotation => No_Rotation, |
| [0.196230] Offset => 0x00000000, |
| [0.196230] BPC => 8), |
| [0.196231] Mode => |
| [0.196231] (Dotclock => 1000000, |
| [0.196232] H_Visible => 1, |
| [0.196232] H_Sync_Begin => 1, |
| [0.196233] H_Sync_End => 1, |
| [0.196233] H_Total => 1, |
| [0.196234] V_Visible => 1, |
| [0.196234] V_Sync_Begin => 1, |
| [0.196235] V_Sync_End => 1, |
| [0.196235] V_Total => 1, |
| [0.196236] H_Sync_Active_High => False, |
| [0.196236] V_Sync_Active_High => False, |
| [0.196237] BPC => 5)), |
| [0.196237] Tertiary => |
| [0.196238] (Port => Disabled, |
| [0.196238] Framebuffer => |
| [0.196239] (Width => 1, |
| [0.196239] Height => 1, |
| [0.196240] Start_X => 0, |
| [0.196240] Start_Y => 0, |
| [0.196241] Stride => 1, |
| [0.196241] V_Stride => 1, |
| [0.196242] Tiling => Linear , |
| [0.196242] Rotation => No_Rotation, |
| [0.196243] Offset => 0x00000000, |
| [0.196243] BPC => 8), |
| [0.196244] Mode => |
| [0.196244] (Dotclock => 1000000, |
| [0.196245] H_Visible => 1, |
| [0.196245] H_Sync_Begin => 1, |
| [0.196246] H_Sync_End => 1, |
| [0.196246] H_Total => 1, |
| [0.196247] V_Visible => 1, |
| [0.196247] V_Sync_Begin => 1, |
| [0.196248] V_Sync_End => 1, |
| [0.196248] V_Total => 1, |
| [0.196249] H_Sync_Active_High => False, |
| [0.196249] V_Sync_Active_High => False, |
| [0.196250] BPC => 5))); |
| framebuffer_info: bytes_per_line: 4096, bits_per_pixel: 32 |
| x_res x y_res: 1024 x 768, size: 3145728 at 0x90000000 |
| PCI: 00:02.0 init finished in 20 msecs |
| PCI: 00:04.0 init |
| PCI: 00:04.0 init finished in 0 msecs |
| PCI: 00:14.0 init |
| XHCI: Setting up controller.. done. |
| PCI: 00:14.0 init finished in 0 msecs |
| PCI: 00:16.0 init |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : YES |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Initializing |
| ME: Current Operation State : Bring up |
| ME: Current Operation Mode : Debug or Disabled by AltDisableBit |
| ME: Error Code : No Error |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Clean Moff->Mx wake |
| ME: Progress Phase State : Check to see if straps say ME DISABLED |
| intel_me_path: mbp is not ready! |
| ME: BIOS path: Error |
| ME: me_state=0, me_state_prev=0 |
| PCI: 00:16.0 init finished in 0 msecs |
| PCI: 00:19.0 init |
| PCI: 00:19.0 init finished in 0 msecs |
| PCI: 00:1a.0 init |
| EHCI: Setting up controller.. done. |
| PCI: 00:1a.0 init finished in 0 msecs |
| PCI: 00:1b.0 init |
| Azalia: base = 0x83838000 |
| Azalia: codec_mask = 09 |
| azalia_audio: Initializing codec #3 |
| azalia_audio: codec viddid: 80862806 |
| azalia_audio: verb_size: 16 |
| azalia_audio: verb loaded. |
| azalia_audio: Initializing codec #0 |
| azalia_audio: codec viddid: 10ec0269 |
| azalia_audio: verb_size: 72 |
| azalia_audio: verb loaded. |
| PCI: 00:1b.0 init finished in 5 msecs |
| PCI: 00:1c.0 init |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.0 init finished in 0 msecs |
| PCI: 00:1c.1 init |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.1 init finished in 0 msecs |
| PCI: 00:1c.2 init |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.2 init finished in 0 msecs |
| PCI: 00:1d.0 init |
| EHCI: Setting up controller.. done. |
| PCI: 00:1d.0 init finished in 0 msecs |
| PCI: 00:1f.0 init |
| pch: lpc_init |
| PCH: detected QM77, device id: 0x1e55, rev id 0x4 |
| IOAPIC: Initializing IOAPIC at 0xfec00000 |
| IOAPIC: ID = 0x02 |
| IOAPIC: 24 interrupts |
| IOAPIC: Clearing IOAPIC at 0xfec00000 |
| IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| Set power off after power failure. |
| NMI sources enabled. |
| PantherPoint PM init |
| RTC: failed = 0x0 |
| RTC Init |
| apm_control: Disabling ACPI. |
| APMC done. |
| pch_spi_init |
| PCI: 00:1f.0 init finished in 0 msecs |
| PCI: 00:1f.2 init |
| SATA: Initializing... |
| SATA: Controller in AHCI mode. |
| ABAR: 0x8383e000 |
| PCI: 00:1f.2 init finished in 0 msecs |
| PCI: 00:1f.3 init |
| PCI: 00:1f.3 init finished in 0 msecs |
| PCI: 00:1f.6 init |
| PCI: 00:1f.6 init finished in 0 msecs |
| PCI: 01:00.0 init |
| PCI: 01:00.0 init finished in 0 msecs |
| PCI: 01:00.1 init |
| PCI: 01:00.1 init finished in 0 msecs |
| PCI: 01:00.2 init |
| PCI: 01:00.2 init finished in 0 msecs |
| PCI: 01:00.3 init |
| PCI: 01:00.3 init finished in 0 msecs |
| PCI: 02:00.0 init |
| PCI: 02:00.0 init finished in 0 msecs |
| PNP: 00ff.2 init |
| PNP: 00ff.2 init finished in 0 msecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:54 init |
| I2C: 01:54 init finished in 0 msecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:55 init |
| I2C: 01:55 init finished in 0 msecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:56 init |
| I2C: 01:56 init finished in 0 msecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:57 init |
| I2C: 01:57 init finished in 0 msecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5c init |
| Locking EEPROM RFID |
| init EEPROM done |
| I2C: 01:5c init finished in 27 msecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5d init |
| I2C: 01:5d init finished in 0 msecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5e init |
| I2C: 01:5e init finished in 0 msecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5f init |
| I2C: 01:5f init finished in 0 msecs |
| Devices initialized |
| BS: BS_DEV_INIT run times (exec / console): 98 / 1 ms |
| Finalize devices... |
| PCI: 00:1f.0 final |
| apm_control: Finalizing SMM. |
| APMC done. |
| Devices finalized |
| CBFS: Found 'fallback/dsdt.aml' @0x43500 size 0x3859 in mcache @0x7ffdd1f0 |
| CBFS: 'fallback/slic' not found. |
| ACPI: Writing ACPI tables at 7ff3a000. |
| ACPI: * FACS |
| ACPI: * DSDT |
| ACPI: * FADT |
| ACPI: added table 1/32, length now 40 |
| ACPI: * SSDT |
| Found 1 CPU(s) with 8 core(s) each. |
| PSS: 2401MHz power 45000 control 0x2200 status 0x2200 |
| PSS: 2400MHz power 45000 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 40271 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 35760 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 31455 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 27302 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 23322 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 19530 control 0xc00 status 0xc00 |
| PSS: 2401MHz power 45000 control 0x2200 status 0x2200 |
| PSS: 2400MHz power 45000 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 40271 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 35760 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 31455 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 27302 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 23322 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 19530 control 0xc00 status 0xc00 |
| PSS: 2401MHz power 45000 control 0x2200 status 0x2200 |
| PSS: 2400MHz power 45000 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 40271 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 35760 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 31455 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 27302 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 23322 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 19530 control 0xc00 status 0xc00 |
| PSS: 2401MHz power 45000 control 0x2200 status 0x2200 |
| PSS: 2400MHz power 45000 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 40271 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 35760 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 31455 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 27302 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 23322 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 19530 control 0xc00 status 0xc00 |
| PSS: 2401MHz power 45000 control 0x2200 status 0x2200 |
| PSS: 2400MHz power 45000 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 40271 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 35760 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 31455 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 27302 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 23322 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 19530 control 0xc00 status 0xc00 |
| PSS: 2401MHz power 45000 control 0x2200 status 0x2200 |
| PSS: 2400MHz power 45000 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 40271 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 35760 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 31455 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 27302 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 23322 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 19530 control 0xc00 status 0xc00 |
| PSS: 2401MHz power 45000 control 0x2200 status 0x2200 |
| PSS: 2400MHz power 45000 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 40271 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 35760 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 31455 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 27302 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 23322 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 19530 control 0xc00 status 0xc00 |
| PSS: 2401MHz power 45000 control 0x2200 status 0x2200 |
| PSS: 2400MHz power 45000 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 40271 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 35760 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 31455 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 27302 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 23322 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 19530 control 0xc00 status 0xc00 |
| Generating ACPI PIRQ entries |
| \_SB.PCI0.LPCB.TPM.TPM: LPC TPM PNP: 0c31.0 |
| ACPI: * H8 |
| H8: BDC not installed |
| H8: WWAN not installed |
| ACPI: added table 2/32, length now 44 |
| ACPI: * MCFG |
| ACPI: added table 3/32, length now 48 |
| ACPI: * TCPA |
| TCPA log created at 0x7ff2a000 |
| ACPI: added table 4/32, length now 52 |
| ACPI: * MADT |
| ACPI: added table 5/32, length now 56 |
| current = 7ff407d0 |
| ACPI: * HPET |
| ACPI: added table 6/32, length now 60 |
| ACPI: done. |
| ACPI tables: 26640 bytes. |
| smbios_write_tables: 7ff29000 |
| Create SMBIOS type 16 |
| Create SMBIOS type 17 |
| Create SMBIOS type 20 |
| SMBIOS tables: 956 bytes. |
| Writing table forward entry at 0x00000500 |
| Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 9fe8 |
| Writing coreboot table at 0x7ff5e000 |
| CBFS: Found 'cmos_layout.bin' @0x46f00 size 0x83c in mcache @0x7ffdd244 |
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1. 0000000000001000-000000000009ffff: RAM |
| 2. 00000000000a0000-00000000000fffff: RESERVED |
| 3. 0000000000100000-000000007ff28fff: RAM |
| 4. 000000007ff29000-000000007ff76fff: CONFIGURATION TABLES |
| 5. 000000007ff77000-000000007ffcdfff: RAMSTAGE |
| 6. 000000007ffce000-000000007fffffff: CONFIGURATION TABLES |
| 7. 0000000080000000-00000000829fffff: RESERVED |
| 8. 00000000f0000000-00000000f3ffffff: RESERVED |
| 9. 00000000fed40000-00000000fed44fff: RESERVED |
| 10. 0000000100000000-000000017d5fffff: RAM |
| Setting up bootsplash in 1024x768@32 |
| CBFS: Found 'bootsplash.jpg' @0x3fac0 size 0x39f8 in mcache @0x7ffdd1c8 |
| Bootsplash image resolution: 1024x768 |
| Bootsplash loaded |
| Wrote coreboot table at: 0x7ff5e000, 0xc10 bytes, checksum 756f |
| coreboot table: 3112 bytes. |
| IMD ROOT 0. 0x7ffff000 0x00001000 |
| IMD SMALL 1. 0x7fffe000 0x00001000 |
| CONSOLE 2. 0x7ffde000 0x00020000 |
| RO MCACHE 3. 0x7ffdd000 0x000003f4 |
| TIME STAMP 4. 0x7ffdc000 0x00000910 |
| MRC DATA 5. 0x7ffdb000 0x00000644 |
| MEM INFO 6. 0x7ffda000 0x000003b8 |
| ROMSTG STCK 7. 0x7ffd9000 0x00001000 |
| AFTER CAR 8. 0x7ffce000 0x0000b000 |
| RAMSTAGE 9. 0x7ff76000 0x00058000 |
| SMM BACKUP 10. 0x7ff66000 0x00010000 |
| COREBOOT 11. 0x7ff5e000 0x00008000 |
| ACPI 12. 0x7ff3a000 0x00024000 |
| TCPA TCGLOG13. 0x7ff2a000 0x00010000 |
| SMBIOS 14. 0x7ff29000 0x00001000 |
| IMD small region: |
| IMD ROOT 0. 0x7fffec00 0x00000400 |
| FMAP 1. 0x7fffeb20 0x000000e0 |
| ROMSTAGE 2. 0x7fffeb00 0x00000004 |
| ACPI GNVS 3. 0x7fffea00 0x00000100 |
| BS: BS_WRITE_TABLES run times (exec / console): 44 / 0 ms |
| CBFS: Found 'fallback/payload' @0x66080 size 0x1188f in mcache @0x7ffdd300 |
| Checking segment from ROM address 0xffc762ac |
| Payload being loaded at below 1MiB without region being marked as RAM usable. |
| Checking segment from ROM address 0xffc762c8 |
| Loading segment from ROM address 0xffc762ac |
| code (compression=1) |
| New segment dstaddr 0x000dee20 memsize 0x211e0 srcaddr 0xffc762e4 filesize 0x11857 |
| Loading Segment: addr: 0x000dee20 memsz: 0x00000000000211e0 filesz: 0x0000000000011857 |
| using LZMA |
| Loading segment from ROM address 0xffc762c8 |
| Entry Point 0x000fd25f |
| BS: BS_PAYLOAD_LOAD run times (exec / console): 31 / 0 ms |
| ICH-NM10-PCH: watchdog disabled |
| Jumping to boot code at 0x000fd25f(0x7ff5e000) |
| SeaBIOS (version rel-1.15.0-0-g2dd4b9b) |
| BUILD: gcc: (coreboot toolchain v2021-11-02_6dad77d64a) 11.2.0 binutils: (GNU Binutils) 2.37 |
| Found coreboot cbmem console @ 7ffde000 |
| Found mainboard LENOVO ThinkPad T530 |
| Relocating init from 0x000e0580 to 0x7fedbb40 (size 54304) |
| Found CBFS header at 0xffc1022c |
| multiboot: eax=7ffb3148, ebx=7ffb30c4 |
| Found 21 PCI devices (max PCI bus is 03) |
| Copying SMBIOS entry point from 0x7ff29000 to 0x000f67c0 |
| Copying ACPI RSDP from 0x7ff3a000 to 0x000f6790 |
| table(50434146)=0x7ff3daf0 (via xsdt) |
| Using pmtimer, ioport 0x508 |
| table(41504354)=0x7ff40700 (via xsdt) |
| Scan for VGA option rom |
| Running option rom at c000:0003 |
| pmm call arg1=0 |
| Turning on vga text mode console |
| SeaBIOS (version rel-1.15.0-0-g2dd4b9b) |
| Machine UUID 2df10a81-5156-11cb-b188-978b82482469 |
| PCI: XHCI at 00:14.0 (mmio 0x83820000) |
| XHCI init: regs @ 0x83820000, 8 ports, 32 slots, 32 byte contexts |
| XHCI protocol USB 2.00, 4 ports (offset 1), def 3001 |
| XHCI protocol USB 3.00, 4 ports (offset 5), def 1000 |
| XHCI extcap 0xc1 @ 0x83828040 |
| XHCI extcap 0xc0 @ 0x83828070 |
| XHCI extcap 0x1 @ 0x83828330 |
| EHCI init on dev 00:1a.0 (regs=0x8383f020) |
| EHCI init on dev 00:1d.0 (regs=0x83840020) |
| AHCI controller at 00:1f.2, iobase 0x8383e000, irq 11 |
| Searching bootorder for: /pci@i0cf8/pci-bridge@1c/*@0 |
| Searching bootorder for: HALT |
| Found 0 lpt ports |
| Found 0 serial ports |
| Searching bootorder for: /rom@img/nvramcui |
| Searching bootorder for: /rom@img/coreinfo |
| Searching bootorder for: /pci@i0cf8/*@1f,2/drive@1/disk@0 |
| Searching bios-geometry for: /pci@i0cf8/*@1f,2/drive@1/disk@0 |
| AHCI/1: registering: "DVD/CD [AHCI/1: PLDS DVD-RW DS8A8SH ATAPI-8 DVD/CD]" |
| Searching bootorder for: /pci@i0cf8/*@1f,2/drive@2/disk@0 |
| AHCI/2: Set transfer mode to UDMA-6 |
| Searching bios-geometry for: /pci@i0cf8/*@1f,2/drive@2/disk@0 |
| AHCI/2: registering: "AHCI/2: Dogfish SSD 1TB ATA-10 Hard-Disk (931 GiBytes)" |
| XHCI no devices found |
| Initialized USB HUB (0 ports used) |
| WARNING - Timeout at ps2_recvbyte:182! |
| Discarding ps2 data aa (status=11) |
| Discarding ps2 data e0 (status=11) |
| Discarding ps2 data 0f (status=11) |
| Discarding ps2 data e0 (status=11) |
| Discarding ps2 data f0 (status=11) |
| Discarding ps2 data 0f (status=11) |
| WARNING - Timeout at ps2_recvbyte:182! |
| PS2 keyboard initialized |
| WARNING - Timeout at ehci_wait_td:517! |
| ehci pipe=0x7fed7200 cur=7fed0dc0 tok=80080d80 next=7fed0e00 td=0x7fed0dc0 status=80080d80 |
| Initialized USB HUB (0 ports used) |
| All threads complete. |
| Scan for option roms |
| |
| Press ESC for boot menu. |
| |
| Turning on vga text mode console |
| SeaBIOS (version rel-1.15.0-0-g2dd4b9b) |
| Machine UUID 2df10a81-5156-11cb-b188-978b82482469 |
| Searching bootorder for: HALT |
| drive 0x000f66d0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=1953525168 |
| Space available for UMB: c7000-ec000, f5fe0-f66a0 |
| Returned 180224 bytes of ZoneHigh |
| e820 map has 8 items: |
| 0: 0000000000000000 - 000000000009fc00 = 1 RAM |
| 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED |
| 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED |
| 3: 0000000000100000 - 000000007ff15000 = 1 RAM |
| 4: 000000007ff15000 - 0000000082a00000 = 2 RESERVED |
| 5: 00000000f0000000 - 00000000f4000000 = 2 RESERVED |
| 6: 00000000fed40000 - 00000000fed45000 = 2 RESERVED |
| 7: 0000000100000000 - 000000017d600000 = 1 RAM |
| enter handle_19: |
| NULL |
| Booting from DVD/CD... |
| Device reports MEDIUM NOT PRESENT - 2 tries left |
| Device reports MEDIUM NOT PRESENT - 1 tries left |
| Device reports MEDIUM NOT PRESENT - 0 tries left |
| Boot failed: Could not read from CDROM (code 0003) |
| enter handle_18: |
| NULL |
| Booting from Hard Disk... |
| Booting from 0000:7c00 |
| |