| *** Pre-CBMEM romstage console overflowed, log truncated! *** |
| phics... |
| [DEBUG] Back from systemagent_early_init() |
| [INFO ] Intel ME early init |
| [INFO ] Intel ME firmware is ready |
| [DEBUG] ME: Requested 0MB UMA |
| [DEBUG] Starting native Platform init |
| [DEBUG] DMI: Running at X4 @ 5000MT/s |
| [DEBUG] FMAP: area RW_MRC_CACHE found @ 580000 (65536 bytes) |
| [DEBUG] Trying stored timings. |
| [DEBUG] Starting Sandy Bridge RAM training (fast boot). |
| [DEBUG] 100MHz reference clock support: no |
| [DEBUG] PLL_REF100_CFG value: 0x0 |
| [DEBUG] Trying CAS 9, tCK 384. |
| [DEBUG] Found compatible clock, CAS pair. |
| [DEBUG] Selected DRAM frequency: 666 MHz |
| [DEBUG] Selected CAS latency : 9T |
| [DEBUG] MPLL busy... done in 20 us |
| [DEBUG] MPLL frequency is set at : 666 MHz |
| [DEBUG] Done dimm mapping |
| [DEBUG] Update PCI-E configuration space: |
| [DEBUG] PCI(0, 0, 0)[a0] = 0 |
| [DEBUG] PCI(0, 0, 0)[a4] = 8 |
| [DEBUG] PCI(0, 0, 0)[bc] = 84a00000 |
| [DEBUG] PCI(0, 0, 0)[a8] = 7b600000 |
| [DEBUG] PCI(0, 0, 0)[ac] = 8 |
| [DEBUG] PCI(0, 0, 0)[b8] = 80000000 |
| [DEBUG] PCI(0, 0, 0)[b0] = 80a00000 |
| [DEBUG] PCI(0, 0, 0)[b4] = 80800000 |
| [DEBUG] Done memory map |
| [DEBUG] Done io registers |
| [DEBUG] t123: 1912, 9120, 500 |
| [NOTE ] ME: Wrong mode : 2 |
| [NOTE ] ME: FWS2: 0x100a0000 |
| [NOTE ] ME: Bist in progress: 0x0 |
| [NOTE ] ME: ICC Status : 0x0 |
| [NOTE ] ME: Invoke MEBx : 0x0 |
| [NOTE ] ME: CPU replaced : 0x0 |
| [NOTE ] ME: MBP ready : 0x0 |
| [NOTE ] ME: MFS failure : 0x0 |
| [NOTE ] ME: Warm reset req : 0x0 |
| [NOTE ] ME: CPU repl valid : 0x0 |
| [NOTE ] ME: (Reserved) : 0x0 |
| [NOTE ] ME: FW update req : 0x0 |
| [NOTE ] ME: (Reserved) : 0x0 |
| [NOTE ] ME: Current state : 0xa |
| [NOTE ] ME: Current PM event: 0x0 |
| [NOTE ] ME: Progress code : 0x1 |
| [NOTE ] Waited long enough, or CPU was not replaced, continue... |
| [NOTE ] PASSED! Tell ME that DRAM is ready |
| [NOTE ] ME: ME is reporting as disabled, so not waiting for a response. |
| [NOTE ] ME: FWS2: 0x100a0000 |
| [NOTE ] ME: Bist in progress: 0x0 |
| [NOTE ] ME: ICC Status : 0x0 |
| [NOTE ] ME: Invoke MEBx : 0x0 |
| [NOTE ] ME: CPU replaced : 0x0 |
| [NOTE ] ME: MBP ready : 0x0 |
| [NOTE ] ME: MFS failure : 0x0 |
| [NOTE ] ME: Warm reset req : 0x0 |
| [NOTE ] ME: CPU repl valid : 0x0 |
| [NOTE ] ME: (Reserved) : 0x0 |
| [NOTE ] ME: FW update req : 0x0 |
| [NOTE ] ME: (Reserved) : 0x0 |
| [NOTE ] ME: Current state : 0xa |
| [NOTE ] ME: Current PM event: 0x0 |
| [NOTE ] ME: Progress code : 0x1 |
| [NOTE ] ME: Requested BIOS Action: No DID Ack received |
| [DEBUG] ME: FW Partition Table : OK |
| [DEBUG] ME: Bringup Loader Failure : NO |
| [DEBUG] ME: Firmware Init Complete : NO |
| [DEBUG] ME: Manufacturing Mode : YES |
| [DEBUG] ME: Boot Options Present : NO |
| [DEBUG] ME: Update In Progress : NO |
| [DEBUG] ME: Current Working State : Initializing |
| [DEBUG] ME: Current Operation State : Bring up |
| [DEBUG] ME: Current Operation Mode : Debug or Disabled by AltDisableBit |
| [DEBUG] ME: Error Code : No Error |
| [DEBUG] ME: Progress Phase : BUP Phase |
| [DEBUG] ME: Power Management Event : Clean Moff->Mx wake |
| [DEBUG] ME: Progress Phase State : Check to see if straps say ME DISABLED |
| [DEBUG] memcfg DDR3 ref clock 133 MHz |
| [DEBUG] memcfg DDR3 clock 1330 MHz |
| [DEBUG] memcfg channel assignment: A: 0, B 1, C 2 |
| [DEBUG] memcfg channel[0] config (00662020): |
| [DEBUG] ECC inactive |
| [DEBUG] enhanced interleave mode on |
| [DEBUG] rank interleave on |
| [DEBUG] DIMMA 8192 MB width x8 dual rank, selected |
| [DEBUG] DIMMB 8192 MB width x8 dual rank |
| [DEBUG] memcfg channel[1] config (00662020): |
| [DEBUG] ECC inactive |
| [DEBUG] enhanced interleave mode on |
| [DEBUG] rank interleave on |
| [DEBUG] DIMMA 8192 MB width x8 dual rank, selected |
| [DEBUG] DIMMB 8192 MB width x8 dual rank |
| [DEBUG] CBMEM: |
| [DEBUG] IMD: root @ 0x7ffff000 254 entries. |
| [DEBUG] IMD: root @ 0x7fffec00 62 entries. |
| [DEBUG] External stage cache: |
| [DEBUG] IMD: root @ 0x803ff000 254 entries. |
| [DEBUG] IMD: root @ 0x803fec00 62 entries. |
| [DEBUG] CBMEM entry for DIMM info: 0x7ffdb000 |
| [DEBUG] SMM Memory Map |
| [DEBUG] SMRAM : 0x80000000 0x800000 |
| [DEBUG] Subregion 0: 0x80000000 0x300000 |
| [DEBUG] Subregion 1: 0x80300000 0x100000 |
| [DEBUG] Subregion 2: 0x80400000 0x400000 |
| [DEBUG] Normal boot |
| [INFO ] CBFS: Found 'fallback/postcar' @0x3e3c0 size 0x5cac in mcache @0xfeff1054 |
| [DEBUG] Loading module at 0x7ffcf000 with entry 0x7ffcf031. filesize: 0x5920 memsize: 0xbc58 |
| [DEBUG] Processing 211 relocs. Offset value of 0x7dfcf000 |
| [DEBUG] BS: romstage times (exec / console): total (unknown) / 2 ms |
| |
| |
| [NOTE ] coreboot-4.19-1034-gd98b24d390 Fri Mar 31 12:10:03 UTC 2023 x86_32 postcar starting (log level: 8)... |
| [DEBUG] Normal boot |
| [INFO ] CBFS: Found 'fallback/ramstage' @0x1d940 size 0x1cbf1 in mcache @0x7ffdd0dc |
| [DEBUG] Loading module at 0x7ff80000 with entry 0x7ff80000. filesize: 0x3bd38 memsize: 0x4dd90 |
| [DEBUG] Processing 3872 relocs. Offset value of 0x7bf80000 |
| [DEBUG] BS: postcar times (exec / console): total (unknown) / 0 ms |
| |
| |
| [NOTE ] coreboot-4.19-1034-gd98b24d390 Fri Mar 31 12:10:03 UTC 2023 x86_32 ramstage starting (log level: 8)... |
| [DEBUG] Normal boot |
| [INFO ] Enumerating buses... |
| [SPEW ] Show all devs... Before device enumeration. |
| [SPEW ] Root Device: enabled 1 |
| [SPEW ] CPU_CLUSTER: 0: enabled 1 |
| [SPEW ] DOMAIN: 0000: enabled 1 |
| [SPEW ] PCI: 00:00.0: enabled 1 |
| [SPEW ] PCI: 00:01.0: enabled 1 |
| [SPEW ] PCI: 00:01.1: enabled 0 |
| [SPEW ] PCI: 00:01.2: enabled 0 |
| [SPEW ] PCI: 00:02.0: enabled 1 |
| [SPEW ] PCI: 00:04.0: enabled 0 |
| [SPEW ] PCI: 00:06.0: enabled 0 |
| [SPEW ] PCI: 00:14.0: enabled 0 |
| [SPEW ] PCI: 00:16.0: enabled 1 |
| [SPEW ] PCI: 00:16.1: enabled 0 |
| [SPEW ] PCI: 00:16.2: enabled 1 |
| [SPEW ] PCI: 00:16.3: enabled 1 |
| [SPEW ] PCI: 00:19.0: enabled 1 |
| [SPEW ] PCI: 00:1a.0: enabled 1 |
| [SPEW ] PCI: 00:1b.0: enabled 1 |
| [SPEW ] PCI: 00:1c.0: enabled 1 |
| [SPEW ] PCI: 00:1c.1: enabled 0 |
| [SPEW ] PCI: 00:1c.2: enabled 0 |
| [SPEW ] PCI: 00:1c.3: enabled 0 |
| [SPEW ] PCI: 00:1c.4: enabled 1 |
| [SPEW ] PCI: 00:1c.5: enabled 0 |
| [SPEW ] PCI: 00:1c.6: enabled 1 |
| [SPEW ] PCI: 00:1c.7: enabled 0 |
| [SPEW ] PCI: 00:1d.0: enabled 1 |
| [SPEW ] PCI: 00:1e.0: enabled 1 |
| [SPEW ] PCI: 00:1f.0: enabled 1 |
| [SPEW ] PCI: 00:1f.2: enabled 1 |
| [SPEW ] PCI: 00:1f.3: enabled 1 |
| [SPEW ] PCI: 00:1f.5: enabled 0 |
| [SPEW ] PCI: 00:1f.6: enabled 0 |
| [SPEW ] PNP: 002e.0: enabled 0 |
| [SPEW ] PNP: 002e.1: enabled 0 |
| [SPEW ] PNP: 002e.2: enabled 1 |
| [SPEW ] PNP: 002e.3: enabled 0 |
| [SPEW ] PNP: 002e.5: enabled 1 |
| [SPEW ] PNP: 002e.106: enabled 0 |
| [SPEW ] PNP: 002e.107: enabled 0 |
| [SPEW ] PNP: 002e.207: enabled 0 |
| [SPEW ] PNP: 002e.307: enabled 0 |
| [SPEW ] PNP: 002e.407: enabled 0 |
| [SPEW ] PNP: 002e.8: enabled 0 |
| [SPEW ] PNP: 002e.108: enabled 0 |
| [SPEW ] PNP: 002e.9: enabled 0 |
| [SPEW ] PNP: 002e.109: enabled 0 |
| [SPEW ] PNP: 002e.209: enabled 0 |
| [SPEW ] PNP: 002e.309: enabled 0 |
| [SPEW ] PNP: 002e.a: enabled 1 |
| [SPEW ] PNP: 002e.b: enabled 1 |
| [SPEW ] PNP: 002e.c: enabled 1 |
| [SPEW ] PNP: 002e.d: enabled 0 |
| [SPEW ] PNP: 002e.f: enabled 1 |
| [SPEW ] Compare with tree... |
| [SPEW ] Root Device: enabled 1 |
| [SPEW ] CPU_CLUSTER: 0: enabled 1 |
| [SPEW ] DOMAIN: 0000: enabled 1 |
| [SPEW ] PCI: 00:00.0: enabled 1 |
| [SPEW ] PCI: 00:01.0: enabled 1 |
| [SPEW ] PCI: 00:01.1: enabled 0 |
| [SPEW ] PCI: 00:01.2: enabled 0 |
| [SPEW ] PCI: 00:02.0: enabled 1 |
| [SPEW ] PCI: 00:04.0: enabled 0 |
| [SPEW ] PCI: 00:06.0: enabled 0 |
| [SPEW ] PCI: 00:14.0: enabled 0 |
| [SPEW ] PCI: 00:16.0: enabled 1 |
| [SPEW ] PCI: 00:16.1: enabled 0 |
| [SPEW ] PCI: 00:16.2: enabled 1 |
| [SPEW ] PCI: 00:16.3: enabled 1 |
| [SPEW ] PCI: 00:19.0: enabled 1 |
| [SPEW ] PCI: 00:1a.0: enabled 1 |
| [SPEW ] PCI: 00:1b.0: enabled 1 |
| [SPEW ] PCI: 00:1c.0: enabled 1 |
| [SPEW ] PCI: 00:1c.1: enabled 0 |
| [SPEW ] PCI: 00:1c.2: enabled 0 |
| [SPEW ] PCI: 00:1c.3: enabled 0 |
| [SPEW ] PCI: 00:1c.4: enabled 1 |
| [SPEW ] PCI: 00:1c.5: enabled 0 |
| [SPEW ] PCI: 00:1c.6: enabled 1 |
| [SPEW ] PCI: 00:1c.7: enabled 0 |
| [SPEW ] PCI: 00:1d.0: enabled 1 |
| [SPEW ] PCI: 00:1e.0: enabled 1 |
| [SPEW ] PCI: 00:1f.0: enabled 1 |
| [SPEW ] PNP: 002e.0: enabled 0 |
| [SPEW ] PNP: 002e.1: enabled 0 |
| [SPEW ] PNP: 002e.2: enabled 1 |
| [SPEW ] PNP: 002e.3: enabled 0 |
| [SPEW ] PNP: 002e.5: enabled 1 |
| [SPEW ] PNP: 002e.106: enabled 0 |
| [SPEW ] PNP: 002e.107: enabled 0 |
| [SPEW ] PNP: 002e.207: enabled 0 |
| [SPEW ] PNP: 002e.307: enabled 0 |
| [SPEW ] PNP: 002e.407: enabled 0 |
| [SPEW ] PNP: 002e.8: enabled 0 |
| [SPEW ] PNP: 002e.108: enabled 0 |
| [SPEW ] PNP: 002e.9: enabled 0 |
| [SPEW ] PNP: 002e.109: enabled 0 |
| [SPEW ] PNP: 002e.209: enabled 0 |
| [SPEW ] PNP: 002e.309: enabled 0 |
| [SPEW ] PNP: 002e.a: enabled 1 |
| [SPEW ] PNP: 002e.b: enabled 1 |
| [SPEW ] PNP: 002e.c: enabled 1 |
| [SPEW ] PNP: 002e.d: enabled 0 |
| [SPEW ] PNP: 002e.f: enabled 1 |
| [SPEW ] PCI: 00:1f.2: enabled 1 |
| [SPEW ] PCI: 00:1f.3: enabled 1 |
| [SPEW ] PCI: 00:1f.5: enabled 0 |
| [SPEW ] PCI: 00:1f.6: enabled 0 |
| [DEBUG] Root Device scanning... |
| [SPEW ] scan_static_bus for Root Device |
| [DEBUG] CPU_CLUSTER: 0 enabled |
| [DEBUG] DOMAIN: 0000 enabled |
| [DEBUG] DOMAIN: 0000 scanning... |
| [DEBUG] PCI: pci_scan_bus for bus 00 |
| [SPEW ] PCI: 00:00.0 [8086/0000] ops |
| [DEBUG] PCI: 00:00.0 [8086/0100] enabled |
| [SPEW ] PCI: 00:01.0 [8086/0000] bus ops |
| [DEBUG] PCI: 00:01.0 [8086/0101] enabled |
| [SPEW ] PCI: 00:02.0 [8086/0000] ops |
| [DEBUG] PCI: 00:02.0 [8086/0102] enabled |
| [DEBUG] PCI: 00:14.0: Disabling device |
| [SPEW ] PCI: 00:16.0 [8086/1c3a] ops |
| [DEBUG] PCI: 00:16.0 [8086/1c3a] enabled |
| [DEBUG] PCI: 00:16.1: Disabling device |
| [INFO ] PCI: Static device PCI: 00:16.2 not found, disabling it. |
| [INFO ] PCI: Static device PCI: 00:16.3 not found, disabling it. |
| [DEBUG] PCI: 00:19.0 [8086/1502] enabled |
| [SPEW ] PCI: 00:1a.0 [8086/0000] ops |
| [DEBUG] PCI: 00:1a.0 [8086/1c2d] enabled |
| [SPEW ] PCI: 00:1b.0 [8086/0000] ops |
| [DEBUG] PCI: 00:1b.0 [8086/1c20] enabled |
| [SPEW ] PCI: 00:1c.0 [8086/0000] bus ops |
| [DEBUG] PCI: 00:1c.0 [8086/1c10] enabled |
| [DEBUG] PCI: 00:1c.1: Disabling device |
| [DEBUG] PCI: 00:1c.2: Disabling device |
| [DEBUG] PCI: 00:1c.3: Disabling device |
| [SPEW ] PCI: 00:1c.4 [8086/0000] bus ops |
| [DEBUG] PCI: 00:1c.4 [8086/1c18] enabled |
| [DEBUG] PCI: 00:1c.5: Disabling device |
| [SPEW ] PCI: 00:1c.5 [8086/0000] bus ops |
| [DEBUG] PCI: 00:1c.5 [8086/1c1a] disabled |
| [SPEW ] PCI: 00:1c.6 [8086/0000] bus ops |
| [DEBUG] PCI: 00:1c.6 [8086/1c1c] enabled |
| [DEBUG] PCI: 00:1c.7: Disabling device |
| [SPEW ] PCH: RPFN 0x76543210 -> 0xf6d4ba90 |
| [SPEW ] PCI: 00:1d.0 [8086/0000] ops |
| [DEBUG] PCI: 00:1d.0 [8086/1c26] enabled |
| [SPEW ] PCI: 00:1e.0 [8086/0000] bus ops |
| [DEBUG] PCI: 00:1e.0 [8086/244e] enabled |
| [SPEW ] PCI: 00:1f.0 [8086/0000] bus ops |
| [DEBUG] PCI: 00:1f.0 [8086/1c4e] enabled |
| [SPEW ] PCI: 00:1f.2 [8086/0000] ops |
| [DEBUG] PCI: 00:1f.2 [8086/1c00] enabled |
| [SPEW ] PCI: 00:1f.3 [8086/0000] bus ops |
| [DEBUG] PCI: 00:1f.3 [8086/1c22] enabled |
| [DEBUG] PCI: 00:1f.5: Disabling device |
| [DEBUG] PCI: 00:1f.5 [8086/1c08] disabled No operations |
| [DEBUG] PCI: 00:1f.6: Disabling device |
| [DEBUG] PCI: 00:1f.6 [8086/1c24] disabled No operations |
| [WARN ] PCI: Leftover static devices: |
| [WARN ] PCI: 00:01.1 |
| [WARN ] PCI: 00:01.2 |
| [WARN ] PCI: 00:04.0 |
| [WARN ] PCI: 00:06.0 |
| [WARN ] PCI: 00:14.0 |
| [WARN ] PCI: 00:16.1 |
| [WARN ] PCI: 00:16.2 |
| [WARN ] PCI: 00:16.3 |
| [WARN ] PCI: 00:1c.1 |
| [WARN ] PCI: 00:1c.2 |
| [WARN ] PCI: 00:1c.3 |
| [WARN ] PCI: 00:1c.7 |
| [WARN ] PCI: Check your devicetree.cb. |
| [DEBUG] PCI: 00:01.0 scanning... |
| [SPEW ] do_pci_scan_bridge for PCI: 00:01.0 |
| [DEBUG] PCI: pci_scan_bus for bus 01 |
| [DEBUG] scan_bus: bus PCI: 00:01.0 finished in 0 msecs |
| [DEBUG] PCI: 00:1c.0 scanning... |
| [SPEW ] do_pci_scan_bridge for PCI: 00:1c.0 |
| [DEBUG] PCI: pci_scan_bus for bus 02 |
| [DEBUG] scan_bus: bus PCI: 00:1c.0 finished in 0 msecs |
| [DEBUG] PCI: 00:1c.4 scanning... |
| [SPEW ] do_pci_scan_bridge for PCI: 00:1c.4 |
| [DEBUG] PCI: pci_scan_bus for bus 03 |
| [DEBUG] PCI: 03:00.0 [1912/0015] enabled |
| [INFO ] Enabling Common Clock Configuration |
| [INFO ] ASPM: Enabled L0s and L1 |
| [INFO ] PCIe: Max_Payload_Size adjusted to 128 |
| [DEBUG] scan_bus: bus PCI: 00:1c.4 finished in 0 msecs |
| [DEBUG] PCI: 00:1c.6 scanning... |
| [SPEW ] do_pci_scan_bridge for PCI: 00:1c.6 |
| [DEBUG] PCI: pci_scan_bus for bus 04 |
| [DEBUG] PCI: 04:00.0 [1033/0194] enabled |
| [INFO ] Enabling Common Clock Configuration |
| [INFO ] ASPM: Enabled L0s and L1 |
| [INFO ] PCIe: Max_Payload_Size adjusted to 128 |
| [DEBUG] scan_bus: bus PCI: 00:1c.6 finished in 0 msecs |
| [DEBUG] PCI: 00:1e.0 scanning... |
| [SPEW ] do_pci_scan_bridge for PCI: 00:1e.0 |
| [DEBUG] PCI: pci_scan_bus for bus 05 |
| [DEBUG] PCI: 05:00.0 [1102/0004] enabled |
| [DEBUG] PCI: 05:00.1 [1102/7003] enabled |
| [DEBUG] PCI: 05:00.2 [1102/4001] enabled |
| [DEBUG] PCI: 05:03.0 [11c1/5811] enabled |
| [DEBUG] scan_bus: bus PCI: 00:1e.0 finished in 0 msecs |
| [DEBUG] PCI: 00:1f.0 scanning... |
| [SPEW ] scan_static_bus for PCI: 00:1f.0 |
| [DEBUG] PNP: 002e.0 disabled |
| [DEBUG] PNP: 002e.1 disabled |
| [DEBUG] PNP: 002e.2 enabled |
| [DEBUG] PNP: 002e.3 disabled |
| [DEBUG] PNP: 002e.5 enabled |
| [DEBUG] PNP: 002e.106 disabled |
| [DEBUG] PNP: 002e.107 disabled |
| [DEBUG] PNP: 002e.207 disabled |
| [DEBUG] PNP: 002e.307 disabled |
| [DEBUG] PNP: 002e.407 disabled |
| [DEBUG] PNP: 002e.8 disabled |
| [DEBUG] PNP: 002e.108 disabled |
| [DEBUG] PNP: 002e.9 disabled |
| [DEBUG] PNP: 002e.109 disabled |
| [DEBUG] PNP: 002e.209 disabled |
| [DEBUG] PNP: 002e.309 disabled |
| [DEBUG] PNP: 002e.a enabled |
| [DEBUG] PNP: 002e.b enabled |
| [DEBUG] PNP: 002e.c enabled |
| [DEBUG] PNP: 002e.d disabled |
| [DEBUG] PNP: 002e.f enabled |
| [SPEW ] scan_static_bus for PCI: 00:1f.0 done |
| [DEBUG] scan_bus: bus PCI: 00:1f.0 finished in 0 msecs |
| [DEBUG] PCI: 00:1f.3 scanning... |
| [SPEW ] scan_generic_bus for PCI: 00:1f.3 |
| [SPEW ] scan_generic_bus for PCI: 00:1f.3 done |
| [DEBUG] scan_bus: bus PCI: 00:1f.3 finished in 0 msecs |
| [DEBUG] scan_bus: bus DOMAIN: 0000 finished in 1 msecs |
| [SPEW ] scan_static_bus for Root Device done |
| [DEBUG] scan_bus: bus Root Device finished in 1 msecs |
| [INFO ] done |
| [DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 1 / 0 ms |
| [DEBUG] found VGA at PCI: 00:02.0 |
| [DEBUG] Setting up VGA for PCI: 00:02.0 |
| [DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| [DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| [INFO ] Allocating resources... |
| [INFO ] Reading resources... |
| [SPEW ] Root Device read_resources bus 0 link: 0 |
| [SPEW ] DOMAIN: 0000 read_resources bus 0 link: 0 |
| [DEBUG] Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000. |
| [DEBUG] TOUUD 0x87b600000 TOLUD 0x84a00000 TOM 0x800000000 |
| [DEBUG] MEBASE 0x7ffff00000 |
| [DEBUG] IGD decoded, subtracting 64M UMA and 2M GTT |
| [DEBUG] TSEG base 0x80000000 size 8M |
| [INFO ] Available memory below 4GB: 2048M |
| [SPEW ] dev: PCI: 00:00.0, index: 0x3, base: 0x0, size: 0xa0000 |
| [SPEW ] dev: PCI: 00:00.0, index: 0x4, base: 0x100000, size: 0x7ff00000 |
| [INFO ] Available memory above 4GB: 30646M |
| [SPEW ] dev: PCI: 00:00.0, index: 0x5, base: 0x100000000, size: 0x77b600000 |
| [SPEW ] dev: PCI: 00:00.0, index: 0x6, base: 0x80000000, size: 0x4a00000 |
| [SPEW ] dev: PCI: 00:00.0, index: 0x7, base: 0xa0000, size: 0x20000 |
| [SPEW ] dev: PCI: 00:00.0, index: 0x8, base: 0xc0000, size: 0x40000 |
| [SPEW ] dev: PCI: 00:00.0, index: 0x9, base: 0x20000000, size: 0x200000 |
| [SPEW ] dev: PCI: 00:00.0, index: 0xa, base: 0x40000000, size: 0x200000 |
| [SPEW ] dev: PCI: 00:00.0, index: 0xb, base: 0xfed90000, size: 0x1000 |
| [SPEW ] dev: PCI: 00:00.0, index: 0xc, base: 0xfed91000, size: 0x1000 |
| [SPEW ] PCI: 00:01.0 read_resources bus 1 link: 0 |
| [SPEW ] PCI: 00:01.0 read_resources bus 1 link: 0 done |
| [SPEW ] PCI: 00:1c.0 read_resources bus 2 link: 0 |
| [SPEW ] PCI: 00:1c.0 read_resources bus 2 link: 0 done |
| [SPEW ] PCI: 00:1c.4 read_resources bus 3 link: 0 |
| [SPEW ] PCI: 00:1c.4 read_resources bus 3 link: 0 done |
| [SPEW ] PCI: 00:1c.6 read_resources bus 4 link: 0 |
| [SPEW ] PCI: 00:1c.6 read_resources bus 4 link: 0 done |
| [SPEW ] PCI: 00:1e.0 read_resources bus 5 link: 0 |
| [SPEW ] PCI: 00:1e.0 read_resources bus 5 link: 0 done |
| [SPEW ] PCI: 00:1f.0 read_resources bus 0 link: 0 |
| [SPEW ] PCI: 00:1f.0 read_resources bus 0 link: 0 done |
| [SPEW ] DOMAIN: 0000 read_resources bus 0 link: 0 done |
| [SPEW ] Root Device read_resources bus 0 link: 0 done |
| [INFO ] Done reading resources. |
| [SPEW ] Show resources in subtree (Root Device)...After reading. |
| [DEBUG] Root Device child on link 0 CPU_CLUSTER: 0 |
| [DEBUG] CPU_CLUSTER: 0 |
| [DEBUG] DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| [SPEW ] DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 |
| [SPEW ] DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit fffffffff flags 40040200 index 10000100 |
| [DEBUG] PCI: 00:00.0 |
| [SPEW ] PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 |
| [SPEW ] PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 |
| [SPEW ] PCI: 00:00.0 resource base 100000 size 7ff00000 align 0 gran 0 limit 0 flags e0004200 index 4 |
| [SPEW ] PCI: 00:00.0 resource base 100000000 size 77b600000 align 0 gran 0 limit 0 flags e0004200 index 5 |
| [SPEW ] PCI: 00:00.0 resource base 80000000 size 4a00000 align 0 gran 0 limit 0 flags f0000200 index 6 |
| [SPEW ] PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7 |
| [SPEW ] PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8 |
| [SPEW ] PCI: 00:00.0 resource base 20000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index 9 |
| [SPEW ] PCI: 00:00.0 resource base 40000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index a |
| [SPEW ] PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b |
| [SPEW ] PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c |
| [DEBUG] PCI: 00:01.0 |
| [SPEW ] PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| [SPEW ] PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| [SPEW ] PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| [DEBUG] PCI: 00:02.0 |
| [SPEW ] PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10 |
| [SPEW ] PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18 |
| [SPEW ] PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20 |
| [DEBUG] PCI: 00:16.0 |
| [SPEW ] PCI: 00:16.0 resource base 0 size 10 align 12 gran 4 limit ffffffffffffffff flags 201 index 10 |
| [DEBUG] PCI: 00:19.0 |
| [SPEW ] PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 |
| [SPEW ] PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 |
| [SPEW ] PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 |
| [DEBUG] PCI: 00:1a.0 |
| [SPEW ] PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| [DEBUG] PCI: 00:1b.0 |
| [SPEW ] PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 |
| [DEBUG] PCI: 00:1c.0 |
| [SPEW ] PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| [SPEW ] PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| [SPEW ] PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| [DEBUG] PCI: 00:1c.4 child on link 0 PCI: 03:00.0 |
| [SPEW ] PCI: 00:1c.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| [SPEW ] PCI: 00:1c.4 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| [SPEW ] PCI: 00:1c.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| [DEBUG] PCI: 03:00.0 |
| [SPEW ] PCI: 03:00.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10 |
| [DEBUG] PCI: 00:1c.5 |
| [DEBUG] PCI: 00:1c.6 child on link 0 PCI: 04:00.0 |
| [SPEW ] PCI: 00:1c.6 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| [SPEW ] PCI: 00:1c.6 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| [SPEW ] PCI: 00:1c.6 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| [DEBUG] PCI: 04:00.0 |
| [SPEW ] PCI: 04:00.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10 |
| [DEBUG] PCI: 00:1d.0 |
| [SPEW ] PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| [DEBUG] PCI: 00:1e.0 child on link 0 PCI: 05:00.0 |
| [SPEW ] PCI: 00:1e.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| [SPEW ] PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| [SPEW ] PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| [DEBUG] PCI: 05:00.0 |
| [SPEW ] PCI: 05:00.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 10 |
| [DEBUG] PCI: 05:00.1 |
| [SPEW ] PCI: 05:00.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 |
| [DEBUG] PCI: 05:00.2 |
| [SPEW ] PCI: 05:00.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 10 |
| [SPEW ] PCI: 05:00.2 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 14 |
| [DEBUG] PCI: 05:03.0 |
| [SPEW ] PCI: 05:03.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 |
| [DEBUG] PCI: 00:1f.0 child on link 0 PNP: 002e.0 |
| [SPEW ] PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| [SPEW ] PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| [SPEW ] PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| [DEBUG] PNP: 002e.0 |
| [SPEW ] PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60 |
| [SPEW ] PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| [SPEW ] PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 |
| [DEBUG] PNP: 002e.1 |
| [SPEW ] PNP: 002e.1 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60 |
| [SPEW ] PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| [SPEW ] PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 |
| [DEBUG] PNP: 002e.2 |
| [SPEW ] PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60 |
| [SPEW ] PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| [DEBUG] PNP: 002e.3 |
| [SPEW ] PNP: 002e.3 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60 |
| [SPEW ] PNP: 002e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| [DEBUG] PNP: 002e.5 |
| [SPEW ] PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit fff flags c0000100 index 60 |
| [SPEW ] PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit fff flags c0000100 index 62 |
| [SPEW ] PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| [SPEW ] PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72 |
| [DEBUG] PNP: 002e.106 |
| [SPEW ] PNP: 002e.106 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 62 |
| [DEBUG] PNP: 002e.107 |
| [DEBUG] PNP: 002e.207 |
| [DEBUG] PNP: 002e.307 |
| [DEBUG] PNP: 002e.407 |
| [DEBUG] PNP: 002e.8 |
| [DEBUG] PNP: 002e.108 |
| [DEBUG] PNP: 002e.9 |
| [DEBUG] PNP: 002e.109 |
| [DEBUG] PNP: 002e.209 |
| [DEBUG] PNP: 002e.309 |
| [DEBUG] PNP: 002e.a |
| [DEBUG] PNP: 002e.b |
| [SPEW ] PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit fff flags c0000100 index 60 |
| [SPEW ] PNP: 002e.b resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| [DEBUG] PNP: 002e.c |
| [DEBUG] PNP: 002e.d |
| [DEBUG] PNP: 002e.f |
| [DEBUG] PCI: 00:1f.2 |
| [SPEW ] PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 |
| [SPEW ] PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 |
| [SPEW ] PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 |
| [SPEW ] PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c |
| [SPEW ] PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 |
| [SPEW ] PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24 |
| [DEBUG] PCI: 00:1f.3 |
| [SPEW ] PCI: 00:1f.3 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10 |
| [SPEW ] PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 |
| [DEBUG] PCI: 00:1f.5 |
| [DEBUG] PCI: 00:1f.6 |
| [INFO ] === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) === |
| [DEBUG] PCI: 00:1c.4 io: size: 0 align: 12 gran: 12 limit: ffff |
| [DEBUG] PCI: 00:1c.4 io: size: 0 align: 12 gran: 12 limit: ffff done |
| [DEBUG] PCI: 00:1c.4 mem: size: 0 align: 20 gran: 20 limit: ffffffff |
| [DEBUG] PCI: 03:00.0 10 * [0x0 - 0x1fff] mem |
| [DEBUG] PCI: 00:1c.4 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done |
| [DEBUG] PCI: 00:1c.4 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| [DEBUG] PCI: 00:1c.4 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| [DEBUG] PCI: 00:1c.6 io: size: 0 align: 12 gran: 12 limit: ffff |
| [DEBUG] PCI: 00:1c.6 io: size: 0 align: 12 gran: 12 limit: ffff done |
| [DEBUG] PCI: 00:1c.6 mem: size: 0 align: 20 gran: 20 limit: ffffffff |
| [DEBUG] PCI: 04:00.0 10 * [0x0 - 0x1fff] mem |
| [DEBUG] PCI: 00:1c.6 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done |
| [DEBUG] PCI: 00:1c.6 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| [DEBUG] PCI: 00:1c.6 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| [DEBUG] PCI: 00:1e.0 io: size: 0 align: 12 gran: 12 limit: ffff |
| [DEBUG] PCI: 05:00.0 10 * [0x0 - 0x3f] io |
| [DEBUG] PCI: 05:00.1 10 * [0x40 - 0x47] io |
| [DEBUG] PCI: 00:1e.0 io: size: 1000 align: 12 gran: 12 limit: ffff done |
| [DEBUG] PCI: 00:1e.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff |
| [DEBUG] PCI: 05:00.2 14 * [0x0 - 0x3fff] mem |
| [DEBUG] PCI: 05:03.0 10 * [0x4000 - 0x4fff] mem |
| [DEBUG] PCI: 05:00.2 10 * [0x5000 - 0x57ff] mem |
| [DEBUG] PCI: 00:1e.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done |
| [DEBUG] PCI: 00:1e.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| [DEBUG] PCI: 00:1e.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| [INFO ] === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) === |
| [DEBUG] DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff |
| [DEBUG] update_constraints: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed) |
| [DEBUG] update_constraints: PNP: 002e.2 60 base 000003f8 limit 000003ff io (fixed) |
| [DEBUG] update_constraints: PNP: 002e.5 60 base 00000060 limit 00000060 io (fixed) |
| [DEBUG] update_constraints: PNP: 002e.5 62 base 00000064 limit 00000064 io (fixed) |
| [DEBUG] update_constraints: PNP: 002e.b 60 base 00000290 limit 00000291 io (fixed) |
| [DEBUG] update_constraints: PCI: 00:1f.3 20 base 00000400 limit 0000041f io (fixed) |
| [INFO ] DOMAIN: 0000: Resource ranges: |
| [INFO ] * Base: 1000, Size: f000, Tag: 100 |
| [DEBUG] PCI: 00:1e.0 1c * [0x1000 - 0x1fff] limit: 1fff io |
| [DEBUG] PCI: 00:02.0 20 * [0x2000 - 0x203f] limit: 203f io |
| [DEBUG] PCI: 00:19.0 18 * [0x2040 - 0x205f] limit: 205f io |
| [DEBUG] PCI: 00:1f.2 20 * [0x2060 - 0x207f] limit: 207f io |
| [DEBUG] PCI: 00:1f.2 10 * [0x2080 - 0x2087] limit: 2087 io |
| [DEBUG] PCI: 00:1f.2 18 * [0x2088 - 0x208f] limit: 208f io |
| [DEBUG] PCI: 00:1f.2 14 * [0x2090 - 0x2093] limit: 2093 io |
| [DEBUG] PCI: 00:1f.2 1c * [0x2094 - 0x2097] limit: 2097 io |
| [DEBUG] DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done |
| [DEBUG] DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff |
| [DEBUG] update_constraints: PCI: 00:00.0 60 base f0000000 limit f3ffffff mem (fixed) |
| [DEBUG] update_constraints: PCI: 00:00.0 03 base 00000000 limit 0009ffff mem (fixed) |
| [DEBUG] update_constraints: PCI: 00:00.0 04 base 00100000 limit 7fffffff mem (fixed) |
| [DEBUG] update_constraints: PCI: 00:00.0 05 base 100000000 limit 87b5fffff mem (fixed) |
| [DEBUG] update_constraints: PCI: 00:00.0 06 base 80000000 limit 849fffff mem (fixed) |
| [DEBUG] update_constraints: PCI: 00:00.0 07 base 000a0000 limit 000bffff mem (fixed) |
| [DEBUG] update_constraints: PCI: 00:00.0 08 base 000c0000 limit 000fffff mem (fixed) |
| [DEBUG] update_constraints: PCI: 00:00.0 09 base 20000000 limit 201fffff mem (fixed) |
| [DEBUG] update_constraints: PCI: 00:00.0 0a base 40000000 limit 401fffff mem (fixed) |
| [DEBUG] update_constraints: PCI: 00:00.0 0b base fed90000 limit fed90fff mem (fixed) |
| [DEBUG] update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed) |
| [DEBUG] update_constraints: PCI: 00:1f.0 10000100 base ff000000 limit ffffffff mem (fixed) |
| [DEBUG] update_constraints: PCI: 00:1f.0 03 base fec00000 limit fec00fff mem (fixed) |
| [INFO ] DOMAIN: 0000: Resource ranges: |
| [INFO ] * Base: 84a00000, Size: 6b600000, Tag: 200 |
| [INFO ] * Base: f4000000, Size: ac00000, Tag: 200 |
| [INFO ] * Base: fec01000, Size: 18f000, Tag: 200 |
| [INFO ] * Base: fed92000, Size: 26e000, Tag: 200 |
| [INFO ] * Base: 87b600000, Size: 784a00000, Tag: 100200 |
| [DEBUG] PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem |
| [DEBUG] PCI: 00:02.0 10 * [0x84c00000 - 0x84ffffff] limit: 84ffffff mem |
| [DEBUG] PCI: 00:1c.4 20 * [0x84a00000 - 0x84afffff] limit: 84afffff mem |
| [DEBUG] PCI: 00:1c.6 20 * [0x84b00000 - 0x84bfffff] limit: 84bfffff mem |
| [DEBUG] PCI: 00:1e.0 20 * [0x85000000 - 0x850fffff] limit: 850fffff mem |
| [DEBUG] PCI: 00:19.0 10 * [0x85100000 - 0x8511ffff] limit: 8511ffff mem |
| [DEBUG] PCI: 00:1b.0 10 * [0x85120000 - 0x85123fff] limit: 85123fff mem |
| [DEBUG] PCI: 00:19.0 14 * [0x85124000 - 0x85124fff] limit: 85124fff mem |
| [DEBUG] PCI: 00:1f.2 24 * [0x85125000 - 0x851257ff] limit: 851257ff mem |
| [DEBUG] PCI: 00:1a.0 10 * [0x85126000 - 0x851263ff] limit: 851263ff mem |
| [DEBUG] PCI: 00:1d.0 10 * [0x85127000 - 0x851273ff] limit: 851273ff mem |
| [DEBUG] PCI: 00:1f.3 10 * [0x85128000 - 0x851280ff] limit: 851280ff mem |
| [DEBUG] PCI: 00:16.0 10 * [0x85129000 - 0x8512900f] limit: 8512900f mem |
| [DEBUG] DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff done |
| [DEBUG] PCI: 00:1c.4 mem: base: 84a00000 size: 100000 align: 20 gran: 20 limit: 84afffff |
| [INFO ] PCI: 00:1c.4: Resource ranges: |
| [INFO ] * Base: 84a00000, Size: 100000, Tag: 200 |
| [DEBUG] PCI: 03:00.0 10 * [0x84a00000 - 0x84a01fff] limit: 84a01fff mem |
| [DEBUG] PCI: 00:1c.4 mem: base: 84a00000 size: 100000 align: 20 gran: 20 limit: 84afffff done |
| [DEBUG] PCI: 00:1c.6 mem: base: 84b00000 size: 100000 align: 20 gran: 20 limit: 84bfffff |
| [INFO ] PCI: 00:1c.6: Resource ranges: |
| [INFO ] * Base: 84b00000, Size: 100000, Tag: 200 |
| [DEBUG] PCI: 04:00.0 10 * [0x84b00000 - 0x84b01fff] limit: 84b01fff mem |
| [DEBUG] PCI: 00:1c.6 mem: base: 84b00000 size: 100000 align: 20 gran: 20 limit: 84bfffff done |
| [DEBUG] PCI: 00:1e.0 io: base: 1000 size: 1000 align: 12 gran: 12 limit: 1fff |
| [INFO ] PCI: 00:1e.0: Resource ranges: |
| [INFO ] * Base: 1000, Size: 1000, Tag: 100 |
| [DEBUG] PCI: 05:00.0 10 * [0x1000 - 0x103f] limit: 103f io |
| [DEBUG] PCI: 05:00.1 10 * [0x1040 - 0x1047] limit: 1047 io |
| [DEBUG] PCI: 00:1e.0 io: base: 1000 size: 1000 align: 12 gran: 12 limit: 1fff done |
| [DEBUG] PCI: 00:1e.0 mem: base: 85000000 size: 100000 align: 20 gran: 20 limit: 850fffff |
| [INFO ] PCI: 00:1e.0: Resource ranges: |
| [INFO ] * Base: 85000000, Size: 100000, Tag: 200 |
| [DEBUG] PCI: 05:00.2 14 * [0x85000000 - 0x85003fff] limit: 85003fff mem |
| [DEBUG] PCI: 05:03.0 10 * [0x85004000 - 0x85004fff] limit: 85004fff mem |
| [DEBUG] PCI: 05:00.2 10 * [0x85005000 - 0x850057ff] limit: 850057ff mem |
| [DEBUG] PCI: 00:1e.0 mem: base: 85000000 size: 100000 align: 20 gran: 20 limit: 850fffff done |
| [INFO ] === Resource allocator: DOMAIN: 0000 - resource allocation complete === |
| [SPEW ] Root Device assign_resources, bus 0 link: 0 |
| [SPEW ] DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| [DEBUG] PCI: 00:01.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 01 io |
| [DEBUG] PCI: 00:01.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem |
| [DEBUG] PCI: 00:01.0 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 bus 01 mem |
| [DEBUG] PCI: 00:02.0 10 <- [0x0000000084c00000 - 0x0000000084ffffff] size 0x00400000 gran 0x16 mem64 |
| [DEBUG] PCI: 00:02.0 18 <- [0x0000000090000000 - 0x000000009fffffff] size 0x10000000 gran 0x1c prefmem64 |
| [DEBUG] PCI: 00:02.0 20 <- [0x0000000000002000 - 0x000000000000203f] size 0x00000040 gran 0x06 io |
| [DEBUG] PCI: 00:16.0 10 <- [0x0000000085129000 - 0x000000008512900f] size 0x00000010 gran 0x04 mem64 |
| [DEBUG] PCI: 00:19.0 10 <- [0x0000000085100000 - 0x000000008511ffff] size 0x00020000 gran 0x11 mem |
| [DEBUG] PCI: 00:19.0 14 <- [0x0000000085124000 - 0x0000000085124fff] size 0x00001000 gran 0x0c mem |
| [DEBUG] PCI: 00:19.0 18 <- [0x0000000000002040 - 0x000000000000205f] size 0x00000020 gran 0x05 io |
| [DEBUG] PCI: 00:1a.0 10 <- [0x0000000085126000 - 0x00000000851263ff] size 0x00000400 gran 0x0a mem |
| [DEBUG] PCI: 00:1b.0 10 <- [0x0000000085120000 - 0x0000000085123fff] size 0x00004000 gran 0x0e mem64 |
| [DEBUG] PCI: 00:1c.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 02 io |
| [DEBUG] PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem |
| [DEBUG] PCI: 00:1c.0 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 bus 02 mem |
| [DEBUG] PCI: 00:1c.4 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 03 io |
| [DEBUG] PCI: 00:1c.4 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 03 prefmem |
| [DEBUG] PCI: 00:1c.4 20 <- [0x0000000084a00000 - 0x0000000084afffff] size 0x00100000 gran 0x14 bus 03 mem |
| [SPEW ] PCI: 00:1c.4 assign_resources, bus 3 link: 0 |
| [DEBUG] PCI: 03:00.0 10 <- [0x0000000084a00000 - 0x0000000084a01fff] size 0x00002000 gran 0x0d mem64 |
| [SPEW ] PCI: 00:1c.4 assign_resources, bus 3 link: 0 done |
| [DEBUG] PCI: 00:1c.6 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 04 io |
| [DEBUG] PCI: 00:1c.6 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 04 prefmem |
| [DEBUG] PCI: 00:1c.6 20 <- [0x0000000084b00000 - 0x0000000084bfffff] size 0x00100000 gran 0x14 bus 04 mem |
| [SPEW ] PCI: 00:1c.6 assign_resources, bus 4 link: 0 |
| [DEBUG] PCI: 04:00.0 10 <- [0x0000000084b00000 - 0x0000000084b01fff] size 0x00002000 gran 0x0d mem64 |
| [SPEW ] PCI: 00:1c.6 assign_resources, bus 4 link: 0 done |
| [DEBUG] PCI: 00:1d.0 10 <- [0x0000000085127000 - 0x00000000851273ff] size 0x00000400 gran 0x0a mem |
| [DEBUG] PCI: 00:1e.0 1c <- [0x0000000000001000 - 0x0000000000001fff] size 0x00001000 gran 0x0c bus 05 io |
| [DEBUG] PCI: 00:1e.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 05 prefmem |
| [DEBUG] PCI: 00:1e.0 20 <- [0x0000000085000000 - 0x00000000850fffff] size 0x00100000 gran 0x14 bus 05 mem |
| [SPEW ] PCI: 00:1e.0 assign_resources, bus 5 link: 0 |
| [DEBUG] PCI: 05:00.0 10 <- [0x0000000000001000 - 0x000000000000103f] size 0x00000040 gran 0x06 io |
| [DEBUG] PCI: 05:00.1 10 <- [0x0000000000001040 - 0x0000000000001047] size 0x00000008 gran 0x03 io |
| [DEBUG] PCI: 05:00.2 10 <- [0x0000000085005000 - 0x00000000850057ff] size 0x00000800 gran 0x0b mem |
| [DEBUG] PCI: 05:00.2 14 <- [0x0000000085000000 - 0x0000000085003fff] size 0x00004000 gran 0x0e mem |
| [DEBUG] PCI: 05:03.0 10 <- [0x0000000085004000 - 0x0000000085004fff] size 0x00001000 gran 0x0c mem |
| [SPEW ] PCI: 00:1e.0 assign_resources, bus 5 link: 0 done |
| [SPEW ] PCI: 00:1f.0 assign_resources, bus 0 link: 0 |
| [DEBUG] PNP: 002e.2 60 <- [0x00000000000003f8 - 0x00000000000003ff] size 0x00000008 gran 0x03 io |
| [DEBUG] PNP: 002e.2 70 <- [0x0000000000000004 - 0x0000000000000004] size 0x00000001 gran 0x00 irq |
| [DEBUG] PNP: 002e.5 60 <- [0x0000000000000060 - 0x0000000000000060] size 0x00000001 gran 0x00 io |
| [DEBUG] PNP: 002e.5 62 <- [0x0000000000000064 - 0x0000000000000064] size 0x00000001 gran 0x00 io |
| [DEBUG] PNP: 002e.5 70 <- [0x0000000000000001 - 0x0000000000000001] size 0x00000001 gran 0x00 irq |
| [DEBUG] PNP: 002e.5 72 <- [0x000000000000000c - 0x000000000000000c] size 0x00000001 gran 0x00 irq |
| [DEBUG] PNP: 002e.b 60 <- [0x0000000000000290 - 0x0000000000000291] size 0x00000002 gran 0x01 io |
| [DEBUG] PNP: 002e.b 70 <- [0x0000000000000000 - 0x0000000000000000] size 0x00000001 gran 0x00 irq |
| [SPEW ] PCI: 00:1f.0 assign_resources, bus 0 link: 0 done |
| [DEBUG] PCI: 00:1f.2 10 <- [0x0000000000002080 - 0x0000000000002087] size 0x00000008 gran 0x03 io |
| [DEBUG] PCI: 00:1f.2 14 <- [0x0000000000002090 - 0x0000000000002093] size 0x00000004 gran 0x02 io |
| [DEBUG] PCI: 00:1f.2 18 <- [0x0000000000002088 - 0x000000000000208f] size 0x00000008 gran 0x03 io |
| [DEBUG] PCI: 00:1f.2 1c <- [0x0000000000002094 - 0x0000000000002097] size 0x00000004 gran 0x02 io |
| [DEBUG] PCI: 00:1f.2 20 <- [0x0000000000002060 - 0x000000000000207f] size 0x00000020 gran 0x05 io |
| [DEBUG] PCI: 00:1f.2 24 <- [0x0000000085125000 - 0x00000000851257ff] size 0x00000800 gran 0x0b mem |
| [DEBUG] PCI: 00:1f.3 10 <- [0x0000000085128000 - 0x00000000851280ff] size 0x00000100 gran 0x08 mem64 |
| [SPEW ] DOMAIN: 0000 assign_resources, bus 0 link: 0 done |
| [SPEW ] Root Device assign_resources, bus 0 link: 0 done |
| [INFO ] Done setting resources. |
| [SPEW ] Show resources in subtree (Root Device)...After assigning values. |
| [DEBUG] Root Device child on link 0 CPU_CLUSTER: 0 |
| [DEBUG] CPU_CLUSTER: 0 |
| [DEBUG] DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| [SPEW ] DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 |
| [SPEW ] DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit fffffffff flags 40040200 index 10000100 |
| [DEBUG] PCI: 00:00.0 |
| [SPEW ] PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 |
| [SPEW ] PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 |
| [SPEW ] PCI: 00:00.0 resource base 100000 size 7ff00000 align 0 gran 0 limit 0 flags e0004200 index 4 |
| [SPEW ] PCI: 00:00.0 resource base 100000000 size 77b600000 align 0 gran 0 limit 0 flags e0004200 index 5 |
| [SPEW ] PCI: 00:00.0 resource base 80000000 size 4a00000 align 0 gran 0 limit 0 flags f0000200 index 6 |
| [SPEW ] PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7 |
| [SPEW ] PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8 |
| [SPEW ] PCI: 00:00.0 resource base 20000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index 9 |
| [SPEW ] PCI: 00:00.0 resource base 40000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index a |
| [SPEW ] PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b |
| [SPEW ] PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c |
| [DEBUG] PCI: 00:01.0 |
| [SPEW ] PCI: 00:01.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c |
| [SPEW ] PCI: 00:01.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24 |
| [SPEW ] PCI: 00:01.0 resource base ffffffff size 0 align 20 gran 20 limit ffffffff flags 20080202 index 20 |
| [DEBUG] PCI: 00:02.0 |
| [SPEW ] PCI: 00:02.0 resource base 84c00000 size 400000 align 22 gran 22 limit 84ffffff flags 60000201 index 10 |
| [SPEW ] PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18 |
| [SPEW ] PCI: 00:02.0 resource base 2000 size 40 align 6 gran 6 limit 203f flags 60000100 index 20 |
| [DEBUG] PCI: 00:16.0 |
| [SPEW ] PCI: 00:16.0 resource base 85129000 size 10 align 12 gran 4 limit 8512900f flags 60000201 index 10 |
| [DEBUG] PCI: 00:19.0 |
| [SPEW ] PCI: 00:19.0 resource base 85100000 size 20000 align 17 gran 17 limit 8511ffff flags 60000200 index 10 |
| [SPEW ] PCI: 00:19.0 resource base 85124000 size 1000 align 12 gran 12 limit 85124fff flags 60000200 index 14 |
| [SPEW ] PCI: 00:19.0 resource base 2040 size 20 align 5 gran 5 limit 205f flags 60000100 index 18 |
| [DEBUG] PCI: 00:1a.0 |
| [SPEW ] PCI: 00:1a.0 resource base 85126000 size 400 align 12 gran 10 limit 851263ff flags 60000200 index 10 |
| [DEBUG] PCI: 00:1b.0 |
| [SPEW ] PCI: 00:1b.0 resource base 85120000 size 4000 align 14 gran 14 limit 85123fff flags 60000201 index 10 |
| [DEBUG] PCI: 00:1c.0 |
| [SPEW ] PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c |
| [SPEW ] PCI: 00:1c.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24 |
| [SPEW ] PCI: 00:1c.0 resource base ffffffff size 0 align 20 gran 20 limit ffffffff flags 20080202 index 20 |
| [DEBUG] PCI: 00:1c.4 child on link 0 PCI: 03:00.0 |
| [SPEW ] PCI: 00:1c.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c |
| [SPEW ] PCI: 00:1c.4 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24 |
| [SPEW ] PCI: 00:1c.4 resource base 84a00000 size 100000 align 20 gran 20 limit 84afffff flags 60080202 index 20 |
| [DEBUG] PCI: 03:00.0 |
| [SPEW ] PCI: 03:00.0 resource base 84a00000 size 2000 align 13 gran 13 limit 84a01fff flags 60000201 index 10 |
| [DEBUG] PCI: 00:1c.5 |
| [DEBUG] PCI: 00:1c.6 child on link 0 PCI: 04:00.0 |
| [SPEW ] PCI: 00:1c.6 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c |
| [SPEW ] PCI: 00:1c.6 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24 |
| [SPEW ] PCI: 00:1c.6 resource base 84b00000 size 100000 align 20 gran 20 limit 84bfffff flags 60080202 index 20 |
| [DEBUG] PCI: 04:00.0 |
| [SPEW ] PCI: 04:00.0 resource base 84b00000 size 2000 align 13 gran 13 limit 84b01fff flags 60000201 index 10 |
| [DEBUG] PCI: 00:1d.0 |
| [SPEW ] PCI: 00:1d.0 resource base 85127000 size 400 align 12 gran 10 limit 851273ff flags 60000200 index 10 |
| [DEBUG] PCI: 00:1e.0 child on link 0 PCI: 05:00.0 |
| [SPEW ] PCI: 00:1e.0 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c |
| [SPEW ] PCI: 00:1e.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24 |
| [SPEW ] PCI: 00:1e.0 resource base 85000000 size 100000 align 20 gran 20 limit 850fffff flags 60080202 index 20 |
| [DEBUG] PCI: 05:00.0 |
| [SPEW ] PCI: 05:00.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 10 |
| [DEBUG] PCI: 05:00.1 |
| [SPEW ] PCI: 05:00.1 resource base 1040 size 8 align 3 gran 3 limit 1047 flags 60000100 index 10 |
| [DEBUG] PCI: 05:00.2 |
| [SPEW ] PCI: 05:00.2 resource base 85005000 size 800 align 12 gran 11 limit 850057ff flags 60000200 index 10 |
| [SPEW ] PCI: 05:00.2 resource base 85000000 size 4000 align 14 gran 14 limit 85003fff flags 60000200 index 14 |
| [DEBUG] PCI: 05:03.0 |
| [SPEW ] PCI: 05:03.0 resource base 85004000 size 1000 align 12 gran 12 limit 85004fff flags 60000200 index 10 |
| [DEBUG] PCI: 00:1f.0 child on link 0 PNP: 002e.0 |
| [SPEW ] PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| [SPEW ] PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| [SPEW ] PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| [DEBUG] PNP: 002e.0 |
| [SPEW ] PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60 |
| [SPEW ] PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| [SPEW ] PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 |
| [DEBUG] PNP: 002e.1 |
| [SPEW ] PNP: 002e.1 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60 |
| [SPEW ] PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| [SPEW ] PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 |
| [DEBUG] PNP: 002e.2 |
| [SPEW ] PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit fff flags e0000100 index 60 |
| [SPEW ] PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| [DEBUG] PNP: 002e.3 |
| [SPEW ] PNP: 002e.3 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60 |
| [SPEW ] PNP: 002e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| [DEBUG] PNP: 002e.5 |
| [SPEW ] PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit fff flags e0000100 index 60 |
| [SPEW ] PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit fff flags e0000100 index 62 |
| [SPEW ] PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| [SPEW ] PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72 |
| [DEBUG] PNP: 002e.106 |
| [SPEW ] PNP: 002e.106 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 62 |
| [DEBUG] PNP: 002e.107 |
| [DEBUG] PNP: 002e.207 |
| [DEBUG] PNP: 002e.307 |
| [DEBUG] PNP: 002e.407 |
| [DEBUG] PNP: 002e.8 |
| [DEBUG] PNP: 002e.108 |
| [DEBUG] PNP: 002e.9 |
| [DEBUG] PNP: 002e.109 |
| [DEBUG] PNP: 002e.209 |
| [DEBUG] PNP: 002e.309 |
| [DEBUG] PNP: 002e.a |
| [DEBUG] PNP: 002e.b |
| [SPEW ] PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit fff flags e0000100 index 60 |
| [SPEW ] PNP: 002e.b resource base 0 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| [DEBUG] PNP: 002e.c |
| [DEBUG] PNP: 002e.d |
| [DEBUG] PNP: 002e.f |
| [DEBUG] PCI: 00:1f.2 |
| [SPEW ] PCI: 00:1f.2 resource base 2080 size 8 align 3 gran 3 limit 2087 flags 60000100 index 10 |
| [SPEW ] PCI: 00:1f.2 resource base 2090 size 4 align 2 gran 2 limit 2093 flags 60000100 index 14 |
| [SPEW ] PCI: 00:1f.2 resource base 2088 size 8 align 3 gran 3 limit 208f flags 60000100 index 18 |
| [SPEW ] PCI: 00:1f.2 resource base 2094 size 4 align 2 gran 2 limit 2097 flags 60000100 index 1c |
| [SPEW ] PCI: 00:1f.2 resource base 2060 size 20 align 5 gran 5 limit 207f flags 60000100 index 20 |
| [SPEW ] PCI: 00:1f.2 resource base 85125000 size 800 align 12 gran 11 limit 851257ff flags 60000200 index 24 |
| [DEBUG] PCI: 00:1f.3 |
| [SPEW ] PCI: 00:1f.3 resource base 85128000 size 100 align 12 gran 8 limit 851280ff flags 60000201 index 10 |
| [SPEW ] PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 |
| [DEBUG] PCI: 00:1f.5 |
| [DEBUG] PCI: 00:1f.6 |
| [INFO ] Done allocating resources. |
| [DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 2 / 1 ms |
| [INFO ] Enabling resources... |
| [DEBUG] PCI: 00:00.0 subsystem <- 8086/2008 |
| [DEBUG] PCI: 00:00.0 cmd <- 06 |
| [DEBUG] PCI: 00:01.0 bridge ctrl <- 0013 |
| [DEBUG] PCI: 00:01.0 subsystem <- 8086/2008 |
| [DEBUG] PCI: 00:01.0 cmd <- 00 |
| [DEBUG] PCI: 00:02.0 subsystem <- 8086/2008 |
| [DEBUG] PCI: 00:02.0 cmd <- 03 |
| [DEBUG] PCI: 00:16.0 subsystem <- 8086/2008 |
| [DEBUG] PCI: 00:16.0 cmd <- 02 |
| [DEBUG] PCI: 00:19.0 subsystem <- 8086/2008 |
| [DEBUG] PCI: 00:19.0 cmd <- 103 |
| [DEBUG] PCI: 00:1a.0 subsystem <- 8086/2008 |
| [DEBUG] PCI: 00:1a.0 cmd <- 102 |
| [DEBUG] PCI: 00:1b.0 subsystem <- 8086/2008 |
| [DEBUG] PCI: 00:1b.0 cmd <- 102 |
| [DEBUG] PCI: 00:1c.0 bridge ctrl <- 0013 |
| [DEBUG] PCI: 00:1c.0 subsystem <- 8086/2008 |
| [DEBUG] PCI: 00:1c.0 cmd <- 100 |
| [DEBUG] PCI: 00:1c.4 bridge ctrl <- 0013 |
| [DEBUG] PCI: 00:1c.4 subsystem <- 8086/2008 |
| [DEBUG] PCI: 00:1c.4 cmd <- 106 |
| [DEBUG] PCI: 00:1c.6 bridge ctrl <- 0013 |
| [DEBUG] PCI: 00:1c.6 subsystem <- 8086/2008 |
| [DEBUG] PCI: 00:1c.6 cmd <- 106 |
| [DEBUG] PCI: 00:1d.0 subsystem <- 8086/2008 |
| [DEBUG] PCI: 00:1d.0 cmd <- 102 |
| [DEBUG] PCI: 00:1e.0 bridge ctrl <- 0013 |
| [DEBUG] PCI: 00:1e.0 subsystem <- 8086/2008 |
| [DEBUG] PCI: 00:1e.0 cmd <- 107 |
| [DEBUG] PCI: 00:1f.0 subsystem <- 8086/2008 |
| [DEBUG] PCI: 00:1f.0 cmd <- 107 |
| [DEBUG] PCI: 00:1f.2 subsystem <- 8086/2008 |
| [DEBUG] PCI: 00:1f.2 cmd <- 03 |
| [DEBUG] PCI: 00:1f.3 subsystem <- 8086/2008 |
| [DEBUG] PCI: 00:1f.3 cmd <- 103 |
| [DEBUG] PCI: 03:00.0 cmd <- 02 |
| [DEBUG] PCI: 04:00.0 cmd <- 02 |
| [DEBUG] PCI: 05:00.0 cmd <- 01 |
| [DEBUG] PCI: 05:00.1 cmd <- 01 |
| [DEBUG] PCI: 05:00.2 cmd <- 02 |
| [DEBUG] PCI: 05:03.0 cmd <- 02 |
| [INFO ] done. |
| [INFO ] Initializing devices... |
| [DEBUG] CPU_CLUSTER: 0 init |
| [DEBUG] MTRR: Physical address space: |
| [DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6 |
| [DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0 |
| [DEBUG] 0x00000000000c0000 - 0x000000007fffffff size 0x7ff40000 type 6 |
| [DEBUG] 0x0000000080000000 - 0x000000008fffffff size 0x10000000 type 0 |
| [DEBUG] 0x0000000090000000 - 0x000000009fffffff size 0x10000000 type 1 |
| [DEBUG] 0x00000000a0000000 - 0x00000000ffffffff size 0x60000000 type 0 |
| [DEBUG] 0x0000000100000000 - 0x000000087b5fffff size 0x77b600000 type 6 |
| [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x250 0x0606060606060606 |
| [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x258 0x0606060606060606 |
| [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x259 0x0000000000000000 |
| [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x268 0x0606060606060606 |
| [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x269 0x0606060606060606 |
| [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| [SPEW ] apic_id 0x0 call enable_fixed_mtrr() |
| [DEBUG] apic_id 0x0 setup mtrr for CPU physical address size: 36 bits |
| [DEBUG] MTRR: default type WB/UC MTRR counts: 4/6. |
| [DEBUG] MTRR: WB selected as default type. |
| [DEBUG] MTRR: 0 base 0x0000000080000000 mask 0x0000000ff0000000 type 0 |
| [DEBUG] MTRR: 1 base 0x0000000090000000 mask 0x0000000ff0000000 type 1 |
| [DEBUG] MTRR: 2 base 0x00000000a0000000 mask 0x0000000fe0000000 type 0 |
| [DEBUG] MTRR: 3 base 0x00000000c0000000 mask 0x0000000fc0000000 type 0 |
| |
| [DEBUG] MTRR check |
| [DEBUG] Fixed MTRRs : Enabled |
| [DEBUG] Variable MTRRs: Enabled |
| |
| [DEBUG] CPU has 4 cores, 4 threads enabled. |
| [DEBUG] Setting up SMI for CPU |
| [INFO ] Will perform SMM setup. |
| [INFO ] CBFS: Found 'cpu_microcode_blob.bin' @0x17100 size 0x6800 in mcache @0x7ffdd0ac |
| [DEBUG] microcode: sig=0x206a7 pf=0x2 revision=0x2f |
| [INFO ] CPU: Intel(R) Core(TM) i5-2500 CPU @ 3.30GHz. |
| [INFO ] LAPIC 0x0 in XAPIC mode. |
| [DEBUG] CPU: APIC: 00 enabled |
| [DEBUG] CPU: APIC: 01 enabled |
| [DEBUG] CPU: APIC: 02 enabled |
| [DEBUG] CPU: APIC: 03 enabled |
| [DEBUG] Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178 |
| [DEBUG] Processing 16 relocs. Offset value of 0x00030000 |
| [DEBUG] Attempting to start 3 APs |
| [DEBUG] Waiting for 10ms after sending INIT. |
| [DEBUG] Waiting for SIPI to complete... |
| [DEBUG] done. |
| [SPEW ] APs are ready after 30us |
| [DEBUG] Waiting for SIPI to complete... |
| [DEBUG] done. |
| [SPEW ] APs are ready after 0us |
| [INFO ] LAPIC 0x2 in XAPIC mode. |
| [INFO ] AP: slot 1 apic_id 2, MCU rev: 0x0000002f |
| [INFO ] LAPIC 0x4 in XAPIC mode. |
| [INFO ] AP: slot 2 apic_id 4, MCU rev: 0x0000002f |
| [INFO ] LAPIC 0x6 in XAPIC mode. |
| [INFO ] AP: slot 3 apic_id 6, MCU rev: 0x0000002f |
| [SPEW ] APs are ready after 9700us |
| [SPEW ] smm_setup_relocation_handler: enter |
| [SPEW ] smm_setup_relocation_handler: exit |
| [DEBUG] Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1e8 memsize: 0x1e8 |
| [DEBUG] Processing 11 relocs. Offset value of 0x00038000 |
| [DEBUG] smm_module_setup_stub: stack_top = 0x80001000 |
| [DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400 |
| [DEBUG] smm_module_setup_stub: runtime.start32_offset = 0x4c |
| [DEBUG] smm_module_setup_stub: runtime.smm_size = 0x10000 |
| [DEBUG] SMM Module: stub loaded at 38000. Will call 0x7ff9d7cf |
| [DEBUG] Installing permanent SMM handler to 0x80000000 |
| [DEBUG] FX_SAVE [0x802ff800-0x80300000] |
| [DEBUG] HANDLER [0x802fa000-0x802fea48] |
| |
| [DEBUG] CPU 0 |
| [DEBUG] ss0 [0x802f9c00-0x802fa000] |
| [DEBUG] stub0 [0x802f2000-0x802f21e8] |
| |
| [DEBUG] CPU 1 |
| [DEBUG] ss1 [0x802f9800-0x802f9c00] |
| [DEBUG] stub1 [0x802f1c00-0x802f1de8] |
| |
| [DEBUG] CPU 2 |
| [DEBUG] ss2 [0x802f9400-0x802f9800] |
| [DEBUG] stub2 [0x802f1800-0x802f19e8] |
| |
| [DEBUG] CPU 3 |
| [DEBUG] ss3 [0x802f9000-0x802f9400] |
| [DEBUG] stub3 [0x802f1400-0x802f15e8] |
| |
| [DEBUG] stacks [0x80000000-0x80001000] |
| [DEBUG] Loading module at 0x802fa000 with entry 0x802fae7f. filesize: 0x4928 memsize: 0x4a48 |
| [DEBUG] Processing 276 relocs. Offset value of 0x802fa000 |
| [DEBUG] Loading module at 0x802f2000 with entry 0x802f2000. filesize: 0x1e8 memsize: 0x1e8 |
| [DEBUG] Processing 11 relocs. Offset value of 0x802f2000 |
| [DEBUG] smm_module_setup_stub: stack_top = 0x80001000 |
| [DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400 |
| [DEBUG] smm_module_setup_stub: runtime.start32_offset = 0x4c |
| [DEBUG] smm_module_setup_stub: runtime.smm_size = 0x300000 |
| [DEBUG] SMM Module: placing smm entry code at 802f1c00, cpu # 0x1 |
| [SPEW ] smm_place_entry_code: copying from 802f2000 to 802f1c00 0x1e8 bytes |
| [DEBUG] SMM Module: placing smm entry code at 802f1800, cpu # 0x2 |
| [SPEW ] smm_place_entry_code: copying from 802f2000 to 802f1800 0x1e8 bytes |
| [DEBUG] SMM Module: placing smm entry code at 802f1400, cpu # 0x3 |
| [SPEW ] smm_place_entry_code: copying from 802f2000 to 802f1400 0x1e8 bytes |
| [DEBUG] SMM Module: stub loaded at 802f2000. Will call 0x802fae7f |
| [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ea000, cpu = 0 |
| [DEBUG] In relocation handler: cpu 0 |
| [DEBUG] New SMBASE=0x802ea000 IEDBASE=0x80400000 |
| [SPEW ] SMM revision: 0x00030101 |
| [DEBUG] Writing SMRR. base = 0x80000006, mask=0xff800800 |
| [DEBUG] Relocation complete. |
| [INFO ] microcode: Update skipped, already up-to-date |
| [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802e9c00, cpu = 1 |
| [DEBUG] In relocation handler: cpu 1 |
| [DEBUG] New SMBASE=0x802e9c00 IEDBASE=0x80400000 |
| [SPEW ] SMM revision: 0x00030101 |
| [DEBUG] Writing SMRR. base = 0x80000006, mask=0xff800800 |
| [DEBUG] Relocation complete. |
| [INFO ] microcode: Update skipped, already up-to-date |
| [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802e9800, cpu = 2 |
| [DEBUG] In relocation handler: cpu 2 |
| [DEBUG] New SMBASE=0x802e9800 IEDBASE=0x80400000 |
| [SPEW ] SMM revision: 0x00030101 |
| [DEBUG] Writing SMRR. base = 0x80000006, mask=0xff800800 |
| [DEBUG] Relocation complete. |
| [INFO ] microcode: Update skipped, already up-to-date |
| [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802e9400, cpu = 3 |
| [DEBUG] In relocation handler: cpu 3 |
| [DEBUG] New SMBASE=0x802e9400 IEDBASE=0x80400000 |
| [SPEW ] SMM revision: 0x00030101 |
| [DEBUG] Writing SMRR. base = 0x80000006, mask=0xff800800 |
| [DEBUG] Relocation complete. |
| [INFO ] microcode: Update skipped, already up-to-date |
| [SPEW ] APs are ready after 1900us |
| [INFO ] Initializing CPU #0 |
| [DEBUG] CPU: vendor Intel device 206a7 |
| [DEBUG] CPU: family 06, model 2a, stepping 07 |
| [INFO ] CPU: Intel(R) Core(TM) i5-2500 CPU @ 3.30GHz. |
| [INFO ] CPU: platform id 1 |
| [INFO ] CPU: cpuid(1) 0x206a7 |
| [INFO ] CPU: AES supported |
| [INFO ] CPU: TXT supported |
| [INFO ] CPU: VT supported |
| [DEBUG] VMX status: enabled |
| [DEBUG] IA32_FEATURE_CONTROL status: locked |
| [DEBUG] cpu: energy policy set to 6 |
| [DEBUG] model_x06ax: frequency set to 3300 |
| [INFO ] Turbo is available but hidden |
| [INFO ] Turbo is available and visible |
| [INFO ] CPU #0 initialized |
| [INFO ] Initializing CPU #2 |
| [INFO ] Initializing CPU #1 |
| [DEBUG] CPU: vendor Intel device 206a7 |
| [DEBUG] CPU: family 06, model 2a, stepping 07 |
| [DEBUG] CPU: vendor Intel device 206a7 |
| [DEBUG] CPU: family 06, model 2a, stepping 07 |
| [INFO ] Initializing CPU #3 |
| [DEBUG] CPU: vendor Intel device 206a7 |
| [DEBUG] CPU: family 06, model 2a, stepping 07 |
| [INFO ] CPU: Intel(R) Core(TM) i5-2500 CPU @ 3.30GHz. |
| [INFO ] CPU: Intel(R) Core(TM) i5-2500 CPU @ 3.30GHz. |
| [INFO ] CPU: platform id 1 |
| [INFO ] CPU: platform id 1 |
| [INFO ] CPU: cpuid(1) 0x206a7 |
| [INFO ] CPU: cpuid(1) 0x206a7 |
| [INFO ] CPU: AES supported |
| [INFO ] CPU: TXT supported |
| [INFO ] CPU: VT supported |
| [INFO ] CPU: Intel(R) Core(TM) i5-2500 CPU @ 3.30GHz. |
| [INFO ] CPU: AES supported |
| [INFO ] CPU: TXT supported |
| [INFO ] CPU: VT supported |
| [DEBUG] VMX status: enabled |
| [DEBUG] VMX status: enabled |
| [DEBUG] IA32_FEATURE_CONTROL status: locked |
| [DEBUG] IA32_FEATURE_CONTROL status: locked |
| [INFO ] CPU: platform id 1 |
| [INFO ] CPU: cpuid(1) 0x206a7 |
| [INFO ] CPU: AES supported |
| [INFO ] CPU: TXT supported |
| [INFO ] CPU: VT supported |
| [DEBUG] VMX status: enabled |
| [DEBUG] IA32_FEATURE_CONTROL status: locked |
| [DEBUG] cpu: energy policy set to 6 |
| [DEBUG] cpu: energy policy set to 6 |
| [DEBUG] model_x06ax: frequency set to 3300 |
| [INFO ] CPU #2 initialized |
| [DEBUG] model_x06ax: frequency set to 3300 |
| [INFO ] CPU #1 initialized |
| [DEBUG] cpu: energy policy set to 6 |
| [DEBUG] model_x06ax: frequency set to 3300 |
| [INFO ] CPU #3 initialized |
| [SPEW ] APs are ready after 100us |
| [INFO ] bsp_do_flight_plan done after 13 msecs. |
| [DEBUG] SMI_STS: |
| [SPEW ] PM1_STS: |
| [SPEW ] PM1_EN: 100 |
| [DEBUG] GPE0_STS: GPIO14 GPIO11 GPIO10 GPIO5 GPIO4 GPIO3 GPIO1 |
| [DEBUG] ALT_GP_SMI_STS: GPI14 GPI11 GPI10 GPI5 GPI4 GPI3 GPI2 GPI1 |
| [DEBUG] TCO_STS: |
| [DEBUG] Locking SMM. |
| [DEBUG] CPU_CLUSTER: 0 init finished in 26 msecs |
| [DEBUG] PCI: 00:00.0 init |
| [DEBUG] Disabling PEG12. |
| [DEBUG] Disabling PEG11. |
| [DEBUG] Disabling Device 4. |
| [DEBUG] Disabling PEG60. |
| [DEBUG] Disabling Device 7. |
| [DEBUG] Set BIOS_RESET_CPL |
| [DEBUG] CPU TDP: 95 Watts |
| [DEBUG] PCI: 00:00.0 init finished in 1 msecs |
| [DEBUG] PCI: 00:01.0 init |
| [DEBUG] PCI: 00:01.0 init finished in 0 msecs |
| [DEBUG] PCI: 00:02.0 init |
| [INFO ] CBFS: Found 'vbt.bin' @0x3d840 size 0x4ed in mcache @0x7ffdd1d4 |
| [INFO ] Found a VBT of 7168 bytes after decompression |
| [INFO ] GMA: Found VBT in CBFS |
| [INFO ] GMA: Found valid VBT in CBFS |
| [DEBUG] GT Power Management Init |
| [DEBUG] SNB GT1 Power Meter Weights |
| [DEBUG] GT Power Management Init (post VBIOS) |
| [SPEW ] Initializing VGA without OPROM. |
| [INFO ] framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32 |
| [INFO ] x_res x y_res: 1920 x 1200, size: 9216000 at 0x90000000 |
| [DEBUG] PCI: 00:02.0 init finished in 23 msecs |
| [DEBUG] PCI: 00:16.0 init |
| [DEBUG] ME: FW Partition Table : OK |
| [DEBUG] ME: Bringup Loader Failure : NO |
| [DEBUG] ME: Firmware Init Complete : NO |
| [DEBUG] ME: Manufacturing Mode : YES |
| [DEBUG] ME: Boot Options Present : NO |
| [DEBUG] ME: Update In Progress : NO |
| [DEBUG] ME: Current Working State : Initializing |
| [DEBUG] ME: Current Operation State : Bring up |
| [DEBUG] ME: Current Operation Mode : Debug or Disabled by AltDisableBit |
| [DEBUG] ME: Error Code : No Error |
| [DEBUG] ME: Progress Phase : BUP Phase |
| [DEBUG] ME: Power Management Event : Clean Moff->Mx wake |
| [DEBUG] ME: Progress Phase State : Check to see if straps say ME DISABLED |
| [NOTE ] ME: BIOS path: Disable |
| [DEBUG] No CMOS option 'me_state'. |
| [DEBUG] No CMOS option 'me_state_prev'. |
| [DEBUG] ME: me_state=0, me_state_prev=0 |
| [DEBUG] PCI: 00:16.0: Disabling device |
| [DEBUG] PCI: 00:16.0 init finished in 0 msecs |
| [DEBUG] PCI: 00:19.0 init |
| [DEBUG] PCI: 00:19.0 init finished in 0 msecs |
| [DEBUG] PCI: 00:1a.0 init |
| [DEBUG] EHCI: Setting up controller.. done. |
| [DEBUG] PCI: 00:1a.0 init finished in 0 msecs |
| [DEBUG] PCI: 00:1b.0 init |
| [DEBUG] Azalia: base = 0x85120000 |
| [DEBUG] Azalia: codec_mask = 0c |
| [DEBUG] azalia_audio: Initializing codec #3 |
| [DEBUG] azalia_audio: codec viddid: 80862805 |
| [DEBUG] azalia_audio: verb_size: 16 |
| [DEBUG] azalia_audio: verb loaded. |
| [DEBUG] azalia_audio: Initializing codec #2 |
| [DEBUG] azalia_audio: codec viddid: 10ec0888 |
| [DEBUG] azalia_audio: verb_size: 60 |
| [DEBUG] azalia_audio: verb loaded. |
| [DEBUG] PCI: 00:1b.0 init finished in 4 msecs |
| [DEBUG] PCI: 00:1c.0 init |
| [DEBUG] Initializing PCH PCIe bridge. |
| [DEBUG] PCI: 00:1c.0 init finished in 0 msecs |
| [DEBUG] PCI: 00:1c.4 init |
| [DEBUG] Initializing PCH PCIe bridge. |
| [DEBUG] PCI: 00:1c.4 init finished in 0 msecs |
| [DEBUG] PCI: 00:1c.6 init |
| [DEBUG] Initializing PCH PCIe bridge. |
| [DEBUG] PCI: 00:1c.6 init finished in 0 msecs |
| [DEBUG] PCI: 00:1d.0 init |
| [DEBUG] EHCI: Setting up controller.. done. |
| [DEBUG] PCI: 00:1d.0 init finished in 0 msecs |
| [DEBUG] PCI: 00:1e.0 init |
| [DEBUG] PCI init. |
| [DEBUG] PCI: 00:1e.0 init finished in 0 msecs |
| [DEBUG] PCI: 00:1f.0 init |
| [DEBUG] pch: lpc_init |
| [INFO ] PCH: detected Q67, device id: 0x1c4e, rev id 0x5 |
| [DEBUG] IOAPIC: Initializing IOAPIC at 0xfec00000 |
| [DEBUG] IOAPIC: ID = 0x00 |
| [SPEW ] IOAPIC: Dumping registers |
| [SPEW ] reg 0x0000: 0x00000000 |
| [SPEW ] reg 0x0001: 0x00170020 |
| [SPEW ] reg 0x0002: 0x00170020 |
| [DEBUG] IOAPIC: 24 interrupts |
| [DEBUG] IOAPIC: Clearing IOAPIC at 0xfec00000 |
| [SPEW ] IOAPIC: vector 0x00 value 0x00000000 0x00010000 |
| [SPEW ] IOAPIC: vector 0x01 value 0x00000000 0x00010000 |
| [SPEW ] IOAPIC: vector 0x02 value 0x00000000 0x00010000 |
| [SPEW ] IOAPIC: vector 0x03 value 0x00000000 0x00010000 |
| [SPEW ] IOAPIC: vector 0x04 value 0x00000000 0x00010000 |
| [SPEW ] IOAPIC: vector 0x05 value 0x00000000 0x00010000 |
| [SPEW ] IOAPIC: vector 0x06 value 0x00000000 0x00010000 |
| [SPEW ] IOAPIC: vector 0x07 value 0x00000000 0x00010000 |
| [SPEW ] IOAPIC: vector 0x08 value 0x00000000 0x00010000 |
| [SPEW ] IOAPIC: vector 0x09 value 0x00000000 0x00010000 |
| [SPEW ] IOAPIC: vector 0x0a value 0x00000000 0x00010000 |
| [SPEW ] IOAPIC: vector 0x0b value 0x00000000 0x00010000 |
| [SPEW ] IOAPIC: vector 0x0c value 0x00000000 0x00010000 |
| [SPEW ] IOAPIC: vector 0x0d value 0x00000000 0x00010000 |
| [SPEW ] IOAPIC: vector 0x0e value 0x00000000 0x00010000 |
| [SPEW ] IOAPIC: vector 0x0f value 0x00000000 0x00010000 |
| [SPEW ] IOAPIC: vector 0x10 value 0x00000000 0x00010000 |
| [SPEW ] IOAPIC: vector 0x11 value 0x00000000 0x00010000 |
| [SPEW ] IOAPIC: vector 0x12 value 0x00000000 0x00010000 |
| [SPEW ] IOAPIC: vector 0x13 value 0x00000000 0x00010000 |
| [SPEW ] IOAPIC: vector 0x14 value 0x00000000 0x00010000 |
| [SPEW ] IOAPIC: vector 0x15 value 0x00000000 0x00010000 |
| [SPEW ] IOAPIC: vector 0x16 value 0x00000000 0x00010000 |
| [SPEW ] IOAPIC: vector 0x17 value 0x00000000 0x00010000 |
| [DEBUG] IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| [SPEW ] IOAPIC: vector 0x00 value 0x00000000 0x00000700 |
| [INFO ] Set power off after power failure. |
| [INFO ] NMI sources disabled. |
| [DEBUG] CougarPoint PM init |
| [DEBUG] RTC: failed = 0x0 |
| [DEBUG] RTC Init |
| [DEBUG] apm_control: Disabling ACPI. |
| [DEBUG] APMC done. |
| [DEBUG] pch_spi_init |
| [DEBUG] PCI: 00:1f.0 init finished in 0 msecs |
| [DEBUG] PCI: 00:1f.2 init |
| [DEBUG] SATA: Initializing... |
| [DEBUG] SATA: Controller in AHCI mode. |
| [DEBUG] ABAR: 0x85125000 |
| [DEBUG] PCI: 00:1f.2 init finished in 0 msecs |
| [DEBUG] PCI: 00:1f.3 init |
| [DEBUG] PCI: 00:1f.3 init finished in 0 msecs |
| [DEBUG] PCI: 03:00.0 init |
| [DEBUG] PCI: 03:00.0 init finished in 0 msecs |
| [DEBUG] PCI: 04:00.0 init |
| [DEBUG] PCI: 04:00.0 init finished in 0 msecs |
| [DEBUG] PCI: 05:00.0 init |
| [DEBUG] PCI: 05:00.0 init finished in 0 msecs |
| [DEBUG] PCI: 05:00.1 init |
| [DEBUG] PCI: 05:00.1 init finished in 0 msecs |
| [DEBUG] PCI: 05:00.2 init |
| [DEBUG] PCI: 05:00.2 init finished in 0 msecs |
| [DEBUG] PCI: 05:03.0 init |
| [DEBUG] PCI: 05:03.0 init finished in 0 msecs |
| [DEBUG] PNP: 002e.2 init |
| [DEBUG] PNP: 002e.2 init finished in 0 msecs |
| [DEBUG] PNP: 002e.5 init |
| [INFO ] w83667hg_a_init: Disable mouse controller. |
| [DEBUG] PNP: 002e.5 init finished in 0 msecs |
| [DEBUG] PNP: 002e.a init |
| [INFO ] set power off after power fail |
| [DEBUG] PNP: 002e.a init finished in 0 msecs |
| [DEBUG] PNP: 002e.b init |
| [DEBUG] PNP: 002e.b init finished in 0 msecs |
| [DEBUG] PNP: 002e.c init |
| [DEBUG] PNP: 002e.c init finished in 0 msecs |
| [DEBUG] PNP: 002e.f init |
| [DEBUG] PNP: 002e.f init finished in 0 msecs |
| [INFO ] Devices initialized |
| [SPEW ] Show all devs... After init. |
| [SPEW ] Root Device: enabled 1 |
| [SPEW ] CPU_CLUSTER: 0: enabled 1 |
| [SPEW ] DOMAIN: 0000: enabled 1 |
| [SPEW ] PCI: 00:00.0: enabled 1 |
| [SPEW ] PCI: 00:01.0: enabled 1 |
| [SPEW ] PCI: 00:01.1: enabled 0 |
| [SPEW ] PCI: 00:01.2: enabled 0 |
| [SPEW ] PCI: 00:02.0: enabled 1 |
| [SPEW ] PCI: 00:04.0: enabled 0 |
| [SPEW ] PCI: 00:06.0: enabled 0 |
| [SPEW ] PCI: 00:14.0: enabled 0 |
| [SPEW ] PCI: 00:16.0: enabled 0 |
| [SPEW ] PCI: 00:16.1: enabled 0 |
| [SPEW ] PCI: 00:16.2: enabled 0 |
| [SPEW ] PCI: 00:16.3: enabled 0 |
| [SPEW ] PCI: 00:19.0: enabled 1 |
| [SPEW ] PCI: 00:1a.0: enabled 1 |
| [SPEW ] PCI: 00:1b.0: enabled 1 |
| [SPEW ] PCI: 00:1c.0: enabled 1 |
| [SPEW ] PCI: 00:1c.1: enabled 0 |
| [SPEW ] PCI: 00:1c.2: enabled 0 |
| [SPEW ] PCI: 00:1c.3: enabled 0 |
| [SPEW ] PCI: 00:1c.4: enabled 1 |
| [SPEW ] PCI: 00:1c.5: enabled 0 |
| [SPEW ] PCI: 00:1c.6: enabled 1 |
| [SPEW ] PCI: 00:1c.7: enabled 0 |
| [SPEW ] PCI: 00:1d.0: enabled 1 |
| [SPEW ] PCI: 00:1e.0: enabled 1 |
| [SPEW ] PCI: 00:1f.0: enabled 1 |
| [SPEW ] PCI: 00:1f.2: enabled 1 |
| [SPEW ] PCI: 00:1f.3: enabled 1 |
| [SPEW ] PCI: 00:1f.5: enabled 0 |
| [SPEW ] PCI: 00:1f.6: enabled 0 |
| [SPEW ] PNP: 002e.0: enabled 0 |
| [SPEW ] PNP: 002e.1: enabled 0 |
| [SPEW ] PNP: 002e.2: enabled 1 |
| [SPEW ] PNP: 002e.3: enabled 0 |
| [SPEW ] PNP: 002e.5: enabled 1 |
| [SPEW ] PNP: 002e.106: enabled 0 |
| [SPEW ] PNP: 002e.107: enabled 0 |
| [SPEW ] PNP: 002e.207: enabled 0 |
| [SPEW ] PNP: 002e.307: enabled 0 |
| [SPEW ] PNP: 002e.407: enabled 0 |
| [SPEW ] PNP: 002e.8: enabled 0 |
| [SPEW ] PNP: 002e.108: enabled 0 |
| [SPEW ] PNP: 002e.9: enabled 0 |
| [SPEW ] PNP: 002e.109: enabled 0 |
| [SPEW ] PNP: 002e.209: enabled 0 |
| [SPEW ] PNP: 002e.309: enabled 0 |
| [SPEW ] PNP: 002e.a: enabled 1 |
| [SPEW ] PNP: 002e.b: enabled 1 |
| [SPEW ] PNP: 002e.c: enabled 1 |
| [SPEW ] PNP: 002e.d: enabled 0 |
| [SPEW ] PNP: 002e.f: enabled 1 |
| [SPEW ] PCI: 03:00.0: enabled 1 |
| [SPEW ] PCI: 04:00.0: enabled 1 |
| [SPEW ] PCI: 05:00.0: enabled 1 |
| [SPEW ] PCI: 05:00.1: enabled 1 |
| [SPEW ] PCI: 05:00.2: enabled 1 |
| [SPEW ] PCI: 05:03.0: enabled 1 |
| [SPEW ] APIC: 00: enabled 1 |
| [SPEW ] APIC: 02: enabled 1 |
| [SPEW ] APIC: 04: enabled 1 |
| [SPEW ] APIC: 06: enabled 1 |
| [DEBUG] BS: BS_DEV_INIT run times (exec / console): 56 / 1 ms |
| [DEBUG] FMAP: area SMMSTORE found @ 590000 (262144 bytes) |
| [INFO ] Manufacturer: ef |
| [INFO ] SF: Detected ef 4017 with sector size 0x1000, total 0x800000 |
| [DEBUG] smm store: 4 # blocks with size 0x10000 |
| [INFO ] SMMSTORE: Setting up SMI handler |
| [INFO ] Finalize devices... |
| [DEBUG] PCI: 00:1f.0 final |
| [DEBUG] apm_control: Finalizing SMM. |
| [DEBUG] APMC done. |
| [INFO ] Devices finalized |
| [INFO ] CBFS: Found 'fallback/dsdt.aml' @0x3b580 size 0x227e in mcache @0x7ffdd1a8 |
| [WARN ] CBFS: 'fallback/slic' not found. |
| [INFO ] ACPI: Writing ACPI tables at 7ff30000. |
| [DEBUG] ACPI: * FACS |
| [DEBUG] ACPI: * DSDT |
| [DEBUG] ACPI: * FADT |
| [DEBUG] ACPI: added table 1/32, length now 40 |
| [DEBUG] ACPI: * SSDT |
| [DEBUG] Found 1 CPU(s) with 4 core(s) each. |
| [DEBUG] PSS: 3301MHz power 95000 control 0x2500 status 0x2500 |
| [DEBUG] PSS: 3300MHz power 95000 control 0x2100 status 0x2100 |
| [DEBUG] PSS: 2800MHz power 75968 control 0x1c00 status 0x1c00 |
| [DEBUG] PSS: 2400MHz power 62158 control 0x1800 status 0x1800 |
| [DEBUG] PSS: 2000MHz power 49337 control 0x1400 status 0x1400 |
| [DEBUG] PSS: 1600MHz power 37519 control 0x1000 status 0x1000 |
| [DEBUG] PSS: 3301MHz power 95000 control 0x2500 status 0x2500 |
| [DEBUG] PSS: 3300MHz power 95000 control 0x2100 status 0x2100 |
| [DEBUG] PSS: 2800MHz power 75968 control 0x1c00 status 0x1c00 |
| [DEBUG] PSS: 2400MHz power 62158 control 0x1800 status 0x1800 |
| [DEBUG] PSS: 2000MHz power 49337 control 0x1400 status 0x1400 |
| [DEBUG] PSS: 1600MHz power 37519 control 0x1000 status 0x1000 |
| [DEBUG] PSS: 3301MHz power 95000 control 0x2500 status 0x2500 |
| [DEBUG] PSS: 3300MHz power 95000 control 0x2100 status 0x2100 |
| [DEBUG] PSS: 2800MHz power 75968 control 0x1c00 status 0x1c00 |
| [DEBUG] PSS: 2400MHz power 62158 control 0x1800 status 0x1800 |
| [DEBUG] PSS: 2000MHz power 49337 control 0x1400 status 0x1400 |
| [DEBUG] PSS: 1600MHz power 37519 control 0x1000 status 0x1000 |
| [DEBUG] PSS: 3301MHz power 95000 control 0x2500 status 0x2500 |
| [DEBUG] PSS: 3300MHz power 95000 control 0x2100 status 0x2100 |
| [DEBUG] PSS: 2800MHz power 75968 control 0x1c00 status 0x1c00 |
| [DEBUG] PSS: 2400MHz power 62158 control 0x1800 status 0x1800 |
| [DEBUG] PSS: 2000MHz power 49337 control 0x1400 status 0x1400 |
| [DEBUG] PSS: 1600MHz power 37519 control 0x1000 status 0x1000 |
| [DEBUG] PCI space above 4GB MMIO is at 0x87b600000, len = 0x784a00000 |
| [DEBUG] Generating ACPI PIRQ entries |
| [SPEW ] ACPI_PIRQ_GEN: PCI: 00:01.0: pin=0 pirq=0 |
| [SPEW ] ACPI_PIRQ_GEN: PCI: 00:02.0: pin=0 pirq=0 |
| [SPEW ] ACPI_PIRQ_GEN: PCI: 00:19.0: pin=0 pirq=1 |
| [SPEW ] ACPI_PIRQ_GEN: PCI: 00:1a.0: pin=0 pirq=3 |
| [SPEW ] ACPI_PIRQ_GEN: PCI: 00:1b.0: pin=0 pirq=3 |
| [SPEW ] ACPI_PIRQ_GEN: PCI: 00:1c.0: pin=0 pirq=0 |
| [SPEW ] ACPI_PIRQ_GEN: PCI: 00:1c.6: pin=2 pirq=2 |
| [SPEW ] ACPI_PIRQ_GEN: PCI: 00:1d.0: pin=0 pirq=2 |
| [SPEW ] ACPI_PIRQ_GEN: PCI: 00:1f.2: pin=0 pirq=0 |
| [SPEW ] ACPI_PIRQ_GEN: PCI: 00:1f.3: pin=1 pirq=0 |
| [DEBUG] ACPI: added table 2/32, length now 44 |
| [DEBUG] ACPI: * MCFG |
| [DEBUG] ACPI: added table 3/32, length now 48 |
| [DEBUG] ACPI: * MADT |
| [DEBUG] IOAPIC: 24 interrupts |
| [DEBUG] ACPI: added table 4/32, length now 52 |
| [DEBUG] current = 7ff33b10 |
| [DEBUG] ACPI: * DMAR |
| [DEBUG] ACPI: added table 5/32, length now 56 |
| [DEBUG] current = 7ff33bd0 |
| [DEBUG] ACPI: * HPET |
| [DEBUG] ACPI: added table 6/32, length now 60 |
| [INFO ] ACPI: done. |
| [DEBUG] ACPI tables: 15376 bytes. |
| [DEBUG] smbios_write_tables: 7ff28000 |
| [DEBUG] SMBIOS firmware version is set to coreboot_version: '4.19-1034-gd98b24d390' |
| [INFO ] Create SMBIOS type 16 |
| [INFO ] Create SMBIOS type 17 |
| [INFO ] Create SMBIOS type 20 |
| [DEBUG] SMBIOS tables: 1309 bytes. |
| [DEBUG] Writing table forward entry at 0x00000500 |
| [DEBUG] Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 3fe9 |
| [DEBUG] Writing coreboot table at 0x7ff54000 |
| [INFO ] CBFS: Found 'cmos_layout.bin' @0x3dec0 size 0x4d8 in mcache @0x7ffdd22c |
| [DEBUG] 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| [DEBUG] 1. 0000000000001000-000000000009ffff: RAM |
| [DEBUG] 2. 00000000000a0000-00000000000fffff: RESERVED |
| [DEBUG] 3. 0000000000100000-000000001fffffff: RAM |
| [DEBUG] 4. 0000000020000000-00000000201fffff: RESERVED |
| [DEBUG] 5. 0000000020200000-000000003fffffff: RAM |
| [DEBUG] 6. 0000000040000000-00000000401fffff: RESERVED |
| [DEBUG] 7. 0000000040200000-000000007ff27fff: RAM |
| [DEBUG] 8. 000000007ff28000-000000007ff7ffff: CONFIGURATION TABLES |
| [DEBUG] 9. 000000007ff80000-000000007ffcdfff: RAMSTAGE |
| [DEBUG] 10. 000000007ffce000-000000007fffffff: CONFIGURATION TABLES |
| [DEBUG] 11. 0000000080000000-00000000849fffff: RESERVED |
| [DEBUG] 12. 00000000f0000000-00000000f3ffffff: RESERVED |
| [DEBUG] 13. 00000000fed90000-00000000fed91fff: RESERVED |
| [DEBUG] 14. 0000000100000000-000000087b5fffff: RAM |
| [DEBUG] Wrote coreboot table at: 0x7ff54000, 0x918 bytes, checksum 159b |
| [DEBUG] coreboot table: 2352 bytes. |
| [DEBUG] IMD ROOT 0. 0x7ffff000 0x00001000 |
| [DEBUG] IMD SMALL 1. 0x7fffe000 0x00001000 |
| [DEBUG] CONSOLE 2. 0x7ffde000 0x00020000 |
| [DEBUG] RO MCACHE 3. 0x7ffdd000 0x00000308 |
| [DEBUG] TIME STAMP 4. 0x7ffdc000 0x00000910 |
| [DEBUG] MEM INFO 5. 0x7ffdb000 0x000007a8 |
| [DEBUG] AFTER CAR 6. 0x7ffce000 0x0000d000 |
| [DEBUG] RAMSTAGE 7. 0x7ff7f000 0x0004f000 |
| [DEBUG] SMM BACKUP 8. 0x7ff6f000 0x00010000 |
| [DEBUG] IGD OPREGION 9. 0x7ff6c000 0x00002f3e |
| [DEBUG] SMM COMBUFFER10. 0x7ff5c000 0x00010000 |
| [DEBUG] COREBOOT 11. 0x7ff54000 0x00008000 |
| [DEBUG] ACPI 12. 0x7ff30000 0x00024000 |
| [DEBUG] SMBIOS 13. 0x7ff28000 0x00008000 |
| [DEBUG] IMD small region: |
| [DEBUG] IMD ROOT 0. 0x7fffec00 0x00000400 |
| [DEBUG] FMAP 1. 0x7fffeae0 0x0000010a |
| [DEBUG] ROMSTAGE 2. 0x7fffeac0 0x00000004 |
| [DEBUG] ROMSTG STCK 3. 0x7fffea00 0x000000a8 |
| [DEBUG] ACPI GNVS 4. 0x7fffe900 0x00000100 |
| [DEBUG] BS: BS_WRITE_TABLES run times (exec / console): 2 / 0 ms |
| [INFO ] CBFS: Found 'fallback/payload' @0x440c0 size 0xbe772 in mcache @0x7ffdd298 |
| [DEBUG] Checking segment from ROM address 0xffe142ec |
| [DEBUG] Checking segment from ROM address 0xffe14308 |
| [DEBUG] Loading segment from ROM address 0xffe142ec |
| [DEBUG] code (compression=1) |
| [DEBUG] New segment dstaddr 0x00800000 memsize 0x590000 srcaddr 0xffe14324 filesize 0xbe73a |
| [DEBUG] Loading Segment: addr: 0x00800000 memsz: 0x0000000000590000 filesz: 0x00000000000be73a |
| [DEBUG] using LZMA |
| [SPEW ] [ 0x00800000, 00d90000, 0x00d90000) <- ffe14324 |
| [DEBUG] Loading segment from ROM address 0xffe14308 |
| [DEBUG] Entry Point 0x00801659 |
| [SPEW ] Loaded segments |
| [DEBUG] BS: BS_PAYLOAD_LOAD run times (exec / console): 211 / 0 ms |
| [DEBUG] ICH-NM10-PCH: watchdog disabled |
| [DEBUG] Jumping to boot code at 0x00801659(0x7ff54000) |
| [SPEW ] CPU0: stack: 0x7ffbbd40 - 0x7ffbdd40, lowest used address 0x7ffbd6ec, stack used: 1620 bytes |