| |
| |
| coreboot-4.8-706-gafc74cab6e Wed Jul 4 08:57:40 UTC 2018 romstage starting... |
| SMBus controller enabled. |
| Intel Pineview northbridge |
| Setting up static southbridge registers... done. |
| Disabling Watchdog reboot... done. |
| Setting up static northbridge registers... done. |
| FMAP: Found "FLASH" version 1.1 at 0. |
| FMAP: base = ff000000 size = 1000000 #areas = 3 |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 23040 size 3f0 |
| PM1_CNT: 00000000 |
| Initializing memory |
| Boot path: Normal |
| fefc3aac: 80 08 08 0e 0a 61 40 00 05 25 40 00 82 08 00 00 .....a@..%@..... |
| fefc3abc: 0c 04 30 01 02 00 03 3d 50 50 60 32 1e 32 25 80 ..0....=PP`2.2%. |
| fefc3acc: 17 25 05 12 3c 1e 1e 00 30 32 64 80 14 1e 00 00 .%..<...02d..... |
| fefc3adc: 00 03 00 00 00 00 00 00 00 00 00 00 00 00 12 3f ...............? |
| fefc3bf4: 80 08 08 0e 0a 61 40 00 05 25 40 00 82 08 00 00 .....a@..%@..... |
| fefc3c04: 0c 04 30 01 02 00 03 3d 50 50 60 32 1e 32 25 80 ..0....=PP`2.2%. |
| fefc3c14: 17 25 05 12 3c 1e 1e 00 30 32 64 80 14 1e 00 00 .%..<...02d..... |
| fefc3c24: 00 03 00 00 00 00 00 00 00 00 00 00 00 00 12 3f ...............? |
| Total memory = 2048MB |
| GGC = 0x0190 |
| GBSM (igd) = verified 70000000 (written 70000000) |
| BGSM (gtt) = verified 6ff00000 (written 6ff00000) |
| TSEG (smm) = verified 6f700000 (written 6f700000) |
| RAM initialization finished. |
| Memory initialized |
| CBMEM: |
| IMD: root @ 6f3ff000 254 entries. |
| IMD: root @ 6f3fec00 62 entries. |
| MTRR Range: Start=ff000000 End=0 (Size 1000000) |
| MTRR Range: Start=0 End=1000000 (Size 1000000) |
| MTRR Range: Start=6f000000 End=6f400000 (Size 400000) |
| MTRR Range: Start=6ec00000 End=6f000000 (Size 400000) |
| CBFS: 'Master Header Locator' located CBFS at [200:ffffc0) |
| CBFS: Locating 'fallback/postcar' |
| CBFS: Found @ offset 23480 size 4010 |
| Decompressing stage fallback/postcar @ 0x6f3cefc0 (33008 bytes) |
| Loading module at 6f3cf000 with entry 6f3cf000. filesize: 0x3e10 memsize: 0x80b0 |
| Processing 105 relocs. Offset value of 0x6d3cf000 |
| |
| |
| coreboot-4.8-706-gafc74cab6e Wed Jul 4 08:57:40 UTC 2018 postcar starting... |
| CBFS: 'Master Header Locator' located CBFS at [200:ffffc0) |
| CBFS: Locating 'fallback/ramstage' |
| CBFS: Found @ offset b080 size 10957 |
| Decompressing stage fallback/ramstage @ 0x6f38afc0 (235480 bytes) |
| Loading module at 6f38b000 with entry 6f38b000. filesize: 0x2afa8 memsize: 0x39798 |
| Processing 2226 relocs. Offset value of 0x6f28b000 |
| |
| |
| coreboot-4.8-706-gafc74cab6e Wed Jul 4 08:57:40 UTC 2018 ramstage starting... |
| Normal boot. |
| BS: BS_PRE_DEVICE times (us): entry 0 run 1 exit 0 |
| BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 2 exit 0 |
| Enumerating buses... |
| Show all devs... Before device enumeration. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| DOMAIN: 0000: enabled 1 |
| APIC: 00: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:02.1: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 1 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1d.1: enabled 1 |
| PCI: 00:1d.2: enabled 1 |
| PCI: 00:1d.3: enabled 1 |
| PCI: 00:1d.7: enabled 1 |
| PCI: 00:1e.0: enabled 1 |
| PCI: 00:1f.0: enabled 1 |
| PCI: 00:1f.1: enabled 0 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| PCI: 00:1f.4: enabled 0 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| PCI: 00:00.0: enabled 1 |
| PNP: 004e.0: enabled 0 |
| PNP: 004e.1: enabled 1 |
| PNP: 004e.2: enabled 1 |
| PNP: 004e.3: enabled 1 |
| PNP: 004e.5: enabled 1 |
| PNP: 004e.6: enabled 0 |
| PNP: 004e.7: enabled 0 |
| PNP: 004e.8: enabled 0 |
| PNP: 004e.9: enabled 0 |
| PNP: 004e.a: enabled 0 |
| PNP: 004e.b: enabled 1 |
| I2C: 00:69: enabled 1 |
| Compare with tree... |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:02.1: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 1 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1d.1: enabled 1 |
| PCI: 00:1d.2: enabled 1 |
| PCI: 00:1d.3: enabled 1 |
| PCI: 00:1d.7: enabled 1 |
| PCI: 00:1e.0: enabled 1 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 004e.0: enabled 0 |
| PNP: 004e.1: enabled 1 |
| PNP: 004e.2: enabled 1 |
| PNP: 004e.3: enabled 1 |
| PNP: 004e.5: enabled 1 |
| PNP: 004e.6: enabled 0 |
| PNP: 004e.7: enabled 0 |
| PNP: 004e.8: enabled 0 |
| PNP: 004e.9: enabled 0 |
| PNP: 004e.a: enabled 0 |
| PNP: 004e.b: enabled 1 |
| PCI: 00:1f.1: enabled 0 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| I2C: 00:69: enabled 1 |
| PCI: 00:1f.4: enabled 0 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| Root Device scanning... |
| root_dev_scan_bus for Root Device |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| DOMAIN: 0000 scanning... |
| PCI: pci_scan_bus for bus 00 |
| PCI: 00:00.0 [8086/a000] enabled |
| PCI: 00:02.0 [8086/0000] ops |
| PCI: 00:02.0 [8086/a001] enabled |
| PCI: 00:02.1 [8086/a002] enabled |
| PCI: 00:1b.0 [8086/27d8] ops |
| PCI: 00:1b.0 [8086/27d8] enabled |
| PCI: 00:1c.0 [8086/0000] bus ops |
| PCI: 00:1c.0 [8086/27d0] enabled |
| PCI: 00:1c.1 [8086/0000] bus ops |
| PCI: 00:1c.1 [8086/27d2] enabled |
| PCI: 00:1c.2 [8086/0000] bus ops |
| PCI: 00:1c.2 [8086/27d4] enabled |
| PCI: 00:1c.3 [8086/0000] bus ops |
| PCI: 00:1c.3 [8086/27d6] enabled |
| PCI: 00:1d.0 [8086/27c8] ops |
| PCI: 00:1d.0 [8086/27c8] enabled |
| PCI: 00:1d.1 [8086/27c9] ops |
| PCI: 00:1d.1 [8086/27c9] enabled |
| PCI: 00:1d.2 [8086/27ca] ops |
| PCI: 00:1d.2 [8086/27ca] enabled |
| PCI: 00:1d.3 [8086/27cb] ops |
| PCI: 00:1d.3 [8086/27cb] enabled |
| PCI: 00:1d.7 [8086/27cc] ops |
| PCI: 00:1d.7 [8086/27cc] enabled |
| PCI: 00:1e.0 [8086/2448] bus ops |
| PCI: 00:1e.0 [8086/2448] enabled |
| PCI: 00:1f.0 [8086/0000] bus ops |
| PCI: 00:1f.0 [8086/27bc] enabled |
| Set SATA mode early |
| PCI: 00:1f.2 [8086/0000] ops |
| Set SATA mode early |
| PCI: 00:1f.2 [8086/27c1] enabled |
| PCI: 00:1f.3 [8086/27da] bus ops |
| PCI: 00:1f.3 [8086/27da] enabled |
| PCI: 00:1c.0 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.0 |
| PCI: pci_scan_bus for bus 01 |
| PCI: 01:00.0 [10ec/8168] enabled |
| scan_bus: scanning of bus PCI: 00:1c.0 took 11124 usecs |
| PCI: 00:1c.1 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.1 |
| PCI: pci_scan_bus for bus 02 |
| scan_bus: scanning of bus PCI: 00:1c.1 took 8148 usecs |
| PCI: 00:1c.2 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.2 |
| PCI: pci_scan_bus for bus 03 |
| scan_bus: scanning of bus PCI: 00:1c.2 took 8147 usecs |
| PCI: 00:1c.3 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.3 |
| PCI: pci_scan_bus for bus 04 |
| scan_bus: scanning of bus PCI: 00:1c.3 took 8148 usecs |
| PCI: 00:1e.0 scanning... |
| do_pci_scan_bridge for PCI: 00:1e.0 |
| PCI: pci_scan_bus for bus 05 |
| scan_bus: scanning of bus PCI: 00:1e.0 took 8157 usecs |
| PCI: 00:1f.0 scanning... |
| scan_lpc_bus for PCI: 00:1f.0 |
| PNP: 004e.0 disabled |
| PNP: 004e.1 enabled |
| PNP: 004e.2 enabled |
| PNP: 004e.3 enabled |
| PNP: 004e.5 enabled |
| PNP: 004e.6 disabled |
| PNP: 004e.7 disabled |
| PNP: 004e.8 disabled |
| PNP: 004e.9 disabled |
| PNP: 004e.a disabled |
| PNP: 004e.b enabled |
| scan_lpc_bus for PCI: 00:1f.0 done |
| scan_bus: scanning of bus PCI: 00:1f.0 took 28938 usecs |
| PCI: 00:1f.3 scanning... |
| scan_generic_bus for PCI: 00:1f.3 |
| bus: PCI: 00:1f.3[0]->I2C: 01:69 enabled |
| scan_generic_bus for PCI: 00:1f.3 done |
| scan_bus: scanning of bus PCI: 00:1f.3 took 12498 usecs |
| scan_bus: scanning of bus DOMAIN: 0000 took 220337 usecs |
| root_dev_scan_bus for Root Device done |
| scan_bus: scanning of bus Root Device took 238137 usecs |
| done |
| BS: BS_DEV_ENUMERATE times (us): entry 0 run 426791 exit 0 |
| found VGA at PCI: 00:02.0 |
| Setting up VGA for PCI: 00:02.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| Allocating resources... |
| Reading resources... |
| Root Device read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 done |
| TOUUD 0x80000000 TOLUD 0x80000000 TOM 0x100000000 256M UMA and 1M GTT |
| Adding PCIe config bar base=0xe0000000 size=0x10000000 |
| DOMAIN: 0000 read_resources bus 0 link: 0 |
| PCI: 00:1c.0 read_resources bus 1 link: 0 |
| PCI: 00:1c.0 read_resources bus 1 link: 0 done |
| PCI: 00:1c.1 read_resources bus 2 link: 0 |
| PCI: 00:1c.1 read_resources bus 2 link: 0 done |
| PCI: 00:1c.2 read_resources bus 3 link: 0 |
| PCI: 00:1c.2 read_resources bus 3 link: 0 done |
| PCI: 00:1c.3 read_resources bus 4 link: 0 |
| PCI: 00:1c.3 read_resources bus 4 link: 0 done |
| PCI: 00:1e.0 read_resources bus 5 link: 0 |
| PCI: 00:1e.0 read_resources bus 5 link: 0 done |
| PCI: 00:1f.0 read_resources bus 0 link: 0 |
| PCI: 00:1f.0 read_resources bus 0 link: 0 done |
| PCI: 00:1f.3 read_resources bus 1 link: 0 |
| PCI: 00:1f.3 read_resources bus 1 link: 0 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 done |
| Root Device read_resources bus 0 link: 0 done |
| Done reading resources. |
| Show resources in subtree (Root Device)...After reading. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 |
| DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 |
| DOMAIN: 0000 resource base c0000 size 6f640000 align 0 gran 0 limit 0 flags e0004200 index 4 |
| DOMAIN: 0000 resource base 6f700000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 5 |
| DOMAIN: 0000 resource base 6ff00000 size 100000 align 0 gran 0 limit 0 flags f0004200 index 6 |
| DOMAIN: 0000 resource base 70000000 size 10000000 align 0 gran 0 limit 0 flags f0004200 index 7 |
| DOMAIN: 0000 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 8 |
| DOMAIN: 0000 resource base fed00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 9 |
| DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index a |
| DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index b |
| PCI: 00:00.0 |
| PCI: 00:01.0 |
| PCI: 00:02.0 |
| PCI: 00:02.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 10 |
| PCI: 00:02.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 14 |
| PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 18 |
| PCI: 00:02.0 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 1c |
| PCI: 00:02.1 |
| PCI: 00:02.1 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 10 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:1c.0 child on link 0 PCI: 01:00.0 |
| PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 01:00.0 |
| PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10 |
| PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 1201 index 18 |
| PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20 |
| PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 index 30 |
| PCI: 00:1c.1 |
| PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 00:1c.2 |
| PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 00:1c.3 |
| PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 00:1d.0 |
| PCI: 00:1d.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 |
| PCI: 00:1d.1 |
| PCI: 00:1d.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 |
| PCI: 00:1d.2 |
| PCI: 00:1d.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 |
| PCI: 00:1d.3 |
| PCI: 00:1d.3 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 |
| PCI: 00:1d.7 |
| PCI: 00:1d.7 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| PCI: 00:1e.0 |
| PCI: 00:1e.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 00:1f.0 child on link 0 PNP: 004e.0 |
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PNP: 004e.0 |
| PNP: 004e.0 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60 |
| PNP: 004e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 004e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 |
| PNP: 004e.1 |
| PNP: 004e.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 |
| PNP: 004e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 004e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000800 index 74 |
| PNP: 004e.2 |
| PNP: 004e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 |
| PNP: 004e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 004e.3 |
| PNP: 004e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 |
| PNP: 004e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 004e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index f1 |
| PNP: 004e.5 |
| PNP: 004e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60 |
| PNP: 004e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62 |
| PNP: 004e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 004e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72 |
| PNP: 004e.5 resource base 80 size 1 align 0 gran 0 limit 0 flags c0000400 index f0 |
| PNP: 004e.6 |
| PNP: 004e.7 |
| PNP: 004e.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60 |
| PNP: 004e.7 resource base 0 size 2 align 1 gran 1 limit 7ff flags 100 index 62 |
| PNP: 004e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 004e.8 |
| PNP: 004e.9 |
| PNP: 004e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 30 |
| PNP: 004e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0 |
| PNP: 004e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f1 |
| PNP: 004e.a |
| PNP: 004e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 004e.b |
| PNP: 004e.b resource base 290 size 8 align 3 gran 3 limit fff flags c0000100 index 60 |
| PNP: 004e.b resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PCI: 00:1f.1 |
| PCI: 00:1f.2 |
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 |
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 |
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 |
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c |
| PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 |
| PCI: 00:1f.2 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 24 |
| PCI: 00:1f.3 child on link 0 I2C: 01:69 |
| PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 |
| I2C: 01:69 |
| PCI: 00:1f.4 |
| PCI: 00:1f.5 |
| PCI: 00:1f.6 |
| DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff |
| PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 01:00.0 10 * [0x0 - 0xff] io |
| PCI: 00:1c.0 io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1e.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1e.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.0 1c * [0x0 - 0xfff] io |
| PCI: 00:1d.0 20 * [0x1000 - 0x101f] io |
| PCI: 00:1d.1 20 * [0x1020 - 0x103f] io |
| PCI: 00:1d.2 20 * [0x1040 - 0x105f] io |
| PCI: 00:1d.3 20 * [0x1060 - 0x107f] io |
| PCI: 00:1f.2 20 * [0x1080 - 0x109f] io |
| PCI: 00:02.0 14 * [0x10a0 - 0x10a7] io |
| PCI: 00:1f.2 10 * [0x10a8 - 0x10af] io |
| PCI: 00:1f.2 18 * [0x10b0 - 0x10b7] io |
| PCI: 00:1f.2 14 * [0x10b8 - 0x10bb] io |
| PCI: 00:1f.2 1c * [0x10bc - 0x10bf] io |
| DOMAIN: 0000 io: base: 10c0 size: 10c0 align: 12 gran: 0 limit: ffff done |
| DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff |
| PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 01:00.0 20 * [0x0 - 0x3fff] prefmem |
| PCI: 01:00.0 18 * [0x4000 - 0x4fff] prefmem |
| PCI: 00:1c.0 prefmem: base: 5000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 01:00.0 30 * [0x0 - 0x1ffff] mem |
| PCI: 00:1c.0 mem: base: 20000 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.2 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 00:1c.2 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.3 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 00:1c.3 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1e.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 00:1e.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem |
| PCI: 00:02.0 1c * [0x10000000 - 0x100fffff] mem |
| PCI: 00:1c.0 24 * [0x10100000 - 0x101fffff] prefmem |
| PCI: 00:1c.0 20 * [0x10200000 - 0x102fffff] mem |
| PCI: 00:02.0 10 * [0x10300000 - 0x1037ffff] mem |
| PCI: 00:02.1 10 * [0x10380000 - 0x103fffff] mem |
| PCI: 00:1b.0 10 * [0x10400000 - 0x10403fff] mem |
| PCI: 00:1d.7 10 * [0x10404000 - 0x104043ff] mem |
| PCI: 00:1f.2 24 * [0x10405000 - 0x104053ff] mem |
| DOMAIN: 0000 mem: base: 10405400 size: 10405400 align: 28 gran: 0 limit: ffffffff done |
| avoid_fixed_resources: DOMAIN: 0000 |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff |
| constrain_resources: DOMAIN: 0000 03 base 00000000 limit 0009ffff mem (fixed) |
| constrain_resources: DOMAIN: 0000 04 base 000c0000 limit 6f6fffff mem (fixed) |
| constrain_resources: DOMAIN: 0000 05 base 6f700000 limit 6fefffff mem (fixed) |
| constrain_resources: DOMAIN: 0000 06 base 6ff00000 limit 6fffffff mem (fixed) |
| constrain_resources: DOMAIN: 0000 07 base 70000000 limit 7fffffff mem (fixed) |
| constrain_resources: DOMAIN: 0000 08 base e0000000 limit efffffff mem (fixed) |
| constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed) |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff |
| Setting resources... |
| DOMAIN: 0000 io: base:1000 size:10c0 align:12 gran:0 limit:ffff |
| PCI: 00:1c.0 1c * [0x1000 - 0x1fff] io |
| PCI: 00:1d.0 20 * [0x2000 - 0x201f] io |
| PCI: 00:1d.1 20 * [0x2020 - 0x203f] io |
| PCI: 00:1d.2 20 * [0x2040 - 0x205f] io |
| PCI: 00:1d.3 20 * [0x2060 - 0x207f] io |
| PCI: 00:1f.2 20 * [0x2080 - 0x209f] io |
| PCI: 00:02.0 14 * [0x20a0 - 0x20a7] io |
| PCI: 00:1f.2 10 * [0x20a8 - 0x20af] io |
| PCI: 00:1f.2 18 * [0x20b0 - 0x20b7] io |
| PCI: 00:1f.2 14 * [0x20b8 - 0x20bb] io |
| PCI: 00:1f.2 1c * [0x20bc - 0x20bf] io |
| DOMAIN: 0000 io: next_base: 20c0 size: 10c0 align: 12 gran: 0 done |
| PCI: 00:1c.0 io: base:1000 size:1000 align:12 gran:12 limit:1fff |
| PCI: 01:00.0 10 * [0x1000 - 0x10ff] io |
| PCI: 00:1c.0 io: next_base: 1100 size: 1000 align: 12 gran: 12 done |
| PCI: 00:1c.1 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:1c.1 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| PCI: 00:1c.2 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:1c.2 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| PCI: 00:1c.3 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:1c.3 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| PCI: 00:1e.0 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:1e.0 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| DOMAIN: 0000 mem: base:c0000000 size:10405400 align:28 gran:0 limit:dfffffff |
| PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem |
| PCI: 00:02.0 1c * [0xd0000000 - 0xd00fffff] mem |
| PCI: 00:1c.0 24 * [0xd0100000 - 0xd01fffff] prefmem |
| PCI: 00:1c.0 20 * [0xd0200000 - 0xd02fffff] mem |
| PCI: 00:02.0 10 * [0xd0300000 - 0xd037ffff] mem |
| PCI: 00:02.1 10 * [0xd0380000 - 0xd03fffff] mem |
| PCI: 00:1b.0 10 * [0xd0400000 - 0xd0403fff] mem |
| PCI: 00:1d.7 10 * [0xd0404000 - 0xd04043ff] mem |
| PCI: 00:1f.2 24 * [0xd0405000 - 0xd04053ff] mem |
| DOMAIN: 0000 mem: next_base: d0405400 size: 10405400 align: 28 gran: 0 done |
| PCI: 00:1c.0 prefmem: base:d0100000 size:100000 align:20 gran:20 limit:d01fffff |
| PCI: 01:00.0 20 * [0xd0100000 - 0xd0103fff] prefmem |
| PCI: 01:00.0 18 * [0xd0104000 - 0xd0104fff] prefmem |
| PCI: 00:1c.0 prefmem: next_base: d0105000 size: 100000 align: 20 gran: 20 done |
| PCI: 00:1c.0 mem: base:d0200000 size:100000 align:20 gran:20 limit:d02fffff |
| PCI: 01:00.0 30 * [0xd0200000 - 0xd021ffff] mem |
| PCI: 00:1c.0 mem: next_base: d0220000 size: 100000 align: 20 gran: 20 done |
| PCI: 00:1c.1 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff |
| PCI: 00:1c.1 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.1 mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff |
| PCI: 00:1c.1 mem: next_base: dfffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.2 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff |
| PCI: 00:1c.2 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.2 mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff |
| PCI: 00:1c.2 mem: next_base: dfffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.3 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff |
| PCI: 00:1c.3 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.3 mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff |
| PCI: 00:1c.3 mem: next_base: dfffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1e.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff |
| PCI: 00:1e.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1e.0 mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff |
| PCI: 00:1e.0 mem: next_base: dfffffff size: 0 align: 20 gran: 20 done |
| Root Device assign_resources, bus 0 link: 0 |
| DOMAIN: 0000 03 <- [0x0000000000 - 0x000009ffff] size 0x000a0000 gran 0x00 mem |
| DOMAIN: 0000 04 <- [0x00000c0000 - 0x006f6fffff] size 0x6f640000 gran 0x00 mem |
| DOMAIN: 0000 05 <- [0x006f700000 - 0x006fefffff] size 0x00800000 gran 0x00 mem |
| DOMAIN: 0000 06 <- [0x006ff00000 - 0x006fffffff] size 0x00100000 gran 0x00 mem |
| DOMAIN: 0000 07 <- [0x0070000000 - 0x007fffffff] size 0x10000000 gran 0x00 mem |
| DOMAIN: 0000 08 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x00 mem |
| DOMAIN: 0000 09 <- [0x00fed00000 - 0x00fedfffff] size 0x00100000 gran 0x00 mem |
| DOMAIN: 0000 0a <- [0x00000a0000 - 0x00000bffff] size 0x00020000 gran 0x00 mem |
| DOMAIN: 0000 0b <- [0x00000c0000 - 0x00000fffff] size 0x00040000 gran 0x00 mem |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| PCI: 00:02.0 10 <- [0x00d0300000 - 0x00d037ffff] size 0x00080000 gran 0x13 mem |
| PCI: 00:02.0 14 <- [0x00000020a0 - 0x00000020a7] size 0x00000008 gran 0x03 io |
| PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem |
| PCI: 00:02.0 1c <- [0x00d0000000 - 0x00d00fffff] size 0x00100000 gran 0x14 mem |
| PCI: 00:02.1 10 <- [0x00d0380000 - 0x00d03fffff] size 0x00080000 gran 0x13 mem |
| PCI: 00:1b.0 10 <- [0x00d0400000 - 0x00d0403fff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:1c.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io |
| PCI: 00:1c.0 24 <- [0x00d0100000 - 0x00d01fffff] size 0x00100000 gran 0x14 bus 01 prefmem |
| PCI: 00:1c.0 20 <- [0x00d0200000 - 0x00d02fffff] size 0x00100000 gran 0x14 bus 01 mem |
| PCI: 00:1c.0 assign_resources, bus 1 link: 0 |
| PCI: 01:00.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io |
| PCI: 01:00.0 18 <- [0x00d0104000 - 0x00d0104fff] size 0x00001000 gran 0x0c prefmem64 |
| PCI: 01:00.0 20 <- [0x00d0100000 - 0x00d0103fff] size 0x00004000 gran 0x0e prefmem64 |
| PCI: 01:00.0 30 <- [0x00d0200000 - 0x00d021ffff] size 0x00020000 gran 0x11 romem |
| PCI: 00:1c.0 assign_resources, bus 1 link: 0 |
| PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io |
| PCI: 00:1c.1 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem |
| PCI: 00:1c.1 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 mem |
| PCI: 00:1c.2 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io |
| PCI: 00:1c.2 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 03 prefmem |
| PCI: 00:1c.2 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 03 mem |
| PCI: 00:1c.3 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io |
| PCI: 00:1c.3 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 04 prefmem |
| PCI: 00:1c.3 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 04 mem |
| PCI: 00:1d.0 20 <- [0x0000002000 - 0x000000201f] size 0x00000020 gran 0x05 io |
| PCI: 00:1d.1 20 <- [0x0000002020 - 0x000000203f] size 0x00000020 gran 0x05 io |
| PCI: 00:1d.2 20 <- [0x0000002040 - 0x000000205f] size 0x00000020 gran 0x05 io |
| PCI: 00:1d.3 20 <- [0x0000002060 - 0x000000207f] size 0x00000020 gran 0x05 io |
| PCI: 00:1d.7 10 <- [0x00d0404000 - 0x00d04043ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1e.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 05 io |
| PCI: 00:1e.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 05 prefmem |
| PCI: 00:1e.0 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 05 mem |
| PCI: 00:1f.0 assign_resources, bus 0 link: 0 |
| PNP: 004e.1 60 <- [0x0000000378 - 0x000000037f] size 0x00000008 gran 0x03 io |
| PNP: 004e.1 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq |
| PNP: 004e.1 74 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 drq |
| PNP: 004e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io |
| PNP: 004e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq |
| PNP: 004e.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io |
| PNP: 004e.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq |
| PNP: 004e.3 f1 <- [0x0000000000 - 0x0000000000] size 0x00000001 gran 0x00 irq |
| PNP: 004e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io |
| PNP: 004e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io |
| PNP: 004e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq |
| PNP: 004e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq |
| PNP: 004e.5 f0 <- [0x0000000080 - 0x0000000080] size 0x00000001 gran 0x00 irq |
| PNP: 004e.b 60 <- [0x0000000290 - 0x0000000297] size 0x00000008 gran 0x03 io |
| PNP: 004e.b 70 <- [0x0000000000 - 0x0000000000] size 0x00000001 gran 0x00 irq |
| PCI: 00:1f.0 assign_resources, bus 0 link: 0 |
| PCI: 00:1f.2 10 <- [0x00000020a8 - 0x00000020af] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 14 <- [0x00000020b8 - 0x00000020bb] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 18 <- [0x00000020b0 - 0x00000020b7] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 1c <- [0x00000020bc - 0x00000020bf] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 20 <- [0x0000002080 - 0x000000209f] size 0x00000020 gran 0x05 io |
| PCI: 00:1f.2 24 <- [0x00d0405000 - 0x00d04053ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1f.3 assign_resources, bus 1 link: 0 |
| PCI: 00:1f.3 assign_resources, bus 1 link: 0 |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| Root Device assign_resources, bus 0 link: 0 |
| Done setting resources. |
| Show resources in subtree (Root Device)...After assigning values. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 1000 size 10c0 align 12 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base c0000000 size 10405400 align 28 gran 0 limit dfffffff flags 40040200 index 10000100 |
| DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 |
| DOMAIN: 0000 resource base c0000 size 6f640000 align 0 gran 0 limit 0 flags e0004200 index 4 |
| DOMAIN: 0000 resource base 6f700000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 5 |
| DOMAIN: 0000 resource base 6ff00000 size 100000 align 0 gran 0 limit 0 flags f0004200 index 6 |
| DOMAIN: 0000 resource base 70000000 size 10000000 align 0 gran 0 limit 0 flags f0004200 index 7 |
| DOMAIN: 0000 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 8 |
| DOMAIN: 0000 resource base fed00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 9 |
| DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index a |
| DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index b |
| PCI: 00:00.0 |
| PCI: 00:01.0 |
| PCI: 00:02.0 |
| PCI: 00:02.0 resource base d0300000 size 80000 align 19 gran 19 limit d037ffff flags 60000200 index 10 |
| PCI: 00:02.0 resource base 20a0 size 8 align 3 gran 3 limit 20a7 flags 60000100 index 14 |
| PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001200 index 18 |
| PCI: 00:02.0 resource base d0000000 size 100000 align 20 gran 20 limit d00fffff flags 60000200 index 1c |
| PCI: 00:02.1 |
| PCI: 00:02.1 resource base d0380000 size 80000 align 19 gran 19 limit d03fffff flags 60000200 index 10 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base d0400000 size 4000 align 14 gran 14 limit d0403fff flags 60000201 index 10 |
| PCI: 00:1c.0 child on link 0 PCI: 01:00.0 |
| PCI: 00:1c.0 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c |
| PCI: 00:1c.0 resource base d0100000 size 100000 align 20 gran 20 limit d01fffff flags 60081202 index 24 |
| PCI: 00:1c.0 resource base d0200000 size 100000 align 20 gran 20 limit d02fffff flags 60080202 index 20 |
| PCI: 01:00.0 |
| PCI: 01:00.0 resource base 1000 size 100 align 8 gran 8 limit 10ff flags 60000100 index 10 |
| PCI: 01:00.0 resource base d0104000 size 1000 align 12 gran 12 limit d0104fff flags 60001201 index 18 |
| PCI: 01:00.0 resource base d0100000 size 4000 align 14 gran 14 limit d0103fff flags 60001201 index 20 |
| PCI: 01:00.0 resource base d0200000 size 20000 align 17 gran 17 limit d021ffff flags 60002200 index 30 |
| PCI: 00:1c.1 |
| PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:1c.1 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24 |
| PCI: 00:1c.1 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080202 index 20 |
| PCI: 00:1c.2 |
| PCI: 00:1c.2 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:1c.2 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24 |
| PCI: 00:1c.2 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080202 index 20 |
| PCI: 00:1c.3 |
| PCI: 00:1c.3 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:1c.3 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24 |
| PCI: 00:1c.3 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080202 index 20 |
| PCI: 00:1d.0 |
| PCI: 00:1d.0 resource base 2000 size 20 align 5 gran 5 limit 201f flags 60000100 index 20 |
| PCI: 00:1d.1 |
| PCI: 00:1d.1 resource base 2020 size 20 align 5 gran 5 limit 203f flags 60000100 index 20 |
| PCI: 00:1d.2 |
| PCI: 00:1d.2 resource base 2040 size 20 align 5 gran 5 limit 205f flags 60000100 index 20 |
| PCI: 00:1d.3 |
| PCI: 00:1d.3 resource base 2060 size 20 align 5 gran 5 limit 207f flags 60000100 index 20 |
| PCI: 00:1d.7 |
| PCI: 00:1d.7 resource base d0404000 size 400 align 12 gran 10 limit d04043ff flags 60000200 index 10 |
| PCI: 00:1e.0 |
| PCI: 00:1e.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:1e.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24 |
| PCI: 00:1e.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080202 index 20 |
| PCI: 00:1f.0 child on link 0 PNP: 004e.0 |
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PNP: 004e.0 |
| PNP: 004e.0 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60 |
| PNP: 004e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 004e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 |
| PNP: 004e.1 |
| PNP: 004e.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 |
| PNP: 004e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| PNP: 004e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000800 index 74 |
| PNP: 004e.2 |
| PNP: 004e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 |
| PNP: 004e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| PNP: 004e.3 |
| PNP: 004e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 |
| PNP: 004e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| PNP: 004e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags e0000400 index f1 |
| PNP: 004e.5 |
| PNP: 004e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60 |
| PNP: 004e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 62 |
| PNP: 004e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| PNP: 004e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72 |
| PNP: 004e.5 resource base 80 size 1 align 0 gran 0 limit 0 flags e0000400 index f0 |
| PNP: 004e.6 |
| PNP: 004e.7 |
| PNP: 004e.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60 |
| PNP: 004e.7 resource base 0 size 2 align 1 gran 1 limit 7ff flags 100 index 62 |
| PNP: 004e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 004e.8 |
| PNP: 004e.9 |
| PNP: 004e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 30 |
| PNP: 004e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0 |
| PNP: 004e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f1 |
| PNP: 004e.a |
| PNP: 004e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 004e.b |
| PNP: 004e.b resource base 290 size 8 align 3 gran 3 limit fff flags e0000100 index 60 |
| PNP: 004e.b resource base 0 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| PCI: 00:1f.1 |
| PCI: 00:1f.2 |
| PCI: 00:1f.2 resource base 20a8 size 8 align 3 gran 3 limit 20af flags 60000100 index 10 |
| PCI: 00:1f.2 resource base 20b8 size 4 align 2 gran 2 limit 20bb flags 60000100 index 14 |
| PCI: 00:1f.2 resource base 20b0 size 8 align 3 gran 3 limit 20b7 flags 60000100 index 18 |
| PCI: 00:1f.2 resource base 20bc size 4 align 2 gran 2 limit 20bf flags 60000100 index 1c |
| PCI: 00:1f.2 resource base 2080 size 20 align 5 gran 5 limit 209f flags 60000100 index 20 |
| PCI: 00:1f.2 resource base d0405000 size 400 align 12 gran 10 limit d04053ff flags 60000200 index 24 |
| PCI: 00:1f.3 child on link 0 I2C: 01:69 |
| PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 |
| I2C: 01:69 |
| PCI: 00:1f.4 |
| PCI: 00:1f.5 |
| PCI: 00:1f.6 |
| Done allocating resources. |
| BS: BS_DEV_RESOURCES times (us): entry 0 run 2676174 exit 0 |
| Enabling resources... |
| PCI: 00:00.0 subsystem <- 8086/a000 |
| PCI: 00:00.0 cmd <- 06 |
| PCI: 00:02.0 subsystem <- 8086/a001 |
| PCI: 00:02.0 cmd <- 03 |
| PCI: 00:02.1 subsystem <- 8086/a002 |
| PCI: 00:02.1 cmd <- 02 |
| PCI: 00:1b.0 subsystem <- 8086/27d8 |
| PCI: 00:1b.0 cmd <- 102 |
| PCI: 00:1c.0 bridge ctrl <- 0003 |
| PCI: 00:1c.0 subsystem <- 8086/27d0 |
| PCI: 00:1c.0 cmd <- 107 |
| PCI: 00:1c.1 bridge ctrl <- 0003 |
| PCI: 00:1c.1 subsystem <- 8086/27d2 |
| PCI: 00:1c.1 cmd <- 100 |
| PCI: 00:1c.2 bridge ctrl <- 0003 |
| PCI: 00:1c.2 subsystem <- 8086/27d4 |
| PCI: 00:1c.2 cmd <- 100 |
| PCI: 00:1c.3 bridge ctrl <- 0003 |
| PCI: 00:1c.3 subsystem <- 8086/27d6 |
| PCI: 00:1c.3 cmd <- 100 |
| PCI: 00:1d.0 subsystem <- 8086/27c8 |
| PCI: 00:1d.0 cmd <- 01 |
| PCI: 00:1d.1 subsystem <- 8086/27c9 |
| PCI: 00:1d.1 cmd <- 01 |
| PCI: 00:1d.2 subsystem <- 8086/27ca |
| PCI: 00:1d.2 cmd <- 01 |
| PCI: 00:1d.3 subsystem <- 8086/27cb |
| PCI: 00:1d.3 cmd <- 01 |
| PCI: 00:1d.7 subsystem <- 8086/27cc |
| PCI: 00:1d.7 cmd <- 102 |
| PCI: 00:1e.0 bridge ctrl <- 0003 |
| PCI: 00:1e.0 subsystem <- 0000/0000 |
| PCI: 00:1e.0 cmd <- 100 |
| PCI: 00:1f.0 subsystem <- 8086/27bc |
| PCI: 00:1f.0 cmd <- 107 |
| PCI: 00:1f.2 subsystem <- 8086/27c1 |
| PCI: 00:1f.2 cmd <- 03 |
| PCI: 00:1f.3 subsystem <- 8086/27da |
| PCI: 00:1f.3 cmd <- 101 |
| PCI: 01:00.0 subsystem <- 10ec/8168 |
| PCI: 01:00.0 cmd <- 103 |
| done. |
| BS: BS_DEV_ENABLE times (us): entry 0 run 114329 exit 0 |
| Initializing devices... |
| Root Device init ... |
| Root Device init finished in 1925 usecs |
| CPU_CLUSTER: 0 init ... |
| start_eip=0x00001000, code_size=0x00000031 |
| Initializing CPU #0 |
| CPU: vendor Intel device 106ca |
| CPU: family 06, model 1c, stepping 0a |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [200:ffffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: 'cpu_microcode_blob.bin' not found. |
| CPU: Intel(R) Atom(TM) CPU K510 @ 1.66GHz. |
| MTRR: Physical address space: |
| 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 |
| 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 |
| 0x00000000000c0000 - 0x0000000080000000 size 0x7ff40000 type 6 |
| 0x0000000080000000 - 0x00000000c0000000 size 0x40000000 type 0 |
| 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1 |
| 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| MTRR: default type WB/UC MTRR counts: 4/2. |
| MTRR: UC selected as default type. |
| MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6 |
| MTRR: 1 base 0x00000000c0000000 mask 0x0000000ff0000000 type 1 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x00 done. |
| CPU doesn't support VMX; exiting |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 23040 size 3f0 |
| CPU: 0 4 siblings |
| CPU: 0 has sibling 1 |
| CPU: 0 has sibling 2 |
| CPU: 0 has sibling 3 |
| CPU #0 initialized |
| CPU1: stack_base 6f3b8000, stack_end 6f3b8ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 1. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 1. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #1 |
| CPU: vendor Intel device 106ca |
| CPU: family 06, model 1c, stepping 0a |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [200:ffffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: 'cpu_microcode_blob.bin' not found. |
| CPU: Intel(R) Atom(TM) CPU K510 @ 1.66GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x01 done. |
| CPU doesn't support VMX; exiting |
| CPU: 1 4 siblings |
| CPU #1 initialized |
| CPU 1 going down... |
| CPU2: stack_base 6f3b7000, stack_end 6f3b7ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 2. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 2. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #2 |
| CPU: vendor Intel device 106ca |
| CPU: family 06, model 1c, stepping 0a |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [200:ffffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: 'cpu_microcode_blob.bin' not found. |
| CPU: Intel(R) Atom(TM) CPU K510 @ 1.66GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x02 done. |
| CPU doesn't support VMX; exiting |
| CPU: 2 4 siblings |
| CPU #2 initialized |
| CPU 2 going down... |
| CPU3: stack_base 6f3b6000, stack_end 6f3b6ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 3. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 3. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #3 |
| Waiting for 1 CPUS to stop |
| CPU: vendor Intel device 106ca |
| CPU: family 06, model 1c, stepping 0a |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [200:ffffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: 'cpu_microcode_blob.bin' not found. |
| CPU: Intel(R) Atom(TM) CPU K510 @ 1.66GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x03 done. |
| CPU doesn't support VMX; exiting |
| CPU: 3 4 siblings |
| CPU #3 initialized |
| CPU 3 going down... |
| All AP CPUs stopped (8650 loops) |
| CPU0: stack: 6f3b9000 - 6f3ba000, lowest used address 6f3b9b10, stack used: 1264 bytes |
| CPU1: stack: 6f3b8000 - 6f3b9000, lowest used address 6f3b8cb0, stack used: 848 bytes |
| CPU2: stack: 6f3b7000 - 6f3b8000, lowest used address 6f3b7cb0, stack used: 848 bytes |
| CPU3: stack: 6f3b6000 - 6f3b7000, lowest used address 6f3b6cb0, stack used: 848 bytes |
| Initializing SMM handler... ... pmbase = 0x0500 |
| |
| SMI_STS: PM1 |
| PM1_STS: WAK PWRBTN TMROF |
| GPE0_STS: GPIO15 GPIO14 GPIO13 GPIO12 GPIO11 GPIO10 GPIO9 GPIO8 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 |
| ALT_GP_SMI_STS: GPI15 GPI14 GPI13 GPI12 GPI11 GPI10 GPI9 GPI8 GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 |
| TCO_STS: INTRD_DET |
| ... raise SMI# |
| considering CPU 0x00 for SMM init |
| considering CPU 0x01 for SMM init |
| CPU1: stack_base 6f3b8000, stack_end 6f3b8ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 1. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 1. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #1 |
| CPU: vendor Intel device 106ca |
| CPU: family 06, model 1c, stepping 0a |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [200:ffffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: 'cpu_microcode_blob.bin' not found. |
| CPU: Intel(R) Atom(TM) CPU K510 @ 1.66GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x01 done. |
| CPU doesn't support VMX; exiting |
| CPU: 1 4 siblings |
| CPU #1 initialized |
| CPU 1 going down... |
| considering CPU 0x02 for SMM init |
| CPU2: stack_base 6f3b7000, stack_end 6f3b7ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 2. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 2. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #2 |
| CPU: vendor Intel device 106ca |
| CPU: family 06, model 1c, stepping 0a |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [200:ffffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: 'cpu_microcode_blob.bin' not found. |
| CPU: Intel(R) Atom(TM) CPU K510 @ 1.66GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x02 done. |
| CPU doesn't support VMX; exiting |
| CPU: 2 4 siblings |
| CPU #2 initialized |
| CPU 2 going down... |
| considering CPU 0x03 for SMM init |
| CPU3: stack_base 6f3b6000, stack_end 6f3b6ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 3. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 3. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #3 |
| CPU: vendor Intel device 106ca |
| CPU: family 06, model 1c, stepping 0a |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [200:ffffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: 'cpu_microcode_blob.bin' not found. |
| CPU: Intel(R) Atom(TM) CPU K510 @ 1.66GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x03 done. |
| CPU doesn't support VMX; exiting |
| CPU: 3 4 siblings |
| CPU #3 initialized |
| CPU 3 going down... |
| CPU_CLUSTER: 0 init finished in 1062353 usecs |
| DOMAIN: 0000 init ... |
| DOMAIN: 0000 init finished in 2012 usecs |
| PCI: 00:00.0 init ... |
| PCI: 00:00.0 init finished in 2014 usecs |
| PCI: 00:02.0 init ... |
| Initializing VGA. MMIO 0xd0300000 |
| gtt d0000000 mmio d0300000 addrport 20a0 physbase 70000000 |
| gttbase = 6ff00000 |
| GTT PGETBL_CTL register : 0x00000001 |
| GTT PGETBL2_CTL register: 0x00000000 |
| PCI: 00:02.0 init finished in 29280 usecs |
| PCI: 00:02.1 init ... |
| PCI: 00:02.1 init finished in 2012 usecs |
| PCI: 00:1b.0 init ... |
| Azalia: codec type: Azalia |
| Azalia: base = d0400000 |
| Azalia: codec_mask = 04 |
| Azalia: Initializing codec #2 |
| Azalia: codec viddid: 10ec0662 |
| Azalia: verb_size: 40 |
| PCI: 00:1b.0 init finished in 19476 usecs |
| PCI: 00:1c.0 init ... |
| Initializing ICH7 PCIe bridge. |
| PCI: 00:1c.0 init finished in 4817 usecs |
| PCI: 00:1c.1 init ... |
| Initializing ICH7 PCIe bridge. |
| PCI: 00:1c.1 init finished in 4817 usecs |
| PCI: 00:1c.2 init ... |
| Initializing ICH7 PCIe bridge. |
| PCI: 00:1c.2 init finished in 4808 usecs |
| PCI: 00:1c.3 init ... |
| Initializing ICH7 PCIe bridge. |
| PCI: 00:1c.3 init finished in 4817 usecs |
| PCI: 00:1d.0 init ... |
| UHCI: Setting up controller.. done. |
| PCI: 00:1d.0 init finished in 5257 usecs |
| PCI: 00:1d.1 init ... |
| UHCI: Setting up controller.. done. |
| PCI: 00:1d.1 init finished in 5257 usecs |
| PCI: 00:1d.2 init ... |
| UHCI: Setting up controller.. done. |
| PCI: 00:1d.2 init finished in 5258 usecs |
| PCI: 00:1d.3 init ... |
| UHCI: Setting up controller.. done. |
| PCI: 00:1d.3 init finished in 5257 usecs |
| PCI: 00:1d.7 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1d.7 init finished in 5257 usecs |
| PCI: 00:1e.0 init ... |
| PCI: 00:1e.0 init finished in 2018 usecs |
| PCI: 00:1f.0 init ... |
| i82801gx: lpc_init |
| IOAPIC: Initializing IOAPIC at 0xfec00000 |
| IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| IOAPIC: ID = 0x02 |
| IOAPIC: Dumping registers |
| reg 0x0000: 0x02000000 |
| reg 0x0001: 0x00170020 |
| reg 0x0002: 0x00170020 |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 23040 size 3f0 |
| Set power off after power failure. |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 23040 size 3f0 |
| NMI sources enabled. |
| rtc_failed = 0x0 |
| RTC Init |
| Disabling ACPI via APMC: |
| done. |
| Locking SMM. |
| PCI: 00:1f.0 init finished in 56959 usecs |
| PCI: 00:1f.2 init ... |
| i82801gx_sata: initializing... |
| SATA controller in AHCI mode. |
| PCI: 00:1f.2 init finished in 7514 usecs |
| PCI: 01:00.0 init ... |
| PCI: 01:00.0 init finished in 2013 usecs |
| PNP: 004e.1 init ... |
| PNP: 004e.1 init finished in 1922 usecs |
| PNP: 004e.2 init ... |
| PNP: 004e.2 init finished in 1926 usecs |
| PNP: 004e.3 init ... |
| PNP: 004e.3 init finished in 1925 usecs |
| PNP: 004e.5 init ... |
| PNP: 004e.5 init finished in 1925 usecs |
| PNP: 004e.b init ... |
| PNP: 004e.b init finished in 1925 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:69 init ... |
| Changing 13 of the 13 ck505 config bytes. |
| I2C: 01:69 init finished in 35395 usecs |
| Devices initialized |
| Show all devs... After init. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| DOMAIN: 0000: enabled 1 |
| APIC: 00: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:02.1: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 1 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1d.1: enabled 1 |
| PCI: 00:1d.2: enabled 1 |
| PCI: 00:1d.3: enabled 1 |
| PCI: 00:1d.7: enabled 1 |
| PCI: 00:1e.0: enabled 1 |
| PCI: 00:1f.0: enabled 1 |
| PCI: 00:1f.1: enabled 0 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| PCI: 00:1f.4: enabled 0 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| PCI: 01:00.0: enabled 1 |
| PNP: 004e.0: enabled 0 |
| PNP: 004e.1: enabled 1 |
| PNP: 004e.2: enabled 1 |
| PNP: 004e.3: enabled 1 |
| PNP: 004e.5: enabled 1 |
| PNP: 004e.6: enabled 0 |
| PNP: 004e.7: enabled 0 |
| PNP: 004e.8: enabled 0 |
| PNP: 004e.9: enabled 0 |
| PNP: 004e.a: enabled 0 |
| PNP: 004e.b: enabled 1 |
| I2C: 01:69: enabled 1 |
| APIC: 01: enabled 1 |
| APIC: 02: enabled 1 |
| APIC: 03: enabled 1 |
| BS: BS_DEV_INIT times (us): entry 5 run 1471660 exit 0 |
| Finalize devices... |
| PCI: 00:1f.0 final |
| Devices finalized |
| BS: BS_POST_DEVICE times (us): entry 0 run 5282 exit 0 |
| BS: BS_OS_RESUME_CHECK times (us): entry 0 run 2 exit 0 |
| CBFS: 'Master Header Locator' located CBFS at [200:ffffc0) |
| CBFS: Locating 'fallback/dsdt.aml' |
| CBFS: Found @ offset 27500 size 1c1c |
| CBFS: 'Master Header Locator' located CBFS at [200:ffffc0) |
| CBFS: Locating 'fallback/slic' |
| CBFS: 'fallback/slic' not found. |
| ACPI: Writing ACPI tables at 6f314000. |
| ACPI: * FACS |
| ACPI: * DSDT |
| ACPI: * FADT |
| ACPI: added table 1/32, length now 40 |
| ACPI: * SSDT |
| Found 1 CPU(s) with 4 core(s) each. |
| clocks between 1333 and 1666 MHz. |
| adding 2 P-States between busratio 8 and a, incl. P0 |
| PSS: 1666MHz power 35000 control 0xa12 status 0xa12 |
| PSS: 1333MHz power 25000 control 0x812 status 0x812 |
| clocks between 1333 and 1666 MHz. |
| adding 2 P-States between busratio 8 and a, incl. P0 |
| PSS: 1666MHz power 35000 control 0xa12 status 0xa12 |
| PSS: 1333MHz power 25000 control 0x812 status 0x812 |
| clocks between 1333 and 1666 MHz. |
| adding 2 P-States between busratio 8 and a, incl. P0 |
| PSS: 1666MHz power 35000 control 0xa12 status 0xa12 |
| PSS: 1333MHz power 25000 control 0x812 status 0x812 |
| clocks between 1333 and 1666 MHz. |
| adding 2 P-States between busratio 8 and a, incl. P0 |
| PSS: 1666MHz power 35000 control 0xa12 status 0xa12 |
| PSS: 1333MHz power 25000 control 0x812 status 0x812 |
| Generating ACPI PIRQ entries |
| ACPI_PIRQ_GEN: PCI: 00:02.0: pin=0 pirq=0 |
| ACPI_PIRQ_GEN: PCI: 00:1b.0: pin=0 pirq=6 |
| ACPI_PIRQ_GEN: PCI: 00:1c.0: pin=0 pirq=1 |
| ACPI_PIRQ_GEN: PCI: 00:1c.1: pin=1 pirq=0 |
| ACPI_PIRQ_GEN: PCI: 00:1c.2: pin=2 pirq=2 |
| ACPI_PIRQ_GEN: PCI: 00:1c.3: pin=3 pirq=3 |
| ACPI_PIRQ_GEN: PCI: 00:1d.0: pin=0 pirq=7 |
| ACPI_PIRQ_GEN: PCI: 00:1d.1: pin=1 pirq=3 |
| ACPI_PIRQ_GEN: PCI: 00:1d.2: pin=2 pirq=2 |
| ACPI_PIRQ_GEN: PCI: 00:1d.3: pin=3 pirq=0 |
| ACPI_PIRQ_GEN: PCI: 00:1f.2: pin=1 pirq=3 |
| ACPI: added table 2/32, length now 44 |
| ACPI: * MCFG |
| ACPI: added table 3/32, length now 48 |
| ACPI: * TCPA |
| TCPA log created at 6f304000 |
| ACPI: added table 4/32, length now 52 |
| ACPI: * MADT |
| ACPI: added table 5/32, length now 56 |
| current = 6f316720 |
| CBFS: 'Master Header Locator' located CBFS at [200:ffffc0) |
| CBFS: Locating 'vbt.bin' |
| CBFS: 'vbt.bin' not found. |
| CBFS: 'Master Header Locator' located CBFS at [200:ffffc0) |
| CBFS: Locating 'pci8086,a001.rom' |
| CBFS: 'pci8086,a001.rom' not found. |
| PCI Option ROM loading disabled for PCI: 00:02.0 |
| GMA: locate_vbt_vbios: aa55 8086 0 0 3 |
| GMA: Found valid VBT in legacy area |
| ACPI: * HPET |
| ACPI: added table 6/32, length now 60 |
| ACPI: done. |
| ACPI tables: 18272 bytes. |
| smbios_write_tables: 6f303000 |
| SMBIOS tables: 346 bytes. |
| Writing table forward entry at 0x00000500 |
| Wrote coreboot table at: 00000500, 0x10 bytes, checksum 10ab |
| Writing coreboot table at 0x6f338000 |
| CBFS: 'Master Header Locator' located CBFS at [200:ffffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 23040 size 3f0 |
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1. 0000000000001000-000000000009ffff: RAM |
| 2. 00000000000a0000-00000000000fffff: RESERVED |
| 3. 0000000000100000-000000006f302fff: RAM |
| 4. 000000006f303000-000000006f38afff: CONFIGURATION TABLES |
| 5. 000000006f38b000-000000006f3c4fff: RAMSTAGE |
| 6. 000000006f3c5000-000000006f3fffff: CONFIGURATION TABLES |
| 7. 000000006f400000-000000006f6fffff: RAM |
| 8. 000000006f700000-000000007fffffff: RESERVED |
| 9. 00000000e0000000-00000000efffffff: RESERVED |
| 10. 00000000fed00000-00000000fedfffff: RESERVED |
| Manufacturer: ef |
| SF: Detected W25Q128 with sector size 0x1000, total 0x1000000 |
| CBFS: 'Master Header Locator' located CBFS at [200:ffffc0) |
| Wrote coreboot table at: 6f338000, 0x790 bytes, checksum 9c81 |
| coreboot table: 1960 bytes. |
| IMD ROOT 0. 6f3ff000 00001000 |
| IMD SMALL 1. 6f3fe000 00001000 |
| CONSOLE 2. 6f3de000 00020000 |
| TIME STAMP 3. 6f3dd000 00000910 |
| ROMSTG STCK 4. 6f3d8000 00005000 |
| AFTER CAR 5. 6f3ce000 0000a000 |
| 57a9e102 6. 6f3c5000 000080b0 |
| RAMSTAGE 7. 6f38a000 0003b000 |
| 57a9e100 8. 6f350000 00039798 |
| SMM BACKUP 9. 6f340000 00010000 |
| COREBOOT 10. 6f338000 00008000 |
| ACPI 11. 6f314000 00024000 |
| TCPA LOG 12. 6f304000 00010000 |
| SMBIOS 13. 6f303000 00000800 |
| IMD small region: |
| IMD ROOT 0. 6f3fec00 00000400 |
| ROMSTAGE 1. 6f3febe0 00000004 |
| 57a9e002 2. 6f3febc0 00000018 |
| 57a9e000 3. 6f3feba0 00000018 |
| ACPI GNVS 4. 6f3feaa0 00000100 |
| COREBOOTFWD 5. 6f3fea60 00000028 |
| BS: BS_WRITE_TABLES times (us): entry 0 run 382828 exit 0 |
| CBFS: 'Master Header Locator' located CBFS at [200:ffffc0) |
| CBFS: Locating 'fallback/payload' |
| CBFS: Found @ offset 29180 size 10c52 |
| Loading segment from ROM address 0xff0293b8 |
| code (compression=1) |
| New segment dstaddr 0xe0100 memsize 0x1ff00 srcaddr 0xff0293f0 filesize 0x10c1a |
| Loading segment from ROM address 0xff0293d4 |
| Entry Point 0x000fd23d |
| Payload being loaded at below 1MiB without region being marked as RAM usable. |
| Loading Segment: addr: 0x00000000000e0100 memsz: 0x000000000001ff00 filesz: 0x0000000000010c1a |
| lb: [0x000000006f38b000, 0x000000006f3c4798) |
| Post relocation: addr: 0x00000000000e0100 memsz: 0x000000000001ff00 filesz: 0x0000000000010c1a |
| using LZMA |
| [ 0x000e0100, 00100000, 0x00100000) <- ff0293f0 |
| dest 000e0100, end 00100000, bouncebuffer ffffffff |
| Loaded segments |
| BS: BS_PAYLOAD_LOAD times (us): entry 0 run 107935 exit 0 |
| ICH7 watchdog disabled |
| Jumping to boot code at 000fd23d(6f338000) |
| CPU0: stack: 6f3b9000 - 6f3ba000, lowest used address 6f3b9b10, stack used: 1264 bytes |
| SeaBIOS (version rel-1.11.0-41-g69ea6da) |
| BUILD: gcc: (coreboot toolchain v1.50 October 15th, 2017) 6.3.0 binutils: (GNU Binutils) 2.29.1 |
| Found coreboot cbmem console @ 6f3de000 |
| Found mainboard Intel D510MO |
| Relocating init from 0x000e1760 to 0x6f6b3240 (size 52480) |
| Found CBFS header at 0xff000238 |
| multiboot: eax=6f3b5ba0, ebx=6f3b5b54 |
| Found 18 PCI devices (max PCI bus is 05) |
| Copying SMBIOS entry point from 0x6f303000 to 0x000f6120 |
| Copying ACPI RSDP from 0x6f314000 to 0x000f60f0 |
| Using pmtimer, ioport 0x508 |
| WARNING - Timeout at wait_reg8:81! |
| Scan for VGA option rom |
| Running option rom at c000:0003 |
| pmm call arg1=0 |
| Turning on vga text mode console |
| SeaBIOS (version rel-1.11.0-41-g69ea6da) |
| EHCI init on dev 00:1d.7 (regs=0xd0404020) |
| UHCI init on dev 00:1d.0 (io=2000) |
| UHCI init on dev 00:1d.1 (io=2020) |
| UHCI init on dev 00:1d.2 (io=2040) |
| UHCI init on dev 00:1d.3 (io=2060) |
| AHCI controller at 00:1f.2, iobase 0xd0405000, irq 0 |
| Found 0 lpt ports |
| Found 2 serial ports |
| Searching bootorder for: /rom@img/memtest |
| Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0 |
| AHCI/0: Set transfer mode to UDMA-6 |
| AHCI/0: registering: "AHCI/0: WDC WD3200BEKT-22PVMT0 ATA-8 Hard-Disk (298 GiBytes)" |
| Got ps2 nak (status=51) |
| USB mouse initialized |
| USB keyboard initialized |
| Initialized USB HUB (1 ports used) |
| All threads complete. |
| Scan for option roms |
| |
| Press ESC for boot menu. |
| |
| Searching bootorder for: HALT |
| drive 0x000f6080: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=625142448 |
| Space available for UMB: c7000-ec800, f5940-f6080 |
| Returned 245760 bytes of ZoneHigh |
| e820 map has 9 items: |
| 0: 0000000000000000 - 000000000009fc00 = 1 RAM |
| 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED |
| 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED |
| 3: 0000000000100000 - 000000006f303000 = 1 RAM |
| 4: 000000006f303000 - 000000006f400000 = 2 RESERVED |
| 5: 000000006f400000 - 000000006f6fc000 = 1 RAM |
| 6: 000000006f6fc000 - 0000000080000000 = 2 RESERVED |
| 7: 00000000e0000000 - 00000000f0000000 = 2 RESERVED |
| 8: 00000000fed00000 - 00000000fee00000 = 2 RESERVED |
| enter handle_19: |
| NULL |
| Booting from Hard Disk... |
| Booting from 0000:7c00 |
| |