| # This image was built using coreboot 4.7-1000-gc0257dd |
| CONFIG_VENDOR_INTEL=y |
| CONFIG_CACHE_ROM_SIZE_OVERRIDE=0x1000000 |
| CONFIG_ENABLE_FSP_FAST_BOOT=y |
| CONFIG_PAYLOAD_CONFIGFILE="../../../../intel/.config_seabios" |
| CONFIG_HAVE_IFD_BIN=y |
| CONFIG_HAVE_ME_BIN=y |
| CONFIG_BOARD_INTEL_CAMELBACKMOUNTAIN_FSP=y |
| # CONFIG_INTEGRATED_UART is not set |
| CONFIG_COREBOOT_ROMSIZE_KB_16384=y |
| CONFIG_CPU_MICROCODE_HEADER_FILES="../intel/cpu/broadwell_de/microcode/M1050663_07000012.h ../intel/cpu/broadwell_de/microcode/M1050662_00000015.h ../intel/cpu/broadwell_de/microcode/M1050663_07000012.h ../intel/cpu/broadwell_de/microcode/M1050664_0F000011.h" |
| CONFIG_CONSOLE_CBMEM=y |
| CONFIG_LOCK_MANAGEMENT_ENGINE=y |
| CONFIG_HAVE_FSP_BIN=y |
| CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y |
| CONFIG_DEBUG_SMM_RELOCATION=y |