| *** Pre-CBMEM romstage console overflowed, log truncated! *** |
| ane 03 new seed: 0026 |
| Lane 04 new seed: 0030 |
| Lane 05 new seed: 0032 |
| Lane 06 new seed: 0035 |
| Lane 07 new seed: 0035 |
| Lane 00 nibble 0 raw readback: 0012 |
| Lane 00 nibble 0 adjusted value (pre nibble): 0012 |
| Lane 00 nibble 0 adjusted value (post nibble): 0012 |
| Lane 01 nibble 0 raw readback: 0019 |
| Lane 01 nibble 0 adjusted value (pre nibble): 0019 |
| Lane 01 nibble 0 adjusted value (post nibble): 0019 |
| Lane 02 nibble 0 raw readback: 001e |
| Lane 02 nibble 0 adjusted value (pre nibble): 001e |
| Lane 02 nibble 0 adjusted value (post nibble): 001e |
| Lane 03 nibble 0 raw readback: 0026 |
| Lane 03 nibble 0 adjusted value (pre nibble): 0026 |
| Lane 03 nibble 0 adjusted value (post nibble): 0026 |
| Lane 04 nibble 0 raw readback: 002b |
| Lane 04 nibble 0 adjusted value (pre nibble): 002b |
| Lane 04 nibble 0 adjusted value (post nibble): 002b |
| Lane 05 nibble 0 raw readback: 002f |
| Lane 05 nibble 0 adjusted value (pre nibble): 002f |
| Lane 05 nibble 0 adjusted value (post nibble): 002f |
| Lane 06 nibble 0 raw readback: 0035 |
| Lane 06 nibble 0 adjusted value (pre nibble): 0035 |
| Lane 06 nibble 0 adjusted value (post nibble): 0035 |
| Lane 07 nibble 0 raw readback: 0038 |
| Lane 07 nibble 0 adjusted value (pre nibble): 0038 |
| Lane 07 nibble 0 adjusted value (post nibble): 0038 |
| TrainRcvrEn: Status 2000 |
| TrainRcvrEn: ErrStatus 80 |
| TrainRcvrEn: ErrCode 0 |
| TrainRcvrEn: Done |
| |
| TrainDQSRdWrPos: Status 2000 |
| TrainDQSRdWrPos: TrainErrors 0 |
| TrainDQSRdWrPos: ErrStatus 80 |
| TrainDQSRdWrPos: ErrCode 0 |
| TrainDQSRdWrPos: Done |
| |
| mctAutoInitMCT_D: UMAMemTyping_D |
| mctAutoInitMCT_D: :OtherTiming |
| FMAP: area COREBOOT found @ 200 (1048064 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 39840 size 48c |
| No CMOS option 'interleave_nodes'. |
| InterleaveNodes_D: Status 2000 |
| InterleaveNodes_D: ErrStatus 80 |
| InterleaveNodes_D: ErrCode 0 |
| InterleaveNodes_D: Done |
| |
| InterleaveChannels_D: Node 0 |
| InterleaveChannels_D: Status 2000 |
| InterleaveChannels_D: ErrStatus 80 |
| InterleaveChannels_D: ErrCode 0 |
| InterleaveChannels_D: Node 1 |
| InterleaveChannels_D: Status 2000 |
| InterleaveChannels_D: ErrStatus 0 |
| InterleaveChannels_D: ErrCode 0 |
| InterleaveChannels_D: Node 2 |
| InterleaveChannels_D: Status 2000 |
| InterleaveChannels_D: ErrStatus 0 |
| InterleaveChannels_D: ErrCode 0 |
| InterleaveChannels_D: Node 3 |
| InterleaveChannels_D: Status 2000 |
| InterleaveChannels_D: ErrStatus 0 |
| InterleaveChannels_D: ErrCode 0 |
| InterleaveChannels_D: Node 4 |
| InterleaveChannels_D: Status 2000 |
| InterleaveChannels_D: ErrStatus 0 |
| InterleaveChannels_D: ErrCode 0 |
| InterleaveChannels_D: Node 5 |
| InterleaveChannels_D: Status 2000 |
| InterleaveChannels_D: ErrStatus 0 |
| InterleaveChannels_D: ErrCode 0 |
| InterleaveChannels_D: Node 6 |
| InterleaveChannels_D: Status 2000 |
| InterleaveChannels_D: ErrStatus 0 |
| InterleaveChannels_D: ErrCode 0 |
| InterleaveChannels_D: Node 7 |
| InterleaveChannels_D: Status 2000 |
| InterleaveChannels_D: ErrStatus 0 |
| InterleaveChannels_D: ErrCode 0 |
| InterleaveChannels_D: Done |
| |
| mctAutoInitMCT_D Done: Global Status: 0 |
| raminit_amdmct end: |
| Timestamp - after ram initialization: 7879649313 |
| CBMEM: |
| IMD: root @ 6ffff000 254 entries. |
| IMD: root @ 6fffec00 62 entries. |
| Timestamp - start of romstage: 2533602 |
| Timestamp - before ram initialization: 777131742 |
| Timestamp - after ram initialization: 7692160416 |
| amdmct_cbmem_store_info: Storing AMDMCT configuration in CBMEM |
| FMAP: area COREBOOT found @ 200 (1048064 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 39840 size 48c |
| No CMOS option 'ecc_scrub_rate'. |
| BSP overran lower stack boundary. Undefined behaviour may result! |
| Timestamp - end of romstage: 8033817908 |
| CBFS @ 200 size ffe00 |
| CBFS: 'Master Header Locator' located CBFS at [200:100000) |
| CBFS: Locating 'fallback/ramstage' |
| CBFS: Found @ offset 27a80 size 1173b |
| Timestamp - starting to load ramstage: 8100113448 |
| Timestamp - starting LZMA decompress (ignore for x86): 8114066646 |
| Timestamp - finished LZMA decompress (ignore for x86): 8277903603 |
| Timestamp - finished loading ramstage: 8296032513 |
| |
| |
| coreboot-4.9 Wed Dec 19 18:05:51 UTC 2018 ramstage starting... |
| Enumerating buses... |
| Mainboard enable. dev=0x00e232e0 |
| Init adt7461 end, status 0x02 fd |
| setup_bsp_ramtop, TOP MEM: msr.lo = 0x80000000, msr.hi = 0x00000000 |
| setup_bsp_ramtop, TOP MEM2: msr.lo = 0x00000000, msr.hi = 0x00000000 |
| setup_uma_memory: uma size 0x10000000, memory start 0x70000000 |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 39840 size 48c |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 39840 size 48c |
| rs780_enable: dev=00e24e80, VID_DID=0x96011022 |
| Bus-0, Dev-0, Fun-0. |
| PCI: pci_scan_bus limits devfn 0 - devfn ffffffff |
| PCI: pci_scan_bus upper limit too big. Using 0xff. |
| rs780_enable: dev=00e24e80, VID_DID=0x96011022 |
| Bus-0, Dev-0, Fun-0. |
| rs780_enable: dev=00e24de0, VID_DID=0x96021022 |
| Bus-0, Dev-1, Fun-0. |
| GC is accessible from now on. |
| rs780_enable: dev=00e24d00, VID_DID=0x96031022 |
| Bus-0, Dev-2,3, Fun-0. enable=1 |
| PCI: Static device PCI: 00:02.0 not found, disabling it. |
| rs780_enable: dev=00e24c60, VID_DID=0xffffffff |
| Bus-0, Dev-2,3, Fun-0. enable=0 |
| rs780_enable: dev=00e24bc0, VID_DID=0xffffffff |
| Bus-0, Dev-4,5,6,7, Fun-0. enable=0 |
| rs780_enable: dev=00e24b20, VID_DID=0xffffffff |
| Bus-0, Dev-4,5,6,7, Fun-0. enable=0 |
| rs780_enable: dev=00e24a80, VID_DID=0xffffffff |
| Bus-0, Dev-4,5,6,7, Fun-0. enable=0 |
| rs780_enable: dev=00e249e0, VID_DID=0xffffffff |
| Bus-0, Dev-4,5,6,7, Fun-0. enable=0 |
| rs780_enable: dev=00e24940, VID_DID=0x960a1022 |
| Bus-0, Dev-8, Fun-0. enable=0 |
| rs780_enable: dev=00e248a0, VID_DID=0x96081022 |
| Bus-0, Dev-9, 10, Fun-0. enable=0 |
| rs780_enable: dev=00e24800, VID_DID=0x96091022 |
| Bus-0, Dev-9, 10, Fun-0. enable=1 |
| rs780 unused GPP ports bitmap=0x2fc, force disabled |
| rs780_enable: dev=00e23ec0, VID_DID=0x97101002 |
| Bus-0, Dev-4,5,6,7, Fun-0. enable=1 |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| Failed to enable LTR for dev = PCI: 02:00.0 |
| done |
| Allocating resources... |
| Reading resources... |
| I2C: 01:50 missing read_resources |
| I2C: 01:51 missing read_resources |
| I2C: 01:52 missing read_resources |
| I2C: 01:53 missing read_resources |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 39840 size 48c |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 39840 size 48c |
| Done reading resources. |
| Setting resources... |
| Done setting resources. |
| Done allocating resources. |
| Enabling resources... |
| done. |
| Initializing devices... |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 39840 size 48c |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 39840 size 48c |
| Initializing CPU #0 |
| Enabling cache |
| Setting up local APIC...done. |
| CPU #0 initialized |
| Waiting for 1 CPUS to stop |
| Setting up local APIC...done. |
| CPU #1 initialized |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 39840 size 48c |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 39840 size 48c |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 39840 size 48c |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 39840 size 48c |
| usb2_bar0=0xb840a000 |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 39840 size 48c |
| usb2_bar0=0xb840b000 |
| sm_init(). |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 39840 size 48c |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 39840 size 48c |
| set power "off" after power fail |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 39840 size 48c |
| ++++++++++set NMI+++++ |
| sm_init() end |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 39840 size 48c |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 39840 size 48c |
| SIL3114 set to IDE compatible mode |
| Devices initialized |
| Finalize devices... |
| Devices finalized |
| Copying Interrupt Routing Table to 0x000f0000... done. |
| Copying Interrupt Routing Table to 0x6ffcf000... done. |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 39840 size 48c |
| CBFS: 'Master Header Locator' located CBFS at [200:100000) |
| CBFS: Locating 'fallback/dsdt.aml' |
| CBFS: Found @ offset 39d40 size 2892 |
| CBFS: 'Master Header Locator' located CBFS at [200:100000) |
| CBFS: Locating 'fallback/slic' |
| CBFS: 'fallback/slic' not found. |
| ACPI: Writing ACPI tables at 6ffaa000. |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 39840 size 48c |
| processor_brand=AMD Athlon(tm) II X2 250 Processor |
| Pstates algorithm ... |
| Pstate_freq[0] = 3000MHz Pstate_power[0] = 30937mw |
| Pstate_latency[0] = 5us |
| Pstate_freq[1] = 2300MHz Pstate_power[1] = 26010mw |
| Pstate_latency[1] = 5us |
| Pstate_freq[2] = 1800MHz Pstate_power[2] = 22207mw |
| Pstate_latency[2] = 5us |
| ACPI: done. |
| DOMAIN: 0000 (AMD Family 10h/15h Root Complex) |
| CBFS: 'Master Header Locator' located CBFS at [200:100000) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 39840 size 48c |
| CBFS: 'Master Header Locator' located CBFS at [200:100000) |
| CBFS: 'Master Header Locator' located CBFS at [200:100000) |
| CBFS: Locating 'fallback/payload' |
| CBFS: Found @ offset 3c640 size 10a0e |
| SeaBIOS (version rel-1.12.0-4-g29ba89e) |
| BUILD: gcc: (coreboot toolchain v1.53 August 16th, 2018) 8.1.0 binutils: (GNU Binutils) 2.30 |
| Found coreboot cbmem console @ 6ffe3000 |
| Found mainboard ASUS M4A785T-M |
| Relocating init from 0x000e1d40 to 0x6ff5c560 (size 51712) |
| Found CBFS header at 0xfff00238 |
| multiboot: eax=e25860, ebx=e25814 |
| Found 25 PCI devices (max PCI bus is 03) |
| Copying SMBIOS entry point from 0x6ffa9000 to 0x000f6280 |
| Copying ACPI RSDP from 0x6ffaa000 to 0x000f6250 |
| Copying MPTABLE from 0x6ffce000/6ffce010 to 0x000f6130 |
| Copying PIR from 0x6ffcf000 to 0x000f5fe0 |
| Using pmtimer, ioport 0x820 |
| Scan for VGA option rom |
| Turning on vga text mode console |
| SeaBIOS (version rel-1.12.0-4-g29ba89e) |
| EHCI init on dev 00:12.2 (regs=0xb840a020) |
| EHCI init on dev 00:13.2 (regs=0xb840b020) |
| OHCI init on dev 00:12.0 (regs=0xb8404000) |
| OHCI init on dev 00:12.1 (regs=0xb8405000) |
| OHCI init on dev 00:13.0 (regs=0xb8406000) |
| OHCI init on dev 00:13.1 (regs=0xb8407000) |
| OHCI init on dev 00:14.5 (regs=0xb8408000) |
| ATA controller 1 at 4020/4040/0 (irq 0 dev 88) |
| ATA controller 2 at 4028/4044/0 (irq 0 dev 88) |
| ATA controller 3 at 1f0/3f4/0 (irq 14 dev a1) |
| ATA controller 4 at 170/374/0 (irq 15 dev a1) |
| ATA controller 5 at 3010/3020/0 (irq 0 dev 330) |
| ata1-0: KINGSTON SV300S37A60G ATA-8 Hard-Disk (57241 MiBytes) |
| Searching bootorder for: /pci@i0cf8/*@11/drive@1/disk@0 |
| Got ps2 nak (status=51) |
| ATA controller 6 at 3018/3024/0 (irq 0 dev 330) |
| Found 0 lpt ports |
| Found 4 serial ports |
| Searching bootorder for: /rom@img/memtest |
| All threads complete. |
| Scan for option roms |
| |
| Press ESC for boot menu. |
| |
| Searching bootorder for: HALT |
| drive 0x000f5f10: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=117231408 |
| Space available for UMB: c0000-ed800, f5aa0-f5ef0 |
| Returned 262144 bytes of ZoneHigh |
| e820 map has 9 items: |
| 0: 0000000000000000 - 000000000009fc00 = 1 RAM |
| 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED |
| 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED |
| 3: 0000000000100000 - 000000006ffa9000 = 1 RAM |
| 4: 000000006ffa9000 - 0000000080000000 = 2 RESERVED |
| 5: 00000000c0000000 - 00000000d0000000 = 2 RESERVED |
| 6: 00000000feb00000 - 00000000feb01000 = 2 RESERVED |
| 7: 00000000fec00000 - 00000000fec01000 = 2 RESERVED |
| 8: 00000000fed00000 - 00000000fed01000 = 2 RESERVED |
| enter handle_19: |
| NULL |
| Booting from Hard Disk... |
| Booting from 0000:7c00 |
| |