| *** Pre-CBMEM romstage console overflowed, log truncated! *** |
| ane 03 new seed: 0024 |
| Lane 04 new seed: 002e |
| Lane 05 new seed: 0032 |
| Lane 06 new seed: 0033 |
| Lane 07 new seed: 0035 |
| Lane 00 nibble 0 raw readback: 0011 |
| Lane 00 nibble 0 adjusted value (pre nibble): 0011 |
| Lane 00 nibble 0 adjusted value (post nibble): 0011 |
| Lane 01 nibble 0 raw readback: 0019 |
| Lane 01 nibble 0 adjusted value (pre nibble): 0019 |
| Lane 01 nibble 0 adjusted value (post nibble): 0019 |
| Lane 02 nibble 0 raw readback: 001e |
| Lane 02 nibble 0 adjusted value (pre nibble): 001e |
| Lane 02 nibble 0 adjusted value (post nibble): 001e |
| Lane 03 nibble 0 raw readback: 0025 |
| Lane 03 nibble 0 adjusted value (pre nibble): 0025 |
| Lane 03 nibble 0 adjusted value (post nibble): 0025 |
| Lane 04 nibble 0 raw readback: 002b |
| Lane 04 nibble 0 adjusted value (pre nibble): 002b |
| Lane 04 nibble 0 adjusted value (post nibble): 002b |
| Lane 05 nibble 0 raw readback: 0030 |
| Lane 05 nibble 0 adjusted value (pre nibble): 0030 |
| Lane 05 nibble 0 adjusted value (post nibble): 0030 |
| Lane 06 nibble 0 raw readback: 0034 |
| Lane 06 nibble 0 adjusted value (pre nibble): 0034 |
| Lane 06 nibble 0 adjusted value (post nibble): 0034 |
| Lane 07 nibble 0 raw readback: 0038 |
| Lane 07 nibble 0 adjusted value (pre nibble): 0038 |
| Lane 07 nibble 0 adjusted value (post nibble): 0038 |
| TrainRcvrEn: Status 2000 |
| TrainRcvrEn: ErrStatus 80 |
| TrainRcvrEn: ErrCode 0 |
| TrainRcvrEn: Done |
| |
| TrainDQSRdWrPos: Status 2000 |
| TrainDQSRdWrPos: TrainErrors 0 |
| TrainDQSRdWrPos: ErrStatus 80 |
| TrainDQSRdWrPos: ErrCode 0 |
| TrainDQSRdWrPos: Done |
| |
| mctAutoInitMCT_D: UMAMemTyping_D |
| mctAutoInitMCT_D: :OtherTiming |
| FMAP: area COREBOOT found @ 200 (1048064 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 397c0 size 48c |
| No CMOS option 'interleave_nodes'. |
| InterleaveNodes_D: Status 2000 |
| InterleaveNodes_D: ErrStatus 80 |
| InterleaveNodes_D: ErrCode 0 |
| InterleaveNodes_D: Done |
| |
| InterleaveChannels_D: Node 0 |
| InterleaveChannels_D: Status 2000 |
| InterleaveChannels_D: ErrStatus 80 |
| InterleaveChannels_D: ErrCode 0 |
| InterleaveChannels_D: Node 1 |
| InterleaveChannels_D: Status 2000 |
| InterleaveChannels_D: ErrStatus 0 |
| InterleaveChannels_D: ErrCode 0 |
| InterleaveChannels_D: Node 2 |
| InterleaveChannels_D: Status 2000 |
| InterleaveChannels_D: ErrStatus 0 |
| InterleaveChannels_D: ErrCode 0 |
| InterleaveChannels_D: Node 3 |
| InterleaveChannels_D: Status 2000 |
| InterleaveChannels_D: ErrStatus 0 |
| InterleaveChannels_D: ErrCode 0 |
| InterleaveChannels_D: Node 4 |
| InterleaveChannels_D: Status 2000 |
| InterleaveChannels_D: ErrStatus 0 |
| InterleaveChannels_D: ErrCode 0 |
| InterleaveChannels_D: Node 5 |
| InterleaveChannels_D: Status 2000 |
| InterleaveChannels_D: ErrStatus 0 |
| InterleaveChannels_D: ErrCode 0 |
| InterleaveChannels_D: Node 6 |
| InterleaveChannels_D: Status 2000 |
| InterleaveChannels_D: ErrStatus 0 |
| InterleaveChannels_D: ErrCode 0 |
| InterleaveChannels_D: Node 7 |
| InterleaveChannels_D: Status 2000 |
| InterleaveChannels_D: ErrStatus 0 |
| InterleaveChannels_D: ErrCode 0 |
| InterleaveChannels_D: Done |
| |
| mctAutoInitMCT_D Done: Global Status: 0 |
| Timestamp - after ram initialization: 7907517389 |
| raminit_amdmct end: |
| CBMEM: |
| IMD: root @ 6ffff000 254 entries. |
| IMD: root @ 6fffec00 62 entries. |
| Timestamp - start of romstage: 3031330 |
| Timestamp - before ram initialization: 797404437 |
| Timestamp - after ram initialization: 7713888375 |
| amdmct_cbmem_store_info: Storing AMDMCT configuration in CBMEM |
| FMAP: area COREBOOT found @ 200 (1048064 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 397c0 size 48c |
| No CMOS option 'ecc_scrub_rate'. |
| BSP overran lower stack boundary. Undefined behaviour may result! |
| Timestamp - end of romstage: 8066849586 |
| CBFS @ 200 size ffe00 |
| CBFS: 'Master Header Locator' located CBFS at [200:100000) |
| CBFS: Locating 'fallback/ramstage' |
| CBFS: Found @ offset 27a00 size 11737 |
| Timestamp - starting to load ramstage: 8133032423 |
| Timestamp - starting LZMA decompress (ignore for x86): 8146982922 |
| Timestamp - finished LZMA decompress (ignore for x86): 8310567383 |
| Timestamp - finished loading ramstage: 8328925157 |
| |
| |
| coreboot-4.9-428-g6b239d8e08 Tue Jan 22 22:34:21 UTC 2019 ramstage starting (log level: 7)... |
| Moving GDT to 6fffe9e0...ok |
| BS: BS_PRE_DEVICE times (us): entry 0 run 0 exit 0 |
| BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 2 exit 0 |
| Enumerating buses... |
| Mainboard enable. dev=0x00e23260 |
| Init adt7461 end, status 0x02 fd |
| setup_bsp_ramtop, TOP MEM: msr.lo = 0x80000000, msr.hi = 0x00000000 |
| setup_bsp_ramtop, TOP MEM2: msr.lo = 0x00000000, msr.hi = 0x00000000 |
| setup_uma_memory: uma size 0x10000000, memory start 0x70000000 |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| FMAP: area COREBOOT found @ 200 (1048064 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 397c0 size 48c |
| FMAP: area COREBOOT found @ 200 (1048064 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 397c0 size 48c |
| No CMOS option 'compute_unit_siblings'. |
| PCI: 00:18.3 siblings=1 |
| CPU: APIC: 00 enabled |
| CPU: APIC: 01 enabled |
| scan_bus: scanning of bus CPU_CLUSTER: 0 took 31114 usecs |
| PCI: pci_scan_bus for bus 00 |
| PCI: 00:18.0 [1022/1200] enabled |
| PCI: 00:18.1 [1022/1201] enabled |
| PCI: 00:18.2 [1022/1202] enabled |
| PCI: 00:18.3 [1022/1203] enabled |
| PCI: 00:18.4 [1022/1204] enabled |
| rs780_enable: dev=00e24e00, VID_DID=0x96011022 |
| Bus-0, Dev-0, Fun-0. |
| enable_pcie_bar3() |
| addr=e0000000,bus=0,devfn=40 |
| gpp_sb_init nb_dev=0x0, dev=0x40, port=0x8 |
| NB_PCI_REG04 = 6. |
| NB_PCI_REG84 = 3000095. |
| NB_PCI_REG4C = 52042. |
| PCI: 00:00.0 [1022/9601] enabled |
| PCI: pci_scan_bus for bus 00 |
| PCI: pci_scan_bus limits devfn 0 - devfn ffffffff |
| PCI: pci_scan_bus upper limit too big. Using 0xff. |
| rs780_enable: dev=00e24e00, VID_DID=0x96011022 |
| Bus-0, Dev-0, Fun-0. |
| enable_pcie_bar3() |
| gpp_sb_init nb_dev=0x0, dev=0x40, port=0x8 |
| NB_PCI_REG04 = 6. |
| NB_PCI_REG84 = 3000095. |
| NB_PCI_REG4C = 52042. |
| PCI: 00:00.0 [1022/9601] enabled |
| rs780_enable: dev=00e24d60, VID_DID=0x96021022 |
| Bus-0, Dev-1, Fun-0. |
| GC is accessible from now on. |
| PCI: 00:01.0 [1022/9602] enabled |
| rs780_enable: dev=00e24c80, VID_DID=0x96031022 |
| Bus-0, Dev-2,3, Fun-0. enable=1 |
| rs780_gfx_init, nb_dev=0x00e24e00, dev=0x00e24c80, port=0x2. |
| misc 28 = 1 |
| rs780_gfx_init step5.9.12.1. |
| rs780_gfx_init step5.9.12.3. |
| rs780_gfx_init step5.9.12.9. |
| rs780_gfx_init step1. |
| device = 2 |
| rs780_gfx_init single_port_configuration. |
| PcieLinkTraining port=2:lc current state=2030400 |
| rs780_gfx_init single_port_configuration step12. |
| rs780_gfx_init single_port_configuration step13. |
| rs780_gfx_init single_port_configuration step14. |
| PCI: Static device PCI: 00:02.0 not found, disabling it. |
| rs780_enable: dev=00e24be0, VID_DID=0xffffffff |
| Bus-0, Dev-2,3, Fun-0. enable=0 |
| rs780_enable: dev=00e24b40, VID_DID=0xffffffff |
| Bus-0, Dev-4,5,6,7, Fun-0. enable=0 |
| rs780_enable: dev=00e24aa0, VID_DID=0xffffffff |
| Bus-0, Dev-4,5,6,7, Fun-0. enable=0 |
| rs780_enable: dev=00e24a00, VID_DID=0xffffffff |
| Bus-0, Dev-4,5,6,7, Fun-0. enable=0 |
| rs780_enable: dev=00e24960, VID_DID=0xffffffff |
| Bus-0, Dev-4,5,6,7, Fun-0. enable=0 |
| rs780_enable: dev=00e248c0, VID_DID=0x960a1022 |
| Bus-0, Dev-8, Fun-0. enable=0 |
| rs780_enable: dev=00e24820, VID_DID=0x96081022 |
| Bus-0, Dev-9, 10, Fun-0. enable=0 |
| rs780_enable: dev=00e24780, VID_DID=0x96091022 |
| Bus-0, Dev-9, 10, Fun-0. enable=1 |
| gpp_sb_init nb_dev=0x0, dev=0x50, port=0xa |
| PcieLinkTraining port=a:lc current state=a0b0f10 |
| addr=e0000000,bus=0,devfn=50 |
| PcieTrainPort reg=0x10000 |
| PcieTrainPort port=0xa result=1 |
| disable_pcie_bar3() |
| rs780 unused GPP ports bitmap=0x2fc, force disabled |
| PCI: 00:0a.0 subordinate bus PCI Express |
| PCI: 00:0a.0 [1022/9609] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:11.0 [1002/4390] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:12.0 [1002/4397] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:12.1 [1002/4398] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:12.2 [1002/4396] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:13.0 [1002/4397] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:13.1 [1002/4398] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:13.2 [1002/4396] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:14.0 [1002/4385] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:14.1 [1002/439c] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:14.2 [1002/4383] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:14.3 [1002/439d] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:14.4 [1002/4384] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:14.5 [1002/4399] enabled |
| PCI: 00:18.0 [1022/1200] enabled |
| PCI: 00:18.1 [1022/1201] enabled |
| PCI: 00:18.2 [1022/1202] enabled |
| PCI: 00:18.3 [1022/1203] enabled |
| PCI: 00:18.4 [1022/1204] enabled |
| PCI: Leftover static devices: |
| PCI: 00:02.0 |
| PCI: 00:03.0 |
| PCI: 00:04.0 |
| PCI: 00:05.0 |
| PCI: 00:06.0 |
| PCI: 00:07.0 |
| PCI: 00:08.0 |
| PCI: 00:09.0 |
| PCI: Check your devicetree.cb. |
| PCI: pci_scan_bus for bus 01 |
| rs780_enable: dev=00e23e40, VID_DID=0x97101002 |
| Bus-0, Dev-4,5,6,7, Fun-0. enable=1 |
| gpp_sb_init nb_dev=0x0, dev=0x28, port=0x5 |
| PcieLinkTraining port=5:lc current state=0 |
| PcieTrainPort port=0x5 result=0 |
| rs780_internal_gfx_enable dev = 0x00e23e40, nb_dev = 0x00e24e00. |
| Sysmem TOM = 0_80000000 |
| Sysmem TOM2 = 0_0 |
| PCI: 01:05.0 [1002/9710] enabled |
| scan_bus: scanning of bus PCI: 00:01.0 took 73366 usecs |
| PCI: pci_scan_bus for bus 02 |
| PCI: 02:00.0 [10ec/8168] enabled |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| Failed to enable LTR for dev = PCI: 02:00.0 |
| scan_bus: scanning of bus PCI: 00:0a.0 took 15142 usecs |
| bus: PCI: 00:14.0[0]->I2C: 01:50 enabled |
| bus: PCI: 00:14.0[0]->I2C: 01:51 enabled |
| bus: PCI: 00:14.0[0]->I2C: 01:52 enabled |
| bus: PCI: 00:14.0[0]->I2C: 01:53 enabled |
| scan_bus: scanning of bus PCI: 00:14.0 took 14700 usecs |
| PNP: 002e.0 disabled |
| PNP: 002e.1 enabled |
| PNP: 002e.2 disabled |
| PNP: 002e.3 disabled |
| PNP: 002e.4 disabled |
| PNP: 002e.5 enabled |
| PNP: 002e.6 enabled |
| PNP: 002e.7 disabled |
| PNP: 002e.8 disabled |
| PNP: 002e.9 disabled |
| PNP: 002e.a disabled |
| scan_bus: scanning of bus PCI: 00:14.3 took 21096 usecs |
| PCI: pci_scan_bus for bus 03 |
| PCI: 03:05.0 [168c/0029] enabled |
| PCI: 03:06.0 [1095/0680] enabled |
| scan_bus: scanning of bus PCI: 00:14.4 took 8590 usecs |
| scan_bus: scanning of bus PCI: 00:18.0 took 0 usecs |
| scan_bus: scanning of bus PCI: 00:18.0 took 565962 usecs |
| scan_bus: scanning of bus DOMAIN: 0000 took 588456 usecs |
| scan_bus: scanning of bus Root Device took 651403 usecs |
| done |
| BS: BS_DEV_ENUMERATE times (us): entry 0 run 667205 exit 0 |
| found VGA at PCI: 01:05.0 |
| Setting up VGA for PCI: 01:05.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:01.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| Allocating resources... |
| Reading resources... |
| Adding PCIe enhanced config space BAR 0xc0000000-0xd0000000. |
| PCI: 00:00.0 register 1c(00000004), read-only ignoring it |
| rs780_gfx_read_resources. |
| I2C: 01:50 missing read_resources |
| I2C: 01:51 missing read_resources |
| I2C: 01:52 missing read_resources |
| I2C: 01:53 missing read_resources |
| FMAP: area COREBOOT found @ 200 (1048064 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 397c0 size 48c |
| FMAP: area COREBOOT found @ 200 (1048064 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 397c0 size 48c |
| Done reading resources. |
| Setting resources... |
| 0: mmio_basek=002a0000, basek=00000300, limitk=00200000 |
| VGA: PCI: 00:18.0 (aka node 0) link 0 has VGA device |
| PCI: 00:18.0 11b8 <- [0x00000a0000 - 0x00000bffff] size 0x00020000 gran 0x00 mem <node 0 link 0> |
| PCI: 00:18.0 10d8 <- [0x0000001000 - 0x0000004fff] size 0x00004000 gran 0x0c io <node 0 link 0> |
| PCI: 00:18.0 10b8 <- [0x00a8000000 - 0x00b00fffff] size 0x08100000 gran 0x14 prefmem <node 0 link 0> |
| PCI: 00:18.0 10b0 <- [0x00b4000000 - 0x00b84fffff] size 0x04500000 gran 0x14 mem <node 0 link 0> |
| PCI: 00:01.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io |
| PCI: 00:01.0 24 <- [0x00a8000000 - 0x00afffffff] size 0x08000000 gran 0x14 bus 01 prefmem |
| PCI: 00:01.0 20 <- [0x00b8000000 - 0x00b81fffff] size 0x00200000 gran 0x14 bus 01 mem |
| PCI: 01:05.0 10 <- [0x00a8000000 - 0x00afffffff] size 0x08000000 gran 0x1b prefmem |
| PCI: 01:05.0 14 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io |
| PCI: 01:05.0 18 <- [0x00b8100000 - 0x00b810ffff] size 0x00010000 gran 0x10 mem |
| PCI: 01:05.0 24 <- [0x00b8000000 - 0x00b80fffff] size 0x00100000 gran 0x14 mem |
| PCI: 00:0a.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 02 io |
| PCI: 00:0a.0 24 <- [0x00b0000000 - 0x00b00fffff] size 0x00100000 gran 0x14 bus 02 prefmem |
| PCI: 00:0a.0 20 <- [0x00b8200000 - 0x00b82fffff] size 0x00100000 gran 0x14 bus 02 mem |
| PCI: 02:00.0 10 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io |
| PCI: 02:00.0 18 <- [0x00b0004000 - 0x00b0004fff] size 0x00001000 gran 0x0c prefmem64 |
| PCI: 02:00.0 20 <- [0x00b0000000 - 0x00b0003fff] size 0x00004000 gran 0x0e prefmem64 |
| PCI: 02:00.0 30 <- [0x00b8200000 - 0x00b820ffff] size 0x00010000 gran 0x10 romem |
| PCI: 00:11.0 10 <- [0x0000004020 - 0x0000004027] size 0x00000008 gran 0x03 io |
| PCI: 00:11.0 14 <- [0x0000004040 - 0x0000004043] size 0x00000004 gran 0x02 io |
| PCI: 00:11.0 18 <- [0x0000004028 - 0x000000402f] size 0x00000008 gran 0x03 io |
| PCI: 00:11.0 1c <- [0x0000004044 - 0x0000004047] size 0x00000004 gran 0x02 io |
| PCI: 00:11.0 20 <- [0x0000004000 - 0x000000400f] size 0x00000010 gran 0x04 io |
| PCI: 00:11.0 24 <- [0x00b8409000 - 0x00b84093ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:12.0 10 <- [0x00b8404000 - 0x00b8404fff] size 0x00001000 gran 0x0c mem |
| PCI: 00:12.1 10 <- [0x00b8405000 - 0x00b8405fff] size 0x00001000 gran 0x0c mem |
| PCI: 00:12.2 10 <- [0x00b840a000 - 0x00b840a0ff] size 0x00000100 gran 0x08 mem |
| PCI: 00:13.0 10 <- [0x00b8406000 - 0x00b8406fff] size 0x00001000 gran 0x0c mem |
| PCI: 00:13.1 10 <- [0x00b8407000 - 0x00b8407fff] size 0x00001000 gran 0x0c mem |
| PCI: 00:13.2 10 <- [0x00b840b000 - 0x00b840b0ff] size 0x00000100 gran 0x08 mem |
| PCI: 00:14.1 10 <- [0x0000004030 - 0x0000004037] size 0x00000008 gran 0x03 io |
| PCI: 00:14.1 14 <- [0x0000004048 - 0x000000404b] size 0x00000004 gran 0x02 io |
| PCI: 00:14.1 18 <- [0x0000004038 - 0x000000403f] size 0x00000008 gran 0x03 io |
| PCI: 00:14.1 1c <- [0x000000404c - 0x000000404f] size 0x00000004 gran 0x02 io |
| PCI: 00:14.1 20 <- [0x0000004010 - 0x000000401f] size 0x00000010 gran 0x04 io |
| PCI: 00:14.2 10 <- [0x00b8400000 - 0x00b8403fff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:14.3 a0 <- [0x00b840c000 - 0x00b840c000] size 0x00000001 gran 0x00 mem |
| PNP: 002e.1 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io |
| PNP: 002e.1 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq |
| PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io |
| PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io |
| PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq |
| PNP: 002e.6 70 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq |
| PCI: 00:14.4 1c <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x0c bus 03 io |
| PCI: 00:14.4 24 <- [0x00b00fffff - 0x00b00ffffe] size 0x00000000 gran 0x14 bus 03 prefmem |
| PCI: 00:14.4 20 <- [0x00b8300000 - 0x00b83fffff] size 0x00100000 gran 0x14 bus 03 mem |
| PCI: 03:05.0 10 <- [0x00b8380000 - 0x00b838ffff] size 0x00010000 gran 0x10 mem |
| PCI: 03:06.0 10 <- [0x0000003010 - 0x0000003017] size 0x00000008 gran 0x03 io |
| PCI: 03:06.0 14 <- [0x0000003020 - 0x0000003023] size 0x00000004 gran 0x02 io |
| PCI: 03:06.0 18 <- [0x0000003018 - 0x000000301f] size 0x00000008 gran 0x03 io |
| PCI: 03:06.0 1c <- [0x0000003024 - 0x0000003027] size 0x00000004 gran 0x02 io |
| PCI: 03:06.0 20 <- [0x0000003000 - 0x000000300f] size 0x00000010 gran 0x04 io |
| PCI: 03:06.0 24 <- [0x00b8390000 - 0x00b83900ff] size 0x00000100 gran 0x08 mem |
| PCI: 03:06.0 30 <- [0x00b8300000 - 0x00b837ffff] size 0x00080000 gran 0x13 romem |
| PCI: 00:14.5 10 <- [0x00b8408000 - 0x00b8408fff] size 0x00001000 gran 0x0c mem |
| PCI: 00:18.3 94 <- [0x00b4000000 - 0x00b7ffffff] size 0x04000000 gran 0x1a mem <gart> |
| PCI: 00:18.3 94 <- [0x00b4000000 - 0x00b7ffffff] size 0x04000000 gran 0x1a mem <gart> |
| PCI: 00:18.3 94 <- [0x00bc000000 - 0x00bfffffff] size 0x04000000 gran 0x1a mem <gart> |
| PCI: 00:18.3 94 <- [0x00bc000000 - 0x00bfffffff] size 0x04000000 gran 0x1a mem <gart> |
| Done setting resources. |
| Done allocating resources. |
| BS: BS_DEV_RESOURCES times (us): entry 0 run 518024 exit 0 |
| Enabling resources... |
| PCI: 00:18.0 cmd <- 00 |
| PCI: 00:18.1 subsystem <- 1043/83a2 |
| PCI: 00:18.1 cmd <- 00 |
| PCI: 00:18.2 subsystem <- 1043/83a2 |
| PCI: 00:18.2 cmd <- 00 |
| PCI: 00:18.3 cmd <- 00 |
| PCI: 00:18.4 cmd <- 00 |
| PCI: 00:00.0 subsystem <- 1043/83a2 |
| PCI: 00:00.0 cmd <- 06 |
| PCI: 00:01.0 bridge ctrl <- 000b |
| PCI: 00:01.0 cmd <- 07 |
| PCI: 00:0a.0 bridge ctrl <- 0003 |
| PCI: 00:0a.0 cmd <- 07 |
| PCI: 00:11.0 subsystem <- 1043/83a2 |
| PCI: 00:11.0 cmd <- 03 |
| PCI: 00:12.0 subsystem <- 1043/83a2 |
| PCI: 00:12.0 cmd <- 02 |
| PCI: 00:12.1 subsystem <- 1043/83a2 |
| PCI: 00:12.1 cmd <- 02 |
| PCI: 00:12.2 subsystem <- 1043/83a2 |
| PCI: 00:12.2 cmd <- 02 |
| PCI: 00:13.0 subsystem <- 1043/83a2 |
| PCI: 00:13.0 cmd <- 02 |
| PCI: 00:13.1 subsystem <- 1043/83a2 |
| PCI: 00:13.1 cmd <- 02 |
| PCI: 00:13.2 subsystem <- 1043/83a2 |
| PCI: 00:13.2 cmd <- 02 |
| PCI: 00:14.0 subsystem <- 1043/83a2 |
| PCI: 00:14.0 cmd <- 403 |
| PCI: 00:14.1 subsystem <- 1043/83a2 |
| PCI: 00:14.1 cmd <- 01 |
| PCI: 00:14.2 subsystem <- 1043/83a2 |
| PCI: 00:14.2 cmd <- 02 |
| PCI: 00:14.3 subsystem <- 1043/83a2 |
| PCI: 00:14.3 cmd <- 0f |
| sb700 lpc decode:PNP: 002e.1, base=0x000003f8, end=0x000003ff |
| sb700 lpc decode:PNP: 002e.5, base=0x00000060, end=0x00000060 |
| sb700 lpc decode:PNP: 002e.5, base=0x00000064, end=0x00000064 |
| PCI: 00:14.4 bridge ctrl <- 0003 |
| PCI: 00:14.4 cmd <- 07 |
| PCI: 00:14.5 subsystem <- 1043/83a2 |
| PCI: 00:14.5 cmd <- 02 |
| PCI: 00:18.0 cmd <- 00 |
| PCI: 00:18.1 cmd <- 00 |
| PCI: 00:18.2 cmd <- 00 |
| PCI: 00:18.3 cmd <- 00 |
| PCI: 00:18.4 cmd <- 00 |
| PCI: 01:05.0 subsystem <- 1043/83a2 |
| PCI: 01:05.0 cmd <- 03 |
| PCI: 02:00.0 cmd <- 03 |
| PCI: 03:05.0 cmd <- 02 |
| PCI: 03:06.0 cmd <- 03 |
| done. |
| BS: BS_DEV_ENABLE times (us): entry 0 run 142612 exit 0 |
| Initializing devices... |
| Root Device init ... |
| Root Device init finished in 1922 usecs |
| CPU_CLUSTER: 0 init ... |
| FMAP: area COREBOOT found @ 200 (1048064 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 397c0 size 48c |
| No CMOS option 'probe_filter'. |
| FMAP: area COREBOOT found @ 200 (1048064 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 397c0 size 48c |
| No CMOS option 'l3_cache_partitioning'. |
| start_eip=0x00001000, code_size=0x00000031 |
| Initializing CPU #0 |
| CPU: vendor AMD device 100f62 |
| CPU: family 10, model 06, stepping 02 |
| nodeid = 00, coreid = 00 |
| Enabling cache |
| CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB |
| MTRR: Physical address space: |
| 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 |
| 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 |
| 0x00000000000c0000 - 0x0000000070000000 size 0x6ff40000 type 6 |
| 0x0000000070000000 - 0x00000000a8000000 size 0x38000000 type 0 |
| 0x00000000a8000000 - 0x00000000b0000000 size 0x08000000 type 1 |
| 0x00000000b0000000 - 0x0000000100000000 size 0x50000000 type 0 |
| MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e |
| MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e |
| MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e |
| MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e |
| MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e |
| MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e |
| MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e |
| MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e |
| MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e |
| MTRR: default type WB/UC MTRR counts: 6/3. |
| MTRR: UC selected as default type. |
| MTRR: 0 base 0x0000000000000000 mask 0x0000ffff80000000 type 6 |
| MTRR: 1 base 0x0000000070000000 mask 0x0000fffff0000000 type 0 |
| MTRR: 2 base 0x00000000a8000000 mask 0x0000fffff8000000 type 1 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x00 done. |
| CPU model: AMD Athlon(tm) II X2 250 Processor |
| siblings = 01, Disabling SMM ASeg memory |
| CPU #0 initialized |
| Waiting for 1 CPUS to stop |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x01 done. |
| CPU model: AMD Athlon(tm) II X2 250 Processor |
| siblings = 01, Disabling SMM ASeg memory |
| CPU #1 initialized |
| All AP CPUs stopped (7624 loops) |
| CPU_CLUSTER: 0 init finished in 256146 usecs |
| PCI: 00:18.0 init ... |
| PCI: 00:18.0 init finished in 2010 usecs |
| PCI: 00:18.1 init ... |
| PCI: 00:18.1 init finished in 2010 usecs |
| PCI: 00:18.2 init ... |
| PCI: 00:18.2 init finished in 2009 usecs |
| PCI: 00:18.3 init ... |
| NB: Function 3 Misc Control.. FMAP: area COREBOOT found @ 200 (1048064 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 397c0 size 48c |
| No CMOS option 'maximum_p_state_limit'. |
| done. |
| PCI: 00:18.3 init finished in 19984 usecs |
| PCI: 00:18.4 init ... |
| NB: Function 4 Link Control.. done. |
| PCI: 00:18.4 init finished in 5250 usecs |
| PCI: 00:00.0 init ... |
| PCI: 00:00.0 init finished in 2010 usecs |
| PCI: 00:11.0 init ... |
| FMAP: area COREBOOT found @ 200 (1048064 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 397c0 size 48c |
| No CMOS option 'sata_ahci_mode'. |
| FMAP: area COREBOOT found @ 200 (1048064 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 397c0 size 48c |
| No CMOS option 'sata_alpm'. |
| No Primary Master SATA drive on Slot0 |
| drive no longer selected after 0 ms, retrying init |
| drive no longer selected after 0 ms, retrying init |
| drive no longer selected after 0 ms, retrying init |
| drive no longer selected after 0 ms, retrying init |
| drive no longer selected after 0 ms, retrying init |
| drive no longer selected after 0 ms, retrying init |
| drive no longer selected after 0 ms, retrying init |
| drive no longer selected after 0 ms, retrying init |
| drive no longer selected after 0 ms, retrying init |
| drive no longer selected after 0 ms, retrying init |
| Primary Slave device is not ready after 10 tries |
| No Secondary Master SATA drive on Slot2 |
| No Secondary Slave SATA drive on Slot3 |
| PCI: 00:11.0 init finished in 97914 usecs |
| PCI: 00:12.0 init ... |
| PCI: 00:12.0 init finished in 2042 usecs |
| PCI: 00:12.1 init ... |
| PCI: 00:12.1 init finished in 2040 usecs |
| PCI: 00:12.2 init ... |
| FMAP: area COREBOOT found @ 200 (1048064 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 397c0 size 48c |
| No CMOS option 'ehci_async_data_cache'. |
| usb2_bar0=0xb840a000 |
| rpr 6.23, final dword=809e01c8 |
| PCI: 00:12.2 init finished in 21450 usecs |
| PCI: 00:13.0 init ... |
| PCI: 00:13.0 init finished in 2040 usecs |
| PCI: 00:13.1 init ... |
| PCI: 00:13.1 init finished in 2041 usecs |
| PCI: 00:13.2 init ... |
| FMAP: area COREBOOT found @ 200 (1048064 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 397c0 size 48c |
| No CMOS option 'ehci_async_data_cache'. |
| usb2_bar0=0xb840b000 |
| rpr 6.23, final dword=809e01c8 |
| PCI: 00:13.2 init finished in 21450 usecs |
| PCI: 00:14.0 init ... |
| sm_init(). |
| IOAPIC: Initializing IOAPIC at 0xfec00000 |
| IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| IOAPIC: 24 interrupts |
| IOAPIC: Enabling interrupts on FSB |
| FMAP: area COREBOOT found @ 200 (1048064 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 397c0 size 48c |
| No CMOS option 'enable_legacy_usb'. |
| FMAP: area COREBOOT found @ 200 (1048064 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 397c0 size 48c |
| set power "off" after power fail |
| FMAP: area COREBOOT found @ 200 (1048064 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 397c0 size 48c |
| ++++++++++set NMI+++++ |
| RTC Init |
| sm_init() end |
| PCI: 00:14.0 init finished in 60615 usecs |
| PCI: 00:14.1 init ... |
| FMAP: area COREBOOT found @ 200 (1048064 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 397c0 size 48c |
| No CMOS option 'sata_ahci_mode'. |
| PCI: 00:14.1 init finished in 16125 usecs |
| PCI: 00:14.2 init ... |
| base = 0xb8400000 |
| codec_mask = 05 |
| 2(th) codec viddid: ffffffff |
| 0(th) codec viddid: ffffffff |
| PCI: 00:14.2 init finished in 13434 usecs |
| PCI: 00:14.3 init ... |
| Skipping isa_dma_init() to avoid getting stuck. |
| PCI: 00:14.3 init finished in 6299 usecs |
| PCI: 00:14.4 init ... |
| PCI: 00:14.4 init finished in 2035 usecs |
| PCI: 00:14.5 init ... |
| PCI: 00:14.5 init finished in 2041 usecs |
| PCI: 00:18.0 init ... |
| PCI: 00:18.0 init finished in 2010 usecs |
| PCI: 00:18.1 init ... |
| PCI: 00:18.1 init finished in 2010 usecs |
| PCI: 00:18.2 init ... |
| PCI: 00:18.2 init finished in 2010 usecs |
| PCI: 00:18.3 init ... |
| NB: Function 3 Misc Control.. FMAP: area COREBOOT found @ 200 (1048064 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 397c0 size 48c |
| No CMOS option 'maximum_p_state_limit'. |
| done. |
| PCI: 00:18.3 init finished in 19986 usecs |
| PCI: 00:18.4 init ... |
| NB: Function 4 Link Control.. done. |
| PCI: 00:18.4 init finished in 5251 usecs |
| PCI: 01:05.0 init ... |
| internal_gfx_pci_dev_init device=9710, vendor=1002. |
| vgainfo: |
| ulBootUpEngineClock:50000 |
| ulBootUpUMAClock:66700 |
| ulBootUpSidePortClock:0 |
| ulMinSidePortClock:0 |
| ulSystemConfig:0 |
| ulBootUpReqDisplayVector:0 |
| ulOtherDisplayMisc:0 |
| ulDDISlot1Config:0 |
| ulDDISlot2Config:0 |
| ucMemoryType:0 |
| ucUMAChannelNumber:1 |
| ucDockingPinBit:0 |
| ucDockingPinPolarity:0 |
| ulDockingPinCFGInfo:0 |
| ulCPUCapInfo: 2 |
| usNumberOfCyclesInPeriod:0 |
| usMaxNBVoltage:0 |
| usMinNBVoltage:0 |
| usBootUpNBVoltage:0 |
| ulHTLinkFreq:200000 |
| usMinHTLinkWidth:16 |
| usMaxHTLinkWidth:16 |
| usUMASyncStartDelay:100 |
| usUMADataReturnTime:150 |
| usLinkStatusZeroTime:0 |
| ulHighVoltageHTLinkFreq:200000 |
| ulLowVoltageHTLinkFreq:180000 |
| usMaxUpStreamHTLinkWidth:16 |
| usMaxDownStreamHTLinkWidth:16 |
| usMinUpStreamHTLinkWidth:16 |
| usMinDownStreamHTLinkWidth:16 |
| PCI: 01:05.0 init finished in 76350 usecs |
| PCI: 02:00.0 init ... |
| PCI: 02:00.0 init finished in 2008 usecs |
| PNP: 002e.1 init ... |
| PNP: 002e.1 init finished in 1922 usecs |
| PNP: 002e.5 init ... |
| PNP: 002e.5 init finished in 1942 usecs |
| PNP: 002e.6 init ... |
| PNP: 002e.6 init finished in 1922 usecs |
| PCI: 03:05.0 init ... |
| PCI: 03:05.0 init finished in 2009 usecs |
| PCI: 03:06.0 init ... |
| SIL3114 set to IDE compatible mode |
| PCI: 03:06.0 init finished in 5147 usecs |
| Devices initialized |
| BS: BS_DEV_INIT times (us): entry 0 run 788904 exit 0 |
| Finalize devices... |
| Devices finalized |
| BS: BS_POST_DEVICE times (us): entry 0 run 3501 exit 0 |
| BS: BS_OS_RESUME_CHECK times (us): entry 0 run 0 exit 0 |
| FMAP: area COREBOOT found @ 200 (1048064 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 397c0 size 48c |
| Copying Interrupt Routing Table to 0x000f0000... done. |
| Copying Interrupt Routing Table to 0x6ffcf000... done. |
| PIRQ table: 336 bytes. |
| Wrote the mp table end at: 000f0410 - 000f0514 |
| Wrote the mp table end at: 6ffce010 - 6ffce114 |
| MP table: 276 bytes. |
| CBFS: 'Master Header Locator' located CBFS at [200:100000) |
| CBFS: Locating 'fallback/dsdt.aml' |
| CBFS: Found @ offset 39cc0 size 28b9 |
| CBFS: 'Master Header Locator' located CBFS at [200:100000) |
| CBFS: Locating 'fallback/slic' |
| CBFS: 'fallback/slic' not found. |
| ACPI: Writing ACPI tables at 6ffaa000. |
| ACPI: * FACS |
| ACPI: * DSDT |
| ACPI: * FADT |
| pm_base: 0x0800 |
| ACPI: added table 1/32, length now 40 |
| ACPI: * SSDT |
| FMAP: area COREBOOT found @ 200 (1048064 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 397c0 size 48c |
| No CMOS option 'cpu_c_states'. |
| processor_brand=AMD Athlon(tm) II X2 250 Processor |
| Pstates algorithm ... |
| Pstate_freq[0] = 3000MHz Pstate_power[0] = 30937mw |
| Pstate_latency[0] = 5us |
| Pstate_freq[1] = 2300MHz Pstate_power[1] = 26010mw |
| Pstate_latency[1] = 5us |
| Pstate_freq[2] = 1800MHz Pstate_power[2] = 22207mw |
| Pstate_latency[2] = 5us |
| PSS: 3000MHz power 30937 control 0x0 status 0x0 |
| PSS: 2300MHz power 26010 control 0x1 status 0x1 |
| PSS: 1800MHz power 22207 control 0x2 status 0x2 |
| PSS: 3000MHz power 30937 control 0x0 status 0x0 |
| PSS: 2300MHz power 26010 control 0x1 status 0x1 |
| PSS: 1800MHz power 22207 control 0x2 status 0x2 |
| ACPI: added table 2/32, length now 44 |
| ACPI: * MCFG |
| ACPI: * MADT |
| ACPI: added table 3/32, length now 48 |
| current = 6ffad510 |
| ACPI: * SRAT at 6ffad510 |
| SRAT: lapic cpu_index=00, node_id=00, apic_id=00 |
| SRAT: lapic cpu_index=01, node_id=00, apic_id=01 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=001ffd00 |
| ACPI: added table 4/32, length now 52 |
| ACPI: * SLIT at 6ffad5b0 |
| ACPI: added table 5/32, length now 56 |
| ACPI: * HPET |
| ACPI: added table 6/32, length now 60 |
| ACPI: * SRAT at 6ffad620 |
| SRAT: lapic cpu_index=00, node_id=00, apic_id=00 |
| SRAT: lapic cpu_index=01, node_id=00, apic_id=01 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=001ffd00 |
| ACPI: added table 7/32, length now 64 |
| ACPI: * SLIT at 6ffad6c0 |
| ACPI: added table 8/32, length now 68 |
| ACPI: done. |
| ACPI tables: 14064 bytes. |
| smbios_write_tables: 6ffa9000 |
| DOMAIN: 0000 (AMD Family 10h/15h Root Complex) |
| SMBIOS tables: 444 bytes. |
| Writing table forward entry at 0x00000500 |
| Wrote coreboot table at: 00000500, 0x10 bytes, checksum 8fe1 |
| Writing coreboot table at 0x6ffd0000 |
| CBFS: 'Master Header Locator' located CBFS at [200:100000) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 397c0 size 48c |
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1. 0000000000001000-000000000009ffff: RAM |
| 2. 00000000000c0000-0000000000dfffff: RAM |
| 3. 0000000000e00000-0000000000ef4fff: RAMSTAGE |
| 4. 0000000000ef5000-000000006ffa8fff: RAM |
| 5. 000000006ffa9000-000000006fffffff: CONFIGURATION TABLES |
| 6. 0000000070000000-000000007fffffff: RESERVED |
| 7. 00000000c0000000-00000000cfffffff: RESERVED |
| 8. 00000000feb00000-00000000feb00fff: RESERVED |
| 9. 00000000fec00000-00000000fec00fff: RESERVED |
| 10. 00000000fed00000-00000000fed00fff: RESERVED |
| CBFS: 'Master Header Locator' located CBFS at [200:100000) |
| Wrote coreboot table at: 6ffd0000, 0x790 bytes, checksum 4b4 |
| coreboot table: 1960 bytes. |
| IMD ROOT 0. 6ffff000 00001000 |
| IMD SMALL 1. 6fffe000 00001000 |
| CAR GLOBALS 2. 6fff3000 0000a800 |
| CONSOLE 3. 6ffe3000 00010000 |
| TIME STAMP 4. 6ffe2000 00000910 |
| AMDMEM INFO 5. 6ffd8000 000093fc |
| COREBOOT 6. 6ffd0000 00008000 |
| IRQ TABLE 7. 6ffcf000 00001000 |
| SMP TABLE 8. 6ffce000 00001000 |
| ACPI 9. 6ffaa000 00024000 |
| SMBIOS 10. 6ffa9000 00000800 |
| IMD small region: |
| IMD ROOT 0. 6fffec00 00000400 |
| ROMSTAGE 1. 6fffebe0 00000004 |
| GDT 2. 6fffe9e0 00000200 |
| COREBOOTFWD 3. 6fffe9a0 00000028 |
| BS: BS_WRITE_TABLES times (us): entry 11203 run 363848 exit 0 |
| CBFS: 'Master Header Locator' located CBFS at [200:100000) |
| CBFS: Locating 'fallback/payload' |
| CBFS: Found @ offset 3c600 size 109fd |
| Checking segment from ROM address 0xfff3c838 |
| Checking segment from ROM address 0xfff3c854 |
| Loading segment from ROM address 0xfff3c838 |
| code (compression=1) |
| New segment dstaddr 0x000e06e0 memsize 0x1f920 srcaddr 0xfff3c870 filesize 0x109c5 |
| Loading Segment: addr: 0x000e06e0 memsz: 0x000000000001f920 filesz: 0x00000000000109c5 |
| using LZMA |
| Loading segment from ROM address 0xfff3c854 |
| Entry Point 0x000fd258 |
| BS: BS_PAYLOAD_LOAD times (us): entry 0 run 86968 exit 1 |
| Jumping to boot code at 000fd258(6ffd0000) |
| SeaBIOS (version rel-1.12.0-6-g34fe866) |
| BUILD: gcc: (coreboot toolchain v1.53 August 16th, 2018) 8.1.0 binutils: (GNU Binutils) 2.30 |
| Found coreboot cbmem console @ 6ffe3000 |
| Found mainboard ASUS M4A785T-M |
| Relocating init from 0x000e1d40 to 0x6ff5c560 (size 51712) |
| Found CBFS header at 0xfff00238 |
| multiboot: eax=e257e0, ebx=e25794 |
| Found 25 PCI devices (max PCI bus is 03) |
| Copying SMBIOS entry point from 0x6ffa9000 to 0x000f6280 |
| Copying ACPI RSDP from 0x6ffaa000 to 0x000f6250 |
| Copying MPTABLE from 0x6ffce000/6ffce010 to 0x000f6130 |
| Copying PIR from 0x6ffcf000 to 0x000f5fe0 |
| Using pmtimer, ioport 0x820 |
| Scan for VGA option rom |
| Turning on vga text mode console |
| SeaBIOS (version rel-1.12.0-6-g34fe866) |
| EHCI init on dev 00:12.2 (regs=0xb840a020) |
| EHCI init on dev 00:13.2 (regs=0xb840b020) |
| OHCI init on dev 00:12.0 (regs=0xb8404000) |
| OHCI init on dev 00:12.1 (regs=0xb8405000) |
| OHCI init on dev 00:13.0 (regs=0xb8406000) |
| OHCI init on dev 00:13.1 (regs=0xb8407000) |
| OHCI init on dev 00:14.5 (regs=0xb8408000) |
| ATA controller 1 at 4020/4040/0 (irq 0 dev 88) |
| ATA controller 2 at 4028/4044/0 (irq 0 dev 88) |
| ATA controller 3 at 1f0/3f4/0 (irq 14 dev a1) |
| ATA controller 4 at 170/374/0 (irq 15 dev a1) |
| ATA controller 5 at 3010/3020/0 (irq 0 dev 330) |
| ata1-0: KINGSTON SV300S37A60G ATA-8 Hard-Disk (57241 MiBytes) |
| Searching bootorder for: /pci@i0cf8/*@11/drive@1/disk@0 |
| ATA controller 6 at 3018/3024/0 (irq 0 dev 330) |
| Got ps2 nak (status=51) |
| Found 0 lpt ports |
| Found 4 serial ports |
| Searching bootorder for: /rom@img/memtest |
| DVD/CD [ata3-0: _NEC DVD_RW ND-4570A ATAPI-0 DVD/CD] |
| Searching bootorder for: /pci@i0cf8/*@14,1/drive@1/disk@0 |
| All threads complete. |
| Scan for option roms |
| |
| Press ESC for boot menu. |
| |
| Searching bootorder for: HALT |
| drive 0x000f5f10: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=117231408 |
| Space available for UMB: c0000-ed000, f5aa0-f5e90 |
| Returned 262144 bytes of ZoneHigh |
| e820 map has 9 items: |
| 0: 0000000000000000 - 000000000009fc00 = 1 RAM |
| 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED |
| 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED |
| 3: 0000000000100000 - 000000006ffa9000 = 1 RAM |
| 4: 000000006ffa9000 - 0000000080000000 = 2 RESERVED |
| 5: 00000000c0000000 - 00000000d0000000 = 2 RESERVED |
| 6: 00000000feb00000 - 00000000feb01000 = 2 RESERVED |
| 7: 00000000fec00000 - 00000000fec01000 = 2 RESERVED |
| 8: 00000000fed00000 - 00000000fed01000 = 2 RESERVED |
| enter handle_19: |
| NULL |
| Booting from DVD/CD... |
| Device reports MEDIUM NOT PRESENT |
| scsi_is_ready returned -1 |
| Boot failed: Could not read from CDROM (code 0003) |
| enter handle_18: |
| NULL |
| Booting from Hard Disk... |
| Booting from 0000:7c00 |
| |