| led 0 |
| PCI: 00:04.0: enabled 1 |
| PCI: 00:05.0: enabled 0 |
| PCI: 00:06.0: enabled 0 |
| PCI: 00:07.0: enabled 0 |
| PCI: 00:08.0: enabled 0 |
| PCI: 00:09.0: enabled 1 |
| PCI: 00:0a.0: enabled 1 |
| PCI: 00:0b.0: enabled 1 |
| PCI: 00:0c.0: enabled 1 |
| PCI: 00:0d.0: enabled 1 |
| PCI: 00:11.0: enabled 1 |
| PCI: 00:12.0: enabled 1 |
| PCI: 00:12.1: enabled 1 |
| PCI: 00:12.2: enabled 1 |
| PCI: 00:13.0: enabled 1 |
| PCI: 00:13.1: enabled 1 |
| PCI: 00:13.2: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| I2C: 00:50: enabled 1 |
| I2C: 00:51: enabled 1 |
| I2C: 00:52: enabled 1 |
| I2C: 00:53: enabled 1 |
| I2C: 00:54: enabled 1 |
| I2C: 00:55: enabled 1 |
| I2C: 00:56: enabled 1 |
| I2C: 00:57: enabled 1 |
| I2C: 00:2f: enabled 1 |
| PCI: 00:14.1: enabled 1 |
| PCI: 00:14.2: enabled 1 |
| PCI: 00:14.3: enabled 1 |
| PNP: 002e.0: enabled 0 |
| PNP: 002e.1: enabled 0 |
| PNP: 002e.2: enabled 1 |
| PNP: 002e.3: enabled 1 |
| PNP: 002e.5: enabled 1 |
| PNP: 002e.106: enabled 0 |
| PNP: 002e.107: enabled 0 |
| PNP: 002e.207: enabled 0 |
| PNP: 002e.307: enabled 0 |
| PNP: 002e.407: enabled 0 |
| PNP: 002e.8: enabled 0 |
| PNP: 002e.108: enabled 0 |
| PNP: 002e.9: enabled 0 |
| PNP: 002e.109: enabled 0 |
| PNP: 002e.209: enabled 0 |
| PNP: 002e.309: enabled 0 |
| PNP: 002e.a: enabled 1 |
| PNP: 002e.b: enabled 1 |
| PNP: 002e.c: enabled 0 |
| PNP: 002e.d: enabled 0 |
| PNP: 002e.f: enabled 0 |
| PNP: 004e.0: enabled 1 |
| PNP: 0ca2.0: enabled 1 |
| PCI: 00:14.4: enabled 1 |
| PCI: 00:01.0: enabled 1 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:03.0: enabled 1 |
| PCI: 00:14.5: enabled 1 |
| PCI: 00:18.1: enabled 1 |
| PCI: 00:18.2: enabled 1 |
| PCI: 00:18.3: enabled 1 |
| PCI: 00:18.4: enabled 1 |
| PCI: 00:18.5: enabled 1 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:19.1: enabled 1 |
| PCI: 00:19.2: enabled 1 |
| PCI: 00:19.3: enabled 1 |
| PCI: 00:19.4: enabled 1 |
| PCI: 00:19.5: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1a.1: enabled 1 |
| PCI: 00:1a.2: enabled 1 |
| PCI: 00:1a.3: enabled 1 |
| PCI: 00:1a.4: enabled 1 |
| PCI: 00:1a.5: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1b.1: enabled 1 |
| PCI: 00:1b.2: enabled 1 |
| PCI: 00:1b.3: enabled 1 |
| PCI: 00:1b.4: enabled 1 |
| PCI: 00:1b.5: enabled 1 |
| Mainboard KGPE-D16 Enable. dev=0x00e31d00 |
| mainboard_enable, TOP MEM: msr.lo = 0xc0000000, msr.hi = 0x00000000 |
| mainboard_enable, TOP MEM2: msr2.lo = 0x40000000, msr2.hi = 0x00000010 |
| Root Device scanning... |
| root_dev_scan_bus for Root Device |
| setup_bsp_ramtop, TOP MEM: msr.lo = 0xc0000000, msr.hi = 0x00000000 |
| setup_bsp_ramtop, TOP MEM2: msr.lo = 0x40000000, msr.hi = 0x00000010 |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| CPU_CLUSTER: 0 scanning... |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| PCI: 00:18.5 siblings=7 |
| CPU: APIC: 00 enabled |
| CPU: APIC: 01 enabled |
| CPU: APIC: 02 enabled |
| CPU: APIC: 03 enabled |
| CPU: APIC: 04 enabled |
| CPU: APIC: 05 enabled |
| CPU: APIC: 06 enabled |
| CPU: APIC: 07 enabled |
| PCI: 00:19.5 siblings=7 |
| CPU: APIC: 08 enabled |
| CPU: APIC: 09 enabled |
| CPU: APIC: 0a enabled |
| CPU: APIC: 0b enabled |
| CPU: APIC: 0c enabled |
| CPU: APIC: 0d enabled |
| CPU: APIC: 0e enabled |
| CPU: APIC: 0f enabled |
| PCI: 00:1a.5 siblings=7 |
| CPU: APIC: 20 enabled |
| CPU: APIC: 21 enabled |
| CPU: APIC: 22 enabled |
| CPU: APIC: 23 enabled |
| CPU: APIC: 24 enabled |
| CPU: APIC: 25 enabled |
| CPU: APIC: 26 enabled |
| CPU: APIC: 27 enabled |
| PCI: 00:1b.5 siblings=7 |
| CPU: APIC: 28 enabled |
| CPU: APIC: 29 enabled |
| CPU: APIC: 2a enabled |
| CPU: APIC: 2b enabled |
| CPU: APIC: 2c enabled |
| CPU: APIC: 2d enabled |
| CPU: APIC: 2e enabled |
| CPU: APIC: 2f enabled |
| scan_bus: scanning of bus CPU_CLUSTER: 0 took 78923 usecs |
| DOMAIN: 0000 scanning... |
| PCI: pci_scan_bus for bus 00 |
| POST: 0x24 |
| PCI: 00:18.0 [1022/1600] bus ops |
| PCI: 00:18.0 [1022/1600] enabled |
| PCI: 00:18.1 [1022/1601] enabled |
| PCI: 00:18.2 [1022/1602] enabled |
| PCI: 00:18.3 [1022/1603] ops |
| PCI: 00:18.3 [1022/1603] enabled |
| PCI: 00:18.4 [1022/1604] ops |
| PCI: 00:18.4 [1022/1604] enabled |
| PCI: 00:18.5 [1022/1605] ops |
| PCI: 00:18.5 [1022/1605] enabled |
| PCI: 00:19.0 [1022/1600] bus ops |
| PCI: 00:19.0 [1022/1600] enabled |
| PCI: 00:19.1 [1022/1601] enabled |
| PCI: 00:19.2 [1022/1602] enabled |
| PCI: 00:19.3 [1022/1603] ops |
| PCI: 00:19.3 [1022/1603] enabled |
| PCI: 00:19.4 [1022/1604] ops |
| PCI: 00:19.4 [1022/1604] enabled |
| PCI: 00:19.5 [1022/1605] ops |
| PCI: 00:19.5 [1022/1605] enabled |
| PCI: 00:1a.0 [1022/1600] bus ops |
| PCI: 00:1a.0 [1022/1600] enabled |
| PCI: 00:1a.1 [1022/1601] enabled |
| PCI: 00:1a.2 [1022/1602] enabled |
| PCI: 00:1a.3 [1022/1603] ops |
| PCI: 00:1a.3 [1022/1603] enabled |
| PCI: 00:1a.4 [1022/1604] ops |
| PCI: 00:1a.4 [1022/1604] enabled |
| PCI: 00:1a.5 [1022/1605] ops |
| PCI: 00:1a.5 [1022/1605] enabled |
| PCI: 00:1b.0 [1022/1600] bus ops |
| PCI: 00:1b.0 [1022/1600] enabled |
| PCI: 00:1b.1 [1022/1601] enabled |
| PCI: 00:1b.2 [1022/1602] enabled |
| PCI: 00:1b.3 [1022/1603] ops |
| PCI: 00:1b.3 [1022/1603] enabled |
| PCI: 00:1b.4 [1022/1604] ops |
| PCI: 00:1b.4 [1022/1604] enabled |
| PCI: 00:1b.5 [1022/1605] ops |
| PCI: 00:1b.5 [1022/1605] enabled |
| POST: 0x25 |
| PCI: 00:18.0 scanning... |
| do_hypertransport_scan_chain for bus 00 |
| sr5650_enable: dev=00e34460, VID_DID=0x5a101002 |
| Bus-0, Dev-0, Fun-0. |
| enable_pcie_bar3 |
| sr5650_gpp_sb_init: nb_dev=0x00e34460, dev=0x00e33ec0, port=0x8 |
| PciePowerOffGppPorts() port 8 |
| NB_PCI_REG04 = 2. |
| NB_PCI_REG84 = 3000010. |
| NB_PCI_REG4C = 52042. |
| Sysmem TOM = 0_c0000000 |
| Sysmem TOM2 = 10_40000000 |
| PCI: 00:00.0 [1002/5a10] ops |
| PCI: 00:00.0 [1002/5a10] enabled |
| flags: 0xa803 |
| flags: 0x0280 |
| PCI: 00:00.0 count: 0014 static_count: 0015 |
| PCI: 00:00.0 [1002/5a10] enabled next_unitid: 0015 |
| PCI: pci_scan_bus for bus 00 |
| POST: 0x24 |
| sr5650_enable: dev=00e34460, VID_DID=0x5a101002 |
| Bus-0, Dev-0, Fun-0. |
| enable_pcie_bar3 |
| sr5650_gpp_sb_init: nb_dev=0x00e34460, dev=0x00e33ec0, port=0x8 |
| PciePowerOffGppPorts() port 8 |
| NB_PCI_REG04 = 2. |
| NB_PCI_REG84 = 3000010. |
| NB_PCI_REG4C = 52042. |
| Sysmem TOM = 0_c0000000 |
| Sysmem TOM2 = 10_40000000 |
| PCI: 00:00.0 [1002/5a10] enabled |
| sr5650_enable: dev=00e343c0, VID_DID=0xffffffff |
| Bus-0, Dev-0, Fun-1. |
| PCI: Static device PCI: 00:00.1 not found, disabling it. |
| sr5650_enable: dev=00e34320, VID_DID=0x5a231002 |
| Bus-0, Dev-0, Fun-2. |
| PCI: 00:00.2 [1002/5a23] ops |
| PCI: 00:00.2 [1002/5a23] enabled |
| sr5650_enable: dev=00e34280, VID_DID=0xffffffff |
| Bus-0, Dev-2,3, Fun-0. enable=1 |
| sr5650_gpp_sb_init: nb_dev=0x00e34460, dev=0x00e34280, port=0x2 |
| PcieLinkTraining port=2:lc current state=a0b0f10 |
| addr=c0000000,bus=0,devfn=10 |
| PcieTrainPort reg=0x10000 |
| sr5650_gpp_sb_init: port=0x2 hw_port=0x2 result=1 |
| PCI: 00:02.0 subordinate bus PCI Express |
| PCI: 00:02.0 [1002/5a16] enabled |
| sr5650_enable: dev=00e341e0, VID_DID=0xffffffff |
| Bus-0, Dev-2,3, Fun-0. enable=0 |
| sr5650_enable: dev=00e34140, VID_DID=0xffffffff |
| enable_pcie_bar3 |
| Bus-0, Dev-4,5,6,7, Fun-0. enable=1 |
| sr5650_gpp_sb_init: nb_dev=0x00e34460, dev=0x00e34140, port=0x4 |
| PcieLinkTraining port=4:lc current state=2030400 |
| sr5650_gpp_sb_init: port=0x4 hw_port=0x4 result=0 |
| PciePowerOffGppPorts() port 4 |
| PCI: 00:04.0 subordinate bus PCI Express |
| PCI: 00:04.0 [1002/5a18] enabled |
| sr5650_enable: dev=00e340a0, VID_DID=0xffffffff |
| enable_pcie_bar3 |
| Bus-0, Dev-4,5,6,7, Fun-0. enable=0 |
| sr5650_enable: dev=00e34000, VID_DID=0xffffffff |
| enable_pcie_bar3 |
| Bus-0, Dev-4,5,6,7, Fun-0. enable=0 |
| sr5650_enable: dev=00e33f60, VID_DID=0xffffffff |
| enable_pcie_bar3 |
| Bus-0, Dev-4,5,6,7, Fun-0. enable=0 |
| sr5650_enable: dev=00e33ec0, VID_DID=0xffffffff |
| Bus-0, Dev-8, Fun-0. enable=0 |
| disable_pcie_bar3 |
| sr5650_enable: dev=00e33e20, VID_DID=0xffffffff |
| Bus-0, Dev-9, 10, Fun-0. enable=1 |
| enable_pcie_bar3 |
| sr5650_gpp_sb_init: nb_dev=0x00e34460, dev=0x00e33e20, port=0x9 |
| PcieLinkTraining port=5:lc current state=a0b0f10 |
| addr=c0000000,bus=0,devfn=48 |
| PcieTrainPort reg=0x10000 |
| sr5650_gpp_sb_init: port=0x9 hw_port=0x5 result=1 |
| PCI: 00:09.0 subordinate bus PCI Express |
| PCI: 00:09.0 [1002/5a1c] enabled |
| sr5650_enable: dev=00e33d80, VID_DID=0xffffffff |
| Bus-0, Dev-9, 10, Fun-0. enable=1 |
| enable_pcie_bar3 |
| sr5650_gpp_sb_init: nb_dev=0x00e34460, dev=0x00e33d80, port=0xa |
| PcieLinkTraining port=6:lc current state=a0b0f10 |
| addr=c0000000,bus=0,devfn=50 |
| PcieTrainPort reg=0x10000 |
| sr5650_gpp_sb_init: port=0xa hw_port=0x6 result=1 |
| PCI: 00:0a.0 subordinate bus PCI Express |
| PCI: 00:0a.0 [1002/5a1d] enabled |
| sr5650_enable: dev=00e33ce0, VID_DID=0xffffffff |
| Bus-0, Dev-11,12, Fun-0. enable=1 |
| sr5650_gpp_sb_init: nb_dev=0x00e34460, dev=0x00e33ce0, port=0xb |
| PcieLinkTraining port=b:lc current state=a0b0f10 |
| addr=c0000000,bus=0,devfn=58 |
| PcieTrainPort reg=0x10000 |
| sr5650_gpp_sb_init: port=0xb hw_port=0xb result=1 |
| PCI: 00:0b.0 subordinate bus PCI Express |
| PCI: 00:0b.0 [1002/5a1f] enabled |
| sr5650_enable: dev=00e33c40, VID_DID=0xffffffff |
| Bus-0, Dev-11,12, Fun-0. enable=1 |
| sr5650_gpp_sb_init: nb_dev=0x00e34460, dev=0x00e33c40, port=0xc |
| PcieLinkTraining port=c:lc current state=a0b0f10 |
| addr=c0000000,bus=0,devfn=60 |
| PcieTrainPort reg=0x10000 |
| sr5650_gpp_sb_init: port=0xc hw_port=0xc result=1 |
| PCI: 00:0c.0 subordinate bus PCI Express |
| PCI: 00:0c.0 [1002/5a20] enabled |
| sr5650_enable: dev=00e33ba0, VID_DID=0xffffffff |
| sr5650_gpp_sb_init: nb_dev=0x00e34460, dev=0x00e33ba0, port=0xd |
| PcieLinkTraining port=d:lc current state=2030400 |
| sr5650_gpp_sb_init: port=0xd hw_port=0xd result=0 |
| PciePowerOffGppPorts() port 13 |
| PCI: 00:0d.0 subordinate bus PCI Express |
| PCI: 00:0d.0 [1002/5a1e] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:11.0 [1002/4394] ops |
| PCI: 00:11.0 [1002/4394] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:12.0 [1002/4397] ops |
| PCI: 00:12.0 [1002/4397] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:12.1 [1002/4398] ops |
| PCI: 00:12.1 [1002/4398] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:12.2 [1002/4396] ops |
| PCI: 00:12.2 [1002/4396] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:13.0 [1002/4397] ops |
| PCI: 00:13.0 [1002/4397] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:13.1 [1002/4398] ops |
| PCI: 00:13.1 [1002/4398] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:13.2 [1002/4396] ops |
| PCI: 00:13.2 [1002/4396] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:14.0 [1002/4385] bus ops |
| PCI: 00:14.0 [1002/4385] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:14.1 [1002/439c] ops |
| PCI: 00:14.1 [1002/439c] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:14.2 [1002/4383] ops |
| PCI: 00:14.2 [1002/4383] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:14.3 [1002/439d] bus ops |
| PCI: 00:14.3 [1002/439d] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:14.4 [1002/4384] bus ops |
| PCI: 00:14.4 [1002/4384] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:14.5 [1002/4399] ops |
| PCI: 00:14.5 [1002/4399] enabled |
| POST: 0x25 |
| PCI: Leftover static devices: |
| PCI: 00:00.1 |
| PCI: 00:03.0 |
| PCI: 00:05.0 |
| PCI: 00:06.0 |
| PCI: 00:07.0 |
| PCI: 00:08.0 |
| PCI: Check your devicetree.cb. |
| PCI: 00:02.0 scanning... |
| do_pci_scan_bridge for PCI: 00:02.0 |
| PCI: pci_scan_bus for bus 01 |
| POST: 0x24 |
| PCI: 01:00.0 [1002/67ef] enabled |
| PCI: 01:00.1 [1002/aae0] enabled |
| POST: 0x25 |
| POST: 0x55 |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpoint |
| ASPM: Enabled L1 |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpoint |
| ASPM: Enabled L1 |
| scan_bus: scanning of bus PCI: 00:02.0 took 27570 usecs |
| PCI: 00:04.0 scanning... |
| do_pci_scan_bridge for PCI: 00:04.0 |
| PCI: pci_scan_bus for bus 02 |
| POST: 0x24 |
| POST: 0x25 |
| POST: 0x55 |
| scan_bus: scanning of bus PCI: 00:04.0 took 9048 usecs |
| PCI: 00:09.0 scanning... |
| do_pci_scan_bridge for PCI: 00:09.0 |
| PCI: pci_scan_bus for bus 03 |
| POST: 0x24 |
| PCI: 03:00.0 [8086/10d3] enabled |
| POST: 0x25 |
| POST: 0x55 |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpoint |
| ASPM: Enabled None |
| Failed to enable LTR for dev = PCI: 03:00.0 |
| scan_bus: scanning of bus PCI: 00:09.0 took 21556 usecs |
| PCI: 00:0a.0 scanning... |
| do_pci_scan_bridge for PCI: 00:0a.0 |
| PCI: pci_scan_bus for bus 04 |
| POST: 0x24 |
| PCI: 04:00.0 [8086/10d3] enabled |
| POST: 0x25 |
| POST: 0x55 |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpoint |
| ASPM: Enabled None |
| Failed to enable LTR for dev = PCI: 04:00.0 |
| scan_bus: scanning of bus PCI: 00:0a.0 took 21556 usecs |
| PCI: 00:0b.0 scanning... |
| do_pci_scan_bridge for PCI: 00:0b.0 |
| PCI: pci_scan_bus for bus 05 |
| POST: 0x24 |
| PCI: 05:00.0 [14e4/1639] enabled |
| PCI: 05:00.1 [14e4/1639] enabled |
| POST: 0x25 |
| POST: 0x55 |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpoint |
| ASPM: Enabled L0s |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpoint |
| ASPM: Enabled L0s |
| Failed to enable LTR for dev = PCI: 05:00.0 |
| Failed to enable LTR for dev = PCI: 05:00.1 |
| scan_bus: scanning of bus PCI: 00:0b.0 took 33924 usecs |
| PCI: 00:0c.0 scanning... |
| do_pci_scan_bridge for PCI: 00:0c.0 |
| PCI: pci_scan_bus for bus 06 |
| POST: 0x24 |
| PCI: 06:00.0 [1102/000b] enabled |
| POST: 0x25 |
| POST: 0x55 |
| PCIE CLK PM is not supported by endpoint |
| ASPM: Enabled None |
| Failed to enable LTR for dev = PCI: 06:00.0 |
| scan_bus: scanning of bus PCI: 00:0c.0 took 18892 usecs |
| PCI: 00:0d.0 scanning... |
| do_pci_scan_bridge for PCI: 00:0d.0 |
| PCI: pci_scan_bus for bus 07 |
| POST: 0x24 |
| POST: 0x25 |
| POST: 0x55 |
| scan_bus: scanning of bus PCI: 00:0d.0 took 9048 usecs |
| PCI: 00:14.0 scanning... |
| scan_generic_bus for PCI: 00:14.0 |
| bus: PCI: 00:14.0[0]->I2C: 01:50 enabled |
| bus: PCI: 00:14.0[0]->I2C: 01:51 enabled |
| bus: PCI: 00:14.0[0]->I2C: 01:52 enabled |
| bus: PCI: 00:14.0[0]->I2C: 01:53 enabled |
| bus: PCI: 00:14.0[0]->I2C: 01:54 enabled |
| bus: PCI: 00:14.0[0]->I2C: 01:55 enabled |
| bus: PCI: 00:14.0[0]->I2C: 01:56 enabled |
| bus: PCI: 00:14.0[0]->I2C: 01:57 enabled |
| bus: PCI: 00:14.0[0]->I2C: 01:2f enabled |
| scan_generic_bus for PCI: 00:14.0 done |
| scan_bus: scanning of bus PCI: 00:14.0 took 33502 usecs |
| PCI: 00:14.3 scanning... |
| scan_lpc_bus for PCI: 00:14.3 |
| PNP: 002e.0 disabled |
| PNP: 002e.1 disabled |
| PNP: 002e.2 enabled |
| PNP: 002e.3 enabled |
| PNP: 002e.5 enabled |
| PNP: 002e.106 disabled |
| PNP: 002e.107 disabled |
| PNP: 002e.207 disabled |
| PNP: 002e.307 disabled |
| PNP: 002e.407 disabled |
| PNP: 002e.8 disabled |
| PNP: 002e.108 disabled |
| PNP: 002e.9 disabled |
| PNP: 002e.109 disabled |
| PNP: 002e.209 disabled |
| PNP: 002e.309 disabled |
| PNP: 002e.a enabled |
| PNP: 002e.b enabled |
| PNP: 002e.c disabled |
| PNP: 002e.d disabled |
| PNP: 002e.f disabled |
| PNP: 004e.0 enabled |
| PNP: 0ca2.0 enabled |
| scan_lpc_bus for PCI: 00:14.3 done |
| scan_bus: scanning of bus PCI: 00:14.3 took 43055 usecs |
| PCI: 00:14.4 scanning... |
| do_pci_scan_bridge for PCI: 00:14.4 |
| PCI: pci_scan_bus for bus 08 |
| POST: 0x24 |
| sb7xx_51xx_enable() |
| PCI: 08:01.0 [1a03/2000] ops |
| PCI: 08:01.0 [1a03/2000] enabled |
| sb7xx_51xx_enable() |
| PCI: Static device PCI: 08:02.0 not found, disabling it. |
| sb7xx_51xx_enable() |
| PCI: Static device PCI: 08:03.0 not found, disabling it. |
| POST: 0x25 |
| PCI: Leftover static devices: |
| PCI: 08:02.0 |
| PCI: 08:03.0 |
| PCI: Check your devicetree.cb. |
| POST: 0x55 |
| scan_bus: scanning of bus PCI: 00:14.4 took 32379 usecs |
| POST: 0x55 |
| scan_bus: scanning of bus PCI: 00:18.0 took 1715060 usecs |
| PCI: 00:19.0 scanning... |
| scan_bus: scanning of bus PCI: 00:19.0 took 1816 usecs |
| PCI: 00:1a.0 scanning... |
| scan_bus: scanning of bus PCI: 00:1a.0 took 1817 usecs |
| PCI: 00:1b.0 scanning... |
| scan_bus: scanning of bus PCI: 00:1b.0 took 1817 usecs |
| POST: 0x55 |
| DOMAIN: 0000 passpw: enabled |
| DOMAIN: 0000 passpw: enabled |
| DOMAIN: 0000 passpw: enabled |
| DOMAIN: 0000 passpw: enabled |
| scan_bus: scanning of bus DOMAIN: 0000 took 1842681 usecs |
| root_dev_scan_bus for Root Device done |
| scan_bus: scanning of bus Root Device took 1949692 usecs |
| done |
| BS: BS_DEV_ENUMERATE times (us): entry 0 run 2307756 exit 0 |
| POST: 0x73 |
| Timestamp - device configuration: 64902684478 |
| found VGA at PCI: 08:01.0 |
| found VGA at PCI: 01:00.0 |
| Setting up VGA for PCI: 01:00.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:02.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| Allocating resources... |
| Reading resources... |
| Root Device read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 done |
| Adding PCIe enhanced config space BAR 0xc0000000-0xd0000000. |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| DOMAIN: 0000 read_resources bus 0 link: 0 |
| PCI: 00:18.0 read_resources bus 0 link: 2 |
| PCI: 00:18.0 read_resources bus 0 link: 2 done |
| PCI: 00:18.0 read_resources bus 0 link: 3 |
| PCI: 00:18.0 read_resources bus 0 link: 3 done |
| PCI: 00:18.0 read_resources bus 0 link: 0 |
| PCI: 00:18.0 read_resources bus 0 link: 0 done |
| PCI: 00:18.0 read_resources bus 0 link: 1 |
| sr5690_read_resource: PCI: 00:00.0 |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| PCI: 00:02.0 read_resources bus 1 link: 0 |
| PCI: 00:02.0 read_resources bus 1 link: 0 done |
| PCI: 00:04.0 read_resources bus 2 link: 0 |
| PCI: 00:04.0 read_resources bus 2 link: 0 done |
| PCI: 00:09.0 read_resources bus 3 link: 0 |
| PCI: 00:09.0 read_resources bus 3 link: 0 done |
| PCI: 00:0a.0 read_resources bus 4 link: 0 |
| PCI: 00:0a.0 read_resources bus 4 link: 0 done |
| PCI: 00:0b.0 read_resources bus 5 link: 0 |
| PCI: 00:0b.0 read_resources bus 5 link: 0 done |
| PCI: 00:0c.0 read_resources bus 6 link: 0 |
| PCI: 00:0c.0 read_resources bus 6 link: 0 done |
| PCI: 00:0d.0 read_resources bus 7 link: 0 |
| PCI: 00:0d.0 read_resources bus 7 link: 0 done |
| PCI: 00:14.0 read_resources bus 1 link: 0 |
| I2C: 01:50 missing read_resources |
| I2C: 01:51 missing read_resources |
| I2C: 01:52 missing read_resources |
| I2C: 01:53 missing read_resources |
| I2C: 01:54 missing read_resources |
| I2C: 01:55 missing read_resources |
| I2C: 01:56 missing read_resources |
| I2C: 01:57 missing read_resources |
| PCI: 00:14.0 read_resources bus 1 link: 0 done |
| PCI: 00:14.3 read_resources bus 0 link: 0 |
| PNP: 0ca2.0 missing read_resources |
| PCI: 00:14.3 read_resources bus 0 link: 0 done |
| PCI: 00:14.4 read_resources bus 8 link: 0 |
| PCI: 00:14.4 read_resources bus 8 link: 0 done |
| PCI: 00:18.0 read_resources bus 0 link: 1 done |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| PCI: 00:18.4 read_resources bus 0 link: 0 |
| PCI: 00:18.4 read_resources bus 0 link: 0 done |
| PCI: 00:18.4 read_resources bus 0 link: 1 |
| PCI: 00:18.4 read_resources bus 0 link: 1 done |
| PCI: 00:18.4 read_resources bus 0 link: 2 |
| PCI: 00:18.4 read_resources bus 0 link: 2 done |
| PCI: 00:18.4 read_resources bus 0 link: 3 |
| PCI: 00:18.4 read_resources bus 0 link: 3 done |
| PCI: 00:19.0 read_resources bus 0 link: 3 |
| PCI: 00:19.0 read_resources bus 0 link: 3 done |
| PCI: 00:19.0 read_resources bus 0 link: 2 |
| PCI: 00:19.0 read_resources bus 0 link: 2 done |
| PCI: 00:19.0 read_resources bus 0 link: 0 |
| PCI: 00:19.0 read_resources bus 0 link: 0 done |
| PCI: 00:19.0 read_resources bus 0 link: 1 |
| PCI: 00:19.0 read_resources bus 0 link: 1 done |
| PCI: 00:19.4 read_resources bus 0 link: 0 |
| PCI: 00:19.4 read_resources bus 0 link: 0 done |
| PCI: 00:19.4 read_resources bus 0 link: 1 |
| PCI: 00:19.4 read_resources bus 0 link: 1 done |
| PCI: 00:19.4 read_resources bus 0 link: 2 |
| PCI: 00:19.4 read_resources bus 0 link: 2 done |
| PCI: 00:19.4 read_resources bus 0 link: 3 |
| PCI: 00:19.4 read_resources bus 0 link: 3 done |
| PCI: 00:1a.0 read_resources bus 0 link: 3 |
| PCI: 00:1a.0 read_resources bus 0 link: 3 done |
| PCI: 00:1a.0 read_resources bus 0 link: 2 |
| PCI: 00:1a.0 read_resources bus 0 link: 2 done |
| PCI: 00:1a.0 read_resources bus 0 link: 0 |
| PCI: 00:1a.0 read_resources bus 0 link: 0 done |
| PCI: 00:1a.0 read_resources bus 0 link: 1 |
| PCI: 00:1a.0 read_resources bus 0 link: 1 done |
| PCI: 00:1a.4 read_resources bus 0 link: 0 |
| PCI: 00:1a.4 read_resources bus 0 link: 0 done |
| PCI: 00:1a.4 read_resources bus 0 link: 1 |
| PCI: 00:1a.4 read_resources bus 0 link: 1 done |
| PCI: 00:1a.4 read_resources bus 0 link: 2 |
| PCI: 00:1a.4 read_resources bus 0 link: 2 done |
| PCI: 00:1a.4 read_resources bus 0 link: 3 |
| PCI: 00:1a.4 read_resources bus 0 link: 3 done |
| PCI: 00:1b.0 read_resources bus 0 link: 3 |
| PCI: 00:1b.0 read_resources bus 0 link: 3 done |
| PCI: 00:1b.0 read_resources bus 0 link: 2 |
| PCI: 00:1b.0 read_resources bus 0 link: 2 done |
| PCI: 00:1b.0 read_resources bus 0 link: 0 |
| PCI: 00:1b.0 read_resources bus 0 link: 0 done |
| PCI: 00:1b.0 read_resources bus 0 link: 1 |
| PCI: 00:1b.0 read_resources bus 0 link: 1 done |
| PCI: 00:1b.4 read_resources bus 0 link: 0 |
| PCI: 00:1b.4 read_resources bus 0 link: 0 done |
| PCI: 00:1b.4 read_resources bus 0 link: 1 |
| PCI: 00:1b.4 read_resources bus 0 link: 1 done |
| PCI: 00:1b.4 read_resources bus 0 link: 2 |
| PCI: 00:1b.4 read_resources bus 0 link: 2 done |
| PCI: 00:1b.4 read_resources bus 0 link: 3 |
| PCI: 00:1b.4 read_resources bus 0 link: 3 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 done |
| Root Device read_resources bus 0 link: 0 done |
| Done reading resources. |
| Show resources in subtree (Root Device)...After reading. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: 01 |
| APIC: 02 |
| APIC: 03 |
| APIC: 04 |
| APIC: 05 |
| APIC: 06 |
| APIC: 07 |
| APIC: 08 |
| APIC: 09 |
| APIC: 0a |
| APIC: 0b |
| APIC: 0c |
| APIC: 0d |
| APIC: 0e |
| APIC: 0f |
| APIC: 20 |
| APIC: 21 |
| APIC: 22 |
| APIC: 23 |
| APIC: 24 |
| APIC: 25 |
| APIC: 26 |
| APIC: 27 |
| APIC: 28 |
| APIC: 29 |
| APIC: 2a |
| APIC: 2b |
| APIC: 2c |
| APIC: 2d |
| APIC: 2e |
| APIC: 2f |
| DOMAIN: 0000 child on link 0 PCI: 00:18.0 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 |
| DOMAIN: 0000 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 |
| DOMAIN: 0000 resource base 0 size c0000000 align 0 gran 0 limit 0 flags e0004200 index 7 |
| PCI: 00:18.0 |
| PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 110b0 |
| PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 80200 index 110b8 |
| PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 110d8 |
| PCI: 00:00.0 |
| PCI: 00:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 1200 index fc |
| PCI: 00:00.2 |
| PCI: 00:00.2 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 10000200 index 44 |
| PCI: 00:02.0 child on link 0 PCI: 01:00.0 |
| PCI: 00:02.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c |
| PCI: 00:02.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:02.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 01:00.0 |
| PCI: 01:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 10 |
| PCI: 01:00.0 resource base 0 size 200000 align 21 gran 21 limit ffffffffffffffff flags 1201 index 18 |
| PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 20 |
| PCI: 01:00.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 24 |
| PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 index 30 |
| PCI: 01:00.1 |
| PCI: 01:00.1 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:04.0 |
| PCI: 00:04.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c |
| PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 00:09.0 child on link 0 PCI: 03:00.0 |
| PCI: 00:09.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c |
| PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 03:00.0 |
| PCI: 03:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 |
| PCI: 03:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 |
| PCI: 03:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 1c |
| PCI: 00:0a.0 child on link 0 PCI: 04:00.0 |
| PCI: 00:0a.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c |
| PCI: 00:0a.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:0a.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 04:00.0 |
| PCI: 04:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 |
| PCI: 04:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 |
| PCI: 04:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 1c |
| PCI: 00:0b.0 child on link 0 PCI: 05:00.0 |
| PCI: 00:0b.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c |
| PCI: 00:0b.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:0b.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 05:00.0 |
| PCI: 05:00.0 resource base 0 size 2000000 align 25 gran 25 limit ffffffffffffffff flags 201 index 10 |
| PCI: 05:00.1 |
| PCI: 05:00.1 resource base 0 size 2000000 align 25 gran 25 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:0c.0 child on link 0 PCI: 06:00.0 |
| PCI: 00:0c.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c |
| PCI: 00:0c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:0c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 06:00.0 |
| PCI: 06:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 |
| PCI: 06:00.0 resource base 0 size 200000 align 21 gran 21 limit ffffffffffffffff flags 201 index 18 |
| PCI: 06:00.0 resource base 0 size 4000000 align 26 gran 26 limit ffffffffffffffff flags 201 index 20 |
| PCI: 00:0d.0 |
| PCI: 00:0d.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c |
| PCI: 00:0d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:0d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 00:11.0 |
| PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 |
| PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 |
| PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 |
| PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c |
| PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 |
| PCI: 00:11.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 24 |
| PCI: 00:12.0 |
| PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 |
| PCI: 00:12.1 |
| PCI: 00:12.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 |
| PCI: 00:12.2 |
| PCI: 00:12.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| PCI: 00:13.0 |
| PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 |
| PCI: 00:13.1 |
| PCI: 00:13.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 |
| PCI: 00:13.2 |
| PCI: 00:13.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| PCI: 00:14.0 child on link 0 I2C: 01:50 |
| PCI: 00:14.0 resource base fec00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 74 |
| PCI: 00:14.0 resource base feb00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 9c |
| PCI: 00:14.0 resource base fed00000 size 400 align 8 gran 8 limit ffffffff flags d0000200 index b4 |
| PCI: 00:14.0 resource base b00 size 10 align 8 gran 8 limit ffff flags d0000100 index 90 |
| PCI: 00:14.0 resource base b20 size 10 align 8 gran 8 limit ffff flags d0000100 index 58 |
| I2C: 01:50 |
| I2C: 01:51 |
| I2C: 01:52 |
| I2C: 01:53 |
| I2C: 01:54 |
| I2C: 01:55 |
| I2C: 01:56 |
| I2C: 01:57 |
| I2C: 01:2f |
| PCI: 00:14.1 |
| PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 |
| PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 |
| PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 |
| PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c |
| PCI: 00:14.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 |
| PCI: 00:14.2 |
| PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:14.3 child on link 0 PNP: 002e.0 |
| PCI: 00:14.3 resource base 0 size 1 align 12 gran 0 limit ffffffff flags 200 index a0 |
| PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PNP: 002e.0 |
| PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60 |
| PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 |
| PNP: 002e.1 |
| PNP: 002e.1 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60 |
| PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 |
| PNP: 002e.2 |
| PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60 |
| PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.3 |
| PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60 |
| PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.5 |
| PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit fff flags c0000100 index 60 |
| PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit fff flags c0000100 index 62 |
| PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72 |
| PNP: 002e.106 |
| PNP: 002e.106 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 62 |
| PNP: 002e.107 |
| PNP: 002e.207 |
| PNP: 002e.307 |
| PNP: 002e.407 |
| PNP: 002e.8 |
| PNP: 002e.108 |
| PNP: 002e.9 |
| PNP: 002e.109 |
| PNP: 002e.209 |
| PNP: 002e.309 |
| PNP: 002e.a |
| PNP: 002e.b |
| PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit fff flags c0000100 index 60 |
| PNP: 002e.b resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 002e.c |
| PNP: 002e.d |
| PNP: 002e.f |
| PNP: 004e.0 |
| PNP: 004e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 004e.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0 |
| PNP: 0ca2.0 |
| PNP: 0ca2.0 resource base ca2 size 1 align 0 gran 0 limit 0 flags c0000100 index ca2 |
| PCI: 00:14.4 child on link 0 PCI: 08:01.0 |
| PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24 |
| PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 08:01.0 |
| PCI: 08:01.0 resource base 0 size 800000 align 23 gran 23 limit ffffffff flags 200 index 10 |
| PCI: 08:01.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 14 |
| PCI: 08:01.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 18 |
| PCI: 00:14.5 |
| PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 |
| PCI: 00:18.1 |
| PCI: 00:18.2 |
| PCI: 00:18.3 |
| PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 200 index 94 |
| PCI: 00:18.4 |
| PCI: 00:18.5 |
| PCI: 00:19.0 |
| PCI: 00:19.1 |
| PCI: 00:19.2 |
| PCI: 00:19.3 |
| PCI: 00:19.4 |
| PCI: 00:19.5 |
| PCI: 00:1a.0 |
| PCI: 00:1a.1 |
| PCI: 00:1a.2 |
| PCI: 00:1a.3 |
| PCI: 00:1a.4 |
| PCI: 00:1a.5 |
| PCI: 00:1b.0 |
| PCI: 00:1b.1 |
| PCI: 00:1b.2 |
| PCI: 00:1b.3 |
| PCI: 00:1b.4 |
| PCI: 00:1b.5 |
| DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff |
| PCI: 00:18.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:02.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff |
| PCI: 01:00.0 20 * [0x0 - 0xff] io |
| PCI: 00:02.0 io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:04.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff |
| PCI: 00:04.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done |
| PCI: 00:09.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff |
| PCI: 03:00.0 18 * [0x0 - 0x1f] io |
| PCI: 00:09.0 io: base: 20 size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:0a.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff |
| PCI: 04:00.0 18 * [0x0 - 0x1f] io |
| PCI: 00:0a.0 io: base: 20 size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:0b.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff |
| PCI: 00:0b.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done |
| PCI: 00:0c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff |
| PCI: 00:0c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done |
| PCI: 00:0d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff |
| PCI: 00:0d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done |
| PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 08:01.0 18 * [0x0 - 0x7f] io |
| PCI: 00:14.4 io: base: 80 size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:02.0 1c * [0x0 - 0xfff] io |
| PCI: 00:09.0 1c * [0x1000 - 0x1fff] io |
| PCI: 00:0a.0 1c * [0x2000 - 0x2fff] io |
| PCI: 00:14.4 1c * [0x3000 - 0x3fff] io |
| PCI: 00:11.0 20 * [0x4000 - 0x400f] io |
| PCI: 00:14.1 20 * [0x4010 - 0x401f] io |
| PCI: 00:11.0 10 * [0x4020 - 0x4027] io |
| PCI: 00:11.0 18 * [0x4028 - 0x402f] io |
| PCI: 00:14.1 10 * [0x4030 - 0x4037] io |
| PCI: 00:14.1 18 * [0x4038 - 0x403f] io |
| PCI: 00:11.0 14 * [0x4040 - 0x4043] io |
| PCI: 00:11.0 1c * [0x4044 - 0x4047] io |
| PCI: 00:14.1 14 * [0x4048 - 0x404b] io |
| PCI: 00:14.1 1c * [0x404c - 0x404f] io |
| PCI: 00:18.0 io: base: 4050 size: 5000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:18.0 110d8 * [0x0 - 0x4fff] io |
| DOMAIN: 0000 io: base: 5000 size: 5000 align: 12 gran: 0 limit: ffff done |
| DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff |
| PCI: 00:18.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff |
| PCI: 00:02.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 01:00.0 10 * [0x0 - 0xfffffff] prefmem |
| PCI: 01:00.0 18 * [0x10000000 - 0x101fffff] prefmem |
| PCI: 00:02.0 prefmem: base: 10200000 size: 10200000 align: 28 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:04.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:04.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:09.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:09.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:0a.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:0a.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:0b.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:0b.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:0c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:0c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:0d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:0d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:02.0 24 * [0x0 - 0x101fffff] prefmem |
| PCI: 00:00.0 fc * [0x10200000 - 0x102000ff] prefmem |
| PCI: 00:18.0 prefmem: base: 10200100 size: 10300000 align: 28 gran: 20 limit: ffffffff done |
| PCI: 00:18.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff |
| PCI: 00:02.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 01:00.0 24 * [0x0 - 0x3ffff] mem |
| PCI: 01:00.0 30 * [0x40000 - 0x5ffff] mem |
| PCI: 01:00.1 10 * [0x60000 - 0x63fff] mem |
| PCI: 00:02.0 mem: base: 64000 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:04.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 00:04.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:09.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 03:00.0 10 * [0x0 - 0x1ffff] mem |
| PCI: 03:00.0 1c * [0x20000 - 0x23fff] mem |
| PCI: 00:09.0 mem: base: 24000 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:0a.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 04:00.0 10 * [0x0 - 0x1ffff] mem |
| PCI: 04:00.0 1c * [0x20000 - 0x23fff] mem |
| PCI: 00:0a.0 mem: base: 24000 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:0b.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 05:00.0 10 * [0x0 - 0x1ffffff] mem |
| PCI: 05:00.1 10 * [0x2000000 - 0x3ffffff] mem |
| PCI: 00:0b.0 mem: base: 4000000 size: 4000000 align: 25 gran: 20 limit: ffffffff done |
| PCI: 00:0c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 06:00.0 20 * [0x0 - 0x3ffffff] mem |
| PCI: 06:00.0 18 * [0x4000000 - 0x41fffff] mem |
| PCI: 06:00.0 10 * [0x4200000 - 0x420ffff] mem |
| PCI: 00:0c.0 mem: base: 4210000 size: 4300000 align: 26 gran: 20 limit: ffffffff done |
| PCI: 00:0d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 00:0d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 08:01.0 10 * [0x0 - 0x7fffff] mem |
| PCI: 08:01.0 14 * [0x800000 - 0x81ffff] mem |
| PCI: 00:14.4 mem: base: 820000 size: 900000 align: 23 gran: 20 limit: ffffffff done |
| PCI: 00:0c.0 20 * [0x0 - 0x42fffff] mem |
| PCI: 00:0b.0 20 * [0x6000000 - 0x9ffffff] mem |
| PCI: 00:14.4 20 * [0xa000000 - 0xa8fffff] mem |
| PCI: 00:02.0 20 * [0xa900000 - 0xa9fffff] mem |
| PCI: 00:09.0 20 * [0xaa00000 - 0xaafffff] mem |
| PCI: 00:0a.0 20 * [0xab00000 - 0xabfffff] mem |
| PCI: 00:00.2 44 * [0xac00000 - 0xac03fff] mem |
| PCI: 00:14.2 10 * [0xac04000 - 0xac07fff] mem |
| PCI: 00:12.0 10 * [0xac08000 - 0xac08fff] mem |
| PCI: 00:12.1 10 * [0xac09000 - 0xac09fff] mem |
| PCI: 00:13.0 10 * [0xac0a000 - 0xac0afff] mem |
| PCI: 00:13.1 10 * [0xac0b000 - 0xac0bfff] mem |
| PCI: 00:14.5 10 * [0xac0c000 - 0xac0cfff] mem |
| PCI: 00:11.0 24 * [0xac0d000 - 0xac0d3ff] mem |
| PCI: 00:12.2 10 * [0xac0e000 - 0xac0e0ff] mem |
| PCI: 00:13.2 10 * [0xac0f000 - 0xac0f0ff] mem |
| PCI: 00:14.3 a0 * [0xac10000 - 0xac10000] mem |
| PCI: 00:18.0 mem: base: ac10001 size: ad00000 align: 26 gran: 20 limit: ffffffff done |
| PCI: 00:18.0 110b0 * [0x0 - 0x102fffff] prefmem |
| PCI: 00:18.0 110b8 * [0x14000000 - 0x1ecfffff] mem |
| PCI: 00:18.3 94 * [0x20000000 - 0x23ffffff] mem |
| DOMAIN: 0000 mem: base: 24000000 size: 24000000 align: 28 gran: 0 limit: ffffffff done |
| avoid_fixed_resources: DOMAIN: 0000 |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff |
| constrain_resources: DOMAIN: 0000 c0010058 base c0000000 limit cfffffff mem (fixed) |
| constrain_resources: DOMAIN: 0000 07 base 00000000 limit bfffffff mem (fixed) |
| constrain_resources: PCI: 00:14.0 74 base fec00000 limit fec00fff mem (fixed) |
| constrain_resources: PCI: 00:14.0 9c base feb00000 limit feb00fff mem (fixed) |
| constrain_resources: PCI: 00:14.0 90 base 00000b00 limit 00000b0f io (fixed) |
| constrain_resources: PCI: 00:14.0 58 base 00000b20 limit 00000b2f io (fixed) |
| constrain_resources: PCI: 00:14.3 10000000 base 00000000 limit 00000fff io (fixed) |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 base d0000000 limit feafffff |
| Setting resources... |
| DOMAIN: 0000 io: base:1000 size:5000 align:12 gran:0 limit:ffff |
| PCI: 00:18.0 110d8 * [0x1000 - 0x5fff] io |
| DOMAIN: 0000 io: next_base: 6000 size: 5000 align: 12 gran: 0 done |
| PCI: 00:18.0 io: base:1000 size:5000 align:12 gran:12 limit:5fff |
| PCI: 00:02.0 1c * [0x1000 - 0x1fff] io |
| PCI: 00:09.0 1c * [0x2000 - 0x2fff] io |
| PCI: 00:0a.0 1c * [0x3000 - 0x3fff] io |
| PCI: 00:14.4 1c * [0x4000 - 0x4fff] io |
| PCI: 00:11.0 20 * [0x5000 - 0x500f] io |
| PCI: 00:14.1 20 * [0x5010 - 0x501f] io |
| PCI: 00:11.0 10 * [0x5020 - 0x5027] io |
| PCI: 00:11.0 18 * [0x5028 - 0x502f] io |
| PCI: 00:14.1 10 * [0x5030 - 0x5037] io |
| PCI: 00:14.1 18 * [0x5038 - 0x503f] io |
| PCI: 00:11.0 14 * [0x5040 - 0x5043] io |
| PCI: 00:11.0 1c * [0x5044 - 0x5047] io |
| PCI: 00:14.1 14 * [0x5048 - 0x504b] io |
| PCI: 00:14.1 1c * [0x504c - 0x504f] io |
| PCI: 00:18.0 io: next_base: 5050 size: 5000 align: 12 gran: 12 done |
| PCI: 00:02.0 io: base:1000 size:1000 align:12 gran:12 limit:1fff |
| PCI: 01:00.0 20 * [0x1000 - 0x10ff] io |
| PCI: 00:02.0 io: next_base: 1100 size: 1000 align: 12 gran: 12 done |
| PCI: 00:04.0 io: base:5fff size:0 align:12 gran:12 limit:5fff |
| PCI: 00:04.0 io: next_base: 5fff size: 0 align: 12 gran: 12 done |
| PCI: 00:09.0 io: base:2000 size:1000 align:12 gran:12 limit:2fff |
| PCI: 03:00.0 18 * [0x2000 - 0x201f] io |
| PCI: 00:09.0 io: next_base: 2020 size: 1000 align: 12 gran: 12 done |
| PCI: 00:0a.0 io: base:3000 size:1000 align:12 gran:12 limit:3fff |
| PCI: 04:00.0 18 * [0x3000 - 0x301f] io |
| PCI: 00:0a.0 io: next_base: 3020 size: 1000 align: 12 gran: 12 done |
| PCI: 00:0b.0 io: base:5fff size:0 align:12 gran:12 limit:5fff |
| PCI: 00:0b.0 io: next_base: 5fff size: 0 align: 12 gran: 12 done |
| PCI: 00:0c.0 io: base:5fff size:0 align:12 gran:12 limit:5fff |
| PCI: 00:0c.0 io: next_base: 5fff size: 0 align: 12 gran: 12 done |
| PCI: 00:0d.0 io: base:5fff size:0 align:12 gran:12 limit:5fff |
| PCI: 00:0d.0 io: next_base: 5fff size: 0 align: 12 gran: 12 done |
| PCI: 00:14.4 io: base:4000 size:1000 align:12 gran:12 limit:4fff |
| PCI: 08:01.0 18 * [0x4000 - 0x407f] io |
| PCI: 00:14.4 io: next_base: 4080 size: 1000 align: 12 gran: 12 done |
| DOMAIN: 0000 mem: base:d0000000 size:24000000 align:28 gran:0 limit:feafffff |
| PCI: 00:18.0 110b0 * [0xd0000000 - 0xe02fffff] prefmem |
| PCI: 00:18.0 110b8 * [0xe4000000 - 0xeecfffff] mem |
| PCI: 00:18.3 94 * [0xf0000000 - 0xf3ffffff] mem |
| DOMAIN: 0000 mem: next_base: f4000000 size: 24000000 align: 28 gran: 0 done |
| PCI: 00:18.0 prefmem: base:d0000000 size:10300000 align:28 gran:20 limit:e02fffff |
| PCI: 00:02.0 24 * [0xd0000000 - 0xe01fffff] prefmem |
| PCI: 00:00.0 fc * [0xe0200000 - 0xe02000ff] prefmem |
| PCI: 00:18.0 prefmem: next_base: e0200100 size: 10300000 align: 28 gran: 20 done |
| PCI: 00:02.0 prefmem: base:d0000000 size:10200000 align:28 gran:20 limit:e01fffff |
| PCI: 01:00.0 10 * [0xd0000000 - 0xdfffffff] prefmem |
| PCI: 01:00.0 18 * [0xe0000000 - 0xe01fffff] prefmem |
| PCI: 00:02.0 prefmem: next_base: e0200000 size: 10200000 align: 28 gran: 20 done |
| PCI: 00:04.0 prefmem: base:e02fffff size:0 align:20 gran:20 limit:e02fffff |
| PCI: 00:04.0 prefmem: next_base: e02fffff size: 0 align: 20 gran: 20 done |
| PCI: 00:09.0 prefmem: base:e02fffff size:0 align:20 gran:20 limit:e02fffff |
| PCI: 00:09.0 prefmem: next_base: e02fffff size: 0 align: 20 gran: 20 done |
| PCI: 00:0a.0 prefmem: base:e02fffff size:0 align:20 gran:20 limit:e02fffff |
| PCI: 00:0a.0 prefmem: next_base: e02fffff size: 0 align: 20 gran: 20 done |
| PCI: 00:0b.0 prefmem: base:e02fffff size:0 align:20 gran:20 limit:e02fffff |
| PCI: 00:0b.0 prefmem: next_base: e02fffff size: 0 align: 20 gran: 20 done |
| PCI: 00:0c.0 prefmem: base:e02fffff size:0 align:20 gran:20 limit:e02fffff |
| PCI: 00:0c.0 prefmem: next_base: e02fffff size: 0 align: 20 gran: 20 done |
| PCI: 00:0d.0 prefmem: base:e02fffff size:0 align:20 gran:20 limit:e02fffff |
| PCI: 00:0d.0 prefmem: next_base: e02fffff size: 0 align: 20 gran: 20 done |
| PCI: 00:14.4 prefmem: base:e02fffff size:0 align:20 gran:20 limit:e02fffff |
| PCI: 00:14.4 prefmem: next_base: e02fffff size: 0 align: 20 gran: 20 done |
| PCI: 00:18.0 mem: base:e4000000 size:ad00000 align:26 gran:20 limit:eecfffff |
| PCI: 00:0c.0 20 * [0xe4000000 - 0xe82fffff] mem |
| PCI: 00:0b.0 20 * [0xea000000 - 0xedffffff] mem |
| PCI: 00:14.4 20 * [0xee000000 - 0xee8fffff] mem |
| PCI: 00:02.0 20 * [0xee900000 - 0xee9fffff] mem |
| PCI: 00:09.0 20 * [0xeea00000 - 0xeeafffff] mem |
| PCI: 00:0a.0 20 * [0xeeb00000 - 0xeebfffff] mem |
| PCI: 00:00.2 44 * [0xeec00000 - 0xeec03fff] mem |
| PCI: 00:14.2 10 * [0xeec04000 - 0xeec07fff] mem |
| PCI: 00:12.0 10 * [0xeec08000 - 0xeec08fff] mem |
| PCI: 00:12.1 10 * [0xeec09000 - 0xeec09fff] mem |
| PCI: 00:13.0 10 * [0xeec0a000 - 0xeec0afff] mem |
| PCI: 00:13.1 10 * [0xeec0b000 - 0xeec0bfff] mem |
| PCI: 00:14.5 10 * [0xeec0c000 - 0xeec0cfff] mem |
| PCI: 00:11.0 24 * [0xeec0d000 - 0xeec0d3ff] mem |
| PCI: 00:12.2 10 * [0xeec0e000 - 0xeec0e0ff] mem |
| PCI: 00:13.2 10 * [0xeec0f000 - 0xeec0f0ff] mem |
| PCI: 00:14.3 a0 * [0xeec10000 - 0xeec10000] mem |
| PCI: 00:18.0 mem: next_base: eec10001 size: ad00000 align: 26 gran: 20 done |
| PCI: 00:02.0 mem: base:ee900000 size:100000 align:20 gran:20 limit:ee9fffff |
| PCI: 01:00.0 24 * [0xee900000 - 0xee93ffff] mem |
| PCI: 01:00.0 30 * [0xee940000 - 0xee95ffff] mem |
| PCI: 01:00.1 10 * [0xee960000 - 0xee963fff] mem |
| PCI: 00:02.0 mem: next_base: ee964000 size: 100000 align: 20 gran: 20 done |
| PCI: 00:04.0 mem: base:eecfffff size:0 align:20 gran:20 limit:eecfffff |
| PCI: 00:04.0 mem: next_base: eecfffff size: 0 align: 20 gran: 20 done |
| PCI: 00:09.0 mem: base:eea00000 size:100000 align:20 gran:20 limit:eeafffff |
| PCI: 03:00.0 10 * [0xeea00000 - 0xeea1ffff] mem |
| PCI: 03:00.0 1c * [0xeea20000 - 0xeea23fff] mem |
| PCI: 00:09.0 mem: next_base: eea24000 size: 100000 align: 20 gran: 20 done |
| PCI: 00:0a.0 mem: base:eeb00000 size:100000 align:20 gran:20 limit:eebfffff |
| PCI: 04:00.0 10 * [0xeeb00000 - 0xeeb1ffff] mem |
| PCI: 04:00.0 1c * [0xeeb20000 - 0xeeb23fff] mem |
| PCI: 00:0a.0 mem: next_base: eeb24000 size: 100000 align: 20 gran: 20 done |
| PCI: 00:0b.0 mem: base:ea000000 size:4000000 align:25 gran:20 limit:edffffff |
| PCI: 05:00.0 10 * [0xea000000 - 0xebffffff] mem |
| PCI: 05:00.1 10 * [0xec000000 - 0xedffffff] mem |
| PCI: 00:0b.0 mem: next_base: ee000000 size: 4000000 align: 25 gran: 20 done |
| PCI: 00:0c.0 mem: base:e4000000 size:4300000 align:26 gran:20 limit:e82fffff |
| PCI: 06:00.0 20 * [0xe4000000 - 0xe7ffffff] mem |
| PCI: 06:00.0 18 * [0xe8000000 - 0xe81fffff] mem |
| PCI: 06:00.0 10 * [0xe8200000 - 0xe820ffff] mem |
| PCI: 00:0c.0 mem: next_base: e8210000 size: 4300000 align: 26 gran: 20 done |
| PCI: 00:0d.0 mem: base:eecfffff size:0 align:20 gran:20 limit:eecfffff |
| PCI: 00:0d.0 mem: next_base: eecfffff size: 0 align: 20 gran: 20 done |
| PCI: 00:14.4 mem: base:ee000000 size:900000 align:23 gran:20 limit:ee8fffff |
| PCI: 08:01.0 10 * [0xee000000 - 0xee7fffff] mem |
| PCI: 08:01.0 14 * [0xee800000 - 0xee81ffff] mem |
| PCI: 00:14.4 mem: next_base: ee820000 size: 900000 align: 23 gran: 20 done |
| Root Device assign_resources, bus 0 link: 0 |
| 0: mmio_basek=00300000, basek=00400000, limitk=01100000 |
| 1: mmio_basek=00300000, basek=01100000, limitk=02100000 |
| 2: mmio_basek=00300000, basek=02100000, limitk=03100000 |
| 3: mmio_basek=00300000, basek=03100000, limitk=04100000 |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| VGA: PCI: 00:18.0 (aka node 0) link 1 has VGA device |
| PCI: 00:18.0 111b8 <- [0x00000a0000 - 0x00000bffff] size 0x00020000 gran 0x00 mem <node 0 link 1> |
| PCI: 00:18.0 110b0 <- [0x00d0000000 - 0x00e02fffff] size 0x10300000 gran 0x14 prefmem <node 0 link 1> |
| PCI: 00:18.0 110b8 <- [0x00e4000000 - 0x00eecfffff] size 0x0ad00000 gran 0x14 mem <node 0 link 1> |
| PCI: 00:18.0 110d8 <- [0x0000001000 - 0x0000005fff] size 0x00005000 gran 0x0c io <node 0 link 1> |
| PCI: 00:18.0 assign_resources, bus 0 link: 1 |
| PCI: 00:00.0 sr5690_set_resources |
| sr5690_set_resources: PCI: 00:00.0[0x1c] base = c0000000 limit = cfffffff |
| PCI: 00:00.0 c0010058 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x00 mem <mmconfig> |
| sr5690_set_resources: PCI: 00:18.1 <- index a8 base c00003 limit cfff90 |
| PCI: 00:00.0 fc <- [0x00e0200000 - 0x00e02000ff] size 0x00000100 gran 0x08 prefmem |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| PCI: 00:00.2 44 <- [0x00eec00000 - 0x00eec03fff] size 0x00004000 gran 0x0e mem |
| PCI: 00:02.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io |
| PCI: 00:02.0 24 <- [0x00d0000000 - 0x00e01fffff] size 0x10200000 gran 0x14 bus 01 prefmem |
| PCI: 00:02.0 20 <- [0x00ee900000 - 0x00ee9fffff] size 0x00100000 gran 0x14 bus 01 mem |
| PCI: 00:02.0 assign_resources, bus 1 link: 0 |
| PCI: 01:00.0 10 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64 |
| PCI: 01:00.0 18 <- [0x00e0000000 - 0x00e01fffff] size 0x00200000 gran 0x15 prefmem64 |
| PCI: 01:00.0 20 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io |
| PCI: 01:00.0 24 <- [0x00ee900000 - 0x00ee93ffff] size 0x00040000 gran 0x12 mem |
| PCI: 01:00.0 30 <- [0x00ee940000 - 0x00ee95ffff] size 0x00020000 gran 0x11 romem |
| PCI: 01:00.1 10 <- [0x00ee960000 - 0x00ee963fff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:02.0 assign_resources, bus 1 link: 0 |
| PCI: 00:04.0 1c <- [0x0000005fff - 0x0000005ffe] size 0x00000000 gran 0x0c bus 02 io |
| PCI: 00:04.0 24 <- [0x00e02fffff - 0x00e02ffffe] size 0x00000000 gran 0x14 bus 02 prefmem |
| PCI: 00:04.0 20 <- [0x00eecfffff - 0x00eecffffe] size 0x00000000 gran 0x14 bus 02 mem |
| PCI: 00:09.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 03 io |
| PCI: 00:09.0 24 <- [0x00e02fffff - 0x00e02ffffe] size 0x00000000 gran 0x14 bus 03 prefmem |
| PCI: 00:09.0 20 <- [0x00eea00000 - 0x00eeafffff] size 0x00100000 gran 0x14 bus 03 mem |
| PCI: 00:09.0 assign_resources, bus 3 link: 0 |
| PCI: 03:00.0 10 <- [0x00eea00000 - 0x00eea1ffff] size 0x00020000 gran 0x11 mem |
| PCI: 03:00.0 18 <- [0x0000002000 - 0x000000201f] size 0x00000020 gran 0x05 io |
| PCI: 03:00.0 1c <- [0x00eea20000 - 0x00eea23fff] size 0x00004000 gran 0x0e mem |
| PCI: 00:09.0 assign_resources, bus 3 link: 0 |
| PCI: 00:0a.0 1c <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x0c bus 04 io |
| PCI: 00:0a.0 24 <- [0x00e02fffff - 0x00e02ffffe] size 0x00000000 gran 0x14 bus 04 prefmem |
| PCI: 00:0a.0 20 <- [0x00eeb00000 - 0x00eebfffff] size 0x00100000 gran 0x14 bus 04 mem |
| PCI: 00:0a.0 assign_resources, bus 4 link: 0 |
| PCI: 04:00.0 10 <- [0x00eeb00000 - 0x00eeb1ffff] size 0x00020000 gran 0x11 mem |
| PCI: 04:00.0 18 <- [0x0000003000 - 0x000000301f] size 0x00000020 gran 0x05 io |
| PCI: 04:00.0 1c <- [0x00eeb20000 - 0x00eeb23fff] size 0x00004000 gran 0x0e mem |
| PCI: 00:0a.0 assign_resources, bus 4 link: 0 |
| PCI: 00:0b.0 1c <- [0x0000005fff - 0x0000005ffe] size 0x00000000 gran 0x0c bus 05 io |
| PCI: 00:0b.0 24 <- [0x00e02fffff - 0x00e02ffffe] size 0x00000000 gran 0x14 bus 05 prefmem |
| PCI: 00:0b.0 20 <- [0x00ea000000 - 0x00edffffff] size 0x04000000 gran 0x14 bus 05 mem |
| PCI: 00:0b.0 assign_resources, bus 5 link: 0 |
| PCI: 05:00.0 10 <- [0x00ea000000 - 0x00ebffffff] size 0x02000000 gran 0x19 mem64 |
| PCI: 05:00.1 10 <- [0x00ec000000 - 0x00edffffff] size 0x02000000 gran 0x19 mem64 |
| PCI: 00:0b.0 assign_resources, bus 5 link: 0 |
| PCI: 00:0c.0 1c <- [0x0000005fff - 0x0000005ffe] size 0x00000000 gran 0x0c bus 06 io |
| PCI: 00:0c.0 24 <- [0x00e02fffff - 0x00e02ffffe] size 0x00000000 gran 0x14 bus 06 prefmem |
| PCI: 00:0c.0 20 <- [0x00e4000000 - 0x00e82fffff] size 0x04300000 gran 0x14 bus 06 mem |
| PCI: 00:0c.0 assign_resources, bus 6 link: 0 |
| PCI: 06:00.0 10 <- [0x00e8200000 - 0x00e820ffff] size 0x00010000 gran 0x10 mem64 |
| PCI: 06:00.0 18 <- [0x00e8000000 - 0x00e81fffff] size 0x00200000 gran 0x15 mem64 |
| PCI: 06:00.0 20 <- [0x00e4000000 - 0x00e7ffffff] size 0x04000000 gran 0x1a mem64 |
| PCI: 00:0c.0 assign_resources, bus 6 link: 0 |
| PCI: 00:0d.0 1c <- [0x0000005fff - 0x0000005ffe] size 0x00000000 gran 0x0c bus 07 io |
| PCI: 00:0d.0 24 <- [0x00e02fffff - 0x00e02ffffe] size 0x00000000 gran 0x14 bus 07 prefmem |
| PCI: 00:0d.0 20 <- [0x00eecfffff - 0x00eecffffe] size 0x00000000 gran 0x14 bus 07 mem |
| PCI: 00:11.0 10 <- [0x0000005020 - 0x0000005027] size 0x00000008 gran 0x03 io |
| PCI: 00:11.0 14 <- [0x0000005040 - 0x0000005043] size 0x00000004 gran 0x02 io |
| PCI: 00:11.0 18 <- [0x0000005028 - 0x000000502f] size 0x00000008 gran 0x03 io |
| PCI: 00:11.0 1c <- [0x0000005044 - 0x0000005047] size 0x00000004 gran 0x02 io |
| PCI: 00:11.0 20 <- [0x0000005000 - 0x000000500f] size 0x00000010 gran 0x04 io |
| PCI: 00:11.0 24 <- [0x00eec0d000 - 0x00eec0d3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:12.0 10 <- [0x00eec08000 - 0x00eec08fff] size 0x00001000 gran 0x0c mem |
| PCI: 00:12.1 10 <- [0x00eec09000 - 0x00eec09fff] size 0x00001000 gran 0x0c mem |
| PCI: 00:12.2 10 <- [0x00eec0e000 - 0x00eec0e0ff] size 0x00000100 gran 0x08 mem |
| PCI: 00:13.0 10 <- [0x00eec0a000 - 0x00eec0afff] size 0x00001000 gran 0x0c mem |
| PCI: 00:13.1 10 <- [0x00eec0b000 - 0x00eec0bfff] size 0x00001000 gran 0x0c mem |
| PCI: 00:13.2 10 <- [0x00eec0f000 - 0x00eec0f0ff] size 0x00000100 gran 0x08 mem |
| PCI: 00:14.0 assign_resources, bus 1 link: 0 |
| PCI: 00:14.0 assign_resources, bus 1 link: 0 |
| PCI: 00:14.1 10 <- [0x0000005030 - 0x0000005037] size 0x00000008 gran 0x03 io |
| PCI: 00:14.1 14 <- [0x0000005048 - 0x000000504b] size 0x00000004 gran 0x02 io |
| PCI: 00:14.1 18 <- [0x0000005038 - 0x000000503f] size 0x00000008 gran 0x03 io |
| PCI: 00:14.1 1c <- [0x000000504c - 0x000000504f] size 0x00000004 gran 0x02 io |
| PCI: 00:14.1 20 <- [0x0000005010 - 0x000000501f] size 0x00000010 gran 0x04 io |
| PCI: 00:14.2 10 <- [0x00eec04000 - 0x00eec07fff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:14.3 a0 <- [0x00eec10000 - 0x00eec10000] size 0x00000001 gran 0x00 mem |
| PCI: 00:14.3 assign_resources, bus 0 link: 0 |
| PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io |
| PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq |
| PNP: 002e.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io |
| PNP: 002e.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq |
| PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io |
| PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io |
| PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq |
| PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq |
| PNP: 002e.b 60 <- [0x0000000290 - 0x0000000291] size 0x00000002 gran 0x01 io |
| ERROR: PNP: 002e.b 70 irq size: 0x0000000001 not assigned |
| PNP: 0ca2.0 missing set_resources |
| PCI: 00:14.3 assign_resources, bus 0 link: 0 |
| PCI: 00:14.4 1c <- [0x0000004000 - 0x0000004fff] size 0x00001000 gran 0x0c bus 08 io |
| PCI: 00:14.4 24 <- [0x00e02fffff - 0x00e02ffffe] size 0x00000000 gran 0x14 bus 08 prefmem |
| PCI: 00:14.4 20 <- [0x00ee000000 - 0x00ee8fffff] size 0x00900000 gran 0x14 bus 08 mem |
| PCI: 00:14.4 assign_resources, bus 8 link: 0 |
| PCI: 08:01.0 10 <- [0x00ee000000 - 0x00ee7fffff] size 0x00800000 gran 0x17 mem |
| PCI: 08:01.0 14 <- [0x00ee800000 - 0x00ee81ffff] size 0x00020000 gran 0x11 mem |
| PCI: 08:01.0 18 <- [0x0000004000 - 0x000000407f] size 0x00000080 gran 0x07 io |
| PCI: 00:14.4 assign_resources, bus 8 link: 0 |
| PCI: 00:14.5 10 <- [0x00eec0c000 - 0x00eec0cfff] size 0x00001000 gran 0x0c mem |
| PCI: 00:18.0 assign_resources, bus 0 link: 1 |
| PCI: 00:18.3 94 <- [0x00f0000000 - 0x00f3ffffff] size 0x04000000 gran 0x1a mem <gart> |
| PCI: 00:19.3 94 <- [0x00f0000000 - 0x00f3ffffff] size 0x04000000 gran 0x1a mem <gart> |
| PCI: 00:1a.3 94 <- [0x00f0000000 - 0x00f3ffffff] size 0x04000000 gran 0x1a mem <gart> |
| PCI: 00:1b.3 94 <- [0x00f0000000 - 0x00f3ffffff] size 0x04000000 gran 0x1a mem <gart> |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| Root Device assign_resources, bus 0 link: 0 |
| Done setting resources. |
| Show resources in subtree (Root Device)...After assigning values. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: 01 |
| APIC: 02 |
| APIC: 03 |
| APIC: 04 |
| APIC: 05 |
| APIC: 06 |
| APIC: 07 |
| APIC: 08 |
| APIC: 09 |
| APIC: 0a |
| APIC: 0b |
| APIC: 0c |
| APIC: 0d |
| APIC: 0e |
| APIC: 0f |
| APIC: 20 |
| APIC: 21 |
| APIC: 22 |
| APIC: 23 |
| APIC: 24 |
| APIC: 25 |
| APIC: 26 |
| APIC: 27 |
| APIC: 28 |
| APIC: 29 |
| APIC: 2a |
| APIC: 2b |
| APIC: 2c |
| APIC: 2d |
| APIC: 2e |
| APIC: 2f |
| DOMAIN: 0000 child on link 0 PCI: 00:18.0 |
| DOMAIN: 0000 resource base 1000 size 5000 align 12 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base d0000000 size 24000000 align 28 gran 0 limit feafffff flags 40040200 index 10000100 |
| DOMAIN: 0000 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 |
| DOMAIN: 0000 resource base 0 size c0000000 align 0 gran 0 limit 0 flags e0004200 index 7 |
| DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10 |
| DOMAIN: 0000 resource base c0000 size bff40000 align 0 gran 0 limit 0 flags e0004200 index 20 |
| DOMAIN: 0000 resource base 100000000 size 340000000 align 0 gran 0 limit 0 flags e0004200 index 30 |
| DOMAIN: 0000 resource base 440000000 size 400000000 align 0 gran 0 limit 0 flags e0004200 index 41 |
| DOMAIN: 0000 resource base 840000000 size 400000000 align 0 gran 0 limit 0 flags e0004200 index 52 |
| DOMAIN: 0000 resource base c40000000 size 400000000 align 0 gran 0 limit 0 flags e0004200 index 63 |
| PCI: 00:18.0 |
| PCI: 00:18.0 resource base d0000000 size 10300000 align 28 gran 20 limit e02fffff flags 60081200 index 110b0 |
| PCI: 00:18.0 resource base e4000000 size ad00000 align 26 gran 20 limit eecfffff flags 60080200 index 110b8 |
| PCI: 00:18.0 resource base 1000 size 5000 align 12 gran 12 limit 5fff flags 60080100 index 110d8 |
| PCI: 00:18.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags e0000200 index 111b8 |
| PCI: 00:00.0 |
| PCI: 00:00.0 resource base e0200000 size 100 align 12 gran 8 limit e02000ff flags 60001200 index fc |
| PCI: 00:00.2 |
| PCI: 00:00.2 resource base eec00000 size 4000 align 14 gran 14 limit eec03fff flags 70000200 index 44 |
| PCI: 00:02.0 child on link 0 PCI: 01:00.0 |
| PCI: 00:02.0 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c |
| PCI: 00:02.0 resource base d0000000 size 10200000 align 28 gran 20 limit e01fffff flags 60081202 index 24 |
| PCI: 00:02.0 resource base ee900000 size 100000 align 20 gran 20 limit ee9fffff flags 60080202 index 20 |
| PCI: 01:00.0 |
| PCI: 01:00.0 resource base d0000000 size 10000000 align 28 gran 28 limit dfffffff flags 60001201 index 10 |
| PCI: 01:00.0 resource base e0000000 size 200000 align 21 gran 21 limit e01fffff flags 60001201 index 18 |
| PCI: 01:00.0 resource base 1000 size 100 align 8 gran 8 limit 10ff flags 60000100 index 20 |
| PCI: 01:00.0 resource base ee900000 size 40000 align 18 gran 18 limit ee93ffff flags 60000200 index 24 |
| PCI: 01:00.0 resource base ee940000 size 20000 align 17 gran 17 limit ee95ffff flags 60002200 index 30 |
| PCI: 01:00.1 |
| PCI: 01:00.1 resource base ee960000 size 4000 align 14 gran 14 limit ee963fff flags 60000201 index 10 |
| PCI: 00:04.0 |
| PCI: 00:04.0 resource base 5fff size 0 align 12 gran 12 limit 5fff flags 60080102 index 1c |
| PCI: 00:04.0 resource base e02fffff size 0 align 20 gran 20 limit e02fffff flags 60081202 index 24 |
| PCI: 00:04.0 resource base eecfffff size 0 align 20 gran 20 limit eecfffff flags 60080202 index 20 |
| PCI: 00:09.0 child on link 0 PCI: 03:00.0 |
| PCI: 00:09.0 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c |
| PCI: 00:09.0 resource base e02fffff size 0 align 20 gran 20 limit e02fffff flags 60081202 index 24 |
| PCI: 00:09.0 resource base eea00000 size 100000 align 20 gran 20 limit eeafffff flags 60080202 index 20 |
| PCI: 03:00.0 |
| PCI: 03:00.0 resource base eea00000 size 20000 align 17 gran 17 limit eea1ffff flags 60000200 index 10 |
| PCI: 03:00.0 resource base 2000 size 20 align 5 gran 5 limit 201f flags 60000100 index 18 |
| PCI: 03:00.0 resource base eea20000 size 4000 align 14 gran 14 limit eea23fff flags 60000200 index 1c |
| PCI: 00:0a.0 child on link 0 PCI: 04:00.0 |
| PCI: 00:0a.0 resource base 3000 size 1000 align 12 gran 12 limit 3fff flags 60080102 index 1c |
| PCI: 00:0a.0 resource base e02fffff size 0 align 20 gran 20 limit e02fffff flags 60081202 index 24 |
| PCI: 00:0a.0 resource base eeb00000 size 100000 align 20 gran 20 limit eebfffff flags 60080202 index 20 |
| PCI: 04:00.0 |
| PCI: 04:00.0 resource base eeb00000 size 20000 align 17 gran 17 limit eeb1ffff flags 60000200 index 10 |
| PCI: 04:00.0 resource base 3000 size 20 align 5 gran 5 limit 301f flags 60000100 index 18 |
| PCI: 04:00.0 resource base eeb20000 size 4000 align 14 gran 14 limit eeb23fff flags 60000200 index 1c |
| PCI: 00:0b.0 child on link 0 PCI: 05:00.0 |
| PCI: 00:0b.0 resource base 5fff size 0 align 12 gran 12 limit 5fff flags 60080102 index 1c |
| PCI: 00:0b.0 resource base e02fffff size 0 align 20 gran 20 limit e02fffff flags 60081202 index 24 |
| PCI: 00:0b.0 resource base ea000000 size 4000000 align 25 gran 20 limit edffffff flags 60080202 index 20 |
| PCI: 05:00.0 |
| PCI: 05:00.0 resource base ea000000 size 2000000 align 25 gran 25 limit ebffffff flags 60000201 index 10 |
| PCI: 05:00.1 |
| PCI: 05:00.1 resource base ec000000 size 2000000 align 25 gran 25 limit edffffff flags 60000201 index 10 |
| PCI: 00:0c.0 child on link 0 PCI: 06:00.0 |
| PCI: 00:0c.0 resource base 5fff size 0 align 12 gran 12 limit 5fff flags 60080102 index 1c |
| PCI: 00:0c.0 resource base e02fffff size 0 align 20 gran 20 limit e02fffff flags 60081202 index 24 |
| PCI: 00:0c.0 resource base e4000000 size 4300000 align 26 gran 20 limit e82fffff flags 60080202 index 20 |
| PCI: 06:00.0 |
| PCI: 06:00.0 resource base e8200000 size 10000 align 16 gran 16 limit e820ffff flags 60000201 index 10 |
| PCI: 06:00.0 resource base e8000000 size 200000 align 21 gran 21 limit e81fffff flags 60000201 index 18 |
| PCI: 06:00.0 resource base e4000000 size 4000000 align 26 gran 26 limit e7ffffff flags 60000201 index 20 |
| PCI: 00:0d.0 |
| PCI: 00:0d.0 resource base 5fff size 0 align 12 gran 12 limit 5fff flags 60080102 index 1c |
| PCI: 00:0d.0 resource base e02fffff size 0 align 20 gran 20 limit e02fffff flags 60081202 index 24 |
| PCI: 00:0d.0 resource base eecfffff size 0 align 20 gran 20 limit eecfffff flags 60080202 index 20 |
| PCI: 00:11.0 |
| PCI: 00:11.0 resource base 5020 size 8 align 3 gran 3 limit 5027 flags 60000100 index 10 |
| PCI: 00:11.0 resource base 5040 size 4 align 2 gran 2 limit 5043 flags 60000100 index 14 |
| PCI: 00:11.0 resource base 5028 size 8 align 3 gran 3 limit 502f flags 60000100 index 18 |
| PCI: 00:11.0 resource base 5044 size 4 align 2 gran 2 limit 5047 flags 60000100 index 1c |
| PCI: 00:11.0 resource base 5000 size 10 align 4 gran 4 limit 500f flags 60000100 index 20 |
| PCI: 00:11.0 resource base eec0d000 size 400 align 12 gran 10 limit eec0d3ff flags 60000200 index 24 |
| PCI: 00:12.0 |
| PCI: 00:12.0 resource base eec08000 size 1000 align 12 gran 12 limit eec08fff flags 60000200 index 10 |
| PCI: 00:12.1 |
| PCI: 00:12.1 resource base eec09000 size 1000 align 12 gran 12 limit eec09fff flags 60000200 index 10 |
| PCI: 00:12.2 |
| PCI: 00:12.2 resource base eec0e000 size 100 align 12 gran 8 limit eec0e0ff flags 60000200 index 10 |
| PCI: 00:13.0 |
| PCI: 00:13.0 resource base eec0a000 size 1000 align 12 gran 12 limit eec0afff flags 60000200 index 10 |
| PCI: 00:13.1 |
| PCI: 00:13.1 resource base eec0b000 size 1000 align 12 gran 12 limit eec0bfff flags 60000200 index 10 |
| PCI: 00:13.2 |
| PCI: 00:13.2 resource base eec0f000 size 100 align 12 gran 8 limit eec0f0ff flags 60000200 index 10 |
| PCI: 00:14.0 child on link 0 I2C: 01:50 |
| PCI: 00:14.0 resource base fec00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 74 |
| PCI: 00:14.0 resource base feb00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 9c |
| PCI: 00:14.0 resource base fed00000 size 400 align 8 gran 8 limit ffffffff flags d0000200 index b4 |
| PCI: 00:14.0 resource base b00 size 10 align 8 gran 8 limit ffff flags d0000100 index 90 |
| PCI: 00:14.0 resource base b20 size 10 align 8 gran 8 limit ffff flags d0000100 index 58 |
| I2C: 01:50 |
| I2C: 01:51 |
| I2C: 01:52 |
| I2C: 01:53 |
| I2C: 01:54 |
| I2C: 01:55 |
| I2C: 01:56 |
| I2C: 01:57 |
| I2C: 01:2f |
| PCI: 00:14.1 |
| PCI: 00:14.1 resource base 5030 size 8 align 3 gran 3 limit 5037 flags 60000100 index 10 |
| PCI: 00:14.1 resource base 5048 size 4 align 2 gran 2 limit 504b flags 60000100 index 14 |
| PCI: 00:14.1 resource base 5038 size 8 align 3 gran 3 limit 503f flags 60000100 index 18 |
| PCI: 00:14.1 resource base 504c size 4 align 2 gran 2 limit 504f flags 60000100 index 1c |
| PCI: 00:14.1 resource base 5010 size 10 align 4 gran 4 limit 501f flags 60000100 index 20 |
| PCI: 00:14.2 |
| PCI: 00:14.2 resource base eec04000 size 4000 align 14 gran 14 limit eec07fff flags 60000201 index 10 |
| PCI: 00:14.3 child on link 0 PNP: 002e.0 |
| PCI: 00:14.3 resource base eec10000 size 1 align 12 gran 0 limit eec10000 flags 60000200 index a0 |
| PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PNP: 002e.0 |
| PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60 |
| PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 |
| PNP: 002e.1 |
| PNP: 002e.1 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60 |
| PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 |
| PNP: 002e.2 |
| PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit fff flags e0000100 index 60 |
| PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| PNP: 002e.3 |
| PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit fff flags e0000100 index 60 |
| PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| PNP: 002e.5 |
| PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit fff flags e0000100 index 60 |
| PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit fff flags e0000100 index 62 |
| PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72 |
| PNP: 002e.106 |
| PNP: 002e.106 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 62 |
| PNP: 002e.107 |
| PNP: 002e.207 |
| PNP: 002e.307 |
| PNP: 002e.407 |
| PNP: 002e.8 |
| PNP: 002e.108 |
| PNP: 002e.9 |
| PNP: 002e.109 |
| PNP: 002e.209 |
| PNP: 002e.309 |
| PNP: 002e.a |
| PNP: 002e.b |
| PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit fff flags e0000100 index 60 |
| PNP: 002e.b resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 002e.c |
| PNP: 002e.d |
| PNP: 002e.f |
| PNP: 004e.0 |
| PNP: 004e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 004e.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0 |
| PNP: 0ca2.0 |
| PNP: 0ca2.0 resource base ca2 size 1 align 0 gran 0 limit 0 flags c0000100 index ca2 |
| PCI: 00:14.4 child on link 0 PCI: 08:01.0 |
| PCI: 00:14.4 resource base 4000 size 1000 align 12 gran 12 limit 4fff flags 60080102 index 1c |
| PCI: 00:14.4 resource base e02fffff size 0 align 20 gran 20 limit e02fffff flags 60081202 index 24 |
| PCI: 00:14.4 resource base ee000000 size 900000 align 23 gran 20 limit ee8fffff flags 60080202 index 20 |
| PCI: 08:01.0 |
| PCI: 08:01.0 resource base ee000000 size 800000 align 23 gran 23 limit ee7fffff flags 60000200 index 10 |
| PCI: 08:01.0 resource base ee800000 size 20000 align 17 gran 17 limit ee81ffff flags 60000200 index 14 |
| PCI: 08:01.0 resource base 4000 size 80 align 7 gran 7 limit 407f flags 60000100 index 18 |
| PCI: 08:01.0 resource base a0000 size 1fc00 align 0 gran 0 limit 0 flags f0000200 index 3 |
| PCI: 00:14.5 |
| PCI: 00:14.5 resource base eec0c000 size 1000 align 12 gran 12 limit eec0cfff flags 60000200 index 10 |
| PCI: 00:18.1 |
| PCI: 00:18.2 |
| PCI: 00:18.3 |
| PCI: 00:18.3 resource base f0000000 size 4000000 align 26 gran 26 limit f3ffffff flags 60000200 index 94 |
| PCI: 00:18.4 |
| PCI: 00:18.5 |
| PCI: 00:19.0 |
| PCI: 00:19.1 |
| PCI: 00:19.2 |
| PCI: 00:19.3 |
| PCI: 00:19.4 |
| PCI: 00:19.5 |
| PCI: 00:1a.0 |
| PCI: 00:1a.1 |
| PCI: 00:1a.2 |
| PCI: 00:1a.3 |
| PCI: 00:1a.4 |
| PCI: 00:1a.5 |
| PCI: 00:1b.0 |
| PCI: 00:1b.1 |
| PCI: 00:1b.2 |
| PCI: 00:1b.3 |
| PCI: 00:1b.4 |
| PCI: 00:1b.5 |
| Done allocating resources. |
| BS: BS_DEV_RESOURCES times (us): entry 0 run 3788362 exit 0 |
| POST: 0x74 |
| Timestamp - device enable: 78176805180 |
| Enabling resources... |
| PCI: 00:18.0 cmd <- 00 |
| PCI: 00:18.1 subsystem <- 1043/8163 |
| PCI: 00:18.1 cmd <- 00 |
| PCI: 00:18.2 subsystem <- 1043/8163 |
| PCI: 00:18.2 cmd <- 00 |
| PCI: 00:18.3 cmd <- 00 |
| PCI: 00:18.4 cmd <- 00 |
| PCI: 00:18.5 cmd <- 00 |
| PCI: 00:19.0 cmd <- 00 |
| PCI: 00:19.1 subsystem <- 1043/8163 |
| PCI: 00:19.1 cmd <- 00 |
| PCI: 00:19.2 subsystem <- 1043/8163 |
| PCI: 00:19.2 cmd <- 00 |
| PCI: 00:19.3 cmd <- 00 |
| PCI: 00:19.4 cmd <- 00 |
| PCI: 00:19.5 cmd <- 00 |
| PCI: 00:1a.0 cmd <- 00 |
| PCI: 00:1a.1 subsystem <- 1043/8163 |
| PCI: 00:1a.1 cmd <- 00 |
| PCI: 00:1a.2 subsystem <- 1043/8163 |
| PCI: 00:1a.2 cmd <- 00 |
| PCI: 00:1a.3 cmd <- 00 |
| PCI: 00:1a.4 cmd <- 00 |
| PCI: 00:1a.5 cmd <- 00 |
| PCI: 00:1b.0 cmd <- 00 |
| PCI: 00:1b.1 subsystem <- 1043/8163 |
| PCI: 00:1b.1 cmd <- 00 |
| PCI: 00:1b.2 subsystem <- 1043/8163 |
| PCI: 00:1b.2 cmd <- 00 |
| PCI: 00:1b.3 cmd <- 00 |
| PCI: 00:1b.4 cmd <- 00 |
| PCI: 00:1b.5 cmd <- 00 |
| PCI: 00:00.0 subsystem <- 1043/8163 |
| PCI: 00:00.0 cmd <- 02 |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| Initializing IOMMU |
| PCI: 00:02.0 bridge ctrl <- 000b |
| PCI: 00:02.0 cmd <- 07 |
| PCI: 00:04.0 bridge ctrl <- 0003 |
| PCI: 00:04.0 cmd <- 00 |
| PCI: 00:09.0 bridge ctrl <- 0003 |
| PCI: 00:09.0 cmd <- 07 |
| PCI: 00:0a.0 bridge ctrl <- 0003 |
| PCI: 00:0a.0 cmd <- 07 |
| PCI: 00:0b.0 bridge ctrl <- 0003 |
| PCI: 00:0b.0 cmd <- 06 |
| PCI: 00:0c.0 bridge ctrl <- 0003 |
| PCI: 00:0c.0 cmd <- 06 |
| PCI: 00:0d.0 bridge ctrl <- 0003 |
| PCI: 00:0d.0 cmd <- 00 |
| PCI: 00:11.0 subsystem <- 1043/8163 |
| PCI: 00:11.0 cmd <- 03 |
| PCI: 00:12.0 subsystem <- 1043/8163 |
| PCI: 00:12.0 cmd <- 02 |
| PCI: 00:12.1 subsystem <- 1043/8163 |
| PCI: 00:12.1 cmd <- 02 |
| PCI: 00:12.2 subsystem <- 1043/8163 |
| PCI: 00:12.2 cmd <- 02 |
| PCI: 00:13.0 subsystem <- 1043/8163 |
| PCI: 00:13.0 cmd <- 02 |
| PCI: 00:13.1 subsystem <- 1043/8163 |
| PCI: 00:13.1 cmd <- 02 |
| PCI: 00:13.2 subsystem <- 1043/8163 |
| PCI: 00:13.2 cmd <- 02 |
| PCI: 00:14.0 subsystem <- 1043/8163 |
| PCI: 00:14.0 cmd <- 403 |
| PCI: 00:14.1 subsystem <- 1043/8163 |
| PCI: 00:14.1 cmd <- 01 |
| PCI: 00:14.2 subsystem <- 1043/8163 |
| PCI: 00:14.2 cmd <- 02 |
| PCI: 00:14.3 subsystem <- 1043/8163 |
| PCI: 00:14.3 cmd <- 0f |
| sb700 lpc decode:PNP: 002e.2, base=0x000003f8, end=0x000003ff |
| sb700 lpc decode:PNP: 002e.3, base=0x000002f8, end=0x000002ff |
| sb700 lpc decode:PNP: 002e.5, base=0x00000060, end=0x00000060 |
| sb700 lpc decode:PNP: 002e.5, base=0x00000064, end=0x00000064 |
| sb700 lpc decode:PNP: 002e.b, base=0x00000290, end=0x00000291 |
| sb700 lpc decode:PNP: 0ca2.0, base=0x00000ca2, end=0x00000ca2 |
| PCI: 00:14.4 bridge ctrl <- 0003 |
| PCI: 00:14.4 cmd <- 07 |
| PCI: 00:14.5 subsystem <- 1043/8163 |
| PCI: 00:14.5 cmd <- 02 |
| PCI: 01:00.0 cmd <- 03 |
| PCI: 01:00.1 cmd <- 02 |
| PCI: 03:00.0 cmd <- 03 |
| PCI: 04:00.0 cmd <- 03 |
| PCI: 05:00.0 cmd <- 02 |
| PCI: 05:00.1 cmd <- 02 |
| PCI: 06:00.0 cmd <- 02 |
| PCI: 08:01.0 cmd <- 03 |
| done. |
| BS: BS_DEV_ENABLE times (us): entry 0 run 205069 exit 0 |
| Found TPM SLB9665 TT 2.0 by Infineon |
| tlcl_send_startup: Startup return code is 0 |
| TPM: setup succeeded |
| POST: 0x75 |
| Timestamp - device initialization: 78963904933 |
| Initializing devices... |
| Root Device init ... |
| Root Device init finished in 1538 usecs |
| POST: 0x75 |
| CPU_CLUSTER: 0 init ... |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| Enabling probe filter |
| Enabling ATM mode |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| start_eip=0x00001000, code_size=0x00000031 |
| CPU1: stack_base 00e55000, stack_top 00e55ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 1. |
| After apic_write. |
| Initializing CPU #1 |
| Startup point 1. |
| CPU: vendor AMD device 600f20 |
| Waiting for send to finish... |
| CPU: family 15, model 02, stepping 00 |
| +nodeid = 00, coreid = 01 |
| After Startup. |
| POST: 0x60 |
| CPU2: stack_base 00e54000, stack_top 00e54ff8 |
| Enabling cache |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 2. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU3: stack_base 00e53000, stack_top 00e53ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT.CPU ID 0x80000001: 600f20 |
| CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB |
| MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e |
| MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixend to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 4. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU5: stack_base 00e51000, stack_top 00e51ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 5. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU6: stack_base 00e50000, stack_top 00e50ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| |
| MTRR check |
| Sending STARTUP #1 to 6. |
| Fixed MTRRs : Enabled |
| After apic_write. |
| Variable MTRRs: Enabled |
| Startup point 1. |
| |
| POST: 0x93 |
| Waiting for send to finish... |
| +Setting up local APIC... |
| After Startup. |
| CPU7: stack_base 00e4f000, stack_top 00e4fff8 |
| apic_id: 0x02 Asserting INIT. |
| done. |
| Waiting for send to finish... |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| +siblings = 15, Deasserting INIT. |
| Disabling SMM ASeg memory |
| Waiting for send to finish... |
| CPU #2 initialized |
| + |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| #startup loops: 1. |
| Sending STARTUP #1 to 7. |
| Setting up local APIC... |
| After apic_write. |
| apic_id: 0x03 done. |
| Startup point 1. |
| Waiting for send to finish... |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| +siblings = 15, After Startup. |
| CPU8: stack_base 00e4e000, stack_top 00e4eff8 |
| Disabling SMM ASeg memory |
| Asserting INIT. |
| CPU #3 initialized |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 8. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU9: stack_base 00e4d000, stack_top 00e4dff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 9. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU10: stack_base 00e4c000, stack_top 00e4cff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 10. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU11: stack_base 00e4b000, stack_top 00e4bff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 11. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU12: stack_base 00e4a000, stack_top 00e4aff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 12. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU13: stack_base 00e49000, stack_top 00e49ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 13. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| + |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| After Startup. |
| CPU14: stack_base 00e48000, stack_top 00e48ff8 |
| Setting up local APIC... |
| Asserting INIT. |
| apic_id: 0x04 done. |
| Waiting for send to finish... |
| +CPU model: AMD Opteron(tm) Processor 6386 SE |
| Deasserting INIT. |
| siblings = 15, Waiting for send to finish... |
| +Disabling SMM ASeg memory |
| #startup loops: 1. |
| Sending STARTUP #1 to 14. |
| CPU #4 initialized |
| After apic_write. |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| Startup point 1. |
| Waiting for send to finish... |
| + |
| POST: 0x93 |
| After Startup. |
| CPU15: stack_base 00e47000, stack_top 00e47ff8 |
| Asserting INIT. |
| Setting up local APIC... |
| Waiting for send to finish... |
| + apic_id: 0x05 Deasserting INIT. |
| done. |
| Waiting for send to finish... |
| +CPU model: AMD Opteron(tm) Processor 6386 SE |
| #startup loops: 1. |
| Sending STARTUP #1 to 15. |
| After apic_write. |
| siblings = 15, Startup point 1. |
| Waiting for send to finish... |
| +Disabling SMM ASeg memory |
| After Startup. |
| CPU16: stack_base 00e46000, stack_top 00e46ff8 |
| CPU #5 initialized |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 32. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU17: stack_base 00e45000, stack_top 00e45ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 33. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU18: stack_base 00e44000, stack_top 00e44ff8 |
| |
| MTRR check |
| Fixed MTRRs : Asserting INIT. |
| Enabled |
| Variable MTRRs: Waiting for send to finish... |
| Enabled |
| |
| POST: 0x93 |
| +Deasserting INIT. |
| Setting up local APIC... |
| Waiting for send to finish... |
| + apic_id: 0x06 done. |
| #startup loops: 1. |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| Sending STARTUP #1 to 34. |
| siblings = 15, After apic_write. |
| Disabling SMM ASeg memory |
| Startup point 1. |
| |
| MTRR check |
| Waiting for send to finish... |
| CPU #6 initialized |
| +Fixed MTRRs : After Startup. |
| CPU19: stack_base 00e43000, stack_top 00e43ff8 |
| Enabled |
| Variable MTRRs: Enabled |
| |
| Asserting INIT. |
| POST: 0x93 |
| Waiting for send to finish... |
| Setting up local APIC... |
| + apic_id: 0x07 done. |
| Deasserting INIT. |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| Waiting for send to finish... |
| siblings = 15, +Disabling SMM ASeg memory |
| #startup loops: 1. |
| Sending STARTUP #1 to 35. |
| After apic_write. |
| CPU #7 initialized |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU20: stack_base 00e42000, stack_top 00e42ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 36. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU21: stack_base 00e41000, stack_top 00e41ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 37. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU22: stack_base 00e40000, stack_top 00e40ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 38. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU23: stack_base 00e3f000, stack_top 00e3fff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 39. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU24: stack_base 00e3e000, stack_top 00e3eff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 40. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU25: stack_base 00e3d000, stack_top 00e3dff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 41. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU26: stack_base 00e3c000, stack_top 00e3cff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 42. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU27: stack_base 00e3b000, stack_top 00e3bff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 43. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| +After Startup. |
| CPU28: stack_base 00e3a000, stack_top 00e3aff8 |
| Setting up local APIC... |
| Asserting INIT. |
| apic_id: 0x08 done. |
| Waiting for send to finish... |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| +siblings = 15, Deasserting INIT. |
| Disabling SMM ASeg memory |
| Waiting for send to finish... |
| + |
| MTRR check |
| #startup loops: 1. |
| Sending STARTUP #1 to 44. |
| After apic_write. |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Startup point 1. |
| Waiting for send to finish... |
| Setting up local APIC... |
| +CPU #8 initialized |
| After Startup. |
| apic_id: 0x09 done. |
| CPU29: stack_base 00e39000, stack_top 00e39ff8 |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| Asserting INIT. |
| siblings = 15, Waiting for send to finish... |
| +Disabling SMM ASeg memory |
| Deasserting INIT. |
| CPU #9 initialized |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 45. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU30: stack_base 00e38000, stack_top 00e38ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 46. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU31: stack_base 00e37000, stack_top 00e37ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 47. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #0 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| CPU: vendor AMD device 600f20 |
| CPU: family 15, model 02, stepping 00 |
| Setting up local APIC... |
| nodeid = 00, coreid = 00 |
| apic_id: 0x20 done. |
| POST: 0x60 |
| Enabling cache |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| siblings = 15, Disabling SMM ASeg memory |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| d MSR 0x268 0x1e1e1e1e1e1e1e1e |
| CPU #16 initialized |
| Setting up local APIC... |
| apic_id: 0x21 done. |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: siblings = 15, Enabled |
| |
| POST: 0x93 |
| Disabling SMM ASeg memory |
| Setting up local APIC... |
| CPU #17 initialized |
| apic_id: 0x00 done. |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| siblings = 15, Disabling SMM ASeg memory |
| CPU #0 initialized |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Waiting for 21 CPUS to stop |
| Enabled |
| |
| POST: 0x93 |
| Setting up local APIC... |
| apic_id: 0x01 done. |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| siblings = 15, Disabling SMM ASeg memory |
| CPU #1 initialized |
| Waiting for 20 CPUS to stop |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Setting up local APIC... |
| apic_id: 0x0c done. |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| siblings = 15, Disabling SMM ASeg memory |
| CPU #12 initialized |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Waiting for 19 CPUS to stop |
| Setting up local APIC... |
| apic_id: 0x0d done. |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| siblings = 15, Disabling SMM ASeg memory |
| CPU #13 initialized |
| Waiting for 18 CPUS to stop |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Setting up local APIC... |
| apic_id: 0x0e done. |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| siblings = 15, Disabling SMM ASeg memory |
| CPU #14 initialized |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Waiting for 17 CPUS to stop |
| Setting up local APIC... |
| apic_id: 0x0f done. |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| siblings = 15, Disabling SMM ASeg memory |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| CPU #15 initialized |
| Setting up local APIC... |
| Waiting for 16 CPUS to stop |
| apic_id: 0x22 done. |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| siblings = 15, Disabling SMM ASeg memory |
| CPU #18 initialized |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Waiting for 15 CPUS to stop |
| Setting up local APIC... |
| apic_id: 0x23 done. |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| siblings = 15, Disabling SMM ASeg memory |
| CPU #19 initialized |
| Waiting for 14 CPUS to stop |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Setting up local APIC... |
| apic_id: 0x24 done. |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| siblings = 15, Disabling SMM ASeg memory |
| |
| MTRR check |
| CPU #20 initialized |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Waiting for 13 CPUS to stop |
| Setting up local APIC... |
| apic_id: 0x25 done. |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| siblings = 15, Disabling SMM ASeg memory |
| CPU #21 initialized |
| Waiting for 12 CPUS to stop |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Setting up local APIC... |
| apic_id: 0x2c done. |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| Setting up local APIC... |
| siblings = 15, apic_id: 0x26 done. |
| Disabling SMM ASeg memory |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| siblings = 15, Setting up local APIC... |
| Disabling SMM ASeg memory |
| CPU #28 initialized |
| apic_id: 0x2d done. |
| Waiting for 11 CPUS to stop |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| CPU #22 initialized |
| POST: 0x93 |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| Waiting for 10 CPUS to stop |
| Setting up local APIC... |
| siblings = 15, apic_id: 0x27 done. |
| Disabling SMM ASeg memory |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| CPU #29 initialized |
| siblings = 15, Waiting for 9 CPUS to stop |
| Disabling SMM ASeg memory |
| CPU #23 initialized |
| Waiting for 8 CPUS to stop |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Setting up local APIC... |
| apic_id: 0x2e done. |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| Setting up local APIC... |
| siblings = 15, apic_id: 0x28 done. |
| Disabling SMM ASeg memory |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| CPU #30 initialized |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Waiting for 7 CPUS to stop |
| Setting up local APIC... |
| siblings = 15, apic_id: 0x2f done. |
| Disabling SMM ASeg memory |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| siblings = 15, Setting up local APIC... |
| CPU #24 initialized |
| apic_id: 0x29 done. |
| Waiting for 6 CPUS to stop |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| Disabling SMM ASeg memory |
| siblings = 15, CPU #31 initialized |
| Disabling SMM ASeg memory |
| Waiting for 5 CPUS to stop |
| CPU #25 initialized |
| Waiting for 4 CPUS to stop |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Setting up local APIC... |
| apic_id: 0x2a done. |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| siblings = 15, Disabling SMM ASeg memory |
| Setting up local APIC... |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| apic_id: 0x0a done. |
| CPU #26 initialized |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| Waiting for 3 CPUS to stop |
| Setting up local APIC... |
| siblings = 15, apic_id: 0x2b done. |
| Disabling SMM ASeg memory |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| CPU #10 initialized |
| siblings = 15, Waiting for 2 CPUS to stop |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Disabling SMM ASeg memory |
| Setting up local APIC... |
| CPU #27 initialized |
| apic_id: 0x0b done. |
| Waiting for 1 CPUS to stop |
| CPU model: AMD Opteron(tm) Processor 6386 SE |
| siblings = 15, Disabling SMM ASeg memory |
| CPU #11 initialized |
| All AP CPUs stopped (98638 loops) |
| CPU0: stack: 00e56000 - 00e57000, lowest used address 00e569cc, stack used: 1588 bytes |
| CPU1: stack: 00e55000 - 00e56000, lowest used address 00e55d6c, stack used: 660 bytes |
| CPU2: stack: 00e54000 - 00e55000, lowest used address 00e54c4c, stack used: 948 bytes |
| CPU3: stack: 00e53000 - 00e54000, lowest used address 00e53d6c, stack used: 660 bytes |
| CPU4: stack: 00e52000 - 00e53000, lowest used address 00e52cac, stack used: 852 bytes |
| CPU5: stack: 00e51000 - 00e52000, lowest used address 00e51d6c, stack used: 660 bytes |
| CPU6: stack: 00e50000 - 00e51000, lowest used address 00e50cac, stack used: 852 bytes |
| CPU7: stack: 00e4f000 - 00e50000, lowest used address 00e4fd6c, stack used: 660 bytes |
| CPU8: stack: 00e4e000 - 00e4f000, lowest used address 00e4ecac, stack used: 852 bytes |
| CPU9: stack: 00e4d000 - 00e4e000, lowest used address 00e4dd6c, stack used: 660 bytes |
| CPU10: stack: 00e4c000 - 00e4d000, lowest used address 00e4ccac, stack used: 852 bytes |
| CPU11: stack: 00e4b000 - 00e4c000, lowest used address 00e4bd6c, stack used: 660 bytes |
| CPU12: stack: 00e4a000 - 00e4b000, lowest used address 00e4acac, stack used: 852 bytes |
| CPU13: stack: 00e49000 - 00e4a000, lowest used address 00e49d6c, stack used: 660 bytes |
| CPU14: stack: 00e48000 - 00e49000, lowest used address 00e48cac, stack used: 852 bytes |
| CPU15: stack: 00e47000 - 00e48000, lowest used address 00e47d6c, stack used: 660 bytes |
| CPU16: stack: 00e46000 - 00e47000, lowest used address 00e46cac, stack used: 852 bytes |
| CPU17: stack: 00e45000 - 00e46000, lowest used address 00e45d6c, stack used: 660 bytes |
| CPU18: stack: 00e44000 - 00e45000, lowest used address 00e44cac, stack used: 852 bytes |
| CPU19: stack: 00e43000 - 00e44000, lowest used address 00e43d6c, stack used: 660 bytes |
| CPU20: stack: 00e42000 - 00e43000, lowest used address 00e42cac, stack used: 852 bytes |
| CPU21: stack: 00e41000 - 00e42000, lowest used address 00e41d6c, stack used: 660 bytes |
| CPU22: stack: 00e40000 - 00e41000, lowest used address 00e40cac, stack used: 852 bytes |
| CPU23: stack: 00e3f000 - 00e40000, lowest used address 00e3fd6c, stack used: 660 bytes |
| CPU24: stack: 00e3e000 - 00e3f000, lowest used address 00e3ecac, stack used: 852 bytes |
| CPU25: stack: 00e3d000 - 00e3e000, lowest used address 00e3dd6c, stack used: 660 bytes |
| CPU26: stack: 00e3c000 - 00e3d000, lowest used address 00e3ccac, stack used: 852 bytes |
| CPU27: stack: 00e3b000 - 00e3c000, lowest used address 00e3bd6c, stack used: 660 bytes |
| CPU28: stack: 00e3a000 - 00e3b000, lowest used address 00e3acac, stack used: 852 bytes |
| CPU29: stack: 00e39000 - 00e3a000, lowest used address 00e39d6c, stack used: 660 bytes |
| CPU30: stack: 00e38000 - 00e39000, lowest used address 00e38cac, stack used: 852 bytes |
| CPU31: stack: 00e37000 - 00e38000, lowest used address 00e37d6c, stack used: 660 bytes |
| CPU_CLUSTER: 0 init finished in 2416567 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 00:18.0 init ... |
| PCI: 00:18.0 init finished in 1608 usecs |
| POST: 0x75 |
| PCI: 00:18.1 init ... |
| PCI: 00:18.1 init finished in 1608 usecs |
| POST: 0x75 |
| PCI: 00:18.2 init ... |
| PCI: 00:18.2 init finished in 1608 usecs |
| POST: 0x75 |
| PCI: 00:18.3 init ... |
| NB: Function 3 Misc Control.. FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| done. |
| PCI: 00:18.3 init finished in 13604 usecs |
| POST: 0x75 |
| PCI: 00:18.4 init ... |
| NB: Function 4 Link Control.. FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| done. |
| PCI: 00:18.4 init finished in 22651 usecs |
| POST: 0x75 |
| PCI: 00:18.5 init ... |
| NB: Function 5 Northbridge Control.. done. |
| PCI: 00:18.5 init finished in 4686 usecs |
| POST: 0x75 |
| PCI: 00:19.0 init ... |
| PCI: 00:19.0 init finished in 1608 usecs |
| POST: 0x75 |
| PCI: 00:19.1 init ... |
| PCI: 00:19.1 init finished in 1608 usecs |
| POST: 0x75 |
| PCI: 00:19.2 init ... |
| PCI: 00:19.2 init finished in 1608 usecs |
| POST: 0x75 |
| PCI: 00:19.3 init ... |
| NB: Function 3 Misc Control.. FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| done. |
| PCI: 00:19.3 init finished in 13603 usecs |
| POST: 0x75 |
| PCI: 00:19.4 init ... |
| NB: Function 4 Link Control.. FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| done. |
| PCI: 00:19.4 init finished in 22658 usecs |
| POST: 0x75 |
| PCI: 00:19.5 init ... |
| NB: Function 5 Northbridge Control.. done. |
| PCI: 00:19.5 init finished in 4687 usecs |
| POST: 0x75 |
| PCI: 00:1a.0 init ... |
| PCI: 00:1a.0 init finished in 1608 usecs |
| POST: 0x75 |
| PCI: 00:1a.1 init ... |
| PCI: 00:1a.1 init finished in 1608 usecs |
| POST: 0x75 |
| PCI: 00:1a.2 init ... |
| PCI: 00:1a.2 init finished in 1608 usecs |
| POST: 0x75 |
| PCI: 00:1a.3 init ... |
| NB: Function 3 Misc Control.. FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| done. |
| PCI: 00:1a.3 init finished in 13603 usecs |
| POST: 0x75 |
| PCI: 00:1a.4 init ... |
| NB: Function 4 Link Control.. FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| done. |
| PCI: 00:1a.4 init finished in 22644 usecs |
| POST: 0x75 |
| PCI: 00:1a.5 init ... |
| NB: Function 5 Northbridge Control.. done. |
| PCI: 00:1a.5 init finished in 4686 usecs |
| POST: 0x75 |
| PCI: 00:1b.0 init ... |
| PCI: 00:1b.0 init finished in 1608 usecs |
| POST: 0x75 |
| PCI: 00:1b.1 init ... |
| PCI: 00:1b.1 init finished in 1608 usecs |
| POST: 0x75 |
| PCI: 00:1b.2 init ... |
| PCI: 00:1b.2 init finished in 1609 usecs |
| POST: 0x75 |
| PCI: 00:1b.3 init ... |
| NB: Function 3 Misc Control.. FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| done. |
| PCI: 00:1b.3 init finished in 13602 usecs |
| POST: 0x75 |
| PCI: 00:1b.4 init ... |
| NB: Function 4 Link Control.. FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| done. |
| PCI: 00:1b.4 init finished in 22650 usecs |
| POST: 0x75 |
| PCI: 00:1b.5 init ... |
| NB: Function 5 Northbridge Control.. done. |
| PCI: 00:1b.5 init finished in 4686 usecs |
| POST: 0x75 |
| PCI: 00:00.0 init ... |
| pcie_init in sr5650_ht.c |
| IOAPIC: Initializing IOAPIC at 0xe0200000 |
| IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| IOAPIC: ID = 0x01 |
| IOAPIC: Dumping registers |
| reg 0x0000: 0x01000000 |
| reg 0x0001: 0x001f8021 |
| reg 0x0002: 0x00000000 |
| IOAPIC: 32 interrupts |
| IOAPIC: Enabling interrupts on FSB |
| IOAPIC: reg 0x00000000 value 0x00000000 0x00000700 |
| IOAPIC: reg 0x00000001 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000002 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000003 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000004 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000005 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000006 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000007 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000008 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000009 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000a value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000b value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000c value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000d value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000e value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000f value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000010 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000011 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000012 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000013 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000014 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000015 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000016 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000017 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000018 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000019 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000001a value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000001b value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000001c value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000001d value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000001e value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000001f value 0x00000000 0x00010000 |
| PCI: 00:00.0 init finished in 138293 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 00:11.0 init ... |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| rev_id=15 |
| sata_bar0=5020 |
| sata_bar1=5040 |
| sata_bar2=5028 |
| sata_bar3=5044 |
| sata_bar4=5000 |
| sata_bar5=eec0d000 |
| ide_bar0=5030 |
| ide_bar1=5048 |
| ide_bar2=5038 |
| ide_bar3=504c |
| Maximum SATA port count supported by silicon: 6 |
| SATA port 0 status = 23 |
| drive detection done after 0 ms |
| AHCI device 0 is ready after 1 tries |
| SATA port 1 status = 23 |
| 0x6=b0, 0x7=80 |
| drive detection not yet completed, waiting... |
| 0x6=10, 0x7=50 |
| drive no longer selected after 10 ms, retrying init |
| drive detection done after 0 ms |
| AHCI device 1 is ready after 2 tries |
| SATA port 2 status = 23 |
| 0x6=a0, 0x7=80 |
| drive detection not yet completed, waiting... |
| 0x6=0, 0x7=50 |
| drive no longer selected after 370 ms, retrying init |
| drive detection done after 0 ms |
| AHCI device 2 is ready after 2 tries |
| SATA port 3 status = 0 |
| No AHCI SATA drive on Slot3 |
| SATA port 4 status = 0 |
| No AHCI SATA drive on Slot4 |
| SATA port 5 status = 0 |
| No AHCI SATA drive on Slot5 |
| PCI: 00:11.0 init finished in 398874 usecs |
| POST: 0x75 |
| PCI: 00:12.0 init ... |
| PCI: 00:12.0 init finished in 1632 usecs |
| POST: 0x75 |
| PCI: 00:12.1 init ... |
| PCI: 00:12.1 init finished in 1632 usecs |
| POST: 0x75 |
| PCI: 00:12.2 init ... |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| usb2_bar0=0xeec0e000 |
| rpr 6.23, final dword=849e03c8 |
| PCI: 00:12.2 init finished in 14712 usecs |
| POST: 0x75 |
| PCI: 00:13.0 init ... |
| PCI: 00:13.0 init finished in 1632 usecs |
| POST: 0x75 |
| PCI: 00:13.1 init ... |
| PCI: 00:13.1 init finished in 1632 usecs |
| POST: 0x75 |
| PCI: 00:13.2 init ... |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| usb2_bar0=0xeec0f000 |
| rpr 6.23, final dword=849e03c8 |
| PCI: 00:13.2 init finished in 14719 usecs |
| POST: 0x75 |
| PCI: 00:14.0 init ... |
| sm_init(). |
| IOAPIC: Initializing IOAPIC at 0xfec00000 |
| IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| IOAPIC: Dumping registers |
| reg 0x0000: 0x00000000 |
| reg 0x0001: 0x00178021 |
| reg 0x0002: 0x00000000 |
| IOAPIC: 24 interrupts |
| IOAPIC: Enabling interrupts on FSB |
| IOAPIC: reg 0x00000000 value 0x00000000 0x00000700 |
| IOAPIC: reg 0x00000001 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000002 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000003 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000004 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000005 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000006 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000007 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000008 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000009 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000a value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000b value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000c value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000d value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000e value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000f value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000010 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000011 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000012 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000013 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000014 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000015 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000016 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000017 value 0x00000000 0x00010000 |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| No CMOS option 'enable_legacy_usb'. |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| set power "on" after power fail |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| ++++++++++no set NMI+++++ |
| RTC Init |
| sm_init() end |
| PCI: 00:14.0 init finished in 143360 usecs |
| POST: 0x75 |
| PCI: 00:14.1 init ... |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| PCI: 00:14.1 init finished in 10854 usecs |
| POST: 0x75 |
| PCI: 00:14.2 init ... |
| base = 0xeec04000 |
| No codec! |
| PCI: 00:14.2 init finished in 6926 usecs |
| POST: 0x75 |
| PCI: 00:14.3 init ... |
| lpc_init |
| PCI: 00:14.3 init finished in 2340 usecs |
| POST: 0x75 |
| PCI: 00:14.4 init ... |
| PCI: 00:14.4 init finished in 1627 usecs |
| POST: 0x75 |
| PCI: 00:14.5 init ... |
| PCI: 00:14.5 init finished in 1633 usecs |
| POST: 0x75 |
| PCI: 01:00.0 init ... |
| PCI: 01:00.0 init finished in 1608 usecs |
| POST: 0x75 |
| PCI: 01:00.1 init ... |
| PCI: 01:00.1 init finished in 1608 usecs |
| POST: 0x75 |
| PCI: 03:00.0 init ... |
| PCI: 03:00.0 init finished in 1609 usecs |
| POST: 0x75 |
| PCI: 04:00.0 init ... |
| PCI: 04:00.0 init finished in 1608 usecs |
| POST: 0x75 |
| PCI: 05:00.0 init ... |
| PCI: 05:00.0 init finished in 1608 usecs |
| POST: 0x75 |
| PCI: 05:00.1 init ... |
| PCI: 05:00.1 init finished in 1607 usecs |
| POST: 0x75 |
| PCI: 06:00.0 init ... |
| PCI: 06:00.0 init finished in 1608 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| smbus: PCI: 00:14.0[0]->I2C: 01:2f init ... |
| Set SMBUS controller to channel 1 |
| Found 64 pin W83795G Nuvoton H/W Monitor |
| W83795G/ADG work in Thermal Cruise Mode |
| Fan CTFS(celsius) TTTI(celsius) |
| 1 80 80 |
| 2 80 80 |
| 3 80 80 |
| 4 80 80 |
| 5 80 80 |
| 6 80 80 |
| DTS1 current value: 1c |
| DTS2 current value: 19 |
| DTS3 current value: 0 |
| DTS4 current value: 0 |
| DTS5 current value: 0 |
| DTS6 current value: 0 |
| DTS7 current value: 0 |
| DTS8 current value: 0 |
| Set SMBUS controller to channel 0 |
| I2C: 01:2f init finished in 312135 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PNP: 002e.2 init ... |
| PNP: 002e.2 init finished in 1540 usecs |
| POST: 0x75 |
| PNP: 002e.3 init ... |
| PNP: 002e.3 init finished in 1539 usecs |
| POST: 0x75 |
| PNP: 002e.5 init ... |
| w83667hg_a_init: Disable mouse controller.PNP: 002e.5 init finished in 4479 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PNP: 002e.a init ... |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| set power on after power fail |
| PNP: 002e.a init finished in 12785 usecs |
| POST: 0x75 |
| PNP: 002e.b init ... |
| PNP: 002e.b init finished in 1538 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 08:01.0 init ... |
| ASpeed AST2050: initializing video device |
| ast_detect_chip: AST 1100 detected |
| ast_detect_chip: Using Sil164 TMDS transmitter |
| ast_driver_load: dram 800000000 0 16 04000000 |
| ASpeed VGA text mode initialized |
| PCI: 08:01.0 init finished in 17125 usecs |
| Devices initialized |
| Show all devs... After init. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| DOMAIN: 0000: enabled 1 |
| APIC: 00: enabled 1 |
| PCI: 00:18.0: enabled 1 |
| PCI: 00:18.1: enabled 1 |
| PCI: 00:18.2: enabled 1 |
| PCI: 00:18.3: enabled 1 |
| PCI: 00:18.4: enabled 1 |
| PCI: 00:18.5: enabled 1 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:19.1: enabled 1 |
| PCI: 00:19.2: enabled 1 |
| PCI: 00:19.3: enabled 1 |
| PCI: 00:19.4: enabled 1 |
| PCI: 00:19.5: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1a.1: enabled 1 |
| PCI: 00:1a.2: enabled 1 |
| PCI: 00:1a.3: enabled 1 |
| PCI: 00:1a.4: enabled 1 |
| PCI: 00:1a.5: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1b.1: enabled 1 |
| PCI: 00:1b.2: enabled 1 |
| PCI: 00:1b.3: enabled 1 |
| PCI: 00:1b.4: enabled 1 |
| PCI: 00:1b.5: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:00.1: enabled 0 |
| PCI: 00:00.2: enabled 1 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:03.0: enabled 0 |
| PCI: 00:04.0: enabled 1 |
| PCI: 00:05.0: enabled 0 |
| PCI: 00:06.0: enabled 0 |
| PCI: 00:07.0: enabled 0 |
| PCI: 00:08.0: enabled 0 |
| PCI: 00:09.0: enabled 1 |
| PCI: 00:0a.0: enabled 1 |
| PCI: 00:0b.0: enabled 1 |
| PCI: 00:0c.0: enabled 1 |
| PCI: 00:0d.0: enabled 1 |
| PCI: 00:11.0: enabled 1 |
| PCI: 00:12.0: enabled 1 |
| PCI: 00:12.1: enabled 1 |
| PCI: 00:12.2: enabled 1 |
| PCI: 00:13.0: enabled 1 |
| PCI: 00:13.1: enabled 1 |
| PCI: 00:13.2: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| PCI: 00:14.1: enabled 1 |
| PCI: 00:14.2: enabled 1 |
| PCI: 00:14.3: enabled 1 |
| PCI: 00:14.4: enabled 1 |
| PCI: 00:14.5: enabled 1 |
| I2C: 01:50: enabled 1 |
| I2C: 01:51: enabled 1 |
| I2C: 01:52: enabled 1 |
| I2C: 01:53: enabled 1 |
| I2C: 01:54: enabled 1 |
| I2C: 01:55: enabled 1 |
| I2C: 01:56: enabled 1 |
| I2C: 01:57: enabled 1 |
| I2C: 01:2f: enabled 1 |
| PNP: 002e.0: enabled 0 |
| PNP: 002e.1: enabled 0 |
| PNP: 002e.2: enabled 1 |
| PNP: 002e.3: enabled 1 |
| PNP: 002e.5: enabled 1 |
| PNP: 002e.106: enabled 0 |
| PNP: 002e.107: enabled 0 |
| PNP: 002e.207: enabled 0 |
| PNP: 002e.307: enabled 0 |
| PNP: 002e.407: enabled 0 |
| PNP: 002e.8: enabled 0 |
| PNP: 002e.108: enabled 0 |
| PNP: 002e.9: enabled 0 |
| PNP: 002e.109: enabled 0 |
| PNP: 002e.209: enabled 0 |
| PNP: 002e.309: enabled 0 |
| PNP: 002e.a: enabled 1 |
| PNP: 002e.b: enabled 1 |
| PNP: 002e.c: enabled 0 |
| PNP: 002e.d: enabled 0 |
| PNP: 002e.f: enabled 0 |
| PNP: 004e.0: enabled 1 |
| PNP: 0ca2.0: enabled 1 |
| PCI: 08:01.0: enabled 1 |
| PCI: 08:02.0: enabled 0 |
| PCI: 08:03.0: enabled 0 |
| APIC: 01: enabled 1 |
| APIC: 02: enabled 1 |
| APIC: 03: enabled 1 |
| APIC: 04: enabled 1 |
| APIC: 05: enabled 1 |
| APIC: 06: enabled 1 |
| APIC: 07: enabled 1 |
| APIC: 08: enabled 1 |
| APIC: 09: enabled 1 |
| APIC: 0a: enabled 1 |
| APIC: 0b: enabled 1 |
| APIC: 0c: enabled 1 |
| APIC: 0d: enabled 1 |
| APIC: 0e: enabled 1 |
| APIC: 0f: enabled 1 |
| APIC: 20: enabled 1 |
| APIC: 21: enabled 1 |
| APIC: 22: enabled 1 |
| APIC: 23: enabled 1 |
| APIC: 24: enabled 1 |
| APIC: 25: enabled 1 |
| APIC: 26: enabled 1 |
| APIC: 27: enabled 1 |
| APIC: 28: enabled 1 |
| APIC: 29: enabled 1 |
| APIC: 2a: enabled 1 |
| APIC: 2b: enabled 1 |
| APIC: 2c: enabled 1 |
| APIC: 2d: enabled 1 |
| APIC: 2e: enabled 1 |
| APIC: 2f: enabled 1 |
| PCI: 01:00.0: enabled 1 |
| PCI: 01:00.1: enabled 1 |
| PCI: 03:00.0: enabled 1 |
| PCI: 04:00.0: enabled 1 |
| PCI: 05:00.0: enabled 1 |
| PCI: 05:00.1: enabled 1 |
| PCI: 06:00.0: enabled 1 |
| BS: BS_DEV_INIT times (us): entry 15829 run 4188601 exit 0 |
| POST: 0x76 |
| Finalize devices... |
| Devices finalized |
| Timestamp - device setup done: 93648617526 |
| BS: BS_POST_DEVICE times (us): entry 0 run 6711 exit 0 |
| POST: 0x77 |
| Timestamp - cbmem post: 93675941098 |
| BS: BS_OS_RESUME_CHECK times (us): entry 0 run 3424 exit 0 |
| POST: 0x79 |
| Timestamp - write tables: 93702537161 |
| POST: 0x9a |
| Writing IRQ routing tables to 0xf0000...done. |
| Writing IRQ routing tables to 0xbfdbe000...done. |
| PIRQ table: 48 bytes. |
| POST: 0x9b |
| Wrote the mp table end at: 000f0410 - 000f08ac |
| Wrote the mp table end at: bfdbd010 - bfdbd4ac |
| MP table: 1196 bytes. |
| POST: 0x9c |
| CBFS @ 200 size fffe00 |
| CBFS: 'Master Header Locator' located CBFS at [200:1000000) |
| CBFS: Locating 'fallback/dsdt.aml' |
| CBFS: Found @ offset 2c040 size 271a |
| CBFS @ 200 size fffe00 |
| CBFS: 'Master Header Locator' located CBFS at [200:1000000) |
| CBFS: Locating 'fallback/slic' |
| CBFS: 'fallback/slic' not found. |
| ACPI: Writing ACPI tables at bfd99000. |
| ACPI: * FACS |
| ACPI: * DSDT |
| ACPI: * FADT |
| pm_base: 0x0800 |
| ACPI: added table 1/32, length now 40 |
| ACPI: * SSDT |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| processor_brand=AMD Opteron(tm) Processor 6386 SE |
| Pstates algorithm ... |
| Pstate_freq[0] = 2800MHz Pstate_power[0] = 7612mw |
| Pstate_latency[0] = 5us |
| Pstate_freq[1] = 2500MHz Pstate_power[1] = 6615mw |
| Pstate_latency[1] = 5us |
| Pstate_freq[2] = 2200MHz Pstate_power[2] = 5670mw |
| Pstate_latency[2] = 5us |
| Pstate_freq[3] = 1800MHz Pstate_power[3] = 4370mw |
| Pstate_latency[3] = 5us |
| Pstate_freq[4] = 1400MHz Pstate_power[4] = 3283mw |
| Pstate_latency[4] = 5us |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| PSS: 2800MHz power 7612 control 0x0 status 0x0 |
| PSS: 2500MHz power 6615 control 0x1 status 0x1 |
| PSS: 2200MHz power 5670 control 0x2 status 0x2 |
| PSS: 1800MHz power 4370 control 0x3 status 0x3 |
| PSS: 1400MHz power 3283 control 0x4 status 0x4 |
| \_SB.PCI0.LPC.TPM: LPC TPM PNP: 004e.0 |
| CBFS @ 200 size fffe00 |
| CBFS: 'Master Header Locator' located CBFS at [200:1000000) |
| CBFS: Locating 'pci1002,67ef.rom' |
| CBFS: 'pci1002,67ef.rom' not found. |
| PCI Option ROM loading disabled for PCI: 01:00.0 |
| PCI: 01:00.0: Missing PCI Option ROM |
| ACPI: added table 2/32, length now 44 |
| ACPI: * MCFG |
| ACPI: added table 3/32, length now 48 |
| ACPI: * TPM2 |
| TPM2 log created at bfd89000 |
| ACPI: added table 4/32, length now 52 |
| ACPI: * MADT |
| ACPI: added table 5/32, length now 56 |
| current = bfd9f680 |
| ACPI: * SRAT at bfd9f680 |
| SRAT: lapic cpu_index=00, node_id=00, apic_id=00 |
| SRAT: lapic cpu_index=01, node_id=00, apic_id=01 |
| SRAT: lapic cpu_index=02, node_id=00, apic_id=02 |
| SRAT: lapic cpu_index=03, node_id=00, apic_id=03 |
| SRAT: lapic cpu_index=04, node_id=00, apic_id=04 |
| SRAT: lapic cpu_index=05, node_id=00, apic_id=05 |
| SRAT: lapic cpu_index=06, node_id=00, apic_id=06 |
| SRAT: lapic cpu_index=07, node_id=00, apic_id=07 |
| SRAT: lapic cpu_index=08, node_id=01, apic_id=08 |
| SRAT: lapic cpu_index=09, node_id=01, apic_id=09 |
| SRAT: lapic cpu_index=0a, node_id=01, apic_id=0a |
| SRAT: lapic cpu_index=0b, node_id=01, apic_id=0b |
| SRAT: lapic cpu_index=0c, node_id=01, apic_id=0c |
| SRAT: lapic cpu_index=0d, node_id=01, apic_id=0d |
| SRAT: lapic cpu_index=0e, node_id=01, apic_id=0e |
| SRAT: lapic cpu_index=0f, node_id=01, apic_id=0f |
| SRAT: lapic cpu_index=10, node_id=02, apic_id=20 |
| SRAT: lapic cpu_index=11, node_id=02, apic_id=21 |
| SRAT: lapic cpu_index=12, node_id=02, apic_id=22 |
| SRAT: lapic cpu_index=13, node_id=02, apic_id=23 |
| SRAT: lapic cpu_index=14, node_id=02, apic_id=24 |
| SRAT: lapic cpu_index=15, node_id=02, apic_id=25 |
| SRAT: lapic cpu_index=16, node_id=02, apic_id=26 |
| SRAT: lapic cpu_index=17, node_id=02, apic_id=27 |
| SRAT: lapic cpu_index=18, node_id=03, apic_id=28 |
| SRAT: lapic cpu_index=19, node_id=03, apic_id=29 |
| SRAT: lapic cpu_index=1a, node_id=03, apic_id=2a |
| SRAT: lapic cpu_index=1b, node_id=03, apic_id=2b |
| SRAT: lapic cpu_index=1c, node_id=03, apic_id=2c |
| SRAT: lapic cpu_index=1d, node_id=03, apic_id=2d |
| SRAT: lapic cpu_index=1e, node_id=03, apic_id=2e |
| SRAT: lapic cpu_index=1f, node_id=03, apic_id=2f |
| set_srat_mem: dev DOMAIN: 0000, res->index=0007 startk=00000000, sizek=00300000 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=002ffd00 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0030 startk=00400000, sizek=00d00000 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0041 startk=01100000, sizek=01000000 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0052 startk=02100000, sizek=01000000 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0063 startk=03100000, sizek=01000000 |
| ACPI: added table 6/32, length now 60 |
| ACPI: * SLIT at bfd9f9a0 |
| ACPI: added table 7/32, length now 64 |
| ACPI: * SRAT at bfd9f9e0 |
| SRAT: lapic cpu_index=00, node_id=00, apic_id=00 |
| SRAT: lapic cpu_index=01, node_id=00, apic_id=01 |
| SRAT: lapic cpu_index=02, node_id=00, apic_id=02 |
| SRAT: lapic cpu_index=03, node_id=00, apic_id=03 |
| SRAT: lapic cpu_index=04, node_id=00, apic_id=04 |
| SRAT: lapic cpu_index=05, node_id=00, apic_id=05 |
| SRAT: lapic cpu_index=06, node_id=00, apic_id=06 |
| SRAT: lapic cpu_index=07, node_id=00, apic_id=07 |
| SRAT: lapic cpu_index=08, node_id=01, apic_id=08 |
| SRAT: lapic cpu_index=09, node_id=01, apic_id=09 |
| SRAT: lapic cpu_index=0a, node_id=01, apic_id=0a |
| SRAT: lapic cpu_index=0b, node_id=01, apic_id=0b |
| SRAT: lapic cpu_index=0c, node_id=01, apic_id=0c |
| SRAT: lapic cpu_index=0d, node_id=01, apic_id=0d |
| SRAT: lapic cpu_index=0e, node_id=01, apic_id=0e |
| SRAT: lapic cpu_index=0f, node_id=01, apic_id=0f |
| SRAT: lapic cpu_index=10, node_id=02, apic_id=20 |
| SRAT: lapic cpu_index=11, node_id=02, apic_id=21 |
| SRAT: lapic cpu_index=12, node_id=02, apic_id=22 |
| SRAT: lapic cpu_index=13, node_id=02, apic_id=23 |
| SRAT: lapic cpu_index=14, node_id=02, apic_id=24 |
| SRAT: lapic cpu_index=15, node_id=02, apic_id=25 |
| SRAT: lapic cpu_index=16, node_id=02, apic_id=26 |
| SRAT: lapic cpu_index=17, node_id=02, apic_id=27 |
| SRAT: lapic cpu_index=18, node_id=03, apic_id=28 |
| SRAT: lapic cpu_index=19, node_id=03, apic_id=29 |
| SRAT: lapic cpu_index=1a, node_id=03, apic_id=2a |
| SRAT: lapic cpu_index=1b, node_id=03, apic_id=2b |
| SRAT: lapic cpu_index=1c, node_id=03, apic_id=2c |
| SRAT: lapic cpu_index=1d, node_id=03, apic_id=2d |
| SRAT: lapic cpu_index=1e, node_id=03, apic_id=2e |
| SRAT: lapic cpu_index=1f, node_id=03, apic_id=2f |
| set_srat_mem: dev DOMAIN: 0000, res->index=0007 startk=00000000, sizek=00300000 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=002ffd00 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0030 startk=00400000, sizek=00d00000 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0041 startk=01100000, sizek=01000000 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0052 startk=02100000, sizek=01000000 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0063 startk=03100000, sizek=01000000 |
| ACPI: added table 8/32, length now 68 |
| ACPI: * SLIT at bfd9fd00 |
| ACPI: added table 9/32, length now 72 |
| ACPI: * SRAT at bfd9fd40 |
| SRAT: lapic cpu_index=00, node_id=00, apic_id=00 |
| SRAT: lapic cpu_index=01, node_id=00, apic_id=01 |
| SRAT: lapic cpu_index=02, node_id=00, apic_id=02 |
| SRAT: lapic cpu_index=03, node_id=00, apic_id=03 |
| SRAT: lapic cpu_index=04, node_id=00, apic_id=04 |
| SRAT: lapic cpu_index=05, node_id=00, apic_id=05 |
| SRAT: lapic cpu_index=06, node_id=00, apic_id=06 |
| SRAT: lapic cpu_index=07, node_id=00, apic_id=07 |
| SRAT: lapic cpu_index=08, node_id=01, apic_id=08 |
| SRAT: lapic cpu_index=09, node_id=01, apic_id=09 |
| SRAT: lapic cpu_index=0a, node_id=01, apic_id=0a |
| SRAT: lapic cpu_index=0b, node_id=01, apic_id=0b |
| SRAT: lapic cpu_index=0c, node_id=01, apic_id=0c |
| SRAT: lapic cpu_index=0d, node_id=01, apic_id=0d |
| SRAT: lapic cpu_index=0e, node_id=01, apic_id=0e |
| SRAT: lapic cpu_index=0f, node_id=01, apic_id=0f |
| SRAT: lapic cpu_index=10, node_id=02, apic_id=20 |
| SRAT: lapic cpu_index=11, node_id=02, apic_id=21 |
| SRAT: lapic cpu_index=12, node_id=02, apic_id=22 |
| SRAT: lapic cpu_index=13, node_id=02, apic_id=23 |
| SRAT: lapic cpu_index=14, node_id=02, apic_id=24 |
| SRAT: lapic cpu_index=15, node_id=02, apic_id=25 |
| SRAT: lapic cpu_index=16, node_id=02, apic_id=26 |
| SRAT: lapic cpu_index=17, node_id=02, apic_id=27 |
| SRAT: lapic cpu_index=18, node_id=03, apic_id=28 |
| SRAT: lapic cpu_index=19, node_id=03, apic_id=29 |
| SRAT: lapic cpu_index=1a, node_id=03, apic_id=2a |
| SRAT: lapic cpu_index=1b, node_id=03, apic_id=2b |
| SRAT: lapic cpu_index=1c, node_id=03, apic_id=2c |
| SRAT: lapic cpu_index=1d, node_id=03, apic_id=2d |
| SRAT: lapic cpu_index=1e, node_id=03, apic_id=2e |
| SRAT: lapic cpu_index=1f, node_id=03, apic_id=2f |
| set_srat_mem: dev DOMAIN: 0000, res->index=0007 startk=00000000, sizek=00300000 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=002ffd00 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0030 startk=00400000, sizek=00d00000 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0041 startk=01100000, sizek=01000000 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0052 startk=02100000, sizek=01000000 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0063 startk=03100000, sizek=01000000 |
| ACPI: added table 10/32, length now 76 |
| ACPI: * SLIT at bfda0060 |
| ACPI: added table 11/32, length now 80 |
| ACPI: * SRAT at bfda00a0 |
| SRAT: lapic cpu_index=00, node_id=00, apic_id=00 |
| SRAT: lapic cpu_index=01, node_id=00, apic_id=01 |
| SRAT: lapic cpu_index=02, node_id=00, apic_id=02 |
| SRAT: lapic cpu_index=03, node_id=00, apic_id=03 |
| SRAT: lapic cpu_index=04, node_id=00, apic_id=04 |
| SRAT: lapic cpu_index=05, node_id=00, apic_id=05 |
| SRAT: lapic cpu_index=06, node_id=00, apic_id=06 |
| SRAT: lapic cpu_index=07, node_id=00, apic_id=07 |
| SRAT: lapic cpu_index=08, node_id=01, apic_id=08 |
| SRAT: lapic cpu_index=09, node_id=01, apic_id=09 |
| SRAT: lapic cpu_index=0a, node_id=01, apic_id=0a |
| SRAT: lapic cpu_index=0b, node_id=01, apic_id=0b |
| SRAT: lapic cpu_index=0c, node_id=01, apic_id=0c |
| SRAT: lapic cpu_index=0d, node_id=01, apic_id=0d |
| SRAT: lapic cpu_index=0e, node_id=01, apic_id=0e |
| SRAT: lapic cpu_index=0f, node_id=01, apic_id=0f |
| SRAT: lapic cpu_index=10, node_id=02, apic_id=20 |
| SRAT: lapic cpu_index=11, node_id=02, apic_id=21 |
| SRAT: lapic cpu_index=12, node_id=02, apic_id=22 |
| SRAT: lapic cpu_index=13, node_id=02, apic_id=23 |
| SRAT: lapic cpu_index=14, node_id=02, apic_id=24 |
| SRAT: lapic cpu_index=15, node_id=02, apic_id=25 |
| SRAT: lapic cpu_index=16, node_id=02, apic_id=26 |
| SRAT: lapic cpu_index=17, node_id=02, apic_id=27 |
| SRAT: lapic cpu_index=18, node_id=03, apic_id=28 |
| SRAT: lapic cpu_index=19, node_id=03, apic_id=29 |
| SRAT: lapic cpu_index=1a, node_id=03, apic_id=2a |
| SRAT: lapic cpu_index=1b, node_id=03, apic_id=2b |
| SRAT: lapic cpu_index=1c, node_id=03, apic_id=2c |
| SRAT: lapic cpu_index=1d, node_id=03, apic_id=2d |
| SRAT: lapic cpu_index=1e, node_id=03, apic_id=2e |
| SRAT: lapic cpu_index=1f, node_id=03, apic_id=2f |
| set_srat_mem: dev DOMAIN: 0000, res->index=0007 startk=00000000, sizek=00300000 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=002ffd00 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0030 startk=00400000, sizek=00d00000 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0041 startk=01100000, sizek=01000000 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0052 startk=02100000, sizek=01000000 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0063 startk=03100000, sizek=01000000 |
| ACPI: added table 12/32, length now 84 |
| ACPI: * SLIT at bfda03c0 |
| ACPI: added table 13/32, length now 88 |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| ACPI: * IVRS at bfda0400 |
| ACPI: added table 14/32, length now 92 |
| ACPI: * HPET |
| ACPI: added table 15/32, length now 96 |
| CBFS @ 200 size fffe00 |
| CBFS: 'Master Header Locator' located CBFS at [200:1000000) |
| CBFS: Locating 'pci1002,67ef.rom' |
| CBFS: 'pci1002,67ef.rom' not found. |
| PCI Option ROM loading disabled for PCI: 01:00.0 |
| pci_rom_acpi_fill_vfct failed |
| ACPI: done. |
| ACPI tables: 29952 bytes. |
| smbios_write_tables: bfd88000 |
| DOMAIN: 0000 (AMD Family 10h/15h Root Complex) |
| SMBIOS tables: 964 bytes. |
| Writing table forward entry at 0x00000500 |
| Wrote coreboot table at: 00000500, 0x10 bytes, checksum 5002 |
| Writing coreboot table at 0xbfdbf000 |
| CBFS @ 200 size fffe00 |
| CBFS: 'Master Header Locator' located CBFS at [200:1000000) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1. 0000000000001000-000000000009ffff: RAM |
| 2. 00000000000a0000-00000000000bffff: RESERVED |
| 3. 00000000000c0000-0000000000dfffff: RAM |
| 4. 0000000000e00000-0000000000f1dfff: RAMSTAGE |
| 5. 0000000000f1e000-00000000bfd87fff: RAM |
| 6. 00000000bfd88000-00000000bfffffff: CONFIGURATION TABLES |
| 7. 00000000c0000000-00000000cfffffff: RESERVED |
| 8. 00000000eec00000-00000000eec03fff: RESERVED |
| 9. 00000000feb00000-00000000feb00fff: RESERVED |
| 10. 00000000fec00000-00000000fec00fff: RESERVED |
| 11. 00000000fed00000-00000000fed00fff: RESERVED |
| 12. 00000000fed40000-00000000fed44fff: RESERVED |
| 13. 0000000100000000-000000103fffffff: RAM |
| Manufacturer: ef |
| SF: Detected W25Q128_V with sector size 0x1000, total 0x1000000 |
| CBFS @ 200 size fffe00 |
| CBFS: 'Master Header Locator' located CBFS at [200:1000000) |
| Wrote coreboot table at: bfdbf000, 0x1160 bytes, checksum 5eec |
| coreboot table: 4472 bytes. |
| IMD ROOT 0. bffff000 00001000 |
| IMD SMALL 1. bfffe000 00001000 |
| CAR GLOBALS 2. bfff3000 0000a800 |
| CONSOLE 3. bffd3000 00020000 |
| TIME STAMP 4. bffd2000 00000910 |
| AMDMEM INFO 5. bffc8000 000093fc |
| ACPI RESUME 6. bfdc7000 00201000 |
| COREBOOT 7. bfdbf000 00008000 |
| IRQ TABLE 8. bfdbe000 00001000 |
| SMP TABLE 9. bfdbd000 00001000 |
| ACPI 10. bfd99000 00024000 |
| TPM2 TCGLOG11. bfd89000 00010000 |
| SMBIOS 12. bfd88000 00000800 |
| IMD small region: |
| IMD ROOT 0. bfffec00 00000400 |
| ROMSTAGE 1. bfffebe0 00000004 |
| GDT 2. bfffe9e0 00000200 |
| COREBOOTFWD 3. bfffe9a0 00000028 |
| Timestamp - finalize chips: 98928526209 |
| Writing AMD DCT configuration to Flash |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| CBFS @ 200 size fffe00 |
| CBFS: 'Master Header Locator' located CBFS at [200:1000000) |
| CBFS: Locating 's3nv' |
| CBFS: Found @ offset 2fdc0 size 10000 |
| Manufacturer: ef |
| SF: Detected W25Q128_V with sector size 0x1000, total 0x1000000 |
| SF: Successfully erased 32768 bytes @ 0x38000 |
| FMAP: area COREBOOT found @ 200 (16776704 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 2b240 size dc4 |
| BS: BS_WRITE_TABLES times (us): entry 0 run 2138460 exit 0 |
| POST: 0x7a |
| Timestamp - load payload: 101239756115 |
| CBFS @ 200 size fffe00 |
| CBFS: 'Master Header Locator' located CBFS at [200:1000000) |
| CBFS: Locating 'fallback/payload' |
| CBFS: Found @ offset b70c0 size 12a1a |
| Checking segment from ROM address 0xff0b72f8 |
| Checking segment from ROM address 0xff0b7314 |
| Loading segment from ROM address 0xff0b72f8 |
| code (compression=2) |
| New segment dstaddr 0x000e58c0 memsize 0x1a740 srcaddr 0xff0b7330 filesize 0x129e2 |
| Loading Segment: addr: 0x000e58c0 memsz: 0x000000000001a740 filesz: 0x00000000000129e2 |
| using LZ4 |
| Timestamp - starting LZ4 decompress (ignore for x86): 101374292837 |
| Timestamp - finished LZ4 decompress (ignore for x86): 101676259174 |
| [ 0x000e58c0, 00100000, 0x00100000) <- ff0b7330 |
| Loading segment from ROM address 0xff0b7314 |
| Entry Point 0x000fd75e |
| Loaded segments |
| BS: BS_PAYLOAD_LOAD times (us): entry 0 run 139874 exit 0 |
| POST: 0x7b |
| Jumping to boot code at 000fd75e(bfdbf000) |
| POST: 0xf8 |
| Timestamp - selfboot jump: 101757371604 |
| CPU0: stack: 00e56000 - 00e57000, lowest used address 00e569cc, stack used: 1588 bytes |
| |