blob: 6efa7e535aa0cb6c8089d809abe1781e26311759 [file] [log] [blame]
*** Pre-CBMEM romstage console overflowed, log truncated! ***
djusted value (post nibble): 0038
Lane 05 nibble 0 raw readback: 003d
Lane 05 nibble 0 adjusted value (pre nibble): 003d
Lane 05 nibble 0 adjusted value (post nibble): 003d
Lane 06 nibble 0 raw readback: 0051
Lane 06 nibble 0 adjusted value (pre nibble): 0051
Lane 06 nibble 0 adjusted value (post nibble): 0051
Lane 07 nibble 0 raw readback: 0051
Lane 07 nibble 0 adjusted value (pre nibble): 0051
Lane 07 nibble 0 adjusted value (post nibble): 0051
original critical gross delay: 0
new critical gross delay: 0
DIMM 1 RttNom: 3
Going to send DCT 1 DIMM 1 rank 0 MR1 control word 00440046
DIMM 1 RttNom: 3
DIMM 1 RttWr: 0
Going to send DCT 1 DIMM 1 rank 0 MR2 control word 00480098
DIMM 1 RttWr: 0
DIMM 1 RttNom: 3
Going to send DCT 1 DIMM 1 rank 1 MR1 control word 00640046
DIMM 1 RttNom: 3
DIMM 1 RttWr: 0
Going to send DCT 1 DIMM 1 rank 1 MR2 control word 00680098
DIMM 1 RttWr: 0
fam15_receiver_enable_training_seed: using seed: 0039
fam15_receiver_enable_training_seed: using seed: 0039
fam15_receiver_enable_training_seed: using seed: 0032
fam15_receiver_enable_training_seed: using seed: 0032
TrainRcvrEn: Status 2200
TrainRcvrEn: ErrStatus 0
TrainRcvrEn: ErrCode 0
TrainRcvrEn: Done
TrainDQSReceiverEnCyc: Status 2200
TrainDQSReceiverEnCyc: TrainErrors 4000
TrainDQSReceiverEnCyc: ErrStatus 4000
TrainDQSReceiverEnCyc: ErrCode 0
TrainDQSReceiverEnCyc: Done
TrainMaxRdLatency: Status 2200
TrainMaxRdLatency: ErrStatus 4000
TrainMaxRdLatency: ErrCode 0
TrainMaxRdLatency: Done
mctAutoInitMCT_D: :OtherTiming
InterleaveNodes_D: Status 2200
InterleaveNodes_D: ErrStatus 4000
InterleaveNodes_D: ErrCode 0
InterleaveNodes_D: Done
InterleaveChannels_D: Node 0
InterleaveChannels_D: Status 2200
InterleaveChannels_D: ErrStatus 4000
InterleaveChannels_D: ErrCode 0
InterleaveChannels_D: Node 1
InterleaveChannels_D: Status 2000
InterleaveChannels_D: ErrStatus 0
InterleaveChannels_D: ErrCode 0
InterleaveChannels_D: Node 2
InterleaveChannels_D: Status 2000
InterleaveChannels_D: ErrStatus 0
InterleaveChannels_D: ErrCode 0
InterleaveChannels_D: Node 3
InterleaveChannels_D: Status 2000
InterleaveChannels_D: ErrStatus 0
InterleaveChannels_D: ErrCode 0
InterleaveChannels_D: Node 4
InterleaveChannels_D: Status 2000
InterleaveChannels_D: ErrStatus 0
InterleaveChannels_D: ErrCode 0
InterleaveChannels_D: Node 5
InterleaveChannels_D: Status 2000
InterleaveChannels_D: ErrStatus 0
InterleaveChannels_D: ErrCode 0
InterleaveChannels_D: Node 6
InterleaveChannels_D: Status 2000
InterleaveChannels_D: ErrStatus 0
InterleaveChannels_D: ErrCode 0
InterleaveChannels_D: Node 7
InterleaveChannels_D: Status 2000
InterleaveChannels_D: ErrStatus 0
InterleaveChannels_D: ErrCode 0
InterleaveChannels_D: Done
mctAutoInitMCT_D: CPUMemTyping_D
CPUMemTyping: Cache32bTOP:c00000
CPUMemTyping: Bottom32bIO:c00000
CPUMemTyping: Bottom40bIO:4400000
mctAutoInitMCT_D: UMAMemTyping_D
mctAutoInitMCT_D: mct_ForceNBPState0_Dis_Fam15
mctAutoInitMCT_D Done: Global Status: 10
raminit_amdmct end:
CBMEM:
IMD: root @ bffff000 254 entries.
IMD: root @ bfffec00 62 entries.
amdmct_cbmem_store_info: Storing AMDMCT configuration in CBMEM
disable_spd()
CBFS: 'Master Header Locator' located CBFS at [200:3fffc0)
CBFS: Locating 'fallback/ramstage'
CBFS: Found @ offset 3fe00 size 15495
coreboot-4.7-641-g91c8e23e01 Thu Apr 5 16:00:27 UTC 2018 ramstage starting...
Moving GDT to bfffe9e0...ok
Normal boot.
BS: BS_PRE_DEVICE times (us): entry 0 run 1 exit 0
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 1 exit 0
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:18.0: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:00.1: enabled 1
PCI: 00:00.2: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 0
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:09.0: enabled 1
PCI: 00:0a.0: enabled 1
PCI: 00:0b.0: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.1: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.1: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 00:50: enabled 1
I2C: 00:51: enabled 1
I2C: 00:52: enabled 1
I2C: 00:53: enabled 1
I2C: 00:54: enabled 1
I2C: 00:55: enabled 1
I2C: 00:56: enabled 1
I2C: 00:57: enabled 1
I2C: 00:2f: enabled 1
PCI: 00:14.1: enabled 1
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PNP: 002e.0: enabled 0
PNP: 002e.1: enabled 0
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.106: enabled 0
PNP: 002e.107: enabled 0
PNP: 002e.207: enabled 0
PNP: 002e.307: enabled 0
PNP: 002e.407: enabled 0
PNP: 002e.8: enabled 0
PNP: 002e.108: enabled 0
PNP: 002e.9: enabled 0
PNP: 002e.109: enabled 0
PNP: 002e.209: enabled 0
PNP: 002e.309: enabled 0
PNP: 002e.a: enabled 1
PNP: 002e.b: enabled 1
PNP: 002e.c: enabled 0
PNP: 002e.d: enabled 0
PNP: 002e.f: enabled 0
PCI: 00:14.4: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 1
PCI: 00:05.0: enabled 1
PCI: 00:14.5: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
PCI: 00:19.0: enabled 1
PCI: 00:19.1: enabled 1
PCI: 00:19.2: enabled 1
PCI: 00:19.3: enabled 1
PCI: 00:19.4: enabled 1
PCI: 00:19.5: enabled 1
Compare with tree...
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:18.0: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:00.1: enabled 1
PCI: 00:00.2: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 0
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:09.0: enabled 1
PCI: 00:0a.0: enabled 1
PCI: 00:0b.0: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.1: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.1: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 00:50: enabled 1
I2C: 00:51: enabled 1
I2C: 00:52: enabled 1
I2C: 00:53: enabled 1
I2C: 00:54: enabled 1
I2C: 00:55: enabled 1
I2C: 00:56: enabled 1
I2C: 00:57: enabled 1
I2C: 00:2f: enabled 1
PCI: 00:14.1: enabled 1
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PNP: 002e.0: enabled 0
PNP: 002e.1: enabled 0
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.106: enabled 0
PNP: 002e.107: enabled 0
PNP: 002e.207: enabled 0
PNP: 002e.307: enabled 0
PNP: 002e.407: enabled 0
PNP: 002e.8: enabled 0
PNP: 002e.108: enabled 0
PNP: 002e.9: enabled 0
PNP: 002e.109: enabled 0
PNP: 002e.209: enabled 0
PNP: 002e.309: enabled 0
PNP: 002e.a: enabled 1
PNP: 002e.b: enabled 1
PNP: 002e.c: enabled 0
PNP: 002e.d: enabled 0
PNP: 002e.f: enabled 0
PCI: 00:14.4: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 1
PCI: 00:05.0: enabled 1
PCI: 00:14.5: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
PCI: 00:19.0: enabled 1
PCI: 00:19.1: enabled 1
PCI: 00:19.2: enabled 1
PCI: 00:19.3: enabled 1
PCI: 00:19.4: enabled 1
PCI: 00:19.5: enabled 1
Mainboard KCMA-D8 initializing, dev=0x0012ca20
mainboard_enable, TOP MEM: msr.lo = 0xc0000000, msr.hi = 0x00000000
mainboard_enable, TOP MEM2: msr2.lo = 0x40000000, msr2.hi = 0x00000004
Root Device scanning...
root_dev_scan_bus for Root Device
setup_bsp_ramtop, TOP MEM: msr.lo = 0xc0000000, msr.hi = 0x00000000
setup_bsp_ramtop, TOP MEM2: msr.lo = 0x40000000, msr.hi = 0x00000004
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
CPU_CLUSTER: 0 scanning...
PCI: 00:18.5 siblings=7
CPU: APIC: 00 enabled
CPU: APIC: 01 enabled
CPU: APIC: 02 enabled
CPU: APIC: 03 enabled
CPU: APIC: 04 enabled
CPU: APIC: 05 enabled
CPU: APIC: 06 enabled
CPU: APIC: 07 enabled
scan_bus: scanning of bus CPU_CLUSTER: 0 took 12044 usecs
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:18.0 [1022/1600] bus ops
PCI: 00:18.0 [1022/1600] enabled
PCI: 00:18.1 [1022/1601] enabled
PCI: 00:18.2 [1022/1602] enabled
PCI: 00:18.3 [1022/1603] ops
PCI: 00:18.3 [1022/1603] enabled
PCI: 00:18.4 [1022/1604] ops
PCI: 00:18.4 [1022/1604] enabled
PCI: 00:18.5 [1022/1605] ops
PCI: 00:18.5 [1022/1605] enabled
PCI: Static device PCI: 00:19.0 not found, disabling it.
PCI: Static device PCI: 00:19.1 not found, disabling it.
PCI: Static device PCI: 00:19.2 not found, disabling it.
PCI: Static device PCI: 00:19.3 not found, disabling it.
PCI: Static device PCI: 00:19.4 not found, disabling it.
PCI: Static device PCI: 00:19.5 not found, disabling it.
PCI: 00:18.0 scanning...
do_hypertransport_scan_chain for bus 00
sr5650_enable: dev=0012f200, VID_DID=0x5a121002
Bus-0, Dev-0, Fun-0.
enable_pcie_bar3
sr5650_gpp_sb_init: nb_dev=0x0012f200, dev=0x0012ec60, port=0x8
PciePowerOffGppPorts() port 8
NB_PCI_REG04 = 2.
NB_PCI_REG84 = 3000010.
NB_PCI_REG4C = 52042.
Sysmem TOM = 0_c0000000
Sysmem TOM2 = 4_40000000
PCI: 00:00.0 [1002/5a12] ops
PCI: 00:00.0 [1002/5a12] enabled
Capability: type 0x08 @ 0xf0
flags: 0xa803
Capability: type 0x08 @ 0xf0
Capability: type 0x08 @ 0xc4
flags: 0x0280
PCI: 00:00.0 count: 0014 static_count: 0015
PCI: 00:00.0 [1002/5a12] enabled next_unitid: 0015
PCI: pci_scan_bus for bus 00
sr5650_enable: dev=0012f200, VID_DID=0x5a121002
Bus-0, Dev-0, Fun-0.
enable_pcie_bar3
sr5650_gpp_sb_init: nb_dev=0x0012f200, dev=0x0012ec60, port=0x8
PciePowerOffGppPorts() port 8
NB_PCI_REG04 = 2.
NB_PCI_REG84 = 3000010.
NB_PCI_REG4C = 52042.
Sysmem TOM = 0_c0000000
Sysmem TOM2 = 4_40000000
PCI: 00:00.0 [1002/5a12] enabled
sr5650_enable: dev=0012f160, VID_DID=0xffffffff
Bus-0, Dev-0, Fun-1.
PCI: Static device PCI: 00:00.1 not found, disabling it.
sr5650_enable: dev=0012f0c0, VID_DID=0x5a231002
Bus-0, Dev-0, Fun-2.
PCI: 00:00.2 [1002/5a23] ops
PCI: 00:00.2 [1002/5a23] enabled
sr5650_enable: dev=0012f020, VID_DID=0xffffffff
Bus-0, Dev-2,3, Fun-0. enable=1
sr5650_gpp_sb_init: nb_dev=0x0012f200, dev=0x0012f020, port=0x2
PcieLinkTraining port=2:lc current state=2030400
sr5650_gpp_sb_init: port=0x2 hw_port=0x2 result=0
PciePowerOffGppPorts() port 2
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:02.0 subordinate bus PCI Express
PCI: 00:02.0 [1002/5a16] enabled
sr5650_enable: dev=0012ef80, VID_DID=0xffffffff
Bus-0, Dev-2,3, Fun-0. enable=0
sr5650_enable: dev=0012eee0, VID_DID=0xffffffff
enable_pcie_bar3
Bus-0, Dev-4,5,6,7, Fun-0. enable=1
sr5650_gpp_sb_init: nb_dev=0x0012f200, dev=0x0012eee0, port=0x4
PcieLinkTraining port=4:lc current state=a0b0f10
addr=c0000000,bus=0,devfn=20
PcieTrainPort reg=0x10000
sr5650_gpp_sb_init: port=0x4 hw_port=0x4 result=1
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:04.0 subordinate bus PCI Express
PCI: 00:04.0 [1002/5a18] enabled
sr5650_enable: dev=0012ee40, VID_DID=0xffffffff
enable_pcie_bar3
Bus-0, Dev-4,5,6,7, Fun-0. enable=0
sr5650_enable: dev=0012eda0, VID_DID=0xffffffff
enable_pcie_bar3
Bus-0, Dev-4,5,6,7, Fun-0. enable=0
sr5650_enable: dev=0012ed00, VID_DID=0xffffffff
enable_pcie_bar3
Bus-0, Dev-4,5,6,7, Fun-0. enable=0
sr5650_enable: dev=0012ec60, VID_DID=0xffffffff
Bus-0, Dev-8, Fun-0. enable=0
disable_pcie_bar3
sr5650_enable: dev=0012ebc0, VID_DID=0xffffffff
Bus-0, Dev-9, 10, Fun-0. enable=1
enable_pcie_bar3
sr5650_gpp_sb_init: nb_dev=0x0012f200, dev=0x0012ebc0, port=0x9
PcieLinkTraining port=5:lc current state=a0b0f10
addr=c0000000,bus=0,devfn=48
PcieTrainPort reg=0x10000
sr5650_gpp_sb_init: port=0x9 hw_port=0x5 result=1
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:09.0 subordinate bus PCI Express
PCI: 00:09.0 [1002/5a1c] enabled
sr5650_enable: dev=0012eb20, VID_DID=0xffffffff
Bus-0, Dev-9, 10, Fun-0. enable=1
enable_pcie_bar3
sr5650_gpp_sb_init: nb_dev=0x0012f200, dev=0x0012eb20, port=0xa
PcieLinkTraining port=6:lc current state=a0b0f10
addr=c0000000,bus=0,devfn=50
PcieTrainPort reg=0x10000
sr5650_gpp_sb_init: port=0xa hw_port=0x6 result=1
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:0a.0 subordinate bus PCI Express
PCI: 00:0a.0 [1002/5a1d] enabled
sr5650_enable: dev=0012ea80, VID_DID=0xffffffff
Bus-0, Dev-11,12, Fun-0. enable=1
sr5650_gpp_sb_init: nb_dev=0x0012f200, dev=0x0012ea80, port=0xb
PcieLinkTraining port=b:lc current state=2030400
sr5650_gpp_sb_init: port=0xb hw_port=0xb result=0
PciePowerOffGppPorts() port 11
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:0b.0 subordinate bus PCI Express
PCI: 00:0b.0 [1002/5a1f] enabled
sb7xx_51xx_enable()
PCI: 00:11.0 [1002/4390] ops
PCI: 00:11.0 [1002/4390] enabled
sb7xx_51xx_enable()
PCI: 00:12.0 [1002/4397] ops
PCI: 00:12.0 [1002/4397] enabled
sb7xx_51xx_enable()
PCI: 00:12.1 [1002/4398] ops
PCI: 00:12.1 [1002/4398] enabled
sb7xx_51xx_enable()
PCI: 00:12.2 [1002/4396] ops
PCI: 00:12.2 [1002/4396] enabled
sb7xx_51xx_enable()
PCI: 00:13.0 [1002/4397] ops
PCI: 00:13.0 [1002/4397] enabled
sb7xx_51xx_enable()
PCI: 00:13.1 [1002/4398] ops
PCI: 00:13.1 [1002/4398] enabled
sb7xx_51xx_enable()
PCI: 00:13.2 [1002/4396] ops
PCI: 00:13.2 [1002/4396] enabled
sb7xx_51xx_enable()
PCI: 00:14.0 [1002/4385] bus ops
PCI: 00:14.0 [1002/4385] enabled
sb7xx_51xx_enable()
PCI: 00:14.1 [1002/439c] ops
PCI: 00:14.1 [1002/439c] enabled
sb7xx_51xx_enable()
PCI: 00:14.2 [1002/4383] ops
PCI: 00:14.2 [1002/4383] enabled
sb7xx_51xx_enable()
PCI: 00:14.3 [1002/439d] bus ops
PCI: 00:14.3 [1002/439d] enabled
sb7xx_51xx_enable()
PCI: 00:14.4 [1002/4384] bus ops
PCI: 00:14.4 [1002/4384] enabled
sb7xx_51xx_enable()
PCI: 00:14.5 [1002/4399] ops
PCI: 00:14.5 [1002/4399] enabled
PCI: 00:02.0 scanning...
do_pci_scan_bridge for PCI: 00:02.0
PCI: pci_scan_bus for bus 01
scan_bus: scanning of bus PCI: 00:02.0 took 4712 usecs
PCI: 00:04.0 scanning...
do_pci_scan_bridge for PCI: 00:04.0
PCI: pci_scan_bus for bus 02
scan_bus: scanning of bus PCI: 00:04.0 took 4656 usecs
PCI: 00:09.0 scanning...
do_pci_scan_bridge for PCI: 00:09.0
PCI: pci_scan_bus for bus 03
PCI: 03:00.0 [8086/10d3] enabled
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0xe0
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpoint
ASPM: Enabled None
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0xe0
Failed to enable LTR for dev = PCI: 03:00.0
scan_bus: scanning of bus PCI: 00:09.0 took 25588 usecs
PCI: 00:0a.0 scanning...
do_pci_scan_bridge for PCI: 00:0a.0
PCI: pci_scan_bus for bus 04
PCI: 04:00.0 [8086/10d3] enabled
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0xe0
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpoint
ASPM: Enabled None
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0xe0
Failed to enable LTR for dev = PCI: 04:00.0
scan_bus: scanning of bus PCI: 00:0a.0 took 25629 usecs
PCI: 00:0b.0 scanning...
do_pci_scan_bridge for PCI: 00:0b.0
PCI: pci_scan_bus for bus 05
scan_bus: scanning of bus PCI: 00:0b.0 took 4655 usecs
PCI: 00:14.0 scanning...
scan_generic_bus for PCI: 00:14.0
bus: PCI: 00:14.0[0]->I2C: 01:50 enabled
bus: PCI: 00:14.0[0]->I2C: 01:51 enabled
bus: PCI: 00:14.0[0]->I2C: 01:52 enabled
bus: PCI: 00:14.0[0]->I2C: 01:53 enabled
bus: PCI: 00:14.0[0]->I2C: 01:54 enabled
bus: PCI: 00:14.0[0]->I2C: 01:55 enabled
bus: PCI: 00:14.0[0]->I2C: 01:56 enabled
bus: PCI: 00:14.0[0]->I2C: 01:57 enabled
bus: PCI: 00:14.0[0]->I2C: 01:2f enabled
scan_generic_bus for PCI: 00:14.0 done
scan_bus: scanning of bus PCI: 00:14.0 took 23930 usecs
PCI: 00:14.3 scanning...
scan_lpc_bus for PCI: 00:14.3
PNP: 002e.0 disabled
PNP: 002e.1 disabled
PNP: 002e.2 enabled
PNP: 002e.3 enabled
PNP: 002e.5 enabled
PNP: 002e.106 disabled
PNP: 002e.107 disabled
PNP: 002e.207 disabled
PNP: 002e.307 disabled
PNP: 002e.407 disabled
PNP: 002e.8 disabled
PNP: 002e.108 disabled
PNP: 002e.9 disabled
PNP: 002e.109 disabled
PNP: 002e.209 disabled
PNP: 002e.309 disabled
PNP: 002e.a enabled
PNP: 002e.b enabled
PNP: 002e.c disabled
PNP: 002e.d disabled
PNP: 002e.f disabled
scan_lpc_bus for PCI: 00:14.3 done
scan_bus: scanning of bus PCI: 00:14.3 took 28599 usecs
PCI: 00:14.4 scanning...
do_pci_scan_bridge for PCI: 00:14.4
PCI: pci_scan_bus for bus 06
sb7xx_51xx_enable()
PCI: Static device PCI: 06:01.0 not found, disabling it.
sb7xx_51xx_enable()
PCI: Static device PCI: 06:02.0 not found, disabling it.
sb7xx_51xx_enable()
PCI: Static device PCI: 06:03.0 not found, disabling it.
sb7xx_51xx_enable()
PCI: 06:05.0 [1a03/2000] ops
PCI: 06:05.0 [1a03/2000] enabled
scan_bus: scanning of bus PCI: 00:14.4 took 20727 usecs
scan_bus: scanning of bus PCI: 00:18.0 took 647597 usecs
DOMAIN: 0000 passpw: enabled
scan_bus: scanning of bus DOMAIN: 0000 took 688428 usecs
root_dev_scan_bus for Root Device done
scan_bus: scanning of bus Root Device took 720488 usecs
done
BS: BS_DEV_ENUMERATE times (us): entry 0 run 936919 exit 0
found VGA at PCI: 06:05.0
Setting up VGA for PCI: 06:05.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:14.4
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
Adding PCIe enhanced config space BAR 0xc0000000-0xd0000000.
DOMAIN: 0000 read_resources bus 0 link: 0
PCI: 00:18.0 read_resources bus 0 link: 2
sr5690_read_resource: PCI: 00:00.0
PCI: 00:02.0 read_resources bus 1 link: 0
PCI: 00:02.0 read_resources bus 1 link: 0 done
PCI: 00:04.0 read_resources bus 2 link: 0
PCI: 00:04.0 read_resources bus 2 link: 0 done
PCI: 00:09.0 read_resources bus 3 link: 0
PCI: 00:09.0 read_resources bus 3 link: 0 done
PCI: 00:0a.0 read_resources bus 4 link: 0
PCI: 00:0a.0 read_resources bus 4 link: 0 done
PCI: 00:0b.0 read_resources bus 5 link: 0
PCI: 00:0b.0 read_resources bus 5 link: 0 done
PCI: 00:14.0 read_resources bus 1 link: 0
I2C: 01:50 missing read_resources
I2C: 01:51 missing read_resources
I2C: 01:52 missing read_resources
I2C: 01:53 missing read_resources
I2C: 01:54 missing read_resources
I2C: 01:55 missing read_resources
I2C: 01:56 missing read_resources
I2C: 01:57 missing read_resources
PCI: 00:14.0 read_resources bus 1 link: 0 done
PCI: 00:14.3 read_resources bus 0 link: 0
PCI: 00:14.3 read_resources bus 0 link: 0 done
PCI: 00:14.4 read_resources bus 6 link: 0
PCI: 00:14.4 read_resources bus 6 link: 0 done
PCI: 00:18.0 read_resources bus 0 link: 2 done
PCI: 00:18.0 read_resources bus 0 link: 0
PCI: 00:18.0 read_resources bus 0 link: 0 done
PCI: 00:18.0 read_resources bus 0 link: 1
PCI: 00:18.0 read_resources bus 0 link: 1 done
PCI: 00:18.0 read_resources bus 0 link: 3
PCI: 00:18.0 read_resources bus 0 link: 3 done
PCI: 00:18.4 read_resources bus 0 link: 0
PCI: 00:18.4 read_resources bus 0 link: 0 done
PCI: 00:18.4 read_resources bus 0 link: 1
PCI: 00:18.4 read_resources bus 0 link: 1 done
PCI: 00:18.4 read_resources bus 0 link: 2
PCI: 00:18.4 read_resources bus 0 link: 2 done
PCI: 00:18.4 read_resources bus 0 link: 3
PCI: 00:18.4 read_resources bus 0 link: 3 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
APIC: 01
APIC: 02
APIC: 03
APIC: 04
APIC: 05
APIC: 06
APIC: 07
DOMAIN: 0000 child on link 0 PCI: 00:18.0
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
DOMAIN: 0000 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
DOMAIN: 0000 resource base 0 size c0000000 align 0 gran 0 limit 0 flags e0004200 index 7
PCI: 00:18.0 child on link 0 PCI: 00:00.0
PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 210b0
PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 80200 index 210b8
PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 210d8
PCI: 00:00.0
PCI: 00:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 1200 index fc
PCI: 00:00.1
PCI: 00:00.2
PCI: 00:00.2 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 10000200 index 44
PCI: 00:02.0
PCI: 00:02.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:02.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:02.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 00:03.0
PCI: 00:04.0
PCI: 00:04.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 00:05.0
PCI: 00:06.0
PCI: 00:07.0
PCI: 00:08.0
PCI: 00:09.0 child on link 0 PCI: 03:00.0
PCI: 00:09.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 03:00.0
PCI: 03:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
PCI: 03:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
PCI: 03:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 1c
PCI: 00:0a.0 child on link 0 PCI: 04:00.0
PCI: 00:0a.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:0a.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:0a.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 04:00.0
PCI: 04:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
PCI: 04:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
PCI: 04:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 1c
PCI: 00:0b.0
PCI: 00:0b.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:0b.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:0b.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 00:11.0
PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
PCI: 00:11.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 24
PCI: 00:12.0
PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:12.1
PCI: 00:12.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:12.2
PCI: 00:12.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 00:13.0
PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:13.1
PCI: 00:13.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:13.2
PCI: 00:13.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 00:14.0 child on link 0 I2C: 01:50
PCI: 00:14.0 resource base fec00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 74
PCI: 00:14.0 resource base feb00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 9c
PCI: 00:14.0 resource base fed00000 size 400 align 8 gran 8 limit ffffffff flags d0000200 index b4
PCI: 00:14.0 resource base b00 size 10 align 8 gran 8 limit ffff flags d0000100 index 90
PCI: 00:14.0 resource base b20 size 10 align 8 gran 8 limit ffff flags d0000100 index 58
I2C: 01:50
I2C: 01:51
I2C: 01:52
I2C: 01:53
I2C: 01:54
I2C: 01:55
I2C: 01:56
I2C: 01:57
I2C: 01:2f
PCI: 00:14.1
PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
PCI: 00:14.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
PCI: 00:14.2
PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
PCI: 00:14.3 child on link 0 PNP: 002e.0
PCI: 00:14.3 resource base 0 size 1 align 12 gran 0 limit ffffffff flags 200 index a0
PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PNP: 002e.0
PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.1
PNP: 002e.1 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.2
PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60
PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.3
PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60
PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.5
PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62
PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72
PNP: 002e.106
PNP: 002e.106 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 62
PNP: 002e.107
PNP: 002e.207
PNP: 002e.307
PNP: 002e.407
PNP: 002e.8
PNP: 002e.108
PNP: 002e.9
PNP: 002e.109
PNP: 002e.209
PNP: 002e.309
PNP: 002e.a
PNP: 002e.b
PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit fff flags c0000100 index 60
PNP: 002e.b resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.c
PNP: 002e.d
PNP: 002e.f
PCI: 00:14.4 child on link 0 PCI: 06:01.0
PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 06:01.0
PCI: 06:02.0
PCI: 06:03.0
PCI: 06:05.0
PCI: 06:05.0 resource base 0 size 800000 align 23 gran 23 limit ffffffff flags 200 index 10
PCI: 06:05.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 14
PCI: 06:05.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 18
PCI: 00:14.5
PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:18.1
PCI: 00:18.2
PCI: 00:18.3
PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 200 index 94
PCI: 00:18.4
PCI: 00:18.5
PCI: 00:19.0
PCI: 00:19.1
PCI: 00:19.2
PCI: 00:19.3
PCI: 00:19.4
PCI: 00:19.5
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:18.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:02.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 00:02.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:04.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 00:04.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:09.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 03:00.0 18 * [0x0 - 0x1f] io
PCI: 00:09.0 io: base: 20 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:0a.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 04:00.0 18 * [0x0 - 0x1f] io
PCI: 00:0a.0 io: base: 20 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:0b.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 00:0b.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 06:05.0 18 * [0x0 - 0x7f] io
PCI: 00:14.4 io: base: 80 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:09.0 1c * [0x0 - 0xfff] io
PCI: 00:0a.0 1c * [0x1000 - 0x1fff] io
PCI: 00:14.4 1c * [0x2000 - 0x2fff] io
PCI: 00:11.0 20 * [0x3000 - 0x300f] io
PCI: 00:14.1 20 * [0x3010 - 0x301f] io
PCI: 00:11.0 10 * [0x3020 - 0x3027] io
PCI: 00:11.0 18 * [0x3028 - 0x302f] io
PCI: 00:14.1 10 * [0x3030 - 0x3037] io
PCI: 00:14.1 18 * [0x3038 - 0x303f] io
PCI: 00:11.0 14 * [0x3040 - 0x3043] io
PCI: 00:11.0 1c * [0x3044 - 0x3047] io
PCI: 00:14.1 14 * [0x3048 - 0x304b] io
PCI: 00:14.1 1c * [0x304c - 0x304f] io
PCI: 00:18.0 io: base: 3050 size: 4000 align: 12 gran: 12 limit: ffff done
PCI: 00:18.0 210d8 * [0x0 - 0x3fff] io
DOMAIN: 0000 io: base: 4000 size: 4000 align: 12 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:18.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff
PCI: 00:02.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:02.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:04.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:04.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:09.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:09.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:0a.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:0a.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:0b.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:0b.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:00.0 fc * [0x0 - 0xff] prefmem
PCI: 00:18.0 prefmem: base: 100 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:18.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff
PCI: 00:02.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:02.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:04.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:04.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:09.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 03:00.0 10 * [0x0 - 0x1ffff] mem
PCI: 03:00.0 1c * [0x20000 - 0x23fff] mem
PCI: 00:09.0 mem: base: 24000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:0a.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 04:00.0 10 * [0x0 - 0x1ffff] mem
PCI: 04:00.0 1c * [0x20000 - 0x23fff] mem
PCI: 00:0a.0 mem: base: 24000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:0b.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:0b.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 06:05.0 10 * [0x0 - 0x7fffff] mem
PCI: 06:05.0 14 * [0x800000 - 0x81ffff] mem
PCI: 00:14.4 mem: base: 820000 size: 900000 align: 23 gran: 20 limit: ffffffff done
PCI: 00:14.4 20 * [0x0 - 0x8fffff] mem
PCI: 00:09.0 20 * [0x900000 - 0x9fffff] mem
PCI: 00:0a.0 20 * [0xa00000 - 0xafffff] mem
PCI: 00:00.2 44 * [0xb00000 - 0xb03fff] mem
PCI: 00:14.2 10 * [0xb04000 - 0xb07fff] mem
PCI: 00:12.0 10 * [0xb08000 - 0xb08fff] mem
PCI: 00:12.1 10 * [0xb09000 - 0xb09fff] mem
PCI: 00:13.0 10 * [0xb0a000 - 0xb0afff] mem
PCI: 00:13.1 10 * [0xb0b000 - 0xb0bfff] mem
PCI: 00:14.5 10 * [0xb0c000 - 0xb0cfff] mem
PCI: 00:11.0 24 * [0xb0d000 - 0xb0d3ff] mem
PCI: 00:12.2 10 * [0xb0e000 - 0xb0e0ff] mem
PCI: 00:13.2 10 * [0xb0f000 - 0xb0f0ff] mem
PCI: 00:14.3 a0 * [0xb10000 - 0xb10000] mem
PCI: 00:18.0 mem: base: b10001 size: c00000 align: 23 gran: 20 limit: ffffffff done
PCI: 00:18.3 94 * [0x0 - 0x3ffffff] mem
PCI: 00:18.0 210b8 * [0x4000000 - 0x4bfffff] mem
PCI: 00:18.0 210b0 * [0x4c00000 - 0x4cfffff] prefmem
DOMAIN: 0000 mem: base: 4d00000 size: 4d00000 align: 26 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: DOMAIN: 0000 c0010058 base c0000000 limit cfffffff mem (fixed)
constrain_resources: DOMAIN: 0000 07 base 00000000 limit bfffffff mem (fixed)
constrain_resources: PCI: 00:14.0 74 base fec00000 limit fec00fff mem (fixed)
constrain_resources: PCI: 00:14.0 9c base feb00000 limit feb00fff mem (fixed)
constrain_resources: PCI: 00:14.0 90 base 00000b00 limit 00000b0f io (fixed)
constrain_resources: PCI: 00:14.0 58 base 00000b20 limit 00000b2f io (fixed)
constrain_resources: PCI: 00:14.3 10000000 base 00000000 limit 00000fff io (fixed)
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 base f8000000 limit feafffff
Setting resources...
DOMAIN: 0000 io: base:1000 size:4000 align:12 gran:0 limit:ffff
PCI: 00:18.0 210d8 * [0x1000 - 0x4fff] io
DOMAIN: 0000 io: next_base: 5000 size: 4000 align: 12 gran: 0 done
PCI: 00:18.0 io: base:1000 size:4000 align:12 gran:12 limit:4fff
PCI: 00:09.0 1c * [0x1000 - 0x1fff] io
PCI: 00:0a.0 1c * [0x2000 - 0x2fff] io
PCI: 00:14.4 1c * [0x3000 - 0x3fff] io
PCI: 00:11.0 20 * [0x4000 - 0x400f] io
PCI: 00:14.1 20 * [0x4010 - 0x401f] io
PCI: 00:11.0 10 * [0x4020 - 0x4027] io
PCI: 00:11.0 18 * [0x4028 - 0x402f] io
PCI: 00:14.1 10 * [0x4030 - 0x4037] io
PCI: 00:14.1 18 * [0x4038 - 0x403f] io
PCI: 00:11.0 14 * [0x4040 - 0x4043] io
PCI: 00:11.0 1c * [0x4044 - 0x4047] io
PCI: 00:14.1 14 * [0x4048 - 0x404b] io
PCI: 00:14.1 1c * [0x404c - 0x404f] io
PCI: 00:18.0 io: next_base: 4050 size: 4000 align: 12 gran: 12 done
PCI: 00:02.0 io: base:4fff size:0 align:12 gran:12 limit:4fff
PCI: 00:02.0 io: next_base: 4fff size: 0 align: 12 gran: 12 done
PCI: 00:04.0 io: base:4fff size:0 align:12 gran:12 limit:4fff
PCI: 00:04.0 io: next_base: 4fff size: 0 align: 12 gran: 12 done
PCI: 00:09.0 io: base:1000 size:1000 align:12 gran:12 limit:1fff
PCI: 03:00.0 18 * [0x1000 - 0x101f] io
PCI: 00:09.0 io: next_base: 1020 size: 1000 align: 12 gran: 12 done
PCI: 00:0a.0 io: base:2000 size:1000 align:12 gran:12 limit:2fff
PCI: 04:00.0 18 * [0x2000 - 0x201f] io
PCI: 00:0a.0 io: next_base: 2020 size: 1000 align: 12 gran: 12 done
PCI: 00:0b.0 io: base:4fff size:0 align:12 gran:12 limit:4fff
PCI: 00:0b.0 io: next_base: 4fff size: 0 align: 12 gran: 12 done
PCI: 00:14.4 io: base:3000 size:1000 align:12 gran:12 limit:3fff
PCI: 06:05.0 18 * [0x3000 - 0x307f] io
PCI: 00:14.4 io: next_base: 3080 size: 1000 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:f8000000 size:4d00000 align:26 gran:0 limit:feafffff
PCI: 00:18.3 94 * [0xf8000000 - 0xfbffffff] mem
PCI: 00:18.0 210b8 * [0xfc000000 - 0xfcbfffff] mem
PCI: 00:18.0 210b0 * [0xfcc00000 - 0xfccfffff] prefmem
DOMAIN: 0000 mem: next_base: fcd00000 size: 4d00000 align: 26 gran: 0 done
PCI: 00:18.0 prefmem: base:fcc00000 size:100000 align:20 gran:20 limit:fccfffff
PCI: 00:00.0 fc * [0xfcc00000 - 0xfcc000ff] prefmem
PCI: 00:18.0 prefmem: next_base: fcc00100 size: 100000 align: 20 gran: 20 done
PCI: 00:02.0 prefmem: base:fccfffff size:0 align:20 gran:20 limit:fccfffff
PCI: 00:02.0 prefmem: next_base: fccfffff size: 0 align: 20 gran: 20 done
PCI: 00:04.0 prefmem: base:fccfffff size:0 align:20 gran:20 limit:fccfffff
PCI: 00:04.0 prefmem: next_base: fccfffff size: 0 align: 20 gran: 20 done
PCI: 00:09.0 prefmem: base:fccfffff size:0 align:20 gran:20 limit:fccfffff
PCI: 00:09.0 prefmem: next_base: fccfffff size: 0 align: 20 gran: 20 done
PCI: 00:0a.0 prefmem: base:fccfffff size:0 align:20 gran:20 limit:fccfffff
PCI: 00:0a.0 prefmem: next_base: fccfffff size: 0 align: 20 gran: 20 done
PCI: 00:0b.0 prefmem: base:fccfffff size:0 align:20 gran:20 limit:fccfffff
PCI: 00:0b.0 prefmem: next_base: fccfffff size: 0 align: 20 gran: 20 done
PCI: 00:14.4 prefmem: base:fccfffff size:0 align:20 gran:20 limit:fccfffff
PCI: 00:14.4 prefmem: next_base: fccfffff size: 0 align: 20 gran: 20 done
PCI: 00:18.0 mem: base:fc000000 size:c00000 align:23 gran:20 limit:fcbfffff
PCI: 00:14.4 20 * [0xfc000000 - 0xfc8fffff] mem
PCI: 00:09.0 20 * [0xfc900000 - 0xfc9fffff] mem
PCI: 00:0a.0 20 * [0xfca00000 - 0xfcafffff] mem
PCI: 00:00.2 44 * [0xfcb00000 - 0xfcb03fff] mem
PCI: 00:14.2 10 * [0xfcb04000 - 0xfcb07fff] mem
PCI: 00:12.0 10 * [0xfcb08000 - 0xfcb08fff] mem
PCI: 00:12.1 10 * [0xfcb09000 - 0xfcb09fff] mem
PCI: 00:13.0 10 * [0xfcb0a000 - 0xfcb0afff] mem
PCI: 00:13.1 10 * [0xfcb0b000 - 0xfcb0bfff] mem
PCI: 00:14.5 10 * [0xfcb0c000 - 0xfcb0cfff] mem
PCI: 00:11.0 24 * [0xfcb0d000 - 0xfcb0d3ff] mem
PCI: 00:12.2 10 * [0xfcb0e000 - 0xfcb0e0ff] mem
PCI: 00:13.2 10 * [0xfcb0f000 - 0xfcb0f0ff] mem
PCI: 00:14.3 a0 * [0xfcb10000 - 0xfcb10000] mem
PCI: 00:18.0 mem: next_base: fcb10001 size: c00000 align: 23 gran: 20 done
PCI: 00:02.0 mem: base:fcbfffff size:0 align:20 gran:20 limit:fcbfffff
PCI: 00:02.0 mem: next_base: fcbfffff size: 0 align: 20 gran: 20 done
PCI: 00:04.0 mem: base:fcbfffff size:0 align:20 gran:20 limit:fcbfffff
PCI: 00:04.0 mem: next_base: fcbfffff size: 0 align: 20 gran: 20 done
PCI: 00:09.0 mem: base:fc900000 size:100000 align:20 gran:20 limit:fc9fffff
PCI: 03:00.0 10 * [0xfc900000 - 0xfc91ffff] mem
PCI: 03:00.0 1c * [0xfc920000 - 0xfc923fff] mem
PCI: 00:09.0 mem: next_base: fc924000 size: 100000 align: 20 gran: 20 done
PCI: 00:0a.0 mem: base:fca00000 size:100000 align:20 gran:20 limit:fcafffff
PCI: 04:00.0 10 * [0xfca00000 - 0xfca1ffff] mem
PCI: 04:00.0 1c * [0xfca20000 - 0xfca23fff] mem
PCI: 00:0a.0 mem: next_base: fca24000 size: 100000 align: 20 gran: 20 done
PCI: 00:0b.0 mem: base:fcbfffff size:0 align:20 gran:20 limit:fcbfffff
PCI: 00:0b.0 mem: next_base: fcbfffff size: 0 align: 20 gran: 20 done
PCI: 00:14.4 mem: base:fc000000 size:900000 align:23 gran:20 limit:fc8fffff
PCI: 06:05.0 10 * [0xfc000000 - 0xfc7fffff] mem
PCI: 06:05.0 14 * [0xfc800000 - 0xfc81ffff] mem
PCI: 00:14.4 mem: next_base: fc820000 size: 900000 align: 23 gran: 20 done
Root Device assign_resources, bus 0 link: 0
0: mmio_basek=00300000, basek=00400000, limitk=01100000
DOMAIN: 0000 assign_resources, bus 0 link: 0
VGA: PCI: 00:18.0 (aka node 0) link 2 has VGA device
PCI: 00:18.0 211b8 <- [0x00000a0000 - 0x00000bffff] size 0x00020000 gran 0x00 mem <node 0 link 2>
PCI: 00:18.0 210b0 <- [0x00fcc00000 - 0x00fccfffff] size 0x00100000 gran 0x14 prefmem <node 0 link 2>
PCI: 00:18.0 210b8 <- [0x00fc000000 - 0x00fcbfffff] size 0x00c00000 gran 0x14 mem <node 0 link 2>
PCI: 00:18.0 210d8 <- [0x0000001000 - 0x0000004fff] size 0x00004000 gran 0x0c io <node 0 link 2>
PCI: 00:18.0 assign_resources, bus 0 link: 2
PCI: 00:00.0 sr5690_set_resources
sr5690_set_resources: PCI: 00:00.0[0x1c] base = c0000000 limit = cfffffff
PCI: 00:00.0 c0010058 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x00 mem <mmconfig>
sr5690_set_resources: PCI: 00:18.1 <- index a8 base c00003 limit cfffa0
PCI: 00:00.0 fc <- [0x00fcc00000 - 0x00fcc000ff] size 0x00000100 gran 0x08 prefmem
PCI: 00:00.2 44 <- [0x00fcb00000 - 0x00fcb03fff] size 0x00004000 gran 0x0e mem
PCI: 00:02.0 1c <- [0x0000004fff - 0x0000004ffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:02.0 24 <- [0x00fccfffff - 0x00fccffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:02.0 20 <- [0x00fcbfffff - 0x00fcbffffe] size 0x00000000 gran 0x14 bus 01 mem
PCI: 00:04.0 1c <- [0x0000004fff - 0x0000004ffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:04.0 24 <- [0x00fccfffff - 0x00fccffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:04.0 20 <- [0x00fcbfffff - 0x00fcbffffe] size 0x00000000 gran 0x14 bus 02 mem
PCI: 00:09.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 03 io
PCI: 00:09.0 24 <- [0x00fccfffff - 0x00fccffffe] size 0x00000000 gran 0x14 bus 03 prefmem
PCI: 00:09.0 20 <- [0x00fc900000 - 0x00fc9fffff] size 0x00100000 gran 0x14 bus 03 mem
PCI: 00:09.0 assign_resources, bus 3 link: 0
PCI: 03:00.0 10 <- [0x00fc900000 - 0x00fc91ffff] size 0x00020000 gran 0x11 mem
PCI: 03:00.0 18 <- [0x0000001000 - 0x000000101f] size 0x00000020 gran 0x05 io
PCI: 03:00.0 1c <- [0x00fc920000 - 0x00fc923fff] size 0x00004000 gran 0x0e mem
PCI: 00:09.0 assign_resources, bus 3 link: 0
PCI: 00:0a.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 04 io
PCI: 00:0a.0 24 <- [0x00fccfffff - 0x00fccffffe] size 0x00000000 gran 0x14 bus 04 prefmem
PCI: 00:0a.0 20 <- [0x00fca00000 - 0x00fcafffff] size 0x00100000 gran 0x14 bus 04 mem
PCI: 00:0a.0 assign_resources, bus 4 link: 0
PCI: 04:00.0 10 <- [0x00fca00000 - 0x00fca1ffff] size 0x00020000 gran 0x11 mem
PCI: 04:00.0 18 <- [0x0000002000 - 0x000000201f] size 0x00000020 gran 0x05 io
PCI: 04:00.0 1c <- [0x00fca20000 - 0x00fca23fff] size 0x00004000 gran 0x0e mem
PCI: 00:0a.0 assign_resources, bus 4 link: 0
PCI: 00:0b.0 1c <- [0x0000004fff - 0x0000004ffe] size 0x00000000 gran 0x0c bus 05 io
PCI: 00:0b.0 24 <- [0x00fccfffff - 0x00fccffffe] size 0x00000000 gran 0x14 bus 05 prefmem
PCI: 00:0b.0 20 <- [0x00fcbfffff - 0x00fcbffffe] size 0x00000000 gran 0x14 bus 05 mem
PCI: 00:11.0 10 <- [0x0000004020 - 0x0000004027] size 0x00000008 gran 0x03 io
PCI: 00:11.0 14 <- [0x0000004040 - 0x0000004043] size 0x00000004 gran 0x02 io
PCI: 00:11.0 18 <- [0x0000004028 - 0x000000402f] size 0x00000008 gran 0x03 io
PCI: 00:11.0 1c <- [0x0000004044 - 0x0000004047] size 0x00000004 gran 0x02 io
PCI: 00:11.0 20 <- [0x0000004000 - 0x000000400f] size 0x00000010 gran 0x04 io
PCI: 00:11.0 24 <- [0x00fcb0d000 - 0x00fcb0d3ff] size 0x00000400 gran 0x0a mem
PCI: 00:12.0 10 <- [0x00fcb08000 - 0x00fcb08fff] size 0x00001000 gran 0x0c mem
PCI: 00:12.1 10 <- [0x00fcb09000 - 0x00fcb09fff] size 0x00001000 gran 0x0c mem
PCI: 00:12.2 10 <- [0x00fcb0e000 - 0x00fcb0e0ff] size 0x00000100 gran 0x08 mem
PCI: 00:13.0 10 <- [0x00fcb0a000 - 0x00fcb0afff] size 0x00001000 gran 0x0c mem
PCI: 00:13.1 10 <- [0x00fcb0b000 - 0x00fcb0bfff] size 0x00001000 gran 0x0c mem
PCI: 00:13.2 10 <- [0x00fcb0f000 - 0x00fcb0f0ff] size 0x00000100 gran 0x08 mem
PCI: 00:14.0 assign_resources, bus 1 link: 0
PCI: 00:14.0 assign_resources, bus 1 link: 0
PCI: 00:14.1 10 <- [0x0000004030 - 0x0000004037] size 0x00000008 gran 0x03 io
PCI: 00:14.1 14 <- [0x0000004048 - 0x000000404b] size 0x00000004 gran 0x02 io
PCI: 00:14.1 18 <- [0x0000004038 - 0x000000403f] size 0x00000008 gran 0x03 io
PCI: 00:14.1 1c <- [0x000000404c - 0x000000404f] size 0x00000004 gran 0x02 io
PCI: 00:14.1 20 <- [0x0000004010 - 0x000000401f] size 0x00000010 gran 0x04 io
PCI: 00:14.2 10 <- [0x00fcb04000 - 0x00fcb07fff] size 0x00004000 gran 0x0e mem64
PCI: 00:14.3 a0 <- [0x00fcb10000 - 0x00fcb10000] size 0x00000001 gran 0x00 mem
PCI: 00:14.3 assign_resources, bus 0 link: 0
PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 002e.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
PNP: 002e.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io
PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
PNP: 002e.b 60 <- [0x0000000290 - 0x0000000291] size 0x00000002 gran 0x01 io
ERROR: PNP: 002e.b 70 irq size: 0x0000000001 not assigned
PCI: 00:14.3 assign_resources, bus 0 link: 0
PCI: 00:14.4 1c <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x0c bus 06 io
PCI: 00:14.4 24 <- [0x00fccfffff - 0x00fccffffe] size 0x00000000 gran 0x14 bus 06 prefmem
PCI: 00:14.4 20 <- [0x00fc000000 - 0x00fc8fffff] size 0x00900000 gran 0x14 bus 06 mem
PCI: 00:14.4 assign_resources, bus 6 link: 0
PCI: 06:05.0 10 <- [0x00fc000000 - 0x00fc7fffff] size 0x00800000 gran 0x17 mem
PCI: 06:05.0 14 <- [0x00fc800000 - 0x00fc81ffff] size 0x00020000 gran 0x11 mem
PCI: 06:05.0 18 <- [0x0000003000 - 0x000000307f] size 0x00000080 gran 0x07 io
PCI: 00:14.4 assign_resources, bus 6 link: 0
PCI: 00:14.5 10 <- [0x00fcb0c000 - 0x00fcb0cfff] size 0x00001000 gran 0x0c mem
PCI: 00:18.0 assign_resources, bus 0 link: 2
PCI: 00:18.3 94 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x1a mem <gart>
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
APIC: 01
APIC: 02
APIC: 03
APIC: 04
APIC: 05
APIC: 06
APIC: 07
DOMAIN: 0000 child on link 0 PCI: 00:18.0
DOMAIN: 0000 resource base 1000 size 4000 align 12 gran 0 limit ffff flags 40040100 index 10000000
DOMAIN: 0000 resource base f8000000 size 4d00000 align 26 gran 0 limit feafffff flags 40040200 index 10000100
DOMAIN: 0000 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
DOMAIN: 0000 resource base 0 size c0000000 align 0 gran 0 limit 0 flags e0004200 index 7
DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10
DOMAIN: 0000 resource base c0000 size bff40000 align 0 gran 0 limit 0 flags e0004200 index 20
DOMAIN: 0000 resource base 100000000 size 340000000 align 0 gran 0 limit 0 flags e0004200 index 30
PCI: 00:18.0 child on link 0 PCI: 00:00.0
PCI: 00:18.0 resource base fcc00000 size 100000 align 20 gran 20 limit fccfffff flags 60081200 index 210b0
PCI: 00:18.0 resource base fc000000 size c00000 align 23 gran 20 limit fcbfffff flags 60080200 index 210b8
PCI: 00:18.0 resource base 1000 size 4000 align 12 gran 12 limit 4fff flags 60080100 index 210d8
PCI: 00:18.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags e0000200 index 211b8
PCI: 00:00.0
PCI: 00:00.0 resource base fcc00000 size 100 align 12 gran 8 limit fcc000ff flags 60001200 index fc
PCI: 00:00.1
PCI: 00:00.2
PCI: 00:00.2 resource base fcb00000 size 4000 align 14 gran 14 limit fcb03fff flags 70000200 index 44
PCI: 00:02.0
PCI: 00:02.0 resource base 4fff size 0 align 12 gran 12 limit 4fff flags 60080102 index 1c
PCI: 00:02.0 resource base fccfffff size 0 align 20 gran 20 limit fccfffff flags 60081202 index 24
PCI: 00:02.0 resource base fcbfffff size 0 align 20 gran 20 limit fcbfffff flags 60080202 index 20
PCI: 00:03.0
PCI: 00:04.0
PCI: 00:04.0 resource base 4fff size 0 align 12 gran 12 limit 4fff flags 60080102 index 1c
PCI: 00:04.0 resource base fccfffff size 0 align 20 gran 20 limit fccfffff flags 60081202 index 24
PCI: 00:04.0 resource base fcbfffff size 0 align 20 gran 20 limit fcbfffff flags 60080202 index 20
PCI: 00:05.0
PCI: 00:06.0
PCI: 00:07.0
PCI: 00:08.0
PCI: 00:09.0 child on link 0 PCI: 03:00.0
PCI: 00:09.0 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c
PCI: 00:09.0 resource base fccfffff size 0 align 20 gran 20 limit fccfffff flags 60081202 index 24
PCI: 00:09.0 resource base fc900000 size 100000 align 20 gran 20 limit fc9fffff flags 60080202 index 20
PCI: 03:00.0
PCI: 03:00.0 resource base fc900000 size 20000 align 17 gran 17 limit fc91ffff flags 60000200 index 10
PCI: 03:00.0 resource base 1000 size 20 align 5 gran 5 limit 101f flags 60000100 index 18
PCI: 03:00.0 resource base fc920000 size 4000 align 14 gran 14 limit fc923fff flags 60000200 index 1c
PCI: 00:0a.0 child on link 0 PCI: 04:00.0
PCI: 00:0a.0 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c
PCI: 00:0a.0 resource base fccfffff size 0 align 20 gran 20 limit fccfffff flags 60081202 index 24
PCI: 00:0a.0 resource base fca00000 size 100000 align 20 gran 20 limit fcafffff flags 60080202 index 20
PCI: 04:00.0
PCI: 04:00.0 resource base fca00000 size 20000 align 17 gran 17 limit fca1ffff flags 60000200 index 10
PCI: 04:00.0 resource base 2000 size 20 align 5 gran 5 limit 201f flags 60000100 index 18
PCI: 04:00.0 resource base fca20000 size 4000 align 14 gran 14 limit fca23fff flags 60000200 index 1c
PCI: 00:0b.0
PCI: 00:0b.0 resource base 4fff size 0 align 12 gran 12 limit 4fff flags 60080102 index 1c
PCI: 00:0b.0 resource base fccfffff size 0 align 20 gran 20 limit fccfffff flags 60081202 index 24
PCI: 00:0b.0 resource base fcbfffff size 0 align 20 gran 20 limit fcbfffff flags 60080202 index 20
PCI: 00:11.0
PCI: 00:11.0 resource base 4020 size 8 align 3 gran 3 limit 4027 flags 60000100 index 10
PCI: 00:11.0 resource base 4040 size 4 align 2 gran 2 limit 4043 flags 60000100 index 14
PCI: 00:11.0 resource base 4028 size 8 align 3 gran 3 limit 402f flags 60000100 index 18
PCI: 00:11.0 resource base 4044 size 4 align 2 gran 2 limit 4047 flags 60000100 index 1c
PCI: 00:11.0 resource base 4000 size 10 align 4 gran 4 limit 400f flags 60000100 index 20
PCI: 00:11.0 resource base fcb0d000 size 400 align 12 gran 10 limit fcb0d3ff flags 60000200 index 24
PCI: 00:12.0
PCI: 00:12.0 resource base fcb08000 size 1000 align 12 gran 12 limit fcb08fff flags 60000200 index 10
PCI: 00:12.1
PCI: 00:12.1 resource base fcb09000 size 1000 align 12 gran 12 limit fcb09fff flags 60000200 index 10
PCI: 00:12.2
PCI: 00:12.2 resource base fcb0e000 size 100 align 12 gran 8 limit fcb0e0ff flags 60000200 index 10
PCI: 00:13.0
PCI: 00:13.0 resource base fcb0a000 size 1000 align 12 gran 12 limit fcb0afff flags 60000200 index 10
PCI: 00:13.1
PCI: 00:13.1 resource base fcb0b000 size 1000 align 12 gran 12 limit fcb0bfff flags 60000200 index 10
PCI: 00:13.2
PCI: 00:13.2 resource base fcb0f000 size 100 align 12 gran 8 limit fcb0f0ff flags 60000200 index 10
PCI: 00:14.0 child on link 0 I2C: 01:50
PCI: 00:14.0 resource base fec00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 74
PCI: 00:14.0 resource base feb00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 9c
PCI: 00:14.0 resource base fed00000 size 400 align 8 gran 8 limit ffffffff flags d0000200 index b4
PCI: 00:14.0 resource base b00 size 10 align 8 gran 8 limit ffff flags d0000100 index 90
PCI: 00:14.0 resource base b20 size 10 align 8 gran 8 limit ffff flags d0000100 index 58
I2C: 01:50
I2C: 01:51
I2C: 01:52
I2C: 01:53
I2C: 01:54
I2C: 01:55
I2C: 01:56
I2C: 01:57
I2C: 01:2f
PCI: 00:14.1
PCI: 00:14.1 resource base 4030 size 8 align 3 gran 3 limit 4037 flags 60000100 index 10
PCI: 00:14.1 resource base 4048 size 4 align 2 gran 2 limit 404b flags 60000100 index 14
PCI: 00:14.1 resource base 4038 size 8 align 3 gran 3 limit 403f flags 60000100 index 18
PCI: 00:14.1 resource base 404c size 4 align 2 gran 2 limit 404f flags 60000100 index 1c
PCI: 00:14.1 resource base 4010 size 10 align 4 gran 4 limit 401f flags 60000100 index 20
PCI: 00:14.2
PCI: 00:14.2 resource base fcb04000 size 4000 align 14 gran 14 limit fcb07fff flags 60000201 index 10
PCI: 00:14.3 child on link 0 PNP: 002e.0
PCI: 00:14.3 resource base fcb10000 size 1 align 12 gran 0 limit fcb10000 flags 60000200 index a0
PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PNP: 002e.0
PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.1
PNP: 002e.1 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.2
PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit fff flags e0000100 index 60
PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.3
PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit fff flags e0000100 index 60
PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.5
PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60
PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 62
PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72
PNP: 002e.106
PNP: 002e.106 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 62
PNP: 002e.107
PNP: 002e.207
PNP: 002e.307
PNP: 002e.407
PNP: 002e.8
PNP: 002e.108
PNP: 002e.9
PNP: 002e.109
PNP: 002e.209
PNP: 002e.309
PNP: 002e.a
PNP: 002e.b
PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit fff flags e0000100 index 60
PNP: 002e.b resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.c
PNP: 002e.d
PNP: 002e.f
PCI: 00:14.4 child on link 0 PCI: 06:01.0
PCI: 00:14.4 resource base 3000 size 1000 align 12 gran 12 limit 3fff flags 60080102 index 1c
PCI: 00:14.4 resource base fccfffff size 0 align 20 gran 20 limit fccfffff flags 60081202 index 24
PCI: 00:14.4 resource base fc000000 size 900000 align 23 gran 20 limit fc8fffff flags 60080202 index 20
PCI: 06:01.0
PCI: 06:02.0
PCI: 06:03.0
PCI: 06:05.0
PCI: 06:05.0 resource base fc000000 size 800000 align 23 gran 23 limit fc7fffff flags 60000200 index 10
PCI: 06:05.0 resource base fc800000 size 20000 align 17 gran 17 limit fc81ffff flags 60000200 index 14
PCI: 06:05.0 resource base 3000 size 80 align 7 gran 7 limit 307f flags 60000100 index 18
PCI: 06:05.0 resource base a0000 size 1fc00 align 0 gran 0 limit 0 flags f0000200 index 3
PCI: 00:14.5
PCI: 00:14.5 resource base fcb0c000 size 1000 align 12 gran 12 limit fcb0cfff flags 60000200 index 10
PCI: 00:18.1
PCI: 00:18.2
PCI: 00:18.3
PCI: 00:18.3 resource base f8000000 size 4000000 align 26 gran 26 limit fbffffff flags 60000200 index 94
PCI: 00:18.4
PCI: 00:18.5
PCI: 00:19.0
PCI: 00:19.1
PCI: 00:19.2
PCI: 00:19.3
PCI: 00:19.4
PCI: 00:19.5
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 2000844 exit 0
Enabling resources...
PCI: 00:18.0 cmd <- 00
PCI: 00:18.1 subsystem <- 1043/8163
PCI: 00:18.1 cmd <- 00
PCI: 00:18.2 subsystem <- 1043/8163
PCI: 00:18.2 cmd <- 00
PCI: 00:18.3 cmd <- 00
PCI: 00:18.4 cmd <- 00
PCI: 00:18.5 cmd <- 00
PCI: 00:00.0 subsystem <- 1043/8163
PCI: 00:00.0 cmd <- 02
Initializing IOMMU
PCI: 00:02.0 bridge ctrl <- 0003
PCI: 00:02.0 cmd <- 00
PCI: 00:04.0 bridge ctrl <- 0003
PCI: 00:04.0 cmd <- 00
PCI: 00:09.0 bridge ctrl <- 0003
PCI: 00:09.0 cmd <- 07
PCI: 00:0a.0 bridge ctrl <- 0003
PCI: 00:0a.0 cmd <- 07
PCI: 00:0b.0 bridge ctrl <- 0003
PCI: 00:0b.0 cmd <- 00
PCI: 00:11.0 subsystem <- 1043/8163
PCI: 00:11.0 cmd <- 03
PCI: 00:12.0 subsystem <- 1043/8163
PCI: 00:12.0 cmd <- 02
PCI: 00:12.1 subsystem <- 1043/8163
PCI: 00:12.1 cmd <- 02
PCI: 00:12.2 subsystem <- 1043/8163
PCI: 00:12.2 cmd <- 02
PCI: 00:13.0 subsystem <- 1043/8163
PCI: 00:13.0 cmd <- 02
PCI: 00:13.1 subsystem <- 1043/8163
PCI: 00:13.1 cmd <- 02
PCI: 00:13.2 subsystem <- 1043/8163
PCI: 00:13.2 cmd <- 02
PCI: 00:14.0 subsystem <- 1043/8163
PCI: 00:14.0 cmd <- 403
PCI: 00:14.1 subsystem <- 1043/8163
PCI: 00:14.1 cmd <- 01
PCI: 00:14.2 subsystem <- 1043/8163
PCI: 00:14.2 cmd <- 02
PCI: 00:14.3 subsystem <- 1043/8163
PCI: 00:14.3 cmd <- 0f
sb700 lpc decode:PNP: 002e.2, base=0x000003f8, end=0x000003ff
sb700 lpc decode:PNP: 002e.3, base=0x000002f8, end=0x000002ff
sb700 lpc decode:PNP: 002e.5, base=0x00000060, end=0x00000060
sb700 lpc decode:PNP: 002e.5, base=0x00000064, end=0x00000064
sb700 lpc decode:PNP: 002e.b, base=0x00000290, end=0x00000291
PCI: 00:14.4 bridge ctrl <- 000b
PCI: 00:14.4 cmd <- 07
PCI: 00:14.5 subsystem <- 1043/8163
PCI: 00:14.5 cmd <- 02
PCI: 03:00.0 cmd <- 03
PCI: 04:00.0 cmd <- 03
PCI: 06:05.0 cmd <- 03
done.
BS: BS_DEV_ENABLE times (us): entry 0 run 89614 exit 0
Initializing devices...
Root Device init ...
Root Device init finished in 1098 usecs
CPU_CLUSTER: 0 init ...
start_eip=0x00001000, code_size=0x00000031
CPU1: stack_base 0013f000, stack_end 0013fff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 1.
After apic_write.
Initializing CPU #1
Startup point 1.
CPU: vendor AMD device 600f12
Waiting for send to finish...
+CPU: family 15, model 01, stepping 02
After Startup.
nodeid = 00, coreid = 01
CPU2: stack_base 0013e000, stack_end 0013eff8
Enabling cache
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 2.
ACPU ID 0x80000001: 600f12
CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB
3d000, stack_end 0013dff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 3.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU4: stack_base 0013c000, stack_end 0013cff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 4.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU5: stack_base 0013b000, stack_end 0013bff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 5.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU6: stack_base 0013a000, stack_end 0013aff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 6.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU7: stack_base 00139000, stack_end 00139ff8
Asserting INIT.
Waiting for send to finish...
+
MTRR check
Deasserting INIT.
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 7.
After apic_write.
Setting up local APIC...Startup point 1.
Waiting for send to finish...
+ apic_id: 0x02 done.
After Startup.
Initializing CPU #0
CPU model: AMD Opteron(tm) Processor 4256 EE
CPU: vendor AMD device 600f12
CPU: family 15, model 01, stepping 02
nodeid = 00, coreid = 00
Enabling cache
siblings = 07, Disabling SMM ASeg memory
CPU #2 initialized
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e
Setting up local APIC... apic_id: 0x03 done.
CPU model: AMD Opteron(tm) Processor 4256 EE
siblings = 07,
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Disabling SMM ASeg memory
Setting up local APIC...CPU #3 initialized
Setting up local APIC... apic_id: 0x04 done.
apic_id: 0x00 done.
CPU model: AMD Opteron(tm) Processor 4256 EE
CPU model: AMD Opteron(tm) Processor 4256 EE
siblings = 07, siblings = 07, Disabling SMM ASeg memory
Disabling SMM ASeg memory
CPU #4 initialized
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local APIC...Setting up local APIC... apic_id: 0x05 done.
CPU model: AMD Opteron(tm) Processor 4256 EE
siblings = 07, CPU #0 initialized
apic_id: 0x01 Disabling SMM ASeg memory
done.
CPU #5 initialized
CPU model: AMD Opteron(tm) Processor 4256 EE
CPU_CLUSTER: 0 init finished in 348484 usecs
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
siblings = 07, PCI: 00:18.0 init ...
Disabling SMM ASeg memory
PCI: 00:18.0 init finished in 5216 usecs
Setting up local APIC...CPU #1 initialized
apic_id: 0x06 done.
PCI: 00:18.1 init ...
CPU model: AMD Opteron(tm) Processor 4256 EE
PCI: 00:18.1 init finished in 4455 usecs
siblings = 07, PCI: 00:18.2 init ...
Disabling SMM ASeg memory
PCI: 00:18.2 init finished in 1900 usecs
CPU #6 initialized
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
PCI: 00:18.3 init ...
NB: Function 3 Misc Control.. Setting up local APIC...done.
apic_id: 0x07 done.
PCI: 00:18.3 init finished in 8527 usecs
CPU model: AMD Opteron(tm) Processor 4256 EE
PCI: 00:18.4 init ...
NB: Function 4 Link Control.. siblings = 07, done.
Disabling SMM ASeg memory
PCI: 00:18.4 init finished in 6041 usecs
CPU #7 initialized
PCI: 00:18.5 init ...
NB: Function 5 Northbridge Control.. done.
PCI: 00:18.5 init finished in 4347 usecs
PCI: 00:00.0 init ...
pcie_init in sr5650_ht.c
IOAPIC: Initializing IOAPIC at 0xfcc00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x01
IOAPIC: Dumping registers
reg 0x0000: 0x01000000
reg 0x0001: 0x001f8021
reg 0x0002: 0x00000000
IOAPIC: 32 interrupts
IOAPIC: Enabling interrupts on FSB
IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
IOAPIC: reg 0x00000018 value 0x00000000 0x00010000
IOAPIC: reg 0x00000019 value 0x00000000 0x00010000
IOAPIC: reg 0x0000001a value 0x00000000 0x00010000
IOAPIC: reg 0x0000001b value 0x00000000 0x00010000
IOAPIC: reg 0x0000001c value 0x00000000 0x00010000
IOAPIC: reg 0x0000001d value 0x00000000 0x00010000
IOAPIC: reg 0x0000001e value 0x00000000 0x00010000
IOAPIC: reg 0x0000001f value 0x00000000 0x00010000
PCI: 00:00.0 init finished in 98781 usecs
PCI: 00:11.0 init ...
rev_id=15
sata_bar0=4020
sata_bar1=4040
sata_bar2=4028
sata_bar3=4044
sata_bar4=4000
sata_bar5=fcb0d000
ide_bar0=4030
ide_bar1=4048
ide_bar2=4038
ide_bar3=404c
Maximum SATA port count supported by silicon: 4
SATA port 0 status = 0
No Primary Master SATA drive on Slot0
SATA port 1 status = 0
No Primary Slave SATA drive on Slot1
SATA port 2 status = 0
No Secondary Master SATA drive on Slot2
SATA port 3 status = 23
0x6=b0, 0x7=80
drive detection not yet completed, waiting...
0x6=10, 0x7=50
drive no longer selected after 10 ms, retrying init
drive detection done after 0 ms
Secondary Slave device is ready after 2 tries
PCI: 00:11.0 init finished in 43756 usecs
PCI: 00:12.0 init ...
PCI: 00:12.0 init finished in 1165 usecs
PCI: 00:12.1 init ...
PCI: 00:12.1 init finished in 1166 usecs
PCI: 00:12.2 init ...
usb2_bar0=0xfcb0e000
rpr 6.23, final dword=809e03c8
PCI: 00:12.2 init finished in 3852 usecs
PCI: 00:13.0 init ...
PCI: 00:13.0 init finished in 1166 usecs
PCI: 00:13.1 init ...
PCI: 00:13.1 init finished in 1166 usecs
PCI: 00:13.2 init ...
usb2_bar0=0xfcb0f000
rpr 6.23, final dword=809e03c8
PCI: 00:13.2 init finished in 3847 usecs
PCI: 00:14.0 init ...
sm_init().
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: Dumping registers
reg 0x0000: 0x00000000
reg 0x0001: 0x00178021
reg 0x0002: 0x00000000
IOAPIC: 24 interrupts
IOAPIC: Enabling interrupts on FSB
IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
set power "on" after power fail
++++++++++no set NMI+++++
RTC Init
sm_init() end
PCI: 00:14.0 init finished in 80832 usecs
PCI: 00:14.1 init ...
PCI: 00:14.1 init finished in 1151 usecs
PCI: 00:14.2 init ...
base = 0xfcb04000
No codec!
PCI: 00:14.2 init finished in 4946 usecs
PCI: 00:14.3 init ...
lpc_init
PCI: 00:14.3 init finished in 1671 usecs
PCI: 00:14.4 init ...
PCI: 00:14.4 init finished in 1162 usecs
PCI: 00:14.5 init ...
PCI: 00:14.5 init finished in 1165 usecs
PCI: 03:00.0 init ...
PCI: 03:00.0 init finished in 1147 usecs
PCI: 04:00.0 init ...
PCI: 04:00.0 init finished in 1147 usecs
smbus: PCI: 00:14.0[0]->I2C: 01:2f init ...
Set SMBUS controller to channel 1
Found 64 pin W83795G Nuvoton H/W Monitor
W83795G/ADG work in Thermal Cruise Mode
Fan CTFS(celsius) TTTI(celsius)
1 80 80
2 80 80
3 80 80
4 80 80
5 80 80
6 80 80
DTS1 current value: 2c
DTS2 current value: 0
DTS3 current value: 0
DTS4 current value: 0
DTS5 current value: 0
DTS6 current value: 0
DTS7 current value: 0
DTS8 current value: 0
Set SMBUS controller to channel 0
I2C: 01:2f init finished in 222937 usecs
PNP: 002e.2 init ...
PNP: 002e.2 init finished in 1097 usecs
PNP: 002e.3 init ...
PNP: 002e.3 init finished in 1098 usecs
PNP: 002e.5 init ...
w83667hg_a_init: Disable mouse controller.PNP: 002e.5 init finished in 3199 usecs
PNP: 002e.a init ...
set power on after power fail
PNP: 002e.a init finished in 2650 usecs
PNP: 002e.b init ...
PNP: 002e.b init finished in 1098 usecs
PCI: 06:05.0 init ...
ASpeed AST2050: initializing video device
ast_detect_chip: AST 1100 detected
ast_detect_chip: VGA not enabled on entry, requesting chip POST
ast_detect_chip: Analog VGA only
ast_driver_load: dram 2180000 0 32 00800000
ASpeed VGA text mode initialized
PCI: 06:05.0 init finished in 26089 usecs
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:18.0: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:00.1: enabled 0
PCI: 00:00.2: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 0
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:09.0: enabled 1
PCI: 00:0a.0: enabled 1
PCI: 00:0b.0: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.1: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.1: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 01:50: enabled 1
I2C: 01:51: enabled 1
I2C: 01:52: enabled 1
I2C: 01:53: enabled 1
I2C: 01:54: enabled 1
I2C: 01:55: enabled 1
I2C: 01:56: enabled 1
I2C: 01:57: enabled 1
I2C: 01:2f: enabled 1
PCI: 00:14.1: enabled 1
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PNP: 002e.0: enabled 0
PNP: 002e.1: enabled 0
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.106: enabled 0
PNP: 002e.107: enabled 0
PNP: 002e.207: enabled 0
PNP: 002e.307: enabled 0
PNP: 002e.407: enabled 0
PNP: 002e.8: enabled 0
PNP: 002e.108: enabled 0
PNP: 002e.9: enabled 0
PNP: 002e.109: enabled 0
PNP: 002e.209: enabled 0
PNP: 002e.309: enabled 0
PNP: 002e.a: enabled 1
PNP: 002e.b: enabled 1
PNP: 002e.c: enabled 0
PNP: 002e.d: enabled 0
PNP: 002e.f: enabled 0
PCI: 00:14.4: enabled 1
PCI: 06:01.0: enabled 0
PCI: 06:02.0: enabled 0
PCI: 06:03.0: enabled 0
PCI: 06:05.0: enabled 1
PCI: 00:14.5: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
PCI: 00:19.0: enabled 0
PCI: 00:19.1: enabled 0
PCI: 00:19.2: enabled 0
PCI: 00:19.3: enabled 0
PCI: 00:19.4: enabled 0
PCI: 00:19.5: enabled 0
APIC: 01: enabled 1
APIC: 02: enabled 1
APIC: 03: enabled 1
APIC: 04: enabled 1
APIC: 05: enabled 1
APIC: 06: enabled 1
APIC: 07: enabled 1
PCI: 03:00.0: enabled 1
PCI: 04:00.0: enabled 1
BS: BS_DEV_INIT times (us): entry 0 run 1071772 exit 0
Finalize devices...
Devices finalized
BS: BS_POST_DEVICE times (us): entry 0 run 2000 exit 0
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 1 exit 0
Writing IRQ routing tables to 0xf0000...done.
Writing IRQ routing tables to 0xbfcbe000...done.
PIRQ table: 48 bytes.
Wrote the mp table end at: 000f0410 - 000f06c4
Wrote the mp table end at: bfcbd010 - bfcbd2c4
MP table: 708 bytes.
CBFS: 'Master Header Locator' located CBFS at [200:3fffc0)
CBFS: Locating 'fallback/dsdt.aml'
CBFS: Found @ offset 2b3c0 size 2669
CBFS: 'Master Header Locator' located CBFS at [200:3fffc0)
CBFS: Locating 'fallback/slic'
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at bfc99000.
ACPI: * FACS
ACPI: * DSDT
ACPI: * FADT
pm_base: 0x0800
ACPI: added table 1/32, length now 40
ACPI: * SSDT
processor_brand=AMD Opteron(tm) Processor 4256 EE
Pstates algorithm ...
Pstate_freq[0] = 1600MHz Pstate_power[0] = 4031mw
Pstate_latency[0] = 5us
Pstate_freq[1] = 1500MHz Pstate_power[1] = 3420mw
Pstate_latency[1] = 5us
Pstate_freq[2] = 1400MHz Pstate_power[2] = 3195mw
Pstate_latency[2] = 5us
Pstate_freq[3] = 1300MHz Pstate_power[3] = 2887mw
Pstate_latency[3] = 5us
Pstate_freq[4] = 1000MHz Pstate_power[4] = 2227mw
Pstate_latency[4] = 5us
PSS: 1600MHz power 4031 control 0x0 status 0x0
PSS: 1500MHz power 3420 control 0x1 status 0x1
PSS: 1400MHz power 3195 control 0x2 status 0x2
PSS: 1300MHz power 2887 control 0x3 status 0x3
PSS: 1000MHz power 2227 control 0x4 status 0x4
PSS: 1600MHz power 4031 control 0x0 status 0x0
PSS: 1500MHz power 3420 control 0x1 status 0x1
PSS: 1400MHz power 3195 control 0x2 status 0x2
PSS: 1300MHz power 2887 control 0x3 status 0x3
PSS: 1000MHz power 2227 control 0x4 status 0x4
PSS: 1600MHz power 4031 control 0x0 status 0x0
PSS: 1500MHz power 3420 control 0x1 status 0x1
PSS: 1400MHz power 3195 control 0x2 status 0x2
PSS: 1300MHz power 2887 control 0x3 status 0x3
PSS: 1000MHz power 2227 control 0x4 status 0x4
PSS: 1600MHz power 4031 control 0x0 status 0x0
PSS: 1500MHz power 3420 control 0x1 status 0x1
PSS: 1400MHz power 3195 control 0x2 status 0x2
PSS: 1300MHz power 2887 control 0x3 status 0x3
PSS: 1000MHz power 2227 control 0x4 status 0x4
PSS: 1600MHz power 4031 control 0x0 status 0x0
PSS: 1500MHz power 3420 control 0x1 status 0x1
PSS: 1400MHz power 3195 control 0x2 status 0x2
PSS: 1300MHz power 2887 control 0x3 status 0x3
PSS: 1000MHz power 2227 control 0x4 status 0x4
PSS: 1600MHz power 4031 control 0x0 status 0x0
PSS: 1500MHz power 3420 control 0x1 status 0x1
PSS: 1400MHz power 3195 control 0x2 status 0x2
PSS: 1300MHz power 2887 control 0x3 status 0x3
PSS: 1000MHz power 2227 control 0x4 status 0x4
PSS: 1600MHz power 4031 control 0x0 status 0x0
PSS: 1500MHz power 3420 control 0x1 status 0x1
PSS: 1400MHz power 3195 control 0x2 status 0x2
PSS: 1300MHz power 2887 control 0x3 status 0x3
PSS: 1000MHz power 2227 control 0x4 status 0x4
PSS: 1600MHz power 4031 control 0x0 status 0x0
PSS: 1500MHz power 3420 control 0x1 status 0x1
PSS: 1400MHz power 3195 control 0x2 status 0x2
PSS: 1300MHz power 2887 control 0x3 status 0x3
PSS: 1000MHz power 2227 control 0x4 status 0x4
ACPI: added table 2/32, length now 44
ACPI: * MCFG
ACPI: added table 3/32, length now 48
ACPI: * TCPA
TCPA log created at bfc89000
ACPI: added table 4/32, length now 52
ACPI: * MADT
ACPI: added table 5/32, length now 56
current = bfc9cb20
ACPI: * SRAT at bfc9cb20
SRAT: lapic cpu_index=00, node_id=00, apic_id=00
SRAT: lapic cpu_index=01, node_id=00, apic_id=01
SRAT: lapic cpu_index=02, node_id=00, apic_id=02
SRAT: lapic cpu_index=03, node_id=00, apic_id=03
SRAT: lapic cpu_index=04, node_id=00, apic_id=04
SRAT: lapic cpu_index=05, node_id=00, apic_id=05
SRAT: lapic cpu_index=06, node_id=00, apic_id=06
SRAT: lapic cpu_index=07, node_id=00, apic_id=07
set_srat_mem: dev DOMAIN: 0000, res->index=0007 startk=00000000, sizek=00300000
set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280
set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=002ffd00
set_srat_mem: dev DOMAIN: 0000, res->index=0030 startk=00400000, sizek=00d00000
ACPI: added table 6/32, length now 60
ACPI: * SLIT at bfc9cc48
ACPI: added table 7/32, length now 64
ACPI: * IVRS at bfc9cc80
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0xe0
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0xe0
Capability: type 0x01 @ 0x40
ACPI: added table 8/32, length now 68
ACPI: * HPET
ACPI: added table 9/32, length now 72
ACPI: done.
ACPI tables: 15728 bytes.
smbios_write_tables: bfc88000
Root Device (ASUS KCMA-D8)
CPU_CLUSTER: 0 (AMD Family 10h/15h Root Complex)
APIC: 00 (unknown)
DOMAIN: 0000 (AMD Family 10h/15h Root Complex)
PCI: 00:18.0 (AMD Family 10h/15h Northbridge)
PCI: 00:00.0 (ATI SR5650)
PCI: 00:00.1 (ATI SR5650)
PCI: 00:00.2 (ATI SR5650)
PCI: 00:02.0 (ATI SR5650)
PCI: 00:03.0 (ATI SR5650)
PCI: 00:04.0 (ATI SR5650)
PCI: 00:05.0 (ATI SR5650)
PCI: 00:06.0 (ATI SR5650)
PCI: 00:07.0 (ATI SR5650)
PCI: 00:08.0 (ATI SR5650)
PCI: 00:09.0 (ATI SR5650)
PCI: 00:0a.0 (ATI SR5650)
PCI: 00:0b.0 (ATI SR5650)
PCI: 00:11.0 (ATI SP5100)
PCI: 00:12.0 (ATI SP5100)
PCI: 00:12.1 (ATI SP5100)
PCI: 00:12.2 (ATI SP5100)
PCI: 00:13.0 (ATI SP5100)
PCI: 00:13.1 (ATI SP5100)
PCI: 00:13.2 (ATI SP5100)
PCI: 00:14.0 (ATI SP5100)
I2C: 01:50 (unknown)
I2C: 01:51 (unknown)
I2C: 01:52 (unknown)
I2C: 01:53 (unknown)
I2C: 01:54 (unknown)
I2C: 01:55 (unknown)
I2C: 01:56 (unknown)
I2C: 01:57 (unknown)
I2C: 01:2f (Nuvoton W83795G/ADG Hardware Monitor)
PCI: 00:14.1 (ATI SP5100)
PCI: 00:14.2 (ATI SP5100)
PCI: 00:14.3 (ATI SP5100)
PNP: 002e.0 (WINBOND W83667HG-A Super I/O)
PNP: 002e.1 (WINBOND W83667HG-A Super I/O)
PNP: 002e.2 (WINBOND W83667HG-A Super I/O)
PNP: 002e.3 (WINBOND W83667HG-A Super I/O)
PNP: 002e.5 (WINBOND W83667HG-A Super I/O)
PNP: 002e.106 (WINBOND W83667HG-A Super I/O)
PNP: 002e.107 (WINBOND W83667HG-A Super I/O)
PNP: 002e.207 (WINBOND W83667HG-A Super I/O)
PNP: 002e.307 (WINBOND W83667HG-A Super I/O)
PNP: 002e.407 (WINBOND W83667HG-A Super I/O)
PNP: 002e.8 (WINBOND W83667HG-A Super I/O)
PNP: 002e.108 (WINBOND W83667HG-A Super I/O)
PNP: 002e.9 (WINBOND W83667HG-A Super I/O)
PNP: 002e.109 (WINBOND W83667HG-A Super I/O)
PNP: 002e.209 (WINBOND W83667HG-A Super I/O)
PNP: 002e.309 (WINBOND W83667HG-A Super I/O)
PNP: 002e.a (WINBOND W83667HG-A Super I/O)
PNP: 002e.b (WINBOND W83667HG-A Super I/O)
PNP: 002e.c (WINBOND W83667HG-A Super I/O)
PNP: 002e.d (WINBOND W83667HG-A Super I/O)
PNP: 002e.f (WINBOND W83667HG-A Super I/O)
PCI: 00:14.4 (ATI SP5100)
PCI: 06:01.0 (ATI SP5100)
PCI: 06:02.0 (ATI SP5100)
PCI: 06:03.0 (ATI SP5100)
PCI: 06:05.0 (ATI SP5100)
PCI: 00:14.5 (ATI SP5100)
PCI: 00:18.1 (AMD Family 10h/15h Northbridge)
PCI: 00:18.2 (AMD Family 10h/15h Northbridge)
PCI: 00:18.3 (AMD Family 10h/15h Northbridge)
PCI: 00:18.4 (AMD Family 10h/15h Northbridge)
PCI: 00:18.5 (AMD Family 10h/15h Northbridge)
PCI: 00:19.0 (AMD Family 10h/15h Northbridge)
PCI: 00:19.1 (AMD Family 10h/15h Northbridge)
PCI: 00:19.2 (AMD Family 10h/15h Northbridge)
PCI: 00:19.3 (AMD Family 10h/15h Northbridge)
PCI: 00:19.4 (AMD Family 10h/15h Northbridge)
PCI: 00:19.5 (AMD Family 10h/15h Northbridge)
APIC: 01 (unknown)
APIC: 02 (unknown)
APIC: 03 (unknown)
APIC: 04 (unknown)
APIC: 05 (unknown)
APIC: 06 (unknown)
APIC: 07 (unknown)
PCI: 03:00.0 (unknown)
PCI: 04:00.0 (unknown)
SMBIOS tables: 554 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum 5012
Writing coreboot table at 0xbfcbf000
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1. 0000000000001000-000000000009ffff: RAM
2. 00000000000a0000-00000000000bffff: RESERVED
3. 00000000000c0000-00000000bfc87fff: RAM
4. 00000000bfc88000-00000000bfffffff: CONFIGURATION TABLES
5. 00000000c0000000-00000000cfffffff: RESERVED
6. 00000000fcb00000-00000000fcb03fff: RESERVED
7. 00000000feb00000-00000000feb00fff: RESERVED
8. 00000000fec00000-00000000fec00fff: RESERVED
9. 00000000fed00000-00000000fed00fff: RESERVED
10. 0000000100000000-000000043fffffff: RAM
Manufacturer: ef
SF: Detected W25Q32 with sector size 0x1000, total 0x400000
CBFS: 'Master Header Locator' located CBFS at [200:3fffc0)
FMAP: Found "FLASH" version 1.1 at 0.
FMAP: base = ffc00000 size = 400000 #areas = 3
Wrote coreboot table at: bfcbf000, 0x358 bytes, checksum 74d6
coreboot table: 880 bytes.
IMD ROOT 0. bffff000 00001000
IMD SMALL 1. bfffe000 00001000
CAR GLOBALS 2. bfff3000 0000a6c0
CONSOLE 3. bffd3000 00020000
TIME STAMP 4. bffd2000 00000400
AMDMEM INFO 5. bffc8000 000093fc
ACPI RESUME 6. bfcc7000 00301000
COREBOOT 7. bfcbf000 00008000
IRQ TABLE 8. bfcbe000 00001000
SMP TABLE 9. bfcbd000 00001000
ACPI 10. bfc99000 00024000
TCPA LOG 11. bfc89000 00010000
SMBIOS 12. bfc88000 00000800
IMD small region:
IMD ROOT 0. bfffec00 00000400
ROMSTAGE 1. bfffebe0 00000004
GDT 2. bfffe9e0 00000200
COREBOOTFWD 3. bfffe9a0 00000028
Writing AMD DCT configuration to Flash
CBFS: 'Master Header Locator' located CBFS at [200:3fffc0)
CBFS: Locating 's3nv'
CBFS: Found @ offset 2fdc0 size 10000
Manufacturer: ef
SF: Detected W25Q32 with sector size 0x1000, total 0x400000
SF: Successfully erased 32768 bytes @ 0x38000
BS: BS_WRITE_TABLES times (us): entry 0 run 786860 exit 0
CBFS: 'Master Header Locator' located CBFS at [200:3fffc0)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 55300 size 10a46
Loading segment from ROM address 0xffc55538
code (compression=1)
New segment dstaddr 0xe0520 memsize 0x1fae0 srcaddr 0xffc55570 filesize 0x10a0e
Loading segment from ROM address 0xffc55554
Entry Point 0x000fd234
Bounce Buffer at bfa7b000, 2147296 bytes
Loading Segment: addr: 0x00000000000e0520 memsz: 0x000000000001fae0 filesz: 0x0000000000010a0e
lb: [0x0000000000100000, 0x00000000002061f0)
Post relocation: addr: 0x00000000000e0520 memsz: 0x000000000001fae0 filesz: 0x0000000000010a0e
using LZMA
[ 0x000e0520, 00100000, 0x00100000) <- ffc55570
dest 000e0520, end 00100000, bouncebuffer bfa7b000
Loaded segments
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 60782 exit 0
Jumping to boot code at 000fd234(bfcbf000)
CPU0: stack: 00140000 - 00141000, lowest used address 001409e0, stack used: 1568 bytes
entry = 0x000fd234
lb_start = 0x00100000
lb_size = 0x001061f0
buffer = 0xbfa7b000
SeaBIOS (version rel-1.11.1-0-g0551a4b)
BUILD: gcc: (coreboot toolchain v1.50 October 15th, 2017) 6.3.0 binutils: (GNU Binutils) 2.29.1
Found coreboot cbmem console @ bffd3000
Found mainboard ASUS KCMA-D8
Relocating init from 0x000e1b60 to 0xbfc3b320 (size 52288)
Found CBFS header at 0xffc00238
multiboot: eax=0, ebx=0
Found 31 PCI devices (max PCI bus is 06)
Copying SMBIOS entry point from 0xbfc88000 to 0x000f61e0
Copying ACPI RSDP from 0xbfc99000 to 0x000f61b0
Skipping MPTABLE copy due to large size (708 bytes)
Copying PIR from 0xbfcbe000 to 0x000f6180
Using pmtimer, ioport 0x820
Scan for VGA option rom
Turning on vga text mode console
SeaBIOS (version rel-1.11.1-0-g0551a4b)
EHCI init on dev 00:12.2 (regs=0xfcb0e020)
EHCI init on dev 00:13.2 (regs=0xfcb0f020)
OHCI init on dev 00:12.0 (regs=0xfcb08000)
OHCI init on dev 00:12.1 (regs=0xfcb09000)
OHCI init on dev 00:13.0 (regs=0xfcb0a000)
OHCI init on dev 00:13.1 (regs=0xfcb0b000)
OHCI init on dev 00:14.5 (regs=0xfcb0c000)
ATA controller 1 at 4020/4040/0 (irq 0 dev 88)
ATA controller 2 at 4028/4044/0 (irq 0 dev 88)
ATA controller 3 at 1f0/3f4/0 (irq 14 dev a1)
ATA controller 4 at 170/374/0 (irq 15 dev a1)
Got ps2 nak (status=51)
Found 0 lpt ports
Found 2 serial ports
ata1-1: ST3808110AS ATA-7 Hard-Disk (74 GiBytes)
Searching bootorder for: /pci@i0cf8/*@11/drive@1/disk@1
USB keyboard initialized
All threads complete.
Scan for option roms
Press ESC for boot menu.
Searching bootorder for: HALT
drive 0x000f60d0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=156301488
Space available for UMB: c0000-ed800, f5a00-f60d0
Returned 253952 bytes of ZoneHigh
e820 map has 10 items:
0: 0000000000000000 - 000000000009fc00 = 1 RAM
1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
3: 0000000000100000 - 00000000bfc86000 = 1 RAM
4: 00000000bfc86000 - 00000000d0000000 = 2 RESERVED
5: 00000000fcb00000 - 00000000fcb04000 = 2 RESERVED
6: 00000000feb00000 - 00000000feb01000 = 2 RESERVED
7: 00000000fec00000 - 00000000fec01000 = 2 RESERVED
8: 00000000fed00000 - 00000000fed01000 = 2 RESERVED
9: 0000000100000000 - 0000000440000000 = 1 RAM
enter handle_19:
NULL
Booting from Hard Disk...
Booting from 0000:7c00