| |
| |
| coreboot-4.3-322-g6128048-dirty Sat Feb 27 10:20:29 UTC 2016 romstage starting... |
| Setting up static southbridge registers... done. |
| Disabling Watchdog reboot... done. |
| Setting up static northbridge registers... done. |
| Initializing Graphics... |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 5f40 size 79c |
| Back from sandybridge_early_initialization() |
| SMBus controller enabled. |
| CPU id(306a9): Intel(R) Core(TM) i7-3720QM CPU @ 2.60GHz |
| AES supported, TXT supported, VT supported |
| PCH type: QM67, device id: 1c4f, rev id 5 |
| Intel ME early init |
| Intel ME firmware is ready |
| ME: Requested 32MB UMA |
| Starting native Platform init |
| Row addr bits : 16 |
| Column addr bits : 10 |
| Number of ranks : 2 |
| DIMM Capacity : 8192 MB |
| CAS latencies : 5 6 7 8 9 10 11 |
| tCKmin : 1.250 ns |
| tAAmin : 13.125 ns |
| tWRmin : 15.000 ns |
| tRCDmin : 13.125 ns |
| tRRDmin : 6.000 ns |
| tRPmin : 13.125 ns |
| tRASmin : 35.000 ns |
| tRCmin : 48.125 ns |
| tRFCmin : 260.000 ns |
| tWTRmin : 7.500 ns |
| tRTPmin : 7.500 ns |
| tFAWmin : 30.000 ns |
| channel[0] rankmap = 0x3 |
| Row addr bits : 16 |
| Column addr bits : 10 |
| Number of ranks : 2 |
| DIMM Capacity : 8192 MB |
| CAS latencies : 5 6 7 8 9 10 11 |
| tCKmin : 1.250 ns |
| tAAmin : 13.125 ns |
| tWRmin : 15.000 ns |
| tRCDmin : 13.125 ns |
| tRRDmin : 6.000 ns |
| tRPmin : 13.125 ns |
| tRASmin : 35.000 ns |
| tRCmin : 48.125 ns |
| tRFCmin : 260.000 ns |
| tWTRmin : 7.500 ns |
| tRTPmin : 7.500 ns |
| tFAWmin : 30.000 ns |
| channel[1] rankmap = 0x3 |
| PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy...done |
| MCU frequency is set at : 800 MHz |
| Selected DRAM frequency: 800 MHz |
| Minimum CAS latency : 11T |
| Selected CAS latency : 11T |
| Selected CWL latency : 8T |
| Selected tRCD : 11T |
| Selected tRP : 11T |
| Selected tRAS : 28T |
| Selected tWR : 12T |
| Selected tFAW : 24T |
| Selected tRRD : 5T |
| Selected tRTP : 6T |
| Selected tWTR : 6T |
| Selected tRFC : 208T |
| Done dimm mapping |
| Update PCI-E configuration space: |
| PCI(0, 0, 0)[a0] = 0 |
| PCI(0, 0, 0)[a4] = 4 |
| PCI(0, 0, 0)[bc] = c2a00000 |
| PCI(0, 0, 0)[a8] = 3b600000 |
| PCI(0, 0, 0)[ac] = 4 |
| PCI(0, 0, 0)[b8] = c0000000 |
| PCI(0, 0, 0)[b0] = c0a00000 |
| PCI(0, 0, 0)[b4] = c0800000 |
| PCI(0, 0, 0)[7c] = 7f |
| PCI(0, 0, 0)[70] = fe000000 |
| PCI(0, 0, 0)[74] = 3 |
| PCI(0, 0, 0)[78] = fe000c00 |
| Done memory map |
| Done io registers |
| Done jedec reset |
| Done MRS commands |
| t123: 1767, 6000, 7620 |
| ME: FW Partition Table : OK |
| ME: Bringup L |
| |
| *** Log truncated, 2424 characters dropped. *** |
| |
| Relocate MRC DATA from feffa78c to bffdd000 (1040 bytes) |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'fallback/ramstage' |
| CBFS: Found @ offset 3ff00 size 15055 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x0a @ 0x58 |
| |
| |
| coreboot-4.3-322-g6128048-dirty Sat Feb 27 10:20:29 UTC 2016 ramstage starting... |
| Moving GDT to bfffe7c0...ok |
| Normal boot. |
| BS: BS_PRE_DEVICE times (us): entry 0 run 2 exit 0 |
| BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 2 exit 0 |
| Enumerating buses... |
| Show all devs... Before device enumeration. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 1 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 0 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 0 |
| PCI: 00:1c.3: enabled 1 |
| PCI: 00:1c.4: enabled 1 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 00ff.1: enabled 1 |
| PNP: 0c31.0: enabled 1 |
| PNP: 00ff.2: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| I2C: 00:54: enabled 1 |
| I2C: 00:55: enabled 1 |
| I2C: 00:56: enabled 1 |
| I2C: 00:57: enabled 1 |
| I2C: 00:5c: enabled 1 |
| I2C: 00:5d: enabled 1 |
| I2C: 00:5e: enabled 1 |
| I2C: 00:5f: enabled 1 |
| Compare with tree... |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 1 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 0 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 0 |
| PCI: 00:1c.3: enabled 1 |
| PCI: 00:1c.4: enabled 1 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 00ff.1: enabled 1 |
| PNP: 0c31.0: enabled 1 |
| PNP: 00ff.2: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| I2C: 00:54: enabled 1 |
| I2C: 00:55: enabled 1 |
| I2C: 00:56: enabled 1 |
| I2C: 00:57: enabled 1 |
| I2C: 00:5c: enabled 1 |
| I2C: 00:5d: enabled 1 |
| I2C: 00:5e: enabled 1 |
| I2C: 00:5f: enabled 1 |
| Root Device scanning... |
| root_dev_scan_bus for Root Device |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| DOMAIN: 0000 scanning... |
| PCI: pci_scan_bus for bus 00 |
| PCI: 00:00.0 [8086/0154] ops |
| Normal boot. |
| PCI: 00:00.0 [8086/0154] enabled |
| Capability: type 0x0d @ 0x88 |
| Capability: type 0x01 @ 0x80 |
| Capability: type 0x05 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| Capability: type 0x0d @ 0x88 |
| Capability: type 0x01 @ 0x80 |
| Capability: type 0x05 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| PCI: 00:01.0 subordinate bus PCI Express |
| PCI: 00:01.0 [8086/0151] enabled |
| PCI: 00:02.0 [8086/0000] ops |
| PCI: 00:02.0 [8086/0166] enabled |
| PCI: 00:04.0 [8086/0153] enabled |
| PCI: 00:16.0 [8086/1c3a] ops |
| PCI: 00:16.0 [8086/1c3a] enabled |
| PCI: 00:16.1: Disabling device |
| PCI: 00:16.1 [8086/1c3b] disabled No operations |
| PCI: 00:16.2: Disabling device |
| PCI: 00:16.2 [8086/1c3c] disabled No operations |
| PCI: 00:16.3: Disabling device |
| PCI: 00:16.3 [8086/1c3d] disabled No operations |
| PCI: 00:19.0 [8086/1502] enabled |
| PCI: 00:1a.0 [8086/0000] ops |
| PCI: 00:1a.0 [8086/1c2d] enabled |
| PCI: 00:1b.0 [8086/0000] ops |
| PCI: 00:1b.0 [8086/1c20] enabled |
| PCH: PCIe Root Port coalescing is enabled |
| PCI: 00:1c.0: Disabling device |
| PCI: 00:1c.0: check set enabled |
| PCH: Remap PCIe function 1 to 0 |
| PCI: 00:1c.1 [8086/0000] bus ops |
| PCI: 00:1c.1 [8086/1c12] enabled |
| PCI: 00:1c.2: Disabling device |
| PCH: Remap PCIe function 3 to 0 |
| PCI: 00:1c.3 [8086/0000] bus ops |
| PCI: 00:1c.3 [8086/1c16] enabled |
| PCH: Remap PCIe function 4 to 0 |
| PCI: 00:1c.4 [8086/0000] bus ops |
| PCI: 00:1c.4 [8086/1c18] enabled |
| PCI: 00:1c.5: Disabling device |
| PCI: 00:1c.6: Disabling device |
| PCI: 00:1c.7: Disabling device |
| PCH: RPFN 0x76543210 -> 0xfed31a0c |
| PCH: PCIe map 1c.0 -> 1c.4 |
| PCH: PCIe map 1c.1 -> 1c.0 |
| PCH: PCIe map 1c.3 -> 1c.1 |
| PCH: PCIe map 1c.4 -> 1c.3 |
| PCI: 00:1d.0 [8086/0000] ops |
| PCI: 00:1d.0 [8086/1c26] enabled |
| PCI: 00:1f.0 [8086/0000] bus ops |
| PCI: 00:1f.0 [8086/1c4f] enabled |
| PCI: 00:1f.2 [8086/0000] ops |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 5f40 size 79c |
| PCI: 00:1f.2 [8086/1c01] enabled |
| PCI: 00:1f.3 [8086/0000] bus ops |
| PCI: 00:1f.3 [8086/1c22] enabled |
| PCI: 00:1f.6 [8086/1c24] enabled |
| PCI: 00:01.0 scanning... |
| do_pci_scan_bridge for PCI: 00:01.0 |
| PCI: pci_scan_bus for bus 01 |
| scan_bus: scanning of bus PCI: 00:01.0 took 46 usecs |
| PCI: 00:1c.0 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.0 |
| PCI: pci_scan_bus for bus 02 |
| PCI: 02:00.0 [168c/0030] enabled |
| Capability: type 0x01 @ 0x40 |
| Capability: type 0x05 @ 0x50 |
| Capability: type 0x10 @ 0x70 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpointASPM: Enabled L0s and L1 |
| scan_bus: scanning of bus PCI: 00:1c.0 took 325 usecs |
| PCI: 00:1c.1 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.1 |
| PCI: pci_scan_bus for bus 03 |
| scan_bus: scanning of bus PCI: 00:1c.1 took 81 usecs |
| PCI: 00:1c.3 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.3 |
| PCI: pci_scan_bus for bus 04 |
| PCI: 04:00.0 [1180/e822] enabled |
| PCI: 04:00.1 [1180/e232] enabled |
| PCI: 04:00.3 [1180/e832] enabled |
| Capability: type 0x05 @ 0x50 |
| Capability: type 0x01 @ 0x78 |
| Capability: type 0x10 @ 0x80 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| Capability: type 0x05 @ 0x50 |
| Capability: type 0x01 @ 0x78 |
| Capability: type 0x10 @ 0x80 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| Capability: type 0x05 @ 0x50 |
| Capability: type 0x01 @ 0x78 |
| Capability: type 0x10 @ 0x80 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| scan_bus: scanning of bus PCI: 00:1c.3 took 867 usecs |
| PCI: 00:1f.0 scanning... |
| scan_lpc_bus for PCI: 00:1f.0 |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 5f40 size 79c |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 5f40 size 79c |
| PNP: 00ff.1 enabled |
| PNP: 0c31.0 enabled |
| recv_ec_data: 0x38 |
| recv_ec_data: 0x41 |
| recv_ec_data: 0x48 |
| recv_ec_data: 0x54 |
| recv_ec_data: 0x33 |
| recv_ec_data: 0x37 |
| recv_ec_data: 0x57 |
| recv_ec_data: 0x57 |
| recv_ec_data: 0x14 |
| recv_ec_data: 0x03 |
| recv_ec_data: 0x90 |
| recv_ec_data: 0x11 |
| EC Firmware ID 8AHT37WW-3.20, Version 9.01B |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 5f40 size 79c |
| recv_ec_data: 0x20 |
| recv_ec_data: 0x10 |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 5f40 size 79c |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 5f40 size 79c |
| recv_ec_data: 0x20 |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 5f40 size 79c |
| recv_ec_data: 0x20 |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 5f40 size 79c |
| recv_ec_data: 0x00 |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 5f40 size 79c |
| recv_ec_data: 0xa7 |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 5f40 size 79c |
| recv_ec_data: 0xc2 |
| recv_ec_data: 0x20 |
| PNP: 00ff.2 enabled |
| scan_lpc_bus for PCI: 00:1f.0 done |
| scan_bus: scanning of bus PCI: 00:1f.0 took 5795 usecs |
| PCI: 00:1f.3 scanning... |
| scan_smbus for PCI: 00:1f.3 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:54 enabled |
| smbus: PCI: 00:1f.3[0]->I2C: 01:55 enabled |
| smbus: PCI: 00:1f.3[0]->I2C: 01:56 enabled |
| smbus: PCI: 00:1f.3[0]->I2C: 01:57 enabled |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5c enabled |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5d enabled |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5e enabled |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5f enabled |
| scan_smbus for PCI: 00:1f.3 done |
| scan_bus: scanning of bus PCI: 00:1f.3 took 181 usecs |
| scan_bus: scanning of bus DOMAIN: 0000 took 8506 usecs |
| root_dev_scan_bus for Root Device done |
| scan_bus: scanning of bus Root Device took 8586 usecs |
| done |
| BS: BS_DEV_ENUMERATE times (us): entry 0 run 9413 exit 0 |
| found VGA at PCI: 00:02.0 |
| Setting up VGA for PCI: 00:02.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| Allocating resources... |
| Reading resources... |
| Root Device read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 |
| Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000. |
| PCI: 00:01.0 read_resources bus 1 link: 0 |
| PCI: 00:01.0 read_resources bus 1 link: 0 done |
| PCI: 00:1a.0 EHCI BAR hook registered |
| PCI: 00:1c.0 read_resources bus 2 link: 0 |
| PCI: 00:1c.0 read_resources bus 2 link: 0 done |
| PCI: 00:1c.1 read_resources bus 3 link: 0 |
| PCI: 00:1c.1 read_resources bus 3 link: 0 done |
| PCI: 00:1c.3 read_resources bus 4 link: 0 |
| PCI: 00:1c.3 read_resources bus 4 link: 0 done |
| More than one caller of pci_ehci_read_resources from PCI: 00:1d.0 |
| PCI: 00:1f.0 read_resources bus 0 link: 0 |
| PNP: 00ff.1 missing read_resources |
| PNP: 0c31.0 missing read_resources |
| PNP: 00ff.2 missing read_resources |
| PCI: 00:1f.0 read_resources bus 0 link: 0 done |
| PCI: 00:1f.3 read_resources bus 1 link: 0 |
| PCI: 00:1f.3 read_resources bus 1 link: 0 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 done |
| Root Device read_resources bus 0 link: 0 done |
| Done reading resources. |
| Show resources in subtree (Root Device)...After reading. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: acac |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 |
| PCI: 00:00.0 |
| PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags e0000200 index cf |
| PCI: 00:01.0 |
| PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 00:02.0 |
| PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18 |
| PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20 |
| PCI: 00:04.0 |
| PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:16.0 |
| PCI: 00:16.0 resource base 0 size 10 align 12 gran 4 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:19.0 |
| PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 |
| PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 |
| PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 |
| PCI: 00:1a.0 |
| PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:1c.4 |
| PCI: 00:1c.0 child on link 0 PCI: 02:00.0 |
| PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 02:00.0 |
| PCI: 02:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10 |
| PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30 |
| PCI: 00:1c.2 |
| PCI: 00:1c.1 |
| PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 00:1c.3 child on link 0 PCI: 04:00.0 |
| PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 04:00.0 |
| PCI: 04:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| PCI: 04:00.1 |
| PCI: 04:00.1 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| PCI: 04:00.3 |
| PCI: 04:00.3 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 10 |
| Unknown device path type: 0 |
| |
| Unknown device path type: 0 |
| resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10 |
| Unknown device path type: 0 |
| resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14 |
| Unknown device path type: 0 |
| resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18 |
| PCI: 00:1c.5 |
| PCI: 00:1c.6 |
| PCI: 00:1c.7 |
| PCI: 00:1d.0 |
| PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| PCI: 00:1f.0 child on link 0 PNP: 00ff.1 |
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200 |
| PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300 |
| PNP: 00ff.1 |
| PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 |
| PNP: 0c31.0 |
| PNP: 00ff.2 |
| PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 |
| PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 |
| PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 |
| PCI: 00:1f.2 |
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 |
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 |
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 |
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c |
| PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 |
| PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24 |
| PCI: 00:1f.3 child on link 0 I2C: 01:54 |
| PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 |
| PCI: 00:1f.3 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10 |
| I2C: 01:54 |
| I2C: 01:55 |
| I2C: 01:56 |
| I2C: 01:57 |
| I2C: 01:5c |
| I2C: 01:5d |
| I2C: 01:5e |
| I2C: 01:5f |
| PCI: 00:1f.6 |
| PCI: 00:1f.6 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10 |
| DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff |
| PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| Unknown device path type: 0 |
| 18 * [0x0 - 0xfff] io |
| PCI: 00:1c.3 io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.3 1c * [0x0 - 0xfff] io |
| PCI: 00:02.0 20 * [0x1000 - 0x103f] io |
| PCI: 00:19.0 18 * [0x1040 - 0x105f] io |
| PCI: 00:1f.2 20 * [0x1060 - 0x107f] io |
| PCI: 00:1f.2 10 * [0x1080 - 0x1087] io |
| PCI: 00:1f.2 18 * [0x1088 - 0x108f] io |
| PCI: 00:1f.2 14 * [0x1090 - 0x1093] io |
| PCI: 00:1f.2 1c * [0x1094 - 0x1097] io |
| DOMAIN: 0000 io: base: 1098 size: 1098 align: 12 gran: 0 limit: ffff done |
| DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff |
| PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:01.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 00:01.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 02:00.0 10 * [0x0 - 0x1ffff] mem |
| PCI: 02:00.0 30 * [0x20000 - 0x2ffff] mem |
| PCI: 00:1c.0 mem: base: 30000 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| Unknown device path type: 0 |
| 14 * [0x0 - 0x7fffff] prefmem |
| PCI: 00:1c.3 prefmem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done |
| PCI: 00:1c.3 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| Unknown device path type: 0 |
| 10 * [0x0 - 0x7fffff] mem |
| PCI: 04:00.3 10 * [0x800000 - 0x8007ff] mem |
| PCI: 04:00.0 10 * [0x801000 - 0x8010ff] mem |
| PCI: 04:00.1 10 * [0x802000 - 0x8020ff] mem |
| PCI: 00:1c.3 mem: base: 802100 size: 900000 align: 22 gran: 20 limit: ffffffff done |
| PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem |
| PCI: 00:1c.3 20 * [0x10000000 - 0x108fffff] mem |
| PCI: 00:1c.3 24 * [0x10c00000 - 0x113fffff] prefmem |
| PCI: 00:02.0 10 * [0x11400000 - 0x117fffff] mem |
| PCI: 00:1c.0 20 * [0x11800000 - 0x118fffff] mem |
| PCI: 00:19.0 10 * [0x11900000 - 0x1191ffff] mem |
| PCI: 00:04.0 10 * [0x11920000 - 0x11927fff] mem |
| PCI: 00:1b.0 10 * [0x11928000 - 0x1192bfff] mem |
| PCI: 00:19.0 14 * [0x1192c000 - 0x1192cfff] mem |
| PCI: 00:1f.6 10 * [0x1192d000 - 0x1192dfff] mem |
| PCI: 00:1f.2 24 * [0x1192e000 - 0x1192e7ff] mem |
| PCI: 00:1a.0 10 * [0x1192f000 - 0x1192f3ff] mem |
| PCI: 00:1d.0 10 * [0x11930000 - 0x119303ff] mem |
| PCI: 00:1f.3 10 * [0x11931000 - 0x119310ff] mem |
| PCI: 00:16.0 10 * [0x11932000 - 0x1193200f] mem |
| DOMAIN: 0000 mem: base: 11932010 size: 11932010 align: 28 gran: 0 limit: ffffffff done |
| avoid_fixed_resources: DOMAIN: 0000 |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff |
| constrain_resources: PCI: 00:00.0 cf base f0000000 limit f3ffffff mem (fixed) |
| constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed) |
| constrain_resources: PCI: 00:1f.0 10000200 base 00001600 limit 0000167b io (fixed) |
| skipping PNP: 00ff.2@60 fixed resource, size=0! |
| skipping PNP: 00ff.2@62 fixed resource, size=0! |
| skipping PNP: 00ff.2@64 fixed resource, size=0! |
| skipping PNP: 00ff.2@66 fixed resource, size=0! |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 base 0000167c limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 base d0000000 limit efffffff |
| Setting resources... |
| DOMAIN: 0000 io: base:167c size:1098 align:12 gran:0 limit:ffff |
| PCI: 00:1c.3 1c * [0x2000 - 0x2fff] io |
| PCI: 00:02.0 20 * [0x3000 - 0x303f] io |
| PCI: 00:19.0 18 * [0x3040 - 0x305f] io |
| PCI: 00:1f.2 20 * [0x3060 - 0x307f] io |
| PCI: 00:1f.2 10 * [0x3080 - 0x3087] io |
| PCI: 00:1f.2 18 * [0x3088 - 0x308f] io |
| PCI: 00:1f.2 14 * [0x3090 - 0x3093] io |
| PCI: 00:1f.2 1c * [0x3094 - 0x3097] io |
| DOMAIN: 0000 io: next_base: 3098 size: 1098 align: 12 gran: 0 done |
| PCI: 00:01.0 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:01.0 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| PCI: 00:1c.0 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:1c.0 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| PCI: 00:1c.1 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:1c.1 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| PCI: 00:1c.3 io: base:2000 size:1000 align:12 gran:12 limit:2fff |
| Unknown device path type: 0 |
| 18 * [0x2000 - 0x2fff] io |
| PCI: 00:1c.3 io: next_base: 3000 size: 1000 align: 12 gran: 12 done |
| DOMAIN: 0000 mem: base:d0000000 size:11932010 align:28 gran:0 limit:efffffff |
| PCI: 00:02.0 18 * [0xd0000000 - 0xdfffffff] prefmem |
| PCI: 00:1c.3 20 * [0xe0000000 - 0xe08fffff] mem |
| PCI: 00:1c.3 24 * [0xe0c00000 - 0xe13fffff] prefmem |
| PCI: 00:02.0 10 * [0xe1400000 - 0xe17fffff] mem |
| PCI: 00:1c.0 20 * [0xe1800000 - 0xe18fffff] mem |
| PCI: 00:19.0 10 * [0xe1900000 - 0xe191ffff] mem |
| PCI: 00:04.0 10 * [0xe1920000 - 0xe1927fff] mem |
| PCI: 00:1b.0 10 * [0xe1928000 - 0xe192bfff] mem |
| PCI: 00:19.0 14 * [0xe192c000 - 0xe192cfff] mem |
| PCI: 00:1f.6 10 * [0xe192d000 - 0xe192dfff] mem |
| PCI: 00:1f.2 24 * [0xe192e000 - 0xe192e7ff] mem |
| PCI: 00:1a.0 10 * [0xe192f000 - 0xe192f3ff] mem |
| PCI: 00:1d.0 10 * [0xe1930000 - 0xe19303ff] mem |
| PCI: 00:1f.3 10 * [0xe1931000 - 0xe19310ff] mem |
| PCI: 00:16.0 10 * [0xe1932000 - 0xe193200f] mem |
| DOMAIN: 0000 mem: next_base: e1932010 size: 11932010 align: 28 gran: 0 done |
| PCI: 00:01.0 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff |
| PCI: 00:01.0 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:01.0 mem: base:efffffff size:0 align:20 gran:20 limit:efffffff |
| PCI: 00:01.0 mem: next_base: efffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.0 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff |
| PCI: 00:1c.0 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.0 mem: base:e1800000 size:100000 align:20 gran:20 limit:e18fffff |
| PCI: 02:00.0 10 * [0xe1800000 - 0xe181ffff] mem |
| PCI: 02:00.0 30 * [0xe1820000 - 0xe182ffff] mem |
| PCI: 00:1c.0 mem: next_base: e1830000 size: 100000 align: 20 gran: 20 done |
| PCI: 00:1c.1 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff |
| PCI: 00:1c.1 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.1 mem: base:efffffff size:0 align:20 gran:20 limit:efffffff |
| PCI: 00:1c.1 mem: next_base: efffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.3 prefmem: base:e0c00000 size:800000 align:22 gran:20 limit:e13fffff |
| Unknown device path type: 0 |
| 14 * [0xe0c00000 - 0xe13fffff] prefmem |
| PCI: 00:1c.3 prefmem: next_base: e1400000 size: 800000 align: 22 gran: 20 done |
| PCI: 00:1c.3 mem: base:e0000000 size:900000 align:22 gran:20 limit:e08fffff |
| Unknown device path type: 0 |
| 10 * [0xe0000000 - 0xe07fffff] mem |
| PCI: 04:00.3 10 * [0xe0800000 - 0xe08007ff] mem |
| PCI: 04:00.0 10 * [0xe0801000 - 0xe08010ff] mem |
| PCI: 04:00.1 10 * [0xe0802000 - 0xe08020ff] mem |
| PCI: 00:1c.3 mem: next_base: e0802100 size: 900000 align: 22 gran: 20 done |
| Root Device assign_resources, bus 0 link: 0 |
| TOUUD 0x43b600000 TOLUD 0xc2a00000 TOM 0x400000000 |
| MEBASE 0x3fe000000 |
| IGD decoded, subtracting 32M UMA and 2M GTT |
| TSEG base 0xc0000000 size 8M |
| Available memory below 4GB: 3072M |
| Available memory above 4GB: 13238M |
| Adding PCIe config bar base=0xf0000000 size=0x4000000 |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| PCI: 00:00.0 cf <- [0x00f0000000 - 0x00f3ffffff] size 0x04000000 gran 0x00 mem<mmconfig> |
| PCI: 00:01.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io |
| PCI: 00:01.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem |
| PCI: 00:01.0 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 mem |
| PCI: 00:02.0 10 <- [0x00e1400000 - 0x00e17fffff] size 0x00400000 gran 0x16 mem64 |
| PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64 |
| PCI: 00:02.0 20 <- [0x0000003000 - 0x000000303f] size 0x00000040 gran 0x06 io |
| PCI: 00:04.0 10 <- [0x00e1920000 - 0x00e1927fff] size 0x00008000 gran 0x0f mem64 |
| PCI: 00:16.0 10 <- [0x00e1932000 - 0x00e193200f] size 0x00000010 gran 0x04 mem64 |
| PCI: 00:19.0 10 <- [0x00e1900000 - 0x00e191ffff] size 0x00020000 gran 0x11 mem |
| PCI: 00:19.0 14 <- [0x00e192c000 - 0x00e192cfff] size 0x00001000 gran 0x0c mem |
| PCI: 00:19.0 18 <- [0x0000003040 - 0x000000305f] size 0x00000020 gran 0x05 io |
| PCI: 00:1a.0 EHCI Debug Port hook triggered |
| PCI: 00:1a.0 10 <- [0x00e192f000 - 0x00e192f3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1a.0 10 <- [0x00e192f000 - 0x00e192f3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1a.0 EHCI Debug Port relocated |
| PCI: 00:1b.0 10 <- [0x00e1928000 - 0x00e192bfff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io |
| PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 prefmem |
| PCI: 00:1c.0 20 <- [0x00e1800000 - 0x00e18fffff] size 0x00100000 gran 0x14 bus 02 mem |
| PCI: 00:1c.0 assign_resources, bus 2 link: 0 |
| PCI: 02:00.0 10 <- [0x00e1800000 - 0x00e181ffff] size 0x00020000 gran 0x11 mem64 |
| PCI: 02:00.0 30 <- [0x00e1820000 - 0x00e182ffff] size 0x00010000 gran 0x10 romem |
| PCI: 00:1c.0 assign_resources, bus 2 link: 0 |
| PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io |
| PCI: 00:1c.1 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 prefmem |
| PCI: 00:1c.1 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 mem |
| PCI: 00:1c.3 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 04 io |
| PCI: 00:1c.3 24 <- [0x00e0c00000 - 0x00e13fffff] size 0x00800000 gran 0x14 bus 04 prefmem |
| PCI: 00:1c.3 20 <- [0x00e0000000 - 0x00e08fffff] size 0x00900000 gran 0x14 bus 04 mem |
| PCI: 00:1c.3 assign_resources, bus 4 link: 0 |
| PCI: 04:00.0 10 <- [0x00e0801000 - 0x00e08010ff] size 0x00000100 gran 0x08 mem |
| PCI: 04:00.1 10 <- [0x00e0802000 - 0x00e08020ff] size 0x00000100 gran 0x08 mem |
| PCI: 04:00.3 10 <- [0x00e0800000 - 0x00e08007ff] size 0x00000800 gran 0x0b mem |
| Unknown device path type: 0 |
| missing set_resources |
| PCI: 00:1c.3 assign_resources, bus 4 link: 0 |
| PCI: 00:1d.0 10 <- [0x00e1930000 - 0x00e19303ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1f.0 assign_resources, bus 0 link: 0 |
| PNP: 00ff.1 missing set_resources |
| PNP: 00ff.2 missing set_resources |
| PCI: 00:1f.0 assign_resources, bus 0 link: 0 |
| PCI: 00:1f.2 10 <- [0x0000003080 - 0x0000003087] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 14 <- [0x0000003090 - 0x0000003093] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 18 <- [0x0000003088 - 0x000000308f] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 1c <- [0x0000003094 - 0x0000003097] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 20 <- [0x0000003060 - 0x000000307f] size 0x00000020 gran 0x05 io |
| PCI: 00:1f.2 24 <- [0x00e192e000 - 0x00e192e7ff] size 0x00000800 gran 0x0b mem |
| PCI: 00:1f.3 10 <- [0x00e1931000 - 0x00e19310ff] size 0x00000100 gran 0x08 mem64 |
| PCI: 00:1f.3 assign_resources, bus 1 link: 0 |
| PCI: 00:1f.3 assign_resources, bus 1 link: 0 |
| PCI: 00:1f.6 10 <- [0x00e192d000 - 0x00e192dfff] size 0x00001000 gran 0x0c mem64 |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| Root Device assign_resources, bus 0 link: 0 |
| Done setting resources. |
| Show resources in subtree (Root Device)...After assigning values. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: acac |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 167c size 1098 align 12 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base d0000000 size 11932010 align 28 gran 0 limit efffffff flags 40040200 index 10000100 |
| DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 |
| DOMAIN: 0000 resource base 100000 size bff00000 align 0 gran 0 limit 0 flags e0004200 index 4 |
| DOMAIN: 0000 resource base 100000000 size 33b600000 align 0 gran 0 limit 0 flags e0004200 index 5 |
| DOMAIN: 0000 resource base c0000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6 |
| DOMAIN: 0000 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 7 |
| DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 8 |
| DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 9 |
| DOMAIN: 0000 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a |
| DOMAIN: 0000 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b |
| PCI: 00:00.0 |
| PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags e0000200 index cf |
| PCI: 00:01.0 |
| PCI: 00:01.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:01.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 |
| PCI: 00:01.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20 |
| PCI: 00:02.0 |
| PCI: 00:02.0 resource base e1400000 size 400000 align 22 gran 22 limit e17fffff flags 60000201 index 10 |
| PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit dfffffff flags 60001201 index 18 |
| PCI: 00:02.0 resource base 3000 size 40 align 6 gran 6 limit 303f flags 60000100 index 20 |
| PCI: 00:04.0 |
| PCI: 00:04.0 resource base e1920000 size 8000 align 15 gran 15 limit e1927fff flags 60000201 index 10 |
| PCI: 00:16.0 |
| PCI: 00:16.0 resource base e1932000 size 10 align 12 gran 4 limit e193200f flags 60000201 index 10 |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:19.0 |
| PCI: 00:19.0 resource base e1900000 size 20000 align 17 gran 17 limit e191ffff flags 60000200 index 10 |
| PCI: 00:19.0 resource base e192c000 size 1000 align 12 gran 12 limit e192cfff flags 60000200 index 14 |
| PCI: 00:19.0 resource base 3040 size 20 align 5 gran 5 limit 305f flags 60000100 index 18 |
| PCI: 00:1a.0 |
| PCI: 00:1a.0 resource base e192f000 size 400 align 12 gran 10 limit e192f3ff flags 60000200 index 10 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base e1928000 size 4000 align 14 gran 14 limit e192bfff flags 60000201 index 10 |
| PCI: 00:1c.4 |
| PCI: 00:1c.0 child on link 0 PCI: 02:00.0 |
| PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 |
| PCI: 00:1c.0 resource base e1800000 size 100000 align 20 gran 20 limit e18fffff flags 60080202 index 20 |
| PCI: 02:00.0 |
| PCI: 02:00.0 resource base e1800000 size 20000 align 17 gran 17 limit e181ffff flags 60000201 index 10 |
| PCI: 02:00.0 resource base e1820000 size 10000 align 16 gran 16 limit e182ffff flags 60002200 index 30 |
| PCI: 00:1c.2 |
| PCI: 00:1c.1 |
| PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:1c.1 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 |
| PCI: 00:1c.1 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20 |
| PCI: 00:1c.3 child on link 0 PCI: 04:00.0 |
| PCI: 00:1c.3 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c |
| PCI: 00:1c.3 resource base e0c00000 size 800000 align 22 gran 20 limit e13fffff flags 60081202 index 24 |
| PCI: 00:1c.3 resource base e0000000 size 900000 align 22 gran 20 limit e08fffff flags 60080202 index 20 |
| PCI: 04:00.0 |
| PCI: 04:00.0 resource base e0801000 size 100 align 12 gran 8 limit e08010ff flags 60000200 index 10 |
| PCI: 04:00.1 |
| PCI: 04:00.1 resource base e0802000 size 100 align 12 gran 8 limit e08020ff flags 60000200 index 10 |
| PCI: 04:00.3 |
| PCI: 04:00.3 resource base e0800000 size 800 align 12 gran 11 limit e08007ff flags 60000200 index 10 |
| Unknown device path type: 0 |
| |
| Unknown device path type: 0 |
| resource base e0000000 size 800000 align 22 gran 22 limit e07fffff flags 40000200 index 10 |
| Unknown device path type: 0 |
| resource base e0c00000 size 800000 align 22 gran 22 limit e13fffff flags 40001200 index 14 |
| Unknown device path type: 0 |
| resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 40000100 index 18 |
| PCI: 00:1c.5 |
| PCI: 00:1c.6 |
| PCI: 00:1c.7 |
| PCI: 00:1d.0 |
| PCI: 00:1d.0 resource base e1930000 size 400 align 12 gran 10 limit e19303ff flags 60000200 index 10 |
| PCI: 00:1f.0 child on link 0 PNP: 00ff.1 |
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200 |
| PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300 |
| PNP: 00ff.1 |
| PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 |
| PNP: 0c31.0 |
| PNP: 00ff.2 |
| PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 |
| PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 |
| PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 |
| PCI: 00:1f.2 |
| PCI: 00:1f.2 resource base 3080 size 8 align 3 gran 3 limit 3087 flags 60000100 index 10 |
| PCI: 00:1f.2 resource base 3090 size 4 align 2 gran 2 limit 3093 flags 60000100 index 14 |
| PCI: 00:1f.2 resource base 3088 size 8 align 3 gran 3 limit 308f flags 60000100 index 18 |
| PCI: 00:1f.2 resource base 3094 size 4 align 2 gran 2 limit 3097 flags 60000100 index 1c |
| PCI: 00:1f.2 resource base 3060 size 20 align 5 gran 5 limit 307f flags 60000100 index 20 |
| PCI: 00:1f.2 resource base e192e000 size 800 align 12 gran 11 limit e192e7ff flags 60000200 index 24 |
| PCI: 00:1f.3 child on link 0 I2C: 01:54 |
| PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 |
| PCI: 00:1f.3 resource base e1931000 size 100 align 12 gran 8 limit e19310ff flags 60000201 index 10 |
| I2C: 01:54 |
| I2C: 01:55 |
| I2C: 01:56 |
| I2C: 01:57 |
| I2C: 01:5c |
| I2C: 01:5d |
| I2C: 01:5e |
| I2C: 01:5f |
| PCI: 00:1f.6 |
| PCI: 00:1f.6 resource base e192d000 size 1000 align 12 gran 12 limit e192dfff flags 60000201 index 10 |
| Done allocating resources. |
| BS: BS_DEV_RESOURCES times (us): entry 0 run 12501 exit 0 |
| Enabling resources... |
| PCI: 00:00.0 subsystem <- 0000/0000 |
| PCI: 00:00.0 cmd <- 06 |
| PCI: 00:01.0 bridge ctrl <- 0003 |
| PCI: 00:01.0 cmd <- 00 |
| PCI: 00:02.0 subsystem <- 0000/0000 |
| PCI: 00:02.0 cmd <- 03 |
| PCI: 00:04.0 cmd <- 02 |
| PCI: 00:16.0 subsystem <- 0000/0000 |
| PCI: 00:16.0 cmd <- 02 |
| PCI: 00:19.0 subsystem <- 0000/0000 |
| PCI: 00:19.0 cmd <- 103 |
| PCI: 00:1a.0 subsystem <- 0000/0000 |
| PCI: 00:1a.0 cmd <- 102 |
| PCI: 00:1b.0 subsystem <- 0000/0000 |
| PCI: 00:1b.0 cmd <- 102 |
| PCI: 00:1c.0 bridge ctrl <- 0003 |
| PCI: 00:1c.0 subsystem <- 0000/0000 |
| PCI: 00:1c.0 cmd <- 106 |
| PCI: 00:1c.1 bridge ctrl <- 0003 |
| PCI: 00:1c.1 subsystem <- 0000/0000 |
| PCI: 00:1c.1 cmd <- 100 |
| PCI: 00:1c.3 bridge ctrl <- 0003 |
| PCI: 00:1c.3 subsystem <- 0000/0000 |
| PCI: 00:1c.3 cmd <- 107 |
| PCI: 00:1d.0 subsystem <- 0000/0000 |
| PCI: 00:1d.0 cmd <- 102 |
| pch_decode_init |
| PCI: 00:1f.0 subsystem <- 0000/0000 |
| PCI: 00:1f.0 cmd <- 107 |
| PCI: 00:1f.2 subsystem <- 0000/0000 |
| PCI: 00:1f.2 cmd <- 03 |
| PCI: 00:1f.3 subsystem <- 0000/0000 |
| PCI: 00:1f.3 cmd <- 103 |
| PCI: 00:1f.6 cmd <- 02 |
| PCI: 02:00.0 cmd <- 02 |
| PCI: 04:00.0 cmd <- 06 |
| PCI: 04:00.1 cmd <- 06 |
| PCI: 04:00.3 cmd <- 02 |
| done. |
| BS: BS_DEV_ENABLE times (us): entry 0 run 549 exit 0 |
| Initializing devices... |
| Root Device init ... |
| Root Device init finished in 9 usecs |
| CPU_CLUSTER: 0 init ... |
| start_eip=0x00001000, code_size=0x00000031 |
| Setting up SMI for CPU |
| Loading module at 00038000 with entry 00038000. filesize: 0x160 memsize: 0x160 |
| Processing 10 relocs. Offset value of 0x00038000 |
| Adjusting 00038002: 0x00000024 -> 0x00038024 |
| Adjusting 0003801d: 0x0000003c -> 0x0003803c |
| Adjusting 00038026: 0x00000024 -> 0x00038024 |
| Adjusting 00038054: 0x000000d8 -> 0x000380d8 |
| Adjusting 00038066: 0x00000160 -> 0x00038160 |
| Adjusting 0003806d: 0x000000c0 -> 0x000380c0 |
| Adjusting 00038075: 0x000000c4 -> 0x000380c4 |
| Adjusting 0003807e: 0x000000d0 -> 0x000380d0 |
| Adjusting 00038085: 0x000000cc -> 0x000380cc |
| Adjusting 0003808b: 0x000000c8 -> 0x000380c8 |
| SMM Module: stub loaded at 00038000. Will call 00119a97(0013b9e0) |
| Installing SMM handler to 0xc0000000 |
| Loading module at c0010000 with entry c0010592. filesize: 0x1918 memsize: 0x5938 |
| Processing 75 relocs. Offset value of 0xc0010000 |
| Adjusting c0010036: 0x00001834 -> 0xc0011834 |
| Adjusting c0010055: 0x00001834 -> 0xc0011834 |
| Adjusting c0010108: 0x00001834 -> 0xc0011834 |
| Adjusting c00101b6: 0x0000178e -> 0xc001178e |
| Adjusting c00104e1: 0x00001918 -> 0xc0011918 |
| Adjusting c00104fb: 0x00001920 -> 0xc0011920 |
| Adjusting c0010512: 0x00001920 -> 0xc0011920 |
| Adjusting c001055f: 0x00001910 -> 0xc0011910 |
| Adjusting c0010575: 0x00001860 -> 0xc0011860 |
| Adjusting c001059b: 0x00001918 -> 0xc0011918 |
| Adjusting c00105aa: 0x00001918 -> 0xc0011918 |
| Adjusting c00105b7: 0x00001900 -> 0xc0011900 |
| Adjusting c00105c2: 0x00001900 -> 0xc0011900 |
| Adjusting c00105d6: 0x00001904 -> 0xc0011904 |
| Adjusting c00105dc: 0x0000191c -> 0xc001191c |
| Adjusting c00105e4: 0x00001904 -> 0xc0011904 |
| Adjusting c0010601: 0x0000191c -> 0xc001191c |
| Adjusting c001060a: 0x00001900 -> 0xc0011900 |
| Adjusting c0010726: 0x00001797 -> 0xc0011797 |
| Adjusting c0010845: 0x0000190c -> 0xc001190c |
| Adjusting c001086e: 0x0000190c -> 0xc001190c |
| Adjusting c0010891: 0x0000190c -> 0xc001190c |
| Adjusting c00108ba: 0x00001908 -> 0xc0011908 |
| Adjusting c00108d8: 0x0000190c -> 0xc001190c |
| Adjusting c00108fe: 0x00001908 -> 0xc0011908 |
| Adjusting c00109ba: 0x0000190c -> 0xc001190c |
| Adjusting c00109bf: 0x00001908 -> 0xc0011908 |
| Adjusting c00109cf: 0x00001820 -> 0xc0011820 |
| Adjusting c0010ced: 0x00001924 -> 0xc0011924 |
| Adjusting c0010d1c: 0x00001928 -> 0xc0011928 |
| Adjusting c0010d2f: 0x00001924 -> 0xc0011924 |
| Adjusting c0010d52: 0x00001928 -> 0xc0011928 |
| Adjusting c0010e16: 0x00001924 -> 0xc0011924 |
| Adjusting c001104d: 0x00001928 -> 0xc0011928 |
| Adjusting c0011250: 0x00001928 -> 0xc0011928 |
| Adjusting c0011317: 0x00001910 -> 0xc0011910 |
| Adjusting c0011327: 0x00001910 -> 0xc0011910 |
| Adjusting c0011333: 0x00001910 -> 0xc0011910 |
| Adjusting c0011343: 0x00001910 -> 0xc0011910 |
| Adjusting c0011364: 0x00001910 -> 0xc0011910 |
| Adjusting c0011393: 0x00001910 -> 0xc0011910 |
| Adjusting c00113b9: 0x00001910 -> 0xc0011910 |
| Adjusting c00113cc: 0x00001934 -> 0xc0011934 |
| Adjusting c001140e: 0x00001934 -> 0xc0011934 |
| Adjusting c0011414: 0x00001930 -> 0xc0011930 |
| Adjusting c0011424: 0x0000192c -> 0xc001192c |
| Adjusting c0011441: 0x0000192c -> 0xc001192c |
| Adjusting c0011462: 0x00001910 -> 0xc0011910 |
| Adjusting c0011488: 0x00001910 -> 0xc0011910 |
| Adjusting c00114dd: 0x00001930 -> 0xc0011930 |
| Adjusting c0011537: 0x00001803 -> 0xc0011803 |
| Adjusting c0011554: 0x00001910 -> 0xc0011910 |
| Adjusting c001156b: 0x00001930 -> 0xc0011930 |
| Adjusting c001163d: 0x00001910 -> 0xc0011910 |
| Adjusting c001166b: 0x00001910 -> 0xc0011910 |
| Adjusting c00116b5: 0x00001910 -> 0xc0011910 |
| Adjusting c0011753: 0x00001930 -> 0xc0011930 |
| Adjusting c0011767: 0x00001910 -> 0xc0011910 |
| Adjusting c0011818: 0x00001778 -> 0xc0011778 |
| Adjusting c0011820: 0x00000021 -> 0xc0010021 |
| Adjusting c0011824: 0x00001778 -> 0xc0011778 |
| Adjusting c001182c: 0x00000092 -> 0xc0010092 |
| Adjusting c0011838: 0x00001844 -> 0xc0011844 |
| Adjusting c0011844: 0x000002e7 -> 0xc00102e7 |
| Adjusting c0011848: 0x000002f3 -> 0xc00102f3 |
| Adjusting c001184c: 0x000002f6 -> 0xc00102f6 |
| Adjusting c0011870: 0x0000151e -> 0xc001151e |
| Adjusting c0011874: 0x00001374 -> 0xc0011374 |
| Adjusting c0011880: 0x0000145f -> 0xc001145f |
| Adjusting c0011884: 0x00001314 -> 0xc0011314 |
| Adjusting c0011888: 0x0000133c -> 0xc001133c |
| Adjusting c001188c: 0x00001324 -> 0xc0011324 |
| Adjusting c0011894: 0x00001485 -> 0xc0011485 |
| Adjusting c0011898: 0x00001330 -> 0xc0011330 |
| Adjusting c00118b4: 0x000014c8 -> 0xc00114c8 |
| Loading module at c0008000 with entry c0008000. filesize: 0x160 memsize: 0x160 |
| Processing 10 relocs. Offset value of 0xc0008000 |
| Adjusting c0008002: 0x00000024 -> 0xc0008024 |
| Adjusting c000801d: 0x0000003c -> 0xc000803c |
| Adjusting c0008026: 0x00000024 -> 0xc0008024 |
| Adjusting c0008054: 0x000000d8 -> 0xc00080d8 |
| Adjusting c0008066: 0x00000160 -> 0xc0008160 |
| Adjusting c000806d: 0x000000c0 -> 0xc00080c0 |
| Adjusting c0008075: 0x000000c4 -> 0xc00080c4 |
| Adjusting c000807e: 0x000000d0 -> 0xc00080d0 |
| Adjusting c0008085: 0x000000cc -> 0xc00080cc |
| Adjusting c000808b: 0x000000c8 -> 0xc00080c8 |
| SMM Module: placing jmp sequence at c0007c00 rel16 0x03fd |
| SMM Module: placing jmp sequence at c0007800 rel16 0x07fd |
| SMM Module: placing jmp sequence at c0007400 rel16 0x0bfd |
| SMM Module: placing jmp sequence at c0007000 rel16 0x0ffd |
| SMM Module: placing jmp sequence at c0006c00 rel16 0x13fd |
| SMM Module: placing jmp sequence at c0006800 rel16 0x17fd |
| SMM Module: placing jmp sequence at c0006400 rel16 0x1bfd |
| SMM Module: stub loaded at c0008000. Will call c0010592(00000000) |
| Initializing southbridge SMI... ... pmbase = 0x0500 |
| |
| SMI_STS: MCSMI PM1 |
| PM1_STS: TMROF |
| GPE0_STS: GPIO14 GPIO13 GPIO11 GPIO10 GPIO9 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO1 GPIO0 TCO_SCI |
| ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI1 GPI0 |
| TCO_STS: |
| ... raise SMI# |
| In relocation handler: cpu 0 |
| New SMBASE=0xc0000000 IEDBASE=0xc0400000 @ 0003fc00 |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Relocation complete. |
| Locking SMM. |
| Initializing CPU #0 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 80 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x1b |
| CPU: Intel(R) Core(TM) i7-3720QM CPU @ 2.60GHz. |
| MTRR: Physical address space: |
| 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 |
| 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 |
| 0x00000000000c0000 - 0x00000000c0000000 size 0xbff40000 type 6 |
| 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 0 |
| 0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1 |
| 0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0 |
| 0x0000000100000000 - 0x000000043b600000 size 0x33b600000 type 6 |
| MTRR addr 0x0-0x10 set to 6 type @ 0 |
| MTRR addr 0x10-0x20 set to 6 type @ 1 |
| MTRR addr 0x20-0x30 set to 6 type @ 2 |
| MTRR addr 0x30-0x40 set to 6 type @ 3 |
| MTRR addr 0x40-0x50 set to 6 type @ 4 |
| MTRR addr 0x50-0x60 set to 6 type @ 5 |
| MTRR addr 0x60-0x70 set to 6 type @ 6 |
| MTRR addr 0x70-0x80 set to 6 type @ 7 |
| MTRR addr 0x80-0x84 set to 6 type @ 8 |
| MTRR addr 0x84-0x88 set to 6 type @ 9 |
| MTRR addr 0x88-0x8c set to 6 type @ 10 |
| MTRR addr 0x8c-0x90 set to 6 type @ 11 |
| MTRR addr 0x90-0x94 set to 6 type @ 12 |
| MTRR addr 0x94-0x98 set to 6 type @ 13 |
| MTRR addr 0x98-0x9c set to 6 type @ 14 |
| MTRR addr 0x9c-0xa0 set to 6 type @ 15 |
| MTRR addr 0xa0-0xa4 set to 0 type @ 16 |
| MTRR addr 0xa4-0xa8 set to 0 type @ 17 |
| MTRR addr 0xa8-0xac set to 0 type @ 18 |
| MTRR addr 0xac-0xb0 set to 0 type @ 19 |
| MTRR addr 0xb0-0xb4 set to 0 type @ 20 |
| MTRR addr 0xb4-0xb8 set to 0 type @ 21 |
| MTRR addr 0xb8-0xbc set to 0 type @ 22 |
| MTRR addr 0xbc-0xc0 set to 0 type @ 23 |
| MTRR addr 0xc0-0xc1 set to 6 type @ 24 |
| MTRR addr 0xc1-0xc2 set to 6 type @ 25 |
| MTRR addr 0xc2-0xc3 set to 6 type @ 26 |
| MTRR addr 0xc3-0xc4 set to 6 type @ 27 |
| MTRR addr 0xc4-0xc5 set to 6 type @ 28 |
| MTRR addr 0xc5-0xc6 set to 6 type @ 29 |
| MTRR addr 0xc6-0xc7 set to 6 type @ 30 |
| MTRR addr 0xc7-0xc8 set to 6 type @ 31 |
| MTRR addr 0xc8-0xc9 set to 6 type @ 32 |
| MTRR addr 0xc9-0xca set to 6 type @ 33 |
| MTRR addr 0xca-0xcb set to 6 type @ 34 |
| MTRR addr 0xcb-0xcc set to 6 type @ 35 |
| MTRR addr 0xcc-0xcd set to 6 type @ 36 |
| MTRR addr 0xcd-0xce set to 6 type @ 37 |
| MTRR addr 0xce-0xcf set to 6 type @ 38 |
| MTRR addr 0xcf-0xd0 set to 6 type @ 39 |
| MTRR addr 0xd0-0xd1 set to 6 type @ 40 |
| MTRR addr 0xd1-0xd2 set to 6 type @ 41 |
| MTRR addr 0xd2-0xd3 set to 6 type @ 42 |
| MTRR addr 0xd3-0xd4 set to 6 type @ 43 |
| MTRR addr 0xd4-0xd5 set to 6 type @ 44 |
| MTRR addr 0xd5-0xd6 set to 6 type @ 45 |
| MTRR addr 0xd6-0xd7 set to 6 type @ 46 |
| MTRR addr 0xd7-0xd8 set to 6 type @ 47 |
| MTRR addr 0xd8-0xd9 set to 6 type @ 48 |
| MTRR addr 0xd9-0xda set to 6 type @ 49 |
| MTRR addr 0xda-0xdb set to 6 type @ 50 |
| MTRR addr 0xdb-0xdc set to 6 type @ 51 |
| MTRR addr 0xdc-0xdd set to 6 type @ 52 |
| MTRR addr 0xdd-0xde set to 6 type @ 53 |
| MTRR addr 0xde-0xdf set to 6 type @ 54 |
| MTRR addr 0xdf-0xe0 set to 6 type @ 55 |
| MTRR addr 0xe0-0xe1 set to 6 type @ 56 |
| MTRR addr 0xe1-0xe2 set to 6 type @ 57 |
| MTRR addr 0xe2-0xe3 set to 6 type @ 58 |
| MTRR addr 0xe3-0xe4 set to 6 type @ 59 |
| MTRR addr 0xe4-0xe5 set to 6 type @ 60 |
| MTRR addr 0xe5-0xe6 set to 6 type @ 61 |
| MTRR addr 0xe6-0xe7 set to 6 type @ 62 |
| MTRR addr 0xe7-0xe8 set to 6 type @ 63 |
| MTRR addr 0xe8-0xe9 set to 6 type @ 64 |
| MTRR addr 0xe9-0xea set to 6 type @ 65 |
| MTRR addr 0xea-0xeb set to 6 type @ 66 |
| MTRR addr 0xeb-0xec set to 6 type @ 67 |
| MTRR addr 0xec-0xed set to 6 type @ 68 |
| MTRR addr 0xed-0xee set to 6 type @ 69 |
| MTRR addr 0xee-0xef set to 6 type @ 70 |
| MTRR addr 0xef-0xf0 set to 6 type @ 71 |
| MTRR addr 0xf0-0xf1 set to 6 type @ 72 |
| MTRR addr 0xf1-0xf2 set to 6 type @ 73 |
| MTRR addr 0xf2-0xf3 set to 6 type @ 74 |
| MTRR addr 0xf3-0xf4 set to 6 type @ 75 |
| MTRR addr 0xf4-0xf5 set to 6 type @ 76 |
| MTRR addr 0xf5-0xf6 set to 6 type @ 77 |
| MTRR addr 0xf6-0xf7 set to 6 type @ 78 |
| MTRR addr 0xf7-0xf8 set to 6 type @ 79 |
| MTRR addr 0xf8-0xf9 set to 6 type @ 80 |
| MTRR addr 0xf9-0xfa set to 6 type @ 81 |
| MTRR addr 0xfa-0xfb set to 6 type @ 82 |
| MTRR addr 0xfb-0xfc set to 6 type @ 83 |
| MTRR addr 0xfc-0xfd set to 6 type @ 84 |
| MTRR addr 0xfd-0xfe set to 6 type @ 85 |
| MTRR addr 0xfe-0xff set to 6 type @ 86 |
| MTRR addr 0xff-0x100 set to 6 type @ 87 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| MTRR: default type WB/UC MTRR counts: 3/11. |
| MTRR: WB selected as default type. |
| MTRR: 0 base 0x00000000c0000000 mask 0x0000000ff0000000 type 0 |
| MTRR: 1 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1 |
| MTRR: 2 base 0x00000000e0000000 mask 0x0000000fe0000000 type 0 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local apic... apic_id: 0x00 done. |
| Enabling VMX |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2600 |
| Turbo is available but hidden |
| Turbo has been enabled |
| CPU: 0 has 4 cores, 2 threads per core |
| CPU: 0 has core 1 |
| CPU1: stack_base 00135000, stack_end 00135ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 1. |
| After apic_write. |
| In relocation handler: cpu 1 |
| New SMBASE=0xbffffc00 IEDBASE=0xc0400000 @ 0003fc00 |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 1. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #1 |
| CPU: 0 has core 2 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 80 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x1b |
| CPU: Intel(R) Core(TM) i7-3720QM CPU @ 2.60GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local apic... apic_id: 0x01 done. |
| Enabling VMX |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2600 |
| CPU #1 initialized |
| CPU2: stack_base 00134000, stack_end 00134ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 2. |
| After apic_write. |
| In relocation handler: cpu 2 |
| Startup point 1. |
| Waiting for send to finish... |
| +New SMBASE=0xbffff800 IEDBASE=0xc0400000 @ 0003fc00 |
| Sending STARTUP #2 to 2. |
| After apic_write. |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU: 0 has core 3 |
| Initializing CPU #2 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 80 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x0 |
| microcode: updated to revision 0x1b date=2014-05-29 |
| CPU: Intel(R) Core(TM) i7-3720QM CPU @ 2.60GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local apic... apic_id: 0x02 done. |
| Enabling VMX |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2600 |
| CPU #2 initialized |
| CPU3: stack_base 00133000, stack_end 00133ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 3. |
| After apic_write. |
| In relocation handler: cpu 3 |
| New SMBASE=0xbffff400 IEDBASE=0xc0400000 @ 0003fc00 |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 3. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU: 0 has core 4 |
| Initializing CPU #3 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 80 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x1b |
| CPU: Intel(R) Core(TM) i7-3720QM CPU @ 2.60GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local apic... apic_id: 0x03 done. |
| Enabling VMX |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2600 |
| CPU #3 initialized |
| CPU4: stack_base 00132000, stack_end 00132ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 4. |
| After apic_write. |
| In relocation handler: cpu 4 |
| Startup point 1. |
| Waiting for send to finish... |
| +New SMBASE=0xbffff000 IEDBASE=0xc0400000 @ 0003fc00 |
| Sending STARTUP #2 to 4. |
| After apic_write. |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU: 0 has core 5 |
| Initializing CPU #4 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 80 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x0 |
| microcode: updated to revision 0x1b date=2014-05-29 |
| CPU: Intel(R) Core(TM) i7-3720QM CPU @ 2.60GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local apic... apic_id: 0x04 done. |
| Enabling VMX |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2600 |
| CPU #4 initialized |
| CPU5: stack_base 00131000, stack_end 00131ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 5. |
| After apic_write. |
| In relocation handler: cpu 5 |
| New SMBASE=0xbfffec00 IEDBASE=0xc0400000 @ 0003fc00 |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 5. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU: 0 has core 6 |
| Initializing CPU #5 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 80 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x1b |
| CPU: Intel(R) Core(TM) i7-3720QM CPU @ 2.60GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local apic... apic_id: 0x05 done. |
| Enabling VMX |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2600 |
| CPU #5 initialized |
| CPU6: stack_base 00130000, stack_end 00130ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 6. |
| After apic_write. |
| In relocation handler: cpu 6 |
| Startup point 1. |
| Waiting for send to finish... |
| +New SMBASE=0xbfffe800 IEDBASE=0xc0400000 @ 0003fc00 |
| Sending STARTUP #2 to 6. |
| After apic_write. |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU: 0 has core 7 |
| Initializing CPU #6 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 80 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x0 |
| microcode: updated to revision 0x1b date=2014-05-29 |
| CPU: Intel(R) Core(TM) i7-3720QM CPU @ 2.60GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local apic... apic_id: 0x06 done. |
| Enabling VMX |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2600 |
| CPU #6 initialized |
| CPU7: stack_base 0012f000, stack_end 0012fff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 7. |
| After apic_write. |
| In relocation handler: cpu 7 |
| New SMBASE=0xbfffe400 IEDBASE=0xc0400000 @ 0003fc00 |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 7. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU #0 initialized |
| Waiting for 1 CPUS to stop |
| Initializing CPU #7 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 80 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x1b |
| CPU: Intel(R) Core(TM) i7-3720QM CPU @ 2.60GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local apic... apic_id: 0x07 done. |
| Enabling VMX |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2600 |
| CPU #7 initialized |
| All AP CPUs stopped (592 loops) |
| CPU0: stack: 00136000 - 00137000, lowest used address 00136ac0, stack used: 1344 bytes |
| CPU1: stack: 00135000 - 00136000, lowest used address 00135c64, stack used: 924 bytes |
| CPU2: stack: 00134000 - 00135000, lowest used address 00134c64, stack used: 924 bytes |
| CPU3: stack: 00133000 - 00134000, lowest used address 00133c64, stack used: 924 bytes |
| CPU4: stack: 00132000 - 00133000, lowest used address 00132c64, stack used: 924 bytes |
| CPU5: stack: 00131000 - 00132000, lowest used address 00131c64, stack used: 924 bytes |
| CPU6: stack: 00130000 - 00131000, lowest used address 00130c64, stack used: 924 bytes |
| CPU7: stack: 0012f000 - 00130000, lowest used address 0012fc64, stack used: 924 bytes |
| CPU_CLUSTER: 0 init finished in 178132 usecs |
| PCI: 00:00.0 init ... |
| Disabling PEG12. |
| Disabling PEG11. |
| Disabling PEG60. |
| Set BIOS_RESET_CPL |
| CPU TDP: 45 Watts |
| PCI: 00:00.0 init finished in 1016 usecs |
| PCI: 00:02.0 init ... |
| GT Power Management Init |
| IVB GT2 35W Power Meter Weights |
| GT Power Management Init (post VBIOS) |
| Initializing VGA without OPROM. |
| EDID: |
| 00 ff ff ff ff ff ff 00 30 ae b1 40 00 00 00 00 |
| 00 14 01 03 80 22 13 78 ea c8 95 9e 57 54 92 26 |
| 0f 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 |
| 01 01 01 01 01 01 9f 25 40 7e 60 84 1e 30 30 20 |
| 25 00 58 c2 10 00 00 19 7f 1f 40 86 60 84 1e 30 |
| 30 20 25 00 58 c2 10 00 00 19 00 00 00 0f 00 a9 |
| 09 32 a9 09 28 16 09 00 4c a3 4b 54 00 00 00 fe |
| 00 4c 54 4e 31 35 36 4b 54 30 32 34 30 31 00 95 |
| Extracted contents: |
| header: 00 ff ff ff ff ff ff 00 |
| serial number: 30 ae b1 40 00 00 00 00 00 14 |
| version: 01 03 |
| basic params: 80 22 13 78 ea |
| chroma info: c8 95 9e 57 54 92 26 0f 50 54 |
| established: 00 00 00 |
| standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 |
| descriptor 1: 9f 25 40 7e 60 84 1e 30 30 20 25 00 58 c2 10 00 00 19 |
| descriptor 2: 7f 1f 40 86 60 84 1e 30 30 20 25 00 58 c2 10 00 00 19 |
| descriptor 3: 00 00 00 0f 00 a9 09 32 a9 09 28 16 09 00 4c a3 4b 54 |
| descriptor 4: 00 00 00 fe 00 4c 54 4e 31 35 36 4b 54 30 32 34 30 31 |
| extensions: 00 |
| checksum: 95 |
| |
| Manufacturer: LEN Model 40b1 Serial Number 0 |
| Made week 0 of 2010 |
| EDID version: 1.3 |
| Digital display |
| Maximum image size: 34 cm x 19 cm |
| Gamma: 220% |
| Check DPMS levels |
| DPMS levels: Standby Suspend Off |
| Supported color formats: RGB 4:4:4, YCrCb 4:2:2 |
| First detailed timing is preferred timing |
| Established timings supported: |
| Standard timings supported: |
| Detailed timings |
| Hex of detail: 9f25407e60841e303020250058c210000019 |
| Detailed mode (IN HEX): Clock 96310 KHz, 158 mm x c2 mm |
| 0640 0670 0690 06be hborder 0 |
| 0384 0386 038b 03a2 vborder 0 |
| -hsync -vsync |
| Did detailed timing |
| Hex of detail: 7f1f408660841e303020250058c210000019 |
| Detailed mode (IN HEX): Clock 80630 KHz, 158 mm x c2 mm |
| 0640 0670 0690 06c6 hborder 0 |
| 0384 0386 038b 03a2 vborder 0 |
| -hsync -vsync |
| Hex of detail: 0000000f00a90932a909281609004ca34b54 |
| Manufacturer-specified data, tag 15 |
| Hex of detail: 000000fe004c544e3135364b543032343031 |
| ASCII string: LTN156KT02401 |
| Checksum |
| Checksum: 0x95 (valid) |
| WARNING: EDID block does NOT fully conform to EDID 1.3. |
| Missing name descriptor |
| Missing monitor ranges |
| bringing up panel at resolution 1600 x 900 |
| Borders 0 x 0 |
| Blank 126 x 30 |
| Sync 32 x 5 |
| Front porch 48 x 2 |
| Spread spectrum clock |
| Dual channel |
| Polarities 1, 1 |
| Data M1=6732556, N1=8388608 |
| Link frequency 270000 kHz |
| Link M1=187015, N1=524288 |
| Pixel N=7, M1=22, M2=8, P1=3 |
| Pixel clock 96326 kHz |
| waiting for panel powerup |
| panel powered up |
| PCI: 00:02.0 init finished in 42986 usecs |
| PCI: 00:04.0 init ... |
| PCI: 00:04.0 init finished in 0 usecs |
| PCI: 00:16.0 init ... |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : YES |
| ME: Manufacturing Mode : YES |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Normal |
| ME: Current Operation State : M0 with UMA |
| ME: Current Operation Mode : Normal |
| ME: Error Code : No Error |
| ME: Progress Phase : Host Communication |
| ME: Power Management Event : Non-power cycle reset |
| ME: Progress Phase State : Host communication established |
| ME: BIOS path: Normal |
| ME: Extend SHA-256: c20401a7f4baa166f69c313455db4ed508fd484bf2b89b42eba9a2395cb0f205 |
| ME: Firmware Version 7.1.1119.20 (code) 7.1.1119.20 (recovery) |
| ME Capability: Full Network manageability : enabled |
| ME Capability: Regular Network manageability : disabled |
| ME Capability: Manageability : enabled |
| ME Capability: Small business technology : disabled |
| ME Capability: Level III manageability : disabled |
| ME Capability: IntelR Anti-Theft (AT) : enabled |
| ME Capability: IntelR Capability Licensing Service (CLS) : enabled |
| ME Capability: IntelR Power Sharing Technology (MPC) : enabled |
| ME Capability: ICC Over Clocking : enabled |
| ME Capability: Protected Audio Video Path (PAVP) : enabled |
| ME Capability: IPV6 : enabled |
| ME Capability: KVM Remote Control (KVM) : enabled |
| ME Capability: Outbreak Containment Heuristic (OCH) : disabled |
| ME Capability: Virtual LAN (VLAN) : enabled |
| ME Capability: TLS : enabled |
| ME Capability: Wireless LAN (WLAN) : enabled |
| PCI: 00:16.0 init finished in 6853 usecs |
| PCI: 00:19.0 init ... |
| PCI: 00:19.0 init finished in 0 usecs |
| PCI: 00:1a.0 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1a.0 init finished in 13 usecs |
| PCI: 00:1b.0 init ... |
| Azalia: base = e1928000 |
| Azalia: codec_mask = 09 |
| Azalia: Initializing codec #3 |
| Azalia: codec viddid: 80862805 |
| Azalia: No verb! |
| Azalia: Initializing codec #0 |
| Azalia: codec viddid: 14f1506e |
| Azalia: verb_size: 52 |
| Azalia: verb loaded. |
| PCI: 00:1b.0 init finished in 4304 usecs |
| PCI: 00:1c.0 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.0 init finished in 8 usecs |
| PCI: 00:1c.1 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.1 init finished in 8 usecs |
| PCI: 00:1c.3 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.3 init finished in 13 usecs |
| PCI: 00:1d.0 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1d.0 init finished in 13 usecs |
| PCI: 00:1f.0 init ... |
| pch: lpc_init |
| IOAPIC: Initializing IOAPIC at 0xfec00000 |
| IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| IOAPIC: ID = 0x02 |
| IOAPIC: Dumping registers |
| reg 0x0000: 0x02000000 |
| reg 0x0001: 0x00170020 |
| reg 0x0002: 0x00170020 |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 5f40 size 79c |
| Set power off after power failure. |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 5f40 size 79c |
| NMI sources enabled. |
| CougarPoint PM init |
| rtc_failed = 0x0 |
| RTC Init |
| Enabling BIOS updates outside of SMM... Disabling ACPI via APMC: |
| done. |
| pch_spi_init |
| PCI: 00:1f.0 init finished in 768 usecs |
| PCI: 00:1f.2 init ... |
| SATA: Initializing... |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 5f40 size 79c |
| SATA: Controller in AHCI mode. |
| ABAR: e192e000 |
| PCI: 00:1f.2 init finished in 284 usecs |
| PCI: 00:1f.3 init ... |
| PCI: 00:1f.3 init finished in 7 usecs |
| PCI: 00:1f.6 init ... |
| PCI: 00:1f.6 init finished in 0 usecs |
| PCI: 02:00.0 init ... |
| PCI: 02:00.0 init finished in 0 usecs |
| PCI: 04:00.0 init ... |
| PCI: 04:00.0 init finished in 0 usecs |
| PCI: 04:00.1 init ... |
| PCI: 04:00.1 init finished in 0 usecs |
| PCI: 04:00.3 init ... |
| PCI: 04:00.3 init finished in 0 usecs |
| PNP: 00ff.2 init ... |
| PNP: 00ff.2 init finished in 0 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:54 init ... |
| I2C: 01:54 init finished in 1 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:55 init ... |
| I2C: 01:55 init finished in 1 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:56 init ... |
| I2C: 01:56 init finished in 1 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:57 init ... |
| I2C: 01:57 init finished in 1 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5c init ... |
| Locking EEPROM RFID |
| init EEPROM done |
| I2C: 01:5c init finished in 26781 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5d init ... |
| I2C: 01:5d init finished in 1 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5e init ... |
| I2C: 01:5e init finished in 1 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5f init ... |
| I2C: 01:5f init finished in 1 usecs |
| Devices initialized |
| Show all devs... After init. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 1 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.4: enabled 0 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:1c.2: enabled 0 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.3: enabled 1 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 00ff.1: enabled 1 |
| PNP: 0c31.0: enabled 1 |
| PNP: 00ff.2: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| I2C: 01:54: enabled 1 |
| I2C: 01:55: enabled 1 |
| I2C: 01:56: enabled 1 |
| I2C: 01:57: enabled 1 |
| I2C: 01:5c: enabled 1 |
| I2C: 01:5d: enabled 1 |
| I2C: 01:5e: enabled 1 |
| I2C: 01:5f: enabled 1 |
| PCI: 00:04.0: enabled 1 |
| PCI: 00:1f.6: enabled 1 |
| PCI: 02:00.0: enabled 1 |
| PCI: 04:00.0: enabled 1 |
| PCI: 04:00.1: enabled 1 |
| PCI: 04:00.3: enabled 1 |
| Unknown device path type: 0 |
| : enabled 1 |
| APIC: 01: enabled 1 |
| APIC: 02: enabled 1 |
| APIC: 03: enabled 1 |
| APIC: 04: enabled 1 |
| APIC: 05: enabled 1 |
| APIC: 06: enabled 1 |
| APIC: 07: enabled 1 |
| BS: BS_DEV_INIT times (us): entry 5 run 261413 exit 0 |
| Finalize devices... |
| PCI: 00:1f.0 final |
| Devices finalized |
| BS: BS_POST_DEVICE times (us): entry 0 run 5 exit 0 |
| BS: BS_OS_RESUME_CHECK times (us): entry 0 run 2 exit 0 |
| Updating MRC cache data. |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'mrc.cache' |
| CBFS: Found @ offset 2fec0 size 10000 |
| find_current_mrc_cache_local: picked entry 0 from cache block |
| SF: Detected W25Q64 with sector size 0x1000, total 0x800000 |
| find_next_mrc_cache: picked next entry from cache block at ffd31000 |
| Finally: write MRC cache update to flash at ffd31000 |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'fallback/dsdt.aml' |
| CBFS: Found @ offset 6740 size 354c |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'fallback/slic' |
| CBFS: 'fallback/slic' not found. |
| ACPI: Writing ACPI tables at bfeb9000. |
| ACPI: * FACS |
| ACPI: * DSDT |
| ACPI: * IGD OpRegion |
| GET_VBIOS: aa55 8086 0 3 0 |
| VBIOS not found. |
| ACPI: * FADT |
| ACPI: added table 1/32, length now 40 |
| ACPI: * SSDT |
| Found 1 CPU(s) with 8 core(s) each. |
| PSS: 2601MHz power 45000 control 0x2400 status 0x2400 |
| PSS: 2600MHz power 45000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 40579 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 36318 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 32251 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 28368 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 24603 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 21014 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 17571 control 0xc00 status 0xc00 |
| PSS: 2601MHz power 45000 control 0x2400 status 0x2400 |
| PSS: 2600MHz power 45000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 40579 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 36318 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 32251 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 28368 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 24603 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 21014 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 17571 control 0xc00 status 0xc00 |
| PSS: 2601MHz power 45000 control 0x2400 status 0x2400 |
| PSS: 2600MHz power 45000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 40579 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 36318 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 32251 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 28368 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 24603 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 21014 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 17571 control 0xc00 status 0xc00 |
| PSS: 2601MHz power 45000 control 0x2400 status 0x2400 |
| PSS: 2600MHz power 45000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 40579 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 36318 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 32251 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 28368 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 24603 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 21014 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 17571 control 0xc00 status 0xc00 |
| PSS: 2601MHz power 45000 control 0x2400 status 0x2400 |
| PSS: 2600MHz power 45000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 40579 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 36318 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 32251 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 28368 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 24603 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 21014 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 17571 control 0xc00 status 0xc00 |
| PSS: 2601MHz power 45000 control 0x2400 status 0x2400 |
| PSS: 2600MHz power 45000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 40579 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 36318 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 32251 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 28368 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 24603 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 21014 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 17571 control 0xc00 status 0xc00 |
| PSS: 2601MHz power 45000 control 0x2400 status 0x2400 |
| PSS: 2600MHz power 45000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 40579 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 36318 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 32251 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 28368 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 24603 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 21014 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 17571 control 0xc00 status 0xc00 |
| PSS: 2601MHz power 45000 control 0x2400 status 0x2400 |
| PSS: 2600MHz power 45000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 40579 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 36318 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 32251 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 28368 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 24603 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 21014 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 17571 control 0xc00 status 0xc00 |
| ACPI: added table 2/32, length now 44 |
| ACPI: * MCFG |
| ACPI: added table 3/32, length now 48 |
| ACPI: * TCPA |
| TCPA log created at bfea6000 |
| ACPI: added table 4/32, length now 52 |
| ACPI: * MADT |
| ACPI: added table 5/32, length now 56 |
| current = bfebf550 |
| ACPI: * DMAR |
| ACPI: added table 6/32, length now 60 |
| current = bfebf600 |
| ACPI: * HPET |
| ACPI: added table 7/32, length now 64 |
| ACPI: done. |
| ACPI tables: 26176 bytes. |
| smbios_write_tables: bfea5000 |
| recv_ec_data: 0x38 |
| recv_ec_data: 0x41 |
| recv_ec_data: 0x48 |
| recv_ec_data: 0x54 |
| recv_ec_data: 0x33 |
| recv_ec_data: 0x37 |
| recv_ec_data: 0x57 |
| recv_ec_data: 0x57 |
| recv_ec_data: 0x14 |
| recv_ec_data: 0x03 |
| Root Device (LENOVO ThinkPad T520) |
| CPU_CLUSTER: 0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| APIC: 00 (unknown) |
| APIC: acac (Intel SandyBridge/IvyBridge CPU) |
| DOMAIN: 0000 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:00.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:01.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:02.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:16.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:19.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1a.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1b.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.4 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.7 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1d.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PNP: 00ff.1 (Lenovo Power Management Hardware Hub 7) |
| PNP: 0c31.0 (unknown) |
| PNP: 00ff.2 (Lenovo H8 EC) |
| PCI: 00:1f.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| I2C: 01:54 (AT24RF08C) |
| I2C: 01:55 (AT24RF08C) |
| I2C: 01:56 (AT24RF08C) |
| I2C: 01:57 (AT24RF08C) |
| I2C: 01:5c (AT24RF08C) |
| I2C: 01:5d (AT24RF08C) |
| I2C: 01:5e (AT24RF08C) |
| I2C: 01:5f (AT24RF08C) |
| PCI: 00:04.0 (unknown) |
| PCI: 00:1f.6 (unknown) |
| PCI: 02:00.0 (unknown) |
| PCI: 04:00.0 (unknown) |
| PCI: 04:00.1 (unknown) |
| PCI: 04:00.3 (unknown) |
| Unknown device path type: 0 |
| (unknown) |
| APIC: 01 (unknown) |
| APIC: 02 (unknown) |
| APIC: 03 (unknown) |
| APIC: 04 (unknown) |
| APIC: 05 (unknown) |
| APIC: 06 (unknown) |
| APIC: 07 (unknown) |
| SMBIOS tables: 433 bytes. |
| Writing table forward entry at 0x00000500 |
| Wrote coreboot table at: 00000500, 0x10 bytes, checksum 6ff4 |
| Table forward entry ends at 0x00000528. |
| ... aligned to 0x00001000 |
| Writing coreboot table at 0xbfe9d000 |
| rom_table_end = 0xbfe9d000 |
| ... aligned to 0xbfea0000 |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 5f40 size 79c |
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1. 0000000000001000-000000000009ffff: RAM |
| 2. 00000000000a0000-00000000000fffff: RESERVED |
| 3. 0000000000100000-00000000bfe9cfff: RAM |
| 4. 00000000bfe9d000-00000000bfffffff: CONFIGURATION TABLES |
| 5. 00000000c0000000-00000000c29fffff: RESERVED |
| 6. 00000000f0000000-00000000f3ffffff: RESERVED |
| 7. 00000000fed90000-00000000fed91fff: RESERVED |
| 8. 0000000100000000-000000043b5fffff: RAM |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| No FMAP found at 670000 offset. |
| Wrote coreboot table at: bfe9d000, 0xad0 bytes, checksum af3b |
| coreboot table: 2792 bytes. |
| IMD ROOT 0. bffff000 00001000 |
| IMD SMALL 1. bfffe000 00001000 |
| CONSOLE 2. bffde000 00020000 |
| MRC DATA 3. bffdd000 00000420 |
| ACPI RESUME 4. bfedd000 00100000 |
| ACPI 5. bfeb9000 00024000 |
| ACPI GNVS 6. bfeb8000 00001000 |
| 4f444749 7. bfeb6000 00002000 |
| TCPA LOG 8. bfea6000 00010000 |
| SMBIOS 9. bfea5000 00000800 |
| COREBOOT 10. bfe9d000 00008000 |
| IMD small region: |
| IMD ROOT 0. bfffec00 00000400 |
| CAR GLOBALS 1. bfffea40 000001c0 |
| USBDEBUG 2. bfffe9e0 00000058 |
| ROMSTAGE 3. bfffe9c0 00000004 |
| GDT 4. bfffe7c0 00000200 |
| BS: BS_WRITE_TABLES times (us): entry 4690 run 25917 exit 0 |
| CBFS: 'Master Header Locator' located CBFS at [500100:7fffc0) |
| CBFS: Locating 'fallback/payload' |
| CBFS: Found @ offset 54fc0 size 9db8a |
| Loading segment from rom address 0xffd550f8 |
| code (compression=1) |
| New segment dstaddr 0x8200 memsize 0x17808 srcaddr 0xffd5514c filesize 0x8332 |
| Loading segment from rom address 0xffd55114 |
| code (compression=1) |
| New segment dstaddr 0x100000 memsize 0x26c654 srcaddr 0xffd5d47e filesize 0x95804 |
| Loading segment from rom address 0xffd55130 |
| Entry Point 0x00008200 |
| Bounce Buffer at bfbf0000, 2801828 bytes |
| Loading Segment: addr: 0x0000000000008200 memsz: 0x0000000000017808 filesz: 0x0000000000008332 |
| lb: [0x0000000000100000, 0x000000000013fa50) |
| Post relocation: addr: 0x0000000000008200 memsz: 0x0000000000017808 filesz: 0x0000000000008332 |
| using LZMA |
| [ 0x00008200, 00017fbf, 0x0001fa08) <- ffd5514c |
| Clearing Segment: addr: 0x0000000000017fbf memsz: 0x0000000000007a49 |
| dest 00008200, end 0001fa08, bouncebuffer bfbf0000 |
| Loading Segment: addr: 0x0000000000100000 memsz: 0x000000000026c654 filesz: 0x0000000000095804 |
| lb: [0x0000000000100000, 0x000000000013fa50) |
| segment: [0x0000000000100000, 0x0000000000195804, 0x000000000036c654) |
| bounce: [0x00000000bfbf0000, 0x00000000bfc85804, 0x00000000bfe5c654) |
| Post relocation: addr: 0x00000000bfbf0000 memsz: 0x000000000026c654 filesz: 0x0000000000095804 |
| using LZMA |
| [ 0xbfbf0000, bfe5c654, 0xbfe5c654) <- ffd5d47e |
| dest bfbf0000, end bfe5c654, bouncebuffer bfbf0000 |
| move suffix around: from bfc2fa50, to 13fa50, amount: 22cc04 |
| Loaded segments |
| BS: BS_PAYLOAD_LOAD times (us): entry 0 run 249896 exit 0 |
| PCH watchdog disabled |
| Jumping to boot code at 00008200(bfe9d000) |
| CPU0: stack: 00136000 - 00137000, lowest used address 00136880, stack used: 1920 bytes |
| entry = 0x00008200 |
| lb_start = 0x00100000 |
| lb_size = 0x0003fa50 |
| buffer = 0xbfbf0000 |
| GNU GRUB version 2.02~beta2 |
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+----------------------------------------------------------------------------+||||||||||||||||||||||||+----------------------------------------------------------------------------+ Use the ^ and v keys to select which entry is highlighted. |
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Press enter to boot the selected OS, `e' to edit the commands |
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before booting or `c' for a command-line. *GNU/Linux @ /dev/sda1 SeaBIOS nvramcui coreinfo Parse ISOLINUX menu (AHCI) [a] Parse ISOLINUX menu (USB) [u] Parse ISOLINUX menu (CD/DVD) [d] Search for GRUB configuration (grub.cfg) outside of CBFS [s] Poweroff [p] Reboot [r] The highlighted entry will be executed automatically in 2s. The highlighted entry will be executed automatically in 1s. The highlighted entry will be executed automatically in 0s. Booting `GNU/Linux @ /dev/sda1' |
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GNU GRUB version 2.02~beta2 |
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+----------------------------------------------------------------------------+||||||||||||||||||||||+----------------------------------------------------------------------------+ Use the ^ and v keys to select which entry is highlighted. |
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Press enter to boot the selected OS, `e' to edit the commands |
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before booting or `c' for a command-line. ESC to return |
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previous menu. *Arch Linux The highlighted entry will be executed automatically in 1s. GNU GRUB version 2.02~beta2 |
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+----------------------------------------------------------------------------+||||||||||||||||||||||||+----------------------------------------------------------------------------+ Minimum Emacs-like screen editing is supported. TAB lists |
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completions. Press Ctrl-x or F10 to boot, Ctrl-c or F2 for |
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a command-line or ESC to discard edits and return to the GRUB menu. setparams 'Arch Linux' set root='ahci0,gpt2' linux /arch/boot/vmlinuz-linux-libre root=UUID=b5f302f2-5f4b-496e-a\ |
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81e-23abee6c049f rw rootflags=subvol=arch initrd /arch/boot/initramfs-linux-libre.img linux /arch/boot/vmlinuz-linux-libre root=UUID=b5f302f2-5f4b-496e-a\ |
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81e-23abee6c049f rw rootflags=subvol=arch n linux /arch/boot/vmlinuz-linux-libre root=UUID=b5f302f2-5f4b-496e-a\ |
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81e-23abee6c049f rw rootflags=subvol=arch no linux /arch/boot/vmlinuz-linux-libre root=UUID=b5f302f2-5f4b-496e-a\ |
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81e-23abee6c049f rw rootflags=subvol=arch nop linux /arch/boot/vmlinuz-linux-libre root=UUID=b5f302f2-5f4b-496e-a\ |
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81e-23abee6c049f rw rootflags=subvol=arch nopa linux /arch/boot/vmlinuz-linux-libre root=UUID=b5f302f2-5f4b-496e-a\ |
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81e-23abee6c049f rw rootflags=subvol=arch nopat Booting a command list |
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