blob: 62192c56e0ffb42a5fc04d9e826b2b1fc179e04f [file] [log] [blame]
*** Pre-CBMEM romstage console overflowed, log truncated! ***
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DCTMemClr_Sync_D: Done
ECCInit: Node 00
ECCInit: Status 2205
ECCInit: ErrStatus 4000
ECCInit: ErrCode 0
ECCInit: Done
ECCInit: Node 01
ECCInit: Status 2005
ECCInit: ErrStatus 4000
ECCInit: ErrCode 0
ECCInit: Done
ECCInit: Node 02
ECCInit: Status 2005
ECCInit: ErrStatus 4000
ECCInit: ErrCode 0
ECCInit: Done
ECCInit: Node 03
ECCInit: Status 2005
ECCInit: ErrStatus 4000
ECCInit: ErrCode 0
ECCInit: Done
mctAutoInitMCT_D: CPUMemTyping_D
CPUMemTyping: Cache32bTOP:c00000
CPUMemTyping: Bottom32bIO:c00000
CPUMemTyping: Bottom40bIO:10400000
mctAutoInitMCT_D: UMAMemTyping_D
mctAutoInitMCT_D: mct_ForceNBPState0_Dis_Fam15
mctAutoInitMCT_D Done: Global Status: 12
raminit_amdmct end:
CBMEM:
IMD: root @ bffff000 254 entries.
IMD: root @ bfffec00 62 entries.
amdmct_cbmem_store_info: Storing AMDMCT configuration in CBMEM
disable_spd()
CBFS: 'Master Header Locator' located CBFS at [200:1fffc0)
CBFS: Locating 'fallback/ramstage'
CBFS: Found @ offset 3fe00 size 1559d
coreboot-4.7-662-gb90c0d90cf-dirty Fri Apr 6 10:29:01 UTC 2018 ramstage starting...
Moving GDT to bfffe9e0...ok
Normal boot.
BS: BS_PRE_DEVICE times (us): entry 0 run 1 exit 0
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 1 exit 0
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:18.0: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:00.1: enabled 1
PCI: 00:00.2: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 0
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:09.0: enabled 1
PCI: 00:0a.0: enabled 1
PCI: 00:0b.0: enabled 1
PCI: 00:0c.0: enabled 1
PCI: 00:0d.0: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.1: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.1: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 00:50: enabled 1
I2C: 00:51: enabled 1
I2C: 00:52: enabled 1
I2C: 00:53: enabled 1
I2C: 00:54: enabled 1
I2C: 00:55: enabled 1
I2C: 00:56: enabled 1
I2C: 00:57: enabled 1
I2C: 00:2f: enabled 1
PCI: 00:14.1: enabled 1
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PNP: 002e.0: enabled 0
PNP: 002e.1: enabled 0
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.106: enabled 0
PNP: 002e.107: enabled 0
PNP: 002e.207: enabled 0
PNP: 002e.307: enabled 0
PNP: 002e.407: enabled 0
PNP: 002e.8: enabled 0
PNP: 002e.108: enabled 0
PNP: 002e.9: enabled 0
PNP: 002e.109: enabled 0
PNP: 002e.209: enabled 0
PNP: 002e.309: enabled 0
PNP: 002e.a: enabled 1
PNP: 002e.b: enabled 1
PNP: 002e.c: enabled 0
PNP: 002e.d: enabled 0
PNP: 002e.f: enabled 0
PNP: 004e.0: enabled 1
PNP: 0ca2.0: enabled 1
PCI: 00:14.4: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 1
PCI: 00:14.5: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
PCI: 00:19.0: enabled 1
PCI: 00:19.1: enabled 1
PCI: 00:19.2: enabled 1
PCI: 00:19.3: enabled 1
PCI: 00:19.4: enabled 1
PCI: 00:19.5: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1a.1: enabled 1
PCI: 00:1a.2: enabled 1
PCI: 00:1a.3: enabled 1
PCI: 00:1a.4: enabled 1
PCI: 00:1a.5: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1b.1: enabled 1
PCI: 00:1b.2: enabled 1
PCI: 00:1b.3: enabled 1
PCI: 00:1b.4: enabled 1
PCI: 00:1b.5: enabled 1
Compare with tree...
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:18.0: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:00.1: enabled 1
PCI: 00:00.2: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 0
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:09.0: enabled 1
PCI: 00:0a.0: enabled 1
PCI: 00:0b.0: enabled 1
PCI: 00:0c.0: enabled 1
PCI: 00:0d.0: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.1: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.1: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 00:50: enabled 1
I2C: 00:51: enabled 1
I2C: 00:52: enabled 1
I2C: 00:53: enabled 1
I2C: 00:54: enabled 1
I2C: 00:55: enabled 1
I2C: 00:56: enabled 1
I2C: 00:57: enabled 1
I2C: 00:2f: enabled 1
PCI: 00:14.1: enabled 1
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PNP: 002e.0: enabled 0
PNP: 002e.1: enabled 0
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.106: enabled 0
PNP: 002e.107: enabled 0
PNP: 002e.207: enabled 0
PNP: 002e.307: enabled 0
PNP: 002e.407: enabled 0
PNP: 002e.8: enabled 0
PNP: 002e.108: enabled 0
PNP: 002e.9: enabled 0
PNP: 002e.109: enabled 0
PNP: 002e.209: enabled 0
PNP: 002e.309: enabled 0
PNP: 002e.a: enabled 1
PNP: 002e.b: enabled 1
PNP: 002e.c: enabled 0
PNP: 002e.d: enabled 0
PNP: 002e.f: enabled 0
PNP: 004e.0: enabled 1
PNP: 0ca2.0: enabled 1
PCI: 00:14.4: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 1
PCI: 00:14.5: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
PCI: 00:19.0: enabled 1
PCI: 00:19.1: enabled 1
PCI: 00:19.2: enabled 1
PCI: 00:19.3: enabled 1
PCI: 00:19.4: enabled 1
PCI: 00:19.5: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1a.1: enabled 1
PCI: 00:1a.2: enabled 1
PCI: 00:1a.3: enabled 1
PCI: 00:1a.4: enabled 1
PCI: 00:1a.5: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1b.1: enabled 1
PCI: 00:1b.2: enabled 1
PCI: 00:1b.3: enabled 1
PCI: 00:1b.4: enabled 1
PCI: 00:1b.5: enabled 1
Mainboard KGPE-D16 Enable. dev=0x0012cba0
mainboard_enable, TOP MEM: msr.lo = 0xc0000000, msr.hi = 0x00000000
mainboard_enable, TOP MEM2: msr2.lo = 0x40000000, msr2.hi = 0x00000010
Root Device scanning...
root_dev_scan_bus for Root Device
setup_bsp_ramtop, TOP MEM: msr.lo = 0xc0000000, msr.hi = 0x00000000
setup_bsp_ramtop, TOP MEM2: msr.lo = 0x40000000, msr.hi = 0x00000010
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
CPU_CLUSTER: 0 scanning...
PCI: 00:18.5 siblings=7
CPU: APIC: 00 enabled
CPU: APIC: 01 enabled
CPU: APIC: 02 enabled
CPU: APIC: 03 enabled
CPU: APIC: 04 enabled
CPU: APIC: 05 enabled
CPU: APIC: 06 enabled
CPU: APIC: 07 enabled
PCI: 00:19.5 siblings=7
CPU: APIC: 08 enabled
CPU: APIC: 09 enabled
CPU: APIC: 0a enabled
CPU: APIC: 0b enabled
CPU: APIC: 0c enabled
CPU: APIC: 0d enabled
CPU: APIC: 0e enabled
CPU: APIC: 0f enabled
PCI: 00:1a.5 siblings=7
CPU: APIC: 20 enabled
CPU: APIC: 21 enabled
CPU: APIC: 22 enabled
CPU: APIC: 23 enabled
CPU: APIC: 24 enabled
CPU: APIC: 25 enabled
CPU: APIC: 26 enabled
CPU: APIC: 27 enabled
PCI: 00:1b.5 siblings=7
CPU: APIC: 28 enabled
CPU: APIC: 29 enabled
CPU: APIC: 2a enabled
CPU: APIC: 2b enabled
CPU: APIC: 2c enabled
CPU: APIC: 2d enabled
CPU: APIC: 2e enabled
CPU: APIC: 2f enabled
scan_bus: scanning of bus CPU_CLUSTER: 0 took 55429 usecs
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:18.0 [1022/1600] bus ops
PCI: 00:18.0 [1022/1600] enabled
PCI: 00:18.1 [1022/1601] enabled
PCI: 00:18.2 [1022/1602] enabled
PCI: 00:18.3 [1022/1603] ops
PCI: 00:18.3 [1022/1603] enabled
PCI: 00:18.4 [1022/1604] ops
PCI: 00:18.4 [1022/1604] enabled
PCI: 00:18.5 [1022/1605] ops
PCI: 00:18.5 [1022/1605] enabled
PCI: 00:19.0 [1022/1600] bus ops
PCI: 00:19.0 [1022/1600] enabled
PCI: 00:19.1 [1022/1601] enabled
PCI: 00:19.2 [1022/1602] enabled
PCI: 00:19.3 [1022/1603] ops
PCI: 00:19.3 [1022/1603] enabled
PCI: 00:19.4 [1022/1604] ops
PCI: 00:19.4 [1022/1604] enabled
PCI: 00:19.5 [1022/1605] ops
PCI: 00:19.5 [1022/1605] enabled
PCI: 00:1a.0 [1022/1600] bus ops
PCI: 00:1a.0 [1022/1600] enabled
PCI: 00:1a.1 [1022/1601] enabled
PCI: 00:1a.2 [1022/1602] enabled
PCI: 00:1a.3 [1022/1603] ops
PCI: 00:1a.3 [1022/1603] enabled
PCI: 00:1a.4 [1022/1604] ops
PCI: 00:1a.4 [1022/1604] enabled
PCI: 00:1a.5 [1022/1605] ops
PCI: 00:1a.5 [1022/1605] enabled
PCI: 00:1b.0 [1022/1600] bus ops
PCI: 00:1b.0 [1022/1600] enabled
PCI: 00:1b.1 [1022/1601] enabled
PCI: 00:1b.2 [1022/1602] enabled
PCI: 00:1b.3 [1022/1603] ops
PCI: 00:1b.3 [1022/1603] enabled
PCI: 00:1b.4 [1022/1604] ops
PCI: 00:1b.4 [1022/1604] enabled
PCI: 00:1b.5 [1022/1605] ops
PCI: 00:1b.5 [1022/1605] enabled
PCI: 00:18.0 scanning...
do_hypertransport_scan_chain for bus 00
sr5650_enable: dev=0012f560, VID_DID=0x5a101002
Bus-0, Dev-0, Fun-0.
enable_pcie_bar3
sr5650_gpp_sb_init: nb_dev=0x0012f560, dev=0x0012efc0, port=0x8
PciePowerOffGppPorts() port 8
NB_PCI_REG04 = 2.
NB_PCI_REG84 = 3000010.
NB_PCI_REG4C = 52042.
Sysmem TOM = 0_c0000000
Sysmem TOM2 = 10_40000000
PCI: 00:00.0 [1002/5a10] ops
PCI: 00:00.0 [1002/5a10] enabled
Capability: type 0x08 @ 0xf0
flags: 0xa803
Capability: type 0x08 @ 0xf0
Capability: type 0x08 @ 0xc4
flags: 0x0280
PCI: 00:00.0 count: 0014 static_count: 0015
PCI: 00:00.0 [1002/5a10] enabled next_unitid: 0015
PCI: pci_scan_bus for bus 00
sr5650_enable: dev=0012f560, VID_DID=0x5a101002
Bus-0, Dev-0, Fun-0.
enable_pcie_bar3
sr5650_gpp_sb_init: nb_dev=0x0012f560, dev=0x0012efc0, port=0x8
PciePowerOffGppPorts() port 8
NB_PCI_REG04 = 2.
NB_PCI_REG84 = 3000010.
NB_PCI_REG4C = 52042.
Sysmem TOM = 0_c0000000
Sysmem TOM2 = 10_40000000
PCI: 00:00.0 [1002/5a10] enabled
sr5650_enable: dev=0012f4c0, VID_DID=0xffffffff
Bus-0, Dev-0, Fun-1.
PCI: Static device PCI: 00:00.1 not found, disabling it.
sr5650_enable: dev=0012f420, VID_DID=0x5a231002
Bus-0, Dev-0, Fun-2.
PCI: 00:00.2 [1002/5a23] ops
PCI: 00:00.2 [1002/5a23] enabled
sr5650_enable: dev=0012f380, VID_DID=0xffffffff
Bus-0, Dev-2,3, Fun-0. enable=1
sr5650_gpp_sb_init: nb_dev=0x0012f560, dev=0x0012f380, port=0x2
PcieLinkTraining port=2:lc current state=2030400
sr5650_gpp_sb_init: port=0x2 hw_port=0x2 result=0
PciePowerOffGppPorts() port 2
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:02.0 subordinate bus PCI Express
PCI: 00:02.0 [1002/5a16] enabled
sr5650_enable: dev=0012f2e0, VID_DID=0xffffffff
Bus-0, Dev-2,3, Fun-0. enable=0
sr5650_enable: dev=0012f240, VID_DID=0xffffffff
enable_pcie_bar3
Bus-0, Dev-4,5,6,7, Fun-0. enable=1
sr5650_gpp_sb_init: nb_dev=0x0012f560, dev=0x0012f240, port=0x4
PcieLinkTraining port=4:lc current state=2030400
sr5650_gpp_sb_init: port=0x4 hw_port=0x4 result=0
PciePowerOffGppPorts() port 4
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:04.0 subordinate bus PCI Express
PCI: 00:04.0 [1002/5a18] enabled
sr5650_enable: dev=0012f1a0, VID_DID=0xffffffff
enable_pcie_bar3
Bus-0, Dev-4,5,6,7, Fun-0. enable=0
sr5650_enable: dev=0012f100, VID_DID=0xffffffff
enable_pcie_bar3
Bus-0, Dev-4,5,6,7, Fun-0. enable=0
sr5650_enable: dev=0012f060, VID_DID=0xffffffff
enable_pcie_bar3
Bus-0, Dev-4,5,6,7, Fun-0. enable=0
sr5650_enable: dev=0012efc0, VID_DID=0xffffffff
Bus-0, Dev-8, Fun-0. enable=0
disable_pcie_bar3
sr5650_enable: dev=0012ef20, VID_DID=0xffffffff
Bus-0, Dev-9, 10, Fun-0. enable=1
enable_pcie_bar3
sr5650_gpp_sb_init: nb_dev=0x0012f560, dev=0x0012ef20, port=0x9
PcieLinkTraining port=5:lc current state=a0b0f10
addr=c0000000,bus=0,devfn=48
PcieTrainPort reg=0x10000
sr5650_gpp_sb_init: port=0x9 hw_port=0x5 result=1
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:09.0 subordinate bus PCI Express
PCI: 00:09.0 [1002/5a1c] enabled
sr5650_enable: dev=0012ee80, VID_DID=0xffffffff
Bus-0, Dev-9, 10, Fun-0. enable=1
enable_pcie_bar3
sr5650_gpp_sb_init: nb_dev=0x0012f560, dev=0x0012ee80, port=0xa
PcieLinkTraining port=6:lc current state=a0b0f10
addr=c0000000,bus=0,devfn=50
PcieTrainPort reg=0x10000
sr5650_gpp_sb_init: port=0xa hw_port=0x6 result=1
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:0a.0 subordinate bus PCI Express
PCI: 00:0a.0 [1002/5a1d] enabled
sr5650_enable: dev=0012ede0, VID_DID=0xffffffff
Bus-0, Dev-11,12, Fun-0. enable=1
sr5650_gpp_sb_init: nb_dev=0x0012f560, dev=0x0012ede0, port=0xb
PcieLinkTraining port=b:lc current state=2030400
sr5650_gpp_sb_init: port=0xb hw_port=0xb result=0
PciePowerOffGppPorts() port 11
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:0b.0 subordinate bus PCI Express
PCI: 00:0b.0 [1002/5a1f] enabled
sr5650_enable: dev=0012ed40, VID_DID=0xffffffff
Bus-0, Dev-11,12, Fun-0. enable=1
sr5650_gpp_sb_init: nb_dev=0x0012f560, dev=0x0012ed40, port=0xc
PcieLinkTraining port=c:lc current state=2030400
sr5650_gpp_sb_init: port=0xc hw_port=0xc result=0
PciePowerOffGppPorts() port 12
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:0c.0 subordinate bus PCI Express
PCI: 00:0c.0 [1002/5a20] enabled
sr5650_enable: dev=0012eca0, VID_DID=0xffffffff
sr5650_gpp_sb_init: nb_dev=0x0012f560, dev=0x0012eca0, port=0xd
PcieLinkTraining port=d:lc current state=2030400
sr5650_gpp_sb_init: port=0xd hw_port=0xd result=0
PciePowerOffGppPorts() port 13
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:0d.0 subordinate bus PCI Express
PCI: 00:0d.0 [1002/5a1e] enabled
sb7xx_51xx_enable()
PCI: 00:11.0 [1002/4390] ops
PCI: 00:11.0 [1002/4390] enabled
sb7xx_51xx_enable()
PCI: 00:12.0 [1002/4397] ops
PCI: 00:12.0 [1002/4397] enabled
sb7xx_51xx_enable()
PCI: 00:12.1 [1002/4398] ops
PCI: 00:12.1 [1002/4398] enabled
sb7xx_51xx_enable()
PCI: 00:12.2 [1002/4396] ops
PCI: 00:12.2 [1002/4396] enabled
sb7xx_51xx_enable()
PCI: 00:13.0 [1002/4397] ops
PCI: 00:13.0 [1002/4397] enabled
sb7xx_51xx_enable()
PCI: 00:13.1 [1002/4398] ops
PCI: 00:13.1 [1002/4398] enabled
sb7xx_51xx_enable()
PCI: 00:13.2 [1002/4396] ops
PCI: 00:13.2 [1002/4396] enabled
sb7xx_51xx_enable()
PCI: 00:14.0 [1002/4385] bus ops
PCI: 00:14.0 [1002/4385] enabled
sb7xx_51xx_enable()
PCI: 00:14.1 [1002/439c] ops
PCI: 00:14.1 [1002/439c] enabled
sb7xx_51xx_enable()
PCI: 00:14.2 [1002/4383] ops
PCI: 00:14.2 [1002/4383] enabled
sb7xx_51xx_enable()
PCI: 00:14.3 [1002/439d] bus ops
PCI: 00:14.3 [1002/439d] enabled
sb7xx_51xx_enable()
PCI: 00:14.4 [1002/4384] bus ops
PCI: 00:14.4 [1002/4384] enabled
sb7xx_51xx_enable()
PCI: 00:14.5 [1002/4399] ops
PCI: 00:14.5 [1002/4399] enabled
PCI: 00:02.0 scanning...
do_pci_scan_bridge for PCI: 00:02.0
PCI: pci_scan_bus for bus 01
scan_bus: scanning of bus PCI: 00:02.0 took 5922 usecs
PCI: 00:04.0 scanning...
do_pci_scan_bridge for PCI: 00:04.0
PCI: pci_scan_bus for bus 02
scan_bus: scanning of bus PCI: 00:04.0 took 5924 usecs
PCI: 00:09.0 scanning...
do_pci_scan_bridge for PCI: 00:09.0
PCI: pci_scan_bus for bus 03
PCI: 03:00.0 [8086/10d3] enabled
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0xe0
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpoint
ASPM: Enabled None
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0xe0
Failed to enable LTR for dev = PCI: 03:00.0
scan_bus: scanning of bus PCI: 00:09.0 took 32643 usecs
PCI: 00:0a.0 scanning...
do_pci_scan_bridge for PCI: 00:0a.0
PCI: pci_scan_bus for bus 04
PCI: 04:00.0 [8086/10d3] enabled
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0xe0
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpoint
ASPM: Enabled None
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0xe0
Failed to enable LTR for dev = PCI: 04:00.0
scan_bus: scanning of bus PCI: 00:0a.0 took 32511 usecs
PCI: 00:0b.0 scanning...
do_pci_scan_bridge for PCI: 00:0b.0
PCI: pci_scan_bus for bus 05
scan_bus: scanning of bus PCI: 00:0b.0 took 5923 usecs
PCI: 00:0c.0 scanning...
do_pci_scan_bridge for PCI: 00:0c.0
PCI: pci_scan_bus for bus 06
scan_bus: scanning of bus PCI: 00:0c.0 took 5924 usecs
PCI: 00:0d.0 scanning...
do_pci_scan_bridge for PCI: 00:0d.0
PCI: pci_scan_bus for bus 07
scan_bus: scanning of bus PCI: 00:0d.0 took 5924 usecs
PCI: 00:14.0 scanning...
scan_generic_bus for PCI: 00:14.0
bus: PCI: 00:14.0[0]->I2C: 01:50 enabled
bus: PCI: 00:14.0[0]->I2C: 01:51 enabled
bus: PCI: 00:14.0[0]->I2C: 01:52 enabled
bus: PCI: 00:14.0[0]->I2C: 01:53 enabled
bus: PCI: 00:14.0[0]->I2C: 01:54 enabled
bus: PCI: 00:14.0[0]->I2C: 01:55 enabled
bus: PCI: 00:14.0[0]->I2C: 01:56 enabled
bus: PCI: 00:14.0[0]->I2C: 01:57 enabled
bus: PCI: 00:14.0[0]->I2C: 01:2f enabled
scan_generic_bus for PCI: 00:14.0 done
scan_bus: scanning of bus PCI: 00:14.0 took 30456 usecs
PCI: 00:14.3 scanning...
scan_lpc_bus for PCI: 00:14.3
PNP: 002e.0 disabled
PNP: 002e.1 disabled
PNP: 002e.2 enabled
PNP: 002e.3 enabled
PNP: 002e.5 enabled
PNP: 002e.106 disabled
PNP: 002e.107 disabled
PNP: 002e.207 disabled
PNP: 002e.307 disabled
PNP: 002e.407 disabled
PNP: 002e.8 disabled
PNP: 002e.108 disabled
PNP: 002e.9 disabled
PNP: 002e.109 disabled
PNP: 002e.209 disabled
PNP: 002e.309 disabled
PNP: 002e.a enabled
PNP: 002e.b enabled
PNP: 002e.c disabled
PNP: 002e.d disabled
PNP: 002e.f disabled
PNP: 004e.0 enabled
PNP: 0ca2.0 enabled
scan_lpc_bus for PCI: 00:14.3 done
scan_bus: scanning of bus PCI: 00:14.3 took 39292 usecs
PCI: 00:14.4 scanning...
do_pci_scan_bridge for PCI: 00:14.4
PCI: pci_scan_bus for bus 08
sb7xx_51xx_enable()
PCI: 08:01.0 [1a03/2000] ops
PCI: 08:01.0 [1a03/2000] enabled
sb7xx_51xx_enable()
PCI: 08:02.0 [11c1/5811] enabled
sb7xx_51xx_enable()
PCI: Static device PCI: 08:03.0 not found, disabling it.
scan_bus: scanning of bus PCI: 00:14.4 took 19827 usecs
scan_bus: scanning of bus PCI: 00:18.0 took 1733428 usecs
PCI: 00:19.0 scanning...
scan_bus: scanning of bus PCI: 00:19.0 took 1652 usecs
PCI: 00:1a.0 scanning...
scan_bus: scanning of bus PCI: 00:1a.0 took 1652 usecs
PCI: 00:1b.0 scanning...
scan_bus: scanning of bus PCI: 00:1b.0 took 1651 usecs
DOMAIN: 0000 passpw: enabled
DOMAIN: 0000 passpw: enabled
DOMAIN: 0000 passpw: enabled
DOMAIN: 0000 passpw: enabled
scan_bus: scanning of bus DOMAIN: 0000 took 1847121 usecs
root_dev_scan_bus for Root Device done
scan_bus: scanning of bus Root Device took 1928061 usecs
done
BS: BS_DEV_ENUMERATE times (us): entry 0 run 2252611 exit 0
found VGA at PCI: 08:01.0
Setting up VGA for PCI: 08:01.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:14.4
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
Adding PCIe enhanced config space BAR 0xc0000000-0xd0000000.
DOMAIN: 0000 read_resources bus 0 link: 0
PCI: 00:18.0 read_resources bus 0 link: 2
PCI: 00:18.0 read_resources bus 0 link: 2 done
PCI: 00:18.0 read_resources bus 0 link: 3
PCI: 00:18.0 read_resources bus 0 link: 3 done
PCI: 00:18.0 read_resources bus 0 link: 0
PCI: 00:18.0 read_resources bus 0 link: 0 done
PCI: 00:18.0 read_resources bus 0 link: 1
sr5690_read_resource: PCI: 00:00.0
PCI: 00:02.0 read_resources bus 1 link: 0
PCI: 00:02.0 read_resources bus 1 link: 0 done
PCI: 00:04.0 read_resources bus 2 link: 0
PCI: 00:04.0 read_resources bus 2 link: 0 done
PCI: 00:09.0 read_resources bus 3 link: 0
PCI: 00:09.0 read_resources bus 3 link: 0 done
PCI: 00:0a.0 read_resources bus 4 link: 0
PCI: 00:0a.0 read_resources bus 4 link: 0 done
PCI: 00:0b.0 read_resources bus 5 link: 0
PCI: 00:0b.0 read_resources bus 5 link: 0 done
PCI: 00:0c.0 read_resources bus 6 link: 0
PCI: 00:0c.0 read_resources bus 6 link: 0 done
PCI: 00:0d.0 read_resources bus 7 link: 0
PCI: 00:0d.0 read_resources bus 7 link: 0 done
PCI: 00:14.0 read_resources bus 1 link: 0
I2C: 01:50 missing read_resources
I2C: 01:51 missing read_resources
I2C: 01:52 missing read_resources
I2C: 01:53 missing read_resources
I2C: 01:54 missing read_resources
I2C: 01:55 missing read_resources
I2C: 01:56 missing read_resources
I2C: 01:57 missing read_resources
PCI: 00:14.0 read_resources bus 1 link: 0 done
PCI: 00:14.3 read_resources bus 0 link: 0
PNP: 004e.0 missing read_resources
PNP: 0ca2.0 missing read_resources
PCI: 00:14.3 read_resources bus 0 link: 0 done
PCI: 00:14.4 read_resources bus 8 link: 0
PCI: 00:14.4 read_resources bus 8 link: 0 done
PCI: 00:18.0 read_resources bus 0 link: 1 done
PCI: 00:18.4 read_resources bus 0 link: 0
PCI: 00:18.4 read_resources bus 0 link: 0 done
PCI: 00:18.4 read_resources bus 0 link: 1
PCI: 00:18.4 read_resources bus 0 link: 1 done
PCI: 00:18.4 read_resources bus 0 link: 2
PCI: 00:18.4 read_resources bus 0 link: 2 done
PCI: 00:18.4 read_resources bus 0 link: 3
PCI: 00:18.4 read_resources bus 0 link: 3 done
PCI: 00:19.0 read_resources bus 0 link: 3
PCI: 00:19.0 read_resources bus 0 link: 3 done
PCI: 00:19.0 read_resources bus 0 link: 2
PCI: 00:19.0 read_resources bus 0 link: 2 done
PCI: 00:19.0 read_resources bus 0 link: 0
PCI: 00:19.0 read_resources bus 0 link: 0 done
PCI: 00:19.0 read_resources bus 0 link: 1
PCI: 00:19.0 read_resources bus 0 link: 1 done
PCI: 00:19.4 read_resources bus 0 link: 0
PCI: 00:19.4 read_resources bus 0 link: 0 done
PCI: 00:19.4 read_resources bus 0 link: 1
PCI: 00:19.4 read_resources bus 0 link: 1 done
PCI: 00:19.4 read_resources bus 0 link: 2
PCI: 00:19.4 read_resources bus 0 link: 2 done
PCI: 00:19.4 read_resources bus 0 link: 3
PCI: 00:19.4 read_resources bus 0 link: 3 done
PCI: 00:1a.0 read_resources bus 0 link: 3
PCI: 00:1a.0 read_resources bus 0 link: 3 done
PCI: 00:1a.0 read_resources bus 0 link: 2
PCI: 00:1a.0 read_resources bus 0 link: 2 done
PCI: 00:1a.0 read_resources bus 0 link: 0
PCI: 00:1a.0 read_resources bus 0 link: 0 done
PCI: 00:1a.0 read_resources bus 0 link: 1
PCI: 00:1a.0 read_resources bus 0 link: 1 done
PCI: 00:1a.4 read_resources bus 0 link: 0
PCI: 00:1a.4 read_resources bus 0 link: 0 done
PCI: 00:1a.4 read_resources bus 0 link: 1
PCI: 00:1a.4 read_resources bus 0 link: 1 done
PCI: 00:1a.4 read_resources bus 0 link: 2
PCI: 00:1a.4 read_resources bus 0 link: 2 done
PCI: 00:1a.4 read_resources bus 0 link: 3
PCI: 00:1a.4 read_resources bus 0 link: 3 done
PCI: 00:1b.0 read_resources bus 0 link: 3
PCI: 00:1b.0 read_resources bus 0 link: 3 done
PCI: 00:1b.0 read_resources bus 0 link: 2
PCI: 00:1b.0 read_resources bus 0 link: 2 done
PCI: 00:1b.0 read_resources bus 0 link: 0
PCI: 00:1b.0 read_resources bus 0 link: 0 done
PCI: 00:1b.0 read_resources bus 0 link: 1
PCI: 00:1b.0 read_resources bus 0 link: 1 done
PCI: 00:1b.4 read_resources bus 0 link: 0
PCI: 00:1b.4 read_resources bus 0 link: 0 done
PCI: 00:1b.4 read_resources bus 0 link: 1
PCI: 00:1b.4 read_resources bus 0 link: 1 done
PCI: 00:1b.4 read_resources bus 0 link: 2
PCI: 00:1b.4 read_resources bus 0 link: 2 done
PCI: 00:1b.4 read_resources bus 0 link: 3
PCI: 00:1b.4 read_resources bus 0 link: 3 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
APIC: 01
APIC: 02
APIC: 03
APIC: 04
APIC: 05
APIC: 06
APIC: 07
APIC: 08
APIC: 09
APIC: 0a
APIC: 0b
APIC: 0c
APIC: 0d
APIC: 0e
APIC: 0f
APIC: 20
APIC: 21
APIC: 22
APIC: 23
APIC: 24
APIC: 25
APIC: 26
APIC: 27
APIC: 28
APIC: 29
APIC: 2a
APIC: 2b
APIC: 2c
APIC: 2d
APIC: 2e
APIC: 2f
DOMAIN: 0000 child on link 0 PCI: 00:18.0
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
DOMAIN: 0000 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
DOMAIN: 0000 resource base 0 size c0000000 align 0 gran 0 limit 0 flags e0004200 index 7
PCI: 00:18.0
PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 110b0
PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 80200 index 110b8
PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 110d8
PCI: 00:00.0
PCI: 00:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 1200 index fc
PCI: 00:00.1
PCI: 00:00.2
PCI: 00:00.2 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 10000200 index 44
PCI: 00:02.0
PCI: 00:02.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:02.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:02.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 00:03.0
PCI: 00:04.0
PCI: 00:04.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 00:05.0
PCI: 00:06.0
PCI: 00:07.0
PCI: 00:08.0
PCI: 00:09.0 child on link 0 PCI: 03:00.0
PCI: 00:09.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 03:00.0
PCI: 03:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
PCI: 03:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
PCI: 03:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 1c
PCI: 00:0a.0 child on link 0 PCI: 04:00.0
PCI: 00:0a.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:0a.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:0a.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 04:00.0
PCI: 04:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
PCI: 04:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
PCI: 04:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 1c
PCI: 00:0b.0
PCI: 00:0b.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:0b.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:0b.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 00:0c.0
PCI: 00:0c.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:0c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:0c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 00:0d.0
PCI: 00:0d.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:0d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:0d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 00:11.0
PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
PCI: 00:11.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 24
PCI: 00:12.0
PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:12.1
PCI: 00:12.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:12.2
PCI: 00:12.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 00:13.0
PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:13.1
PCI: 00:13.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:13.2
PCI: 00:13.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 00:14.0 child on link 0 I2C: 01:50
PCI: 00:14.0 resource base fec00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 74
PCI: 00:14.0 resource base feb00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 9c
PCI: 00:14.0 resource base fed00000 size 400 align 8 gran 8 limit ffffffff flags d0000200 index b4
PCI: 00:14.0 resource base b00 size 10 align 8 gran 8 limit ffff flags d0000100 index 90
PCI: 00:14.0 resource base b20 size 10 align 8 gran 8 limit ffff flags d0000100 index 58
I2C: 01:50
I2C: 01:51
I2C: 01:52
I2C: 01:53
I2C: 01:54
I2C: 01:55
I2C: 01:56
I2C: 01:57
I2C: 01:2f
PCI: 00:14.1
PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
PCI: 00:14.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
PCI: 00:14.2
PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
PCI: 00:14.3 child on link 0 PNP: 002e.0
PCI: 00:14.3 resource base 0 size 1 align 12 gran 0 limit ffffffff flags 200 index a0
PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PNP: 002e.0
PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.1
PNP: 002e.1 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.2
PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60
PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.3
PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60
PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.5
PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62
PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72
PNP: 002e.106
PNP: 002e.106 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 62
PNP: 002e.107
PNP: 002e.207
PNP: 002e.307
PNP: 002e.407
PNP: 002e.8
PNP: 002e.108
PNP: 002e.9
PNP: 002e.109
PNP: 002e.209
PNP: 002e.309
PNP: 002e.a
PNP: 002e.b
PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit fff flags c0000100 index 60
PNP: 002e.b resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.c
PNP: 002e.d
PNP: 002e.f
PNP: 004e.0
PNP: 0ca2.0
PNP: 0ca2.0 resource base ca2 size 1 align 0 gran 0 limit 0 flags c0000100 index ca2
PCI: 00:14.4 child on link 0 PCI: 08:01.0
PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 08:01.0
PCI: 08:01.0 resource base 0 size 800000 align 23 gran 23 limit ffffffff flags 200 index 10
PCI: 08:01.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 14
PCI: 08:01.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 18
PCI: 08:02.0
PCI: 08:02.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 08:03.0
PCI: 00:14.5
PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:18.1
PCI: 00:18.2
PCI: 00:18.3
PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 200 index 94
PCI: 00:18.4
PCI: 00:18.5
PCI: 00:19.0
PCI: 00:19.1
PCI: 00:19.2
PCI: 00:19.3
PCI: 00:19.4
PCI: 00:19.5
PCI: 00:1a.0
PCI: 00:1a.1
PCI: 00:1a.2
PCI: 00:1a.3
PCI: 00:1a.4
PCI: 00:1a.5
PCI: 00:1b.0
PCI: 00:1b.1
PCI: 00:1b.2
PCI: 00:1b.3
PCI: 00:1b.4
PCI: 00:1b.5
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:18.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:02.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 00:02.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:04.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 00:04.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:09.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 03:00.0 18 * [0x0 - 0x1f] io
PCI: 00:09.0 io: base: 20 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:0a.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 04:00.0 18 * [0x0 - 0x1f] io
PCI: 00:0a.0 io: base: 20 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:0b.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 00:0b.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:0c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 00:0c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:0d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 00:0d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 08:01.0 18 * [0x0 - 0x7f] io
PCI: 00:14.4 io: base: 80 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:09.0 1c * [0x0 - 0xfff] io
PCI: 00:0a.0 1c * [0x1000 - 0x1fff] io
PCI: 00:14.4 1c * [0x2000 - 0x2fff] io
PCI: 00:11.0 20 * [0x3000 - 0x300f] io
PCI: 00:14.1 20 * [0x3010 - 0x301f] io
PCI: 00:11.0 10 * [0x3020 - 0x3027] io
PCI: 00:11.0 18 * [0x3028 - 0x302f] io
PCI: 00:14.1 10 * [0x3030 - 0x3037] io
PCI: 00:14.1 18 * [0x3038 - 0x303f] io
PCI: 00:11.0 14 * [0x3040 - 0x3043] io
PCI: 00:11.0 1c * [0x3044 - 0x3047] io
PCI: 00:14.1 14 * [0x3048 - 0x304b] io
PCI: 00:14.1 1c * [0x304c - 0x304f] io
PCI: 00:18.0 io: base: 3050 size: 4000 align: 12 gran: 12 limit: ffff done
PCI: 00:18.0 110d8 * [0x0 - 0x3fff] io
DOMAIN: 0000 io: base: 4000 size: 4000 align: 12 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:18.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff
PCI: 00:02.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:02.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:04.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:04.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:09.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:09.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:0a.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:0a.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:0b.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:0b.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:0c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:0c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:0d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:0d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:00.0 fc * [0x0 - 0xff] prefmem
PCI: 00:18.0 prefmem: base: 100 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:18.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff
PCI: 00:02.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:02.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:04.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:04.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:09.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 03:00.0 10 * [0x0 - 0x1ffff] mem
PCI: 03:00.0 1c * [0x20000 - 0x23fff] mem
PCI: 00:09.0 mem: base: 24000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:0a.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 04:00.0 10 * [0x0 - 0x1ffff] mem
PCI: 04:00.0 1c * [0x20000 - 0x23fff] mem
PCI: 00:0a.0 mem: base: 24000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:0b.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:0b.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:0c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:0c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:0d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:0d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 08:01.0 10 * [0x0 - 0x7fffff] mem
PCI: 08:01.0 14 * [0x800000 - 0x81ffff] mem
PCI: 08:02.0 10 * [0x820000 - 0x820fff] mem
PCI: 00:14.4 mem: base: 821000 size: 900000 align: 23 gran: 20 limit: ffffffff done
PCI: 00:14.4 20 * [0x0 - 0x8fffff] mem
PCI: 00:09.0 20 * [0x900000 - 0x9fffff] mem
PCI: 00:0a.0 20 * [0xa00000 - 0xafffff] mem
PCI: 00:00.2 44 * [0xb00000 - 0xb03fff] mem
PCI: 00:14.2 10 * [0xb04000 - 0xb07fff] mem
PCI: 00:12.0 10 * [0xb08000 - 0xb08fff] mem
PCI: 00:12.1 10 * [0xb09000 - 0xb09fff] mem
PCI: 00:13.0 10 * [0xb0a000 - 0xb0afff] mem
PCI: 00:13.1 10 * [0xb0b000 - 0xb0bfff] mem
PCI: 00:14.5 10 * [0xb0c000 - 0xb0cfff] mem
PCI: 00:11.0 24 * [0xb0d000 - 0xb0d3ff] mem
PCI: 00:12.2 10 * [0xb0e000 - 0xb0e0ff] mem
PCI: 00:13.2 10 * [0xb0f000 - 0xb0f0ff] mem
PCI: 00:14.3 a0 * [0xb10000 - 0xb10000] mem
PCI: 00:18.0 mem: base: b10001 size: c00000 align: 23 gran: 20 limit: ffffffff done
PCI: 00:18.3 94 * [0x0 - 0x3ffffff] mem
PCI: 00:18.0 110b8 * [0x4000000 - 0x4bfffff] mem
PCI: 00:18.0 110b0 * [0x4c00000 - 0x4cfffff] prefmem
DOMAIN: 0000 mem: base: 4d00000 size: 4d00000 align: 26 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: DOMAIN: 0000 c0010058 base c0000000 limit cfffffff mem (fixed)
constrain_resources: DOMAIN: 0000 07 base 00000000 limit bfffffff mem (fixed)
constrain_resources: PCI: 00:14.0 74 base fec00000 limit fec00fff mem (fixed)
constrain_resources: PCI: 00:14.0 9c base feb00000 limit feb00fff mem (fixed)
constrain_resources: PCI: 00:14.0 90 base 00000b00 limit 00000b0f io (fixed)
constrain_resources: PCI: 00:14.0 58 base 00000b20 limit 00000b2f io (fixed)
constrain_resources: PCI: 00:14.3 10000000 base 00000000 limit 00000fff io (fixed)
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 base f8000000 limit feafffff
Setting resources...
DOMAIN: 0000 io: base:1000 size:4000 align:12 gran:0 limit:ffff
PCI: 00:18.0 110d8 * [0x1000 - 0x4fff] io
DOMAIN: 0000 io: next_base: 5000 size: 4000 align: 12 gran: 0 done
PCI: 00:18.0 io: base:1000 size:4000 align:12 gran:12 limit:4fff
PCI: 00:09.0 1c * [0x1000 - 0x1fff] io
PCI: 00:0a.0 1c * [0x2000 - 0x2fff] io
PCI: 00:14.4 1c * [0x3000 - 0x3fff] io
PCI: 00:11.0 20 * [0x4000 - 0x400f] io
PCI: 00:14.1 20 * [0x4010 - 0x401f] io
PCI: 00:11.0 10 * [0x4020 - 0x4027] io
PCI: 00:11.0 18 * [0x4028 - 0x402f] io
PCI: 00:14.1 10 * [0x4030 - 0x4037] io
PCI: 00:14.1 18 * [0x4038 - 0x403f] io
PCI: 00:11.0 14 * [0x4040 - 0x4043] io
PCI: 00:11.0 1c * [0x4044 - 0x4047] io
PCI: 00:14.1 14 * [0x4048 - 0x404b] io
PCI: 00:14.1 1c * [0x404c - 0x404f] io
PCI: 00:18.0 io: next_base: 4050 size: 4000 align: 12 gran: 12 done
PCI: 00:02.0 io: base:4fff size:0 align:12 gran:12 limit:4fff
PCI: 00:02.0 io: next_base: 4fff size: 0 align: 12 gran: 12 done
PCI: 00:04.0 io: base:4fff size:0 align:12 gran:12 limit:4fff
PCI: 00:04.0 io: next_base: 4fff size: 0 align: 12 gran: 12 done
PCI: 00:09.0 io: base:1000 size:1000 align:12 gran:12 limit:1fff
PCI: 03:00.0 18 * [0x1000 - 0x101f] io
PCI: 00:09.0 io: next_base: 1020 size: 1000 align: 12 gran: 12 done
PCI: 00:0a.0 io: base:2000 size:1000 align:12 gran:12 limit:2fff
PCI: 04:00.0 18 * [0x2000 - 0x201f] io
PCI: 00:0a.0 io: next_base: 2020 size: 1000 align: 12 gran: 12 done
PCI: 00:0b.0 io: base:4fff size:0 align:12 gran:12 limit:4fff
PCI: 00:0b.0 io: next_base: 4fff size: 0 align: 12 gran: 12 done
PCI: 00:0c.0 io: base:4fff size:0 align:12 gran:12 limit:4fff
PCI: 00:0c.0 io: next_base: 4fff size: 0 align: 12 gran: 12 done
PCI: 00:0d.0 io: base:4fff size:0 align:12 gran:12 limit:4fff
PCI: 00:0d.0 io: next_base: 4fff size: 0 align: 12 gran: 12 done
PCI: 00:14.4 io: base:3000 size:1000 align:12 gran:12 limit:3fff
PCI: 08:01.0 18 * [0x3000 - 0x307f] io
PCI: 00:14.4 io: next_base: 3080 size: 1000 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:f8000000 size:4d00000 align:26 gran:0 limit:feafffff
PCI: 00:18.3 94 * [0xf8000000 - 0xfbffffff] mem
PCI: 00:18.0 110b8 * [0xfc000000 - 0xfcbfffff] mem
PCI: 00:18.0 110b0 * [0xfcc00000 - 0xfccfffff] prefmem
DOMAIN: 0000 mem: next_base: fcd00000 size: 4d00000 align: 26 gran: 0 done
PCI: 00:18.0 prefmem: base:fcc00000 size:100000 align:20 gran:20 limit:fccfffff
PCI: 00:00.0 fc * [0xfcc00000 - 0xfcc000ff] prefmem
PCI: 00:18.0 prefmem: next_base: fcc00100 size: 100000 align: 20 gran: 20 done
PCI: 00:02.0 prefmem: base:fccfffff size:0 align:20 gran:20 limit:fccfffff
PCI: 00:02.0 prefmem: next_base: fccfffff size: 0 align: 20 gran: 20 done
PCI: 00:04.0 prefmem: base:fccfffff size:0 align:20 gran:20 limit:fccfffff
PCI: 00:04.0 prefmem: next_base: fccfffff size: 0 align: 20 gran: 20 done
PCI: 00:09.0 prefmem: base:fccfffff size:0 align:20 gran:20 limit:fccfffff
PCI: 00:09.0 prefmem: next_base: fccfffff size: 0 align: 20 gran: 20 done
PCI: 00:0a.0 prefmem: base:fccfffff size:0 align:20 gran:20 limit:fccfffff
PCI: 00:0a.0 prefmem: next_base: fccfffff size: 0 align: 20 gran: 20 done
PCI: 00:0b.0 prefmem: base:fccfffff size:0 align:20 gran:20 limit:fccfffff
PCI: 00:0b.0 prefmem: next_base: fccfffff size: 0 align: 20 gran: 20 done
PCI: 00:0c.0 prefmem: base:fccfffff size:0 align:20 gran:20 limit:fccfffff
PCI: 00:0c.0 prefmem: next_base: fccfffff size: 0 align: 20 gran: 20 done
PCI: 00:0d.0 prefmem: base:fccfffff size:0 align:20 gran:20 limit:fccfffff
PCI: 00:0d.0 prefmem: next_base: fccfffff size: 0 align: 20 gran: 20 done
PCI: 00:14.4 prefmem: base:fccfffff size:0 align:20 gran:20 limit:fccfffff
PCI: 00:14.4 prefmem: next_base: fccfffff size: 0 align: 20 gran: 20 done
PCI: 00:18.0 mem: base:fc000000 size:c00000 align:23 gran:20 limit:fcbfffff
PCI: 00:14.4 20 * [0xfc000000 - 0xfc8fffff] mem
PCI: 00:09.0 20 * [0xfc900000 - 0xfc9fffff] mem
PCI: 00:0a.0 20 * [0xfca00000 - 0xfcafffff] mem
PCI: 00:00.2 44 * [0xfcb00000 - 0xfcb03fff] mem
PCI: 00:14.2 10 * [0xfcb04000 - 0xfcb07fff] mem
PCI: 00:12.0 10 * [0xfcb08000 - 0xfcb08fff] mem
PCI: 00:12.1 10 * [0xfcb09000 - 0xfcb09fff] mem
PCI: 00:13.0 10 * [0xfcb0a000 - 0xfcb0afff] mem
PCI: 00:13.1 10 * [0xfcb0b000 - 0xfcb0bfff] mem
PCI: 00:14.5 10 * [0xfcb0c000 - 0xfcb0cfff] mem
PCI: 00:11.0 24 * [0xfcb0d000 - 0xfcb0d3ff] mem
PCI: 00:12.2 10 * [0xfcb0e000 - 0xfcb0e0ff] mem
PCI: 00:13.2 10 * [0xfcb0f000 - 0xfcb0f0ff] mem
PCI: 00:14.3 a0 * [0xfcb10000 - 0xfcb10000] mem
PCI: 00:18.0 mem: next_base: fcb10001 size: c00000 align: 23 gran: 20 done
PCI: 00:02.0 mem: base:fcbfffff size:0 align:20 gran:20 limit:fcbfffff
PCI: 00:02.0 mem: next_base: fcbfffff size: 0 align: 20 gran: 20 done
PCI: 00:04.0 mem: base:fcbfffff size:0 align:20 gran:20 limit:fcbfffff
PCI: 00:04.0 mem: next_base: fcbfffff size: 0 align: 20 gran: 20 done
PCI: 00:09.0 mem: base:fc900000 size:100000 align:20 gran:20 limit:fc9fffff
PCI: 03:00.0 10 * [0xfc900000 - 0xfc91ffff] mem
PCI: 03:00.0 1c * [0xfc920000 - 0xfc923fff] mem
PCI: 00:09.0 mem: next_base: fc924000 size: 100000 align: 20 gran: 20 done
PCI: 00:0a.0 mem: base:fca00000 size:100000 align:20 gran:20 limit:fcafffff
PCI: 04:00.0 10 * [0xfca00000 - 0xfca1ffff] mem
PCI: 04:00.0 1c * [0xfca20000 - 0xfca23fff] mem
PCI: 00:0a.0 mem: next_base: fca24000 size: 100000 align: 20 gran: 20 done
PCI: 00:0b.0 mem: base:fcbfffff size:0 align:20 gran:20 limit:fcbfffff
PCI: 00:0b.0 mem: next_base: fcbfffff size: 0 align: 20 gran: 20 done
PCI: 00:0c.0 mem: base:fcbfffff size:0 align:20 gran:20 limit:fcbfffff
PCI: 00:0c.0 mem: next_base: fcbfffff size: 0 align: 20 gran: 20 done
PCI: 00:0d.0 mem: base:fcbfffff size:0 align:20 gran:20 limit:fcbfffff
PCI: 00:0d.0 mem: next_base: fcbfffff size: 0 align: 20 gran: 20 done
PCI: 00:14.4 mem: base:fc000000 size:900000 align:23 gran:20 limit:fc8fffff
PCI: 08:01.0 10 * [0xfc000000 - 0xfc7fffff] mem
PCI: 08:01.0 14 * [0xfc800000 - 0xfc81ffff] mem
PCI: 08:02.0 10 * [0xfc820000 - 0xfc820fff] mem
PCI: 00:14.4 mem: next_base: fc821000 size: 900000 align: 23 gran: 20 done
Root Device assign_resources, bus 0 link: 0
0: mmio_basek=00300000, basek=00400000, limitk=01100000
1: mmio_basek=00300000, basek=01100000, limitk=02100000
2: mmio_basek=00300000, basek=02100000, limitk=03100000
3: mmio_basek=00300000, basek=03100000, limitk=04100000
DOMAIN: 0000 assign_resources, bus 0 link: 0
VGA: PCI: 00:18.0 (aka node 0) link 1 has VGA device
PCI: 00:18.0 111b8 <- [0x00000a0000 - 0x00000bffff] size 0x00020000 gran 0x00 mem <node 0 link 1>
PCI: 00:18.0 110b0 <- [0x00fcc00000 - 0x00fccfffff] size 0x00100000 gran 0x14 prefmem <node 0 link 1>
PCI: 00:18.0 110b8 <- [0x00fc000000 - 0x00fcbfffff] size 0x00c00000 gran 0x14 mem <node 0 link 1>
PCI: 00:18.0 110d8 <- [0x0000001000 - 0x0000004fff] size 0x00004000 gran 0x0c io <node 0 link 1>
PCI: 00:18.0 assign_resources, bus 0 link: 1
PCI: 00:00.0 sr5690_set_resources
sr5690_set_resources: PCI: 00:00.0[0x1c] base = c0000000 limit = cfffffff
PCI: 00:00.0 c0010058 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x00 mem <mmconfig>
sr5690_set_resources: PCI: 00:18.1 <- index a8 base c00003 limit cfff90
PCI: 00:00.0 fc <- [0x00fcc00000 - 0x00fcc000ff] size 0x00000100 gran 0x08 prefmem
PCI: 00:00.2 44 <- [0x00fcb00000 - 0x00fcb03fff] size 0x00004000 gran 0x0e mem
PCI: 00:02.0 1c <- [0x0000004fff - 0x0000004ffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:02.0 24 <- [0x00fccfffff - 0x00fccffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:02.0 20 <- [0x00fcbfffff - 0x00fcbffffe] size 0x00000000 gran 0x14 bus 01 mem
PCI: 00:04.0 1c <- [0x0000004fff - 0x0000004ffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:04.0 24 <- [0x00fccfffff - 0x00fccffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:04.0 20 <- [0x00fcbfffff - 0x00fcbffffe] size 0x00000000 gran 0x14 bus 02 mem
PCI: 00:09.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 03 io
PCI: 00:09.0 24 <- [0x00fccfffff - 0x00fccffffe] size 0x00000000 gran 0x14 bus 03 prefmem
PCI: 00:09.0 20 <- [0x00fc900000 - 0x00fc9fffff] size 0x00100000 gran 0x14 bus 03 mem
PCI: 00:09.0 assign_resources, bus 3 link: 0
PCI: 03:00.0 10 <- [0x00fc900000 - 0x00fc91ffff] size 0x00020000 gran 0x11 mem
PCI: 03:00.0 18 <- [0x0000001000 - 0x000000101f] size 0x00000020 gran 0x05 io
PCI: 03:00.0 1c <- [0x00fc920000 - 0x00fc923fff] size 0x00004000 gran 0x0e mem
PCI: 00:09.0 assign_resources, bus 3 link: 0
PCI: 00:0a.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 04 io
PCI: 00:0a.0 24 <- [0x00fccfffff - 0x00fccffffe] size 0x00000000 gran 0x14 bus 04 prefmem
PCI: 00:0a.0 20 <- [0x00fca00000 - 0x00fcafffff] size 0x00100000 gran 0x14 bus 04 mem
PCI: 00:0a.0 assign_resources, bus 4 link: 0
PCI: 04:00.0 10 <- [0x00fca00000 - 0x00fca1ffff] size 0x00020000 gran 0x11 mem
PCI: 04:00.0 18 <- [0x0000002000 - 0x000000201f] size 0x00000020 gran 0x05 io
PCI: 04:00.0 1c <- [0x00fca20000 - 0x00fca23fff] size 0x00004000 gran 0x0e mem
PCI: 00:0a.0 assign_resources, bus 4 link: 0
PCI: 00:0b.0 1c <- [0x0000004fff - 0x0000004ffe] size 0x00000000 gran 0x0c bus 05 io
PCI: 00:0b.0 24 <- [0x00fccfffff - 0x00fccffffe] size 0x00000000 gran 0x14 bus 05 prefmem
PCI: 00:0b.0 20 <- [0x00fcbfffff - 0x00fcbffffe] size 0x00000000 gran 0x14 bus 05 mem
PCI: 00:0c.0 1c <- [0x0000004fff - 0x0000004ffe] size 0x00000000 gran 0x0c bus 06 io
PCI: 00:0c.0 24 <- [0x00fccfffff - 0x00fccffffe] size 0x00000000 gran 0x14 bus 06 prefmem
PCI: 00:0c.0 20 <- [0x00fcbfffff - 0x00fcbffffe] size 0x00000000 gran 0x14 bus 06 mem
PCI: 00:0d.0 1c <- [0x0000004fff - 0x0000004ffe] size 0x00000000 gran 0x0c bus 07 io
PCI: 00:0d.0 24 <- [0x00fccfffff - 0x00fccffffe] size 0x00000000 gran 0x14 bus 07 prefmem
PCI: 00:0d.0 20 <- [0x00fcbfffff - 0x00fcbffffe] size 0x00000000 gran 0x14 bus 07 mem
PCI: 00:11.0 10 <- [0x0000004020 - 0x0000004027] size 0x00000008 gran 0x03 io
PCI: 00:11.0 14 <- [0x0000004040 - 0x0000004043] size 0x00000004 gran 0x02 io
PCI: 00:11.0 18 <- [0x0000004028 - 0x000000402f] size 0x00000008 gran 0x03 io
PCI: 00:11.0 1c <- [0x0000004044 - 0x0000004047] size 0x00000004 gran 0x02 io
PCI: 00:11.0 20 <- [0x0000004000 - 0x000000400f] size 0x00000010 gran 0x04 io
PCI: 00:11.0 24 <- [0x00fcb0d000 - 0x00fcb0d3ff] size 0x00000400 gran 0x0a mem
PCI: 00:12.0 10 <- [0x00fcb08000 - 0x00fcb08fff] size 0x00001000 gran 0x0c mem
PCI: 00:12.1 10 <- [0x00fcb09000 - 0x00fcb09fff] size 0x00001000 gran 0x0c mem
PCI: 00:12.2 10 <- [0x00fcb0e000 - 0x00fcb0e0ff] size 0x00000100 gran 0x08 mem
PCI: 00:13.0 10 <- [0x00fcb0a000 - 0x00fcb0afff] size 0x00001000 gran 0x0c mem
PCI: 00:13.1 10 <- [0x00fcb0b000 - 0x00fcb0bfff] size 0x00001000 gran 0x0c mem
PCI: 00:13.2 10 <- [0x00fcb0f000 - 0x00fcb0f0ff] size 0x00000100 gran 0x08 mem
PCI: 00:14.0 assign_resources, bus 1 link: 0
PCI: 00:14.0 assign_resources, bus 1 link: 0
PCI: 00:14.1 10 <- [0x0000004030 - 0x0000004037] size 0x00000008 gran 0x03 io
PCI: 00:14.1 14 <- [0x0000004048 - 0x000000404b] size 0x00000004 gran 0x02 io
PCI: 00:14.1 18 <- [0x0000004038 - 0x000000403f] size 0x00000008 gran 0x03 io
PCI: 00:14.1 1c <- [0x000000404c - 0x000000404f] size 0x00000004 gran 0x02 io
PCI: 00:14.1 20 <- [0x0000004010 - 0x000000401f] size 0x00000010 gran 0x04 io
PCI: 00:14.2 10 <- [0x00fcb04000 - 0x00fcb07fff] size 0x00004000 gran 0x0e mem64
PCI: 00:14.3 a0 <- [0x00fcb10000 - 0x00fcb10000] size 0x00000001 gran 0x00 mem
PCI: 00:14.3 assign_resources, bus 0 link: 0
PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 002e.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
PNP: 002e.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io
PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
PNP: 002e.b 60 <- [0x0000000290 - 0x0000000291] size 0x00000002 gran 0x01 io
ERROR: PNP: 002e.b 70 irq size: 0x0000000001 not assigned
PNP: 0ca2.0 missing set_resources
PCI: 00:14.3 assign_resources, bus 0 link: 0
PCI: 00:14.4 1c <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x0c bus 08 io
PCI: 00:14.4 24 <- [0x00fccfffff - 0x00fccffffe] size 0x00000000 gran 0x14 bus 08 prefmem
PCI: 00:14.4 20 <- [0x00fc000000 - 0x00fc8fffff] size 0x00900000 gran 0x14 bus 08 mem
PCI: 00:14.4 assign_resources, bus 8 link: 0
PCI: 08:01.0 10 <- [0x00fc000000 - 0x00fc7fffff] size 0x00800000 gran 0x17 mem
PCI: 08:01.0 14 <- [0x00fc800000 - 0x00fc81ffff] size 0x00020000 gran 0x11 mem
PCI: 08:01.0 18 <- [0x0000003000 - 0x000000307f] size 0x00000080 gran 0x07 io
PCI: 08:02.0 10 <- [0x00fc820000 - 0x00fc820fff] size 0x00001000 gran 0x0c mem
PCI: 00:14.4 assign_resources, bus 8 link: 0
PCI: 00:14.5 10 <- [0x00fcb0c000 - 0x00fcb0cfff] size 0x00001000 gran 0x0c mem
PCI: 00:18.0 assign_resources, bus 0 link: 1
PCI: 00:18.3 94 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x1a mem <gart>
PCI: 00:19.3 94 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x1a mem <gart>
PCI: 00:1a.3 94 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x1a mem <gart>
PCI: 00:1b.3 94 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x1a mem <gart>
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
APIC: 01
APIC: 02
APIC: 03
APIC: 04
APIC: 05
APIC: 06
APIC: 07
APIC: 08
APIC: 09
APIC: 0a
APIC: 0b
APIC: 0c
APIC: 0d
APIC: 0e
APIC: 0f
APIC: 20
APIC: 21
APIC: 22
APIC: 23
APIC: 24
APIC: 25
APIC: 26
APIC: 27
APIC: 28
APIC: 29
APIC: 2a
APIC: 2b
APIC: 2c
APIC: 2d
APIC: 2e
APIC: 2f
DOMAIN: 0000 child on link 0 PCI: 00:18.0
DOMAIN: 0000 resource base 1000 size 4000 align 12 gran 0 limit ffff flags 40040100 index 10000000
DOMAIN: 0000 resource base f8000000 size 4d00000 align 26 gran 0 limit feafffff flags 40040200 index 10000100
DOMAIN: 0000 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
DOMAIN: 0000 resource base 0 size c0000000 align 0 gran 0 limit 0 flags e0004200 index 7
DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10
DOMAIN: 0000 resource base c0000 size bff40000 align 0 gran 0 limit 0 flags e0004200 index 20
DOMAIN: 0000 resource base 100000000 size 340000000 align 0 gran 0 limit 0 flags e0004200 index 30
DOMAIN: 0000 resource base 440000000 size 400000000 align 0 gran 0 limit 0 flags e0004200 index 41
DOMAIN: 0000 resource base 840000000 size 400000000 align 0 gran 0 limit 0 flags e0004200 index 52
DOMAIN: 0000 resource base c40000000 size 400000000 align 0 gran 0 limit 0 flags e0004200 index 63
PCI: 00:18.0
PCI: 00:18.0 resource base fcc00000 size 100000 align 20 gran 20 limit fccfffff flags 60081200 index 110b0
PCI: 00:18.0 resource base fc000000 size c00000 align 23 gran 20 limit fcbfffff flags 60080200 index 110b8
PCI: 00:18.0 resource base 1000 size 4000 align 12 gran 12 limit 4fff flags 60080100 index 110d8
PCI: 00:18.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags e0000200 index 111b8
PCI: 00:00.0
PCI: 00:00.0 resource base fcc00000 size 100 align 12 gran 8 limit fcc000ff flags 60001200 index fc
PCI: 00:00.1
PCI: 00:00.2
PCI: 00:00.2 resource base fcb00000 size 4000 align 14 gran 14 limit fcb03fff flags 70000200 index 44
PCI: 00:02.0
PCI: 00:02.0 resource base 4fff size 0 align 12 gran 12 limit 4fff flags 60080102 index 1c
PCI: 00:02.0 resource base fccfffff size 0 align 20 gran 20 limit fccfffff flags 60081202 index 24
PCI: 00:02.0 resource base fcbfffff size 0 align 20 gran 20 limit fcbfffff flags 60080202 index 20
PCI: 00:03.0
PCI: 00:04.0
PCI: 00:04.0 resource base 4fff size 0 align 12 gran 12 limit 4fff flags 60080102 index 1c
PCI: 00:04.0 resource base fccfffff size 0 align 20 gran 20 limit fccfffff flags 60081202 index 24
PCI: 00:04.0 resource base fcbfffff size 0 align 20 gran 20 limit fcbfffff flags 60080202 index 20
PCI: 00:05.0
PCI: 00:06.0
PCI: 00:07.0
PCI: 00:08.0
PCI: 00:09.0 child on link 0 PCI: 03:00.0
PCI: 00:09.0 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c
PCI: 00:09.0 resource base fccfffff size 0 align 20 gran 20 limit fccfffff flags 60081202 index 24
PCI: 00:09.0 resource base fc900000 size 100000 align 20 gran 20 limit fc9fffff flags 60080202 index 20
PCI: 03:00.0
PCI: 03:00.0 resource base fc900000 size 20000 align 17 gran 17 limit fc91ffff flags 60000200 index 10
PCI: 03:00.0 resource base 1000 size 20 align 5 gran 5 limit 101f flags 60000100 index 18
PCI: 03:00.0 resource base fc920000 size 4000 align 14 gran 14 limit fc923fff flags 60000200 index 1c
PCI: 00:0a.0 child on link 0 PCI: 04:00.0
PCI: 00:0a.0 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c
PCI: 00:0a.0 resource base fccfffff size 0 align 20 gran 20 limit fccfffff flags 60081202 index 24
PCI: 00:0a.0 resource base fca00000 size 100000 align 20 gran 20 limit fcafffff flags 60080202 index 20
PCI: 04:00.0
PCI: 04:00.0 resource base fca00000 size 20000 align 17 gran 17 limit fca1ffff flags 60000200 index 10
PCI: 04:00.0 resource base 2000 size 20 align 5 gran 5 limit 201f flags 60000100 index 18
PCI: 04:00.0 resource base fca20000 size 4000 align 14 gran 14 limit fca23fff flags 60000200 index 1c
PCI: 00:0b.0
PCI: 00:0b.0 resource base 4fff size 0 align 12 gran 12 limit 4fff flags 60080102 index 1c
PCI: 00:0b.0 resource base fccfffff size 0 align 20 gran 20 limit fccfffff flags 60081202 index 24
PCI: 00:0b.0 resource base fcbfffff size 0 align 20 gran 20 limit fcbfffff flags 60080202 index 20
PCI: 00:0c.0
PCI: 00:0c.0 resource base 4fff size 0 align 12 gran 12 limit 4fff flags 60080102 index 1c
PCI: 00:0c.0 resource base fccfffff size 0 align 20 gran 20 limit fccfffff flags 60081202 index 24
PCI: 00:0c.0 resource base fcbfffff size 0 align 20 gran 20 limit fcbfffff flags 60080202 index 20
PCI: 00:0d.0
PCI: 00:0d.0 resource base 4fff size 0 align 12 gran 12 limit 4fff flags 60080102 index 1c
PCI: 00:0d.0 resource base fccfffff size 0 align 20 gran 20 limit fccfffff flags 60081202 index 24
PCI: 00:0d.0 resource base fcbfffff size 0 align 20 gran 20 limit fcbfffff flags 60080202 index 20
PCI: 00:11.0
PCI: 00:11.0 resource base 4020 size 8 align 3 gran 3 limit 4027 flags 60000100 index 10
PCI: 00:11.0 resource base 4040 size 4 align 2 gran 2 limit 4043 flags 60000100 index 14
PCI: 00:11.0 resource base 4028 size 8 align 3 gran 3 limit 402f flags 60000100 index 18
PCI: 00:11.0 resource base 4044 size 4 align 2 gran 2 limit 4047 flags 60000100 index 1c
PCI: 00:11.0 resource base 4000 size 10 align 4 gran 4 limit 400f flags 60000100 index 20
PCI: 00:11.0 resource base fcb0d000 size 400 align 12 gran 10 limit fcb0d3ff flags 60000200 index 24
PCI: 00:12.0
PCI: 00:12.0 resource base fcb08000 size 1000 align 12 gran 12 limit fcb08fff flags 60000200 index 10
PCI: 00:12.1
PCI: 00:12.1 resource base fcb09000 size 1000 align 12 gran 12 limit fcb09fff flags 60000200 index 10
PCI: 00:12.2
PCI: 00:12.2 resource base fcb0e000 size 100 align 12 gran 8 limit fcb0e0ff flags 60000200 index 10
PCI: 00:13.0
PCI: 00:13.0 resource base fcb0a000 size 1000 align 12 gran 12 limit fcb0afff flags 60000200 index 10
PCI: 00:13.1
PCI: 00:13.1 resource base fcb0b000 size 1000 align 12 gran 12 limit fcb0bfff flags 60000200 index 10
PCI: 00:13.2
PCI: 00:13.2 resource base fcb0f000 size 100 align 12 gran 8 limit fcb0f0ff flags 60000200 index 10
PCI: 00:14.0 child on link 0 I2C: 01:50
PCI: 00:14.0 resource base fec00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 74
PCI: 00:14.0 resource base feb00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 9c
PCI: 00:14.0 resource base fed00000 size 400 align 8 gran 8 limit ffffffff flags d0000200 index b4
PCI: 00:14.0 resource base b00 size 10 align 8 gran 8 limit ffff flags d0000100 index 90
PCI: 00:14.0 resource base b20 size 10 align 8 gran 8 limit ffff flags d0000100 index 58
I2C: 01:50
I2C: 01:51
I2C: 01:52
I2C: 01:53
I2C: 01:54
I2C: 01:55
I2C: 01:56
I2C: 01:57
I2C: 01:2f
PCI: 00:14.1
PCI: 00:14.1 resource base 4030 size 8 align 3 gran 3 limit 4037 flags 60000100 index 10
PCI: 00:14.1 resource base 4048 size 4 align 2 gran 2 limit 404b flags 60000100 index 14
PCI: 00:14.1 resource base 4038 size 8 align 3 gran 3 limit 403f flags 60000100 index 18
PCI: 00:14.1 resource base 404c size 4 align 2 gran 2 limit 404f flags 60000100 index 1c
PCI: 00:14.1 resource base 4010 size 10 align 4 gran 4 limit 401f flags 60000100 index 20
PCI: 00:14.2
PCI: 00:14.2 resource base fcb04000 size 4000 align 14 gran 14 limit fcb07fff flags 60000201 index 10
PCI: 00:14.3 child on link 0 PNP: 002e.0
PCI: 00:14.3 resource base fcb10000 size 1 align 12 gran 0 limit fcb10000 flags 60000200 index a0
PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PNP: 002e.0
PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.1
PNP: 002e.1 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.2
PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit fff flags e0000100 index 60
PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.3
PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit fff flags e0000100 index 60
PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.5
PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60
PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 62
PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72
PNP: 002e.106
PNP: 002e.106 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 62
PNP: 002e.107
PNP: 002e.207
PNP: 002e.307
PNP: 002e.407
PNP: 002e.8
PNP: 002e.108
PNP: 002e.9
PNP: 002e.109
PNP: 002e.209
PNP: 002e.309
PNP: 002e.a
PNP: 002e.b
PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit fff flags e0000100 index 60
PNP: 002e.b resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.c
PNP: 002e.d
PNP: 002e.f
PNP: 004e.0
PNP: 0ca2.0
PNP: 0ca2.0 resource base ca2 size 1 align 0 gran 0 limit 0 flags c0000100 index ca2
PCI: 00:14.4 child on link 0 PCI: 08:01.0
PCI: 00:14.4 resource base 3000 size 1000 align 12 gran 12 limit 3fff flags 60080102 index 1c
PCI: 00:14.4 resource base fccfffff size 0 align 20 gran 20 limit fccfffff flags 60081202 index 24
PCI: 00:14.4 resource base fc000000 size 900000 align 23 gran 20 limit fc8fffff flags 60080202 index 20
PCI: 08:01.0
PCI: 08:01.0 resource base fc000000 size 800000 align 23 gran 23 limit fc7fffff flags 60000200 index 10
PCI: 08:01.0 resource base fc800000 size 20000 align 17 gran 17 limit fc81ffff flags 60000200 index 14
PCI: 08:01.0 resource base 3000 size 80 align 7 gran 7 limit 307f flags 60000100 index 18
PCI: 08:01.0 resource base a0000 size 1fc00 align 0 gran 0 limit 0 flags f0000200 index 3
PCI: 08:02.0
PCI: 08:02.0 resource base fc820000 size 1000 align 12 gran 12 limit fc820fff flags 60000200 index 10
PCI: 08:03.0
PCI: 00:14.5
PCI: 00:14.5 resource base fcb0c000 size 1000 align 12 gran 12 limit fcb0cfff flags 60000200 index 10
PCI: 00:18.1
PCI: 00:18.2
PCI: 00:18.3
PCI: 00:18.3 resource base f8000000 size 4000000 align 26 gran 26 limit fbffffff flags 60000200 index 94
PCI: 00:18.4
PCI: 00:18.5
PCI: 00:19.0
PCI: 00:19.1
PCI: 00:19.2
PCI: 00:19.3
PCI: 00:19.4
PCI: 00:19.5
PCI: 00:1a.0
PCI: 00:1a.1
PCI: 00:1a.2
PCI: 00:1a.3
PCI: 00:1a.4
PCI: 00:1a.5
PCI: 00:1b.0
PCI: 00:1b.1
PCI: 00:1b.2
PCI: 00:1b.3
PCI: 00:1b.4
PCI: 00:1b.5
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 3074951 exit 0
Enabling resources...
PCI: 00:18.0 cmd <- 00
PCI: 00:18.1 subsystem <- 1043/8163
PCI: 00:18.1 cmd <- 00
PCI: 00:18.2 subsystem <- 1043/8163
PCI: 00:18.2 cmd <- 00
PCI: 00:18.3 cmd <- 00
PCI: 00:18.4 cmd <- 00
PCI: 00:18.5 cmd <- 00
PCI: 00:19.0 cmd <- 00
PCI: 00:19.1 subsystem <- 1043/8163
PCI: 00:19.1 cmd <- 00
PCI: 00:19.2 subsystem <- 1043/8163
PCI: 00:19.2 cmd <- 00
PCI: 00:19.3 cmd <- 00
PCI: 00:19.4 cmd <- 00
PCI: 00:19.5 cmd <- 00
PCI: 00:1a.0 cmd <- 00
PCI: 00:1a.1 subsystem <- 1043/8163
PCI: 00:1a.1 cmd <- 00
PCI: 00:1a.2 subsystem <- 1043/8163
PCI: 00:1a.2 cmd <- 00
PCI: 00:1a.3 cmd <- 00
PCI: 00:1a.4 cmd <- 00
PCI: 00:1a.5 cmd <- 00
PCI: 00:1b.0 cmd <- 00
PCI: 00:1b.1 subsystem <- 1043/8163
PCI: 00:1b.1 cmd <- 00
PCI: 00:1b.2 subsystem <- 1043/8163
PCI: 00:1b.2 cmd <- 00
PCI: 00:1b.3 cmd <- 00
PCI: 00:1b.4 cmd <- 00
PCI: 00:1b.5 cmd <- 00
PCI: 00:00.0 subsystem <- 1043/8163
PCI: 00:00.0 cmd <- 02
Initializing IOMMU
PCI: 00:02.0 bridge ctrl <- 0003
PCI: 00:02.0 cmd <- 00
PCI: 00:04.0 bridge ctrl <- 0003
PCI: 00:04.0 cmd <- 00
PCI: 00:09.0 bridge ctrl <- 0003
PCI: 00:09.0 cmd <- 07
PCI: 00:0a.0 bridge ctrl <- 0003
PCI: 00:0a.0 cmd <- 07
PCI: 00:0b.0 bridge ctrl <- 0003
PCI: 00:0b.0 cmd <- 00
PCI: 00:0c.0 bridge ctrl <- 0003
PCI: 00:0c.0 cmd <- 00
PCI: 00:0d.0 bridge ctrl <- 0003
PCI: 00:0d.0 cmd <- 00
PCI: 00:11.0 subsystem <- 1043/8163
PCI: 00:11.0 cmd <- 03
PCI: 00:12.0 subsystem <- 1043/8163
PCI: 00:12.0 cmd <- 02
PCI: 00:12.1 subsystem <- 1043/8163
PCI: 00:12.1 cmd <- 02
PCI: 00:12.2 subsystem <- 1043/8163
PCI: 00:12.2 cmd <- 02
PCI: 00:13.0 subsystem <- 1043/8163
PCI: 00:13.0 cmd <- 02
PCI: 00:13.1 subsystem <- 1043/8163
PCI: 00:13.1 cmd <- 02
PCI: 00:13.2 subsystem <- 1043/8163
PCI: 00:13.2 cmd <- 02
PCI: 00:14.0 subsystem <- 1043/8163
PCI: 00:14.0 cmd <- 403
PCI: 00:14.1 subsystem <- 1043/8163
PCI: 00:14.1 cmd <- 01
PCI: 00:14.2 subsystem <- 1043/8163
PCI: 00:14.2 cmd <- 02
PCI: 00:14.3 subsystem <- 1043/8163
PCI: 00:14.3 cmd <- 0f
sb700 lpc decode:PNP: 002e.2, base=0x000003f8, end=0x000003ff
sb700 lpc decode:PNP: 002e.3, base=0x000002f8, end=0x000002ff
sb700 lpc decode:PNP: 002e.5, base=0x00000060, end=0x00000060
sb700 lpc decode:PNP: 002e.5, base=0x00000064, end=0x00000064
sb700 lpc decode:PNP: 002e.b, base=0x00000290, end=0x00000291
sb700 lpc decode:PNP: 0ca2.0, base=0x00000ca2, end=0x00000ca2
PCI: 00:14.4 bridge ctrl <- 000b
PCI: 00:14.4 cmd <- 07
PCI: 00:14.5 subsystem <- 1043/8163
PCI: 00:14.5 cmd <- 02
PCI: 03:00.0 cmd <- 03
PCI: 04:00.0 cmd <- 03
PCI: 08:01.0 cmd <- 03
PCI: 08:02.0 subsystem <- 1043/8163
PCI: 08:02.0 cmd <- 02
done.
BS: BS_DEV_ENABLE times (us): entry 0 run 170795 exit 0
Initializing devices...
Root Device init ...
Root Device init finished in 1399 usecs
CPU_CLUSTER: 0 init ...
Enabling probe filter
Enabling ATM mode
start_eip=0x00001000, code_size=0x00000031
CPU1: stack_base 00150000, stack_end 00150ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 1.
After apic_write.
Initializing CPU #1
Startup point 1.
CPU: vendor AMD device 600f12
Waiting for send to finish...
+CPU: family 15, model 01, stepping 02
After Startup.
nodeid = 00, coreid = 01
CPU2: stack_base 0014f000, stack_end 0014fff8
Enabling cache
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 2.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU3: stack_base 0014e000, stack_end 0014eff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 3.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU4: stack_base 0014d000, stack_end 0014dff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 4.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU5: stack_base 0014c000, stack_end 0014cff8
MTRR check
Asserting INIT.
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Waiting for send to finish...
+Setting up local APIC...Deasserting INIT.
apic_id: 0x02 Waiting for send to finish...
+done.
#startup loops: 1.
Sending STARTUP #1 to 5.
After apic_write.
CPU model: AMD Opteron(tm) Processor 6278
Startup point 1.
siblings = 15, Waiting for send to finish...
Disabling SMM ASeg memory
+
MTRR check
Fixed MTRRs : After Startup.
CPU #2 initialized
CPU6: stack_base 0014b000, stack_end 0014bff8
Enabled
Variable MTRRs: Asserting INIT.
Enabled
Waiting for send to finish...
+Setting up local APIC...Deasserting INIT.
apic_id: 0x03 done.
Waiting for send to finish...
+CPU model: AMD Opteron(tm) Processor 6278
#startup loops: 1.
Sending STARTUP #1 to 6.
siblings = 15, After apic_write.
Disabling SMM ASeg memory
Startup point 1.
CPU #3 initialized
Waiting for send to finish...
+After Startup.
CPU7: stack_base 0014a000, stack_end 0014aff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 7.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU8: stack_base 00149000, stack_end 00149ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 8.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU9: stack_base 00148000, stack_end 00148ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
MTRR check
Waiting for send to finish...
+Fixed MTRRs : Enabled
Variable MTRRs: #startup loops: 1.
Sending STARTUP #1 to 9.
Enabled
After apic_write.
Startup point 1.
Waiting for send to finish...
+Setting up local APIC...After Startup.
CPU10: stack_base 00147000, stack_end 00147ff8
apic_id: 0x04 done.
Asserting INIT.
CPU model: AMD Opteron(tm) Processor 6278
Waiting for send to finish...
+siblings = 15, Deasserting INIT.
Disabling SMM ASeg memory
Waiting for send to finish...
+#startup loops: 1.
CPU #4 initialized
Sending STARTUP #1 to 10.
After apic_write.
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Startup point 1.
Waiting for send to finish...
+Setting up local APIC...After Startup.
apic_id: 0x05 done.
CPU11: stack_base 00146000, stack_end 00146ff8
CPU model: AMD Opteron(tm) Processor 6278
Asserting INIT.
siblings = 15, Waiting for send to finish...
+Disabling SMM ASeg memory
Deasserting INIT.
Waiting for send to finish...
+CPU #5 initialized
#startup loops: 1.
Sending STARTUP #1 to 11.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU12: stack_base 00145000, stack_end 00145ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 12.
After apic_write.
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Startup point 1.
Waiting for send to finish...
+Setting up local APIC...After Startup.
apic_id: 0x06 done.
CPU13: stack_base 00144000, stack_end 00144ff8
CPU model: AMD Opteron(tm) Processor 6278
Asserting INIT.
siblings = 15, Waiting for send to finish...
+Disabling SMM ASeg memory
Deasserting INIT.
CPU #6 initialized
Waiting for send to finish...
+
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: #startup loops: 1.
Sending STARTUP #1 to 13.
Enabled
After apic_write.
Startup point 1.
Waiting for send to finish...
+Setting up local APIC...After Startup.
CPU14: stack_base 00143000, stack_end 00143ff8
apic_id: 0x07 done.
Asserting INIT.
CPU model: AMD Opteron(tm) Processor 6278
Waiting for send to finish...
+siblings = 15, Deasserting INIT.
Disabling SMM ASeg memory
Waiting for send to finish...
CPU #7 initialized
+#startup loops: 1.
Sending STARTUP #1 to 14.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU15: stack_base 00142000, stack_end 00142ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 15.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU16: stack_base 00141000, stack_end 00141ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 32.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU17: stack_base 00140000, stack_end 00140ff8
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Asserting INIT.
Waiting for send to finish...
+Setting up local APIC...Deasserting INIT.
apic_id: 0x08 done.
Waiting for send to finish...
+CPU model: AMD Opteron(tm) Processor 6278
#startup loops: 1.
Sending STARTUP #1 to 33.
siblings = 15, After apic_write.
Disabling SMM ASeg memory
Startup point 1.
Waiting for send to finish...
+
MTRR check
CPU #8 initialized
After Startup.
CPU18: stack_base 0013f000, stack_end 0013fff8
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Asserting INIT.
Waiting for send to finish...
Setting up local APIC...+ apic_id: 0x09 done.
Deasserting INIT.
CPU model: AMD Opteron(tm) Processor 6278
Waiting for send to finish...
+siblings = 15, #startup loops: 1.
Sending STARTUP #1 to 34.
After apic_write.
Disabling SMM ASeg memory
Startup point 1.
Waiting for send to finish...
+CPU #9 initialized
After Startup.
CPU19: stack_base 0013e000, stack_end 0013eff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 35.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU20: stack_base 0013d000, stack_end 0013dff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 36.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU21: stack_base 0013c000, stack_end 0013cff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 37.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU22: stack_base 0013b000, stack_end 0013bff8
CPU: vendor AMD device 600f12
CPU: family 15, model 01, stepping 02
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Asserting INIT.
Setting up local APIC...Waiting for send to finish...
+ apic_id: 0x0c done.
Deasserting INIT.
CPU model: AMD Opteron(tm) Processor 6278
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 38.
After apic_write.
siblings = 15, Startup point 1.
Waiting for send to finish...
+Disabling SMM ASeg memory
MTRR check
After Startup.
CPU23: stack_base 0013a000, stack_end 0013aff8
MTRR check
CPU #12 initialized
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Asserting INIT.
Setting up local APIC...Waiting for send to finish...
+ apic_id: 0x0d done.
CPU model: AMD Opteron(tm) Processor 6278
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
siblings = 15, Deasserting INIT.
Disabling SMM ASeg memory
Waiting for send to finish...
+CPU #13 initialized
#startup loops: 1.
Sending STARTUP #1 to 39.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU24: stack_base 00139000, stack_end 00139ff8
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Asserting INIT.
Setting up local APIC...Setting up local APIC... apic_id: 0x24 done.
apic_id: 0x0e done.
CPU model: AMD Opteron(tm) Processor 6278
CPU model: AMD Opteron(tm) Processor 6278
siblings = 15, siblings = 15, Disabling SMM ASeg memory
Disabling SMM ASeg memory
Waiting for send to finish...
+CPU #14 initialized
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local APIC...CPU #20 initialized
Deasserting INIT.
Setting up local APIC... apic_id: 0x25 done.
Waiting for send to finish...
+ apic_id: 0x0f done.
CPU model: AMD Opteron(tm) Processor 6278
CPU model: AMD Opteron(tm) Processor 6278
siblings = 15, #startup loops: 1.
Sending STARTUP #1 to 40.
After apic_write.
siblings = 15, Disabling SMM ASeg memory
Disabling SMM ASeg memory
CPU #15 initialized
CPU #21 initialized
Startup point 1.
Waiting for send to finish...
+After Startup.
nodeid = 02, coreid = 01
Setting up local APIC...CPU25: stack_base 00138000, stack_end 00138ff8
Asserting INIT.
Waiting for send to finish...
+CPU: vendor AMD device 600f12
Deasserting INIT.
CPU: family 15, model 01, stepping 02
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Enabling cache
Waiting for send to finish...
+Setting up local APIC...#startup loops: 1.
Sending STARTUP #1 to 41.
After apic_write.
apic_id: 0x28 done.
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local APIC...Startup point 1.
Waiting for send to finish...
+Setting up local APIC... apic_id: 0x22 done.
apic_id: 0x0a done.
CPU model: AMD Opteron(tm) Processor 6278
CPU model: AMD Opteron(tm) Processor 6278
siblings = 15, siblings = 15, After Startup.
CPU26: stack_base 00137000, stack_end 00137ff8
Disabling SMM ASeg memory
Disabling SMM ASeg memory
Asserting INIT.
CPU #10 initialized
MTRR check
CPU #18 initialized
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
nodeid = 02, coreid = 07
Setting up local APIC...Initializing CPU #25
Waiting for send to finish...
+ apic_id: 0x0b done.
Setting up local APIC...Deasserting INIT.
CPU model: AMD Opteron(tm) Processor 6278
apic_id: 0x23 done.
siblings = 15, CPU model: AMD Opteron(tm) Processor 6278
Disabling SMM ASeg memory
siblings = 15, CPU #11 initialized
Disabling SMM ASeg memory
Waiting for send to finish...
+CPU #19 initialized
#startup loops: 1.
Sending STARTUP #1 to 42.
After apic_write.
Enabling cache
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Startup point 1.
Waiting for send to finish...
+Setting up local APIC...After Startup.
apic_id: 0x26 done.
CPU27: stack_base 00136000, stack_end 00136ff8
CPU model: AMD Opteron(tm) Processor 6278
Asserting INIT.
siblings = 15, Waiting for send to finish...
+Disabling SMM ASeg memory
Deasserting INIT.
CPU #22 initialized
Waiting for send to finish...
+
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
apic_id: 0x20 done.
CPU: vendor AMD device 600f12
Setting up local APIC... apic_id: 0x27 done.
Enabling cache
#startup loops: 1.
Sending STARTUP #1 to 43.
After apic_write.
CPU model: AMD Opteron(tm) Processor 6278
Startup point 1.
Waiting for send to finish...
+siblings = 15, After Startup.
CPU28: stack_base 00135000, stack_end 00135ff8
CPU model: AMD Opteron(tm) Processor 6278
Disabling SMM ASeg memory
siblings = 15, CPU #16 initialized
Asserting INIT.
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Disabling SMM ASeg memory
Setting up local APIC...Waiting for send to finish...
+CPU #23 initialized
Deasserting INIT.
apic_id: 0x21 done.
Waiting for send to finish...
+CPU model: AMD Opteron(tm) Processor 6278
#startup loops: 1.
Sending STARTUP #1 to 44.
siblings = 15, After apic_write.
Disabling SMM ASeg memory
Startup point 1.
Waiting for send to finish...
+CPU #17 initialized
After Startup.
CPU29: stack_base 00134000, stack_end 00134ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+CPU: family 15, model 01, stepping 02
#startup loops: 1.
Sending STARTUP #1 to 45.
After apic_write.
Startup point 1.
Waiting for send to finish...
+nodeid = 03, coreid = 01
CPU model: AMD Opteron(tm) Processor 6278
After Startup.
Enabling cache
CPU ID 0x80000001: 600f12
CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB
MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e
MTRR:led
Variable MTRRs: Enabled
Deasserting INIT.
Setting up local 1e1e1e1e1e1e
MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e
MTRR: Fixetup loops: 1.
Sending STARTUP #1 to 46.
CPU model: AMD Opteron(te1e1e1e
MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
CPU31: stack_base 00132000, stack_end 00132ff8
Setting up local APIC...Asserting INIT.
apic_id: 0x2a done.
Waiting for send to finish...
+CPU model: AMD Opteron(tm) Processor 6278
Deasserting INIT.
siblings = 15, Waiting for send to finish...
+Disabling SMM ASeg memory
#startup loops: 1.
Sending STARTUP #1 to 47.
After apic_write.
CPU #26 initialized
Startup point 1.
Waiting for send to finish...
+
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
After Startup.
Initializing CPU #0
Setting up local APIC...CPU: vendor AMD device 600f12
CPU: family 15, model 01, stepping 02
apic_id: 0x2b done.
nodeid = 00, coreid = 00
CPU model: AMD Opteron(tm) Processor 6278
Enabling cache
siblings = 15, Disabling SMM ASeg memory
CPU #27 initialized
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local APIC... apic_id: 0x00 done.
CPU model: AMD Opteron(tm) Processor 6278
siblings = 15, Disabling SMM ASeg memory
CPU #0 initialized
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local APIC...CPU_CLUSTER: 0 init finished in 1747858 usecs
apic_id: 0x01 PCI: 00:18.0 init ...
done.
PCI: 00:18.0 init finished in 2352 usecs
PCI: 00:18.1 init ...
CPU model: AMD Opteron(tm) Processor 6278
PCI: 00:18.1 init finished in 2494 usecs
siblings = 15, PCI: 00:18.2 init ...
Disabling SMM ASeg memory
PCI: 00:18.2 init finished in 8874 usecs
PCI: 00:18.3 init ...
CPU #1 initialized
Enabling cache
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
NB: Function 3 Misc Control..
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local APIC...done.
apic_id: 0x2c done.
PCI: 00:18.3 init finished in 45369 usecs
Setting up local APIC...CPU model: AMD Opteron(tm) Processor 6278
apic_id: 0x2e done.
siblings = 15, CPU model: AMD Opteron(tm) Processor 6278
Disabling SMM ASeg memory
siblings = 15, CPU #28 initialized
MTRR check
Disabling SMM ASeg memory
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
CPU #30 initialized
PCI: 00:18.4 init ...
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
NB: Function 4 Link Control.. Setting up local APIC...Setting up local APIC... apic_id: 0x2d done.
apic_id: 0x2f done.
CPU model: AMD Opteron(tm) Processor 6278
CPU model: AMD Opteron(tm) Processor 6278
siblings = 15, siblings = 15, Disabling SMM ASeg memory
Disabling SMM ASeg memory
CPU #29 initialized
CPU #31 initialized
done.
PCI: 00:18.4 init finished in 48028 usecs
PCI: 00:18.5 init ...
NB: Function 5 Northbridge Control.. done.
PCI: 00:18.5 init finished in 4259 usecs
PCI: 00:19.0 init ...
PCI: 00:19.0 init finished in 1461 usecs
PCI: 00:19.1 init ...
PCI: 00:19.1 init finished in 1461 usecs
PCI: 00:19.2 init ...
PCI: 00:19.2 init finished in 1461 usecs
PCI: 00:19.3 init ...
NB: Function 3 Misc Control.. done.
PCI: 00:19.3 init finished in 3819 usecs
PCI: 00:19.4 init ...
NB: Function 4 Link Control.. done.
PCI: 00:19.4 init finished in 3818 usecs
PCI: 00:19.5 init ...
NB: Function 5 Northbridge Control.. done.
PCI: 00:19.5 init finished in 4260 usecs
PCI: 00:1a.0 init ...
PCI: 00:1a.0 init finished in 1460 usecs
PCI: 00:1a.1 init ...
PCI: 00:1a.1 init finished in 1461 usecs
PCI: 00:1a.2 init ...
PCI: 00:1a.2 init finished in 1462 usecs
PCI: 00:1a.3 init ...
NB: Function 3 Misc Control.. done.
PCI: 00:1a.3 init finished in 3818 usecs
PCI: 00:1a.4 init ...
NB: Function 4 Link Control.. done.
PCI: 00:1a.4 init finished in 3819 usecs
PCI: 00:1a.5 init ...
NB: Function 5 Northbridge Control.. done.
PCI: 00:1a.5 init finished in 4259 usecs
PCI: 00:1b.0 init ...
PCI: 00:1b.0 init finished in 1462 usecs
PCI: 00:1b.1 init ...
PCI: 00:1b.1 init finished in 1461 usecs
PCI: 00:1b.2 init ...
PCI: 00:1b.2 init finished in 1460 usecs
PCI: 00:1b.3 init ...
NB: Function 3 Misc Control.. done.
PCI: 00:1b.3 init finished in 3819 usecs
PCI: 00:1b.4 init ...
NB: Function 4 Link Control.. done.
PCI: 00:1b.4 init finished in 3818 usecs
PCI: 00:1b.5 init ...
NB: Function 5 Northbridge Control.. done.
PCI: 00:1b.5 init finished in 4259 usecs
PCI: 00:00.0 init ...
pcie_init in sr5650_ht.c
IOAPIC: Initializing IOAPIC at 0xfcc00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x01
IOAPIC: Dumping registers
reg 0x0000: 0x01000000
reg 0x0001: 0x001f8021
reg 0x0002: 0x00000000
IOAPIC: 32 interrupts
IOAPIC: Enabling interrupts on FSB
IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
IOAPIC: reg 0x00000018 value 0x00000000 0x00010000
IOAPIC: reg 0x00000019 value 0x00000000 0x00010000
IOAPIC: reg 0x0000001a value 0x00000000 0x00010000
IOAPIC: reg 0x0000001b value 0x00000000 0x00010000
IOAPIC: reg 0x0000001c value 0x00000000 0x00010000
IOAPIC: reg 0x0000001d value 0x00000000 0x00010000
IOAPIC: reg 0x0000001e value 0x00000000 0x00010000
IOAPIC: reg 0x0000001f value 0x00000000 0x00010000
PCI: 00:00.0 init finished in 125720 usecs
PCI: 00:11.0 init ...
rev_id=15
sata_bar0=4020
sata_bar1=4040
sata_bar2=4028
sata_bar3=4044
sata_bar4=4000
sata_bar5=fcb0d000
ide_bar0=4030
ide_bar1=4048
ide_bar2=4038
ide_bar3=404c
Maximum SATA port count supported by silicon: 4
SATA port 0 status = 23
drive detection done after 0 ms
Primary Master device is ready after 1 tries
SATA port 1 status = 23
drive detection done after 0 ms
Primary Slave device is ready after 1 tries
SATA port 2 status = 0
No Secondary Master SATA drive on Slot2
SATA port 3 status = 23
0x6=b0, 0x7=80
drive detection not yet completed, waiting...
0x6=10, 0x7=50
drive no longer selected after 30 ms, retrying init
drive detection done after 0 ms
Secondary Slave device is ready after 2 tries
PCI: 00:11.0 init finished in 75430 usecs
PCI: 00:12.0 init ...
PCI: 00:12.0 init finished in 1483 usecs
PCI: 00:12.1 init ...
PCI: 00:12.1 init finished in 1482 usecs
PCI: 00:12.2 init ...
usb2_bar0=0xfcb0e000
rpr 6.23, final dword=809e03c8
PCI: 00:12.2 init finished in 4896 usecs
PCI: 00:13.0 init ...
PCI: 00:13.0 init finished in 1483 usecs
PCI: 00:13.1 init ...
PCI: 00:13.1 init finished in 1482 usecs
PCI: 00:13.2 init ...
usb2_bar0=0xfcb0f000
rpr 6.23, final dword=809e03c8
PCI: 00:13.2 init finished in 4896 usecs
PCI: 00:14.0 init ...
sm_init().
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: Dumping registers
reg 0x0000: 0x00000000
reg 0x0001: 0x00178021
reg 0x0002: 0x00000000
IOAPIC: 24 interrupts
IOAPIC: Enabling interrupts on FSB
IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
set power "on" after power fail
++++++++++no set NMI+++++
RTC Init
sm_init() end
PCI: 00:14.0 init finished in 102877 usecs
PCI: 00:14.1 init ...
PCI: 00:14.1 init finished in 1463 usecs
PCI: 00:14.2 init ...
base = 0xfcb04000
No codec!
PCI: 00:14.2 init finished in 6296 usecs
PCI: 00:14.3 init ...
lpc_init
PCI: 00:14.3 init finished in 2127 usecs
PCI: 00:14.4 init ...
PCI: 00:14.4 init finished in 1479 usecs
PCI: 00:14.5 init ...
PCI: 00:14.5 init finished in 1483 usecs
PCI: 03:00.0 init ...
PCI: 03:00.0 init finished in 1461 usecs
PCI: 04:00.0 init ...
PCI: 04:00.0 init finished in 1460 usecs
smbus: PCI: 00:14.0[0]->I2C: 01:2f init ...
Set SMBUS controller to channel 1
Found 64 pin W83795G Nuvoton H/W Monitor
W83795G/ADG work in Thermal Cruise Mode
Fan CTFS(celsius) TTTI(celsius)
1 80 80
2 80 80
3 80 80
4 80 80
5 80 80
6 80 80
DTS1 current value: 32
DTS2 current value: 25
DTS3 current value: 0
DTS4 current value: 0
DTS5 current value: 0
DTS6 current value: 0
DTS7 current value: 0
DTS8 current value: 0
Set SMBUS controller to channel 0
I2C: 01:2f init finished in 283814 usecs
PNP: 002e.2 init ...
PNP: 002e.2 init finished in 1395 usecs
PNP: 002e.3 init ...
PNP: 002e.3 init finished in 1397 usecs
PNP: 002e.5 init ...
w83667hg_a_init: Disable mouse controller.PNP: 002e.5 init finished in 4073 usecs
PNP: 002e.a init ...
set power on after power fail
PNP: 002e.a init finished in 3368 usecs
PNP: 002e.b init ...
PNP: 002e.b init finished in 1397 usecs
PCI: 08:01.0 init ...
ASpeed AST2050: initializing video device
ast_detect_chip: AST 1100 detected
ast_detect_chip: VGA not enabled on entry, requesting chip POST
ast_detect_chip: Analog VGA only
ast_driver_load: dram 800000000 0 16 00800000
ASpeed VGA text mode initialized
PCI: 08:01.0 init finished in 31812 usecs
PCI: 08:02.0 init ...
PCI: 08:02.0 init finished in 1461 usecs
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:18.0: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:00.1: enabled 0
PCI: 00:00.2: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 0
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:09.0: enabled 1
PCI: 00:0a.0: enabled 1
PCI: 00:0b.0: enabled 1
PCI: 00:0c.0: enabled 1
PCI: 00:0d.0: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.1: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.1: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 01:50: enabled 1
I2C: 01:51: enabled 1
I2C: 01:52: enabled 1
I2C: 01:53: enabled 1
I2C: 01:54: enabled 1
I2C: 01:55: enabled 1
I2C: 01:56: enabled 1
I2C: 01:57: enabled 1
I2C: 01:2f: enabled 1
PCI: 00:14.1: enabled 1
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PNP: 002e.0: enabled 0
PNP: 002e.1: enabled 0
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.106: enabled 0
PNP: 002e.107: enabled 0
PNP: 002e.207: enabled 0
PNP: 002e.307: enabled 0
PNP: 002e.407: enabled 0
PNP: 002e.8: enabled 0
PNP: 002e.108: enabled 0
PNP: 002e.9: enabled 0
PNP: 002e.109: enabled 0
PNP: 002e.209: enabled 0
PNP: 002e.309: enabled 0
PNP: 002e.a: enabled 1
PNP: 002e.b: enabled 1
PNP: 002e.c: enabled 0
PNP: 002e.d: enabled 0
PNP: 002e.f: enabled 0
PNP: 004e.0: enabled 1
PNP: 0ca2.0: enabled 1
PCI: 00:14.4: enabled 1
PCI: 08:01.0: enabled 1
PCI: 08:02.0: enabled 1
PCI: 08:03.0: enabled 0
PCI: 00:14.5: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
PCI: 00:19.0: enabled 1
PCI: 00:19.1: enabled 1
PCI: 00:19.2: enabled 1
PCI: 00:19.3: enabled 1
PCI: 00:19.4: enabled 1
PCI: 00:19.5: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1a.1: enabled 1
PCI: 00:1a.2: enabled 1
PCI: 00:1a.3: enabled 1
PCI: 00:1a.4: enabled 1
PCI: 00:1a.5: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1b.1: enabled 1
PCI: 00:1b.2: enabled 1
PCI: 00:1b.3: enabled 1
PCI: 00:1b.4: enabled 1
PCI: 00:1b.5: enabled 1
APIC: 01: enabled 1
APIC: 02: enabled 1
APIC: 03: enabled 1
APIC: 04: enabled 1
APIC: 05: enabled 1
APIC: 06: enabled 1
APIC: 07: enabled 1
APIC: 08: enabled 1
APIC: 09: enabled 1
APIC: 0a: enabled 1
APIC: 0b: enabled 1
APIC: 0c: enabled 1
APIC: 0d: enabled 1
APIC: 0e: enabled 1
APIC: 0f: enabled 1
APIC: 20: enabled 1
APIC: 21: enabled 1
APIC: 22: enabled 1
APIC: 23: enabled 1
APIC: 24: enabled 1
APIC: 25: enabled 1
APIC: 26: enabled 1
APIC: 27: enabled 1
APIC: 28: enabled 1
APIC: 29: enabled 1
APIC: 2a: enabled 1
APIC: 2b: enabled 1
APIC: 2c: enabled 1
APIC: 2d: enabled 1
APIC: 2e: enabled 1
APIC: 2f: enabled 1
PCI: 03:00.0: enabled 1
PCI: 04:00.0: enabled 1
BS: BS_DEV_INIT times (us): entry 0 run 2939913 exit 0
Finalize devices...
Devices finalized
BS: BS_POST_DEVICE times (us): entry 0 run 2546 exit 0
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 1 exit 0
Writing IRQ routing tables to 0xf0000...done.
Writing IRQ routing tables to 0xbfcbe000...done.
PIRQ table: 48 bytes.
Wrote the mp table end at: 000f0410 - 000f08ac
Wrote the mp table end at: bfcbd010 - bfcbd4ac
MP table: 1196 bytes.
CBFS: 'Master Header Locator' located CBFS at [200:1fffc0)
CBFS: Locating 'fallback/dsdt.aml'
CBFS: Found @ offset 2b700 size 271a
CBFS: 'Master Header Locator' located CBFS at [200:1fffc0)
CBFS: Locating 'fallback/slic'
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at bfc99000.
ACPI: * FACS
ACPI: * DSDT
ACPI: * FADT
pm_base: 0x0800
ACPI: added table 1/32, length now 40
ACPI: * SSDT
processor_brand=AMD Opteron(tm) Processor 6278
Pstates algorithm ...
Pstate_freq[0] = 2400MHz Pstate_power[0] = 6150mw
Pstate_latency[0] = 5us
Pstate_freq[1] = 2100MHz Pstate_power[1] = 5233mw
Pstate_latency[1] = 5us
Pstate_freq[2] = 1900MHz Pstate_power[2] = 4620mw
Pstate_latency[2] = 5us
Pstate_freq[3] = 1600MHz Pstate_power[3] = 3990mw
Pstate_latency[3] = 5us
Pstate_freq[4] = 1400MHz Pstate_power[4] = 3422mw
Pstate_latency[4] = 5us
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
PSS: 2400MHz power 6150 control 0x0 status 0x0
PSS: 2100MHz power 5233 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3990 control 0x3 status 0x3
PSS: 1400MHz power 3422 control 0x4 status 0x4
ACPI: added table 2/32, length now 44
ACPI: * MCFG
ACPI: added table 3/32, length now 48
ACPI: * TCPA
TCPA log created at bfc89000
ACPI: added table 4/32, length now 52
ACPI: * MADT
ACPI: added table 5/32, length now 56
current = bfc9e8e0
ACPI: * SRAT at bfc9e8e0
SRAT: lapic cpu_index=00, node_id=00, apic_id=00
SRAT: lapic cpu_index=01, node_id=00, apic_id=01
SRAT: lapic cpu_index=02, node_id=00, apic_id=02
SRAT: lapic cpu_index=03, node_id=00, apic_id=03
SRAT: lapic cpu_index=04, node_id=00, apic_id=04
SRAT: lapic cpu_index=05, node_id=00, apic_id=05
SRAT: lapic cpu_index=06, node_id=00, apic_id=06
SRAT: lapic cpu_index=07, node_id=00, apic_id=07
SRAT: lapic cpu_index=08, node_id=01, apic_id=08
SRAT: lapic cpu_index=09, node_id=01, apic_id=09
SRAT: lapic cpu_index=0a, node_id=01, apic_id=0a
SRAT: lapic cpu_index=0b, node_id=01, apic_id=0b
SRAT: lapic cpu_index=0c, node_id=01, apic_id=0c
SRAT: lapic cpu_index=0d, node_id=01, apic_id=0d
SRAT: lapic cpu_index=0e, node_id=01, apic_id=0e
SRAT: lapic cpu_index=0f, node_id=01, apic_id=0f
SRAT: lapic cpu_index=10, node_id=02, apic_id=20
SRAT: lapic cpu_index=11, node_id=02, apic_id=21
SRAT: lapic cpu_index=12, node_id=02, apic_id=22
SRAT: lapic cpu_index=13, node_id=02, apic_id=23
SRAT: lapic cpu_index=14, node_id=02, apic_id=24
SRAT: lapic cpu_index=15, node_id=02, apic_id=25
SRAT: lapic cpu_index=16, node_id=02, apic_id=26
SRAT: lapic cpu_index=17, node_id=02, apic_id=27
SRAT: lapic cpu_index=18, node_id=03, apic_id=28
SRAT: lapic cpu_index=19, node_id=03, apic_id=29
SRAT: lapic cpu_index=1a, node_id=03, apic_id=2a
SRAT: lapic cpu_index=1b, node_id=03, apic_id=2b
SRAT: lapic cpu_index=1c, node_id=03, apic_id=2c
SRAT: lapic cpu_index=1d, node_id=03, apic_id=2d
SRAT: lapic cpu_index=1e, node_id=03, apic_id=2e
SRAT: lapic cpu_index=1f, node_id=03, apic_id=2f
set_srat_mem: dev DOMAIN: 0000, res->index=0007 startk=00000000, sizek=00300000
set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280
set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=002ffd00
set_srat_mem: dev DOMAIN: 0000, res->index=0030 startk=00400000, sizek=00d00000
set_srat_mem: dev DOMAIN: 0000, res->index=0041 startk=01100000, sizek=01000000
set_srat_mem: dev DOMAIN: 0000, res->index=0052 startk=02100000, sizek=01000000
set_srat_mem: dev DOMAIN: 0000, res->index=0063 startk=03100000, sizek=01000000
ACPI: added table 6/32, length now 60
ACPI: * SLIT at bfc9ec00
ACPI: added table 7/32, length now 64
ACPI: * IVRS at bfc9ec40
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0xe0
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0xe0
Capability: type 0x01 @ 0x40
Capability: type 0x01 @ 0x44
ACPI: added table 8/32, length now 68
ACPI: * HPET
ACPI: added table 9/32, length now 72
ACPI: * SRAT at bfc9ed30
SRAT: lapic cpu_index=00, node_id=00, apic_id=00
SRAT: lapic cpu_index=01, node_id=00, apic_id=01
SRAT: lapic cpu_index=02, node_id=00, apic_id=02
SRAT: lapic cpu_index=03, node_id=00, apic_id=03
SRAT: lapic cpu_index=04, node_id=00, apic_id=04
SRAT: lapic cpu_index=05, node_id=00, apic_id=05
SRAT: lapic cpu_index=06, node_id=00, apic_id=06
SRAT: lapic cpu_index=07, node_id=00, apic_id=07
SRAT: lapic cpu_index=08, node_id=01, apic_id=08
SRAT: lapic cpu_index=09, node_id=01, apic_id=09
SRAT: lapic cpu_index=0a, node_id=01, apic_id=0a
SRAT: lapic cpu_index=0b, node_id=01, apic_id=0b
SRAT: lapic cpu_index=0c, node_id=01, apic_id=0c
SRAT: lapic cpu_index=0d, node_id=01, apic_id=0d
SRAT: lapic cpu_index=0e, node_id=01, apic_id=0e
SRAT: lapic cpu_index=0f, node_id=01, apic_id=0f
SRAT: lapic cpu_index=10, node_id=02, apic_id=20
SRAT: lapic cpu_index=11, node_id=02, apic_id=21
SRAT: lapic cpu_index=12, node_id=02, apic_id=22
SRAT: lapic cpu_index=13, node_id=02, apic_id=23
SRAT: lapic cpu_index=14, node_id=02, apic_id=24
SRAT: lapic cpu_index=15, node_id=02, apic_id=25
SRAT: lapic cpu_index=16, node_id=02, apic_id=26
SRAT: lapic cpu_index=17, node_id=02, apic_id=27
SRAT: lapic cpu_index=18, node_id=03, apic_id=28
SRAT: lapic cpu_index=19, node_id=03, apic_id=29
SRAT: lapic cpu_index=1a, node_id=03, apic_id=2a
SRAT: lapic cpu_index=1b, node_id=03, apic_id=2b
SRAT: lapic cpu_index=1c, node_id=03, apic_id=2c
SRAT: lapic cpu_index=1d, node_id=03, apic_id=2d
SRAT: lapic cpu_index=1e, node_id=03, apic_id=2e
SRAT: lapic cpu_index=1f, node_id=03, apic_id=2f
set_srat_mem: dev DOMAIN: 0000, res->index=0007 startk=00000000, sizek=00300000
set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280
set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=002ffd00
set_srat_mem: dev DOMAIN: 0000, res->index=0030 startk=00400000, sizek=00d00000
set_srat_mem: dev DOMAIN: 0000, res->index=0041 startk=01100000, sizek=01000000
set_srat_mem: dev DOMAIN: 0000, res->index=0052 startk=02100000, sizek=01000000
set_srat_mem: dev DOMAIN: 0000, res->index=0063 startk=03100000, sizek=01000000
ACPI: added table 10/32, length now 76
ACPI: * SLIT at bfc9f050
ACPI: added table 11/32, length now 80
ACPI: * SRAT at bfc9f090
SRAT: lapic cpu_index=00, node_id=00, apic_id=00
SRAT: lapic cpu_index=01, node_id=00, apic_id=01
SRAT: lapic cpu_index=02, node_id=00, apic_id=02
SRAT: lapic cpu_index=03, node_id=00, apic_id=03
SRAT: lapic cpu_index=04, node_id=00, apic_id=04
SRAT: lapic cpu_index=05, node_id=00, apic_id=05
SRAT: lapic cpu_index=06, node_id=00, apic_id=06
SRAT: lapic cpu_index=07, node_id=00, apic_id=07
SRAT: lapic cpu_index=08, node_id=01, apic_id=08
SRAT: lapic cpu_index=09, node_id=01, apic_id=09
SRAT: lapic cpu_index=0a, node_id=01, apic_id=0a
SRAT: lapic cpu_index=0b, node_id=01, apic_id=0b
SRAT: lapic cpu_index=0c, node_id=01, apic_id=0c
SRAT: lapic cpu_index=0d, node_id=01, apic_id=0d
SRAT: lapic cpu_index=0e, node_id=01, apic_id=0e
SRAT: lapic cpu_index=0f, node_id=01, apic_id=0f
SRAT: lapic cpu_index=10, node_id=02, apic_id=20
SRAT: lapic cpu_index=11, node_id=02, apic_id=21
SRAT: lapic cpu_index=12, node_id=02, apic_id=22
SRAT: lapic cpu_index=13, node_id=02, apic_id=23
SRAT: lapic cpu_index=14, node_id=02, apic_id=24
SRAT: lapic cpu_index=15, node_id=02, apic_id=25
SRAT: lapic cpu_index=16, node_id=02, apic_id=26
SRAT: lapic cpu_index=17, node_id=02, apic_id=27
SRAT: lapic cpu_index=18, node_id=03, apic_id=28
SRAT: lapic cpu_index=19, node_id=03, apic_id=29
SRAT: lapic cpu_index=1a, node_id=03, apic_id=2a
SRAT: lapic cpu_index=1b, node_id=03, apic_id=2b
SRAT: lapic cpu_index=1c, node_id=03, apic_id=2c
SRAT: lapic cpu_index=1d, node_id=03, apic_id=2d
SRAT: lapic cpu_index=1e, node_id=03, apic_id=2e
SRAT: lapic cpu_index=1f, node_id=03, apic_id=2f
set_srat_mem: dev DOMAIN: 0000, res->index=0007 startk=00000000, sizek=00300000
set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280
set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=002ffd00
set_srat_mem: dev DOMAIN: 0000, res->index=0030 startk=00400000, sizek=00d00000
set_srat_mem: dev DOMAIN: 0000, res->index=0041 startk=01100000, sizek=01000000
set_srat_mem: dev DOMAIN: 0000, res->index=0052 startk=02100000, sizek=01000000
set_srat_mem: dev DOMAIN: 0000, res->index=0063 startk=03100000, sizek=01000000
ACPI: added table 12/32, length now 84
ACPI: * SLIT at bfc9f3b0
ACPI: added table 13/32, length now 88
ACPI: * SRAT at bfc9f3f0
SRAT: lapic cpu_index=00, node_id=00, apic_id=00
SRAT: lapic cpu_index=01, node_id=00, apic_id=01
SRAT: lapic cpu_index=02, node_id=00, apic_id=02
SRAT: lapic cpu_index=03, node_id=00, apic_id=03
SRAT: lapic cpu_index=04, node_id=00, apic_id=04
SRAT: lapic cpu_index=05, node_id=00, apic_id=05
SRAT: lapic cpu_index=06, node_id=00, apic_id=06
SRAT: lapic cpu_index=07, node_id=00, apic_id=07
SRAT: lapic cpu_index=08, node_id=01, apic_id=08
SRAT: lapic cpu_index=09, node_id=01, apic_id=09
SRAT: lapic cpu_index=0a, node_id=01, apic_id=0a
SRAT: lapic cpu_index=0b, node_id=01, apic_id=0b
SRAT: lapic cpu_index=0c, node_id=01, apic_id=0c
SRAT: lapic cpu_index=0d, node_id=01, apic_id=0d
SRAT: lapic cpu_index=0e, node_id=01, apic_id=0e
SRAT: lapic cpu_index=0f, node_id=01, apic_id=0f
SRAT: lapic cpu_index=10, node_id=02, apic_id=20
SRAT: lapic cpu_index=11, node_id=02, apic_id=21
SRAT: lapic cpu_index=12, node_id=02, apic_id=22
SRAT: lapic cpu_index=13, node_id=02, apic_id=23
SRAT: lapic cpu_index=14, node_id=02, apic_id=24
SRAT: lapic cpu_index=15, node_id=02, apic_id=25
SRAT: lapic cpu_index=16, node_id=02, apic_id=26
SRAT: lapic cpu_index=17, node_id=02, apic_id=27
SRAT: lapic cpu_index=18, node_id=03, apic_id=28
SRAT: lapic cpu_index=19, node_id=03, apic_id=29
SRAT: lapic cpu_index=1a, node_id=03, apic_id=2a
SRAT: lapic cpu_index=1b, node_id=03, apic_id=2b
SRAT: lapic cpu_index=1c, node_id=03, apic_id=2c
SRAT: lapic cpu_index=1d, node_id=03, apic_id=2d
SRAT: lapic cpu_index=1e, node_id=03, apic_id=2e
SRAT: lapic cpu_index=1f, node_id=03, apic_id=2f
set_srat_mem: dev DOMAIN: 0000, res->index=0007 startk=00000000, sizek=00300000
set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280
set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=002ffd00
set_srat_mem: dev DOMAIN: 0000, res->index=0030 startk=00400000, sizek=00d00000
set_srat_mem: dev DOMAIN: 0000, res->index=0041 startk=01100000, sizek=01000000
set_srat_mem: dev DOMAIN: 0000, res->index=0052 startk=02100000, sizek=01000000
set_srat_mem: dev DOMAIN: 0000, res->index=0063 startk=03100000, sizek=01000000
ACPI: added table 14/32, length now 92
ACPI: * SLIT at bfc9f710
ACPI: added table 15/32, length now 96
ACPI: done.
ACPI tables: 26448 bytes.
smbios_write_tables: bfc88000
Root Device (ASUS KGPE-D16)
CPU_CLUSTER: 0 (AMD Family 10h/15h Root Complex)
APIC: 00 (unknown)
DOMAIN: 0000 (AMD Family 10h/15h Root Complex)
PCI: 00:18.0 (AMD Family 10h/15h Northbridge)
PCI: 00:00.0 (ATI SR5650)
PCI: 00:00.1 (ATI SR5650)
PCI: 00:00.2 (ATI SR5650)
PCI: 00:02.0 (ATI SR5650)
PCI: 00:03.0 (ATI SR5650)
PCI: 00:04.0 (ATI SR5650)
PCI: 00:05.0 (ATI SR5650)
PCI: 00:06.0 (ATI SR5650)
PCI: 00:07.0 (ATI SR5650)
PCI: 00:08.0 (ATI SR5650)
PCI: 00:09.0 (ATI SR5650)
PCI: 00:0a.0 (ATI SR5650)
PCI: 00:0b.0 (ATI SR5650)
PCI: 00:0c.0 (ATI SR5650)
PCI: 00:0d.0 (ATI SR5650)
PCI: 00:11.0 (ATI SP5100)
PCI: 00:12.0 (ATI SP5100)
PCI: 00:12.1 (ATI SP5100)
PCI: 00:12.2 (ATI SP5100)
PCI: 00:13.0 (ATI SP5100)
PCI: 00:13.1 (ATI SP5100)
PCI: 00:13.2 (ATI SP5100)
PCI: 00:14.0 (ATI SP5100)
I2C: 01:50 (unknown)
I2C: 01:51 (unknown)
I2C: 01:52 (unknown)
I2C: 01:53 (unknown)
I2C: 01:54 (unknown)
I2C: 01:55 (unknown)
I2C: 01:56 (unknown)
I2C: 01:57 (unknown)
I2C: 01:2f (Nuvoton W83795G/ADG Hardware Monitor)
PCI: 00:14.1 (ATI SP5100)
PCI: 00:14.2 (ATI SP5100)
PCI: 00:14.3 (ATI SP5100)
PNP: 002e.0 (WINBOND W83667HG-A Super I/O)
PNP: 002e.1 (WINBOND W83667HG-A Super I/O)
PNP: 002e.2 (WINBOND W83667HG-A Super I/O)
PNP: 002e.3 (WINBOND W83667HG-A Super I/O)
PNP: 002e.5 (WINBOND W83667HG-A Super I/O)
PNP: 002e.106 (WINBOND W83667HG-A Super I/O)
PNP: 002e.107 (WINBOND W83667HG-A Super I/O)
PNP: 002e.207 (WINBOND W83667HG-A Super I/O)
PNP: 002e.307 (WINBOND W83667HG-A Super I/O)
PNP: 002e.407 (WINBOND W83667HG-A Super I/O)
PNP: 002e.8 (WINBOND W83667HG-A Super I/O)
PNP: 002e.108 (WINBOND W83667HG-A Super I/O)
PNP: 002e.9 (WINBOND W83667HG-A Super I/O)
PNP: 002e.109 (WINBOND W83667HG-A Super I/O)
PNP: 002e.209 (WINBOND W83667HG-A Super I/O)
PNP: 002e.309 (WINBOND W83667HG-A Super I/O)
PNP: 002e.a (WINBOND W83667HG-A Super I/O)
PNP: 002e.b (WINBOND W83667HG-A Super I/O)
PNP: 002e.c (WINBOND W83667HG-A Super I/O)
PNP: 002e.d (WINBOND W83667HG-A Super I/O)
PNP: 002e.f (WINBOND W83667HG-A Super I/O)
PNP: 004e.0 (unknown)
PNP: 0ca2.0 (unknown)
PCI: 00:14.4 (ATI SP5100)
PCI: 08:01.0 (ATI SP5100)
PCI: 08:02.0 (ATI SP5100)
PCI: 08:03.0 (ATI SP5100)
PCI: 00:14.5 (ATI SP5100)
PCI: 00:18.1 (AMD Family 10h/15h Northbridge)
PCI: 00:18.2 (AMD Family 10h/15h Northbridge)
PCI: 00:18.3 (AMD Family 10h/15h Northbridge)
PCI: 00:18.4 (AMD Family 10h/15h Northbridge)
PCI: 00:18.5 (AMD Family 10h/15h Northbridge)
PCI: 00:19.0 (AMD Family 10h/15h Northbridge)
PCI: 00:19.1 (AMD Family 10h/15h Northbridge)
PCI: 00:19.2 (AMD Family 10h/15h Northbridge)
PCI: 00:19.3 (AMD Family 10h/15h Northbridge)
PCI: 00:19.4 (AMD Family 10h/15h Northbridge)
PCI: 00:19.5 (AMD Family 10h/15h Northbridge)
PCI: 00:1a.0 (AMD Family 10h/15h Northbridge)
PCI: 00:1a.1 (AMD Family 10h/15h Northbridge)
PCI: 00:1a.2 (AMD Family 10h/15h Northbridge)
PCI: 00:1a.3 (AMD Family 10h/15h Northbridge)
PCI: 00:1a.4 (AMD Family 10h/15h Northbridge)
PCI: 00:1a.5 (AMD Family 10h/15h Northbridge)
PCI: 00:1b.0 (AMD Family 10h/15h Northbridge)
PCI: 00:1b.1 (AMD Family 10h/15h Northbridge)
PCI: 00:1b.2 (AMD Family 10h/15h Northbridge)
PCI: 00:1b.3 (AMD Family 10h/15h Northbridge)
PCI: 00:1b.4 (AMD Family 10h/15h Northbridge)
PCI: 00:1b.5 (AMD Family 10h/15h Northbridge)
APIC: 01 (unknown)
APIC: 02 (unknown)
APIC: 03 (unknown)
APIC: 04 (unknown)
APIC: 05 (unknown)
APIC: 06 (unknown)
APIC: 07 (unknown)
APIC: 08 (unknown)
APIC: 09 (unknown)
APIC: 0a (unknown)
APIC: 0b (unknown)
APIC: 0c (unknown)
APIC: 0d (unknown)
APIC: 0e (unknown)
APIC: 0f (unknown)
APIC: 20 (unknown)
APIC: 21 (unknown)
APIC: 22 (unknown)
APIC: 23 (unknown)
APIC: 24 (unknown)
APIC: 25 (unknown)
APIC: 26 (unknown)
APIC: 27 (unknown)
APIC: 28 (unknown)
APIC: 29 (unknown)
APIC: 2a (unknown)
APIC: 2b (unknown)
APIC: 2c (unknown)
APIC: 2d (unknown)
APIC: 2e (unknown)
APIC: 2f (unknown)
PCI: 03:00.0 (unknown)
PCI: 04:00.0 (unknown)
SMBIOS tables: 735 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum 5012
Writing coreboot table at 0xbfcbf000
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1. 0000000000001000-000000000009ffff: RAM
2. 00000000000a0000-00000000000bffff: RESERVED
3. 00000000000c0000-00000000bfc87fff: RAM
4. 00000000bfc88000-00000000bfffffff: CONFIGURATION TABLES
5. 00000000c0000000-00000000cfffffff: RESERVED
6. 00000000fcb00000-00000000fcb03fff: RESERVED
7. 00000000feb00000-00000000feb00fff: RESERVED
8. 00000000fec00000-00000000fec00fff: RESERVED
9. 00000000fed00000-00000000fed00fff: RESERVED
10. 0000000100000000-000000103fffffff: RAM
Manufacturer: ef
SF: Detected W25Q16 with sector size 0x1000, total 0x200000
CBFS: 'Master Header Locator' located CBFS at [200:1fffc0)
FMAP: Found "FLASH" version 1.1 at 0.
FMAP: base = ffe00000 size = 200000 #areas = 3
Wrote coreboot table at: bfcbf000, 0x360 bytes, checksum 95d4
coreboot table: 888 bytes.
IMD ROOT 0. bffff000 00001000
IMD SMALL 1. bfffe000 00001000
CAR GLOBALS 2. bfff3000 0000a6c0
CONSOLE 3. bffd3000 00020000
TIME STAMP 4. bffd2000 00000400
AMDMEM INFO 5. bffc8000 000093fc
ACPI RESUME 6. bfcc7000 00301000
COREBOOT 7. bfcbf000 00008000
IRQ TABLE 8. bfcbe000 00001000
SMP TABLE 9. bfcbd000 00001000
ACPI 10. bfc99000 00024000
TCPA LOG 11. bfc89000 00010000
SMBIOS 12. bfc88000 00000800
IMD small region:
IMD ROOT 0. bfffec00 00000400
ROMSTAGE 1. bfffebe0 00000004
GDT 2. bfffe9e0 00000200
COREBOOTFWD 3. bfffe9a0 00000028
Writing AMD DCT configuration to Flash
CBFS: 'Master Header Locator' located CBFS at [200:1fffc0)
CBFS: Locating 's3nv'
CBFS: Found @ offset 2fdc0 size 10000
Manufacturer: ef
SF: Detected W25Q16 with sector size 0x1000, total 0x200000
SF: Successfully erased 32768 bytes @ 0x38000
BS: BS_WRITE_TABLES times (us): entry 0 run 2083847 exit 0
CBFS: 'Master Header Locator' located CBFS at [200:1fffc0)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 55400 size 10a46
Loading segment from ROM address 0xffe55638
code (compression=1)
New segment dstaddr 0xe0520 memsize 0x1fae0 srcaddr 0xffe55670 filesize 0x10a0e
Loading segment from ROM address 0xffe55654
Entry Point 0x000fd234
Bounce Buffer at bfa59000, 2286624 bytes
Loading Segment: addr: 0x00000000000e0520 memsz: 0x000000000001fae0 filesz: 0x0000000000010a0e
lb: [0x0000000000100000, 0x0000000000217210)
Post relocation: addr: 0x00000000000e0520 memsz: 0x000000000001fae0 filesz: 0x0000000000010a0e
using LZMA
[ 0x000e0520, 00100000, 0x00100000) <- ffe55670
dest 000e0520, end 00100000, bouncebuffer bfa59000
Loaded segments
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 76992 exit 0
Jumping to boot code at 000fd234(bfcbf000)
CPU0: stack: 00151000 - 00152000, lowest used address 001519d0, stack used: 1584 bytes
entry = 0x000fd234
lb_start = 0x00100000
lb_size = 0x00117210
buffer = 0xbfa59000
SeaBIOS (version rel-1.11.1-0-g0551a4b)
BUILD: gcc: (coreboot toolchain v1.50 October 15th, 2017) 6.3.0 binutils: (GNU Binutils) 2.29.1
Found coreboot cbmem console @ bffd3000
Found mainboard ASUS KGPE-D16
Relocating init from 0x000e1b60 to 0xbfc3b320 (size 52288)
Found CBFS header at 0xffe00238
multiboot: eax=0, ebx=0
Found 50 PCI devices (max PCI bus is 08)
Copying SMBIOS entry point from 0xbfc88000 to 0x000f61e0
Copying ACPI RSDP from 0xbfc99000 to 0x000f61b0
Skipping MPTABLE copy due to large size (1196 bytes)
Copying PIR from 0xbfcbe000 to 0x000f6180
Using pmtimer, ioport 0x820
Scan for VGA option rom
Turning on vga text mode console
SeaBIOS (version rel-1.11.1-0-g0551a4b)
EHCI init on dev 00:12.2 (regs=0xfcb0e020)
EHCI init on dev 00:13.2 (regs=0xfcb0f020)
OHCI init on dev 00:12.0 (regs=0xfcb08000)
OHCI init on dev 00:12.1 (regs=0xfcb09000)
OHCI init on dev 00:13.0 (regs=0xfcb0a000)
OHCI init on dev 00:13.1 (regs=0xfcb0b000)
OHCI init on dev 00:14.5 (regs=0xfcb0c000)
ATA controller 1 at 4020/4040/0 (irq 0 dev 88)
ATA controller 2 at 4028/4044/0 (irq 0 dev 88)
ATA controller 3 at 1f0/3f4/0 (irq 14 dev a1)
ATA controller 4 at 170/374/0 (irq 15 dev a1)
Got ps2 nak (status=51)
Found 0 lpt ports
Found 2 serial ports
ata0-0: Samsung SSD 850 PRO 512GB ATA-9 Hard-Disk (476 GiBytes)
Searching bootorder for: /pci@i0cf8/*@11/drive@0/disk@0
ata1-0: Samsung SSD 850 PRO 512GB ATA-9 Hard-Disk (476 GiBytes)
Searching bootorder for: /pci@i0cf8/*@11/drive@1/disk@0
ata1-1: Hitachi HTS722016K9A300 ATA-8 Hard-Disk (149 GiBytes)
Searching bootorder for: /pci@i0cf8/*@11/drive@1/disk@1
USB keyboard initialized
All threads complete.
Scan for option roms
Press ESC for boot menu.
Searching bootorder for: HALT
drive 0x000f60d0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=1000215216
drive 0x000f60a0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=1000215216
drive 0x000f6070: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=312581808
Space available for UMB: c0000-ed800, f5a00-f6070
Returned 253952 bytes of ZoneHigh
e820 map has 10 items:
0: 0000000000000000 - 000000000009fc00 = 1 RAM
1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
3: 0000000000100000 - 00000000bfc86000 = 1 RAM
4: 00000000bfc86000 - 00000000d0000000 = 2 RESERVED
5: 00000000fcb00000 - 00000000fcb04000 = 2 RESERVED
6: 00000000feb00000 - 00000000feb01000 = 2 RESERVED
7: 00000000fec00000 - 00000000fec01000 = 2 RESERVED
8: 00000000fed00000 - 00000000fed01000 = 2 RESERVED
9: 0000000100000000 - 0000001040000000 = 1 RAM
enter handle_19:
NULL
Booting from Hard Disk...
Booting from 0000:7c00