| |
| *** Pre-CBMEM romstage console overflowed, log truncated! *** |
| 690 |
| REFI [4698] = 5aae1450 |
| SRFTP [46a4] = 41f97200 |
| Done dimm mapping |
| Update PCI-E configuration space: |
| PCI(0, 0, 0)[a0] = 0 |
| PCI(0, 0, 0)[a4] = 2 |
| PCI(0, 0, 0)[bc] = 82a00000 |
| PCI(0, 0, 0)[a8] = 7d600000 |
| PCI(0, 0, 0)[ac] = 2 |
| PCI(0, 0, 0)[b8] = 80000000 |
| PCI(0, 0, 0)[b0] = 80a00000 |
| PCI(0, 0, 0)[b4] = 80800000 |
| Done memory map |
| RCOMP...done |
| COMP2 done |
| COMP1 done |
| FORCE RCOMP and wait 20us...done |
| Done io registers |
| CPE |
| CP5b |
| CP5c |
| OTHP [400c] = 690 |
| t123: 1912, 6000, 7620 |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : YES |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Initializing |
| ME: Current Operation State : Bring up |
| ME: Current Operation Mode : Debug or Disabled by AltDisableBit |
| ME: Error Code : No Error |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Pseudo-global reset |
| ME: Progress Phase State : Check to see if straps say ME DISABLED |
| ME: Wrong mode : 2 |
| ME: FWS2: 0x160a0140 |
| ME: Bist in progress: 0x0 |
| ME: ICC Status : 0x0 |
| ME: Invoke MEBx : 0x0 |
| ME: CPU replaced : 0x0 |
| ME: MBP ready : 0x0 |
| ME: MFS failure : 0x1 |
| ME: Warm reset req : 0x0 |
| ME: CPU repl valid : 0x1 |
| ME: (Reserved) : 0x0 |
| ME: FW update req : 0x0 |
| ME: (Reserved) : 0x0 |
| ME: Current state : 0xa |
| ME: Current PM event: 0x6 |
| ME: Progress code : 0x1 |
| PASSED! Tell ME that DRAM is ready |
| ME: ME is reporting as disabled, so not waiting for a response. |
| ME: FWS2: 0x160a0140 |
| ME: Bist in progress: 0x0 |
| ME: ICC Status : 0x0 |
| ME: Invoke MEBx : 0x0 |
| ME: CPU replaced : 0x0 |
| ME: MBP ready : 0x0 |
| ME: MFS failure : 0x1 |
| ME: Warm reset req : 0x0 |
| ME: CPU repl valid : 0x1 |
| ME: (Reserved) : 0x0 |
| ME: FW update req : 0x0 |
| ME: (Reserved) : 0x0 |
| ME: Current state : 0xa |
| ME: Current PM event: 0x6 |
| ME: Progress code : 0x1 |
| ME: Requested BIOS Action: No DID Ack received |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : YES |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Initializing |
| ME: Current Operation State : Bring up |
| ME: Current Operation Mode : Debug or Disabled by AltDisableBit |
| ME: Error Code : No Error |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Pseudo-global reset |
| ME: Progress Phase State : Check to see if straps say ME DISABLED |
| memcfg DDR3 ref clock 133 MHz |
| memcfg DDR3 clock 1330 MHz |
| memcfg channel assignment: A: 0, B 1, C 2 |
| memcfg channel[0] config (00620020): |
| ECC inactive |
| enhanced interleave mode on |
| rank interleave on |
| DIMMA 8192 MB width x8 dual rank, selected |
| DIMMB 0 MB width x8 single rank |
| memcfg channel[1] config (00000000): |
| ECC inactive |
| enhanced interleave mode off |
| rank interleave off |
| DIMMA 0 MB width x8 single rank, selected |
| DIMMB 0 MB width x8 single rank |
| CBMEM: |
| IMD: root @ 7ffff000 254 entries. |
| IMD: root @ 7fffec00 62 entries. |
| CBMEM entry for DIMM info: 0x7fffe960 |
| POST: 0x3b |
| POST: 0x3c |
| POST: 0x3d |
| TPM initialization. |
| TPM: Init |
| Found TPM ST33ZP24 by ST Microelectronics |
| TPM: Open |
| TPM: Startup |
| TPM: command 0x99 returned 0x0 |
| TPM: OK. |
| POST: 0x3f |
| MTRR Range: Start=ff000000 End=0 (Size 1000000) |
| MTRR Range: Start=0 End=1000000 (Size 1000000) |
| MTRR Range: Start=7f800000 End=80000000 (Size 800000) |
| MTRR Range: Start=80000000 End=80800000 (Size 800000) |
| CBFS: 'Master Header Locator' located CBFS at [800100:bfffc0) |
| CBFS: Locating 'fallback/ramstage' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 14fec |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 15100 |
| CBFS: File @ offset 15100 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 15100 |
| CBFS: Checking offset 1a980 |
| CBFS: File @ offset 1a980 size 333 |
| CBFS: Unmatched 'config' at 1a980 |
| CBFS: Checking offset 1ad00 |
| CBFS: File @ offset 1ad00 size 240 |
| CBFS: Unmatched 'revision' at 1ad00 |
| CBFS: Checking offset 1af80 |
| CBFS: File @ offset 1af80 size 900 |
| CBFS: Unmatched 'spd.bin' at 1af80 |
| CBFS: Checking offset 1b8c0 |
| CBFS: File @ offset 1b8c0 size 32a1 |
| CBFS: Unmatched 'fallback/dsdt.aml' at 1b8c0 |
| CBFS: Checking offset 1ebc0 |
| CBFS: File @ offset 1ebc0 size 1213 |
| CBFS: Unmatched 'grub.cfg' at 1ebc0 |
| CBFS: Checking offset 1fe40 |
| CBFS: File @ offset 1fe40 size 58 |
| CBFS: Unmatched '' at 1fe40 |
| CBFS: Checking offset 1fec0 |
| CBFS: File @ offset 1fec0 size 10000 |
| CBFS: Unmatched 'mrc.cache' at 1fec0 |
| CBFS: Checking offset 2ff00 |
| CBFS: File @ offset 2ff00 size 16e77 |
| CBFS: Found @ offset 2ff00 size 16e77 |
| Decompressing stage fallback/ramstage @ 0x7ff93fc0 (276912 bytes) |
| Loading module at 7ff94000 with entry 7ff94000. filesize: 0x31990 memsize: 0x43970 |
| Processing 3144 relocs. Offset value of 0x7fe94000 |
| |
| |
| coreboot-4.6-1718-g22579596ff Mon Oct 9 07:10:54 UTC 2017 ramstage starting... |
| POST: 0x39 |
| POST: 0x80 |
| Normal boot. |
| POST: 0x70 |
| BS: BS_PRE_DEVICE times (us): entry 0 run 3 exit 0 |
| POST: 0x71 |
| BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 3 exit 0 |
| POST: 0x72 |
| Enumerating buses... |
| Show all devs... Before device enumeration. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| PCI: 00:16.0: enabled 0 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 0 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 0 |
| PCI: 00:1c.3: enabled 1 |
| PCI: 00:1c.4: enabled 0 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 0c31.0: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| I2C: 00:54: enabled 1 |
| I2C: 00:55: enabled 1 |
| I2C: 00:56: enabled 1 |
| I2C: 00:57: enabled 1 |
| I2C: 00:5c: enabled 1 |
| I2C: 00:5d: enabled 1 |
| I2C: 00:5e: enabled 1 |
| I2C: 00:5f: enabled 1 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| Compare with tree... |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| PCI: 00:16.0: enabled 0 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 0 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 0 |
| PCI: 00:1c.3: enabled 1 |
| PCI: 00:1c.4: enabled 0 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 0c31.0: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| I2C: 00:54: enabled 1 |
| I2C: 00:55: enabled 1 |
| I2C: 00:56: enabled 1 |
| I2C: 00:57: enabled 1 |
| I2C: 00:5c: enabled 1 |
| I2C: 00:5d: enabled 1 |
| I2C: 00:5e: enabled 1 |
| I2C: 00:5f: enabled 1 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| Root Device scanning... |
| root_dev_scan_bus for Root Device |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| DOMAIN: 0000 scanning... |
| PCI: pci_scan_bus for bus 00 |
| POST: 0x24 |
| PCI: 00:00.0 [8086/0154] ops |
| PCI: 00:00.0 [8086/0154] enabled |
| Capability: type 0x0d @ 0x88 |
| Capability: type 0x01 @ 0x80 |
| Capability: type 0x05 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| Capability: type 0x0d @ 0x88 |
| Capability: type 0x01 @ 0x80 |
| Capability: type 0x05 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| PCI: 00:01.0 subordinate bus PCI Express |
| PCI: 00:01.0 [8086/0151] disabled |
| PCI: 00:02.0 [8086/0000] ops |
| PCI: 00:02.0 [8086/0166] enabled |
| memalign Enter, boundary 8, size 152, free_mem_ptr 7ffd3970 |
| memalign 7ffd3970 |
| PCI: 00:04.0 [8086/0153] enabled |
| PCI: 00:14.0 [8086/0000] ops |
| PCI: 00:14.0 [8086/1e31] enabled |
| PCI: 00:16.0: Disabling device |
| PCI: 00:16.0 [8086/1e3a] ops |
| PCI: 00:16.0 [8086/1e3a] disabled |
| PCI: 00:16.1: Disabling device |
| PCI: 00:16.2: Disabling device |
| PCI: 00:16.3: Disabling device |
| PCI: 00:19.0: Disabling device |
| PCI: 00:1a.0 [8086/0000] ops |
| PCI: 00:1a.0 [8086/1e2d] enabled |
| PCI: 00:1b.0 [8086/0000] ops |
| PCI: 00:1b.0 [8086/1e20] enabled |
| PCH: PCIe Root Port coalescing is enabled |
| PCI: 00:1c.0 [8086/0000] bus ops |
| PCI: 00:1c.0 [8086/1e10] enabled |
| PCI: 00:1c.1 [8086/0000] bus ops |
| PCI: 00:1c.1 [8086/1e12] enabled |
| PCI: 00:1c.2: Disabling device |
| PCH: Remap PCIe function 3 to 2 |
| PCI: 00:1c.3 [8086/0000] bus ops |
| PCI: 00:1c.3 [8086/1e16] enabled |
| PCI: 00:1c.4: Disabling device |
| PCI: 00:1c.4: check set enabled |
| PCI: 00:1c.5: Disabling device |
| PCI: 00:1c.6: Disabling device |
| PCI: 00:1c.7: Disabling device |
| PCH: RPFN 0x76543210 -> 0xfedc2b10 |
| PCH: PCIe map 1c.2 -> 1c.3 |
| PCH: PCIe map 1c.3 -> 1c.2 |
| PCI: 00:1d.0 [8086/0000] ops |
| PCI: 00:1d.0 [8086/1e26] enabled |
| PCI: 00:1e.0: Disabling device |
| PCI: 00:1f.0 [8086/0000] bus ops |
| PCI: 00:1f.0 [8086/1e57] enabled |
| PCI: 00:1f.2 [8086/0000] ops |
| PCI: 00:1f.2 [8086/1e01] enabled |
| PCI: 00:1f.3 [8086/0000] bus ops |
| PCI: 00:1f.3 [8086/1e22] enabled |
| PCI: 00:1f.5: Disabling device |
| PCI: 00:1f.6: Disabling device |
| POST: 0x25 |
| PCI: 00:1c.0 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.0 |
| memalign Enter, boundary 8, size 36, free_mem_ptr 7ffd3a08 |
| memalign 7ffd3a08 |
| PCI: pci_scan_bus for bus 01 |
| POST: 0x24 |
| memalign Enter, boundary 8, size 152, free_mem_ptr 7ffd3a2c |
| memalign 7ffd3a30 |
| PCI: 01:00.0 [10ec/5229] enabled |
| POST: 0x25 |
| POST: 0x55 |
| Capability: type 0x01 @ 0x40 |
| Capability: type 0x05 @ 0x50 |
| Capability: type 0x10 @ 0x70 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| scan_bus: scanning of bus PCI: 00:1c.0 took 229 usecs |
| PCI: 00:1c.1 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.1 |
| memalign Enter, boundary 8, size 36, free_mem_ptr 7ffd3ac8 |
| memalign 7ffd3ac8 |
| PCI: pci_scan_bus for bus 02 |
| POST: 0x24 |
| memalign Enter, boundary 8, size 152, free_mem_ptr 7ffd3aec |
| memalign 7ffd3af0 |
| PCI: 02:00.0 [168c/0034] enabled |
| POST: 0x25 |
| POST: 0x55 |
| Capability: type 0x01 @ 0x40 |
| Capability: type 0x05 @ 0x50 |
| Capability: type 0x10 @ 0x70 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpoint |
| ASPM: Enabled L0s and L1 |
| memalign Enter, boundary 8, size 152, free_mem_ptr 7ffd3b88 |
| memalign 7ffd3b88 |
| scan_bus: scanning of bus PCI: 00:1c.1 took 224 usecs |
| PCI: 00:1c.2 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.2 |
| memalign Enter, boundary 8, size 36, free_mem_ptr 7ffd3c20 |
| memalign 7ffd3c20 |
| PCI: pci_scan_bus for bus 03 |
| POST: 0x24 |
| memalign Enter, boundary 8, size 152, free_mem_ptr 7ffd3c44 |
| memalign 7ffd3c48 |
| PCI: 03:00.0 [10ec/8168] enabled |
| POST: 0x25 |
| POST: 0x55 |
| Capability: type 0x01 @ 0x40 |
| Capability: type 0x05 @ 0x50 |
| Capability: type 0x10 @ 0x70 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| ASPM: Enabled L1 |
| memalign Enter, boundary 8, size 152, free_mem_ptr 7ffd3ce0 |
| memalign 7ffd3ce0 |
| scan_bus: scanning of bus PCI: 00:1c.2 took 222 usecs |
| PCI: 00:1f.0 scanning... |
| scan_lpc_bus for PCI: 00:1f.0 |
| memalign Enter, boundary 8, size 2560, free_mem_ptr 7ffd3d78 |
| memalign 7ffd3d78 |
| PNP: 0c31.0 enabled |
| scan_lpc_bus for PCI: 00:1f.0 done |
| scan_bus: scanning of bus PCI: 00:1f.0 took 14 usecs |
| PCI: 00:1f.3 scanning... |
| scan_generic_bus for PCI: 00:1f.3 |
| bus: PCI: 00:1f.3[0]->I2C: 01:54 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled |
| scan_generic_bus for PCI: 00:1f.3 done |
| scan_bus: scanning of bus PCI: 00:1f.3 took 29 usecs |
| POST: 0x55 |
| scan_bus: scanning of bus DOMAIN: 0000 took 1118 usecs |
| root_dev_scan_bus for Root Device done |
| scan_bus: scanning of bus Root Device took 1128 usecs |
| done |
| BS: BS_DEV_ENUMERATE times (us): entry 0 run 5360 exit 0 |
| POST: 0x73 |
| found VGA at PCI: 00:02.0 |
| Setting up VGA for PCI: 00:02.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| Allocating resources... |
| Reading resources... |
| Root Device read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 |
| Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000. |
| PCI: 00:1c.0 read_resources bus 1 link: 0 |
| PCI: 00:1c.0 read_resources bus 1 link: 0 done |
| PCI: 00:1c.1 read_resources bus 2 link: 0 |
| PCI: 00:1c.1 read_resources bus 2 link: 0 done |
| PCI: 00:1c.2 read_resources bus 3 link: 0 |
| PCI: 00:1c.2 read_resources bus 3 link: 0 done |
| PCI: 00:1f.0 read_resources bus 0 link: 0 |
| PCI: 00:1f.0 read_resources bus 0 link: 0 done |
| PCI: 00:1f.3 read_resources bus 1 link: 0 |
| PCI: 00:1f.3 read_resources bus 1 link: 0 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 done |
| Root Device read_resources bus 0 link: 0 done |
| Done reading resources. |
| Show resources in subtree (Root Device)...After reading. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: acac |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 |
| PCI: 00:00.0 |
| PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 |
| PCI: 00:01.0 |
| PCI: 00:02.0 |
| PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18 |
| PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20 |
| PCI: 00:04.0 |
| PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:14.0 |
| PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:16.0 |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:19.0 |
| PCI: 00:1a.0 |
| PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:1c.0 child on link 0 PCI: 01:00.0 |
| PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 01:00.0 |
| PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 |
| PCI: 00:1c.1 child on link 0 PCI: 02:00.0 |
| PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 02:00.0 |
| PCI: 02:00.0 resource base 0 size 80000 align 19 gran 19 limit ffffffffffffffff flags 201 index 10 |
| PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30 |
| Unknown device path type: 0 |
| |
| Unknown device path type: 0 |
| resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10 |
| Unknown device path type: 0 |
| resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14 |
| Unknown device path type: 0 |
| resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18 |
| PCI: 00:1c.3 |
| PCI: 00:1c.2 child on link 0 PCI: 03:00.0 |
| PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 03:00.0 |
| PCI: 03:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10 |
| PCI: 03:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 1201 index 18 |
| PCI: 03:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20 |
| Unknown device path type: 0 |
| |
| Unknown device path type: 0 |
| resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10 |
| Unknown device path type: 0 |
| resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14 |
| Unknown device path type: 0 |
| resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18 |
| PCI: 00:1c.4 |
| PCI: 00:1c.5 |
| PCI: 00:1c.6 |
| PCI: 00:1c.7 |
| PCI: 00:1d.0 |
| PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| PCI: 00:1e.0 |
| PCI: 00:1f.0 child on link 0 PNP: 0c31.0 |
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PNP: 0c31.0 |
| PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0 |
| PCI: 00:1f.2 |
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 |
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 |
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 |
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c |
| PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 |
| PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24 |
| PCI: 00:1f.3 child on link 0 I2C: 01:54 |
| PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 |
| PCI: 00:1f.3 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10 |
| I2C: 01:54 |
| I2C: 01:55 |
| I2C: 01:56 |
| I2C: 01:57 |
| I2C: 01:5c |
| I2C: 01:5d |
| I2C: 01:5e |
| I2C: 01:5f |
| PCI: 00:1f.5 |
| PCI: 00:1f.6 |
| DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff |
| PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| Unknown device path type: 0 |
| 18 * [0x0 - 0xfff] io |
| PCI: 00:1c.1 io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| Unknown device path type: 0 |
| 18 * [0x0 - 0xfff] io |
| PCI: 03:00.0 10 * [0x1000 - 0x10ff] io |
| PCI: 00:1c.2 io: base: 1100 size: 2000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.2 1c * [0x0 - 0x1fff] io |
| PCI: 00:1c.1 1c * [0x2000 - 0x2fff] io |
| PCI: 00:02.0 20 * [0x3000 - 0x303f] io |
| PCI: 00:1f.2 20 * [0x3040 - 0x305f] io |
| PCI: 00:1f.2 10 * [0x3060 - 0x3067] io |
| PCI: 00:1f.2 18 * [0x3068 - 0x306f] io |
| PCI: 00:1f.2 14 * [0x3070 - 0x3073] io |
| PCI: 00:1f.2 1c * [0x3074 - 0x3077] io |
| DOMAIN: 0000 io: base: 3078 size: 3078 align: 12 gran: 0 limit: ffff done |
| DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff |
| PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 01:00.0 10 * [0x0 - 0xfff] mem |
| PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| Unknown device path type: 0 |
| 14 * [0x0 - 0x7fffff] prefmem |
| PCI: 00:1c.1 prefmem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done |
| PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| Unknown device path type: 0 |
| 10 * [0x0 - 0x7fffff] mem |
| PCI: 02:00.0 10 * [0x800000 - 0x87ffff] mem |
| PCI: 02:00.0 30 * [0x880000 - 0x88ffff] mem |
| PCI: 00:1c.1 mem: base: 890000 size: 900000 align: 22 gran: 20 limit: ffffffff done |
| PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| Unknown device path type: 0 |
| 14 * [0x0 - 0x7fffff] prefmem |
| PCI: 03:00.0 20 * [0x800000 - 0x803fff] prefmem |
| PCI: 03:00.0 18 * [0x804000 - 0x804fff] prefmem |
| PCI: 00:1c.2 prefmem: base: 805000 size: 900000 align: 22 gran: 20 limit: ffffffff done |
| PCI: 00:1c.2 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| Unknown device path type: 0 |
| 10 * [0x0 - 0x7fffff] mem |
| PCI: 00:1c.2 mem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done |
| PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem |
| PCI: 00:1c.1 20 * [0x10000000 - 0x108fffff] mem |
| PCI: 00:1c.2 24 * [0x10c00000 - 0x114fffff] prefmem |
| PCI: 00:1c.1 24 * [0x11800000 - 0x11ffffff] prefmem |
| PCI: 00:1c.2 20 * [0x12000000 - 0x127fffff] mem |
| PCI: 00:02.0 10 * [0x12800000 - 0x12bfffff] mem |
| PCI: 00:1c.0 20 * [0x12c00000 - 0x12cfffff] mem |
| PCI: 00:14.0 10 * [0x12d00000 - 0x12d0ffff] mem |
| PCI: 00:04.0 10 * [0x12d10000 - 0x12d17fff] mem |
| PCI: 00:1b.0 10 * [0x12d18000 - 0x12d1bfff] mem |
| PCI: 00:1f.2 24 * [0x12d1c000 - 0x12d1c7ff] mem |
| PCI: 00:1a.0 10 * [0x12d1d000 - 0x12d1d3ff] mem |
| PCI: 00:1d.0 10 * [0x12d1e000 - 0x12d1e3ff] mem |
| PCI: 00:1f.3 10 * [0x12d1f000 - 0x12d1f0ff] mem |
| DOMAIN: 0000 mem: base: 12d1f100 size: 12d1f100 align: 28 gran: 0 limit: ffffffff done |
| avoid_fixed_resources: DOMAIN: 0000 |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff |
| constrain_resources: PCI: 00:00.0 60 base f0000000 limit f3ffffff mem (fixed) |
| constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed) |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 base d0000000 limit efffffff |
| Setting resources... |
| DOMAIN: 0000 io: base:1000 size:3078 align:12 gran:0 limit:ffff |
| PCI: 00:1c.2 1c * [0x1000 - 0x2fff] io |
| PCI: 00:1c.1 1c * [0x3000 - 0x3fff] io |
| PCI: 00:02.0 20 * [0x4000 - 0x403f] io |
| PCI: 00:1f.2 20 * [0x4040 - 0x405f] io |
| PCI: 00:1f.2 10 * [0x4060 - 0x4067] io |
| PCI: 00:1f.2 18 * [0x4068 - 0x406f] io |
| PCI: 00:1f.2 14 * [0x4070 - 0x4073] io |
| PCI: 00:1f.2 1c * [0x4074 - 0x4077] io |
| DOMAIN: 0000 io: next_base: 4078 size: 3078 align: 12 gran: 0 done |
| PCI: 00:1c.0 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:1c.0 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| PCI: 00:1c.1 io: base:3000 size:1000 align:12 gran:12 limit:3fff |
| Unknown device path type: 0 |
| 18 * [0x3000 - 0x3fff] io |
| PCI: 00:1c.1 io: next_base: 4000 size: 1000 align: 12 gran: 12 done |
| PCI: 00:1c.2 io: base:1000 size:2000 align:12 gran:12 limit:2fff |
| Unknown device path type: 0 |
| 18 * [0x1000 - 0x1fff] io |
| PCI: 03:00.0 10 * [0x2000 - 0x20ff] io |
| PCI: 00:1c.2 io: next_base: 2100 size: 2000 align: 12 gran: 12 done |
| DOMAIN: 0000 mem: base:d0000000 size:12d1f100 align:28 gran:0 limit:efffffff |
| PCI: 00:02.0 18 * [0xd0000000 - 0xdfffffff] prefmem |
| PCI: 00:1c.1 20 * [0xe0000000 - 0xe08fffff] mem |
| PCI: 00:1c.2 24 * [0xe0c00000 - 0xe14fffff] prefmem |
| PCI: 00:1c.1 24 * [0xe1800000 - 0xe1ffffff] prefmem |
| PCI: 00:1c.2 20 * [0xe2000000 - 0xe27fffff] mem |
| PCI: 00:02.0 10 * [0xe2800000 - 0xe2bfffff] mem |
| PCI: 00:1c.0 20 * [0xe2c00000 - 0xe2cfffff] mem |
| PCI: 00:14.0 10 * [0xe2d00000 - 0xe2d0ffff] mem |
| PCI: 00:04.0 10 * [0xe2d10000 - 0xe2d17fff] mem |
| PCI: 00:1b.0 10 * [0xe2d18000 - 0xe2d1bfff] mem |
| PCI: 00:1f.2 24 * [0xe2d1c000 - 0xe2d1c7ff] mem |
| PCI: 00:1a.0 10 * [0xe2d1d000 - 0xe2d1d3ff] mem |
| PCI: 00:1d.0 10 * [0xe2d1e000 - 0xe2d1e3ff] mem |
| PCI: 00:1f.3 10 * [0xe2d1f000 - 0xe2d1f0ff] mem |
| DOMAIN: 0000 mem: next_base: e2d1f100 size: 12d1f100 align: 28 gran: 0 done |
| PCI: 00:1c.0 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff |
| PCI: 00:1c.0 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.0 mem: base:e2c00000 size:100000 align:20 gran:20 limit:e2cfffff |
| PCI: 01:00.0 10 * [0xe2c00000 - 0xe2c00fff] mem |
| PCI: 00:1c.0 mem: next_base: e2c01000 size: 100000 align: 20 gran: 20 done |
| PCI: 00:1c.1 prefmem: base:e1800000 size:800000 align:22 gran:20 limit:e1ffffff |
| Unknown device path type: 0 |
| 14 * [0xe1800000 - 0xe1ffffff] prefmem |
| PCI: 00:1c.1 prefmem: next_base: e2000000 size: 800000 align: 22 gran: 20 done |
| PCI: 00:1c.1 mem: base:e0000000 size:900000 align:22 gran:20 limit:e08fffff |
| Unknown device path type: 0 |
| 10 * [0xe0000000 - 0xe07fffff] mem |
| PCI: 02:00.0 10 * [0xe0800000 - 0xe087ffff] mem |
| PCI: 02:00.0 30 * [0xe0880000 - 0xe088ffff] mem |
| PCI: 00:1c.1 mem: next_base: e0890000 size: 900000 align: 22 gran: 20 done |
| PCI: 00:1c.2 prefmem: base:e0c00000 size:900000 align:22 gran:20 limit:e14fffff |
| Unknown device path type: 0 |
| 14 * [0xe0c00000 - 0xe13fffff] prefmem |
| PCI: 03:00.0 20 * [0xe1400000 - 0xe1403fff] prefmem |
| PCI: 03:00.0 18 * [0xe1404000 - 0xe1404fff] prefmem |
| PCI: 00:1c.2 prefmem: next_base: e1405000 size: 900000 align: 22 gran: 20 done |
| PCI: 00:1c.2 mem: base:e2000000 size:800000 align:22 gran:20 limit:e27fffff |
| Unknown device path type: 0 |
| 10 * [0xe2000000 - 0xe27fffff] mem |
| PCI: 00:1c.2 mem: next_base: e2800000 size: 800000 align: 22 gran: 20 done |
| Root Device assign_resources, bus 0 link: 0 |
| TOUUD 0x27d600000 TOLUD 0x82a00000 TOM 0x200000000 |
| MEBASE 0x7ffff00000 |
| IGD decoded, subtracting 32M UMA and 2M GTT |
| TSEG base 0x80000000 size 8M |
| Available memory below 4GB: 2048M |
| Available memory above 4GB: 6102M |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| PCI: 00:02.0 10 <- [0x00e2800000 - 0x00e2bfffff] size 0x00400000 gran 0x16 mem64 |
| PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64 |
| PCI: 00:02.0 20 <- [0x0000004000 - 0x000000403f] size 0x00000040 gran 0x06 io |
| PCI: 00:04.0 10 <- [0x00e2d10000 - 0x00e2d17fff] size 0x00008000 gran 0x0f mem64 |
| PCI: 00:14.0 10 <- [0x00e2d00000 - 0x00e2d0ffff] size 0x00010000 gran 0x10 mem64 |
| PCI: 00:1a.0 10 <- [0x00e2d1d000 - 0x00e2d1d3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1b.0 10 <- [0x00e2d18000 - 0x00e2d1bfff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io |
| PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem |
| PCI: 00:1c.0 20 <- [0x00e2c00000 - 0x00e2cfffff] size 0x00100000 gran 0x14 bus 01 mem |
| PCI: 00:1c.0 assign_resources, bus 1 link: 0 |
| PCI: 01:00.0 10 <- [0x00e2c00000 - 0x00e2c00fff] size 0x00001000 gran 0x0c mem |
| PCI: 00:1c.0 assign_resources, bus 1 link: 0 |
| PCI: 00:1c.1 1c <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x0c bus 02 io |
| PCI: 00:1c.1 24 <- [0x00e1800000 - 0x00e1ffffff] size 0x00800000 gran 0x14 bus 02 prefmem |
| PCI: 00:1c.1 20 <- [0x00e0000000 - 0x00e08fffff] size 0x00900000 gran 0x14 bus 02 mem |
| PCI: 00:1c.1 assign_resources, bus 2 link: 0 |
| PCI: 02:00.0 10 <- [0x00e0800000 - 0x00e087ffff] size 0x00080000 gran 0x13 mem64 |
| PCI: 02:00.0 30 <- [0x00e0880000 - 0x00e088ffff] size 0x00010000 gran 0x10 romem |
| Unknown device path type: 0 |
| missing set_resources |
| PCI: 00:1c.1 assign_resources, bus 2 link: 0 |
| PCI: 00:1c.2 1c <- [0x0000001000 - 0x0000002fff] size 0x00002000 gran 0x0c bus 03 io |
| PCI: 00:1c.2 24 <- [0x00e0c00000 - 0x00e14fffff] size 0x00900000 gran 0x14 bus 03 prefmem |
| PCI: 00:1c.2 20 <- [0x00e2000000 - 0x00e27fffff] size 0x00800000 gran 0x14 bus 03 mem |
| PCI: 00:1c.2 assign_resources, bus 3 link: 0 |
| PCI: 03:00.0 10 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io |
| PCI: 03:00.0 18 <- [0x00e1404000 - 0x00e1404fff] size 0x00001000 gran 0x0c prefmem64 |
| PCI: 03:00.0 20 <- [0x00e1400000 - 0x00e1403fff] size 0x00004000 gran 0x0e prefmem64 |
| Unknown device path type: 0 |
| missing set_resources |
| PCI: 00:1c.2 assign_resources, bus 3 link: 0 |
| PCI: 00:1d.0 10 <- [0x00e2d1e000 - 0x00e2d1e3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1f.0 assign_resources, bus 0 link: 0 |
| PCI: 00:1f.0 assign_resources, bus 0 link: 0 |
| PCI: 00:1f.2 10 <- [0x0000004060 - 0x0000004067] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 14 <- [0x0000004070 - 0x0000004073] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 18 <- [0x0000004068 - 0x000000406f] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 1c <- [0x0000004074 - 0x0000004077] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 20 <- [0x0000004040 - 0x000000405f] size 0x00000020 gran 0x05 io |
| PCI: 00:1f.2 24 <- [0x00e2d1c000 - 0x00e2d1c7ff] size 0x00000800 gran 0x0b mem |
| PCI: 00:1f.3 10 <- [0x00e2d1f000 - 0x00e2d1f0ff] size 0x00000100 gran 0x08 mem64 |
| PCI: 00:1f.3 assign_resources, bus 1 link: 0 |
| PCI: 00:1f.3 assign_resources, bus 1 link: 0 |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| Root Device assign_resources, bus 0 link: 0 |
| Done setting resources. |
| Show resources in subtree (Root Device)...After assigning values. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: acac |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 1000 size 3078 align 12 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base d0000000 size 12d1f100 align 28 gran 0 limit efffffff flags 40040200 index 10000100 |
| DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 |
| DOMAIN: 0000 resource base 100000 size 7ff00000 align 0 gran 0 limit 0 flags e0004200 index 4 |
| DOMAIN: 0000 resource base 100000000 size 17d600000 align 0 gran 0 limit 0 flags e0004200 index 5 |
| DOMAIN: 0000 resource base 80000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6 |
| DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7 |
| DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8 |
| DOMAIN: 0000 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9 |
| DOMAIN: 0000 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a |
| PCI: 00:00.0 |
| PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 |
| PCI: 00:01.0 |
| PCI: 00:02.0 |
| PCI: 00:02.0 resource base e2800000 size 400000 align 22 gran 22 limit e2bfffff flags 60000201 index 10 |
| PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit dfffffff flags 60001201 index 18 |
| PCI: 00:02.0 resource base 4000 size 40 align 6 gran 6 limit 403f flags 60000100 index 20 |
| PCI: 00:04.0 |
| PCI: 00:04.0 resource base e2d10000 size 8000 align 15 gran 15 limit e2d17fff flags 60000201 index 10 |
| PCI: 00:14.0 |
| PCI: 00:14.0 resource base e2d00000 size 10000 align 16 gran 16 limit e2d0ffff flags 60000201 index 10 |
| PCI: 00:16.0 |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:19.0 |
| PCI: 00:1a.0 |
| PCI: 00:1a.0 resource base e2d1d000 size 400 align 12 gran 10 limit e2d1d3ff flags 60000200 index 10 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base e2d18000 size 4000 align 14 gran 14 limit e2d1bfff flags 60000201 index 10 |
| PCI: 00:1c.0 child on link 0 PCI: 01:00.0 |
| PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 |
| PCI: 00:1c.0 resource base e2c00000 size 100000 align 20 gran 20 limit e2cfffff flags 60080202 index 20 |
| PCI: 01:00.0 |
| PCI: 01:00.0 resource base e2c00000 size 1000 align 12 gran 12 limit e2c00fff flags 60000200 index 10 |
| PCI: 00:1c.1 child on link 0 PCI: 02:00.0 |
| PCI: 00:1c.1 resource base 3000 size 1000 align 12 gran 12 limit 3fff flags 60080102 index 1c |
| PCI: 00:1c.1 resource base e1800000 size 800000 align 22 gran 20 limit e1ffffff flags 60081202 index 24 |
| PCI: 00:1c.1 resource base e0000000 size 900000 align 22 gran 20 limit e08fffff flags 60080202 index 20 |
| PCI: 02:00.0 |
| PCI: 02:00.0 resource base e0800000 size 80000 align 19 gran 19 limit e087ffff flags 60000201 index 10 |
| PCI: 02:00.0 resource base e0880000 size 10000 align 16 gran 16 limit e088ffff flags 60002200 index 30 |
| Unknown device path type: 0 |
| |
| Unknown device path type: 0 |
| resource base e0000000 size 800000 align 22 gran 22 limit e07fffff flags 40000200 index 10 |
| Unknown device path type: 0 |
| resource base e1800000 size 800000 align 22 gran 22 limit e1ffffff flags 40001200 index 14 |
| Unknown device path type: 0 |
| resource base 3000 size 1000 align 12 gran 12 limit 3fff flags 40000100 index 18 |
| PCI: 00:1c.3 |
| PCI: 00:1c.2 child on link 0 PCI: 03:00.0 |
| PCI: 00:1c.2 resource base 1000 size 2000 align 12 gran 12 limit 2fff flags 60080102 index 1c |
| PCI: 00:1c.2 resource base e0c00000 size 900000 align 22 gran 20 limit e14fffff flags 60081202 index 24 |
| PCI: 00:1c.2 resource base e2000000 size 800000 align 22 gran 20 limit e27fffff flags 60080202 index 20 |
| PCI: 03:00.0 |
| PCI: 03:00.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 10 |
| PCI: 03:00.0 resource base e1404000 size 1000 align 12 gran 12 limit e1404fff flags 60001201 index 18 |
| PCI: 03:00.0 resource base e1400000 size 4000 align 14 gran 14 limit e1403fff flags 60001201 index 20 |
| Unknown device path type: 0 |
| |
| Unknown device path type: 0 |
| resource base e2000000 size 800000 align 22 gran 22 limit e27fffff flags 40000200 index 10 |
| Unknown device path type: 0 |
| resource base e0c00000 size 800000 align 22 gran 22 limit e13fffff flags 40001200 index 14 |
| Unknown device path type: 0 |
| resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 40000100 index 18 |
| PCI: 00:1c.4 |
| PCI: 00:1c.5 |
| PCI: 00:1c.6 |
| PCI: 00:1c.7 |
| PCI: 00:1d.0 |
| PCI: 00:1d.0 resource base e2d1e000 size 400 align 12 gran 10 limit e2d1e3ff flags 60000200 index 10 |
| PCI: 00:1e.0 |
| PCI: 00:1f.0 child on link 0 PNP: 0c31.0 |
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PNP: 0c31.0 |
| PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0 |
| PCI: 00:1f.2 |
| PCI: 00:1f.2 resource base 4060 size 8 align 3 gran 3 limit 4067 flags 60000100 index 10 |
| PCI: 00:1f.2 resource base 4070 size 4 align 2 gran 2 limit 4073 flags 60000100 index 14 |
| PCI: 00:1f.2 resource base 4068 size 8 align 3 gran 3 limit 406f flags 60000100 index 18 |
| PCI: 00:1f.2 resource base 4074 size 4 align 2 gran 2 limit 4077 flags 60000100 index 1c |
| PCI: 00:1f.2 resource base 4040 size 20 align 5 gran 5 limit 405f flags 60000100 index 20 |
| PCI: 00:1f.2 resource base e2d1c000 size 800 align 12 gran 11 limit e2d1c7ff flags 60000200 index 24 |
| PCI: 00:1f.3 child on link 0 I2C: 01:54 |
| PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 |
| PCI: 00:1f.3 resource base e2d1f000 size 100 align 12 gran 8 limit e2d1f0ff flags 60000201 index 10 |
| I2C: 01:54 |
| I2C: 01:55 |
| I2C: 01:56 |
| I2C: 01:57 |
| I2C: 01:5c |
| I2C: 01:5d |
| I2C: 01:5e |
| I2C: 01:5f |
| PCI: 00:1f.5 |
| PCI: 00:1f.6 |
| Done allocating resources. |
| BS: BS_DEV_RESOURCES times (us): entry 0 run 2588 exit 0 |
| POST: 0x74 |
| Enabling resources... |
| PCI: 00:00.0 subsystem <- 17aa/2205 |
| PCI: 00:00.0 cmd <- 06 |
| PCI: 00:02.0 subsystem <- 17aa/2205 |
| PCI: 00:02.0 cmd <- 03 |
| PCI: 00:04.0 cmd <- 02 |
| PCI: 00:14.0 subsystem <- 17aa/2205 |
| PCI: 00:14.0 cmd <- 102 |
| PCI: 00:1a.0 subsystem <- 17aa/2205 |
| PCI: 00:1a.0 cmd <- 102 |
| PCI: 00:1b.0 subsystem <- 17aa/2205 |
| PCI: 00:1b.0 cmd <- 102 |
| PCI: 00:1c.0 bridge ctrl <- 0003 |
| PCI: 00:1c.0 subsystem <- 17aa/2205 |
| PCI: 00:1c.0 cmd <- 106 |
| PCI: 00:1c.1 bridge ctrl <- 0003 |
| PCI: 00:1c.1 subsystem <- 17aa/2205 |
| PCI: 00:1c.1 cmd <- 107 |
| PCI: 00:1c.2 bridge ctrl <- 0003 |
| PCI: 00:1c.2 subsystem <- 17aa/2205 |
| PCI: 00:1c.2 cmd <- 107 |
| PCI: 00:1d.0 subsystem <- 17aa/2205 |
| PCI: 00:1d.0 cmd <- 102 |
| pch_decode_init |
| PCI: 00:1f.0 subsystem <- 17aa/2205 |
| PCI: 00:1f.0 cmd <- 107 |
| PCI: 00:1f.2 subsystem <- 17aa/2205 |
| PCI: 00:1f.2 cmd <- 03 |
| PCI: 00:1f.3 subsystem <- 17aa/2205 |
| PCI: 00:1f.3 cmd <- 103 |
| PCI: 01:00.0 cmd <- 02 |
| PCI: 02:00.0 cmd <- 02 |
| PCI: 03:00.0 cmd <- 03 |
| done. |
| BS: BS_DEV_ENABLE times (us): entry 0 run 139 exit 0 |
| read 6000 from 07e4 |
| wrote 00000004 to 0890 |
| read 02040103 from 0894 |
| read 00000000 from 0880 |
| wrote 00000000 to 0880 |
| POST: 0x75 |
| Initializing devices... |
| Root Device init ... |
| Root Device init finished in 1 usecs |
| POST: 0x75 |
| CPU_CLUSTER: 0 init ... |
| start_eip=0x00001000, code_size=0x00000031 |
| Setting up SMI for CPU |
| Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8 |
| Processing 12 relocs. Offset value of 0x00038000 |
| SMM Module: stub loaded at 00038000. Will call 7ffae2e9(7ffd38e0) |
| Installing SMM handler to 0x80000000 |
| Loading module at 80010000 with entry 8001108a. filesize: 0x3320 memsize: 0x7348 |
| Processing 208 relocs. Offset value of 0x80010000 |
| Loading module at 80008000 with entry 80008000. filesize: 0x1a8 memsize: 0x1a8 |
| Processing 12 relocs. Offset value of 0x80008000 |
| SMM Module: placing jmp sequence at 80007c00 rel16 0x03fd |
| SMM Module: placing jmp sequence at 80007800 rel16 0x07fd |
| SMM Module: placing jmp sequence at 80007400 rel16 0x0bfd |
| SMM Module: stub loaded at 80008000. Will call 8001108a(00000000) |
| Initializing southbridge SMI... ... pmbase = 0x0500 |
| |
| SMI_STS: PM1 |
| PM1_STS: WAK PWRBTN |
| GPE0_STS: GPIO15 GPIO14 GPIO11 GPIO10 GPIO9 GPIO8 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0 |
| ALT_GP_SMI_STS: GPI15 GPI14 GPI11 GPI10 GPI9 GPI8 GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0 |
| TCO_STS: |
| ... raise SMI# |
| In relocation handler: cpu 0 |
| New SMBASE=0x80000000 IEDBASE=0x80400000 @ 0003fc00 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Relocation complete. |
| Locking SMM. |
| Initializing CPU #0 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| POST: 0x60 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [800100:bfffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 14fec |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 15100 |
| CBFS: File @ offset 15100 size 5800 |
| CBFS: Found @ offset 15100 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x1b |
| CPU: Intel(R) Core(TM) i7-3537U CPU @ 2.00GHz. |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4778 |
| memalign 7ffd4778 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4790 |
| memalign 7ffd4790 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd47a8 |
| memalign 7ffd47a8 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd47c0 |
| memalign 7ffd47c0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd47d8 |
| memalign 7ffd47d8 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd47f0 |
| memalign 7ffd47f0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4808 |
| memalign 7ffd4808 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4820 |
| memalign 7ffd4820 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4838 |
| memalign 7ffd4838 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4850 |
| memalign 7ffd4850 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4868 |
| memalign 7ffd4868 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4880 |
| memalign 7ffd4880 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4898 |
| memalign 7ffd4898 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd48b0 |
| memalign 7ffd48b0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd48c8 |
| memalign 7ffd48c8 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd48e0 |
| memalign 7ffd48e0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd48f8 |
| memalign 7ffd48f8 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4910 |
| memalign 7ffd4910 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4928 |
| memalign 7ffd4928 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4940 |
| memalign 7ffd4940 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4958 |
| memalign 7ffd4958 |
| MTRR: Physical address space: |
| 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 |
| 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 |
| 0x00000000000c0000 - 0x0000000080000000 size 0x7ff40000 type 6 |
| 0x0000000080000000 - 0x00000000d0000000 size 0x50000000 type 0 |
| 0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1 |
| 0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0 |
| 0x0000000100000000 - 0x000000027d600000 size 0x17d600000 type 6 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| MTRR: default type WB/UC MTRR counts: 4/7. |
| MTRR: WB selected as default type. |
| MTRR: 0 base 0x0000000080000000 mask 0x0000000fc0000000 type 0 |
| MTRR: 1 base 0x00000000c0000000 mask 0x0000000ff0000000 type 0 |
| MTRR: 2 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1 |
| MTRR: 3 base 0x00000000e0000000 mask 0x0000000fe0000000 type 0 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Setting up local APIC... apic_id: 0x00 done. |
| VMX status: enabled, locked |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2000 |
| Turbo is available but hidden |
| Turbo has been enabled |
| CPU: 0 has 2 cores, 2 threads per core |
| memalign Enter, boundary 8, size 152, free_mem_ptr 7ffd4970 |
| memalign 7ffd4970 |
| CPU: 0 has core 1 |
| CPU1: stack_base 7ffcc000, stack_end 7ffccff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 1. |
| After apic_write. |
| In relocation handler: cpu 1 |
| New SMBASE=0x7ffffc00 IEDBASE=0x80400000 @ 0003fc00 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 1. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #1 |
| memalign Enter, boundary 8, size 152, free_mem_ptr 7ffd4a08 |
| CPU: vendor Intel device 306a9 |
| memalign 7ffd4a08 |
| CPU: family 06, model 3a, stepping 09 |
| CPU: 0 has core 2 |
| POST: 0x60 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [800100:bfffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 14fec |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 15100 |
| CBFS: File @ offset 15100 size 5800 |
| CBFS: Found @ offset 15100 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x1b |
| CPU: Intel(R) Core(TM) i7-3537U CPU @ 2.00GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Setting up local APIC... apic_id: 0x01 done. |
| VMX status: enabled, locked |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2000 |
| CPU #1 initialized |
| CPU2: stack_base 7ffcb000, stack_end 7ffcbff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 2. |
| After apic_write. |
| In relocation handler: cpu 2 |
| Startup point 1. |
| Waiting for send to finish... |
| +New SMBASE=0x7ffff800 IEDBASE=0x80400000 @ 0003fc00 |
| Sending STARTUP #2 to 2. |
| After apic_write. |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| memalign Enter, boundary 8, size 152, free_mem_ptr 7ffd4aa0 |
| memalign 7ffd4aa0 |
| CPU: 0 has core 3 |
| Initializing CPU #2 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| POST: 0x60 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [800100:bfffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 14fec |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 15100 |
| CBFS: File @ offset 15100 size 5800 |
| CBFS: Found @ offset 15100 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x0 |
| microcode: updated to revision 0x1b date=2014-05-29 |
| CPU: Intel(R) Core(TM) i7-3537U CPU @ 2.00GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Setting up local APIC... apic_id: 0x02 done. |
| VMX status: enabled, locked |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2000 |
| CPU #2 initialized |
| CPU3: stack_base 7ffca000, stack_end 7ffcaff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 3. |
| After apic_write. |
| In relocation handler: cpu 3 |
| New SMBASE=0x7ffff400 IEDBASE=0x80400000 @ 0003fc00 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 3. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU #0 initialized |
| Waiting for 1 CPUS to stop |
| Initializing CPU #3 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| POST: 0x60 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [800100:bfffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 14fec |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 15100 |
| CBFS: File @ offset 15100 size 5800 |
| CBFS: Found @ offset 15100 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x1b |
| CPU: Intel(R) Core(TM) i7-3537U CPU @ 2.00GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Setting up local APIC... apic_id: 0x03 done. |
| VMX status: enabled, locked |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2000 |
| CPU #3 initialized |
| All AP CPUs stopped (675 loops) |
| CPU0: stack: 7ffcd000 - 7ffce000, lowest used address 7ffcda40, stack used: 1472 bytes |
| CPU1: stack: 7ffcc000 - 7ffcd000, lowest used address 7ffccc40, stack used: 960 bytes |
| CPU2: stack: 7ffcb000 - 7ffcc000, lowest used address 7ffcbc40, stack used: 960 bytes |
| CPU3: stack: 7ffca000 - 7ffcb000, lowest used address 7ffcac40, stack used: 960 bytes |
| CPU_CLUSTER: 0 init finished in 108146 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 00:00.0 init ... |
| Disabling PEG12. |
| Disabling PEG11. |
| Disabling PEG10. |
| Disabling PEG60. |
| Disabling Device 7. |
| Disabling PEG IO clock. |
| Set BIOS_RESET_CPL |
| CPU TDP: 17 Watts |
| PCI: 00:00.0 init finished in 1021 usecs |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 00:02.0 init ... |
| GT Power Management Init |
| IVB GT2 17W Power Meter Weights |
| GT Power Management Init (post VBIOS) |
| Initializing VGA without OPROM. |
| EDID: |
| 00 ff ff ff ff ff ff 00 30 e4 7a 03 00 00 00 00 |
| 00 16 01 03 80 1c 10 78 0a dc e5 97 5a 55 92 27 |
| 1d 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 |
| 01 01 01 01 01 01 24 1d 56 d4 50 00 16 30 30 20 |
| 25 00 15 9c 10 00 00 1b 00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 fe 00 4c |
| 47 20 44 69 73 70 6c 61 79 0a 20 20 00 00 00 fe |
| 00 4c 50 31 32 35 57 48 32 2d 53 4c 54 31 00 25 |
| Extracted contents: |
| header: 00 ff ff ff ff ff ff 00 |
| serial number: 30 e4 7a 03 00 00 00 00 00 16 |
| version: 01 03 |
| basic params: 80 1c 10 78 0a |
| chroma info: dc e5 97 5a 55 92 27 1d 50 54 |
| established: 00 00 00 |
| standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 |
| descriptor 1: 24 1d 56 d4 50 00 16 30 30 20 25 00 15 9c 10 00 00 1b |
| descriptor 2: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
| descriptor 3: 00 00 00 fe 00 4c 47 20 44 69 73 70 6c 61 79 0a 20 20 |
| descriptor 4: 00 00 00 fe 00 4c 50 31 32 35 57 48 32 2d 53 4c 54 31 |
| extensions: 00 |
| checksum: 25 |
| |
| Manufacturer: LGD Model 37a Serial Number 0 |
| Made week 0 of 2012 |
| EDID version: 1.3 |
| Digital display |
| Maximum image size: 28 cm x 16 cm |
| Gamma: 220% |
| Check DPMS levels |
| Supported color formats: RGB 4:4:4, YCrCb 4:2:2 |
| First detailed timing is preferred timing |
| Established timings supported: |
| Standard timings supported: |
| Detailed timings |
| Hex of detail: 241d56d45000163030202500159c1000001b |
| Detailed mode (IN HEX): Clock 74600 KHz, 115 mm x 9c mm |
| 0556 0586 05a6 062a hborder 0 |
| 0300 0302 0307 0316 vborder 0 |
| +hsync -vsync |
| Did detailed timing |
| Hex of detail: 000000000000000000000000000000000000 |
| Manufacturer-specified data, tag 0 |
| Hex of detail: 000000fe004c4720446973706c61790a2020 |
| ASCII string: LG Display |
| Hex of detail: 000000fe004c503132355748322d534c5431 |
| ASCII string: LP125WH2-SLT1 |
| Checksum |
| Checksum: 0x25 (valid) |
| WARNING: EDID block does NOT fully conform to EDID 1.3. |
| Missing name descriptor |
| Missing monitor ranges |
| bringing up panel at resolution 1376 x 768 |
| Borders 0 x 0 |
| Blank 212 x 22 |
| Sync 32 x 5 |
| Front porch 48 x 2 |
| Spread spectrum clock |
| Single channel |
| Polarities 0, 1 |
| Data M1=5214917, N1=8388608 |
| Link frequency 270000 kHz |
| Link M1=144858, N1=524288 |
| Pixel N=10, M1=16, M2=7, P1=1 |
| Pixel clock 149142 kHz |
| waiting for panel powerup |
| panel powered up |
| PCI: 00:02.0 init finished in 46447 usecs |
| POST: 0x75 |
| PCI: 00:04.0 init ... |
| PCI: 00:04.0 init finished in 0 usecs |
| POST: 0x75 |
| PCI: 00:14.0 init ... |
| XHCI: Setting up controller.. done. |
| PCI: 00:14.0 init finished in 7 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 00:1a.0 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1a.0 init finished in 12 usecs |
| POST: 0x75 |
| PCI: 00:1b.0 init ... |
| Azalia: base = e2d18000 |
| Azalia: codec_mask = 09 |
| Azalia: Initializing codec #3 |
| Azalia: codec viddid: 80862806 |
| Azalia: verb_size: 16 |
| Azalia: verb loaded. |
| Azalia: Initializing codec #0 |
| Azalia: codec viddid: 10ec0269 |
| Azalia: verb_size: 48 |
| Azalia: verb loaded. |
| PCI: 00:1b.0 init finished in 4809 usecs |
| POST: 0x75 |
| PCI: 00:1c.0 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.0 init finished in 8 usecs |
| POST: 0x75 |
| PCI: 00:1c.1 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.1 init finished in 10 usecs |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 00:1c.2 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.2 init finished in 10 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 00:1d.0 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1d.0 init finished in 12 usecs |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 00:1f.0 init ... |
| pch: lpc_init |
| IOAPIC: Initializing IOAPIC at 0xfec00000 |
| IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| IOAPIC: ID = 0x02 |
| IOAPIC: Dumping registers |
| reg 0x0000: 0x02000000 |
| reg 0x0001: 0x00170020 |
| reg 0x0002: 0x00170020 |
| Set power off after power failure. |
| NMI sources disabled. |
| PantherPoint PM init |
| rtc_failed = 0x0 |
| RTC Init |
| Enabling BIOS updates outside of SMM... Disabling ACPI via APMC: |
| done. |
| pch_spi_init |
| PCI: 00:1f.0 init finished in 1283 usecs |
| POST: 0x75 |
| PCI: 00:1f.2 init ... |
| SATA: Initializing... |
| SATA: Controller in AHCI mode. |
| ABAR: e2d1c000 |
| PCI: 00:1f.2 init finished in 73 usecs |
| POST: 0x75 |
| PCI: 00:1f.3 init ... |
| PCI: 00:1f.3 init finished in 7 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 01:00.0 init ... |
| PCI: 01:00.0 init finished in 0 usecs |
| POST: 0x75 |
| PCI: 02:00.0 init ... |
| PCI: 02:00.0 init finished in 0 usecs |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 03:00.0 init ... |
| PCI: 03:00.0 init finished in 0 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:54 init ... |
| I2C: 01:54 init finished in 1 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:55 init ... |
| I2C: 01:55 init finished in 1 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:56 init ... |
| I2C: 01:56 init finished in 1 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:57 init ... |
| I2C: 01:57 init finished in 1 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5c init ... |
| Locking EEPROM RFID |
| init EEPROM done |
| I2C: 01:5c init finished in 27177 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5d init ... |
| I2C: 01:5d init finished in 1 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5e init ... |
| I2C: 01:5e init finished in 1 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5f init ... |
| I2C: 01:5f init finished in 1 usecs |
| Devices initialized |
| Show all devs... After init. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| PCI: 00:16.0: enabled 0 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 0 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.3: enabled 0 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.4: enabled 0 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 0c31.0: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| I2C: 01:54: enabled 1 |
| I2C: 01:55: enabled 1 |
| I2C: 01:56: enabled 1 |
| I2C: 01:57: enabled 1 |
| I2C: 01:5c: enabled 1 |
| I2C: 01:5d: enabled 1 |
| I2C: 01:5e: enabled 1 |
| I2C: 01:5f: enabled 1 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| PCI: 00:04.0: enabled 1 |
| PCI: 01:00.0: enabled 1 |
| PCI: 02:00.0: enabled 1 |
| Unknown device path type: 0 |
| : enabled 1 |
| PCI: 03:00.0: enabled 1 |
| Unknown device path type: 0 |
| : enabled 1 |
| APIC: 01: enabled 1 |
| APIC: 02: enabled 1 |
| APIC: 03: enabled 1 |
| Updating MRC cache data. |
| No MRC cache in cbmem. Can't update flash. |
| BS: BS_DEV_INIT times (us): entry 14 run 189200 exit 1 |
| POST: 0x76 |
| Finalize devices... |
| PCI: 00:1f.0 final |
| Devices finalized |
| BS: BS_POST_DEVICE times (us): entry 0 run 5 exit 0 |
| POST: 0x77 |
| BS: BS_OS_RESUME_CHECK times (us): entry 0 run 3 exit 0 |
| POST: 0x79 |
| POST: 0x9c |
| CBFS: 'Master Header Locator' located CBFS at [800100:bfffc0) |
| CBFS: Locating 'fallback/dsdt.aml' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 14fec |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 15100 |
| CBFS: File @ offset 15100 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 15100 |
| CBFS: Checking offset 1a980 |
| CBFS: File @ offset 1a980 size 333 |
| CBFS: Unmatched 'config' at 1a980 |
| CBFS: Checking offset 1ad00 |
| CBFS: File @ offset 1ad00 size 240 |
| CBFS: Unmatched 'revision' at 1ad00 |
| CBFS: Checking offset 1af80 |
| CBFS: File @ offset 1af80 size 900 |
| CBFS: Unmatched 'spd.bin' at 1af80 |
| CBFS: Checking offset 1b8c0 |
| CBFS: File @ offset 1b8c0 size 32a1 |
| CBFS: Found @ offset 1b8c0 size 32a1 |
| CBFS: 'Master Header Locator' located CBFS at [800100:bfffc0) |
| CBFS: Locating 'fallback/slic' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 14fec |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 15100 |
| CBFS: File @ offset 15100 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 15100 |
| CBFS: Checking offset 1a980 |
| CBFS: File @ offset 1a980 size 333 |
| CBFS: Unmatched 'config' at 1a980 |
| CBFS: Checking offset 1ad00 |
| CBFS: File @ offset 1ad00 size 240 |
| CBFS: Unmatched 'revision' at 1ad00 |
| CBFS: Checking offset 1af80 |
| CBFS: File @ offset 1af80 size 900 |
| CBFS: Unmatched 'spd.bin' at 1af80 |
| CBFS: Checking offset 1b8c0 |
| CBFS: File @ offset 1b8c0 size 32a1 |
| CBFS: Unmatched 'fallback/dsdt.aml' at 1b8c0 |
| CBFS: Checking offset 1ebc0 |
| CBFS: File @ offset 1ebc0 size 1213 |
| CBFS: Unmatched 'grub.cfg' at 1ebc0 |
| CBFS: Checking offset 1fe40 |
| CBFS: File @ offset 1fe40 size 58 |
| CBFS: Unmatched '' at 1fe40 |
| CBFS: Checking offset 1fec0 |
| CBFS: File @ offset 1fec0 size 10000 |
| CBFS: Unmatched 'mrc.cache' at 1fec0 |
| CBFS: Checking offset 2ff00 |
| CBFS: File @ offset 2ff00 size 16e77 |
| CBFS: Unmatched 'fallback/ramstage' at 2ff00 |
| CBFS: Checking offset 46dc0 |
| CBFS: File @ offset 46dc0 size 2255c |
| CBFS: Unmatched 'img/nvramcui' at 46dc0 |
| CBFS: Checking offset 69380 |
| CBFS: File @ offset 69380 size 8e0ad |
| CBFS: Unmatched 'fallback/payload' at 69380 |
| CBFS: Checking offset f7480 |
| CBFS: File @ offset f7480 size 2c02c |
| CBFS: Unmatched 'img/memtest' at f7480 |
| CBFS: Checking offset 123500 |
| CBFS: File @ offset 123500 size 11ea |
| CBFS: Unmatched 'grubtest.cfg' at 123500 |
| CBFS: Checking offset 124740 |
| CBFS: File @ offset 124740 size 2dab98 |
| CBFS: Unmatched '' at 124740 |
| CBFS: Checking offset 3ff300 |
| CBFS: File @ offset 3ff300 size ba8 |
| CBFS: 'fallback/slic' not found. |
| ACPI: Writing ACPI tables at 7ff13000. |
| ACPI: * FACS |
| ACPI: * DSDT |
| ACPI: * FADT |
| ACPI: added table 1/32, length now 40 |
| ACPI: * SSDT |
| Found 1 CPU(s) with 4 core(s) each. |
| PSS: 2001MHz power 17000 control 0x1f00 status 0x1f00 |
| PSS: 2000MHz power 17000 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 14948 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 12974 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 11090 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 9292 control 0xc00 status 0xc00 |
| PSS: 1000MHz power 7556 control 0xa00 status 0xa00 |
| PSS: 800MHz power 5902 control 0x800 status 0x800 |
| PSS: 2001MHz power 17000 control 0x1f00 status 0x1f00 |
| PSS: 2000MHz power 17000 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 14948 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 12974 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 11090 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 9292 control 0xc00 status 0xc00 |
| PSS: 1000MHz power 7556 control 0xa00 status 0xa00 |
| PSS: 800MHz power 5902 control 0x800 status 0x800 |
| PSS: 2001MHz power 17000 control 0x1f00 status 0x1f00 |
| PSS: 2000MHz power 17000 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 14948 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 12974 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 11090 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 9292 control 0xc00 status 0xc00 |
| PSS: 1000MHz power 7556 control 0xa00 status 0xa00 |
| PSS: 800MHz power 5902 control 0x800 status 0x800 |
| PSS: 2001MHz power 17000 control 0x1f00 status 0x1f00 |
| PSS: 2000MHz power 17000 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 14948 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 12974 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 11090 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 9292 control 0xc00 status 0xc00 |
| PSS: 1000MHz power 7556 control 0xa00 status 0xa00 |
| PSS: 800MHz power 5902 control 0x800 status 0x800 |
| \_SB.PCI0.LPCB.TPM: LPC TPM PNP: 0c31.0 |
| ACPI: added table 2/32, length now 44 |
| ACPI: * MCFG |
| ACPI: added table 3/32, length now 48 |
| ACPI: * TCPA |
| TCPA log created at 7ff02000 |
| ACPI: added table 4/32, length now 52 |
| ACPI: * MADT |
| ACPI: added table 5/32, length now 56 |
| current = 7ff17fd0 |
| ACPI: * DMAR |
| ACPI: added table 6/32, length now 60 |
| current = 7ff18080 |
| GET_VBIOS: aa55 8086 0 0 3 |
| ... VBIOS found at 000c0000 |
| ACPI: * HPET |
| ACPI: added table 7/32, length now 64 |
| ACPI: done. |
| ACPI tables: 28864 bytes. |
| smbios_write_tables: 7ff01000 |
| memalign Enter, boundary 8, size 30, free_mem_ptr 7ffd4b38 |
| memalign 7ffd4b38 |
| EC Firmware ID IBM ThinkPad Embedded Controller -[GDHTB3WW ]-, Version 1.73A |
| Create SMBIOS type 17 |
| Root Device (LENOVO ThinkPad S230U (Twist)) |
| CPU_CLUSTER: 0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| APIC: 00 (unknown) |
| APIC: acac (Intel SandyBridge/IvyBridge CPU) |
| DOMAIN: 0000 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:00.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:01.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:02.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:14.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:19.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1a.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1b.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.4 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.7 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1d.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1e.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PNP: 0c31.0 (LPC TPM) |
| PCI: 00:1f.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| I2C: 01:54 (AT24RF08C) |
| I2C: 01:55 (AT24RF08C) |
| I2C: 01:56 (AT24RF08C) |
| I2C: 01:57 (AT24RF08C) |
| I2C: 01:5c (AT24RF08C) |
| I2C: 01:5d (AT24RF08C) |
| I2C: 01:5e (AT24RF08C) |
| I2C: 01:5f (AT24RF08C) |
| PCI: 00:1f.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:04.0 (unknown) |
| PCI: 01:00.0 (unknown) |
| PCI: 02:00.0 (unknown) |
| Unknown device path type: 0 |
| (unknown) |
| PCI: 03:00.0 (unknown) |
| Unknown device path type: 0 |
| (unknown) |
| APIC: 01 (unknown) |
| APIC: 02 (unknown) |
| APIC: 03 (unknown) |
| SMBIOS tables: 511 bytes. |
| Writing table forward entry at 0x00000500 |
| Wrote coreboot table at: 00000500, 0x10 bytes, checksum feb |
| Writing coreboot table at 0x7ff37000 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4b56 |
| memalign 7ffd4b58 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4b70 |
| memalign 7ffd4b70 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4b88 |
| memalign 7ffd4b88 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4ba0 |
| memalign 7ffd4ba0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4bb8 |
| memalign 7ffd4bb8 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4bd0 |
| memalign 7ffd4bd0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4be8 |
| memalign 7ffd4be8 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4c00 |
| memalign 7ffd4c00 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4c18 |
| memalign 7ffd4c18 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4c30 |
| memalign 7ffd4c30 |
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1. 0000000000001000-000000000009ffff: RAM |
| 2. 00000000000a0000-00000000000fffff: RESERVED |
| 3. 0000000000100000-000000007ff00fff: RAM |
| 4. 000000007ff01000-000000007fffffff: CONFIGURATION TABLES |
| 5. 0000000080000000-00000000829fffff: RESERVED |
| 6. 00000000f0000000-00000000f3ffffff: RESERVED |
| 7. 00000000fed40000-00000000fed44fff: RESERVED |
| 8. 00000000fed90000-00000000fed91fff: RESERVED |
| 9. 0000000100000000-000000027d5fffff: RAM |
| read 6008 from 07e4 |
| wrote 00000004 to 0890 |
| read 02040103 from 0894 |
| read 00000000 from 0880 |
| wrote 00000000 to 0880 |
| read 00000000 from 07e8 |
| wrote 00000000 to 07e8 |
| wrote 00001000 to 0890 |
| read 6490001c from 0894 |
| flash size 0xc00000 bytes |
| SF: Detected Opaque HW-sequencing with sector size 0x1000, total 0xc00000 |
| CBFS: 'Master Header Locator' located CBFS at [800100:bfffc0) |
| FMAP: Found "FLASH" version 1.1 at 800000. |
| FMAP: base = ff400000 size = c00000 #areas = 3 |
| Wrote coreboot table at: 7ff37000, 0x384 bytes, checksum 681c |
| coreboot table: 924 bytes. |
| IMD ROOT 0. 7ffff000 00001000 |
| IMD SMALL 1. 7fffe000 00001000 |
| CONSOLE 2. 7ffde000 00020000 |
| TIME STAMP 3. 7ffdd000 00000400 |
| ROMSTG STCK 4. 7ffd8000 00005000 |
| RAMSTAGE 5. 7ff93000 00045000 |
| 57a9e100 6. 7ff4f000 00043970 |
| SMM BACKUP 7. 7ff3f000 00010000 |
| COREBOOT 8. 7ff37000 00008000 |
| ACPI 9. 7ff13000 00024000 |
| ACPI GNVS 10. 7ff12000 00001000 |
| TCPA LOG 11. 7ff02000 00010000 |
| SMBIOS 12. 7ff01000 00000800 |
| IMD small region: |
| IMD ROOT 0. 7fffec00 00000400 |
| CAR GLOBALS 1. 7fffeac0 00000140 |
| MEM INFO 2. 7fffe960 00000141 |
| ROMSTAGE 3. 7fffe940 00000004 |
| 57a9e000 4. 7fffe920 00000018 |
| BS: BS_WRITE_TABLES times (us): entry 0 run 24886 exit 0 |
| POST: 0x7a |
| CBFS: 'Master Header Locator' located CBFS at [800100:bfffc0) |
| CBFS: Locating 'fallback/payload' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 14fec |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 15100 |
| CBFS: File @ offset 15100 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 15100 |
| CBFS: Checking offset 1a980 |
| CBFS: File @ offset 1a980 size 333 |
| CBFS: Unmatched 'config' at 1a980 |
| CBFS: Checking offset 1ad00 |
| CBFS: File @ offset 1ad00 size 240 |
| CBFS: Unmatched 'revision' at 1ad00 |
| CBFS: Checking offset 1af80 |
| CBFS: File @ offset 1af80 size 900 |
| CBFS: Unmatched 'spd.bin' at 1af80 |
| CBFS: Checking offset 1b8c0 |
| CBFS: File @ offset 1b8c0 size 32a1 |
| CBFS: Unmatched 'fallback/dsdt.aml' at 1b8c0 |
| CBFS: Checking offset 1ebc0 |
| CBFS: File @ offset 1ebc0 size 1213 |
| CBFS: Unmatched 'grub.cfg' at 1ebc0 |
| CBFS: Checking offset 1fe40 |
| CBFS: File @ offset 1fe40 size 58 |
| CBFS: Unmatched '' at 1fe40 |
| CBFS: Checking offset 1fec0 |
| CBFS: File @ offset 1fec0 size 10000 |
| CBFS: Unmatched 'mrc.cache' at 1fec0 |
| CBFS: Checking offset 2ff00 |
| CBFS: File @ offset 2ff00 size 16e77 |
| CBFS: Unmatched 'fallback/ramstage' at 2ff00 |
| CBFS: Checking offset 46dc0 |
| CBFS: File @ offset 46dc0 size 2255c |
| CBFS: Unmatched 'img/nvramcui' at 46dc0 |
| CBFS: Checking offset 69380 |
| CBFS: File @ offset 69380 size 8e0ad |
| CBFS: Found @ offset 69380 size 8e0ad |
| Loading segment from ROM address 0xffc694b8 |
| code (compression=1) |
| memalign Enter, boundary 8, size 28, free_mem_ptr 7ffd4c48 |
| memalign 7ffd4c48 |
| New segment dstaddr 0x8200 memsize 0x17824 srcaddr 0xffc6950c filesize 0x83b7 |
| Loading segment from ROM address 0xffc694d4 |
| code (compression=1) |
| memalign Enter, boundary 8, size 28, free_mem_ptr 7ffd4c64 |
| memalign 7ffd4c68 |
| New segment dstaddr 0x100000 memsize 0x205be0 srcaddr 0xffc718c3 filesize 0x85ca2 |
| Loading segment from ROM address 0xffc694f0 |
| Entry Point 0x00008200 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4c84 |
| memalign 7ffd4c88 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4ca0 |
| memalign 7ffd4ca0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4cb8 |
| memalign 7ffd4cb8 |
| Loading Segment: addr: 0x0000000000008200 memsz: 0x0000000000017824 filesz: 0x00000000000083b7 |
| lb: [0x000000007ff94000, 0x000000007ffd7970) |
| Post relocation: addr: 0x0000000000008200 memsz: 0x0000000000017824 filesz: 0x00000000000083b7 |
| using LZMA |
| [ 0x00008200, 00017feb, 0x0001fa24) <- ffc6950c |
| Clearing Segment: addr: 0x0000000000017feb memsz: 0x0000000000007a39 |
| dest 00008200, end 0001fa24, bouncebuffer ffffffff |
| Loading Segment: addr: 0x0000000000100000 memsz: 0x0000000000205be0 filesz: 0x0000000000085ca2 |
| lb: [0x000000007ff94000, 0x000000007ffd7970) |
| Post relocation: addr: 0x0000000000100000 memsz: 0x0000000000205be0 filesz: 0x0000000000085ca2 |
| using LZMA |
| [ 0x00100000, 00305be0, 0x00305be0) <- ffc718c3 |
| dest 00100000, end 00305be0, bouncebuffer ffffffff |
| Loaded segments |
| BS: BS_PAYLOAD_LOAD times (us): entry 0 run 310198 exit 0 |
| POST: 0x7b |
| PCH watchdog disabled |
| Jumping to boot code at 00008200(7ff37000) |
| POST: 0xf8 |
| CPU0: stack: 7ffcd000 - 7ffce000, lowest used address 7ffcd880, stack used: 1920 bytes |
| error: file `/background.jpg' not found. |
|
error: file `/dejavusansmono.pf2' not found. |
|
error: file `/boot/grub/layouts/usqwerty.gkb' not found. |
|
GNU GRUB version 2.02-2 |
|
|
|
+----------------------------------------------------------------------------+||||||||||||||||||||||+----------------------------------------------------------------------------+ Use the ^ and v keys to select which entry is highlighted. |
|
Press enter to boot the selected OS, `e' to edit the commands |
|
before booting or `c' for a command-line. ESC to return |
|
previous menu. *Load Operating System (incl. fully encrypted disks) [o] ? Search ISOLINUX menu (AHCI) [a] ? Search ISOLINUX menu (USB) [u] ? Search ISOLINUX menu (CD/DVD) [d] ? Load test configuration (grubtest.cfg) inside of CBFS [t] ? Search for GRUB2 configuration on external media [s] ? Poweroff [p] ? Reboot [r] ? ? ? ? The highlighted entry will be executed automatically in 1s. The highlighted entry will be executed automatically in 0s. error: file `/boot/grub/fonts/unicode.pf2' not found. |
|
|