| |
| |
| coreboot-4.5-964-gd96669e9db Sat Feb 11 13:58:51 UTC 2017 romstage starting... |
| Initial stack pointer: 000dffb8 |
| CPU APICID 00 start flag set |
| BSP Family_Model: 00600f12 |
| *sysinfo range: [000c2d20,000cd28c] |
| bsp_apicid = 00 |
| cpu_init_detectedx = 00000000 |
| sb700 reset flags: 0004 |
| CBFS: 'Master Header Locator' located CBFS at [100:7fffc0) |
| CBFS: Locating 'microcode_amd.bin' |
| CBFS: Found @ offset 6bd40 size 318c |
| CBFS: 'Master Header Locator' located CBFS at [100:7fffc0) |
| CBFS: Locating 'microcode_amd_fam15h.bin' |
| CBFS: Found @ offset 2dd00 size 1ec4 |
| [microcode] patch id to apply = 0x0600063d |
| [microcode] updated to patch id = 0x0600063d success |
| cpuSetAMDMSR done |
| Enter amd_ht_init() |
| AMD_CB_EventNotify(): INFO: HT_EVENT_COH_NODE_DISCOVERED: node 0 link 2 new node: 1 |
| AMD_CB_EventNotify(): INFO: HT_EVENT_COH_NODE_DISCOVERED: node 0 link 0 new node: 2 |
| AMD_CB_EventNotify(): INFO: HT_EVENT_COH_NODE_DISCOVERED: node 0 link 3 new node: 3 |
| Forcing HT links to isochronous mode due to enabled IOMMU |
| Exit amd_ht_init() |
| amd_ht_fixup() |
| amd_ht_fixup(): node 0 (internal node ID 0): disabling defective HT link (L3 connected: 1) |
| amd_ht_fixup(): node 1 (internal node ID 1): disabling defective HT link (L3 connected: 1) |
| amd_ht_fixup(): node 2 (internal node ID 0): disabling defective HT link (L3 connected: 1) |
| amd_ht_fixup(): node 3 (internal node ID 1): disabling defective HT link (L3 connected: 1) |
| cpuSetAMDPCI 00 done |
| cpuSetAMDPCI 01 done |
| cpuSetAMDPCI 02 done |
| cpuSetAMDPCI 03 done |
| Prep FID/VID Node:00 |
| F3x80: e20be281 |
| F3x84: 01e200e2 |
| F3xD4: c3312f17 |
| F3xD8: 03000016 |
| F3xDC: 05475634 |
| Prep FID/VID Node:01 |
| F3x80: e20be281 |
| F3x84: 01e200e2 |
| F3xD4: c3312f17 |
| F3xD8: 03000016 |
| F3xDC: 05475634 |
| Prep FID/VID Node:02 |
| F3x80: e20be281 |
| F3x84: 01e200e2 |
| F3xD4: c3312f17 |
| F3xD8: 03000016 |
| F3xDC: 05475632 |
| Prep FID/VID Node:03 |
| F3x80: e20be281 |
| F3x84: 01e200e2 |
| F3xD4: c3312f17 |
| F3xD8: 03000016 |
| F3xDC: 05475632 |
| setup_remote_node: 01 done |
| Start node 01 done. |
| setup_remote_node: 02 done |
| Start node 02 done. |
| setup_remote_node: 03 done |
| Start node 03 done. |
| core0 started: 01 02 03 |
| sr5650_early_setup() |
| get_cpu_rev EAX=0x600f12. |
| CPU Rev is Fam 15. |
| NB Revision is A12. |
| fam10_optimization() |
| sr5650_por_init |
| Enabling IOMMU |
| sb700_early_setup() |
| sb700_devices_por_init() |
| sb700_devices_por_init(): SMBus Device, BDF:0-20-0 |
| SMBus controller enabled, sb revision is A15 |
| sb700_devices_por_init: Disabling ISA DMA support |
| sb700_devices_por_init(): IDE Device, BDF:0-20-1 |
| sb700_devices_por_init(): LPC Device, BDF:0-20-3 |
| sb700_devices_por_init(): P2P Bridge, BDF:0-20-4 |
| sb700_devices_por_init(): SATA Device, BDF:0-17-0 |
| sb700_pmio_por_init() |
| start_other_cores() |
| init node: 00 cores: 07 pass 1 |
| Start other core - nodeid: 00 cores: 07 |
| get_boot_apic_id: using 2 as APIC ID for node 0, core 2 |
| get_boot_apic_id: using 4 as APIC ID for node 0, core 4 |
| get_boot_apic_id: using 6 as APIC ID for node 0, core 6 |
| init node: 01 cores: 07 pass 1 |
| Start other core - nodeid: 01 cores: 07 |
| get_boot_apic_id: usi |
| |
| *** Log truncated, 563276 characters dropped. *** |
| |
| amdmct_cbmem_store_info: Storing AMDMCT configuration in CBMEM |
| disable_spd() |
| CBFS: 'Master Header Locator' located CBFS at [100:7fffc0) |
| CBFS: Locating 'fallback/ramstage' |
| CBFS: Found @ offset 3ff00 size 15781 |
| |
| |
| coreboot-4.5-964-gd96669e9db Sat Feb 11 13:58:51 UTC 2017 ramstage starting... |
| Moving GDT to bfffe9e0...ok |
| Normal boot. |
| BS: BS_PRE_DEVICE times (us): entry 0 run 1 exit 0 |
| BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 1 exit 0 |
| Enumerating buses... |
| Show all devs... Before device enumeration. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:18.0: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:00.1: enabled 1 |
| PCI: 00:00.2: enabled 1 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:03.0: enabled 0 |
| PCI: 00:04.0: enabled 1 |
| PCI: 00:05.0: enabled 0 |
| PCI: 00:06.0: enabled 0 |
| PCI: 00:07.0: enabled 0 |
| PCI: 00:08.0: enabled 0 |
| PCI: 00:09.0: enabled 1 |
| PCI: 00:0a.0: enabled 1 |
| PCI: 00:0b.0: enabled 1 |
| PCI: 00:0c.0: enabled 1 |
| PCI: 00:0d.0: enabled 1 |
| PCI: 00:11.0: enabled 1 |
| PCI: 00:12.0: enabled 1 |
| PCI: 00:12.1: enabled 1 |
| PCI: 00:12.2: enabled 1 |
| PCI: 00:13.0: enabled 1 |
| PCI: 00:13.1: enabled 1 |
| PCI: 00:13.2: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| I2C: 00:50: enabled 1 |
| I2C: 00:51: enabled 1 |
| I2C: 00:52: enabled 1 |
| I2C: 00:53: enabled 1 |
| I2C: 00:54: enabled 1 |
| I2C: 00:55: enabled 1 |
| I2C: 00:56: enabled 1 |
| I2C: 00:57: enabled 1 |
| I2C: 00:2f: enabled 1 |
| PCI: 00:14.1: enabled 1 |
| PCI: 00:14.2: enabled 1 |
| PCI: 00:14.3: enabled 1 |
| PNP: 002e.0: enabled 0 |
| PNP: 002e.1: enabled 0 |
| PNP: 002e.2: enabled 1 |
| PNP: 002e.3: enabled 1 |
| PNP: 002e.5: enabled 1 |
| PNP: 002e.106: enabled 0 |
| PNP: 002e.107: enabled 0 |
| PNP: 002e.207: enabled 0 |
| PNP: 002e.307: enabled 0 |
| PNP: 002e.407: enabled 0 |
| PNP: 002e.8: enabled 0 |
| PNP: 002e.108: enabled 0 |
| PNP: 002e.9: enabled 0 |
| PNP: 002e.109: enabled 0 |
| PNP: 002e.209: enabled 0 |
| PNP: 002e.309: enabled 0 |
| PNP: 002e.a: enabled 1 |
| PNP: 002e.b: enabled 1 |
| PNP: 002e.c: enabled 0 |
| PNP: 002e.d: enabled 0 |
| PNP: 002e.f: enabled 0 |
| PNP: 004e.0: enabled 1 |
| PCI: 00:14.4: enabled 1 |
| PCI: 00:01.0: enabled 1 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:03.0: enabled 1 |
| PCI: 00:14.5: enabled 1 |
| PCI: 00:18.1: enabled 1 |
| PCI: 00:18.2: enabled 1 |
| PCI: 00:18.3: enabled 1 |
| PCI: 00:18.4: enabled 1 |
| PCI: 00:18.5: enabled 1 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:19.1: enabled 1 |
| PCI: 00:19.2: enabled 1 |
| PCI: 00:19.3: enabled 1 |
| PCI: 00:19.4: enabled 1 |
| PCI: 00:19.5: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1a.1: enabled 1 |
| PCI: 00:1a.2: enabled 1 |
| PCI: 00:1a.3: enabled 1 |
| PCI: 00:1a.4: enabled 1 |
| PCI: 00:1a.5: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1b.1: enabled 1 |
| PCI: 00:1b.2: enabled 1 |
| PCI: 00:1b.3: enabled 1 |
| PCI: 00:1b.4: enabled 1 |
| PCI: 00:1b.5: enabled 1 |
| Compare with tree... |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:18.0: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:00.1: enabled 1 |
| PCI: 00:00.2: enabled 1 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:03.0: enabled 0 |
| PCI: 00:04.0: enabled 1 |
| PCI: 00:05.0: enabled 0 |
| PCI: 00:06.0: enabled 0 |
| PCI: 00:07.0: enabled 0 |
| PCI: 00:08.0: enabled 0 |
| PCI: 00:09.0: enabled 1 |
| PCI: 00:0a.0: enabled 1 |
| PCI: 00:0b.0: enabled 1 |
| PCI: 00:0c.0: enabled 1 |
| PCI: 00:0d.0: enabled 1 |
| PCI: 00:11.0: enabled 1 |
| PCI: 00:12.0: enabled 1 |
| PCI: 00:12.1: enabled 1 |
| PCI: 00:12.2: enabled 1 |
| PCI: 00:13.0: enabled 1 |
| PCI: 00:13.1: enabled 1 |
| PCI: 00:13.2: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| I2C: 00:50: enabled 1 |
| I2C: 00:51: enabled 1 |
| I2C: 00:52: enabled 1 |
| I2C: 00:53: enabled 1 |
| I2C: 00:54: enabled 1 |
| I2C: 00:55: enabled 1 |
| I2C: 00:56: enabled 1 |
| I2C: 00:57: enabled 1 |
| I2C: 00:2f: enabled 1 |
| PCI: 00:14.1: enabled 1 |
| PCI: 00:14.2: enabled 1 |
| PCI: 00:14.3: enabled 1 |
| PNP: 002e.0: enabled 0 |
| PNP: 002e.1: enabled 0 |
| PNP: 002e.2: enabled 1 |
| PNP: 002e.3: enabled 1 |
| PNP: 002e.5: enabled 1 |
| PNP: 002e.106: enabled 0 |
| PNP: 002e.107: enabled 0 |
| PNP: 002e.207: enabled 0 |
| PNP: 002e.307: enabled 0 |
| PNP: 002e.407: enabled 0 |
| PNP: 002e.8: enabled 0 |
| PNP: 002e.108: enabled 0 |
| PNP: 002e.9: enabled 0 |
| PNP: 002e.109: enabled 0 |
| PNP: 002e.209: enabled 0 |
| PNP: 002e.309: enabled 0 |
| PNP: 002e.a: enabled 1 |
| PNP: 002e.b: enabled 1 |
| PNP: 002e.c: enabled 0 |
| PNP: 002e.d: enabled 0 |
| PNP: 002e.f: enabled 0 |
| PNP: 004e.0: enabled 1 |
| PCI: 00:14.4: enabled 1 |
| PCI: 00:01.0: enabled 1 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:03.0: enabled 1 |
| PCI: 00:14.5: enabled 1 |
| PCI: 00:18.1: enabled 1 |
| PCI: 00:18.2: enabled 1 |
| PCI: 00:18.3: enabled 1 |
| PCI: 00:18.4: enabled 1 |
| PCI: 00:18.5: enabled 1 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:19.1: enabled 1 |
| PCI: 00:19.2: enabled 1 |
| PCI: 00:19.3: enabled 1 |
| PCI: 00:19.4: enabled 1 |
| PCI: 00:19.5: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1a.1: enabled 1 |
| PCI: 00:1a.2: enabled 1 |
| PCI: 00:1a.3: enabled 1 |
| PCI: 00:1a.4: enabled 1 |
| PCI: 00:1a.5: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1b.1: enabled 1 |
| PCI: 00:1b.2: enabled 1 |
| PCI: 00:1b.3: enabled 1 |
| PCI: 00:1b.4: enabled 1 |
| PCI: 00:1b.5: enabled 1 |
| Mainboard KGPE-D16 Enable. dev=0x0012db20 |
| mainboard_enable, TOP MEM: msr.lo = 0xc0000000, msr.hi = 0x00000000 |
| mainboard_enable, TOP MEM2: msr2.lo = 0x40000000, msr2.hi = 0x00000010 |
| Root Device scanning... |
| root_dev_scan_bus for Root Device |
| setup_bsp_ramtop, TOP MEM: msr.lo = 0xc0000000, msr.hi = 0x00000000 |
| setup_bsp_ramtop, TOP MEM2: msr.lo = 0x40000000, msr.hi = 0x00000010 |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| CPU_CLUSTER: 0 scanning... |
| PCI: 00:18.5 siblings=7 |
| CPU: APIC: 00 enabled |
| CPU: APIC: 01 enabled |
| CPU: APIC: 02 enabled |
| CPU: APIC: 03 enabled |
| CPU: APIC: 04 enabled |
| CPU: APIC: 05 enabled |
| CPU: APIC: 06 enabled |
| CPU: APIC: 07 enabled |
| PCI: 00:19.5 siblings=7 |
| CPU: APIC: 08 enabled |
| CPU: APIC: 09 enabled |
| CPU: APIC: 0a enabled |
| CPU: APIC: 0b enabled |
| CPU: APIC: 0c enabled |
| CPU: APIC: 0d enabled |
| CPU: APIC: 0e enabled |
| CPU: APIC: 0f enabled |
| PCI: 00:1a.5 siblings=7 |
| CPU: APIC: 20 enabled |
| CPU: APIC: 21 enabled |
| CPU: APIC: 22 enabled |
| CPU: APIC: 23 enabled |
| CPU: APIC: 24 enabled |
| CPU: APIC: 25 enabled |
| CPU: APIC: 26 enabled |
| CPU: APIC: 27 enabled |
| PCI: 00:1b.5 siblings=7 |
| CPU: APIC: 28 enabled |
| CPU: APIC: 29 enabled |
| CPU: APIC: 2a enabled |
| CPU: APIC: 2b enabled |
| CPU: APIC: 2c enabled |
| CPU: APIC: 2d enabled |
| CPU: APIC: 2e enabled |
| CPU: APIC: 2f enabled |
| scan_bus: scanning of bus CPU_CLUSTER: 0 took 54935 usecs |
| DOMAIN: 0000 scanning... |
| PCI: pci_scan_bus for bus 00 |
| PCI: 00:18.0 [1022/1600] bus ops |
| PCI: 00:18.0 [1022/1600] enabled |
| PCI: 00:18.1 [1022/1601] enabled |
| PCI: 00:18.2 [1022/1602] enabled |
| PCI: 00:18.3 [1022/1603] ops |
| PCI: 00:18.3 [1022/1603] enabled |
| PCI: 00:18.4 [1022/1604] ops |
| PCI: 00:18.4 [1022/1604] enabled |
| PCI: 00:18.5 [1022/1605] ops |
| PCI: 00:18.5 [1022/1605] enabled |
| PCI: 00:19.0 [1022/1600] bus ops |
| PCI: 00:19.0 [1022/1600] enabled |
| PCI: 00:19.1 [1022/1601] enabled |
| PCI: 00:19.2 [1022/1602] enabled |
| PCI: 00:19.3 [1022/1603] ops |
| PCI: 00:19.3 [1022/1603] enabled |
| PCI: 00:19.4 [1022/1604] ops |
| PCI: 00:19.4 [1022/1604] enabled |
| PCI: 00:19.5 [1022/1605] ops |
| PCI: 00:19.5 [1022/1605] enabled |
| PCI: 00:1a.0 [1022/1600] bus ops |
| PCI: 00:1a.0 [1022/1600] enabled |
| PCI: 00:1a.1 [1022/1601] enabled |
| PCI: 00:1a.2 [1022/1602] enabled |
| PCI: 00:1a.3 [1022/1603] ops |
| PCI: 00:1a.3 [1022/1603] enabled |
| PCI: 00:1a.4 [1022/1604] ops |
| PCI: 00:1a.4 [1022/1604] enabled |
| PCI: 00:1a.5 [1022/1605] ops |
| PCI: 00:1a.5 [1022/1605] enabled |
| PCI: 00:1b.0 [1022/1600] bus ops |
| PCI: 00:1b.0 [1022/1600] enabled |
| PCI: 00:1b.1 [1022/1601] enabled |
| PCI: 00:1b.2 [1022/1602] enabled |
| PCI: 00:1b.3 [1022/1603] ops |
| PCI: 00:1b.3 [1022/1603] enabled |
| PCI: 00:1b.4 [1022/1604] ops |
| PCI: 00:1b.4 [1022/1604] enabled |
| PCI: 00:1b.5 [1022/1605] ops |
| PCI: 00:1b.5 [1022/1605] enabled |
| PCI: 00:18.0 scanning... |
| do_hypertransport_scan_chain for bus 00 |
| sr5650_enable: dev=00130440, VID_DID=0x5a101002 |
| Bus-0, Dev-0, Fun-0. |
| enable_pcie_bar3 |
| sr5650_gpp_sb_init: nb_dev=0x00130440, dev=0x0012fea0, port=0x8 |
| PciePowerOffGppPorts() port 8 |
| NB_PCI_REG04 = 2. |
| NB_PCI_REG84 = 3000010. |
| NB_PCI_REG4C = 52042. |
| Sysmem TOM = 0_c0000000 |
| Sysmem TOM2 = 10_40000000 |
| PCI: 00:00.0 [1002/5a10] ops |
| PCI: 00:00.0 [1002/5a10] enabled |
| Capability: type 0x08 @ 0xf0 |
| flags: 0xa803 |
| Capability: type 0x08 @ 0xf0 |
| Capability: type 0x08 @ 0xc4 |
| flags: 0x0280 |
| PCI: 00:00.0 count: 0014 static_count: 0015 |
| PCI: 00:00.0 [1002/5a10] enabled next_unitid: 0015 |
| PCI: pci_scan_bus for bus 00 |
| sr5650_enable: dev=00130440, VID_DID=0x5a101002 |
| Bus-0, Dev-0, Fun-0. |
| enable_pcie_bar3 |
| sr5650_gpp_sb_init: nb_dev=0x00130440, dev=0x0012fea0, port=0x8 |
| PciePowerOffGppPorts() port 8 |
| NB_PCI_REG04 = 2. |
| NB_PCI_REG84 = 3000010. |
| NB_PCI_REG4C = 52042. |
| Sysmem TOM = 0_c0000000 |
| Sysmem TOM2 = 10_40000000 |
| PCI: 00:00.0 [1002/5a10] enabled |
| sr5650_enable: dev=001303a0, VID_DID=0xffffffff |
| Bus-0, Dev-0, Fun-1. |
| PCI: Static device PCI: 00:00.1 not found, disabling it. |
| sr5650_enable: dev=00130300, VID_DID=0x5a231002 |
| Bus-0, Dev-0, Fun-2. |
| PCI: 00:00.2 [1002/5a23] ops |
| PCI: 00:00.2 [1002/5a23] enabled |
| sr5650_enable: dev=00130260, VID_DID=0xffffffff |
| Bus-0, Dev-2,3, Fun-0. enable=1 |
| sr5650_gpp_sb_init: nb_dev=0x00130440, dev=0x00130260, port=0x2 |
| PcieLinkTraining port=2:lc current state=2030400 |
| sr5650_gpp_sb_init: port=0x2 hw_port=0x2 result=0 |
| PciePowerOffGppPorts() port 2 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Capability: type 0x05 @ 0xa0 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0xb8 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Capability: type 0x05 @ 0xa0 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0xb8 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Capability: type 0x05 @ 0xa0 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0xb8 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| PCI: 00:02.0 subordinate bus PCI Express |
| PCI: 00:02.0 [1002/5a16] enabled |
| sr5650_enable: dev=001301c0, VID_DID=0xffffffff |
| Bus-0, Dev-2,3, Fun-0. enable=0 |
| sr5650_enable: dev=00130120, VID_DID=0xffffffff |
| enable_pcie_bar3 |
| Bus-0, Dev-4,5,6,7, Fun-0. enable=1 |
| sr5650_gpp_sb_init: nb_dev=0x00130440, dev=0x00130120, port=0x4 |
| PcieLinkTraining port=4:lc current state=2030400 |
| sr5650_gpp_sb_init: port=0x4 hw_port=0x4 result=0 |
| PciePowerOffGppPorts() port 4 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Capability: type 0x05 @ 0xa0 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0xb8 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Capability: type 0x05 @ 0xa0 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0xb8 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Capability: type 0x05 @ 0xa0 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0xb8 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| PCI: 00:04.0 subordinate bus PCI Express |
| PCI: 00:04.0 [1002/5a18] enabled |
| sr5650_enable: dev=00130080, VID_DID=0xffffffff |
| enable_pcie_bar3 |
| Bus-0, Dev-4,5,6,7, Fun-0. enable=0 |
| sr5650_enable: dev=0012ffe0, VID_DID=0xffffffff |
| enable_pcie_bar3 |
| Bus-0, Dev-4,5,6,7, Fun-0. enable=0 |
| sr5650_enable: dev=0012ff40, VID_DID=0xffffffff |
| enable_pcie_bar3 |
| Bus-0, Dev-4,5,6,7, Fun-0. enable=0 |
| sr5650_enable: dev=0012fea0, VID_DID=0xffffffff |
| Bus-0, Dev-8, Fun-0. enable=0 |
| disable_pcie_bar3 |
| sr5650_enable: dev=0012fe00, VID_DID=0xffffffff |
| Bus-0, Dev-9, 10, Fun-0. enable=1 |
| enable_pcie_bar3 |
| sr5650_gpp_sb_init: nb_dev=0x00130440, dev=0x0012fe00, port=0x9 |
| PcieLinkTraining port=5:lc current state=a0b0f10 |
| addr=c0000000,bus=0,devfn=48 |
| PcieTrainPort reg=0x10000 |
| sr5650_gpp_sb_init: port=0x9 hw_port=0x5 result=1 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Capability: type 0x05 @ 0xa0 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0xb8 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Capability: type 0x05 @ 0xa0 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0xb8 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Capability: type 0x05 @ 0xa0 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0xb8 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| PCI: 00:09.0 subordinate bus PCI Express |
| PCI: 00:09.0 [1002/5a1c] enabled |
| sr5650_enable: dev=0012fd60, VID_DID=0xffffffff |
| Bus-0, Dev-9, 10, Fun-0. enable=1 |
| enable_pcie_bar3 |
| sr5650_gpp_sb_init: nb_dev=0x00130440, dev=0x0012fd60, port=0xa |
| PcieLinkTraining port=6:lc current state=a0b0f10 |
| addr=c0000000,bus=0,devfn=50 |
| PcieTrainPort reg=0x10000 |
| sr5650_gpp_sb_init: port=0xa hw_port=0x6 result=1 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Capability: type 0x05 @ 0xa0 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0xb8 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Capability: type 0x05 @ 0xa0 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0xb8 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Capability: type 0x05 @ 0xa0 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0xb8 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| PCI: 00:0a.0 subordinate bus PCI Express |
| PCI: 00:0a.0 [1002/5a1d] enabled |
| sr5650_enable: dev=0012fcc0, VID_DID=0xffffffff |
| Bus-0, Dev-11,12, Fun-0. enable=1 |
| sr5650_gpp_sb_init: nb_dev=0x00130440, dev=0x0012fcc0, port=0xb |
| PcieLinkTraining port=b:lc current state=a0b0f10 |
| addr=c0000000,bus=0,devfn=58 |
| PcieTrainPort reg=0x10000 |
| sr5650_gpp_sb_init: port=0xb hw_port=0xb result=1 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Capability: type 0x05 @ 0xa0 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0xb8 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Capability: type 0x05 @ 0xa0 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0xb8 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Capability: type 0x05 @ 0xa0 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0xb8 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| PCI: 00:0b.0 subordinate bus PCI Express |
| PCI: 00:0b.0 [1002/5a1f] enabled |
| sr5650_enable: dev=0012fc20, VID_DID=0xffffffff |
| Bus-0, Dev-11,12, Fun-0. enable=1 |
| sr5650_gpp_sb_init: nb_dev=0x00130440, dev=0x0012fc20, port=0xc |
| PcieLinkTraining port=c:lc current state=3050607 |
| sr5650_gpp_sb_init: port=0xc hw_port=0xc result=1 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Capability: type 0x05 @ 0xa0 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0xb8 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Capability: type 0x05 @ 0xa0 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0xb8 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Capability: type 0x05 @ 0xa0 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0xb8 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| PCI: 00:0c.0 subordinate bus PCI Express |
| PCI: 00:0c.0 [1002/5a20] enabled |
| sr5650_enable: dev=0012fb80, VID_DID=0xffffffff |
| sr5650_gpp_sb_init: nb_dev=0x00130440, dev=0x0012fb80, port=0xd |
| PcieLinkTraining port=d:lc current state=a0b0f10 |
| addr=c0000000,bus=0,devfn=68 |
| PcieTrainPort reg=0x10000 |
| sr5650_gpp_sb_init: port=0xd hw_port=0xd result=1 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Capability: type 0x05 @ 0xa0 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0xb8 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Capability: type 0x05 @ 0xa0 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0xb8 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Capability: type 0x05 @ 0xa0 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0xb8 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| PCI: 00:0d.0 subordinate bus PCI Express |
| PCI: 00:0d.0 [1002/5a1e] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:11.0 [1002/4390] ops |
| PCI: 00:11.0 [1002/4390] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:12.0 [1002/4397] ops |
| PCI: 00:12.0 [1002/4397] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:12.1 [1002/4398] ops |
| PCI: 00:12.1 [1002/4398] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:12.2 [1002/4396] ops |
| PCI: 00:12.2 [1002/4396] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:13.0 [1002/4397] ops |
| PCI: 00:13.0 [1002/4397] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:13.1 [1002/4398] ops |
| PCI: 00:13.1 [1002/4398] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:13.2 [1002/4396] ops |
| PCI: 00:13.2 [1002/4396] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:14.0 [1002/4385] bus ops |
| PCI: 00:14.0 [1002/4385] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:14.1 [1002/439c] ops |
| PCI: 00:14.1 [1002/439c] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:14.2 [1002/4383] ops |
| PCI: 00:14.2 [1002/4383] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:14.3 [1002/439d] bus ops |
| PCI: 00:14.3 [1002/439d] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:14.4 [1002/4384] bus ops |
| PCI: 00:14.4 [1002/4384] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:14.5 [1002/4399] ops |
| PCI: 00:14.5 [1002/4399] enabled |
| PCI: 00:02.0 scanning... |
| do_pci_scan_bridge for PCI: 00:02.0 |
| PCI: pci_scan_bus for bus 01 |
| scan_bus: scanning of bus PCI: 00:02.0 took 5853 usecs |
| PCI: 00:04.0 scanning... |
| do_pci_scan_bridge for PCI: 00:04.0 |
| PCI: pci_scan_bus for bus 02 |
| scan_bus: scanning of bus PCI: 00:04.0 took 5854 usecs |
| PCI: 00:09.0 scanning... |
| do_pci_scan_bridge for PCI: 00:09.0 |
| PCI: pci_scan_bus for bus 03 |
| PCI: 03:00.0 [8086/10d3] enabled |
| Capability: type 0x01 @ 0xc8 |
| Capability: type 0x05 @ 0xd0 |
| Capability: type 0x10 @ 0xe0 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpointASPM: Enabled None |
| scan_bus: scanning of bus PCI: 00:09.0 took 23546 usecs |
| PCI: 00:0a.0 scanning... |
| do_pci_scan_bridge for PCI: 00:0a.0 |
| PCI: pci_scan_bus for bus 04 |
| PCI: 04:00.0 [8086/10d3] enabled |
| Capability: type 0x01 @ 0xc8 |
| Capability: type 0x05 @ 0xd0 |
| Capability: type 0x10 @ 0xe0 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpointASPM: Enabled None |
| scan_bus: scanning of bus PCI: 00:0a.0 took 23546 usecs |
| PCI: 00:0b.0 scanning... |
| do_pci_scan_bridge for PCI: 00:0b.0 |
| PCI: pci_scan_bus for bus 05 |
| PCI: 05:00.0 [10de/1380] enabled |
| PCI: 05:00.1 [10de/0fbc] enabled |
| Capability: type 0x01 @ 0x60 |
| Capability: type 0x05 @ 0x68 |
| Capability: type 0x10 @ 0x78 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s |
| Capability: type 0x01 @ 0x60 |
| Capability: type 0x05 @ 0x68 |
| Capability: type 0x10 @ 0x78 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s |
| scan_bus: scanning of bus PCI: 00:0b.0 took 36105 usecs |
| PCI: 00:0c.0 scanning... |
| do_pci_scan_bridge for PCI: 00:0c.0 |
| PCI: pci_scan_bus for bus 06 |
| scan_bus: scanning of bus PCI: 00:0c.0 took 5854 usecs |
| PCI: 00:0d.0 scanning... |
| do_pci_scan_bridge for PCI: 00:0d.0 |
| PCI: pci_scan_bus for bus 07 |
| PCI: 07:00.0 [1912/0014] enabled |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x05 @ 0x70 |
| Capability: type 0x11 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| scan_bus: scanning of bus PCI: 00:0d.0 took 23310 usecs |
| PCI: 00:14.0 scanning... |
| scan_smbus for PCI: 00:14.0 |
| smbus: PCI: 00:14.0[0]->I2C: 01:50 enabled |
| smbus: PCI: 00:14.0[0]->I2C: 01:51 enabled |
| smbus: PCI: 00:14.0[0]->I2C: 01:52 enabled |
| smbus: PCI: 00:14.0[0]->I2C: 01:53 enabled |
| smbus: PCI: 00:14.0[0]->I2C: 01:54 enabled |
| smbus: PCI: 00:14.0[0]->I2C: 01:55 enabled |
| smbus: PCI: 00:14.0[0]->I2C: 01:56 enabled |
| smbus: PCI: 00:14.0[0]->I2C: 01:57 enabled |
| smbus: PCI: 00:14.0[0]->I2C: 01:2f enabled |
| scan_smbus for PCI: 00:14.0 done |
| scan_bus: scanning of bus PCI: 00:14.0 took 30474 usecs |
| PCI: 00:14.3 scanning... |
| scan_lpc_bus for PCI: 00:14.3 |
| PNP: 002e.0 disabled |
| PNP: 002e.1 disabled |
| PNP: 002e.2 enabled |
| PNP: 002e.3 enabled |
| PNP: 002e.5 enabled |
| PNP: 002e.106 disabled |
| PNP: 002e.107 disabled |
| PNP: 002e.207 disabled |
| PNP: 002e.307 disabled |
| PNP: 002e.407 disabled |
| PNP: 002e.8 disabled |
| PNP: 002e.108 disabled |
| PNP: 002e.9 disabled |
| PNP: 002e.109 disabled |
| PNP: 002e.209 disabled |
| PNP: 002e.309 disabled |
| PNP: 002e.a enabled |
| PNP: 002e.b enabled |
| PNP: 002e.c disabled |
| PNP: 002e.d disabled |
| PNP: 002e.f disabled |
| PNP: 004e.0 enabled |
| scan_lpc_bus for PCI: 00:14.3 done |
| scan_bus: scanning of bus PCI: 00:14.3 took 37438 usecs |
| PCI: 00:14.4 scanning... |
| do_pci_scan_bridge for PCI: 00:14.4 |
| PCI: pci_scan_bus for bus 08 |
| sb7xx_51xx_enable() |
| PCI: Static device PCI: 08:01.0 not found, disabling it. |
| sb7xx_51xx_enable() |
| PCI: 08:02.0 [11c1/5811] enabled |
| sb7xx_51xx_enable() |
| PCI: Static device PCI: 08:03.0 not found, disabling it. |
| scan_bus: scanning of bus PCI: 00:14.4 took 19213 usecs |
| scan_bus: scanning of bus PCI: 00:18.0 took 1741397 usecs |
| PCI: 00:19.0 scanning... |
| scan_bus: scanning of bus PCI: 00:19.0 took 1633 usecs |
| PCI: 00:1a.0 scanning... |
| scan_bus: scanning of bus PCI: 00:1a.0 took 1633 usecs |
| PCI: 00:1b.0 scanning... |
| scan_bus: scanning of bus PCI: 00:1b.0 took 1633 usecs |
| DOMAIN: 0000 passpw: enabled |
| DOMAIN: 0000 passpw: enabled |
| DOMAIN: 0000 passpw: enabled |
| DOMAIN: 0000 passpw: enabled |
| scan_bus: scanning of bus DOMAIN: 0000 took 1853809 usecs |
| root_dev_scan_bus for Root Device done |
| scan_bus: scanning of bus Root Device took 1934058 usecs |
| done |
| BS: BS_DEV_ENUMERATE times (us): entry 0 run 2251663 exit 0 |
| found VGA at PCI: 05:00.0 |
| Setting up VGA for PCI: 05:00.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:0b.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| Allocating resources... |
| Reading resources... |
| Root Device read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 done |
| Adding PCIe enhanced config space BAR 0xc0000000-0xd0000000. |
| DOMAIN: 0000 read_resources bus 0 link: 0 |
| PCI: 00:18.0 read_resources bus 0 link: 2 |
| PCI: 00:18.0 read_resources bus 0 link: 2 done |
| PCI: 00:18.0 read_resources bus 0 link: 3 |
| PCI: 00:18.0 read_resources bus 0 link: 3 done |
| PCI: 00:18.0 read_resources bus 0 link: 0 |
| PCI: 00:18.0 read_resources bus 0 link: 0 done |
| PCI: 00:18.0 read_resources bus 0 link: 1 |
| sr5690_read_resource: PCI: 00:00.0 |
| PCI: 00:02.0 read_resources bus 1 link: 0 |
| PCI: 00:02.0 read_resources bus 1 link: 0 done |
| PCI: 00:04.0 read_resources bus 2 link: 0 |
| PCI: 00:04.0 read_resources bus 2 link: 0 done |
| PCI: 00:09.0 read_resources bus 3 link: 0 |
| PCI: 00:09.0 read_resources bus 3 link: 0 done |
| PCI: 00:0a.0 read_resources bus 4 link: 0 |
| PCI: 00:0a.0 read_resources bus 4 link: 0 done |
| PCI: 00:0b.0 read_resources bus 5 link: 0 |
| PCI: 00:0b.0 read_resources bus 5 link: 0 done |
| PCI: 00:0c.0 read_resources bus 6 link: 0 |
| PCI: 00:0c.0 read_resources bus 6 link: 0 done |
| PCI: 00:0d.0 read_resources bus 7 link: 0 |
| PCI: 00:0d.0 read_resources bus 7 link: 0 done |
| PCI: 00:14.0 read_resources bus 1 link: 0 |
| I2C: 01:50 missing read_resources |
| I2C: 01:51 missing read_resources |
| I2C: 01:52 missing read_resources |
| I2C: 01:53 missing read_resources |
| I2C: 01:54 missing read_resources |
| I2C: 01:55 missing read_resources |
| I2C: 01:56 missing read_resources |
| I2C: 01:57 missing read_resources |
| PCI: 00:14.0 read_resources bus 1 link: 0 done |
| PCI: 00:14.3 read_resources bus 0 link: 0 |
| PNP: 004e.0 missing read_resources |
| PCI: 00:14.3 read_resources bus 0 link: 0 done |
| PCI: 00:14.4 read_resources bus 8 link: 0 |
| PCI: 00:14.4 read_resources bus 8 link: 0 done |
| PCI: 00:18.0 read_resources bus 0 link: 1 done |
| PCI: 00:18.4 read_resources bus 0 link: 0 |
| PCI: 00:18.4 read_resources bus 0 link: 0 done |
| PCI: 00:18.4 read_resources bus 0 link: 1 |
| PCI: 00:18.4 read_resources bus 0 link: 1 done |
| PCI: 00:18.4 read_resources bus 0 link: 2 |
| PCI: 00:18.4 read_resources bus 0 link: 2 done |
| PCI: 00:18.4 read_resources bus 0 link: 3 |
| PCI: 00:18.4 read_resources bus 0 link: 3 done |
| PCI: 00:19.0 read_resources bus 0 link: 3 |
| PCI: 00:19.0 read_resources bus 0 link: 3 done |
| PCI: 00:19.0 read_resources bus 0 link: 2 |
| PCI: 00:19.0 read_resources bus 0 link: 2 done |
| PCI: 00:19.0 read_resources bus 0 link: 0 |
| PCI: 00:19.0 read_resources bus 0 link: 0 done |
| PCI: 00:19.0 read_resources bus 0 link: 1 |
| PCI: 00:19.0 read_resources bus 0 link: 1 done |
| PCI: 00:19.4 read_resources bus 0 link: 0 |
| PCI: 00:19.4 read_resources bus 0 link: 0 done |
| PCI: 00:19.4 read_resources bus 0 link: 1 |
| PCI: 00:19.4 read_resources bus 0 link: 1 done |
| PCI: 00:19.4 read_resources bus 0 link: 2 |
| PCI: 00:19.4 read_resources bus 0 link: 2 done |
| PCI: 00:19.4 read_resources bus 0 link: 3 |
| PCI: 00:19.4 read_resources bus 0 link: 3 done |
| PCI: 00:1a.0 read_resources bus 0 link: 3 |
| PCI: 00:1a.0 read_resources bus 0 link: 3 done |
| PCI: 00:1a.0 read_resources bus 0 link: 2 |
| PCI: 00:1a.0 read_resources bus 0 link: 2 done |
| PCI: 00:1a.0 read_resources bus 0 link: 0 |
| PCI: 00:1a.0 read_resources bus 0 link: 0 done |
| PCI: 00:1a.0 read_resources bus 0 link: 1 |
| PCI: 00:1a.0 read_resources bus 0 link: 1 done |
| PCI: 00:1a.4 read_resources bus 0 link: 0 |
| PCI: 00:1a.4 read_resources bus 0 link: 0 done |
| PCI: 00:1a.4 read_resources bus 0 link: 1 |
| PCI: 00:1a.4 read_resources bus 0 link: 1 done |
| PCI: 00:1a.4 read_resources bus 0 link: 2 |
| PCI: 00:1a.4 read_resources bus 0 link: 2 done |
| PCI: 00:1a.4 read_resources bus 0 link: 3 |
| PCI: 00:1a.4 read_resources bus 0 link: 3 done |
| PCI: 00:1b.0 read_resources bus 0 link: 3 |
| PCI: 00:1b.0 read_resources bus 0 link: 3 done |
| PCI: 00:1b.0 read_resources bus 0 link: 2 |
| PCI: 00:1b.0 read_resources bus 0 link: 2 done |
| PCI: 00:1b.0 read_resources bus 0 link: 0 |
| PCI: 00:1b.0 read_resources bus 0 link: 0 done |
| PCI: 00:1b.0 read_resources bus 0 link: 1 |
| PCI: 00:1b.0 read_resources bus 0 link: 1 done |
| PCI: 00:1b.4 read_resources bus 0 link: 0 |
| PCI: 00:1b.4 read_resources bus 0 link: 0 done |
| PCI: 00:1b.4 read_resources bus 0 link: 1 |
| PCI: 00:1b.4 read_resources bus 0 link: 1 done |
| PCI: 00:1b.4 read_resources bus 0 link: 2 |
| PCI: 00:1b.4 read_resources bus 0 link: 2 done |
| PCI: 00:1b.4 read_resources bus 0 link: 3 |
| PCI: 00:1b.4 read_resources bus 0 link: 3 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 done |
| Root Device read_resources bus 0 link: 0 done |
| Done reading resources. |
| Show resources in subtree (Root Device)...After reading. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: 01 |
| APIC: 02 |
| APIC: 03 |
| APIC: 04 |
| APIC: 05 |
| APIC: 06 |
| APIC: 07 |
| APIC: 08 |
| APIC: 09 |
| APIC: 0a |
| APIC: 0b |
| APIC: 0c |
| APIC: 0d |
| APIC: 0e |
| APIC: 0f |
| APIC: 20 |
| APIC: 21 |
| APIC: 22 |
| APIC: 23 |
| APIC: 24 |
| APIC: 25 |
| APIC: 26 |
| APIC: 27 |
| APIC: 28 |
| APIC: 29 |
| APIC: 2a |
| APIC: 2b |
| APIC: 2c |
| APIC: 2d |
| APIC: 2e |
| APIC: 2f |
| DOMAIN: 0000 child on link 0 PCI: 00:18.0 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 |
| DOMAIN: 0000 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 |
| DOMAIN: 0000 resource base 0 size c0000000 align 0 gran 0 limit 0 flags e0004200 index 7 |
| PCI: 00:18.0 |
| PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 110b0 |
| PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 80200 index 110b8 |
| PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 110d8 |
| PCI: 00:00.0 |
| PCI: 00:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 1200 index fc |
| PCI: 00:00.1 |
| PCI: 00:00.2 |
| PCI: 00:00.2 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 10000200 index 44 |
| PCI: 00:02.0 |
| PCI: 00:02.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c |
| PCI: 00:02.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:02.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 00:03.0 |
| PCI: 00:04.0 |
| PCI: 00:04.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c |
| PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 00:05.0 |
| PCI: 00:06.0 |
| PCI: 00:07.0 |
| PCI: 00:08.0 |
| PCI: 00:09.0 child on link 0 PCI: 03:00.0 |
| PCI: 00:09.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c |
| PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 03:00.0 |
| PCI: 03:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 |
| PCI: 03:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 |
| PCI: 03:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 1c |
| PCI: 00:0a.0 child on link 0 PCI: 04:00.0 |
| PCI: 00:0a.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c |
| PCI: 00:0a.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:0a.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 04:00.0 |
| PCI: 04:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 |
| PCI: 04:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 |
| PCI: 04:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 1c |
| PCI: 00:0b.0 child on link 0 PCI: 05:00.0 |
| PCI: 00:0b.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c |
| PCI: 00:0b.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:0b.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 05:00.0 |
| PCI: 05:00.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffff flags 200 index 10 |
| PCI: 05:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 14 |
| PCI: 05:00.0 resource base 0 size 2000000 align 25 gran 25 limit ffffffffffffffff flags 1201 index 1c |
| PCI: 05:00.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 24 |
| PCI: 05:00.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 2200 index 30 |
| PCI: 05:00.1 |
| PCI: 05:00.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10 |
| PCI: 00:0c.0 |
| PCI: 00:0c.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c |
| PCI: 00:0c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:0c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 00:0d.0 child on link 0 PCI: 07:00.0 |
| PCI: 00:0d.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c |
| PCI: 00:0d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:0d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 07:00.0 |
| PCI: 07:00.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:11.0 |
| PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 |
| PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 |
| PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 |
| PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c |
| PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 |
| PCI: 00:11.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 24 |
| PCI: 00:12.0 |
| PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 |
| PCI: 00:12.1 |
| PCI: 00:12.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 |
| PCI: 00:12.2 |
| PCI: 00:12.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| PCI: 00:13.0 |
| PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 |
| PCI: 00:13.1 |
| PCI: 00:13.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 |
| PCI: 00:13.2 |
| PCI: 00:13.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| PCI: 00:14.0 child on link 0 I2C: 01:50 |
| PCI: 00:14.0 resource base fec00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 74 |
| PCI: 00:14.0 resource base feb00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 9c |
| PCI: 00:14.0 resource base fed00000 size 400 align 8 gran 8 limit ffffffff flags d0000200 index b4 |
| PCI: 00:14.0 resource base b00 size 10 align 8 gran 8 limit ffff flags d0000100 index 90 |
| PCI: 00:14.0 resource base b20 size 10 align 8 gran 8 limit ffff flags d0000100 index 58 |
| I2C: 01:50 |
| I2C: 01:51 |
| I2C: 01:52 |
| I2C: 01:53 |
| I2C: 01:54 |
| I2C: 01:55 |
| I2C: 01:56 |
| I2C: 01:57 |
| I2C: 01:2f |
| PCI: 00:14.1 |
| PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 |
| PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 |
| PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 |
| PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c |
| PCI: 00:14.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 |
| PCI: 00:14.2 |
| PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:14.3 child on link 0 PNP: 002e.0 |
| PCI: 00:14.3 resource base 0 size 1 align 12 gran 0 limit ffffffff flags 200 index a0 |
| PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PNP: 002e.0 |
| PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60 |
| PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 |
| PNP: 002e.1 |
| PNP: 002e.1 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60 |
| PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 |
| PNP: 002e.2 |
| PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60 |
| PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.3 |
| PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60 |
| PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.5 |
| PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60 |
| PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62 |
| PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72 |
| PNP: 002e.106 |
| PNP: 002e.106 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 62 |
| PNP: 002e.107 |
| PNP: 002e.207 |
| PNP: 002e.307 |
| PNP: 002e.407 |
| PNP: 002e.8 |
| PNP: 002e.108 |
| PNP: 002e.9 |
| PNP: 002e.109 |
| PNP: 002e.209 |
| PNP: 002e.309 |
| PNP: 002e.a |
| PNP: 002e.b |
| PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit fff flags c0000100 index 60 |
| PNP: 002e.b resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 002e.c |
| PNP: 002e.d |
| PNP: 002e.f |
| PNP: 004e.0 |
| PCI: 00:14.4 child on link 0 PCI: 08:01.0 |
| PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24 |
| PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 08:01.0 |
| PCI: 08:02.0 |
| PCI: 08:02.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 |
| PCI: 08:03.0 |
| PCI: 00:14.5 |
| PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 |
| PCI: 00:18.1 |
| PCI: 00:18.2 |
| PCI: 00:18.3 |
| PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 200 index 94 |
| PCI: 00:18.4 |
| PCI: 00:18.5 |
| PCI: 00:19.0 |
| PCI: 00:19.1 |
| PCI: 00:19.2 |
| PCI: 00:19.3 |
| PCI: 00:19.4 |
| PCI: 00:19.5 |
| PCI: 00:1a.0 |
| PCI: 00:1a.1 |
| PCI: 00:1a.2 |
| PCI: 00:1a.3 |
| PCI: 00:1a.4 |
| PCI: 00:1a.5 |
| PCI: 00:1b.0 |
| PCI: 00:1b.1 |
| PCI: 00:1b.2 |
| PCI: 00:1b.3 |
| PCI: 00:1b.4 |
| PCI: 00:1b.5 |
| DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff |
| PCI: 00:18.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:02.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff |
| PCI: 00:02.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done |
| PCI: 00:04.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff |
| PCI: 00:04.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done |
| PCI: 00:09.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff |
| PCI: 03:00.0 18 * [0x0 - 0x1f] io |
| PCI: 00:09.0 io: base: 20 size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:0a.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff |
| PCI: 04:00.0 18 * [0x0 - 0x1f] io |
| PCI: 00:0a.0 io: base: 20 size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:0b.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff |
| PCI: 05:00.0 24 * [0x0 - 0x7f] io |
| PCI: 00:0b.0 io: base: 80 size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:0c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff |
| PCI: 00:0c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done |
| PCI: 00:0d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff |
| PCI: 00:0d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done |
| PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:09.0 1c * [0x0 - 0xfff] io |
| PCI: 00:0a.0 1c * [0x1000 - 0x1fff] io |
| PCI: 00:0b.0 1c * [0x2000 - 0x2fff] io |
| PCI: 00:11.0 20 * [0x3000 - 0x300f] io |
| PCI: 00:14.1 20 * [0x3010 - 0x301f] io |
| PCI: 00:11.0 10 * [0x3020 - 0x3027] io |
| PCI: 00:11.0 18 * [0x3028 - 0x302f] io |
| PCI: 00:14.1 10 * [0x3030 - 0x3037] io |
| PCI: 00:14.1 18 * [0x3038 - 0x303f] io |
| PCI: 00:11.0 14 * [0x3040 - 0x3043] io |
| PCI: 00:11.0 1c * [0x3044 - 0x3047] io |
| PCI: 00:14.1 14 * [0x3048 - 0x304b] io |
| PCI: 00:14.1 1c * [0x304c - 0x304f] io |
| PCI: 00:18.0 io: base: 3050 size: 4000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:18.0 110d8 * [0x0 - 0x3fff] io |
| DOMAIN: 0000 io: base: 4000 size: 4000 align: 12 gran: 0 limit: ffff done |
| DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff |
| PCI: 00:18.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff |
| PCI: 00:02.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:02.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:04.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:04.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:09.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:09.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:0a.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:0a.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:0b.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 05:00.0 14 * [0x0 - 0xfffffff] prefmem |
| PCI: 05:00.0 1c * [0x10000000 - 0x11ffffff] prefmem |
| PCI: 00:0b.0 prefmem: base: 12000000 size: 12000000 align: 28 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:0c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:0c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:0d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:0d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:0b.0 24 * [0x0 - 0x11ffffff] prefmem |
| PCI: 00:00.0 fc * [0x12000000 - 0x120000ff] prefmem |
| PCI: 00:18.0 prefmem: base: 12000100 size: 12100000 align: 28 gran: 20 limit: ffffffff done |
| PCI: 00:18.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff |
| PCI: 00:02.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 00:02.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:04.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 00:04.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:09.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 03:00.0 10 * [0x0 - 0x1ffff] mem |
| PCI: 03:00.0 1c * [0x20000 - 0x23fff] mem |
| PCI: 00:09.0 mem: base: 24000 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:0a.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 04:00.0 10 * [0x0 - 0x1ffff] mem |
| PCI: 04:00.0 1c * [0x20000 - 0x23fff] mem |
| PCI: 00:0a.0 mem: base: 24000 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:0b.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 05:00.0 10 * [0x0 - 0xffffff] mem |
| PCI: 05:00.0 30 * [0x1000000 - 0x107ffff] mem |
| PCI: 05:00.1 10 * [0x1080000 - 0x1083fff] mem |
| PCI: 00:0b.0 mem: base: 1084000 size: 1100000 align: 24 gran: 20 limit: ffffffff done |
| PCI: 00:0c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 00:0c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:0d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 07:00.0 10 * [0x0 - 0x1fff] mem |
| PCI: 00:0d.0 mem: base: 2000 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 08:02.0 10 * [0x0 - 0xfff] mem |
| PCI: 00:14.4 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:0b.0 20 * [0x0 - 0x10fffff] mem |
| PCI: 00:09.0 20 * [0x1100000 - 0x11fffff] mem |
| PCI: 00:0a.0 20 * [0x1200000 - 0x12fffff] mem |
| PCI: 00:0d.0 20 * [0x1300000 - 0x13fffff] mem |
| PCI: 00:14.4 20 * [0x1400000 - 0x14fffff] mem |
| PCI: 00:00.2 44 * [0x1500000 - 0x1503fff] mem |
| PCI: 00:14.2 10 * [0x1504000 - 0x1507fff] mem |
| PCI: 00:12.0 10 * [0x1508000 - 0x1508fff] mem |
| PCI: 00:12.1 10 * [0x1509000 - 0x1509fff] mem |
| PCI: 00:13.0 10 * [0x150a000 - 0x150afff] mem |
| PCI: 00:13.1 10 * [0x150b000 - 0x150bfff] mem |
| PCI: 00:14.5 10 * [0x150c000 - 0x150cfff] mem |
| PCI: 00:11.0 24 * [0x150d000 - 0x150d3ff] mem |
| PCI: 00:12.2 10 * [0x150e000 - 0x150e0ff] mem |
| PCI: 00:13.2 10 * [0x150f000 - 0x150f0ff] mem |
| PCI: 00:14.3 a0 * [0x1510000 - 0x1510000] mem |
| PCI: 00:18.0 mem: base: 1510001 size: 1600000 align: 24 gran: 20 limit: ffffffff done |
| PCI: 00:18.0 110b0 * [0x0 - 0x120fffff] prefmem |
| PCI: 00:18.3 94 * [0x14000000 - 0x17ffffff] mem |
| PCI: 00:18.0 110b8 * [0x18000000 - 0x195fffff] mem |
| DOMAIN: 0000 mem: base: 19600000 size: 19600000 align: 28 gran: 0 limit: ffffffff done |
| avoid_fixed_resources: DOMAIN: 0000 |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff |
| constrain_resources: DOMAIN: 0000 c0010058 base c0000000 limit cfffffff mem (fixed) |
| constrain_resources: DOMAIN: 0000 07 base 00000000 limit bfffffff mem (fixed) |
| constrain_resources: PCI: 00:14.0 74 base fec00000 limit fec00fff mem (fixed) |
| constrain_resources: PCI: 00:14.0 9c base feb00000 limit feb00fff mem (fixed) |
| constrain_resources: PCI: 00:14.0 90 base 00000b00 limit 00000b0f io (fixed) |
| constrain_resources: PCI: 00:14.0 58 base 00000b20 limit 00000b2f io (fixed) |
| constrain_resources: PCI: 00:14.3 10000000 base 00000000 limit 00000fff io (fixed) |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 base e0000000 limit feafffff |
| Setting resources... |
| DOMAIN: 0000 io: base:1000 size:4000 align:12 gran:0 limit:ffff |
| PCI: 00:18.0 110d8 * [0x1000 - 0x4fff] io |
| DOMAIN: 0000 io: next_base: 5000 size: 4000 align: 12 gran: 0 done |
| PCI: 00:18.0 io: base:1000 size:4000 align:12 gran:12 limit:4fff |
| PCI: 00:09.0 1c * [0x1000 - 0x1fff] io |
| PCI: 00:0a.0 1c * [0x2000 - 0x2fff] io |
| PCI: 00:0b.0 1c * [0x3000 - 0x3fff] io |
| PCI: 00:11.0 20 * [0x4000 - 0x400f] io |
| PCI: 00:14.1 20 * [0x4010 - 0x401f] io |
| PCI: 00:11.0 10 * [0x4020 - 0x4027] io |
| PCI: 00:11.0 18 * [0x4028 - 0x402f] io |
| PCI: 00:14.1 10 * [0x4030 - 0x4037] io |
| PCI: 00:14.1 18 * [0x4038 - 0x403f] io |
| PCI: 00:11.0 14 * [0x4040 - 0x4043] io |
| PCI: 00:11.0 1c * [0x4044 - 0x4047] io |
| PCI: 00:14.1 14 * [0x4048 - 0x404b] io |
| PCI: 00:14.1 1c * [0x404c - 0x404f] io |
| PCI: 00:18.0 io: next_base: 4050 size: 4000 align: 12 gran: 12 done |
| PCI: 00:02.0 io: base:4fff size:0 align:12 gran:12 limit:4fff |
| PCI: 00:02.0 io: next_base: 4fff size: 0 align: 12 gran: 12 done |
| PCI: 00:04.0 io: base:4fff size:0 align:12 gran:12 limit:4fff |
| PCI: 00:04.0 io: next_base: 4fff size: 0 align: 12 gran: 12 done |
| PCI: 00:09.0 io: base:1000 size:1000 align:12 gran:12 limit:1fff |
| PCI: 03:00.0 18 * [0x1000 - 0x101f] io |
| PCI: 00:09.0 io: next_base: 1020 size: 1000 align: 12 gran: 12 done |
| PCI: 00:0a.0 io: base:2000 size:1000 align:12 gran:12 limit:2fff |
| PCI: 04:00.0 18 * [0x2000 - 0x201f] io |
| PCI: 00:0a.0 io: next_base: 2020 size: 1000 align: 12 gran: 12 done |
| PCI: 00:0b.0 io: base:3000 size:1000 align:12 gran:12 limit:3fff |
| PCI: 05:00.0 24 * [0x3000 - 0x307f] io |
| PCI: 00:0b.0 io: next_base: 3080 size: 1000 align: 12 gran: 12 done |
| PCI: 00:0c.0 io: base:4fff size:0 align:12 gran:12 limit:4fff |
| PCI: 00:0c.0 io: next_base: 4fff size: 0 align: 12 gran: 12 done |
| PCI: 00:0d.0 io: base:4fff size:0 align:12 gran:12 limit:4fff |
| PCI: 00:0d.0 io: next_base: 4fff size: 0 align: 12 gran: 12 done |
| PCI: 00:14.4 io: base:4fff size:0 align:12 gran:12 limit:4fff |
| PCI: 00:14.4 io: next_base: 4fff size: 0 align: 12 gran: 12 done |
| DOMAIN: 0000 mem: base:e0000000 size:19600000 align:28 gran:0 limit:feafffff |
| PCI: 00:18.0 110b0 * [0xe0000000 - 0xf20fffff] prefmem |
| PCI: 00:18.3 94 * [0xf4000000 - 0xf7ffffff] mem |
| PCI: 00:18.0 110b8 * [0xf8000000 - 0xf95fffff] mem |
| DOMAIN: 0000 mem: next_base: f9600000 size: 19600000 align: 28 gran: 0 done |
| PCI: 00:18.0 prefmem: base:e0000000 size:12100000 align:28 gran:20 limit:f20fffff |
| PCI: 00:0b.0 24 * [0xe0000000 - 0xf1ffffff] prefmem |
| PCI: 00:00.0 fc * [0xf2000000 - 0xf20000ff] prefmem |
| PCI: 00:18.0 prefmem: next_base: f2000100 size: 12100000 align: 28 gran: 20 done |
| PCI: 00:02.0 prefmem: base:f20fffff size:0 align:20 gran:20 limit:f20fffff |
| PCI: 00:02.0 prefmem: next_base: f20fffff size: 0 align: 20 gran: 20 done |
| PCI: 00:04.0 prefmem: base:f20fffff size:0 align:20 gran:20 limit:f20fffff |
| PCI: 00:04.0 prefmem: next_base: f20fffff size: 0 align: 20 gran: 20 done |
| PCI: 00:09.0 prefmem: base:f20fffff size:0 align:20 gran:20 limit:f20fffff |
| PCI: 00:09.0 prefmem: next_base: f20fffff size: 0 align: 20 gran: 20 done |
| PCI: 00:0a.0 prefmem: base:f20fffff size:0 align:20 gran:20 limit:f20fffff |
| PCI: 00:0a.0 prefmem: next_base: f20fffff size: 0 align: 20 gran: 20 done |
| PCI: 00:0b.0 prefmem: base:e0000000 size:12000000 align:28 gran:20 limit:f1ffffff |
| PCI: 05:00.0 14 * [0xe0000000 - 0xefffffff] prefmem |
| PCI: 05:00.0 1c * [0xf0000000 - 0xf1ffffff] prefmem |
| PCI: 00:0b.0 prefmem: next_base: f2000000 size: 12000000 align: 28 gran: 20 done |
| PCI: 00:0c.0 prefmem: base:f20fffff size:0 align:20 gran:20 limit:f20fffff |
| PCI: 00:0c.0 prefmem: next_base: f20fffff size: 0 align: 20 gran: 20 done |
| PCI: 00:0d.0 prefmem: base:f20fffff size:0 align:20 gran:20 limit:f20fffff |
| PCI: 00:0d.0 prefmem: next_base: f20fffff size: 0 align: 20 gran: 20 done |
| PCI: 00:14.4 prefmem: base:f20fffff size:0 align:20 gran:20 limit:f20fffff |
| PCI: 00:14.4 prefmem: next_base: f20fffff size: 0 align: 20 gran: 20 done |
| PCI: 00:18.0 mem: base:f8000000 size:1600000 align:24 gran:20 limit:f95fffff |
| PCI: 00:0b.0 20 * [0xf8000000 - 0xf90fffff] mem |
| PCI: 00:09.0 20 * [0xf9100000 - 0xf91fffff] mem |
| PCI: 00:0a.0 20 * [0xf9200000 - 0xf92fffff] mem |
| PCI: 00:0d.0 20 * [0xf9300000 - 0xf93fffff] mem |
| PCI: 00:14.4 20 * [0xf9400000 - 0xf94fffff] mem |
| PCI: 00:00.2 44 * [0xf9500000 - 0xf9503fff] mem |
| PCI: 00:14.2 10 * [0xf9504000 - 0xf9507fff] mem |
| PCI: 00:12.0 10 * [0xf9508000 - 0xf9508fff] mem |
| PCI: 00:12.1 10 * [0xf9509000 - 0xf9509fff] mem |
| PCI: 00:13.0 10 * [0xf950a000 - 0xf950afff] mem |
| PCI: 00:13.1 10 * [0xf950b000 - 0xf950bfff] mem |
| PCI: 00:14.5 10 * [0xf950c000 - 0xf950cfff] mem |
| PCI: 00:11.0 24 * [0xf950d000 - 0xf950d3ff] mem |
| PCI: 00:12.2 10 * [0xf950e000 - 0xf950e0ff] mem |
| PCI: 00:13.2 10 * [0xf950f000 - 0xf950f0ff] mem |
| PCI: 00:14.3 a0 * [0xf9510000 - 0xf9510000] mem |
| PCI: 00:18.0 mem: next_base: f9510001 size: 1600000 align: 24 gran: 20 done |
| PCI: 00:02.0 mem: base:f95fffff size:0 align:20 gran:20 limit:f95fffff |
| PCI: 00:02.0 mem: next_base: f95fffff size: 0 align: 20 gran: 20 done |
| PCI: 00:04.0 mem: base:f95fffff size:0 align:20 gran:20 limit:f95fffff |
| PCI: 00:04.0 mem: next_base: f95fffff size: 0 align: 20 gran: 20 done |
| PCI: 00:09.0 mem: base:f9100000 size:100000 align:20 gran:20 limit:f91fffff |
| PCI: 03:00.0 10 * [0xf9100000 - 0xf911ffff] mem |
| PCI: 03:00.0 1c * [0xf9120000 - 0xf9123fff] mem |
| PCI: 00:09.0 mem: next_base: f9124000 size: 100000 align: 20 gran: 20 done |
| PCI: 00:0a.0 mem: base:f9200000 size:100000 align:20 gran:20 limit:f92fffff |
| PCI: 04:00.0 10 * [0xf9200000 - 0xf921ffff] mem |
| PCI: 04:00.0 1c * [0xf9220000 - 0xf9223fff] mem |
| PCI: 00:0a.0 mem: next_base: f9224000 size: 100000 align: 20 gran: 20 done |
| PCI: 00:0b.0 mem: base:f8000000 size:1100000 align:24 gran:20 limit:f90fffff |
| PCI: 05:00.0 10 * [0xf8000000 - 0xf8ffffff] mem |
| PCI: 05:00.0 30 * [0xf9000000 - 0xf907ffff] mem |
| PCI: 05:00.1 10 * [0xf9080000 - 0xf9083fff] mem |
| PCI: 00:0b.0 mem: next_base: f9084000 size: 1100000 align: 24 gran: 20 done |
| PCI: 00:0c.0 mem: base:f95fffff size:0 align:20 gran:20 limit:f95fffff |
| PCI: 00:0c.0 mem: next_base: f95fffff size: 0 align: 20 gran: 20 done |
| PCI: 00:0d.0 mem: base:f9300000 size:100000 align:20 gran:20 limit:f93fffff |
| PCI: 07:00.0 10 * [0xf9300000 - 0xf9301fff] mem |
| PCI: 00:0d.0 mem: next_base: f9302000 size: 100000 align: 20 gran: 20 done |
| PCI: 00:14.4 mem: base:f9400000 size:100000 align:20 gran:20 limit:f94fffff |
| PCI: 08:02.0 10 * [0xf9400000 - 0xf9400fff] mem |
| PCI: 00:14.4 mem: next_base: f9401000 size: 100000 align: 20 gran: 20 done |
| Root Device assign_resources, bus 0 link: 0 |
| 0: mmio_basek=00300000, basek=00400000, limitk=02100000 |
| 2: mmio_basek=00300000, basek=02100000, limitk=04100000 |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| VGA: PCI: 00:18.0 (aka node 0) link 1 has VGA device |
| PCI: 00:18.0 111b8 <- [0x00000a0000 - 0x00000bffff] size 0x00020000 gran 0x00 mem <node 0 link 1> |
| PCI: 00:18.0 110b0 <- [0x00e0000000 - 0x00f20fffff] size 0x12100000 gran 0x14 prefmem <node 0 link 1> |
| PCI: 00:18.0 110b8 <- [0x00f8000000 - 0x00f95fffff] size 0x01600000 gran 0x14 mem <node 0 link 1> |
| PCI: 00:18.0 110d8 <- [0x0000001000 - 0x0000004fff] size 0x00004000 gran 0x0c io <node 0 link 1> |
| PCI: 00:18.0 assign_resources, bus 0 link: 1 |
| PCI: 00:00.0 sr5690_set_resources |
| sr5690_set_resources: PCI: 00:00.0[0x1c] base = c0000000 limit = cfffffff |
| PCI: 00:00.0 c0010058 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x00 mem <mmconfig> |
| sr5690_set_resources: PCI: 00:18.1 <- index a8 base c00003 limit cfff90 |
| PCI: 00:00.0 fc <- [0x00f2000000 - 0x00f20000ff] size 0x00000100 gran 0x08 prefmem |
| PCI: 00:00.2 44 <- [0x00f9500000 - 0x00f9503fff] size 0x00004000 gran 0x0e mem |
| PCI: 00:02.0 1c <- [0x0000004fff - 0x0000004ffe] size 0x00000000 gran 0x0c bus 01 io |
| PCI: 00:02.0 24 <- [0x00f20fffff - 0x00f20ffffe] size 0x00000000 gran 0x14 bus 01 prefmem |
| PCI: 00:02.0 20 <- [0x00f95fffff - 0x00f95ffffe] size 0x00000000 gran 0x14 bus 01 mem |
| PCI: 00:04.0 1c <- [0x0000004fff - 0x0000004ffe] size 0x00000000 gran 0x0c bus 02 io |
| PCI: 00:04.0 24 <- [0x00f20fffff - 0x00f20ffffe] size 0x00000000 gran 0x14 bus 02 prefmem |
| PCI: 00:04.0 20 <- [0x00f95fffff - 0x00f95ffffe] size 0x00000000 gran 0x14 bus 02 mem |
| PCI: 00:09.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 03 io |
| PCI: 00:09.0 24 <- [0x00f20fffff - 0x00f20ffffe] size 0x00000000 gran 0x14 bus 03 prefmem |
| PCI: 00:09.0 20 <- [0x00f9100000 - 0x00f91fffff] size 0x00100000 gran 0x14 bus 03 mem |
| PCI: 00:09.0 assign_resources, bus 3 link: 0 |
| PCI: 03:00.0 10 <- [0x00f9100000 - 0x00f911ffff] size 0x00020000 gran 0x11 mem |
| PCI: 03:00.0 18 <- [0x0000001000 - 0x000000101f] size 0x00000020 gran 0x05 io |
| PCI: 03:00.0 1c <- [0x00f9120000 - 0x00f9123fff] size 0x00004000 gran 0x0e mem |
| PCI: 00:09.0 assign_resources, bus 3 link: 0 |
| PCI: 00:0a.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 04 io |
| PCI: 00:0a.0 24 <- [0x00f20fffff - 0x00f20ffffe] size 0x00000000 gran 0x14 bus 04 prefmem |
| PCI: 00:0a.0 20 <- [0x00f9200000 - 0x00f92fffff] size 0x00100000 gran 0x14 bus 04 mem |
| PCI: 00:0a.0 assign_resources, bus 4 link: 0 |
| PCI: 04:00.0 10 <- [0x00f9200000 - 0x00f921ffff] size 0x00020000 gran 0x11 mem |
| PCI: 04:00.0 18 <- [0x0000002000 - 0x000000201f] size 0x00000020 gran 0x05 io |
| PCI: 04:00.0 1c <- [0x00f9220000 - 0x00f9223fff] size 0x00004000 gran 0x0e mem |
| PCI: 00:0a.0 assign_resources, bus 4 link: 0 |
| PCI: 00:0b.0 1c <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x0c bus 05 io |
| PCI: 00:0b.0 24 <- [0x00e0000000 - 0x00f1ffffff] size 0x12000000 gran 0x14 bus 05 prefmem |
| PCI: 00:0b.0 20 <- [0x00f8000000 - 0x00f90fffff] size 0x01100000 gran 0x14 bus 05 mem |
| PCI: 00:0b.0 assign_resources, bus 5 link: 0 |
| PCI: 05:00.0 10 <- [0x00f8000000 - 0x00f8ffffff] size 0x01000000 gran 0x18 mem |
| PCI: 05:00.0 14 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem64 |
| PCI: 05:00.0 1c <- [0x00f0000000 - 0x00f1ffffff] size 0x02000000 gran 0x19 prefmem64 |
| PCI: 05:00.0 24 <- [0x0000003000 - 0x000000307f] size 0x00000080 gran 0x07 io |
| PCI: 05:00.0 30 <- [0x00f9000000 - 0x00f907ffff] size 0x00080000 gran 0x13 romem |
| PCI: 05:00.1 10 <- [0x00f9080000 - 0x00f9083fff] size 0x00004000 gran 0x0e mem |
| PCI: 00:0b.0 assign_resources, bus 5 link: 0 |
| PCI: 00:0c.0 1c <- [0x0000004fff - 0x0000004ffe] size 0x00000000 gran 0x0c bus 06 io |
| PCI: 00:0c.0 24 <- [0x00f20fffff - 0x00f20ffffe] size 0x00000000 gran 0x14 bus 06 prefmem |
| PCI: 00:0c.0 20 <- [0x00f95fffff - 0x00f95ffffe] size 0x00000000 gran 0x14 bus 06 mem |
| PCI: 00:0d.0 1c <- [0x0000004fff - 0x0000004ffe] size 0x00000000 gran 0x0c bus 07 io |
| PCI: 00:0d.0 24 <- [0x00f20fffff - 0x00f20ffffe] size 0x00000000 gran 0x14 bus 07 prefmem |
| PCI: 00:0d.0 20 <- [0x00f9300000 - 0x00f93fffff] size 0x00100000 gran 0x14 bus 07 mem |
| PCI: 00:0d.0 assign_resources, bus 7 link: 0 |
| PCI: 07:00.0 10 <- [0x00f9300000 - 0x00f9301fff] size 0x00002000 gran 0x0d mem64 |
| PCI: 00:0d.0 assign_resources, bus 7 link: 0 |
| PCI: 00:11.0 10 <- [0x0000004020 - 0x0000004027] size 0x00000008 gran 0x03 io |
| PCI: 00:11.0 14 <- [0x0000004040 - 0x0000004043] size 0x00000004 gran 0x02 io |
| PCI: 00:11.0 18 <- [0x0000004028 - 0x000000402f] size 0x00000008 gran 0x03 io |
| PCI: 00:11.0 1c <- [0x0000004044 - 0x0000004047] size 0x00000004 gran 0x02 io |
| PCI: 00:11.0 20 <- [0x0000004000 - 0x000000400f] size 0x00000010 gran 0x04 io |
| PCI: 00:11.0 24 <- [0x00f950d000 - 0x00f950d3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:12.0 10 <- [0x00f9508000 - 0x00f9508fff] size 0x00001000 gran 0x0c mem |
| PCI: 00:12.1 10 <- [0x00f9509000 - 0x00f9509fff] size 0x00001000 gran 0x0c mem |
| PCI: 00:12.2 10 <- [0x00f950e000 - 0x00f950e0ff] size 0x00000100 gran 0x08 mem |
| PCI: 00:13.0 10 <- [0x00f950a000 - 0x00f950afff] size 0x00001000 gran 0x0c mem |
| PCI: 00:13.1 10 <- [0x00f950b000 - 0x00f950bfff] size 0x00001000 gran 0x0c mem |
| PCI: 00:13.2 10 <- [0x00f950f000 - 0x00f950f0ff] size 0x00000100 gran 0x08 mem |
| PCI: 00:14.0 assign_resources, bus 1 link: 0 |
| PCI: 00:14.0 assign_resources, bus 1 link: 0 |
| PCI: 00:14.1 10 <- [0x0000004030 - 0x0000004037] size 0x00000008 gran 0x03 io |
| PCI: 00:14.1 14 <- [0x0000004048 - 0x000000404b] size 0x00000004 gran 0x02 io |
| PCI: 00:14.1 18 <- [0x0000004038 - 0x000000403f] size 0x00000008 gran 0x03 io |
| PCI: 00:14.1 1c <- [0x000000404c - 0x000000404f] size 0x00000004 gran 0x02 io |
| PCI: 00:14.1 20 <- [0x0000004010 - 0x000000401f] size 0x00000010 gran 0x04 io |
| PCI: 00:14.2 10 <- [0x00f9504000 - 0x00f9507fff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:14.3 a0 <- [0x00f9510000 - 0x00f9510000] size 0x00000001 gran 0x00 mem |
| PCI: 00:14.3 assign_resources, bus 0 link: 0 |
| PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io |
| PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq |
| PNP: 002e.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io |
| PNP: 002e.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq |
| PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io |
| PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io |
| PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq |
| PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq |
| PNP: 002e.b 60 <- [0x0000000290 - 0x0000000291] size 0x00000002 gran 0x01 io |
| ERROR: PNP: 002e.b 70 irq size: 0x0000000001 not assigned |
| PCI: 00:14.3 assign_resources, bus 0 link: 0 |
| PCI: 00:14.4 1c <- [0x0000004fff - 0x0000004ffe] size 0x00000000 gran 0x0c bus 08 io |
| PCI: 00:14.4 24 <- [0x00f20fffff - 0x00f20ffffe] size 0x00000000 gran 0x14 bus 08 prefmem |
| PCI: 00:14.4 20 <- [0x00f9400000 - 0x00f94fffff] size 0x00100000 gran 0x14 bus 08 mem |
| PCI: 00:14.4 assign_resources, bus 8 link: 0 |
| PCI: 08:02.0 10 <- [0x00f9400000 - 0x00f9400fff] size 0x00001000 gran 0x0c mem |
| PCI: 00:14.4 assign_resources, bus 8 link: 0 |
| PCI: 00:14.5 10 <- [0x00f950c000 - 0x00f950cfff] size 0x00001000 gran 0x0c mem |
| PCI: 00:18.0 assign_resources, bus 0 link: 1 |
| PCI: 00:18.3 94 <- [0x00f4000000 - 0x00f7ffffff] size 0x04000000 gran 0x1a mem <gart> |
| PCI: 00:19.3 94 <- [0x00f4000000 - 0x00f7ffffff] size 0x04000000 gran 0x1a mem <gart> |
| PCI: 00:1a.3 94 <- [0x00f4000000 - 0x00f7ffffff] size 0x04000000 gran 0x1a mem <gart> |
| PCI: 00:1b.3 94 <- [0x00f4000000 - 0x00f7ffffff] size 0x04000000 gran 0x1a mem <gart> |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| Root Device assign_resources, bus 0 link: 0 |
| Done setting resources. |
| Show resources in subtree (Root Device)...After assigning values. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: 01 |
| APIC: 02 |
| APIC: 03 |
| APIC: 04 |
| APIC: 05 |
| APIC: 06 |
| APIC: 07 |
| APIC: 08 |
| APIC: 09 |
| APIC: 0a |
| APIC: 0b |
| APIC: 0c |
| APIC: 0d |
| APIC: 0e |
| APIC: 0f |
| APIC: 20 |
| APIC: 21 |
| APIC: 22 |
| APIC: 23 |
| APIC: 24 |
| APIC: 25 |
| APIC: 26 |
| APIC: 27 |
| APIC: 28 |
| APIC: 29 |
| APIC: 2a |
| APIC: 2b |
| APIC: 2c |
| APIC: 2d |
| APIC: 2e |
| APIC: 2f |
| DOMAIN: 0000 child on link 0 PCI: 00:18.0 |
| DOMAIN: 0000 resource base 1000 size 4000 align 12 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base e0000000 size 19600000 align 28 gran 0 limit feafffff flags 40040200 index 10000100 |
| DOMAIN: 0000 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 |
| DOMAIN: 0000 resource base 0 size c0000000 align 0 gran 0 limit 0 flags e0004200 index 7 |
| DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10 |
| DOMAIN: 0000 resource base c0000 size bff40000 align 0 gran 0 limit 0 flags e0004200 index 20 |
| DOMAIN: 0000 resource base 100000000 size 740000000 align 0 gran 0 limit 0 flags e0004200 index 30 |
| DOMAIN: 0000 resource base 840000000 size 800000000 align 0 gran 0 limit 0 flags e0004200 index 42 |
| PCI: 00:18.0 |
| PCI: 00:18.0 resource base e0000000 size 12100000 align 28 gran 20 limit f20fffff flags 60081200 index 110b0 |
| PCI: 00:18.0 resource base f8000000 size 1600000 align 24 gran 20 limit f95fffff flags 60080200 index 110b8 |
| PCI: 00:18.0 resource base 1000 size 4000 align 12 gran 12 limit 4fff flags 60080100 index 110d8 |
| PCI: 00:18.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags e0000200 index 111b8 |
| PCI: 00:00.0 |
| PCI: 00:00.0 resource base f2000000 size 100 align 12 gran 8 limit f20000ff flags 60001200 index fc |
| PCI: 00:00.1 |
| PCI: 00:00.2 |
| PCI: 00:00.2 resource base f9500000 size 4000 align 14 gran 14 limit f9503fff flags 70000200 index 44 |
| PCI: 00:02.0 |
| PCI: 00:02.0 resource base 4fff size 0 align 12 gran 12 limit 4fff flags 60080102 index 1c |
| PCI: 00:02.0 resource base f20fffff size 0 align 20 gran 20 limit f20fffff flags 60081202 index 24 |
| PCI: 00:02.0 resource base f95fffff size 0 align 20 gran 20 limit f95fffff flags 60080202 index 20 |
| PCI: 00:03.0 |
| PCI: 00:04.0 |
| PCI: 00:04.0 resource base 4fff size 0 align 12 gran 12 limit 4fff flags 60080102 index 1c |
| PCI: 00:04.0 resource base f20fffff size 0 align 20 gran 20 limit f20fffff flags 60081202 index 24 |
| PCI: 00:04.0 resource base f95fffff size 0 align 20 gran 20 limit f95fffff flags 60080202 index 20 |
| PCI: 00:05.0 |
| PCI: 00:06.0 |
| PCI: 00:07.0 |
| PCI: 00:08.0 |
| PCI: 00:09.0 child on link 0 PCI: 03:00.0 |
| PCI: 00:09.0 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c |
| PCI: 00:09.0 resource base f20fffff size 0 align 20 gran 20 limit f20fffff flags 60081202 index 24 |
| PCI: 00:09.0 resource base f9100000 size 100000 align 20 gran 20 limit f91fffff flags 60080202 index 20 |
| PCI: 03:00.0 |
| PCI: 03:00.0 resource base f9100000 size 20000 align 17 gran 17 limit f911ffff flags 60000200 index 10 |
| PCI: 03:00.0 resource base 1000 size 20 align 5 gran 5 limit 101f flags 60000100 index 18 |
| PCI: 03:00.0 resource base f9120000 size 4000 align 14 gran 14 limit f9123fff flags 60000200 index 1c |
| PCI: 00:0a.0 child on link 0 PCI: 04:00.0 |
| PCI: 00:0a.0 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c |
| PCI: 00:0a.0 resource base f20fffff size 0 align 20 gran 20 limit f20fffff flags 60081202 index 24 |
| PCI: 00:0a.0 resource base f9200000 size 100000 align 20 gran 20 limit f92fffff flags 60080202 index 20 |
| PCI: 04:00.0 |
| PCI: 04:00.0 resource base f9200000 size 20000 align 17 gran 17 limit f921ffff flags 60000200 index 10 |
| PCI: 04:00.0 resource base 2000 size 20 align 5 gran 5 limit 201f flags 60000100 index 18 |
| PCI: 04:00.0 resource base f9220000 size 4000 align 14 gran 14 limit f9223fff flags 60000200 index 1c |
| PCI: 00:0b.0 child on link 0 PCI: 05:00.0 |
| PCI: 00:0b.0 resource base 3000 size 1000 align 12 gran 12 limit 3fff flags 60080102 index 1c |
| PCI: 00:0b.0 resource base e0000000 size 12000000 align 28 gran 20 limit f1ffffff flags 60081202 index 24 |
| PCI: 00:0b.0 resource base f8000000 size 1100000 align 24 gran 20 limit f90fffff flags 60080202 index 20 |
| PCI: 05:00.0 |
| PCI: 05:00.0 resource base f8000000 size 1000000 align 24 gran 24 limit f8ffffff flags 60000200 index 10 |
| PCI: 05:00.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001201 index 14 |
| PCI: 05:00.0 resource base f0000000 size 2000000 align 25 gran 25 limit f1ffffff flags 60001201 index 1c |
| PCI: 05:00.0 resource base 3000 size 80 align 7 gran 7 limit 307f flags 60000100 index 24 |
| PCI: 05:00.0 resource base f9000000 size 80000 align 19 gran 19 limit f907ffff flags 60002200 index 30 |
| PCI: 05:00.1 |
| PCI: 05:00.1 resource base f9080000 size 4000 align 14 gran 14 limit f9083fff flags 60000200 index 10 |
| PCI: 00:0c.0 |
| PCI: 00:0c.0 resource base 4fff size 0 align 12 gran 12 limit 4fff flags 60080102 index 1c |
| PCI: 00:0c.0 resource base f20fffff size 0 align 20 gran 20 limit f20fffff flags 60081202 index 24 |
| PCI: 00:0c.0 resource base f95fffff size 0 align 20 gran 20 limit f95fffff flags 60080202 index 20 |
| PCI: 00:0d.0 child on link 0 PCI: 07:00.0 |
| PCI: 00:0d.0 resource base 4fff size 0 align 12 gran 12 limit 4fff flags 60080102 index 1c |
| PCI: 00:0d.0 resource base f20fffff size 0 align 20 gran 20 limit f20fffff flags 60081202 index 24 |
| PCI: 00:0d.0 resource base f9300000 size 100000 align 20 gran 20 limit f93fffff flags 60080202 index 20 |
| PCI: 07:00.0 |
| PCI: 07:00.0 resource base f9300000 size 2000 align 13 gran 13 limit f9301fff flags 60000201 index 10 |
| PCI: 00:11.0 |
| PCI: 00:11.0 resource base 4020 size 8 align 3 gran 3 limit 4027 flags 60000100 index 10 |
| PCI: 00:11.0 resource base 4040 size 4 align 2 gran 2 limit 4043 flags 60000100 index 14 |
| PCI: 00:11.0 resource base 4028 size 8 align 3 gran 3 limit 402f flags 60000100 index 18 |
| PCI: 00:11.0 resource base 4044 size 4 align 2 gran 2 limit 4047 flags 60000100 index 1c |
| PCI: 00:11.0 resource base 4000 size 10 align 4 gran 4 limit 400f flags 60000100 index 20 |
| PCI: 00:11.0 resource base f950d000 size 400 align 12 gran 10 limit f950d3ff flags 60000200 index 24 |
| PCI: 00:12.0 |
| PCI: 00:12.0 resource base f9508000 size 1000 align 12 gran 12 limit f9508fff flags 60000200 index 10 |
| PCI: 00:12.1 |
| PCI: 00:12.1 resource base f9509000 size 1000 align 12 gran 12 limit f9509fff flags 60000200 index 10 |
| PCI: 00:12.2 |
| PCI: 00:12.2 resource base f950e000 size 100 align 12 gran 8 limit f950e0ff flags 60000200 index 10 |
| PCI: 00:13.0 |
| PCI: 00:13.0 resource base f950a000 size 1000 align 12 gran 12 limit f950afff flags 60000200 index 10 |
| PCI: 00:13.1 |
| PCI: 00:13.1 resource base f950b000 size 1000 align 12 gran 12 limit f950bfff flags 60000200 index 10 |
| PCI: 00:13.2 |
| PCI: 00:13.2 resource base f950f000 size 100 align 12 gran 8 limit f950f0ff flags 60000200 index 10 |
| PCI: 00:14.0 child on link 0 I2C: 01:50 |
| PCI: 00:14.0 resource base fec00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 74 |
| PCI: 00:14.0 resource base feb00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 9c |
| PCI: 00:14.0 resource base fed00000 size 400 align 8 gran 8 limit ffffffff flags d0000200 index b4 |
| PCI: 00:14.0 resource base b00 size 10 align 8 gran 8 limit ffff flags d0000100 index 90 |
| PCI: 00:14.0 resource base b20 size 10 align 8 gran 8 limit ffff flags d0000100 index 58 |
| I2C: 01:50 |
| I2C: 01:51 |
| I2C: 01:52 |
| I2C: 01:53 |
| I2C: 01:54 |
| I2C: 01:55 |
| I2C: 01:56 |
| I2C: 01:57 |
| I2C: 01:2f |
| PCI: 00:14.1 |
| PCI: 00:14.1 resource base 4030 size 8 align 3 gran 3 limit 4037 flags 60000100 index 10 |
| PCI: 00:14.1 resource base 4048 size 4 align 2 gran 2 limit 404b flags 60000100 index 14 |
| PCI: 00:14.1 resource base 4038 size 8 align 3 gran 3 limit 403f flags 60000100 index 18 |
| PCI: 00:14.1 resource base 404c size 4 align 2 gran 2 limit 404f flags 60000100 index 1c |
| PCI: 00:14.1 resource base 4010 size 10 align 4 gran 4 limit 401f flags 60000100 index 20 |
| PCI: 00:14.2 |
| PCI: 00:14.2 resource base f9504000 size 4000 align 14 gran 14 limit f9507fff flags 60000201 index 10 |
| PCI: 00:14.3 child on link 0 PNP: 002e.0 |
| PCI: 00:14.3 resource base f9510000 size 1 align 12 gran 0 limit f9510000 flags 60000200 index a0 |
| PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PNP: 002e.0 |
| PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60 |
| PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 |
| PNP: 002e.1 |
| PNP: 002e.1 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60 |
| PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 |
| PNP: 002e.2 |
| PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit fff flags e0000100 index 60 |
| PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| PNP: 002e.3 |
| PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit fff flags e0000100 index 60 |
| PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| PNP: 002e.5 |
| PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60 |
| PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 62 |
| PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72 |
| PNP: 002e.106 |
| PNP: 002e.106 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 62 |
| PNP: 002e.107 |
| PNP: 002e.207 |
| PNP: 002e.307 |
| PNP: 002e.407 |
| PNP: 002e.8 |
| PNP: 002e.108 |
| PNP: 002e.9 |
| PNP: 002e.109 |
| PNP: 002e.209 |
| PNP: 002e.309 |
| PNP: 002e.a |
| PNP: 002e.b |
| PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit fff flags e0000100 index 60 |
| PNP: 002e.b resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 002e.c |
| PNP: 002e.d |
| PNP: 002e.f |
| PNP: 004e.0 |
| PCI: 00:14.4 child on link 0 PCI: 08:01.0 |
| PCI: 00:14.4 resource base 4fff size 0 align 12 gran 12 limit 4fff flags 60080102 index 1c |
| PCI: 00:14.4 resource base f20fffff size 0 align 20 gran 20 limit f20fffff flags 60081202 index 24 |
| PCI: 00:14.4 resource base f9400000 size 100000 align 20 gran 20 limit f94fffff flags 60080202 index 20 |
| PCI: 08:01.0 |
| PCI: 08:02.0 |
| PCI: 08:02.0 resource base f9400000 size 1000 align 12 gran 12 limit f9400fff flags 60000200 index 10 |
| PCI: 08:03.0 |
| PCI: 00:14.5 |
| PCI: 00:14.5 resource base f950c000 size 1000 align 12 gran 12 limit f950cfff flags 60000200 index 10 |
| PCI: 00:18.1 |
| PCI: 00:18.2 |
| PCI: 00:18.3 |
| PCI: 00:18.3 resource base f4000000 size 4000000 align 26 gran 26 limit f7ffffff flags 60000200 index 94 |
| PCI: 00:18.4 |
| PCI: 00:18.5 |
| PCI: 00:19.0 |
| PCI: 00:19.1 |
| PCI: 00:19.2 |
| PCI: 00:19.3 |
| PCI: 00:19.4 |
| PCI: 00:19.5 |
| PCI: 00:1a.0 |
| PCI: 00:1a.1 |
| PCI: 00:1a.2 |
| PCI: 00:1a.3 |
| PCI: 00:1a.4 |
| PCI: 00:1a.5 |
| PCI: 00:1b.0 |
| PCI: 00:1b.1 |
| PCI: 00:1b.2 |
| PCI: 00:1b.3 |
| PCI: 00:1b.4 |
| PCI: 00:1b.5 |
| Done allocating resources. |
| BS: BS_DEV_RESOURCES times (us): entry 0 run 3148139 exit 0 |
| Enabling resources... |
| PCI: 00:18.0 cmd <- 00 |
| PCI: 00:18.1 subsystem <- 1043/8163 |
| PCI: 00:18.1 cmd <- 00 |
| PCI: 00:18.2 subsystem <- 1043/8163 |
| PCI: 00:18.2 cmd <- 00 |
| PCI: 00:18.3 cmd <- 00 |
| PCI: 00:18.4 cmd <- 00 |
| PCI: 00:18.5 cmd <- 00 |
| PCI: 00:19.0 cmd <- 00 |
| PCI: 00:19.1 subsystem <- 1043/8163 |
| PCI: 00:19.1 cmd <- 00 |
| PCI: 00:19.2 subsystem <- 1043/8163 |
| PCI: 00:19.2 cmd <- 00 |
| PCI: 00:19.3 cmd <- 00 |
| PCI: 00:19.4 cmd <- 00 |
| PCI: 00:19.5 cmd <- 00 |
| PCI: 00:1a.0 cmd <- 00 |
| PCI: 00:1a.1 subsystem <- 1043/8163 |
| PCI: 00:1a.1 cmd <- 00 |
| PCI: 00:1a.2 subsystem <- 1043/8163 |
| PCI: 00:1a.2 cmd <- 00 |
| PCI: 00:1a.3 cmd <- 00 |
| PCI: 00:1a.4 cmd <- 00 |
| PCI: 00:1a.5 cmd <- 00 |
| PCI: 00:1b.0 cmd <- 00 |
| PCI: 00:1b.1 subsystem <- 1043/8163 |
| PCI: 00:1b.1 cmd <- 00 |
| PCI: 00:1b.2 subsystem <- 1043/8163 |
| PCI: 00:1b.2 cmd <- 00 |
| PCI: 00:1b.3 cmd <- 00 |
| PCI: 00:1b.4 cmd <- 00 |
| PCI: 00:1b.5 cmd <- 00 |
| PCI: 00:00.0 subsystem <- 1043/8163 |
| PCI: 00:00.0 cmd <- 02 |
| Initializing IOMMU |
| PCI: 00:02.0 bridge ctrl <- 0003 |
| PCI: 00:02.0 cmd <- 00 |
| PCI: 00:04.0 bridge ctrl <- 0003 |
| PCI: 00:04.0 cmd <- 00 |
| PCI: 00:09.0 bridge ctrl <- 0003 |
| PCI: 00:09.0 cmd <- 07 |
| PCI: 00:0a.0 bridge ctrl <- 0003 |
| PCI: 00:0a.0 cmd <- 07 |
| PCI: 00:0b.0 bridge ctrl <- 000b |
| PCI: 00:0b.0 cmd <- 07 |
| PCI: 00:0c.0 bridge ctrl <- 0003 |
| PCI: 00:0c.0 cmd <- 00 |
| PCI: 00:0d.0 bridge ctrl <- 0003 |
| PCI: 00:0d.0 cmd <- 06 |
| PCI: 00:11.0 subsystem <- 1043/8163 |
| PCI: 00:11.0 cmd <- 03 |
| PCI: 00:12.0 subsystem <- 1043/8163 |
| PCI: 00:12.0 cmd <- 02 |
| PCI: 00:12.1 subsystem <- 1043/8163 |
| PCI: 00:12.1 cmd <- 02 |
| PCI: 00:12.2 subsystem <- 1043/8163 |
| PCI: 00:12.2 cmd <- 02 |
| PCI: 00:13.0 subsystem <- 1043/8163 |
| PCI: 00:13.0 cmd <- 02 |
| PCI: 00:13.1 subsystem <- 1043/8163 |
| PCI: 00:13.1 cmd <- 02 |
| PCI: 00:13.2 subsystem <- 1043/8163 |
| PCI: 00:13.2 cmd <- 02 |
| PCI: 00:14.0 subsystem <- 1043/8163 |
| PCI: 00:14.0 cmd <- 403 |
| PCI: 00:14.1 subsystem <- 1043/8163 |
| PCI: 00:14.1 cmd <- 01 |
| PCI: 00:14.2 subsystem <- 1043/8163 |
| PCI: 00:14.2 cmd <- 02 |
| PCI: 00:14.3 subsystem <- 1043/8163 |
| PCI: 00:14.3 cmd <- 0f |
| sb700 lpc decode:PNP: 002e.2, base=0x000003f8, end=0x000003ff |
| sb700 lpc decode:PNP: 002e.3, base=0x000002f8, end=0x000002ff |
| sb700 lpc decode:PNP: 002e.5, base=0x00000060, end=0x00000060 |
| sb700 lpc decode:PNP: 002e.5, base=0x00000064, end=0x00000064 |
| sb700 lpc decode:PNP: 002e.b, base=0x00000290, end=0x00000291 |
| PCI: 00:14.4 bridge ctrl <- 0003 |
| PCI: 00:14.4 cmd <- 07 |
| PCI: 00:14.5 subsystem <- 1043/8163 |
| PCI: 00:14.5 cmd <- 02 |
| PCI: 03:00.0 cmd <- 03 |
| PCI: 04:00.0 cmd <- 03 |
| PCI: 05:00.0 cmd <- 03 |
| PCI: 05:00.1 cmd <- 02 |
| PCI: 07:00.0 cmd <- 02 |
| PCI: 08:02.0 subsystem <- 1043/8163 |
| PCI: 08:02.0 cmd <- 02 |
| done. |
| BS: BS_DEV_ENABLE times (us): entry 0 run 167983 exit 0 |
| Initializing devices... |
| Root Device init ... |
| Root Device init finished in 1382 usecs |
| CPU_CLUSTER: 0 init ... |
| Enabling probe filter |
| Enabling ATM mode |
| start_eip=0x00001000, code_size=0x00000031 |
| CPU1: stack_base 00150000, stack_end 00150ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 1. |
| After apic_write. |
| Initializing CPU #1 |
| Startup point 1. |
| Waiting for send to finish... |
| +CPU: vendor AMD device 600f12 |
| After Startup. |
| CPU: family 15, model 01, stepping 02 |
| CPU2: stack_base 0014f000, stack_end 0014fff8 |
| nodeid = 00, coreid = 01 |
| Asserting INIT. |
| Enabling cache |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 2. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU3: stack_base 0014e000, stack_end 0014eff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 3. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU4: stack_base 0014d000, stack_end 0014dff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 4. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU5: stack_base 0014c000, stack_end 0014cff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 5. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| |
| MTRR check |
| Fixed MTRRs : +Enabled |
| Variable MTRRs: Enabled |
| |
| After Startup. |
| CPU6: stack_base 0014b000, stack_end 0014bff8 |
| Setting up local APIC...Asserting INIT. |
| apic_id: 0x02 Waiting for send to finish... |
| +done. |
| Deasserting INIT. |
| CPU model: AMD Opteron(TM) Processor 6276 |
| Waiting for send to finish... |
| +siblings = 15, #startup loops: 1. |
| Sending STARTUP #1 to 6. |
| Disabling SMM ASeg memory |
| After apic_write. |
| CPU #2 initialized |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Startup point 1. |
| Waiting for send to finish... |
| +Setting up local APIC...After Startup. |
| CPU7: stack_base 0014a000, stack_end 0014aff8 |
| apic_id: 0x03 Asserting INIT. |
| done. |
| Waiting for send to finish... |
| +CPU model: AMD Opteron(TM) Processor 6276 |
| Deasserting INIT. |
| siblings = 15, Waiting for send to finish... |
| +Disabling SMM ASeg memory |
| #startup loops: 1. |
| Sending STARTUP #1 to 7. |
| CPU #3 initialized |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU8: stack_base 00149000, stack_end 00149ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 8. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU9: stack_base 00148000, stack_end 00148ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 9. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU10: stack_base 00147000, stack_end 00147ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 10. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU11: stack_base 00146000, stack_end 00146ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 11. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU12: stack_base 00145000, stack_end 00145ff8 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Asserting INIT. |
| Waiting for send to finish... |
| +Setting up local APIC...Deasserting INIT. |
| apic_id: 0x04 done. |
| Waiting for send to finish... |
| +CPU model: AMD Opteron(TM) Processor 6276 |
| #startup loops: 1. |
| siblings = 15, Sending STARTUP #1 to 12. |
| After apic_write. |
| Disabling SMM ASeg memory |
| Startup point 1. |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Waiting for send to finish... |
| +CPU #4 initialized |
| After Startup. |
| CPU13: stack_base 00144000, stack_end 00144ff8 |
| Variable MTRRs: Enabled |
| Asserting INIT. |
| |
| Waiting for send to finish... |
| +Setting up local APIC...Deasserting INIT. |
| apic_id: 0x05 done. |
| Waiting for send to finish... |
| CPU model: AMD Opteron(TM) Processor 6276 |
| +siblings = 15, #startup loops: 1. |
| Sending STARTUP #1 to 13. |
| Disabling SMM ASeg memory |
| After apic_write. |
| CPU #5 initialized |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU14: stack_base 00143000, stack_end 00143ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 14. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU15: stack_base 00142000, stack_end 00142ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| |
| MTRR check |
| Waiting for send to finish... |
| +Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| #startup loops: 1. |
| Sending STARTUP #1 to 15. |
| Setting up local APIC...After apic_write. |
| apic_id: 0x06 done. |
| Startup point 1. |
| Waiting for send to finish... |
| +CPU model: AMD Opteron(TM) Processor 6276 |
| After Startup. |
| CPU16: stack_base 00141000, stack_end 00141ff8 |
| siblings = 15, Asserting INIT. |
| Disabling SMM ASeg memory |
| Waiting for send to finish... |
| |
| MTRR check |
| Fixed MTRRs : +Enabled |
| Deasserting INIT. |
| Variable MTRRs: Waiting for send to finish... |
| +Enabled |
| #startup loops: 1. |
| Sending STARTUP #1 to 32. |
| |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +CPU #6 initialized |
| Setting up local APIC...After Startup. |
| apic_id: 0x07 CPU17: stack_base 00140000, stack_end 00140ff8 |
| done. |
| Asserting INIT. |
| CPU model: AMD Opteron(TM) Processor 6276 |
| Waiting for send to finish... |
| +siblings = 15, Deasserting INIT. |
| Disabling SMM ASeg memory |
| Waiting for send to finish... |
| +CPU #7 initialized |
| #startup loops: 1. |
| Sending STARTUP #1 to 33. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU18: stack_base 0013f000, stack_end 0013fff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 34. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU19: stack_base 0013e000, stack_end 0013eff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 35. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| +After Startup. |
| CPU20: stack_base 0013d000, stack_end 0013dff8 |
| Setting up local APIC...Asserting INIT. |
| apic_id: 0x08 done. |
| Waiting for send to finish... |
| +CPU model: AMD Opteron(TM) Processor 6276 |
| Deasserting INIT. |
| siblings = 15, Waiting for send to finish... |
| +Disabling SMM ASeg memory |
| #startup loops: 1. |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| Sending STARTUP #1 to 36. |
| CPU #8 initialized |
| After apic_write. |
| |
| Startup point 1. |
| Waiting for send to finish... |
| +Setting up local APIC...After Startup. |
| CPU21: stack_base 0013c000, stack_end 0013cff8 |
| apic_id: 0x09 done. |
| Asserting INIT. |
| CPU model: AMD Opteron(TM) Processor 6276 |
| Waiting for send to finish... |
| +siblings = 15, Deasserting INIT. |
| Disabling SMM ASeg memory |
| Waiting for send to finish... |
| CPU #9 initialized |
| +#startup loops: 1. |
| Sending STARTUP #1 to 37. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU22: stack_base 0013b000, stack_end 0013bff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 38. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU23: stack_base 0013a000, stack_end 0013aff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 39. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU24: stack_base 00139000, stack_end 00139ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Waiting for send to finish... |
| +Setting up local APIC...#startup loops: 1. |
| Sending STARTUP #1 to 40. |
| apic_id: 0x0c done. |
| After apic_write. |
| CPU model: AMD Opteron(TM) Processor 6276 |
| Startup point 1. |
| Waiting for send to finish... |
| +siblings = 15, After Startup. |
| CPU25: stack_base 00138000, stack_end 00138ff8 |
| Disabling SMM ASeg memory |
| Asserting INIT. |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Waiting for send to finish... |
| +Setting up local APIC...Deasserting INIT. |
| apic_id: 0x0d Waiting for send to finish... |
| +CPU #12 initialized |
| #startup loops: 1. |
| Sending STARTUP #1 to 41. |
| done. |
| After apic_write. |
| CPU model: AMD Opteron(TM) Processor 6276 |
| Startup point 1. |
| Waiting for send to finish... |
| +siblings = 15, After Startup. |
| Disabling SMM ASeg memory |
| CPU26: stack_base 00137000, stack_end 00137ff8 |
| CPU #13 initialized |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 42. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU27: stack_base 00136000, stack_end 00136ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 1. |
| Sending STARTUP #1 to 43. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU28: stack_base 00135000, stack_end 00135ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Waiting for send to finish... |
| +Setting up local APIC...#startup loops: 1. |
| Sending STARTUP #1 to 44. |
| apic_id: 0x20 done. |
| After apic_write. |
| CPU model: AMD Opteron(TM) Processor 6276 |
| Startup point 1. |
| Waiting for send to finish... |
| +siblings = 15, After Startup. |
| CPU29: stack_base 00134000, stack_end 00134ff8 |
| Disabling SMM ASeg memory |
| CPU #16 initialized |
| Asserting INIT. |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC...Waiting for send to finish... |
| + apic_id: 0x21 done. |
| Deasserting INIT. |
| CPU model: AMD Opteron(TM) Processor 6276 |
| Waiting for send to finish... |
| +siblings = 15, #startup loops: 1. |
| Sending STARTUP #1 to 45. |
| After apic_write. |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Disabling SMM ASeg memory |
| Setting up local APIC...CPU #17 initialized |
| apic_id: 0x0e done. |
| Startup point 1. |
| Waiting for send to finish... |
| +CPU model: AMD Opteron(TM) Processor 6276 |
| After Startup. |
| CPU30: stack_base 00133000, stack_end 00133ff8 |
| siblings = 15, Asserting INIT. |
| Disabling SMM ASeg memory |
| Waiting for send to finish... |
| +CPU #14 initialized |
| Deasserting INIT. |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Waiting for send to finish... |
| +Setting up local APIC...#startup loops: 1. |
| Sending STARTUP #1 to 46. |
| After apic_write. |
| apic_id: 0x0f done. |
| CPU model: AMD Opteron(TM) Processor 6276 |
| Startup point 1. |
| Waiting for send to finish... |
| +siblings = 15, Disabling SMM ASeg memory |
| CPU #15 initialized |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC...Setting up local APIC... apic_id: 0x26 done. |
| apic_id: 0x2e done. |
| CPU model: AMD Opteron(TM) Processor 6276 |
| CPU model: AMD Opteron(TM) Processor 6276 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| siblings = 15, siblings = 15, Disabling SMM ASeg memory |
| Disabling SMM ASeg memory |
| After Startup. |
| CPU31: stack_base 00132000, stack_end 00132ff8 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| CPU #30 initialized |
| Asserting INIT. |
| Setting up local APIC...Setting up local APIC...CPU #22 initialized |
| apic_id: 0x27 done. |
| apic_id: 0x22 done. |
| CPU model: AMD Opteron(TM) Processor 6276 |
| CPU model: AMD Opteron(TM) Processor 6276 |
| siblings = 15, siblings = 15, Disabling SMM ASeg memory |
| Disabling SMM ASeg memory |
| CPU #23 initialized |
| CPU #18 initialized |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Waiting for send to finish... |
| +Setting up local APIC...Deasserting INIT. |
| apic_id: 0x23 done. |
| CPU model: AMD Opteron(TM) Processor 6276 |
| Waiting for send to finish... |
| +siblings = 15, #startup loops: 1. |
| Sending STARTUP #1 to 47. |
| After apic_write. |
| Disabling SMM ASeg memory |
| Initializing CPU #31 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| CPU: vendor AMD device 600f12 |
| CPU #19 initialized |
| CPU: family 15, model 01, stepping 02 |
| Setting up local APIC...Startup point 1. |
| Waiting for send to finish... |
| + apic_id: 0x0a done. |
| nodeid = 03, coreid = 07 |
| CPU model: AMD Opteron(TM) Processor 6276 |
| Enabling cache |
| CPU ID 0x80000001: 600f12 |
| CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB |
| MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e |
| MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC...CPU #10 initialized |
| apic_id: 0x0b done. |
| Setting up local APIC...CPU model: AMD Opteron(TM) Processor 6276 |
| apic_id: 0x2f done. |
| s1e1e1e1e |
| MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e |
| MTRR: Fixed MS 00, coreid = 00 |
| Disabling SMM ASeg memory |
| siblings = 15, CPU #11 initialized |
| Enabling cache |
| Disabling SMM ASeg memory |
| CPU #31 initialized |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x00 done. |
| CPU model: AMD Opteron(TM) Processor 6276 |
| siblings = 15, |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Disabling SMM ASeg memory |
| CPU #0 initialized |
| Waiting for 9 CPUS to stop |
| Setting up local APIC... |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| apic_id: 0x24 done. |
| CPU model: AMD Opteron(TM) Processor 6276 |
| siblings = 15, Setting up local APIC...Disabling SMM ASeg memory |
| apic_id: 0x01 done. |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| CPU model: AMD Opteron(TM) Processor 6276 |
| Setting up local APIC...CPU #20 initialized |
| apic_id: 0x25 done. |
| Waiting for 8 CPUS to stop |
| siblings = 15, CPU model: AMD Opteron(TM) Processor 6276 |
| Setting up local APIC...Disabling SMM ASeg memory |
| apic_id: 0x28 done. |
| CPU #1 initialized |
| CPU model: AMD Opteron(TM) Processor 6276 |
| Waiting for 7 CPUS to stop |
| siblings = 15, siblings = 15, Disabling SMM ASeg memory |
| Disabling SMM ASeg memory |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| CPU #21 initialized |
| Waiting for 6 CPUS to stop |
| CPU #24 initialized |
| Setting up local APIC... apic_id: 0x29 done. |
| Waiting for 5 CPUS to stop |
| CPU model: AMD Opteron(TM) Processor 6276 |
| CPU: vendor AMD device 600f12 |
| siblings = 15, |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Disabling SMM ASeg memory |
| CPU: family 15, model 01, stepping 02 |
| CPU #25 initialized |
| Setting up local APIC...Waiting for 4 CPUS to stop |
| apic_id: 0x2a done. |
| nodeid = 03, coreid = 05 |
| CPU model: AMD Opteron(TM) Processor 6276 |
| Enabling cache |
| siblings = 15, |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Disabling SMM ASeg memory |
| CPU #26 initialized |
| Setting up local APIC... |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| apic_id: 0x2c done. |
| Waiting for 3 CPUS to stop |
| CPU model: AMD Opteron(TM) Processor 6276 |
| Setting up local APIC...siblings = 15, apic_id: 0x2b done. |
| Disabling SMM ASeg memory |
| CPU model: AMD Opteron(TM) Processor 6276 |
| |
| MTRR check |
| siblings = 15, CPU #28 initialized |
| Disabling SMM ASeg memory |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| CPU #27 initialized |
| Waiting for 2 CPUS to stop |
| Setting up local APIC...Waiting for 1 CPUS to stop |
| apic_id: 0x2d done. |
| CPU model: AMD Opteron(TM) Processor 6276 |
| siblings = 15, Disabling SMM ASeg memory |
| CPU #29 initialized |
| All AP CPUs stopped (22155 loops) |
| CPU0: stack: 00151000 - 00152000, lowest used address 001519e0, stack used: 1568 bytes |
| CPU1: stack: 00150000 - 00151000, lowest used address 00150df8, stack used: 520 bytes |
| CPU2: stack: 0014f000 - 00150000, lowest used address 0014fcac, stack used: 852 bytes |
| CPU3: stack: 0014e000 - 0014f000, lowest used address 0014edf8, stack used: 520 bytes |
| CPU4: stack: 0014d000 - 0014e000, lowest used address 0014dd18, stack used: 744 bytes |
| CPU5: stack: 0014c000 - 0014d000, lowest used address 0014cdf8, stack used: 520 bytes |
| CPU6: stack: 0014b000 - 0014c000, lowest used address 0014bd18, stack used: 744 bytes |
| CPU7: stack: 0014a000 - 0014b000, lowest used address 0014adf8, stack used: 520 bytes |
| CPU8: stack: 00149000 - 0014a000, lowest used address 00149d18, stack used: 744 bytes |
| CPU9: stack: 00148000 - 00149000, lowest used address 00148df8, stack used: 520 bytes |
| CPU10: stack: 00147000 - 00148000, lowest used address 00147d18, stack used: 744 bytes |
| CPU11: stack: 00146000 - 00147000, lowest used address 00146df8, stack used: 520 bytes |
| CPU12: stack: 00145000 - 00146000, lowest used address 00145d18, stack used: 744 bytes |
| CPU13: stack: 00144000 - 00145000, lowest used address 00144df8, stack used: 520 bytes |
| CPU14: stack: 00143000 - 00144000, lowest used address 00143d18, stack used: 744 bytes |
| CPU15: stack: 00142000 - 00143000, lowest used address 00142df8, stack used: 520 bytes |
| CPU16: stack: 00141000 - 00142000, lowest used address 00141d18, stack used: 744 bytes |
| CPU17: stack: 00140000 - 00141000, lowest used address 00140df8, stack used: 520 bytes |
| CPU18: stack: 0013f000 - 00140000, lowest used address 0013fd18, stack used: 744 bytes |
| CPU19: stack: 0013e000 - 0013f000, lowest used address 0013edf8, stack used: 520 bytes |
| CPU20: stack: 0013d000 - 0013e000, lowest used address 0013dd18, stack used: 744 bytes |
| CPU21: stack: 0013c000 - 0013d000, lowest used address 0013cdf8, stack used: 520 bytes |
| CPU22: stack: 0013b000 - 0013c000, lowest used address 0013bd18, stack used: 744 bytes |
| CPU23: stack: 0013a000 - 0013b000, lowest used address 0013adf8, stack used: 520 bytes |
| CPU24: stack: 00139000 - 0013a000, lowest used address 00139d18, stack used: 744 bytes |
| CPU25: stack: 00138000 - 00139000, lowest used address 00138df8, stack used: 520 bytes |
| CPU26: stack: 00137000 - 00138000, lowest used address 00137d18, stack used: 744 bytes |
| CPU27: stack: 00136000 - 00137000, lowest used address 00136df8, stack used: 520 bytes |
| CPU28: stack: 00135000 - 00136000, lowest used address 00135d18, stack used: 744 bytes |
| CPU29: stack: 00134000 - 00135000, lowest used address 00134df8, stack used: 520 bytes |
| CPU30: stack: 00133000 - 00134000, lowest used address 00133d18, stack used: 744 bytes |
| CPU31: stack: 00132000 - 00133000, lowest used address 00132df8, stack used: 520 bytes |
| CPU_CLUSTER: 0 init finished in 2075240 usecs |
| PCI: 00:18.0 init ... |
| PCI: 00:18.0 init finished in 1446 usecs |
| PCI: 00:18.1 init ... |
| PCI: 00:18.1 init finished in 1445 usecs |
| PCI: 00:18.2 init ... |
| PCI: 00:18.2 init finished in 1443 usecs |
| PCI: 00:18.3 init ... |
| NB: Function 3 Misc Control.. done. |
| PCI: 00:18.3 init finished in 3773 usecs |
| PCI: 00:18.4 init ... |
| NB: Function 4 Link Control.. done. |
| PCI: 00:18.4 init finished in 3774 usecs |
| PCI: 00:18.5 init ... |
| NB: Function 5 Northbridge Control.. done. |
| PCI: 00:18.5 init finished in 4210 usecs |
| PCI: 00:19.0 init ... |
| PCI: 00:19.0 init finished in 1443 usecs |
| PCI: 00:19.1 init ... |
| PCI: 00:19.1 init finished in 1444 usecs |
| PCI: 00:19.2 init ... |
| PCI: 00:19.2 init finished in 1443 usecs |
| PCI: 00:19.3 init ... |
| NB: Function 3 Misc Control.. done. |
| PCI: 00:19.3 init finished in 3773 usecs |
| PCI: 00:19.4 init ... |
| NB: Function 4 Link Control.. done. |
| PCI: 00:19.4 init finished in 3774 usecs |
| PCI: 00:19.5 init ... |
| NB: Function 5 Northbridge Control.. done. |
| PCI: 00:19.5 init finished in 4209 usecs |
| PCI: 00:1a.0 init ... |
| PCI: 00:1a.0 init finished in 1443 usecs |
| PCI: 00:1a.1 init ... |
| PCI: 00:1a.1 init finished in 1444 usecs |
| PCI: 00:1a.2 init ... |
| PCI: 00:1a.2 init finished in 1444 usecs |
| PCI: 00:1a.3 init ... |
| NB: Function 3 Misc Control.. done. |
| PCI: 00:1a.3 init finished in 3774 usecs |
| PCI: 00:1a.4 init ... |
| NB: Function 4 Link Control.. done. |
| PCI: 00:1a.4 init finished in 3774 usecs |
| PCI: 00:1a.5 init ... |
| NB: Function 5 Northbridge Control.. done. |
| PCI: 00:1a.5 init finished in 4209 usecs |
| PCI: 00:1b.0 init ... |
| PCI: 00:1b.0 init finished in 1444 usecs |
| PCI: 00:1b.1 init ... |
| PCI: 00:1b.1 init finished in 1444 usecs |
| PCI: 00:1b.2 init ... |
| PCI: 00:1b.2 init finished in 1444 usecs |
| PCI: 00:1b.3 init ... |
| NB: Function 3 Misc Control.. done. |
| PCI: 00:1b.3 init finished in 3774 usecs |
| PCI: 00:1b.4 init ... |
| NB: Function 4 Link Control.. done. |
| PCI: 00:1b.4 init finished in 3774 usecs |
| PCI: 00:1b.5 init ... |
| NB: Function 5 Northbridge Control.. done. |
| PCI: 00:1b.5 init finished in 4209 usecs |
| PCI: 00:00.0 init ... |
| pcie_init in sr5650_ht.c |
| IOAPIC: Initializing IOAPIC at 0xf2000000 |
| IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| IOAPIC: ID = 0x01 |
| IOAPIC: Dumping registers |
| reg 0x0000: 0x01000000 |
| reg 0x0001: 0x001f8021 |
| reg 0x0002: 0x00000000 |
| IOAPIC: 32 interrupts |
| IOAPIC: Enabling interrupts on FSB |
| IOAPIC: reg 0x00000000 value 0x00000000 0x00000700 |
| IOAPIC: reg 0x00000001 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000002 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000003 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000004 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000005 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000006 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000007 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000008 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000009 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000a value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000b value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000c value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000d value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000e value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000f value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000010 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000011 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000012 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000013 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000014 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000015 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000016 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000017 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000018 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000019 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000001a value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000001b value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000001c value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000001d value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000001e value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000001f value 0x00000000 0x00010000 |
| PCI: 00:00.0 init finished in 124247 usecs |
| PCI: 00:11.0 init ... |
| rev_id=15 |
| sata_bar0=4020 |
| sata_bar1=4040 |
| sata_bar2=4028 |
| sata_bar3=4044 |
| sata_bar4=4000 |
| sata_bar5=f950d000 |
| ide_bar0=4030 |
| ide_bar1=4048 |
| ide_bar2=4038 |
| ide_bar3=404c |
| Maximum SATA port count supported by silicon: 4 |
| SATA port 0 status = 23 |
| drive detection done after 0 ms |
| Primary Master device is ready after 1 tries |
| SATA port 1 status = 0 |
| No Primary Slave SATA drive on Slot1 |
| SATA port 2 status = 0 |
| No Secondary Master SATA drive on Slot2 |
| SATA port 3 status = 0 |
| No Secondary Slave SATA drive on Slot3 |
| PCI: 00:11.0 init finished in 39576 usecs |
| PCI: 00:12.0 init ... |
| PCI: 00:12.0 init finished in 1466 usecs |
| PCI: 00:12.1 init ... |
| PCI: 00:12.1 init finished in 1465 usecs |
| PCI: 00:12.2 init ... |
| usb2_bar0=0xf950e000 |
| rpr 6.23, final dword=809e03c8 |
| PCI: 00:12.2 init finished in 4838 usecs |
| PCI: 00:13.0 init ... |
| PCI: 00:13.0 init finished in 1466 usecs |
| PCI: 00:13.1 init ... |
| PCI: 00:13.1 init finished in 1465 usecs |
| PCI: 00:13.2 init ... |
| usb2_bar0=0xf950f000 |
| rpr 6.23, final dword=809e03c8 |
| PCI: 00:13.2 init finished in 4840 usecs |
| PCI: 00:14.0 init ... |
| sm_init(). |
| IOAPIC: Initializing IOAPIC at 0xfec00000 |
| IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| IOAPIC: Dumping registers |
| reg 0x0000: 0x00000000 |
| reg 0x0001: 0x00178021 |
| reg 0x0002: 0x00000000 |
| IOAPIC: 24 interrupts |
| IOAPIC: Enabling interrupts on FSB |
| IOAPIC: reg 0x00000000 value 0x00000000 0x00000700 |
| IOAPIC: reg 0x00000001 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000002 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000003 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000004 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000005 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000006 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000007 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000008 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000009 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000a value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000b value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000c value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000d value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000e value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000f value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000010 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000011 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000012 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000013 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000014 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000015 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000016 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000017 value 0x00000000 0x00010000 |
| set power "on" after power fail |
| ++++++++++no set NMI+++++ |
| RTC Init |
| sm_init() end |
| PCI: 00:14.0 init finished in 101671 usecs |
| PCI: 00:14.1 init ... |
| PCI: 00:14.1 init finished in 1447 usecs |
| PCI: 00:14.2 init ... |
| base = 0xf9504000 |
| No codec! |
| PCI: 00:14.2 init finished in 6222 usecs |
| PCI: 00:14.3 init ... |
| lpc_init |
| PCI: 00:14.3 init finished in 2101 usecs |
| PCI: 00:14.4 init ... |
| PCI: 00:14.4 init finished in 1461 usecs |
| PCI: 00:14.5 init ... |
| PCI: 00:14.5 init finished in 1466 usecs |
| PCI: 03:00.0 init ... |
| PCI: 03:00.0 init finished in 1444 usecs |
| PCI: 04:00.0 init ... |
| PCI: 04:00.0 init finished in 1444 usecs |
| PCI: 05:00.0 init ... |
| PCI: 05:00.0 init finished in 1443 usecs |
| PCI: 05:00.1 init ... |
| PCI: 05:00.1 init finished in 1444 usecs |
| PCI: 07:00.0 init ... |
| PCI: 07:00.0 init finished in 1444 usecs |
| smbus: PCI: 00:14.0[0]->I2C: 01:2f init ... |
| Set SMBUS controller to channel 1 |
| Found 64 pin W83795G Nuvoton H/W Monitor |
| W83795G/ADG work in Thermal Cruise Mode |
| Fan CTFS(celsius) TTTI(celsius) |
| 1 80 80 |
| 2 80 80 |
| 3 80 80 |
| 4 80 80 |
| 5 80 80 |
| 6 80 80 |
| DTS1 current value: 16 |
| DTS2 current value: 14 |
| DTS3 current value: 0 |
| DTS4 current value: 0 |
| DTS5 current value: 0 |
| DTS6 current value: 0 |
| DTS7 current value: 0 |
| DTS8 current value: 0 |
| Set SMBUS controller to channel 0 |
| I2C: 01:2f init finished in 280425 usecs |
| PNP: 002e.2 init ... |
| PNP: 002e.2 init finished in 1380 usecs |
| PNP: 002e.3 init ... |
| PNP: 002e.3 init finished in 1382 usecs |
| PNP: 002e.5 init ... |
| PNP: 002e.5 init finished in 1398 usecs |
| PNP: 002e.a init ... |
| set power on after power fail |
| PNP: 002e.a init finished in 3327 usecs |
| PNP: 002e.b init ... |
| PNP: 002e.b init finished in 1381 usecs |
| PCI: 08:02.0 init ... |
| PCI: 08:02.0 init finished in 1445 usecs |
| Devices initialized |
| Show all devs... After init. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:18.0: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:00.1: enabled 0 |
| PCI: 00:00.2: enabled 1 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:03.0: enabled 0 |
| PCI: 00:04.0: enabled 1 |
| PCI: 00:05.0: enabled 0 |
| PCI: 00:06.0: enabled 0 |
| PCI: 00:07.0: enabled 0 |
| PCI: 00:08.0: enabled 0 |
| PCI: 00:09.0: enabled 1 |
| PCI: 00:0a.0: enabled 1 |
| PCI: 00:0b.0: enabled 1 |
| PCI: 00:0c.0: enabled 1 |
| PCI: 00:0d.0: enabled 1 |
| PCI: 00:11.0: enabled 1 |
| PCI: 00:12.0: enabled 1 |
| PCI: 00:12.1: enabled 1 |
| PCI: 00:12.2: enabled 1 |
| PCI: 00:13.0: enabled 1 |
| PCI: 00:13.1: enabled 1 |
| PCI: 00:13.2: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| I2C: 01:50: enabled 1 |
| I2C: 01:51: enabled 1 |
| I2C: 01:52: enabled 1 |
| I2C: 01:53: enabled 1 |
| I2C: 01:54: enabled 1 |
| I2C: 01:55: enabled 1 |
| I2C: 01:56: enabled 1 |
| I2C: 01:57: enabled 1 |
| I2C: 01:2f: enabled 1 |
| PCI: 00:14.1: enabled 1 |
| PCI: 00:14.2: enabled 1 |
| PCI: 00:14.3: enabled 1 |
| PNP: 002e.0: enabled 0 |
| PNP: 002e.1: enabled 0 |
| PNP: 002e.2: enabled 1 |
| PNP: 002e.3: enabled 1 |
| PNP: 002e.5: enabled 1 |
| PNP: 002e.106: enabled 0 |
| PNP: 002e.107: enabled 0 |
| PNP: 002e.207: enabled 0 |
| PNP: 002e.307: enabled 0 |
| PNP: 002e.407: enabled 0 |
| PNP: 002e.8: enabled 0 |
| PNP: 002e.108: enabled 0 |
| PNP: 002e.9: enabled 0 |
| PNP: 002e.109: enabled 0 |
| PNP: 002e.209: enabled 0 |
| PNP: 002e.309: enabled 0 |
| PNP: 002e.a: enabled 1 |
| PNP: 002e.b: enabled 1 |
| PNP: 002e.c: enabled 0 |
| PNP: 002e.d: enabled 0 |
| PNP: 002e.f: enabled 0 |
| PNP: 004e.0: enabled 1 |
| PCI: 00:14.4: enabled 1 |
| PCI: 08:01.0: enabled 0 |
| PCI: 08:02.0: enabled 1 |
| PCI: 08:03.0: enabled 0 |
| PCI: 00:14.5: enabled 1 |
| PCI: 00:18.1: enabled 1 |
| PCI: 00:18.2: enabled 1 |
| PCI: 00:18.3: enabled 1 |
| PCI: 00:18.4: enabled 1 |
| PCI: 00:18.5: enabled 1 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:19.1: enabled 1 |
| PCI: 00:19.2: enabled 1 |
| PCI: 00:19.3: enabled 1 |
| PCI: 00:19.4: enabled 1 |
| PCI: 00:19.5: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1a.1: enabled 1 |
| PCI: 00:1a.2: enabled 1 |
| PCI: 00:1a.3: enabled 1 |
| PCI: 00:1a.4: enabled 1 |
| PCI: 00:1a.5: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1b.1: enabled 1 |
| PCI: 00:1b.2: enabled 1 |
| PCI: 00:1b.3: enabled 1 |
| PCI: 00:1b.4: enabled 1 |
| PCI: 00:1b.5: enabled 1 |
| APIC: 01: enabled 1 |
| APIC: 02: enabled 1 |
| APIC: 03: enabled 1 |
| APIC: 04: enabled 1 |
| APIC: 05: enabled 1 |
| APIC: 06: enabled 1 |
| APIC: 07: enabled 1 |
| APIC: 08: enabled 1 |
| APIC: 09: enabled 1 |
| APIC: 0a: enabled 1 |
| APIC: 0b: enabled 1 |
| APIC: 0c: enabled 1 |
| APIC: 0d: enabled 1 |
| APIC: 0e: enabled 1 |
| APIC: 0f: enabled 1 |
| APIC: 20: enabled 1 |
| APIC: 21: enabled 1 |
| APIC: 22: enabled 1 |
| APIC: 23: enabled 1 |
| APIC: 24: enabled 1 |
| APIC: 25: enabled 1 |
| APIC: 26: enabled 1 |
| APIC: 27: enabled 1 |
| APIC: 28: enabled 1 |
| APIC: 29: enabled 1 |
| APIC: 2a: enabled 1 |
| APIC: 2b: enabled 1 |
| APIC: 2c: enabled 1 |
| APIC: 2d: enabled 1 |
| APIC: 2e: enabled 1 |
| APIC: 2f: enabled 1 |
| PCI: 03:00.0: enabled 1 |
| PCI: 04:00.0: enabled 1 |
| PCI: 05:00.0: enabled 1 |
| PCI: 05:00.1: enabled 1 |
| PCI: 07:00.0: enabled 1 |
| BS: BS_DEV_INIT times (us): entry 0 run 3062936 exit 0 |
| Finalize devices... |
| Devices finalized |
| BS: BS_POST_DEVICE times (us): entry 0 run 2516 exit 0 |
| BS: BS_OS_RESUME_CHECK times (us): entry 0 run 1 exit 0 |
| Writing IRQ routing tables to 0xf0000...done. |
| Writing IRQ routing tables to 0xbfcbf000...done. |
| PIRQ table: 48 bytes. |
| Wrote the mp table end at: 000f0410 - 000f08ac |
| Wrote the mp table end at: bfcbe010 - bfcbe4ac |
| MP table: 1196 bytes. |
| CBFS: 'Master Header Locator' located CBFS at [100:7fffc0) |
| CBFS: Locating 'fallback/dsdt.aml' |
| CBFS: Found @ offset 2ae80 size 2608 |
| CBFS: 'Master Header Locator' located CBFS at [100:7fffc0) |
| CBFS: Locating 'fallback/slic' |
| CBFS: 'fallback/slic' not found. |
| ACPI: Writing ACPI tables at bfc9a000. |
| ACPI: * FACS |
| ACPI: * DSDT |
| ACPI: * FADT |
| pm_base: 0x0800 |
| ACPI: added table 1/32, length now 40 |
| ACPI: * SSDT |
| processor_brand=AMD Opteron(TM) Processor 6276 |
| Pstates algorithm ... |
| Pstate_freq[0] = 2300MHz Pstate_power[0] = 5826mw |
| Pstate_latency[0] = 5us |
| Pstate_freq[1] = 2100MHz Pstate_power[1] = 5197mw |
| Pstate_latency[1] = 5us |
| Pstate_freq[2] = 1800MHz Pstate_power[2] = 4465mw |
| Pstate_latency[2] = 5us |
| Pstate_freq[3] = 1600MHz Pstate_power[3] = 3885mw |
| Pstate_latency[3] = 5us |
| Pstate_freq[4] = 1400MHz Pstate_power[4] = 3330mw |
| Pstate_latency[4] = 5us |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| PSS: 2300MHz power 5826 control 0x0 status 0x0 |
| PSS: 2100MHz power 5197 control 0x1 status 0x1 |
| PSS: 1800MHz power 4465 control 0x2 status 0x2 |
| PSS: 1600MHz power 3885 control 0x3 status 0x3 |
| PSS: 1400MHz power 3330 control 0x4 status 0x4 |
| ACPI: added table 2/32, length now 44 |
| ACPI: * MCFG |
| ACPI: added table 3/32, length now 48 |
| ACPI: * TCPA |
| TCPA log created at bfc8a000 |
| ACPI: added table 4/32, length now 52 |
| ACPI: * MADT |
| ACPI: added table 5/32, length now 56 |
| current = bfc9f7d0 |
| ACPI: * SRAT at bfc9f7d0 |
| SRAT: lapic cpu_index=00, node_id=00, apic_id=00 |
| SRAT: lapic cpu_index=01, node_id=00, apic_id=01 |
| SRAT: lapic cpu_index=02, node_id=00, apic_id=02 |
| SRAT: lapic cpu_index=03, node_id=00, apic_id=03 |
| SRAT: lapic cpu_index=04, node_id=00, apic_id=04 |
| SRAT: lapic cpu_index=05, node_id=00, apic_id=05 |
| SRAT: lapic cpu_index=06, node_id=00, apic_id=06 |
| SRAT: lapic cpu_index=07, node_id=00, apic_id=07 |
| SRAT: lapic cpu_index=08, node_id=01, apic_id=08 |
| SRAT: lapic cpu_index=09, node_id=01, apic_id=09 |
| SRAT: lapic cpu_index=0a, node_id=01, apic_id=0a |
| SRAT: lapic cpu_index=0b, node_id=01, apic_id=0b |
| SRAT: lapic cpu_index=0c, node_id=01, apic_id=0c |
| SRAT: lapic cpu_index=0d, node_id=01, apic_id=0d |
| SRAT: lapic cpu_index=0e, node_id=01, apic_id=0e |
| SRAT: lapic cpu_index=0f, node_id=01, apic_id=0f |
| SRAT: lapic cpu_index=10, node_id=02, apic_id=20 |
| SRAT: lapic cpu_index=11, node_id=02, apic_id=21 |
| SRAT: lapic cpu_index=12, node_id=02, apic_id=22 |
| SRAT: lapic cpu_index=13, node_id=02, apic_id=23 |
| SRAT: lapic cpu_index=14, node_id=02, apic_id=24 |
| SRAT: lapic cpu_index=15, node_id=02, apic_id=25 |
| SRAT: lapic cpu_index=16, node_id=02, apic_id=26 |
| SRAT: lapic cpu_index=17, node_id=02, apic_id=27 |
| SRAT: lapic cpu_index=18, node_id=03, apic_id=28 |
| SRAT: lapic cpu_index=19, node_id=03, apic_id=29 |
| SRAT: lapic cpu_index=1a, node_id=03, apic_id=2a |
| SRAT: lapic cpu_index=1b, node_id=03, apic_id=2b |
| SRAT: lapic cpu_index=1c, node_id=03, apic_id=2c |
| SRAT: lapic cpu_index=1d, node_id=03, apic_id=2d |
| SRAT: lapic cpu_index=1e, node_id=03, apic_id=2e |
| SRAT: lapic cpu_index=1f, node_id=03, apic_id=2f |
| set_srat_mem: dev DOMAIN: 0000, res->index=0007 startk=00000000, sizek=00300000 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=002ffd00 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0030 startk=00400000, sizek=01d00000 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0042 startk=02100000, sizek=02000000 |
| ACPI: added table 6/32, length now 60 |
| ACPI: * SLIT at bfc9faa0 |
| ACPI: added table 7/32, length now 64 |
| ACPI: * IVRS at bfc9fae0 |
| Capability: type 0x01 @ 0xc8 |
| Capability: type 0x05 @ 0xd0 |
| Capability: type 0x10 @ 0xe0 |
| Capability: type 0x01 @ 0xc8 |
| Capability: type 0x05 @ 0xd0 |
| Capability: type 0x10 @ 0xe0 |
| Capability: type 0x01 @ 0x60 |
| Capability: type 0x05 @ 0x68 |
| Capability: type 0x10 @ 0x78 |
| Capability: type 0x01 @ 0x60 |
| Capability: type 0x05 @ 0x68 |
| Capability: type 0x10 @ 0x78 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x05 @ 0x70 |
| Capability: type 0x11 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| Capability: type 0x01 @ 0x44 |
| ACPI: added table 8/32, length now 68 |
| ACPI: * HPET |
| ACPI: added table 9/32, length now 72 |
| ACPI: * SRAT at bfc9fbd0 |
| SRAT: lapic cpu_index=00, node_id=00, apic_id=00 |
| SRAT: lapic cpu_index=01, node_id=00, apic_id=01 |
| SRAT: lapic cpu_index=02, node_id=00, apic_id=02 |
| SRAT: lapic cpu_index=03, node_id=00, apic_id=03 |
| SRAT: lapic cpu_index=04, node_id=00, apic_id=04 |
| SRAT: lapic cpu_index=05, node_id=00, apic_id=05 |
| SRAT: lapic cpu_index=06, node_id=00, apic_id=06 |
| SRAT: lapic cpu_index=07, node_id=00, apic_id=07 |
| SRAT: lapic cpu_index=08, node_id=01, apic_id=08 |
| SRAT: lapic cpu_index=09, node_id=01, apic_id=09 |
| SRAT: lapic cpu_index=0a, node_id=01, apic_id=0a |
| SRAT: lapic cpu_index=0b, node_id=01, apic_id=0b |
| SRAT: lapic cpu_index=0c, node_id=01, apic_id=0c |
| SRAT: lapic cpu_index=0d, node_id=01, apic_id=0d |
| SRAT: lapic cpu_index=0e, node_id=01, apic_id=0e |
| SRAT: lapic cpu_index=0f, node_id=01, apic_id=0f |
| SRAT: lapic cpu_index=10, node_id=02, apic_id=20 |
| SRAT: lapic cpu_index=11, node_id=02, apic_id=21 |
| SRAT: lapic cpu_index=12, node_id=02, apic_id=22 |
| SRAT: lapic cpu_index=13, node_id=02, apic_id=23 |
| SRAT: lapic cpu_index=14, node_id=02, apic_id=24 |
| SRAT: lapic cpu_index=15, node_id=02, apic_id=25 |
| SRAT: lapic cpu_index=16, node_id=02, apic_id=26 |
| SRAT: lapic cpu_index=17, node_id=02, apic_id=27 |
| SRAT: lapic cpu_index=18, node_id=03, apic_id=28 |
| SRAT: lapic cpu_index=19, node_id=03, apic_id=29 |
| SRAT: lapic cpu_index=1a, node_id=03, apic_id=2a |
| SRAT: lapic cpu_index=1b, node_id=03, apic_id=2b |
| SRAT: lapic cpu_index=1c, node_id=03, apic_id=2c |
| SRAT: lapic cpu_index=1d, node_id=03, apic_id=2d |
| SRAT: lapic cpu_index=1e, node_id=03, apic_id=2e |
| SRAT: lapic cpu_index=1f, node_id=03, apic_id=2f |
| set_srat_mem: dev DOMAIN: 0000, res->index=0007 startk=00000000, sizek=00300000 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=002ffd00 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0030 startk=00400000, sizek=01d00000 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0042 startk=02100000, sizek=02000000 |
| ACPI: added table 10/32, length now 76 |
| ACPI: * SLIT at bfc9fea0 |
| ACPI: added table 11/32, length now 80 |
| ACPI: * SRAT at bfc9fee0 |
| SRAT: lapic cpu_index=00, node_id=00, apic_id=00 |
| SRAT: lapic cpu_index=01, node_id=00, apic_id=01 |
| SRAT: lapic cpu_index=02, node_id=00, apic_id=02 |
| SRAT: lapic cpu_index=03, node_id=00, apic_id=03 |
| SRAT: lapic cpu_index=04, node_id=00, apic_id=04 |
| SRAT: lapic cpu_index=05, node_id=00, apic_id=05 |
| SRAT: lapic cpu_index=06, node_id=00, apic_id=06 |
| SRAT: lapic cpu_index=07, node_id=00, apic_id=07 |
| SRAT: lapic cpu_index=08, node_id=01, apic_id=08 |
| SRAT: lapic cpu_index=09, node_id=01, apic_id=09 |
| SRAT: lapic cpu_index=0a, node_id=01, apic_id=0a |
| SRAT: lapic cpu_index=0b, node_id=01, apic_id=0b |
| SRAT: lapic cpu_index=0c, node_id=01, apic_id=0c |
| SRAT: lapic cpu_index=0d, node_id=01, apic_id=0d |
| SRAT: lapic cpu_index=0e, node_id=01, apic_id=0e |
| SRAT: lapic cpu_index=0f, node_id=01, apic_id=0f |
| SRAT: lapic cpu_index=10, node_id=02, apic_id=20 |
| SRAT: lapic cpu_index=11, node_id=02, apic_id=21 |
| SRAT: lapic cpu_index=12, node_id=02, apic_id=22 |
| SRAT: lapic cpu_index=13, node_id=02, apic_id=23 |
| SRAT: lapic cpu_index=14, node_id=02, apic_id=24 |
| SRAT: lapic cpu_index=15, node_id=02, apic_id=25 |
| SRAT: lapic cpu_index=16, node_id=02, apic_id=26 |
| SRAT: lapic cpu_index=17, node_id=02, apic_id=27 |
| SRAT: lapic cpu_index=18, node_id=03, apic_id=28 |
| SRAT: lapic cpu_index=19, node_id=03, apic_id=29 |
| SRAT: lapic cpu_index=1a, node_id=03, apic_id=2a |
| SRAT: lapic cpu_index=1b, node_id=03, apic_id=2b |
| SRAT: lapic cpu_index=1c, node_id=03, apic_id=2c |
| SRAT: lapic cpu_index=1d, node_id=03, apic_id=2d |
| SRAT: lapic cpu_index=1e, node_id=03, apic_id=2e |
| SRAT: lapic cpu_index=1f, node_id=03, apic_id=2f |
| set_srat_mem: dev DOMAIN: 0000, res->index=0007 startk=00000000, sizek=00300000 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=002ffd00 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0030 startk=00400000, sizek=01d00000 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0042 startk=02100000, sizek=02000000 |
| ACPI: added table 12/32, length now 84 |
| ACPI: * SLIT at bfca01b0 |
| ACPI: added table 13/32, length now 88 |
| ACPI: * SRAT at bfca01f0 |
| SRAT: lapic cpu_index=00, node_id=00, apic_id=00 |
| SRAT: lapic cpu_index=01, node_id=00, apic_id=01 |
| SRAT: lapic cpu_index=02, node_id=00, apic_id=02 |
| SRAT: lapic cpu_index=03, node_id=00, apic_id=03 |
| SRAT: lapic cpu_index=04, node_id=00, apic_id=04 |
| SRAT: lapic cpu_index=05, node_id=00, apic_id=05 |
| SRAT: lapic cpu_index=06, node_id=00, apic_id=06 |
| SRAT: lapic cpu_index=07, node_id=00, apic_id=07 |
| SRAT: lapic cpu_index=08, node_id=01, apic_id=08 |
| SRAT: lapic cpu_index=09, node_id=01, apic_id=09 |
| SRAT: lapic cpu_index=0a, node_id=01, apic_id=0a |
| SRAT: lapic cpu_index=0b, node_id=01, apic_id=0b |
| SRAT: lapic cpu_index=0c, node_id=01, apic_id=0c |
| SRAT: lapic cpu_index=0d, node_id=01, apic_id=0d |
| SRAT: lapic cpu_index=0e, node_id=01, apic_id=0e |
| SRAT: lapic cpu_index=0f, node_id=01, apic_id=0f |
| SRAT: lapic cpu_index=10, node_id=02, apic_id=20 |
| SRAT: lapic cpu_index=11, node_id=02, apic_id=21 |
| SRAT: lapic cpu_index=12, node_id=02, apic_id=22 |
| SRAT: lapic cpu_index=13, node_id=02, apic_id=23 |
| SRAT: lapic cpu_index=14, node_id=02, apic_id=24 |
| SRAT: lapic cpu_index=15, node_id=02, apic_id=25 |
| SRAT: lapic cpu_index=16, node_id=02, apic_id=26 |
| SRAT: lapic cpu_index=17, node_id=02, apic_id=27 |
| SRAT: lapic cpu_index=18, node_id=03, apic_id=28 |
| SRAT: lapic cpu_index=19, node_id=03, apic_id=29 |
| SRAT: lapic cpu_index=1a, node_id=03, apic_id=2a |
| SRAT: lapic cpu_index=1b, node_id=03, apic_id=2b |
| SRAT: lapic cpu_index=1c, node_id=03, apic_id=2c |
| SRAT: lapic cpu_index=1d, node_id=03, apic_id=2d |
| SRAT: lapic cpu_index=1e, node_id=03, apic_id=2e |
| SRAT: lapic cpu_index=1f, node_id=03, apic_id=2f |
| set_srat_mem: dev DOMAIN: 0000, res->index=0007 startk=00000000, sizek=00300000 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=002ffd00 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0030 startk=00400000, sizek=01d00000 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0042 startk=02100000, sizek=02000000 |
| ACPI: added table 14/32, length now 92 |
| ACPI: * SLIT at bfca04c0 |
| ACPI: added table 15/32, length now 96 |
| CBFS: 'Master Header Locator' located CBFS at [100:7fffc0) |
| CBFS: Locating 'pci10de,1380.rom' |
| CBFS: 'pci10de,1380.rom' not found. |
| PCI Option ROM loading disabled for PCI: 05:00.0 |
| ACPI: done. |
| ACPI tables: 25856 bytes. |
| smbios_write_tables: bfc89000 |
| Root Device (ASUS KGPE-D16) |
| CPU_CLUSTER: 0 (AMD Family 10h/15h Root Complex) |
| APIC: 00 (unknown) |
| DOMAIN: 0000 (AMD Family 10h/15h Root Complex) |
| PCI: 00:18.0 (AMD Family 10h/15h Northbridge) |
| PCI: 00:00.0 (ATI SR5650) |
| PCI: 00:00.1 (ATI SR5650) |
| PCI: 00:00.2 (ATI SR5650) |
| PCI: 00:02.0 (ATI SR5650) |
| PCI: 00:03.0 (ATI SR5650) |
| PCI: 00:04.0 (ATI SR5650) |
| PCI: 00:05.0 (ATI SR5650) |
| PCI: 00:06.0 (ATI SR5650) |
| PCI: 00:07.0 (ATI SR5650) |
| PCI: 00:08.0 (ATI SR5650) |
| PCI: 00:09.0 (ATI SR5650) |
| PCI: 00:0a.0 (ATI SR5650) |
| PCI: 00:0b.0 (ATI SR5650) |
| PCI: 00:0c.0 (ATI SR5650) |
| PCI: 00:0d.0 (ATI SR5650) |
| PCI: 00:11.0 (ATI SP5100) |
| PCI: 00:12.0 (ATI SP5100) |
| PCI: 00:12.1 (ATI SP5100) |
| PCI: 00:12.2 (ATI SP5100) |
| PCI: 00:13.0 (ATI SP5100) |
| PCI: 00:13.1 (ATI SP5100) |
| PCI: 00:13.2 (ATI SP5100) |
| PCI: 00:14.0 (ATI SP5100) |
| I2C: 01:50 (unknown) |
| I2C: 01:51 (unknown) |
| I2C: 01:52 (unknown) |
| I2C: 01:53 (unknown) |
| I2C: 01:54 (unknown) |
| I2C: 01:55 (unknown) |
| I2C: 01:56 (unknown) |
| I2C: 01:57 (unknown) |
| I2C: 01:2f (Nuvoton W83795G/ADG Hardware Monitor) |
| PCI: 00:14.1 (ATI SP5100) |
| PCI: 00:14.2 (ATI SP5100) |
| PCI: 00:14.3 (ATI SP5100) |
| PNP: 002e.0 (WINBOND W83667HG-A Super I/O) |
| PNP: 002e.1 (WINBOND W83667HG-A Super I/O) |
| PNP: 002e.2 (WINBOND W83667HG-A Super I/O) |
| PNP: 002e.3 (WINBOND W83667HG-A Super I/O) |
| PNP: 002e.5 (WINBOND W83667HG-A Super I/O) |
| PNP: 002e.106 (WINBOND W83667HG-A Super I/O) |
| PNP: 002e.107 (WINBOND W83667HG-A Super I/O) |
| PNP: 002e.207 (WINBOND W83667HG-A Super I/O) |
| PNP: 002e.307 (WINBOND W83667HG-A Super I/O) |
| PNP: 002e.407 (WINBOND W83667HG-A Super I/O) |
| PNP: 002e.8 (WINBOND W83667HG-A Super I/O) |
| PNP: 002e.108 (WINBOND W83667HG-A Super I/O) |
| PNP: 002e.9 (WINBOND W83667HG-A Super I/O) |
| PNP: 002e.109 (WINBOND W83667HG-A Super I/O) |
| PNP: 002e.209 (WINBOND W83667HG-A Super I/O) |
| PNP: 002e.309 (WINBOND W83667HG-A Super I/O) |
| PNP: 002e.a (WINBOND W83667HG-A Super I/O) |
| PNP: 002e.b (WINBOND W83667HG-A Super I/O) |
| PNP: 002e.c (WINBOND W83667HG-A Super I/O) |
| PNP: 002e.d (WINBOND W83667HG-A Super I/O) |
| PNP: 002e.f (WINBOND W83667HG-A Super I/O) |
| PNP: 004e.0 (unknown) |
| PCI: 00:14.4 (ATI SP5100) |
| PCI: 08:01.0 (ATI SP5100) |
| PCI: 08:02.0 (ATI SP5100) |
| PCI: 08:03.0 (ATI SP5100) |
| PCI: 00:14.5 (ATI SP5100) |
| PCI: 00:18.1 (AMD Family 10h/15h Northbridge) |
| PCI: 00:18.2 (AMD Family 10h/15h Northbridge) |
| PCI: 00:18.3 (AMD Family 10h/15h Northbridge) |
| PCI: 00:18.4 (AMD Family 10h/15h Northbridge) |
| PCI: 00:18.5 (AMD Family 10h/15h Northbridge) |
| PCI: 00:19.0 (AMD Family 10h/15h Northbridge) |
| PCI: 00:19.1 (AMD Family 10h/15h Northbridge) |
| PCI: 00:19.2 (AMD Family 10h/15h Northbridge) |
| PCI: 00:19.3 (AMD Family 10h/15h Northbridge) |
| PCI: 00:19.4 (AMD Family 10h/15h Northbridge) |
| PCI: 00:19.5 (AMD Family 10h/15h Northbridge) |
| PCI: 00:1a.0 (AMD Family 10h/15h Northbridge) |
| PCI: 00:1a.1 (AMD Family 10h/15h Northbridge) |
| PCI: 00:1a.2 (AMD Family 10h/15h Northbridge) |
| PCI: 00:1a.3 (AMD Family 10h/15h Northbridge) |
| PCI: 00:1a.4 (AMD Family 10h/15h Northbridge) |
| PCI: 00:1a.5 (AMD Family 10h/15h Northbridge) |
| PCI: 00:1b.0 (AMD Family 10h/15h Northbridge) |
| PCI: 00:1b.1 (AMD Family 10h/15h Northbridge) |
| PCI: 00:1b.2 (AMD Family 10h/15h Northbridge) |
| PCI: 00:1b.3 (AMD Family 10h/15h Northbridge) |
| PCI: 00:1b.4 (AMD Family 10h/15h Northbridge) |
| PCI: 00:1b.5 (AMD Family 10h/15h Northbridge) |
| APIC: 01 (unknown) |
| APIC: 02 (unknown) |
| APIC: 03 (unknown) |
| APIC: 04 (unknown) |
| APIC: 05 (unknown) |
| APIC: 06 (unknown) |
| APIC: 07 (unknown) |
| APIC: 08 (unknown) |
| APIC: 09 (unknown) |
| APIC: 0a (unknown) |
| APIC: 0b (unknown) |
| APIC: 0c (unknown) |
| APIC: 0d (unknown) |
| APIC: 0e (unknown) |
| APIC: 0f (unknown) |
| APIC: 20 (unknown) |
| APIC: 21 (unknown) |
| APIC: 22 (unknown) |
| APIC: 23 (unknown) |
| APIC: 24 (unknown) |
| APIC: 25 (unknown) |
| APIC: 26 (unknown) |
| APIC: 27 (unknown) |
| APIC: 28 (unknown) |
| APIC: 29 (unknown) |
| APIC: 2a (unknown) |
| APIC: 2b (unknown) |
| APIC: 2c (unknown) |
| APIC: 2d (unknown) |
| APIC: 2e (unknown) |
| APIC: 2f (unknown) |
| PCI: 03:00.0 (unknown) |
| PCI: 04:00.0 (unknown) |
| PCI: 05:00.0 (unknown) |
| PCI: 05:00.1 (unknown) |
| PCI: 07:00.0 (unknown) |
| SMBIOS tables: 1085 bytes. |
| Writing table forward entry at 0x00000500 |
| Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4012 |
| Writing coreboot table at 0xbfcc0000 |
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1. 0000000000001000-00000000bfc88fff: RAM |
| 2. 00000000bfc89000-00000000bfffffff: CONFIGURATION TABLES |
| 3. 00000000c0000000-00000000cfffffff: RESERVED |
| 4. 00000000f9500000-00000000f9503fff: RESERVED |
| 5. 00000000feb00000-00000000feb00fff: RESERVED |
| 6. 00000000fec00000-00000000fec00fff: RESERVED |
| 7. 00000000fed00000-00000000fed00fff: RESERVED |
| 8. 0000000100000000-000000103fffffff: RAM |
| CBFS: 'Master Header Locator' located CBFS at [100:7fffc0) |
| FMAP: Found "FLASH" version 1.1 at 0. |
| FMAP: base = ff800000 size = 800000 #areas = 3 |
| Wrote coreboot table at: bfcc0000, 0x2f0 bytes, checksum dd26 |
| coreboot table: 776 bytes. |
| IMD ROOT 0. bffff000 00001000 |
| IMD SMALL 1. bfffe000 00001000 |
| CAR GLOBALS 2. bfff3000 0000a6c0 |
| CONSOLE 3. bffd3000 00020000 |
| AMDMEM INFO 4. bffc9000 000093fc |
| ACPI RESUME 5. bfcc8000 00301000 |
| COREBOOT 6. bfcc0000 00008000 |
| IRQ TABLE 7. bfcbf000 00001000 |
| SMP TABLE 8. bfcbe000 00001000 |
| ACPI 9. bfc9a000 00024000 |
| TCPA LOG 10. bfc8a000 00010000 |
| SMBIOS 11. bfc89000 00000800 |
| IMD small region: |
| IMD ROOT 0. bfffec00 00000400 |
| ROMSTAGE 1. bfffebe0 00000004 |
| GDT 2. bfffe9e0 00000200 |
| Writing AMD DCT configuration to Flash |
| CBFS: 'Master Header Locator' located CBFS at [100:7fffc0) |
| CBFS: Locating 's3nv' |
| CBFS: Found @ offset 2fec0 size 10000 |
| Manufacturer: ef |
| SF: Detected W25Q64 with sector size 0x1000, total 0x800000 |
| SF: Successfully erased 32768 bytes @ 0x38000 |
| BS: BS_WRITE_TABLES times (us): entry 0 run 2157893 exit 0 |
| CBFS: 'Master Header Locator' located CBFS at [100:7fffc0) |
| CBFS: Locating 'fallback/payload' |
| CBFS: Found @ offset 5c340 size f9a4 |
| Loading segment from ROM address 0xff85c478 |
| code (compression=1) |
| New segment dstaddr 0xe23e0 memsize 0x1dc20 srcaddr 0xff85c4b0 filesize 0xf96c |
| Loading segment from ROM address 0xff85c494 |
| Entry Point 0x000ff06e |
| Bounce Buffer at bfa5a000, 2287136 bytes |
| Loading Segment: addr: 0x00000000000e23e0 memsz: 0x000000000001dc20 filesz: 0x000000000000f96c |
| lb: [0x0000000000100000, 0x0000000000217310) |
| Post relocation: addr: 0x00000000000e23e0 memsz: 0x000000000001dc20 filesz: 0x000000000000f96c |
| using LZMA |
| [ 0x000e23e0, 00100000, 0x00100000) <- ff85c4b0 |
| dest 000e23e0, end 00100000, bouncebuffer bfa5a000 |
| Loaded segments |
| BS: BS_PAYLOAD_LOAD times (us): entry 0 run 74289 exit 0 |
| Jumping to boot code at 000ff06e(bfcc0000) |
| CPU0: stack: 00151000 - 00152000, lowest used address 001519e0, stack used: 1568 bytes |
| entry = 0x000ff06e |
| lb_start = 0x00100000 |
| lb_size = 0x00117310 |
| buffer = 0xbfa5a000 |
| SeaBIOS (version rel-1.10.1-0-g8891697) |
| BUILD: gcc: (coreboot toolchain v1.43 August 31st, 2016) 5.3.0 binutils: (GNU Binutils) 2.26.1 |
| Found coreboot cbmem |
| 2710 bytes lost |