| |
| |
| coreboot-4.5-1150-ge4c85c128a-dirty Wed Mar 8 03:37:30 UTC 2017 romstage starting... |
| Setting up static southbridge registers... done. |
| Disabling Watchdog reboot... done. |
| Setting up static northbridge registers... done. |
| Initializing Graphics... |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 151a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 152c0 |
| CBFS: File @ offset 152c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 152c0 |
| CBFS: Checking offset 1ab40 |
| CBFS: File @ offset 1ab40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1ab40 |
| CBFS: Checking offset 215c0 |
| CBFS: File @ offset 215c0 size 375 |
| CBFS: Unmatched 'config' at 215c0 |
| CBFS: Checking offset 21980 |
| CBFS: File @ offset 21980 size 246 |
| CBFS: Unmatched 'revision' at 21980 |
| CBFS: Checking offset 21c00 |
| CBFS: File @ offset 21c00 size 100 |
| CBFS: Unmatched 'cmos.default' at 21c00 |
| CBFS: Checking offset 21d40 |
| CBFS: File @ offset 21d40 size 7a0 |
| CBFS: Found @ offset 21d40 size 7a0 |
| Back from sandybridge_early_initialization() |
| POST: 0x38 |
| SMBus controller enabled. |
| POST: 0x39 |
| POST: 0x3a |
| CPU id(306a9): Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz |
| AES supported, TXT supported, VT supported |
| PCH type: QM77, device id: 1e55, rev id 4 |
| Intel ME early init |
| Intel ME firmware is ready |
| ME: Requested 32MB UMA |
| Starting native Platform init |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'mrc.cache' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 151a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 152c0 |
| CBFS: File @ offset 152c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 152c0 |
| CBFS: Checking offset 1ab40 |
| CBFS: File @ offset 1ab40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1ab40 |
| CBFS: Checking offset 215c0 |
| CBFS: File @ offset 215c0 size 375 |
| CBFS: Unmatched 'config' at 215c0 |
| CBFS: Checking offset 21980 |
| CBFS: File @ offset 21980 size 246 |
| CBFS: Unmatched 'revision' at 21980 |
| CBFS: Checking offset 21c00 |
| CBFS: File @ offset 21c00 size 100 |
| CBFS: Unmatched 'cmos.default' at 21c00 |
| CBFS: Checking offset 21d40 |
| CBFS: File @ offset 21d40 size 7a0 |
| CBFS: Unmatched 'cmos_layout.bin' at 21d40 |
| CBFS: Checking offset 22540 |
| CBFS: File @ offset 22540 size 660 |
| CBFS: Unmatched 'payload_config' at 22540 |
| CBFS: Checking offset 22c00 |
| CBFS: File @ offset 22c00 size ea |
| CBFS: Unmatched 'payload_revision' at 22c00 |
| CBFS: Checking offset 22d40 |
| CBFS: File @ offset 22d40 size 8 |
| CBFS: Unmatched 'etc/ps2-keyboard-spinup' at 22d40 |
| CBFS: Checking offset 22d80 |
| CBFS: File @ offset 22d80 size f |
| CBFS: Unmatched 'bootorder' at 22d80 |
| CBFS: Checking offset 22e00 |
| CBFS: File @ offset 22e00 size 8 |
| CBFS: Unmatched 'etc/show-boot-menu' at 22e00 |
| CBFS: Chec |
| |
| *** Log truncated, 3770 characters dropped. *** |
| |
| CBMEM entry for DIMM info: 0xbfffe960 |
| POST: 0x3b |
| POST: 0x3c |
| POST: 0x3d |
| TPM initialization. |
| TPM: Init |
| Found TPM ST33ZP24 by ST Microelectronics |
| TPM: Open |
| TPM: Startup |
| TPM: command 0x99 returned 0x0 |
| TPM: OK. |
| POST: 0x3f |
| MTRR Range: Start=ff000000 End=0 (Size 1000000) |
| MTRR Range: Start=0 End=1000000 (Size 1000000) |
| MTRR Range: Start=bf800000 End=c0000000 (Size 800000) |
| MTRR Range: Start=c0000000 End=c0800000 (Size 800000) |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'fallback/ramstage' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 151a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 152c0 |
| CBFS: File @ offset 152c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 152c0 |
| CBFS: Checking offset 1ab40 |
| CBFS: File @ offset 1ab40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1ab40 |
| CBFS: Checking offset 215c0 |
| CBFS: File @ offset 215c0 size 375 |
| CBFS: Unmatched 'config' at 215c0 |
| CBFS: Checking offset 21980 |
| CBFS: File @ offset 21980 size 246 |
| CBFS: Unmatched 'revision' at 21980 |
| CBFS: Checking offset 21c00 |
| CBFS: File @ offset 21c00 size 100 |
| CBFS: Unmatched 'cmos.default' at 21c00 |
| CBFS: Checking offset 21d40 |
| CBFS: File @ offset 21d40 size 7a0 |
| CBFS: Unmatched 'cmos_layout.bin' at 21d40 |
| CBFS: Checking offset 22540 |
| CBFS: File @ offset 22540 size 660 |
| CBFS: Unmatched 'payload_config' at 22540 |
| CBFS: Checking offset 22c00 |
| CBFS: File @ offset 22c00 size ea |
| CBFS: Unmatched 'payload_revision' at 22c00 |
| CBFS: Checking offset 22d40 |
| CBFS: File @ offset 22d40 size 8 |
| CBFS: Unmatched 'etc/ps2-keyboard-spinup' at 22d40 |
| CBFS: Checking offset 22d80 |
| CBFS: File @ offset 22d80 size f |
| CBFS: Unmatched 'bootorder' at 22d80 |
| CBFS: Checking offset 22e00 |
| CBFS: File @ offset 22e00 size 8 |
| CBFS: Unmatched 'etc/show-boot-menu' at 22e00 |
| CBFS: Checking offset 22e40 |
| CBFS: File @ offset 22e40 size 11f2 |
| CBFS: Unmatched 'grub.cfg' at 22e40 |
| CBFS: Checking offset 24080 |
| CBFS: File @ offset 24080 size e18 |
| CBFS: Unmatched '' at 24080 |
| CBFS: Checking offset 24ec0 |
| CBFS: File @ offset 24ec0 size 10000 |
| CBFS: Unmatched 'mrc.cache' at 24ec0 |
| CBFS: Checking offset 34f00 |
| CBFS: File @ offset 34f00 size 17347 |
| CBFS: Found @ offset 34f00 size 17347 |
| Decompressing stage fallback/ramstage @ 0xbff93fc0 (277200 bytes) |
| Loading module at bff94000 with entry bff94000. filesize: 0x32bf8 memsize: 0x43a90 |
| Processing 3180 relocs. Offset value of 0xbfe94000 |
| |
| |
| coreboot-4.5-1150-ge4c85c128a-dirty Wed Mar 8 03:37:30 UTC 2017 ramstage starting... |
| POST: 0x39 |
| POST: 0x80 |
| Normal boot. |
| POST: 0x70 |
| BS: BS_PRE_DEVICE times (us): entry 0 run 2 exit 0 |
| POST: 0x71 |
| BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 3 exit 0 |
| POST: 0x72 |
| Enumerating buses... |
| Show all devs... Before device enumeration. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 0 |
| PCI: 00:1c.4: enabled 0 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 00ff.1: enabled 1 |
| PNP: 0c31.0: enabled 1 |
| PNP: 00ff.2: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| I2C: 00:54: enabled 1 |
| I2C: 00:55: enabled 1 |
| I2C: 00:56: enabled 1 |
| I2C: 00:57: enabled 1 |
| I2C: 00:5c: enabled 1 |
| I2C: 00:5d: enabled 1 |
| I2C: 00:5e: enabled 1 |
| I2C: 00:5f: enabled 1 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 1 |
| Compare with tree... |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 0 |
| PCI: 00:1c.4: enabled 0 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 00ff.1: enabled 1 |
| PNP: 0c31.0: enabled 1 |
| PNP: 00ff.2: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| I2C: 00:54: enabled 1 |
| I2C: 00:55: enabled 1 |
| I2C: 00:56: enabled 1 |
| I2C: 00:57: enabled 1 |
| I2C: 00:5c: enabled 1 |
| I2C: 00:5d: enabled 1 |
| I2C: 00:5e: enabled 1 |
| I2C: 00:5f: enabled 1 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 1 |
| Root Device scanning... |
| root_dev_scan_bus for Root Device |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| DOMAIN: 0000 scanning... |
| PCI: pci_scan_bus for bus 00 |
| POST: 0x24 |
| PCI: 00:00.0 [8086/0154] ops |
| PCI: 00:00.0 [8086/0154] enabled |
| Capability: type 0x0d @ 0x88 |
| Capability: type 0x01 @ 0x80 |
| Capability: type 0x05 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| Capability: type 0x0d @ 0x88 |
| Capability: type 0x01 @ 0x80 |
| Capability: type 0x05 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| PCI: 00:01.0 subordinate bus PCI Express |
| PCI: 00:01.0 [8086/0151] disabled |
| PCI: 00:02.0 [8086/0000] ops |
| PCI: 00:02.0 [8086/0166] enabled |
| memalign Enter, boundary 8, size 152, free_mem_ptr bffd3a90 |
| memalign bffd3a90 |
| PCI: 00:04.0 [8086/0153] enabled |
| PCI: 00:14.0 [8086/0000] ops |
| PCI: 00:14.0 [8086/1e31] enabled |
| PCI: 00:16.0 [8086/1e3a] ops |
| PCI: 00:16.0 [8086/1e3a] enabled |
| PCI: 00:16.1: Disabling device |
| PCI: 00:16.2: Disabling device |
| PCI: 00:16.3: Disabling device |
| PCI: 00:19.0 [8086/1502] enabled |
| PCI: 00:1a.0 [8086/0000] ops |
| PCI: 00:1a.0 [8086/1e2d] enabled |
| PCI: 00:1b.0 [8086/0000] ops |
| PCI: 00:1b.0 [8086/1e20] enabled |
| PCH: PCIe Root Port coalescing is enabled |
| PCI: 00:1c.0 [8086/0000] bus ops |
| PCI: 00:1c.0 [8086/1e10] enabled |
| PCI: 00:1c.1 [8086/0000] bus ops |
| PCI: 00:1c.1 [8086/1e12] enabled |
| PCI: 00:1c.2 [8086/0000] bus ops |
| PCI: 00:1c.2 [8086/1e14] enabled |
| PCI: 00:1c.3: Disabling device |
| PCI: 00:1c.4: Disabling device |
| PCI: 00:1c.4: check set enabled |
| PCI: 00:1c.5: Disabling device |
| PCI: 00:1c.6: Disabling device |
| PCI: 00:1c.7: Disabling device |
| PCH: RPFN 0x76543210 -> 0xfedcb210 |
| PCI: 00:1d.0 [8086/0000] ops |
| PCI: 00:1d.0 [8086/1e26] enabled |
| PCI: 00:1e.0: Disabling device |
| PCI: 00:1f.0 [8086/0000] bus ops |
| PCI: 00:1f.0 [8086/1e55] enabled |
| PCI: 00:1f.2 [8086/0000] ops |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 151a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 152c0 |
| CBFS: File @ offset 152c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 152c0 |
| CBFS: Checking offset 1ab40 |
| CBFS: File @ offset 1ab40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1ab40 |
| CBFS: Checking offset 215c0 |
| CBFS: File @ offset 215c0 size 375 |
| CBFS: Unmatched 'config' at 215c0 |
| CBFS: Checking offset 21980 |
| CBFS: File @ offset 21980 size 246 |
| CBFS: Unmatched 'revision' at 21980 |
| CBFS: Checking offset 21c00 |
| CBFS: File @ offset 21c00 size 100 |
| CBFS: Unmatched 'cmos.default' at 21c00 |
| CBFS: Checking offset 21d40 |
| CBFS: File @ offset 21d40 size 7a0 |
| CBFS: Found @ offset 21d40 size 7a0 |
| PCI: 00:1f.2 [8086/1e01] enabled |
| PCI: 00:1f.3 [8086/0000] bus ops |
| PCI: 00:1f.3 [8086/1e22] enabled |
| PCI: 00:1f.5: Disabling device |
| PCI: Static device PCI: 00:1f.6 not found, disabling it. |
| POST: 0x25 |
| PCI: 00:1c.0 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.0 |
| PCI: pci_scan_bus for bus 01 |
| POST: 0x24 |
| PCI: 01:00.0 [1180/0000] ops |
| PCI: 01:00.0 [1180/e822] enabled |
| POST: 0x25 |
| POST: 0x55 |
| Capability: type 0x05 @ 0x50 |
| Capability: type 0x01 @ 0x78 |
| Capability: type 0x10 @ 0x80 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| scan_bus: scanning of bus PCI: 00:1c.0 took 222 usecs |
| PCI: 00:1c.1 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.1 |
| memalign Enter, boundary 8, size 36, free_mem_ptr bffd3b28 |
| memalign bffd3b28 |
| PCI: pci_scan_bus for bus 02 |
| POST: 0x24 |
| memalign Enter, boundary 8, size 152, free_mem_ptr bffd3b4c |
| memalign bffd3b50 |
| PCI: 02:00.0 [168c/0030] enabled |
| POST: 0x25 |
| POST: 0x55 |
| Capability: type 0x01 @ 0x40 |
| Capability: type 0x05 @ 0x50 |
| Capability: type 0x10 @ 0x70 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpointASPM: Enabled L0s and L1 |
| scan_bus: scanning of bus PCI: 00:1c.1 took 209 usecs |
| PCI: 00:1c.2 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.2 |
| memalign Enter, boundary 8, size 36, free_mem_ptr bffd3be8 |
| memalign bffd3be8 |
| PCI: pci_scan_bus for bus 03 |
| POST: 0x24 |
| POST: 0x25 |
| POST: 0x55 |
| memalign Enter, boundary 8, size 152, free_mem_ptr bffd3c0c |
| memalign bffd3c10 |
| scan_bus: scanning of bus PCI: 00:1c.2 took 51 usecs |
| PCI: 00:1f.0 scanning... |
| scan_lpc_bus for PCI: 00:1f.0 |
| memalign Enter, boundary 8, size 2560, free_mem_ptr bffd3ca8 |
| memalign bffd3ca8 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 151a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 152c0 |
| CBFS: File @ offset 152c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 152c0 |
| CBFS: Checking offset 1ab40 |
| CBFS: File @ offset 1ab40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1ab40 |
| CBFS: Checking offset 215c0 |
| CBFS: File @ offset 215c0 size 375 |
| CBFS: Unmatched 'config' at 215c0 |
| CBFS: Checking offset 21980 |
| CBFS: File @ offset 21980 size 246 |
| CBFS: Unmatched 'revision' at 21980 |
| CBFS: Checking offset 21c00 |
| CBFS: File @ offset 21c00 size 100 |
| CBFS: Unmatched 'cmos.default' at 21c00 |
| CBFS: Checking offset 21d40 |
| CBFS: File @ offset 21d40 size 7a0 |
| CBFS: Found @ offset 21d40 size 7a0 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 151a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 152c0 |
| CBFS: File @ offset 152c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 152c0 |
| CBFS: Checking offset 1ab40 |
| CBFS: File @ offset 1ab40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1ab40 |
| CBFS: Checking offset 215c0 |
| CBFS: File @ offset 215c0 size 375 |
| CBFS: Unmatched 'config' at 215c0 |
| CBFS: Checking offset 21980 |
| CBFS: File @ offset 21980 size 246 |
| CBFS: Unmatched 'revision' at 21980 |
| CBFS: Checking offset 21c00 |
| CBFS: File @ offset 21c00 size 100 |
| CBFS: Unmatched 'cmos.default' at 21c00 |
| CBFS: Checking offset 21d40 |
| CBFS: File @ offset 21d40 size 7a0 |
| CBFS: Found @ offset 21d40 size 7a0 |
| PNP: 00ff.1 enabled |
| PNP: 0c31.0 enabled |
| recv_ec_data: 0x47 |
| recv_ec_data: 0x32 |
| recv_ec_data: 0x48 |
| recv_ec_data: 0x54 |
| recv_ec_data: 0x33 |
| recv_ec_data: 0x35 |
| recv_ec_data: 0x57 |
| recv_ec_data: 0x57 |
| recv_ec_data: 0x16 |
| recv_ec_data: 0x03 |
| recv_ec_data: 0x40 |
| recv_ec_data: 0x11 |
| EC Firmware ID G2HT35WW-3.22, Version 4.01B |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 151a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 152c0 |
| CBFS: File @ offset 152c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 152c0 |
| CBFS: Checking offset 1ab40 |
| CBFS: File @ offset 1ab40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1ab40 |
| CBFS: Checking offset 215c0 |
| CBFS: File @ offset 215c0 size 375 |
| CBFS: Unmatched 'config' at 215c0 |
| CBFS: Checking offset 21980 |
| CBFS: File @ offset 21980 size 246 |
| CBFS: Unmatched 'revision' at 21980 |
| CBFS: Checking offset 21c00 |
| CBFS: File @ offset 21c00 size 100 |
| CBFS: Unmatched 'cmos.default' at 21c00 |
| CBFS: Checking offset 21d40 |
| CBFS: File @ offset 21d40 size 7a0 |
| CBFS: Found @ offset 21d40 size 7a0 |
| recv_ec_data: 0x00 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 151a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 152c0 |
| CBFS: File @ offset 152c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 152c0 |
| CBFS: Checking offset 1ab40 |
| CBFS: File @ offset 1ab40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1ab40 |
| CBFS: Checking offset 215c0 |
| CBFS: File @ offset 215c0 size 375 |
| CBFS: Unmatched 'config' at 215c0 |
| CBFS: Checking offset 21980 |
| CBFS: File @ offset 21980 size 246 |
| CBFS: Unmatched 'revision' at 21980 |
| CBFS: Checking offset 21c00 |
| CBFS: File @ offset 21c00 size 100 |
| CBFS: Unmatched 'cmos.default' at 21c00 |
| CBFS: Checking offset 21d40 |
| CBFS: File @ offset 21d40 size 7a0 |
| CBFS: Found @ offset 21d40 size 7a0 |
| recv_ec_data: 0x70 |
| recv_ec_data: 0x90 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 151a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 152c0 |
| CBFS: File @ offset 152c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 152c0 |
| CBFS: Checking offset 1ab40 |
| CBFS: File @ offset 1ab40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1ab40 |
| CBFS: Checking offset 215c0 |
| CBFS: File @ offset 215c0 size 375 |
| CBFS: Unmatched 'config' at 215c0 |
| CBFS: Checking offset 21980 |
| CBFS: File @ offset 21980 size 246 |
| CBFS: Unmatched 'revision' at 21980 |
| CBFS: Checking offset 21c00 |
| CBFS: File @ offset 21c00 size 100 |
| CBFS: Unmatched 'cmos.default' at 21c00 |
| CBFS: Checking offset 21d40 |
| CBFS: File @ offset 21d40 size 7a0 |
| CBFS: Found @ offset 21d40 size 7a0 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 151a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 152c0 |
| CBFS: File @ offset 152c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 152c0 |
| CBFS: Checking offset 1ab40 |
| CBFS: File @ offset 1ab40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1ab40 |
| CBFS: Checking offset 215c0 |
| CBFS: File @ offset 215c0 size 375 |
| CBFS: Unmatched 'config' at 215c0 |
| CBFS: Checking offset 21980 |
| CBFS: File @ offset 21980 size 246 |
| CBFS: Unmatched 'revision' at 21980 |
| CBFS: Checking offset 21c00 |
| CBFS: File @ offset 21c00 size 100 |
| CBFS: Unmatched 'cmos.default' at 21c00 |
| CBFS: Checking offset 21d40 |
| CBFS: File @ offset 21d40 size 7a0 |
| CBFS: Found @ offset 21d40 size 7a0 |
| recv_ec_data: 0x70 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 151a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 152c0 |
| CBFS: File @ offset 152c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 152c0 |
| CBFS: Checking offset 1ab40 |
| CBFS: File @ offset 1ab40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1ab40 |
| CBFS: Checking offset 215c0 |
| CBFS: File @ offset 215c0 size 375 |
| CBFS: Unmatched 'config' at 215c0 |
| CBFS: Checking offset 21980 |
| CBFS: File @ offset 21980 size 246 |
| CBFS: Unmatched 'revision' at 21980 |
| CBFS: Checking offset 21c00 |
| CBFS: File @ offset 21c00 size 100 |
| CBFS: Unmatched 'cmos.default' at 21c00 |
| CBFS: Checking offset 21d40 |
| CBFS: File @ offset 21d40 size 7a0 |
| CBFS: Found @ offset 21d40 size 7a0 |
| recv_ec_data: 0x70 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 151a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 152c0 |
| CBFS: File @ offset 152c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 152c0 |
| CBFS: Checking offset 1ab40 |
| CBFS: File @ offset 1ab40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1ab40 |
| CBFS: Checking offset 215c0 |
| CBFS: File @ offset 215c0 size 375 |
| CBFS: Unmatched 'config' at 215c0 |
| CBFS: Checking offset 21980 |
| CBFS: File @ offset 21980 size 246 |
| CBFS: Unmatched 'revision' at 21980 |
| CBFS: Checking offset 21c00 |
| CBFS: File @ offset 21c00 size 100 |
| CBFS: Unmatched 'cmos.default' at 21c00 |
| CBFS: Checking offset 21d40 |
| CBFS: File @ offset 21d40 size 7a0 |
| CBFS: Found @ offset 21d40 size 7a0 |
| recv_ec_data: 0x00 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 151a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 152c0 |
| CBFS: File @ offset 152c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 152c0 |
| CBFS: Checking offset 1ab40 |
| CBFS: File @ offset 1ab40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1ab40 |
| CBFS: Checking offset 215c0 |
| CBFS: File @ offset 215c0 size 375 |
| CBFS: Unmatched 'config' at 215c0 |
| CBFS: Checking offset 21980 |
| CBFS: File @ offset 21980 size 246 |
| CBFS: Unmatched 'revision' at 21980 |
| CBFS: Checking offset 21c00 |
| CBFS: File @ offset 21c00 size 100 |
| CBFS: Unmatched 'cmos.default' at 21c00 |
| CBFS: Checking offset 21d40 |
| CBFS: File @ offset 21d40 size 7a0 |
| CBFS: Found @ offset 21d40 size 7a0 |
| recv_ec_data: 0xa6 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 151a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 152c0 |
| CBFS: File @ offset 152c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 152c0 |
| CBFS: Checking offset 1ab40 |
| CBFS: File @ offset 1ab40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1ab40 |
| CBFS: Checking offset 215c0 |
| CBFS: File @ offset 215c0 size 375 |
| CBFS: Unmatched 'config' at 215c0 |
| CBFS: Checking offset 21980 |
| CBFS: File @ offset 21980 size 246 |
| CBFS: Unmatched 'revision' at 21980 |
| CBFS: Checking offset 21c00 |
| CBFS: File @ offset 21c00 size 100 |
| CBFS: Unmatched 'cmos.default' at 21c00 |
| CBFS: Checking offset 21d40 |
| CBFS: File @ offset 21d40 size 7a0 |
| CBFS: Found @ offset 21d40 size 7a0 |
| recv_ec_data: 0xa6 |
| recv_ec_data: 0x70 |
| PNP: 00ff.2 enabled |
| scan_lpc_bus for PCI: 00:1f.0 done |
| scan_bus: scanning of bus PCI: 00:1f.0 took 4768 usecs |
| PCI: 00:1f.3 scanning... |
| scan_generic_bus for PCI: 00:1f.3 |
| bus: PCI: 00:1f.3[0]->I2C: 01:54 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled |
| scan_generic_bus for PCI: 00:1f.3 done |
| scan_bus: scanning of bus PCI: 00:1f.3 took 18 usecs |
| POST: 0x55 |
| scan_bus: scanning of bus DOMAIN: 0000 took 5690 usecs |
| root_dev_scan_bus for Root Device done |
| scan_bus: scanning of bus Root Device took 5695 usecs |
| done |
| BS: BS_DEV_ENUMERATE times (us): entry 0 run 5793 exit 0 |
| POST: 0x73 |
| found VGA at PCI: 00:02.0 |
| Setting up VGA for PCI: 00:02.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| Allocating resources... |
| Reading resources... |
| Root Device read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 |
| Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000. |
| PCI: 00:1c.0 read_resources bus 1 link: 0 |
| PCI: 00:1c.0 read_resources bus 1 link: 0 done |
| PCI: 00:1c.1 read_resources bus 2 link: 0 |
| PCI: 00:1c.1 read_resources bus 2 link: 0 done |
| PCI: 00:1c.2 read_resources bus 3 link: 0 |
| PCI: 00:1c.2 read_resources bus 3 link: 0 done |
| PCI: 00:1f.0 read_resources bus 0 link: 0 |
| PNP: 00ff.1 missing read_resources |
| PNP: 00ff.2 missing read_resources |
| PCI: 00:1f.0 read_resources bus 0 link: 0 done |
| PCI: 00:1f.3 read_resources bus 1 link: 0 |
| PCI: 00:1f.3 read_resources bus 1 link: 0 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 done |
| Root Device read_resources bus 0 link: 0 done |
| Done reading resources. |
| Show resources in subtree (Root Device)...After reading. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: acac |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 |
| PCI: 00:00.0 |
| PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 |
| PCI: 00:01.0 |
| PCI: 00:02.0 |
| PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18 |
| PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20 |
| PCI: 00:04.0 |
| PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:14.0 |
| PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:16.0 |
| PCI: 00:16.0 resource base 0 size 10 align 12 gran 4 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:19.0 |
| PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 |
| PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 |
| PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 |
| PCI: 00:1a.0 |
| PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:1c.0 child on link 0 PCI: 01:00.0 |
| PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 01:00.0 |
| PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| PCI: 00:1c.1 child on link 0 PCI: 02:00.0 |
| PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 02:00.0 |
| PCI: 02:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10 |
| PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30 |
| PCI: 00:1c.2Unknown device path type: 0 |
| child on link 0 |
| PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| Unknown device path type: 0 |
| |
| Unknown device path type: 0 |
| resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10 |
| Unknown device path type: 0 |
| resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14 |
| Unknown device path type: 0 |
| resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18 |
| PCI: 00:1c.3 |
| PCI: 00:1c.4 |
| PCI: 00:1c.5 |
| PCI: 00:1c.6 |
| PCI: 00:1c.7 |
| PCI: 00:1d.0 |
| PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| PCI: 00:1e.0 |
| PCI: 00:1f.0 child on link 0 PNP: 00ff.1 |
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200 |
| PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300 |
| PNP: 00ff.1 |
| PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 |
| PNP: 0c31.0 |
| PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0 |
| PNP: 00ff.2 |
| PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 |
| PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 |
| PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 |
| PCI: 00:1f.2 |
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 |
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 |
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 |
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c |
| PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 |
| PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24 |
| PCI: 00:1f.3 child on link 0 I2C: 01:54 |
| PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 |
| PCI: 00:1f.3 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10 |
| I2C: 01:54 |
| I2C: 01:55 |
| I2C: 01:56 |
| I2C: 01:57 |
| I2C: 01:5c |
| I2C: 01:5d |
| I2C: 01:5e |
| I2C: 01:5f |
| PCI: 00:1f.5 |
| PCI: 00:1f.6 |
| DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff |
| PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| Unknown device path type: 0 |
| 18 * [0x0 - 0xfff] io |
| PCI: 00:1c.2 io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.2 1c * [0x0 - 0xfff] io |
| PCI: 00:02.0 20 * [0x1000 - 0x103f] io |
| PCI: 00:19.0 18 * [0x1040 - 0x105f] io |
| PCI: 00:1f.2 20 * [0x1060 - 0x107f] io |
| PCI: 00:1f.2 10 * [0x1080 - 0x1087] io |
| PCI: 00:1f.2 18 * [0x1088 - 0x108f] io |
| PCI: 00:1f.2 14 * [0x1090 - 0x1093] io |
| PCI: 00:1f.2 1c * [0x1094 - 0x1097] io |
| DOMAIN: 0000 io: base: 1098 size: 1098 align: 12 gran: 0 limit: ffff done |
| DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff |
| PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 01:00.0 10 * [0x0 - 0xff] mem |
| PCI: 00:1c.0 mem: base: 100 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 02:00.0 10 * [0x0 - 0x1ffff] mem |
| PCI: 02:00.0 30 * [0x20000 - 0x2ffff] mem |
| PCI: 00:1c.1 mem: base: 30000 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| Unknown device path type: 0 |
| 14 * [0x0 - 0x7fffff] prefmem |
| PCI: 00:1c.2 prefmem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done |
| PCI: 00:1c.2 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| Unknown device path type: 0 |
| 10 * [0x0 - 0x7fffff] mem |
| PCI: 00:1c.2 mem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done |
| PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem |
| PCI: 00:1c.2 24 * [0x10000000 - 0x107fffff] prefmem |
| PCI: 00:1c.2 20 * [0x10800000 - 0x10ffffff] mem |
| PCI: 00:02.0 10 * [0x11000000 - 0x113fffff] mem |
| PCI: 00:1c.0 20 * [0x11400000 - 0x114fffff] mem |
| PCI: 00:1c.1 20 * [0x11500000 - 0x115fffff] mem |
| PCI: 00:19.0 10 * [0x11600000 - 0x1161ffff] mem |
| PCI: 00:14.0 10 * [0x11620000 - 0x1162ffff] mem |
| PCI: 00:04.0 10 * [0x11630000 - 0x11637fff] mem |
| PCI: 00:1b.0 10 * [0x11638000 - 0x1163bfff] mem |
| PCI: 00:19.0 14 * [0x1163c000 - 0x1163cfff] mem |
| PCI: 00:1f.2 24 * [0x1163d000 - 0x1163d7ff] mem |
| PCI: 00:1a.0 10 * [0x1163e000 - 0x1163e3ff] mem |
| PCI: 00:1d.0 10 * [0x1163f000 - 0x1163f3ff] mem |
| PCI: 00:1f.3 10 * [0x11640000 - 0x116400ff] mem |
| PCI: 00:16.0 10 * [0x11641000 - 0x1164100f] mem |
| DOMAIN: 0000 mem: base: 11641010 size: 11641010 align: 28 gran: 0 limit: ffffffff done |
| avoid_fixed_resources: DOMAIN: 0000 |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff |
| constrain_resources: PCI: 00:00.0 60 base f8000000 limit fbffffff mem (fixed) |
| constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed) |
| constrain_resources: PCI: 00:1f.0 10000200 base 00001600 limit 0000167b io (fixed) |
| skipping PNP: 00ff.2@60 fixed resource, size=0! |
| skipping PNP: 00ff.2@62 fixed resource, size=0! |
| skipping PNP: 00ff.2@64 fixed resource, size=0! |
| skipping PNP: 00ff.2@66 fixed resource, size=0! |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 base 0000167c limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 base e0000000 limit f7ffffff |
| Setting resources... |
| DOMAIN: 0000 io: base:167c size:1098 align:12 gran:0 limit:ffff |
| PCI: 00:1c.2 1c * [0x2000 - 0x2fff] io |
| PCI: 00:02.0 20 * [0x3000 - 0x303f] io |
| PCI: 00:19.0 18 * [0x3040 - 0x305f] io |
| PCI: 00:1f.2 20 * [0x3060 - 0x307f] io |
| PCI: 00:1f.2 10 * [0x3080 - 0x3087] io |
| PCI: 00:1f.2 18 * [0x3088 - 0x308f] io |
| PCI: 00:1f.2 14 * [0x3090 - 0x3093] io |
| PCI: 00:1f.2 1c * [0x3094 - 0x3097] io |
| DOMAIN: 0000 io: next_base: 3098 size: 1098 align: 12 gran: 0 done |
| PCI: 00:1c.0 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:1c.0 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| PCI: 00:1c.1 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:1c.1 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| PCI: 00:1c.2 io: base:2000 size:1000 align:12 gran:12 limit:2fff |
| Unknown device path type: 0 |
| 18 * [0x2000 - 0x2fff] io |
| PCI: 00:1c.2 io: next_base: 3000 size: 1000 align: 12 gran: 12 done |
| DOMAIN: 0000 mem: base:e0000000 size:11641010 align:28 gran:0 limit:f7ffffff |
| PCI: 00:02.0 18 * [0xe0000000 - 0xefffffff] prefmem |
| PCI: 00:1c.2 24 * [0xf0000000 - 0xf07fffff] prefmem |
| PCI: 00:1c.2 20 * [0xf0800000 - 0xf0ffffff] mem |
| PCI: 00:02.0 10 * [0xf1000000 - 0xf13fffff] mem |
| PCI: 00:1c.0 20 * [0xf1400000 - 0xf14fffff] mem |
| PCI: 00:1c.1 20 * [0xf1500000 - 0xf15fffff] mem |
| PCI: 00:19.0 10 * [0xf1600000 - 0xf161ffff] mem |
| PCI: 00:14.0 10 * [0xf1620000 - 0xf162ffff] mem |
| PCI: 00:04.0 10 * [0xf1630000 - 0xf1637fff] mem |
| PCI: 00:1b.0 10 * [0xf1638000 - 0xf163bfff] mem |
| PCI: 00:19.0 14 * [0xf163c000 - 0xf163cfff] mem |
| PCI: 00:1f.2 24 * [0xf163d000 - 0xf163d7ff] mem |
| PCI: 00:1a.0 10 * [0xf163e000 - 0xf163e3ff] mem |
| PCI: 00:1d.0 10 * [0xf163f000 - 0xf163f3ff] mem |
| PCI: 00:1f.3 10 * [0xf1640000 - 0xf16400ff] mem |
| PCI: 00:16.0 10 * [0xf1641000 - 0xf164100f] mem |
| DOMAIN: 0000 mem: next_base: f1641010 size: 11641010 align: 28 gran: 0 done |
| PCI: 00:1c.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:1c.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.0 mem: base:f1400000 size:100000 align:20 gran:20 limit:f14fffff |
| PCI: 01:00.0 10 * [0xf1400000 - 0xf14000ff] mem |
| PCI: 00:1c.0 mem: next_base: f1400100 size: 100000 align: 20 gran: 20 done |
| PCI: 00:1c.1 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:1c.1 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.1 mem: base:f1500000 size:100000 align:20 gran:20 limit:f15fffff |
| PCI: 02:00.0 10 * [0xf1500000 - 0xf151ffff] mem |
| PCI: 02:00.0 30 * [0xf1520000 - 0xf152ffff] mem |
| PCI: 00:1c.1 mem: next_base: f1530000 size: 100000 align: 20 gran: 20 done |
| PCI: 00:1c.2 prefmem: base:f0000000 size:800000 align:22 gran:20 limit:f07fffff |
| Unknown device path type: 0 |
| 14 * [0xf0000000 - 0xf07fffff] prefmem |
| PCI: 00:1c.2 prefmem: next_base: f0800000 size: 800000 align: 22 gran: 20 done |
| PCI: 00:1c.2 mem: base:f0800000 size:800000 align:22 gran:20 limit:f0ffffff |
| Unknown device path type: 0 |
| 10 * [0xf0800000 - 0xf0ffffff] mem |
| PCI: 00:1c.2 mem: next_base: f1000000 size: 800000 align: 22 gran: 20 done |
| Root Device assign_resources, bus 0 link: 0 |
| TOUUD 0x42f600000 TOLUD 0xcea00000 TOM 0x400000000 |
| MEBASE 0x3fe000000 |
| IGD decoded, subtracting 224M UMA and 2M GTT |
| TSEG base 0xc0000000 size 8M |
| Available memory below 4GB: 3072M |
| Available memory above 4GB: 13046M |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| PCI: 00:02.0 10 <- [0x00f1000000 - 0x00f13fffff] size 0x00400000 gran 0x16 mem64 |
| PCI: 00:02.0 18 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem64 |
| PCI: 00:02.0 20 <- [0x0000003000 - 0x000000303f] size 0x00000040 gran 0x06 io |
| PCI: 00:04.0 10 <- [0x00f1630000 - 0x00f1637fff] size 0x00008000 gran 0x0f mem64 |
| PCI: 00:14.0 10 <- [0x00f1620000 - 0x00f162ffff] size 0x00010000 gran 0x10 mem64 |
| PCI: 00:16.0 10 <- [0x00f1641000 - 0x00f164100f] size 0x00000010 gran 0x04 mem64 |
| PCI: 00:19.0 10 <- [0x00f1600000 - 0x00f161ffff] size 0x00020000 gran 0x11 mem |
| PCI: 00:19.0 14 <- [0x00f163c000 - 0x00f163cfff] size 0x00001000 gran 0x0c mem |
| PCI: 00:19.0 18 <- [0x0000003040 - 0x000000305f] size 0x00000020 gran 0x05 io |
| PCI: 00:1a.0 10 <- [0x00f163e000 - 0x00f163e3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1b.0 10 <- [0x00f1638000 - 0x00f163bfff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io |
| PCI: 00:1c.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 prefmem |
| PCI: 00:1c.0 20 <- [0x00f1400000 - 0x00f14fffff] size 0x00100000 gran 0x14 bus 01 mem |
| PCI: 00:1c.0 assign_resources, bus 1 link: 0 |
| PCI: 01:00.0 10 <- [0x00f1400000 - 0x00f14000ff] size 0x00000100 gran 0x08 mem |
| PCI: 00:1c.0 assign_resources, bus 1 link: 0 |
| PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io |
| PCI: 00:1c.1 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem |
| PCI: 00:1c.1 20 <- [0x00f1500000 - 0x00f15fffff] size 0x00100000 gran 0x14 bus 02 mem |
| PCI: 00:1c.1 assign_resources, bus 2 link: 0 |
| PCI: 02:00.0 10 <- [0x00f1500000 - 0x00f151ffff] size 0x00020000 gran 0x11 mem64 |
| PCI: 02:00.0 30 <- [0x00f1520000 - 0x00f152ffff] size 0x00010000 gran 0x10 romem |
| PCI: 00:1c.1 assign_resources, bus 2 link: 0 |
| PCI: 00:1c.2 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 03 io |
| PCI: 00:1c.2 24 <- [0x00f0000000 - 0x00f07fffff] size 0x00800000 gran 0x14 bus 03 prefmem |
| PCI: 00:1c.2 20 <- [0x00f0800000 - 0x00f0ffffff] size 0x00800000 gran 0x14 bus 03 mem |
| PCI: 00:1c.2 assign_resources, bus 3 link: 0 |
| Unknown device path type: 0 |
| missing set_resources |
| PCI: 00:1c.2 assign_resources, bus 3 link: 0 |
| PCI: 00:1d.0 10 <- [0x00f163f000 - 0x00f163f3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1f.0 assign_resources, bus 0 link: 0 |
| PNP: 00ff.1 missing set_resources |
| PNP: 00ff.2 missing set_resources |
| PCI: 00:1f.0 assign_resources, bus 0 link: 0 |
| PCI: 00:1f.2 10 <- [0x0000003080 - 0x0000003087] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 14 <- [0x0000003090 - 0x0000003093] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 18 <- [0x0000003088 - 0x000000308f] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 1c <- [0x0000003094 - 0x0000003097] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 20 <- [0x0000003060 - 0x000000307f] size 0x00000020 gran 0x05 io |
| PCI: 00:1f.2 24 <- [0x00f163d000 - 0x00f163d7ff] size 0x00000800 gran 0x0b mem |
| PCI: 00:1f.3 10 <- [0x00f1640000 - 0x00f16400ff] size 0x00000100 gran 0x08 mem64 |
| PCI: 00:1f.3 assign_resources, bus 1 link: 0 |
| PCI: 00:1f.3 assign_resources, bus 1 link: 0 |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| Root Device assign_resources, bus 0 link: 0 |
| Done setting resources. |
| Show resources in subtree (Root Device)...After assigning values. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: acac |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 167c size 1098 align 12 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base e0000000 size 11641010 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100 |
| DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 |
| DOMAIN: 0000 resource base 100000 size bff00000 align 0 gran 0 limit 0 flags e0004200 index 4 |
| DOMAIN: 0000 resource base 100000000 size 32f600000 align 0 gran 0 limit 0 flags e0004200 index 5 |
| DOMAIN: 0000 resource base c0000000 size ea00000 align 0 gran 0 limit 0 flags f0000200 index 6 |
| DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7 |
| DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8 |
| DOMAIN: 0000 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9 |
| DOMAIN: 0000 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a |
| PCI: 00:00.0 |
| PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 |
| PCI: 00:01.0 |
| PCI: 00:02.0 |
| PCI: 00:02.0 resource base f1000000 size 400000 align 22 gran 22 limit f13fffff flags 60000201 index 10 |
| PCI: 00:02.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001201 index 18 |
| PCI: 00:02.0 resource base 3000 size 40 align 6 gran 6 limit 303f flags 60000100 index 20 |
| PCI: 00:04.0 |
| PCI: 00:04.0 resource base f1630000 size 8000 align 15 gran 15 limit f1637fff flags 60000201 index 10 |
| PCI: 00:14.0 |
| PCI: 00:14.0 resource base f1620000 size 10000 align 16 gran 16 limit f162ffff flags 60000201 index 10 |
| PCI: 00:16.0 |
| PCI: 00:16.0 resource base f1641000 size 10 align 12 gran 4 limit f164100f flags 60000201 index 10 |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:19.0 |
| PCI: 00:19.0 resource base f1600000 size 20000 align 17 gran 17 limit f161ffff flags 60000200 index 10 |
| PCI: 00:19.0 resource base f163c000 size 1000 align 12 gran 12 limit f163cfff flags 60000200 index 14 |
| PCI: 00:19.0 resource base 3040 size 20 align 5 gran 5 limit 305f flags 60000100 index 18 |
| PCI: 00:1a.0 |
| PCI: 00:1a.0 resource base f163e000 size 400 align 12 gran 10 limit f163e3ff flags 60000200 index 10 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base f1638000 size 4000 align 14 gran 14 limit f163bfff flags 60000201 index 10 |
| PCI: 00:1c.0 child on link 0 PCI: 01:00.0 |
| PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:1c.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 |
| PCI: 00:1c.0 resource base f1400000 size 100000 align 20 gran 20 limit f14fffff flags 60080202 index 20 |
| PCI: 01:00.0 |
| PCI: 01:00.0 resource base f1400000 size 100 align 12 gran 8 limit f14000ff flags 60000200 index 10 |
| PCI: 00:1c.1 child on link 0 PCI: 02:00.0 |
| PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:1c.1 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 |
| PCI: 00:1c.1 resource base f1500000 size 100000 align 20 gran 20 limit f15fffff flags 60080202 index 20 |
| PCI: 02:00.0 |
| PCI: 02:00.0 resource base f1500000 size 20000 align 17 gran 17 limit f151ffff flags 60000201 index 10 |
| PCI: 02:00.0 resource base f1520000 size 10000 align 16 gran 16 limit f152ffff flags 60002200 index 30 |
| PCI: 00:1c.2Unknown device path type: 0 |
| child on link 0 |
| PCI: 00:1c.2 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c |
| PCI: 00:1c.2 resource base f0000000 size 800000 align 22 gran 20 limit f07fffff flags 60081202 index 24 |
| PCI: 00:1c.2 resource base f0800000 size 800000 align 22 gran 20 limit f0ffffff flags 60080202 index 20 |
| Unknown device path type: 0 |
| |
| Unknown device path type: 0 |
| resource base f0800000 size 800000 align 22 gran 22 limit f0ffffff flags 40000200 index 10 |
| Unknown device path type: 0 |
| resource base f0000000 size 800000 align 22 gran 22 limit f07fffff flags 40001200 index 14 |
| Unknown device path type: 0 |
| resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 40000100 index 18 |
| PCI: 00:1c.3 |
| PCI: 00:1c.4 |
| PCI: 00:1c.5 |
| PCI: 00:1c.6 |
| PCI: 00:1c.7 |
| PCI: 00:1d.0 |
| PCI: 00:1d.0 resource base f163f000 size 400 align 12 gran 10 limit f163f3ff flags 60000200 index 10 |
| PCI: 00:1e.0 |
| PCI: 00:1f.0 child on link 0 PNP: 00ff.1 |
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200 |
| PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300 |
| PNP: 00ff.1 |
| PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 |
| PNP: 0c31.0 |
| PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0 |
| PNP: 00ff.2 |
| PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 |
| PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 |
| PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 |
| PCI: 00:1f.2 |
| PCI: 00:1f.2 resource base 3080 size 8 align 3 gran 3 limit 3087 flags 60000100 index 10 |
| PCI: 00:1f.2 resource base 3090 size 4 align 2 gran 2 limit 3093 flags 60000100 index 14 |
| PCI: 00:1f.2 resource base 3088 size 8 align 3 gran 3 limit 308f flags 60000100 index 18 |
| PCI: 00:1f.2 resource base 3094 size 4 align 2 gran 2 limit 3097 flags 60000100 index 1c |
| PCI: 00:1f.2 resource base 3060 size 20 align 5 gran 5 limit 307f flags 60000100 index 20 |
| PCI: 00:1f.2 resource base f163d000 size 800 align 12 gran 11 limit f163d7ff flags 60000200 index 24 |
| PCI: 00:1f.3 child on link 0 I2C: 01:54 |
| PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 |
| PCI: 00:1f.3 resource base f1640000 size 100 align 12 gran 8 limit f16400ff flags 60000201 index 10 |
| I2C: 01:54 |
| I2C: 01:55 |
| I2C: 01:56 |
| I2C: 01:57 |
| I2C: 01:5c |
| I2C: 01:5d |
| I2C: 01:5e |
| I2C: 01:5f |
| PCI: 00:1f.5 |
| PCI: 00:1f.6 |
| Done allocating resources. |
| BS: BS_DEV_RESOURCES times (us): entry 0 run 2199 exit 0 |
| POST: 0x74 |
| Enabling resources... |
| PCI: 00:00.0 subsystem <- 17aa/21fa |
| PCI: 00:00.0 cmd <- 06 |
| PCI: 00:02.0 subsystem <- 17aa/21fa |
| PCI: 00:02.0 cmd <- 03 |
| PCI: 00:04.0 cmd <- 02 |
| PCI: 00:14.0 subsystem <- 17aa/21fa |
| PCI: 00:14.0 cmd <- 102 |
| PCI: 00:16.0 subsystem <- 17aa/21fa |
| PCI: 00:16.0 cmd <- 02 |
| PCI: 00:19.0 subsystem <- 17aa/21f3 |
| PCI: 00:19.0 cmd <- 103 |
| PCI: 00:1a.0 subsystem <- 17aa/21fa |
| PCI: 00:1a.0 cmd <- 102 |
| PCI: 00:1b.0 subsystem <- 17aa/21fa |
| PCI: 00:1b.0 cmd <- 102 |
| PCI: 00:1c.0 bridge ctrl <- 0003 |
| PCI: 00:1c.0 subsystem <- 17aa/21fa |
| PCI: 00:1c.0 cmd <- 106 |
| PCI: 00:1c.1 bridge ctrl <- 0003 |
| PCI: 00:1c.1 subsystem <- 17aa/21fa |
| PCI: 00:1c.1 cmd <- 106 |
| PCI: 00:1c.2 bridge ctrl <- 0003 |
| PCI: 00:1c.2 subsystem <- 17aa/21fa |
| PCI: 00:1c.2 cmd <- 107 |
| PCI: 00:1d.0 subsystem <- 17aa/21fa |
| PCI: 00:1d.0 cmd <- 102 |
| pch_decode_init |
| PCI: 00:1f.0 subsystem <- 17aa/21fa |
| PCI: 00:1f.0 cmd <- 107 |
| PCI: 00:1f.2 subsystem <- 17aa/21fa |
| PCI: 00:1f.2 cmd <- 03 |
| PCI: 00:1f.3 subsystem <- 17aa/21fa |
| PCI: 00:1f.3 cmd <- 103 |
| PCI: 01:00.0 subsystem <- 17aa/21fa |
| PCI: 01:00.0 cmd <- 06 |
| PCI: 02:00.0 cmd <- 02 |
| done. |
| BS: BS_DEV_ENABLE times (us): entry 0 run 124 exit 0 |
| read 6000 from 07e4 |
| wrote 00000004 to 0890 |
| read 03040103 from 0894 |
| read 00000000 from 0880 |
| wrote 00000000 to 0880 |
| POST: 0x75 |
| Initializing devices... |
| Root Device init ... |
| Root Device init finished in 1 usecs |
| POST: 0x75 |
| CPU_CLUSTER: 0 init ... |
| start_eip=0x00001000, code_size=0x00000031 |
| Setting up SMI for CPU |
| Loading module at 00038000 with entry 00038000. filesize: 0x160 memsize: 0x160 |
| Processing 10 relocs. Offset value of 0x00038000 |
| Adjusting 00038002: 0x00000024 -> 0x00038024 |
| Adjusting 0003801d: 0x0000003c -> 0x0003803c |
| Adjusting 00038026: 0x00000024 -> 0x00038024 |
| Adjusting 00038054: 0x000000d8 -> 0x000380d8 |
| Adjusting 00038066: 0x00000160 -> 0x00038160 |
| Adjusting 0003806d: 0x000000c0 -> 0x000380c0 |
| Adjusting 00038075: 0x000000c4 -> 0x000380c4 |
| Adjusting 0003807e: 0x000000d0 -> 0x000380d0 |
| Adjusting 00038085: 0x000000cc -> 0x000380cc |
| Adjusting 0003808b: 0x000000c8 -> 0x000380c8 |
| SMM Module: stub loaded at 00038000. Will call bffaead6(bffd3a00) |
| Installing SMM handler to 0xc0000000 |
| Loading module at c0010000 with entry c0011589. filesize: 0x3aa0 memsize: 0x7ac0 |
| Processing 229 relocs. Offset value of 0xc0010000 |
| Adjusting c0010592: 0x00002fc4 -> 0xc0012fc4 |
| Adjusting c00105b1: 0x00002fc4 -> 0xc0012fc4 |
| Adjusting c001066e: 0x000032a5 -> 0xc00132a5 |
| Adjusting c0010685: 0x00002fc4 -> 0xc0012fc4 |
| Adjusting c00106f6: 0x00002fd4 -> 0xc0012fd4 |
| Adjusting c0010729: 0x00002fef -> 0xc0012fef |
| Adjusting c001075e: 0x00002ff8 -> 0xc0012ff8 |
| Adjusting c00107b5: 0x00003019 -> 0xc0013019 |
| Adjusting c001082c: 0x0000302e -> 0xc001302e |
| Adjusting c0010863: 0x0000304c -> 0xc001304c |
| Adjusting c0010887: 0x0000306d -> 0xc001306d |
| Adjusting c00108a0: 0x00003090 -> 0xc0013090 |
| Adjusting c0010a7a: 0x00003a80 -> 0xc0013a80 |
| Adjusting c0010a89: 0x000030bc -> 0xc00130bc |
| Adjusting c0010a8e: 0x00003a80 -> 0xc0013a80 |
| Adjusting c0010a94: 0x00003a80 -> 0xc0013a80 |
| Adjusting c0010aa9: 0x000032e0 -> 0xc00132e0 |
| Adjusting c0010aae: 0x000032fd -> 0xc00132fd |
| Adjusting c0010ab3: 0x00003300 -> 0xc0013300 |
| Adjusting c0010ab8: 0x000030c8 -> 0xc00130c8 |
| Adjusting c0010aeb: 0x00003a84 -> 0xc0013a84 |
| Adjusting c0010b01: 0x00000ac7 -> 0xc0010ac7 |
| Adjusting c0010b15: 0x00003a84 -> 0xc0013a84 |
| Adjusting c0010b27: 0x00003a84 -> 0xc0013a84 |
| Adjusting c0010b3a: 0x00003111 -> 0xc0013111 |
| Adjusting c0010b43: 0x000030ec -> 0xc00130ec |
| Adjusting c001106f: 0x00003136 -> 0xc0013136 |
| Adjusting c00112bb: 0x00003aa0 -> 0xc0013aa0 |
| Adjusting c00112d5: 0x00003aa8 -> 0xc0013aa8 |
| Adjusting c00112e0: 0x0000331b -> 0xc001331b |
| Adjusting c00112fa: 0x00003aa8 -> 0xc0013aa8 |
| Adjusting c0011313: 0x0000313d -> 0xc001313d |
| Adjusting c0011340: 0x00003156 -> 0xc0013156 |
| Adjusting c0011369: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0011383: 0x00003a00 -> 0xc0013a00 |
| Adjusting c0011397: 0x0000390d -> 0xc001390d |
| Adjusting c00113b6: 0x0000393e -> 0xc001393e |
| Adjusting c00113cd: 0x00003948 -> 0xc0013948 |
| Adjusting c00113e4: 0x0000394d -> 0xc001394d |
| Adjusting c00113fb: 0x00003956 -> 0xc0013956 |
| Adjusting c0011412: 0x00003963 -> 0xc0013963 |
| Adjusting c0011429: 0x0000396f -> 0xc001396f |
| Adjusting c0011440: 0x0000397c -> 0xc001397c |
| Adjusting c0011457: 0x00003987 -> 0xc0013987 |
| Adjusting c001146e: 0x00003993 -> 0xc0013993 |
| Adjusting c0011485: 0x0000399d -> 0xc001399d |
| Adjusting c001149c: 0x000039a2 -> 0xc00139a2 |
| Adjusting c00114b3: 0x000039aa -> 0xc00139aa |
| Adjusting c00114ca: 0x000039b1 -> 0xc00139b1 |
| Adjusting c00114e1: 0x000039b6 -> 0xc00139b6 |
| Adjusting c00114f8: 0x000039bc -> 0xc00139bc |
| Adjusting c001150e: 0x000039c1 -> 0xc00139c1 |
| Adjusting c0011524: 0x000039cc -> 0xc00139cc |
| Adjusting c001153a: 0x000039d1 -> 0xc00139d1 |
| Adjusting c0011550: 0x000039da -> 0xc00139da |
| Adjusting c0011566: 0x000039e6 -> 0xc00139e6 |
| Adjusting c0011577: 0x000032a3 -> 0xc00132a3 |
| Adjusting c0011593: 0x00003aa0 -> 0xc0013aa0 |
| Adjusting c00115a1: 0x00003aa0 -> 0xc0013aa0 |
| Adjusting c00115b2: 0x00003168 -> 0xc0013168 |
| Adjusting c00115c6: 0x00003a88 -> 0xc0013a88 |
| Adjusting c00115d1: 0x00003a88 -> 0xc0013a88 |
| Adjusting c00115e4: 0x00003aa4 -> 0xc0013aa4 |
| Adjusting c00115f0: 0x00003195 -> 0xc0013195 |
| Adjusting c0011600: 0x00003a8c -> 0xc0013a8c |
| Adjusting c0011609: 0x00003a8c -> 0xc0013a8c |
| Adjusting c0011626: 0x00003aa4 -> 0xc0013aa4 |
| Adjusting c001162f: 0x00003a88 -> 0xc0013a88 |
| Adjusting c001165f: 0x0000332d -> 0xc001332d |
| Adjusting c0011737: 0x000031a0 -> 0xc00131a0 |
| Adjusting c001174a: 0x000031b0 -> 0xc00131b0 |
| Adjusting c001178a: 0x000031ef -> 0xc00131ef |
| Adjusting c001187a: 0x00003a94 -> 0xc0013a94 |
| Adjusting c001189c: 0x0000320e -> 0xc001320e |
| Adjusting c00118b4: 0x00003210 -> 0xc0013210 |
| Adjusting c00118ce: 0x00003a94 -> 0xc0013a94 |
| Adjusting c00118f9: 0x00003a94 -> 0xc0013a94 |
| Adjusting c001191b: 0x0000320e -> 0xc001320e |
| Adjusting c0011933: 0x0000323d -> 0xc001323d |
| Adjusting c001194d: 0x00003a90 -> 0xc0013a90 |
| Adjusting c001196b: 0x00003a94 -> 0xc0013a94 |
| Adjusting c001198a: 0x0000320e -> 0xc001320e |
| Adjusting c001199d: 0x0000327d -> 0xc001327d |
| Adjusting c00119b7: 0x00003a90 -> 0xc0013a90 |
| Adjusting c00119ca: 0x00003267 -> 0xc0013267 |
| Adjusting c0011a90: 0x00003a94 -> 0xc0013a94 |
| Adjusting c0011a95: 0x00003a90 -> 0xc0013a90 |
| Adjusting c0011aa8: 0x00002fb0 -> 0xc0012fb0 |
| Adjusting c0011ad2: 0x00002fa8 -> 0xc0012fa8 |
| Adjusting c0011ad7: 0x000032ba -> 0xc00132ba |
| Adjusting c0011e20: 0x00003aac -> 0xc0013aac |
| Adjusting c0011e4f: 0x00003ab0 -> 0xc0013ab0 |
| Adjusting c0011e62: 0x00003aac -> 0xc0013aac |
| Adjusting c0011e85: 0x00003ab0 -> 0xc0013ab0 |
| Adjusting c0011ed3: 0x0000333c -> 0xc001333c |
| Adjusting c0011f20: 0x0000333c -> 0xc001333c |
| Adjusting c0011f6a: 0x00003aac -> 0xc0013aac |
| Adjusting c0012000: 0x00003358 -> 0xc0013358 |
| Adjusting c001208e: 0x00003380 -> 0xc0013380 |
| Adjusting c0012123: 0x00003496 -> 0xc0013496 |
| Adjusting c0012168: 0x000033e8 -> 0xc00133e8 |
| Adjusting c0012179: 0x00003430 -> 0xc0013430 |
| Adjusting c00121c5: 0x00003450 -> 0xc0013450 |
| Adjusting c00121f5: 0x00003474 -> 0xc0013474 |
| Adjusting c001221d: 0x000033ac -> 0xc00133ac |
| Adjusting c0012252: 0x000033ca -> 0xc00133ca |
| Adjusting c0012268: 0x00003ab0 -> 0xc0013ab0 |
| Adjusting c00122e3: 0x00003594 -> 0xc0013594 |
| Adjusting c00122e8: 0x000034cf -> 0xc00134cf |
| Adjusting c0012315: 0x000034d7 -> 0xc00134d7 |
| Adjusting c0012344: 0x00003358 -> 0xc0013358 |
| Adjusting c00123d3: 0x00003380 -> 0xc0013380 |
| Adjusting c00123f5: 0x00003ab0 -> 0xc0013ab0 |
| Adjusting c0012481: 0x00003496 -> 0xc0013496 |
| Adjusting c00124c6: 0x00003521 -> 0xc0013521 |
| Adjusting c00124d7: 0x00003430 -> 0xc0013430 |
| Adjusting c00124f7: 0x00003ab0 -> 0xc0013ab0 |
| Adjusting c001252b: 0x00003568 -> 0xc0013568 |
| Adjusting c0012570: 0x000033ac -> 0xc00133ac |
| Adjusting c001259b: 0x000034fa -> 0xc00134fa |
| Adjusting c0012664: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012673: 0x000035a5 -> 0xc00135a5 |
| Adjusting c0012691: 0x000035b0 -> 0xc00135b0 |
| Adjusting c00126ae: 0x000035b8 -> 0xc00135b8 |
| Adjusting c00126c5: 0x000035be -> 0xc00135be |
| Adjusting c00126dc: 0x000035c6 -> 0xc00135c6 |
| Adjusting c00126f3: 0x000035cc -> 0xc00135cc |
| Adjusting c001270a: 0x000035d1 -> 0xc00135d1 |
| Adjusting c0012721: 0x000035d9 -> 0xc00135d9 |
| Adjusting c0012738: 0x000035e2 -> 0xc00135e2 |
| Adjusting c001274e: 0x000035e6 -> 0xc00135e6 |
| Adjusting c0012764: 0x000035ef -> 0xc00135ef |
| Adjusting c001277a: 0x000035f8 -> 0xc00135f8 |
| Adjusting c0012790: 0x00003969 -> 0xc0013969 |
| Adjusting c00127a6: 0x000035fe -> 0xc00135fe |
| Adjusting c00127bc: 0x00003604 -> 0xc0013604 |
| Adjusting c00127d2: 0x0000360b -> 0xc001360b |
| Adjusting c00127e8: 0x00003614 -> 0xc0013614 |
| Adjusting c00127f9: 0x000032a3 -> 0xc00132a3 |
| Adjusting c001286a: 0x00003ab8 -> 0xc0013ab8 |
| Adjusting c00128a1: 0x00003625 -> 0xc0013625 |
| Adjusting c00128c0: 0x00003633 -> 0xc0013633 |
| Adjusting c00128d6: 0x00003650 -> 0xc0013650 |
| Adjusting c00128f5: 0x0000365d -> 0xc001365d |
| Adjusting c0012905: 0x0000366a -> 0xc001366a |
| Adjusting c0012914: 0x0000361f -> 0xc001361f |
| Adjusting c001291f: 0x0000361a -> 0xc001361a |
| Adjusting c0012928: 0x0000367b -> 0xc001367b |
| Adjusting c0012942: 0x0000368d -> 0xc001368d |
| Adjusting c001295f: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012987: 0x000036ad -> 0xc00136ad |
| Adjusting c0012998: 0x00003a98 -> 0xc0013a98 |
| Adjusting c00129c5: 0x000036cf -> 0xc00136cf |
| Adjusting c00129e3: 0x000036be -> 0xc00136be |
| Adjusting c00129ec: 0x00003a98 -> 0xc0013a98 |
| Adjusting c00129fe: 0x000036e0 -> 0xc00136e0 |
| Adjusting c0012a14: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012a26: 0x000036f6 -> 0xc00136f6 |
| Adjusting c0012a30: 0x00003abc -> 0xc0013abc |
| Adjusting c0012a3a: 0x0000370b -> 0xc001370b |
| Adjusting c0012a79: 0x00003ab4 -> 0xc0013ab4 |
| Adjusting c0012a83: 0x00003736 -> 0xc0013736 |
| Adjusting c0012aa6: 0x00003ab4 -> 0xc0013ab4 |
| Adjusting c0012ac7: 0x00003abc -> 0xc0013abc |
| Adjusting c0012ace: 0x0000374f -> 0xc001374f |
| Adjusting c0012ad3: 0x00003ab8 -> 0xc0013ab8 |
| Adjusting c0012ade: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012af0: 0x00003769 -> 0xc0013769 |
| Adjusting c0012b02: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012b42: 0x00003778 -> 0xc0013778 |
| Adjusting c0012b5d: 0x0000378e -> 0xc001378e |
| Adjusting c0012b72: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012b84: 0x0000379c -> 0xc001379c |
| Adjusting c0012b9b: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012ba9: 0x000037b2 -> 0xc00137b2 |
| Adjusting c0012bc1: 0x000037c2 -> 0xc00137c2 |
| Adjusting c0012bd8: 0x000037bc -> 0xc00137bc |
| Adjusting c0012bef: 0x000037c7 -> 0xc00137c7 |
| Adjusting c0012c06: 0x000037d0 -> 0xc00137d0 |
| Adjusting c0012c21: 0x000037d5 -> 0xc00137d5 |
| Adjusting c0012c37: 0x000037dd -> 0xc00137dd |
| Adjusting c0012c4d: 0x000037e2 -> 0xc00137e2 |
| Adjusting c0012c63: 0x000037e6 -> 0xc00137e6 |
| Adjusting c0012c74: 0x000032a3 -> 0xc00132a3 |
| Adjusting c0012c81: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012c92: 0x000037ed -> 0xc00137ed |
| Adjusting c0012ca7: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012cd0: 0x000037f9 -> 0xc00137f9 |
| Adjusting c0012ced: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012d06: 0x0000380d -> 0xc001380d |
| Adjusting c0012d1e: 0x000039ec -> 0xc00139ec |
| Adjusting c0012d23: 0x00003ab8 -> 0xc0013ab8 |
| Adjusting c0012da7: 0x000038ec -> 0xc00138ec |
| Adjusting c0012dae: 0x00003821 -> 0xc0013821 |
| Adjusting c0012dba: 0x00003839 -> 0xc0013839 |
| Adjusting c0012dc6: 0x0000385d -> 0xc001385d |
| Adjusting c0012e15: 0x00003881 -> 0xc0013881 |
| Adjusting c0012e1e: 0x000038a6 -> 0xc00138a6 |
| Adjusting c0012e2c: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012e5f: 0x000038ca -> 0xc00138ca |
| Adjusting c0012e70: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012e9c: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012ec0: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012f5b: 0x00003904 -> 0xc0013904 |
| Adjusting c0012f67: 0x00003ab8 -> 0xc0013ab8 |
| Adjusting c0012f7e: 0x00003a98 -> 0xc0013a98 |
| Adjusting c0012fa8: 0x00002f90 -> 0xc0012f90 |
| Adjusting c0012fb0: 0x0000057d -> 0xc001057d |
| Adjusting c0012fb4: 0x00002f90 -> 0xc0012f90 |
| Adjusting c0012fbc: 0x000005ee -> 0xc00105ee |
| Adjusting c0012fc8: 0x000030a8 -> 0xc00130a8 |
| Adjusting c00130a8: 0x000008e9 -> 0xc00108e9 |
| Adjusting c00130ac: 0x000008f5 -> 0xc00108f5 |
| Adjusting c00130b0: 0x000008f8 -> 0xc00108f8 |
| Adjusting c00138ec: 0x00002dab -> 0xc0012dab |
| Adjusting c00138f0: 0x00002db7 -> 0xc0012db7 |
| Adjusting c00138f4: 0x00002e5c -> 0xc0012e5c |
| Adjusting c00138f8: 0x00002dc3 -> 0xc0012dc3 |
| Adjusting c00138fc: 0x00002e12 -> 0xc0012e12 |
| Adjusting c0013900: 0x00002e1b -> 0xc0012e1b |
| Adjusting c0013a10: 0x00002cb8 -> 0xc0012cb8 |
| Adjusting c0013a14: 0x000029a8 -> 0xc00129a8 |
| Adjusting c0013a20: 0x00002b93 -> 0xc0012b93 |
| Adjusting c0013a24: 0x0000265c -> 0xc001265c |
| Adjusting c0013a28: 0x00002958 -> 0xc0012958 |
| Adjusting c0013a2c: 0x00002b70 -> 0xc0012b70 |
| Adjusting c0013a34: 0x00002aff -> 0xc0012aff |
| Adjusting c0013a38: 0x00002adc -> 0xc0012adc |
| Adjusting c0013a54: 0x0000280a -> 0xc001280a |
| Loading module at c0008000 with entry c0008000. filesize: 0x160 memsize: 0x160 |
| Processing 10 relocs. Offset value of 0xc0008000 |
| Adjusting c0008002: 0x00000024 -> 0xc0008024 |
| Adjusting c000801d: 0x0000003c -> 0xc000803c |
| Adjusting c0008026: 0x00000024 -> 0xc0008024 |
| Adjusting c0008054: 0x000000d8 -> 0xc00080d8 |
| Adjusting c0008066: 0x00000160 -> 0xc0008160 |
| Adjusting c000806d: 0x000000c0 -> 0xc00080c0 |
| Adjusting c0008075: 0x000000c4 -> 0xc00080c4 |
| Adjusting c000807e: 0x000000d0 -> 0xc00080d0 |
| Adjusting c0008085: 0x000000cc -> 0xc00080cc |
| Adjusting c000808b: 0x000000c8 -> 0xc00080c8 |
| SMM Module: placing jmp sequence at c0007c00 rel16 0x03fd |
| SMM Module: placing jmp sequence at c0007800 rel16 0x07fd |
| SMM Module: placing jmp sequence at c0007400 rel16 0x0bfd |
| SMM Module: stub loaded at c0008000. Will call c0011589(00000000) |
| Initializing southbridge SMI... ... pmbase = 0x0500 |
| |
| SMI_STS: MCSMI |
| PM1_STS: |
| GPE0_STS: GPIO14 GPIO13 GPIO11 GPIO10 GPIO9 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO1 GPIO0 TCO_SCI |
| ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI1 GPI0 |
| TCO_STS: |
| ... raise SMI# |
| In relocation handler: cpu 0 |
| New SMBASE=0xc0000000 IEDBASE=0xc0400000 @ 0003fc00 |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Relocation complete. |
| Locking SMM. |
| Initializing CPU #0 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| POST: 0x60 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 151a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 152c0 |
| CBFS: File @ offset 152c0 size 5800 |
| CBFS: Found @ offset 152c0 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x1b |
| CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd46a8 |
| memalign bffd46a8 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd46c0 |
| memalign bffd46c0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd46d8 |
| memalign bffd46d8 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd46f0 |
| memalign bffd46f0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4708 |
| memalign bffd4708 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4720 |
| memalign bffd4720 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4738 |
| memalign bffd4738 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4750 |
| memalign bffd4750 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4768 |
| memalign bffd4768 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4780 |
| memalign bffd4780 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4798 |
| memalign bffd4798 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd47b0 |
| memalign bffd47b0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd47c8 |
| memalign bffd47c8 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd47e0 |
| memalign bffd47e0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd47f8 |
| memalign bffd47f8 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4810 |
| memalign bffd4810 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4828 |
| memalign bffd4828 |
| MTRR: Physical address space: |
| 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 |
| 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 |
| 0x00000000000c0000 - 0x00000000c0000000 size 0xbff40000 type 6 |
| 0x00000000c0000000 - 0x00000000e0000000 size 0x20000000 type 0 |
| 0x00000000e0000000 - 0x00000000f0000000 size 0x10000000 type 1 |
| 0x00000000f0000000 - 0x0000000100000000 size 0x10000000 type 0 |
| 0x0000000100000000 - 0x000000042f600000 size 0x32f600000 type 6 |
| MTRR addr 0x0-0x10 set to 6 type @ 0 |
| MTRR addr 0x10-0x20 set to 6 type @ 1 |
| MTRR addr 0x20-0x30 set to 6 type @ 2 |
| MTRR addr 0x30-0x40 set to 6 type @ 3 |
| MTRR addr 0x40-0x50 set to 6 type @ 4 |
| MTRR addr 0x50-0x60 set to 6 type @ 5 |
| MTRR addr 0x60-0x70 set to 6 type @ 6 |
| MTRR addr 0x70-0x80 set to 6 type @ 7 |
| MTRR addr 0x80-0x84 set to 6 type @ 8 |
| MTRR addr 0x84-0x88 set to 6 type @ 9 |
| MTRR addr 0x88-0x8c set to 6 type @ 10 |
| MTRR addr 0x8c-0x90 set to 6 type @ 11 |
| MTRR addr 0x90-0x94 set to 6 type @ 12 |
| MTRR addr 0x94-0x98 set to 6 type @ 13 |
| MTRR addr 0x98-0x9c set to 6 type @ 14 |
| MTRR addr 0x9c-0xa0 set to 6 type @ 15 |
| MTRR addr 0xa0-0xa4 set to 0 type @ 16 |
| MTRR addr 0xa4-0xa8 set to 0 type @ 17 |
| MTRR addr 0xa8-0xac set to 0 type @ 18 |
| MTRR addr 0xac-0xb0 set to 0 type @ 19 |
| MTRR addr 0xb0-0xb4 set to 0 type @ 20 |
| MTRR addr 0xb4-0xb8 set to 0 type @ 21 |
| MTRR addr 0xb8-0xbc set to 0 type @ 22 |
| MTRR addr 0xbc-0xc0 set to 0 type @ 23 |
| MTRR addr 0xc0-0xc1 set to 6 type @ 24 |
| MTRR addr 0xc1-0xc2 set to 6 type @ 25 |
| MTRR addr 0xc2-0xc3 set to 6 type @ 26 |
| MTRR addr 0xc3-0xc4 set to 6 type @ 27 |
| MTRR addr 0xc4-0xc5 set to 6 type @ 28 |
| MTRR addr 0xc5-0xc6 set to 6 type @ 29 |
| MTRR addr 0xc6-0xc7 set to 6 type @ 30 |
| MTRR addr 0xc7-0xc8 set to 6 type @ 31 |
| MTRR addr 0xc8-0xc9 set to 6 type @ 32 |
| MTRR addr 0xc9-0xca set to 6 type @ 33 |
| MTRR addr 0xca-0xcb set to 6 type @ 34 |
| MTRR addr 0xcb-0xcc set to 6 type @ 35 |
| MTRR addr 0xcc-0xcd set to 6 type @ 36 |
| MTRR addr 0xcd-0xce set to 6 type @ 37 |
| MTRR addr 0xce-0xcf set to 6 type @ 38 |
| MTRR addr 0xcf-0xd0 set to 6 type @ 39 |
| MTRR addr 0xd0-0xd1 set to 6 type @ 40 |
| MTRR addr 0xd1-0xd2 set to 6 type @ 41 |
| MTRR addr 0xd2-0xd3 set to 6 type @ 42 |
| MTRR addr 0xd3-0xd4 set to 6 type @ 43 |
| MTRR addr 0xd4-0xd5 set to 6 type @ 44 |
| MTRR addr 0xd5-0xd6 set to 6 type @ 45 |
| MTRR addr 0xd6-0xd7 set to 6 type @ 46 |
| MTRR addr 0xd7-0xd8 set to 6 type @ 47 |
| MTRR addr 0xd8-0xd9 set to 6 type @ 48 |
| MTRR addr 0xd9-0xda set to 6 type @ 49 |
| MTRR addr 0xda-0xdb set to 6 type @ 50 |
| MTRR addr 0xdb-0xdc set to 6 type @ 51 |
| MTRR addr 0xdc-0xdd set to 6 type @ 52 |
| MTRR addr 0xdd-0xde set to 6 type @ 53 |
| MTRR addr 0xde-0xdf set to 6 type @ 54 |
| MTRR addr 0xdf-0xe0 set to 6 type @ 55 |
| MTRR addr 0xe0-0xe1 set to 6 type @ 56 |
| MTRR addr 0xe1-0xe2 set to 6 type @ 57 |
| MTRR addr 0xe2-0xe3 set to 6 type @ 58 |
| MTRR addr 0xe3-0xe4 set to 6 type @ 59 |
| MTRR addr 0xe4-0xe5 set to 6 type @ 60 |
| MTRR addr 0xe5-0xe6 set to 6 type @ 61 |
| MTRR addr 0xe6-0xe7 set to 6 type @ 62 |
| MTRR addr 0xe7-0xe8 set to 6 type @ 63 |
| MTRR addr 0xe8-0xe9 set to 6 type @ 64 |
| MTRR addr 0xe9-0xea set to 6 type @ 65 |
| MTRR addr 0xea-0xeb set to 6 type @ 66 |
| MTRR addr 0xeb-0xec set to 6 type @ 67 |
| MTRR addr 0xec-0xed set to 6 type @ 68 |
| MTRR addr 0xed-0xee set to 6 type @ 69 |
| MTRR addr 0xee-0xef set to 6 type @ 70 |
| MTRR addr 0xef-0xf0 set to 6 type @ 71 |
| MTRR addr 0xf0-0xf1 set to 6 type @ 72 |
| MTRR addr 0xf1-0xf2 set to 6 type @ 73 |
| MTRR addr 0xf2-0xf3 set to 6 type @ 74 |
| MTRR addr 0xf3-0xf4 set to 6 type @ 75 |
| MTRR addr 0xf4-0xf5 set to 6 type @ 76 |
| MTRR addr 0xf5-0xf6 set to 6 type @ 77 |
| MTRR addr 0xf6-0xf7 set to 6 type @ 78 |
| MTRR addr 0xf7-0xf8 set to 6 type @ 79 |
| MTRR addr 0xf8-0xf9 set to 6 type @ 80 |
| MTRR addr 0xf9-0xfa set to 6 type @ 81 |
| MTRR addr 0xfa-0xfb set to 6 type @ 82 |
| MTRR addr 0xfb-0xfc set to 6 type @ 83 |
| MTRR addr 0xfc-0xfd set to 6 type @ 84 |
| MTRR addr 0xfd-0xfe set to 6 type @ 85 |
| MTRR addr 0xfe-0xff set to 6 type @ 86 |
| MTRR addr 0xff-0x100 set to 6 type @ 87 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| MTRR: default type WB/UC MTRR counts: 3/9. |
| MTRR: WB selected as default type. |
| MTRR: 0 base 0x00000000c0000000 mask 0x0000000fe0000000 type 0 |
| MTRR: 1 base 0x00000000e0000000 mask 0x0000000ff0000000 type 1 |
| MTRR: 2 base 0x00000000f0000000 mask 0x0000000ff0000000 type 0 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Setting up local APIC... apic_id: 0x00 done. |
| POST: 0x9b |
| VMX is locked, so set_vmx will do nothing |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2600 |
| Turbo is available but hidden |
| Turbo has been enabled |
| CPU: 0 has 2 cores, 2 threads per core |
| memalign Enter, boundary 8, size 152, free_mem_ptr bffd4840 |
| memalign bffd4840 |
| CPU: 0 has core 1 |
| CPU1: stack_base bffcd000, stack_end bffcdff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 1. |
| After apic_write. |
| In relocation handler: cpu 1 |
| New SMBASE=0xbffffc00 IEDBASE=0xc0400000 @ 0003fc00 |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 1. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #1 |
| memalign Enter, boundary 8, size 152, free_mem_ptr bffd48d8 |
| CPU: vendor Intel device 306a9 |
| memalign bffd48d8 |
| CPU: family 06, model 3a, stepping 09 |
| CPU: 0 has core 2 |
| POST: 0x60 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 151a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 152c0 |
| CBFS: File @ offset 152c0 size 5800 |
| CBFS: Found @ offset 152c0 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x1b |
| CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Setting up local APIC... apic_id: 0x01 done. |
| POST: 0x9b |
| VMX is locked, so set_vmx will do nothing |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2600 |
| CPU #1 initialized |
| CPU2: stack_base bffcc000, stack_end bffccff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 2. |
| After apic_write. |
| In relocation handler: cpu 2 |
| Startup point 1. |
| Waiting for send to finish... |
| +New SMBASE=0xbffff800 IEDBASE=0xc0400000 @ 0003fc00 |
| Sending STARTUP #2 to 2. |
| After apic_write. |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| memalign Enter, boundary 8, size 152, free_mem_ptr bffd4970 |
| memalign bffd4970 |
| CPU: 0 has core 3 |
| Initializing CPU #2 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| POST: 0x60 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 151a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 152c0 |
| CBFS: File @ offset 152c0 size 5800 |
| CBFS: Found @ offset 152c0 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x0 |
| microcode: updated to revision 0x1b date=2014-05-29 |
| CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Setting up local APIC... apic_id: 0x02 done. |
| POST: 0x9b |
| VMX is locked, so set_vmx will do nothing |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2600 |
| CPU #2 initialized |
| CPU3: stack_base bffcb000, stack_end bffcbff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 3. |
| After apic_write. |
| In relocation handler: cpu 3 |
| New SMBASE=0xbffff400 IEDBASE=0xc0400000 @ 0003fc00 |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 3. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU #0 initialized |
| Waiting for 1 CPUS to stop |
| Initializing CPU #3 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| POST: 0x60 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 151a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 152c0 |
| CBFS: File @ offset 152c0 size 5800 |
| CBFS: Found @ offset 152c0 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x1b |
| CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Setting up local APIC... apic_id: 0x03 done. |
| POST: 0x9b |
| VMX is locked, so set_vmx will do nothing |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2600 |
| CPU #3 initialized |
| All AP CPUs stopped (397 loops) |
| CPU0: stack: bffce000 - bffcf000, lowest used address bffcea20, stack used: 1504 bytes |
| CPU1: stack: bffcd000 - bffce000, lowest used address bffcdc54, stack used: 940 bytes |
| CPU2: stack: bffcc000 - bffcd000, lowest used address bffccc54, stack used: 940 bytes |
| CPU3: stack: bffcb000 - bffcc000, lowest used address bffcbc54, stack used: 940 bytes |
| CPU_CLUSTER: 0 init finished in 80983 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 00:00.0 init ... |
| Disabling PEG12. |
| Disabling PEG11. |
| Disabling PEG10. |
| Disabling PEG60. |
| Disabling PEG IO clock. |
| Set BIOS_RESET_CPL |
| CPU TDP: 35 Watts |
| PCI: 00:00.0 init finished in 1012 usecs |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 00:02.0 init ... |
| GT Power Management Init |
| IVB GT2 25W-35W Power Meter Weights |
| GT Power Management Init (post VBIOS) |
| Initializing VGA without OPROM. |
| EDID: |
| 00 ff ff ff ff ff ff 00 30 e4 d8 02 00 00 00 00 |
| 00 16 01 03 80 1c 10 78 ea 88 55 99 5b 55 8f 26 |
| 1d 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 |
| 01 01 01 01 01 01 60 1d 56 d8 50 00 18 30 30 40 |
| 47 00 15 9c 10 00 00 1b 00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 fe 00 4c |
| 47 20 44 69 73 70 6c 61 79 0a 20 20 00 00 00 fe |
| 00 4c 50 31 32 35 57 48 32 2d 53 4c 42 33 00 59 |
| Extracted contents: |
| header: 00 ff ff ff ff ff ff 00 |
| serial number: 30 e4 d8 02 00 00 00 00 00 16 |
| version: 01 03 |
| basic params: 80 1c 10 78 ea |
| chroma info: 88 55 99 5b 55 8f 26 1d 50 54 |
| established: 00 00 00 |
| standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 |
| descriptor 1: 60 1d 56 d8 50 00 18 30 30 40 47 00 15 9c 10 00 00 1b |
| descriptor 2: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
| descriptor 3: 00 00 00 fe 00 4c 47 20 44 69 73 70 6c 61 79 0a 20 20 |
| descriptor 4: 00 00 00 fe 00 4c 50 31 32 35 57 48 32 2d 53 4c 42 33 |
| extensions: 00 |
| checksum: 59 |
| |
| Manufacturer: LGD Model 2d8 Serial Number 0 |
| Made week 0 of 2012 |
| EDID version: 1.3 |
| Digital display |
| Maximum image size: 28 cm x 16 cm |
| Gamma: 220% |
| Check DPMS levels |
| DPMS levels: Standby Suspend Off |
| Supported color formats: RGB 4:4:4, YCrCb 4:2:2 |
| First detailed timing is preferred timing |
| Established timings supported: |
| Standard timings supported: |
| Detailed timings |
| Hex of detail: 601d56d85000183030404700159c1000001b |
| Detailed mode (IN HEX): Clock 75200 KHz, 115 mm x 9c mm |
| 0556 0586 05c6 062e hborder 0 |
| 0300 0304 030b 0318 vborder 0 |
| +hsync -vsync |
| Did detailed timing |
| Hex of detail: 000000000000000000000000000000000000 |
| Manufacturer-specified data, tag 0 |
| Hex of detail: 000000fe004c4720446973706c61790a2020 |
| ASCII string: LG Display |
| Hex of detail: 000000fe004c503132355748322d534c4233 |
| ASCII string: LP125WH2-SLB3 |
| Checksum |
| Checksum: 0x59 (valid) |
| WARNING: EDID block does NOT fully conform to EDID 1.3. |
| Missing name descriptor |
| Missing monitor ranges |
| bringing up panel at resolution 1376 x 768 |
| Borders 0 x 0 |
| Blank 216 x 24 |
| Sync 64 x 7 |
| Front porch 48 x 4 |
| Spread spectrum clock |
| Single channel |
| Polarities 0, 1 |
| Data M1=5256861, N1=8388608 |
| Link frequency 270000 kHz |
| Link M1=146023, N1=524288 |
| Pixel N=9, M1=14, M2=9, P1=1 |
| Pixel clock 150476 kHz |
| waiting for panel powerup |
| panel powered up |
| PCI: 00:02.0 init finished in 42643 usecs |
| POST: 0x75 |
| PCI: 00:04.0 init ... |
| PCI: 00:04.0 init finished in 0 usecs |
| POST: 0x75 |
| PCI: 00:14.0 init ... |
| XHCI: Setting up controller.. done. |
| PCI: 00:14.0 init finished in 6 usecs |
| POST: 0x75 |
| PCI: 00:16.0 init ... |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : YES |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Recovery |
| ME: Current Operation State : M0 with UMA |
| ME: Current Operation Mode : Normal |
| ME: Error Code : Image Failure |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Pseudo-global reset |
| ME: Progress Phase State : M0 kernel load |
| ME: BIOS path: Error |
| PCI: 00:16.0 init finished in 14 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 00:19.0 init ... |
| PCI: 00:19.0 init finished in 0 usecs |
| POST: 0x75 |
| PCI: 00:1a.0 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1a.0 init finished in 12 usecs |
| POST: 0x75 |
| PCI: 00:1b.0 init ... |
| Azalia: base = f1638000 |
| Azalia: codec_mask = 09 |
| Azalia: Initializing codec #3 |
| Azalia: codec viddid: 80862806 |
| Azalia: verb_size: 16 |
| Azalia: verb loaded. |
| Azalia: Initializing codec #0 |
| Azalia: codec viddid: 10ec0269 |
| Azalia: verb_size: 76 |
| Azalia: verb loaded. |
| PCI: 00:1b.0 init finished in 5971 usecs |
| POST: 0x75 |
| PCI: 00:1c.0 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.0 init finished in 10 usecs |
| POST: 0x75 |
| PCI: 00:1c.1 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.1 init finished in 9 usecs |
| POST: 0x75 |
| PCI: 00:1c.2 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.2 init finished in 12 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 00:1d.0 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1d.0 init finished in 12 usecs |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 00:1f.0 init ... |
| pch: lpc_init |
| IOAPIC: Initializing IOAPIC at 0xfec00000 |
| IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| IOAPIC: ID = 0x02 |
| IOAPIC: Dumping registers |
| reg 0x0000: 0x02000000 |
| reg 0x0001: 0x00170020 |
| reg 0x0002: 0x00170020 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 151a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 152c0 |
| CBFS: File @ offset 152c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 152c0 |
| CBFS: Checking offset 1ab40 |
| CBFS: File @ offset 1ab40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1ab40 |
| CBFS: Checking offset 215c0 |
| CBFS: File @ offset 215c0 size 375 |
| CBFS: Unmatched 'config' at 215c0 |
| CBFS: Checking offset 21980 |
| CBFS: File @ offset 21980 size 246 |
| CBFS: Unmatched 'revision' at 21980 |
| CBFS: Checking offset 21c00 |
| CBFS: File @ offset 21c00 size 100 |
| CBFS: Unmatched 'cmos.default' at 21c00 |
| CBFS: Checking offset 21d40 |
| CBFS: File @ offset 21d40 size 7a0 |
| CBFS: Found @ offset 21d40 size 7a0 |
| Set power off after power failure. |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 151a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 152c0 |
| CBFS: File @ offset 152c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 152c0 |
| CBFS: Checking offset 1ab40 |
| CBFS: File @ offset 1ab40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1ab40 |
| CBFS: Checking offset 215c0 |
| CBFS: File @ offset 215c0 size 375 |
| CBFS: Unmatched 'config' at 215c0 |
| CBFS: Checking offset 21980 |
| CBFS: File @ offset 21980 size 246 |
| CBFS: Unmatched 'revision' at 21980 |
| CBFS: Checking offset 21c00 |
| CBFS: File @ offset 21c00 size 100 |
| CBFS: Unmatched 'cmos.default' at 21c00 |
| CBFS: Checking offset 21d40 |
| CBFS: File @ offset 21d40 size 7a0 |
| CBFS: Found @ offset 21d40 size 7a0 |
| NMI sources enabled. |
| PantherPoint PM init |
| rtc_failed = 0x0 |
| RTC Init |
| Enabling BIOS updates outside of SMM... Disabling ACPI via APMC: |
| done. |
| pch_spi_init |
| PCI: 00:1f.0 init finished in 1647 usecs |
| POST: 0x75 |
| PCI: 00:1f.2 init ... |
| SATA: Initializing... |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 151a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 152c0 |
| CBFS: File @ offset 152c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 152c0 |
| CBFS: Checking offset 1ab40 |
| CBFS: File @ offset 1ab40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1ab40 |
| CBFS: Checking offset 215c0 |
| CBFS: File @ offset 215c0 size 375 |
| CBFS: Unmatched 'config' at 215c0 |
| CBFS: Checking offset 21980 |
| CBFS: File @ offset 21980 size 246 |
| CBFS: Unmatched 'revision' at 21980 |
| CBFS: Checking offset 21c00 |
| CBFS: File @ offset 21c00 size 100 |
| CBFS: Unmatched 'cmos.default' at 21c00 |
| CBFS: Checking offset 21d40 |
| CBFS: File @ offset 21d40 size 7a0 |
| CBFS: Found @ offset 21d40 size 7a0 |
| SATA: Controller in AHCI mode. |
| ABAR: f163d000 |
| PCI: 00:1f.2 init finished in 431 usecs |
| POST: 0x75 |
| PCI: 00:1f.3 init ... |
| PCI: 00:1f.3 init finished in 7 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 01:00.0 init ... |
| PCI: 01:00.0 init finished in 14 usecs |
| POST: 0x75 |
| PCI: 02:00.0 init ... |
| PCI: 02:00.0 init finished in 0 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PNP: 00ff.2 init ... |
| PNP: 00ff.2 init finished in 0 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:54 init ... |
| I2C: 01:54 init finished in 1 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:55 init ... |
| I2C: 01:55 init finished in 0 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:56 init ... |
| I2C: 01:56 init finished in 0 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:57 init ... |
| I2C: 01:57 init finished in 0 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5c init ... |
| Locking EEPROM RFID |
| init EEPROM done |
| I2C: 01:5c init finished in 25760 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5d init ... |
| I2C: 01:5d init finished in 0 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5e init ... |
| I2C: 01:5e init finished in 0 usecs |
| POST: 0x75 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5f init ... |
| I2C: 01:5f init finished in 0 usecs |
| Devices initialized |
| Show all devs... After init. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 01:00.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 0 |
| PCI: 00:1c.4: enabled 0 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 00ff.1: enabled 1 |
| PNP: 0c31.0: enabled 1 |
| PNP: 00ff.2: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| I2C: 01:54: enabled 1 |
| I2C: 01:55: enabled 1 |
| I2C: 01:56: enabled 1 |
| I2C: 01:57: enabled 1 |
| I2C: 01:5c: enabled 1 |
| I2C: 01:5d: enabled 1 |
| I2C: 01:5e: enabled 1 |
| I2C: 01:5f: enabled 1 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| PCI: 00:04.0: enabled 1 |
| PCI: 02:00.0: enabled 1 |
| Unknown device path type: 0 |
| : enabled 1 |
| APIC: 01: enabled 1 |
| APIC: 02: enabled 1 |
| APIC: 03: enabled 1 |
| BS: BS_DEV_INIT times (us): entry 10 run 158695 exit 0 |
| POST: 0x76 |
| Finalize devices... |
| PCI: 00:1f.0 final |
| Devices finalized |
| BS: BS_POST_DEVICE times (us): entry 0 run 4 exit 0 |
| POST: 0x77 |
| BS: BS_OS_RESUME_CHECK times (us): entry 0 run 3 exit 0 |
| Updating MRC cache data. |
| No MRC cache in cbmem. Can't update flash. |
| POST: 0x79 |
| POST: 0x9c |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'fallback/dsdt.aml' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 151a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 152c0 |
| CBFS: File @ offset 152c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 152c0 |
| CBFS: Checking offset 1ab40 |
| CBFS: File @ offset 1ab40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1ab40 |
| CBFS: Checking offset 215c0 |
| CBFS: File @ offset 215c0 size 375 |
| CBFS: Unmatched 'config' at 215c0 |
| CBFS: Checking offset 21980 |
| CBFS: File @ offset 21980 size 246 |
| CBFS: Unmatched 'revision' at 21980 |
| CBFS: Checking offset 21c00 |
| CBFS: File @ offset 21c00 size 100 |
| CBFS: Unmatched 'cmos.default' at 21c00 |
| CBFS: Checking offset 21d40 |
| CBFS: File @ offset 21d40 size 7a0 |
| CBFS: Unmatched 'cmos_layout.bin' at 21d40 |
| CBFS: Checking offset 22540 |
| CBFS: File @ offset 22540 size 660 |
| CBFS: Unmatched 'payload_config' at 22540 |
| CBFS: Checking offset 22c00 |
| CBFS: File @ offset 22c00 size ea |
| CBFS: Unmatched 'payload_revision' at 22c00 |
| CBFS: Checking offset 22d40 |
| CBFS: File @ offset 22d40 size 8 |
| CBFS: Unmatched 'etc/ps2-keyboard-spinup' at 22d40 |
| CBFS: Checking offset 22d80 |
| CBFS: File @ offset 22d80 size f |
| CBFS: Unmatched 'bootorder' at 22d80 |
| CBFS: Checking offset 22e00 |
| CBFS: File @ offset 22e00 size 8 |
| CBFS: Unmatched 'etc/show-boot-menu' at 22e00 |
| CBFS: Checking offset 22e40 |
| CBFS: File @ offset 22e40 size 11f2 |
| CBFS: Unmatched 'grub.cfg' at 22e40 |
| CBFS: Checking offset 24080 |
| CBFS: File @ offset 24080 size e18 |
| CBFS: Unmatched '' at 24080 |
| CBFS: Checking offset 24ec0 |
| CBFS: File @ offset 24ec0 size 10000 |
| CBFS: Unmatched 'mrc.cache' at 24ec0 |
| CBFS: Checking offset 34f00 |
| CBFS: File @ offset 34f00 size 17347 |
| CBFS: Unmatched 'fallback/ramstage' at 34f00 |
| CBFS: Checking offset 4c280 |
| CBFS: File @ offset 4c280 size 345c |
| CBFS: Found @ offset 4c280 size 345c |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'fallback/slic' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 151a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 152c0 |
| CBFS: File @ offset 152c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 152c0 |
| CBFS: Checking offset 1ab40 |
| CBFS: File @ offset 1ab40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1ab40 |
| CBFS: Checking offset 215c0 |
| CBFS: File @ offset 215c0 size 375 |
| CBFS: Unmatched 'config' at 215c0 |
| CBFS: Checking offset 21980 |
| CBFS: File @ offset 21980 size 246 |
| CBFS: Unmatched 'revision' at 21980 |
| CBFS: Checking offset 21c00 |
| CBFS: File @ offset 21c00 size 100 |
| CBFS: Unmatched 'cmos.default' at 21c00 |
| CBFS: Checking offset 21d40 |
| CBFS: File @ offset 21d40 size 7a0 |
| CBFS: Unmatched 'cmos_layout.bin' at 21d40 |
| CBFS: Checking offset 22540 |
| CBFS: File @ offset 22540 size 660 |
| CBFS: Unmatched 'payload_config' at 22540 |
| CBFS: Checking offset 22c00 |
| CBFS: File @ offset 22c00 size ea |
| CBFS: Unmatched 'payload_revision' at 22c00 |
| CBFS: Checking offset 22d40 |
| CBFS: File @ offset 22d40 size 8 |
| CBFS: Unmatched 'etc/ps2-keyboard-spinup' at 22d40 |
| CBFS: Checking offset 22d80 |
| CBFS: File @ offset 22d80 size f |
| CBFS: Unmatched 'bootorder' at 22d80 |
| CBFS: Checking offset 22e00 |
| CBFS: File @ offset 22e00 size 8 |
| CBFS: Unmatched 'etc/show-boot-menu' at 22e00 |
| CBFS: Checking offset 22e40 |
| CBFS: File @ offset 22e40 size 11f2 |
| CBFS: Unmatched 'grub.cfg' at 22e40 |
| CBFS: Checking offset 24080 |
| CBFS: File @ offset 24080 size e18 |
| CBFS: Unmatched '' at 24080 |
| CBFS: Checking offset 24ec0 |
| CBFS: File @ offset 24ec0 size 10000 |
| CBFS: Unmatched 'mrc.cache' at 24ec0 |
| CBFS: Checking offset 34f00 |
| CBFS: File @ offset 34f00 size 17347 |
| CBFS: Unmatched 'fallback/ramstage' at 34f00 |
| CBFS: Checking offset 4c280 |
| CBFS: File @ offset 4c280 size 345c |
| CBFS: Unmatched 'fallback/dsdt.aml' at 4c280 |
| CBFS: Checking offset 4f740 |
| CBFS: File @ offset 4f740 size 18a98 |
| CBFS: Unmatched 'img/coreinfo' at 4f740 |
| CBFS: Checking offset 68200 |
| CBFS: File @ offset 68200 size 1a55c |
| CBFS: Unmatched 'img/nvramcui' at 68200 |
| CBFS: Checking offset 827c0 |
| CBFS: File @ offset 827c0 size 109b5 |
| CBFS: Unmatched 'fallback/payload' at 827c0 |
| CBFS: Checking offset 931c0 |
| CBFS: File @ offset 931c0 size ee48 |
| CBFS: Unmatched 'img/tint' at 931c0 |
| CBFS: Checking offset a2040 |
| CBFS: File @ offset a2040 size 2c02c |
| CBFS: Unmatched 'img/memtest' at a2040 |
| CBFS: Checking offset ce0c0 |
| CBFS: File @ offset ce0c0 size 8dad3 |
| CBFS: Unmatched 'img/grub2' at ce0c0 |
| CBFS: Checking offset 15bbc0 |
| CBFS: File @ offset 15bbc0 size 11ea |
| CBFS: Unmatched 'grubtest.cfg' at 15bbc0 |
| CBFS: Checking offset 15ce00 |
| CBFS: File @ offset 15ce00 size a87018 |
| CBFS: Unmatched '' at 15ce00 |
| CBFS: Checking offset be3e40 |
| CBFS: File @ offset be3e40 size 1068 |
| CBFS: 'fallback/slic' not found. |
| ACPI: Writing ACPI tables at bff23000. |
| ACPI: * FACS |
| ACPI: * DSDT |
| ACPI: * IGD OpRegion |
| GET_VBIOS: aa55 8086 0 0 3 |
| ... VBIOS found at 000c0000 |
| ACPI: * FADT |
| ACPI: added table 1/32, length now 40 |
| ACPI: * SSDT |
| Found 1 CPU(s) with 4 core(s) each. |
| PSS: 2601MHz power 35000 control 0x2100 status 0x2100 |
| PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 31561 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 28247 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 25084 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 22064 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 19135 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 16344 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 13666 control 0xc00 status 0xc00 |
| PSS: 2601MHz power 35000 control 0x2100 status 0x2100 |
| PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 31561 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 28247 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 25084 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 22064 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 19135 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 16344 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 13666 control 0xc00 status 0xc00 |
| PSS: 2601MHz power 35000 control 0x2100 status 0x2100 |
| PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 31561 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 28247 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 25084 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 22064 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 19135 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 16344 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 13666 control 0xc00 status 0xc00 |
| PSS: 2601MHz power 35000 control 0x2100 status 0x2100 |
| PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 31561 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 28247 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 25084 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 22064 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 19135 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 16344 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 13666 control 0xc00 status 0xc00 |
| Using default TPM ACPI path: '\_SB_.PCI0.LPCB' |
| \_SB_.PCI0.LPCB.TPM: LPC TPM PNP: 0c31.0 |
| ACPI: added table 2/32, length now 44 |
| ACPI: * MCFG |
| ACPI: added table 3/32, length now 48 |
| ACPI: * TCPA |
| TCPA log created at bff10000 |
| ACPI: added table 4/32, length now 52 |
| ACPI: * MADT |
| ACPI: added table 5/32, length now 56 |
| current = bff28180 |
| ACPI: * DMAR |
| ACPI: added table 6/32, length now 60 |
| current = bff28230 |
| ACPI: * HPET |
| ACPI: added table 7/32, length now 64 |
| ACPI: done. |
| ACPI tables: 21104 bytes. |
| smbios_write_tables: bff0f000 |
| memalign Enter, boundary 8, size 36, free_mem_ptr bffd4a08 |
| memalign bffd4a08 |
| recv_ec_data: 0x47 |
| recv_ec_data: 0x32 |
| recv_ec_data: 0x48 |
| recv_ec_data: 0x54 |
| recv_ec_data: 0x33 |
| recv_ec_data: 0x35 |
| recv_ec_data: 0x57 |
| recv_ec_data: 0x57 |
| recv_ec_data: 0x16 |
| recv_ec_data: 0x03 |
| Create SMBIOS type 17 |
| Root Device (LENOVO ThinkPad X230) |
| CPU_CLUSTER: 0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| APIC: 00 (unknown) |
| APIC: acac (Intel SandyBridge/IvyBridge CPU) |
| DOMAIN: 0000 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:00.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:01.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:02.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:14.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:19.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1a.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1b.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 01:00.0 (unknown) |
| PCI: 00:1c.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.4 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.7 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1d.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1e.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PNP: 00ff.1 (Lenovo Power Management Hardware Hub 7) |
| PNP: 0c31.0 (LPC TPM) |
| PNP: 00ff.2 (Lenovo H8 EC) |
| PCI: 00:1f.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| I2C: 01:54 (AT24RF08C) |
| I2C: 01:55 (AT24RF08C) |
| I2C: 01:56 (AT24RF08C) |
| I2C: 01:57 (AT24RF08C) |
| I2C: 01:5c (AT24RF08C) |
| I2C: 01:5d (AT24RF08C) |
| I2C: 01:5e (AT24RF08C) |
| I2C: 01:5f (AT24RF08C) |
| PCI: 00:1f.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:04.0 (unknown) |
| PCI: 02:00.0 (unknown) |
| Unknown device path type: 0 |
| (unknown) |
| APIC: 01 (unknown) |
| APIC: 02 (unknown) |
| APIC: 03 (unknown) |
| SMBIOS tables: 630 bytes. |
| Writing table forward entry at 0x00000500 |
| Wrote coreboot table at: 00000500, 0x10 bytes, checksum cfe9 |
| Writing coreboot table at 0xbff47000 |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 151a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 152c0 |
| CBFS: File @ offset 152c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 152c0 |
| CBFS: Checking offset 1ab40 |
| CBFS: File @ offset 1ab40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1ab40 |
| CBFS: Checking offset 215c0 |
| CBFS: File @ offset 215c0 size 375 |
| CBFS: Unmatched 'config' at 215c0 |
| CBFS: Checking offset 21980 |
| CBFS: File @ offset 21980 size 246 |
| CBFS: Unmatched 'revision' at 21980 |
| CBFS: Checking offset 21c00 |
| CBFS: File @ offset 21c00 size 100 |
| CBFS: Unmatched 'cmos.default' at 21c00 |
| CBFS: Checking offset 21d40 |
| CBFS: File @ offset 21d40 size 7a0 |
| CBFS: Found @ offset 21d40 size 7a0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4a2c |
| memalign bffd4a30 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4a48 |
| memalign bffd4a48 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4a60 |
| memalign bffd4a60 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4a78 |
| memalign bffd4a78 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4a90 |
| memalign bffd4a90 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4aa8 |
| memalign bffd4aa8 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4ac0 |
| memalign bffd4ac0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4ad8 |
| memalign bffd4ad8 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4af0 |
| memalign bffd4af0 |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4b08 |
| memalign bffd4b08 |
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1. 0000000000001000-000000000009ffff: RAM |
| 2. 00000000000a0000-00000000000fffff: RESERVED |
| 3. 0000000000100000-00000000bff0efff: RAM |
| 4. 00000000bff0f000-00000000bfffffff: CONFIGURATION TABLES |
| 5. 00000000c0000000-00000000ce9fffff: RESERVED |
| 6. 00000000f8000000-00000000fbffffff: RESERVED |
| 7. 00000000fed40000-00000000fed44fff: RESERVED |
| 8. 00000000fed90000-00000000fed91fff: RESERVED |
| 9. 0000000100000000-000000042f5fffff: RAM |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| FMAP: Found "FLASH" version 1.1 at 1b000. |
| FMAP: base = ff400000 size = c00000 #areas = 3 |
| Wrote coreboot table at: bff47000, 0xb30 bytes, checksum f88 |
| coreboot table: 2888 bytes. |
| IMD ROOT 0. bffff000 00001000 |
| IMD SMALL 1. bfffe000 00001000 |
| CONSOLE 2. bffde000 00020000 |
| TIME STAMP 3. bffdd000 00000400 |
| ROMSTG STCK 4. bffd8000 00005000 |
| RAMSTAGE 5. bff93000 00045000 |
| 57a9e100 6. bff4f000 00043a90 |
| COREBOOT 7. bff47000 00008000 |
| ACPI 8. bff23000 00024000 |
| ACPI GNVS 9. bff22000 00001000 |
| 4f444749 10. bff20000 00002000 |
| TCPA LOG 11. bff10000 00010000 |
| SMBIOS 12. bff0f000 00000800 |
| IMD small region: |
| IMD ROOT 0. bfffec00 00000400 |
| CAR GLOBALS 1. bfffeac0 00000140 |
| MEM INFO 2. bfffe960 00000141 |
| ROMSTAGE 3. bfffe940 00000004 |
| 57a9e000 4. bfffe920 00000010 |
| BS: BS_WRITE_TABLES times (us): entry 1 run 33532 exit 0 |
| POST: 0x7a |
| CBFS: 'Master Header Locator' located CBFS at [1b100:bfffc0) |
| CBFS: Locating 'fallback/payload' |
| CBFS: Checking offset 0 |
| CBFS: File @ offset 0 size 20 |
| CBFS: Unmatched 'cbfs master header' at 0 |
| CBFS: Checking offset 80 |
| CBFS: File @ offset 80 size 151a4 |
| CBFS: Unmatched 'fallback/romstage' at 80 |
| CBFS: Checking offset 152c0 |
| CBFS: File @ offset 152c0 size 5800 |
| CBFS: Unmatched 'cpu_microcode_blob.bin' at 152c0 |
| CBFS: Checking offset 1ab40 |
| CBFS: File @ offset 1ab40 size 6a00 |
| CBFS: Unmatched 'vgaroms/seavgabios.bin' at 1ab40 |
| CBFS: Checking offset 215c0 |
| CBFS: File @ offset 215c0 size 375 |
| CBFS: Unmatched 'config' at 215c0 |
| CBFS: Checking offset 21980 |
| CBFS: File @ offset 21980 size 246 |
| CBFS: Unmatched 'revision' at 21980 |
| CBFS: Checking offset 21c00 |
| CBFS: File @ offset 21c00 size 100 |
| CBFS: Unmatched 'cmos.default' at 21c00 |
| CBFS: Checking offset 21d40 |
| CBFS: File @ offset 21d40 size 7a0 |
| CBFS: Unmatched 'cmos_layout.bin' at 21d40 |
| CBFS: Checking offset 22540 |
| CBFS: File @ offset 22540 size 660 |
| CBFS: Unmatched 'payload_config' at 22540 |
| CBFS: Checking offset 22c00 |
| CBFS: File @ offset 22c00 size ea |
| CBFS: Unmatched 'payload_revision' at 22c00 |
| CBFS: Checking offset 22d40 |
| CBFS: File @ offset 22d40 size 8 |
| CBFS: Unmatched 'etc/ps2-keyboard-spinup' at 22d40 |
| CBFS: Checking offset 22d80 |
| CBFS: File @ offset 22d80 size f |
| CBFS: Unmatched 'bootorder' at 22d80 |
| CBFS: Checking offset 22e00 |
| CBFS: File @ offset 22e00 size 8 |
| CBFS: Unmatched 'etc/show-boot-menu' at 22e00 |
| CBFS: Checking offset 22e40 |
| CBFS: File @ offset 22e40 size 11f2 |
| CBFS: Unmatched 'grub.cfg' at 22e40 |
| CBFS: Checking offset 24080 |
| CBFS: File @ offset 24080 size e18 |
| CBFS: Unmatched '' at 24080 |
| CBFS: Checking offset 24ec0 |
| CBFS: File @ offset 24ec0 size 10000 |
| CBFS: Unmatched 'mrc.cache' at 24ec0 |
| CBFS: Checking offset 34f00 |
| CBFS: File @ offset 34f00 size 17347 |
| CBFS: Unmatched 'fallback/ramstage' at 34f00 |
| CBFS: Checking offset 4c280 |
| CBFS: File @ offset 4c280 size 345c |
| CBFS: Unmatched 'fallback/dsdt.aml' at 4c280 |
| CBFS: Checking offset 4f740 |
| CBFS: File @ offset 4f740 size 18a98 |
| CBFS: Unmatched 'img/coreinfo' at 4f740 |
| CBFS: Checking offset 68200 |
| CBFS: File @ offset 68200 size 1a55c |
| CBFS: Unmatched 'img/nvramcui' at 68200 |
| CBFS: Checking offset 827c0 |
| CBFS: File @ offset 827c0 size 109b5 |
| CBFS: Found @ offset 827c0 size 109b5 |
| Loading segment from ROM address 0xff49d8f8 |
| code (compression=1) |
| memalign Enter, boundary 8, size 28, free_mem_ptr bffd4b20 |
| memalign bffd4b20 |
| New segment dstaddr 0xdf8e0 memsize 0x20720 srcaddr 0xff49d930 filesize 0x1097d |
| Loading segment from ROM address 0xff49d914 |
| Entry Point 0x000ff06e |
| Payload being loaded at below 1MiB without region being marked as RAM usable. |
| memalign Enter, boundary 8, size 24, free_mem_ptr bffd4b3c |
| memalign bffd4b40 |
| Loading Segment: addr: 0x00000000000df8e0 memsz: 0x0000000000020720 filesz: 0x000000000001097d |
| lb: [0x00000000bff94000, 0x00000000bffd7a90) |
| Post relocation: addr: 0x00000000000df8e0 memsz: 0x0000000000020720 filesz: 0x000000000001097d |
| using LZMA |
| [ 0x000df8e0, 00100000, 0x00100000) <- ff49d930 |
| dest 000df8e0, end 00100000, bouncebuffer ffffffff |
| Loaded segments |
| BS: BS_PAYLOAD_LOAD times (us): entry 0 run 28762 exit 0 |
| POST: 0x7b |
| PCH watchdog disabled |
| Jumping to boot code at 000ff06e(bff47000) |
| POST: 0xf8 |
| CPU0: stack: bffce000 - bffcf000, lowest used address bffce8a0, stack used: 1888 bytes |
| SeaBIOS (version rel-1.10.1-0-g8891697) |
| BUILD: gcc: (coreboot toolchain v1.44 March 3rd, 2017) 6.3.0 binutils: (GNU Binutils) 2.28 |
| Found coreboot cbmem console @ bffde000 |
| Found mainboard LENOVO ThinkPad X230 |
| malloc preinit |
| Add to e820 map: 000a0000 00050000 -1 |
| Add to e820 map: 000f0000 00010000 2 |
| Add to e820 map: bfecf000 00040000 2 |
| phys_alloc zone=0x000ed970 size=51712 align=20 ret=bfec2560 (detail=0xbfec2530) |
| Relocating init from 0x000e1060 to 0xbfec2560 (size 51712) |
| malloc init |
| Found CBFS header at 0xff41b138 |
| phys_alloc zone=0xbfecee70 size=156 align=10 ret=bfec2430 (detail=0xbfec2400) |
| Add romfile: cbfs master header (size=32) |
| phys_alloc zone=0xbfecee70 size=156 align=10 ret=bfec2360 (detail=0xbfec2330) |
| Add romfile: fallback/romstage (size=86436) |
| phys_alloc zone=0xbfecee70 size=156 align=10 ret=bfec2290 (detail=0xbfec2260) |
| Add romfile: cpu_microcode_blob.bin (size=22528) |
| phys_alloc zone=0xbfecee70 size=156 align=10 ret=bfec21c0 (detail=0xbfec2190) |
| Add romfile: vgaroms/seavgabios.bin (size=27136) |
| phys_alloc zone=0xbfecee70 size=156 align=10 ret=bfec20f0 (detail=0xbfec20c0) |
| Add romfile: config (size=885) |
| phys_alloc zone=0xbfecee70 size=156 align=10 ret=bfec2020 (detail=0xbfec1ff0) |
| Add romfile: revision (size=582) |
| phys_alloc zone=0xbfecee70 size=156 align=10 ret=bfec1f50 (detail=0xbfec1f20) |
| Add romfile: cmos.default (size=256) |
| phys_alloc zone=0xbfecee70 size=156 align=10 ret=bfec1e80 (detail=0xbfec1e50) |
| Add romfile: cmos_layout.bin (size=1952) |
| phys_alloc zone=0xbfecee70 size=156 align=10 ret=bfec1db0 (detail=0xbfec1d80) |
| Add romfile: payload_config (size=1632) |
| phys_alloc zone=0xbfecee70 size=156 align=10 ret=bfec1ce0 (detail=0xbfec1cb0) |
| Add romfile: payload_revision (size=234) |
| phys_alloc zone=0xbfecee70 size=156 align=10 ret=bfec1c10 (detail=0xbfec1be0) |
| Add romfile: etc/ps2-keyboard-spinup (size=8) |
| phys_alloc zone=0xbfecee70 size=156 align=10 ret=bfec1b40 (detail=0xbfec1b10) |
| Add romfile: bootorder (size=15) |
| phys_alloc zone=0xbfecee70 size=156 align=10 ret=bfec1a70 (detail=0xbfec1a40) |
| Add romfile: etc/show-boot-menu (size=8) |
| phys_alloc zone=0xbfecee70 size=156 align=10 ret=bfec19a0 (detail=0xbfec1970) |
| Add romfile: grub.cfg (size=4594) |
| phys_alloc zone=0xbfecee70 size=156 align=10 ret=bfec18d0 (detail=0xbfec18a0) |
| Add romfile: (size=3608) |
| phys_alloc zone=0xbfecee70 size=156 align=10 ret=bfec1800 (detail=0xbfec17d0) |
| Add romfile: mrc.cache (size=65536) |
| phys_alloc zone=0xbfecee70 size=156 align=10 ret=bfec1730 (detail=0xbfec1700) |
| Add romfile: fallback/ramstage (size=95047) |
| phys_alloc zone=0xbfecee70 size=156 align=10 ret=bfec1660 (detail=0xbfec1630) |
| Add romfile: fallback/dsdt.aml (size=13404) |
| phys_alloc zone=0xbfecee70 size=156 align=10 ret=bfec1590 (detail=0xbfec1560) |
| Add romfile: img/coreinfo (size=101016) |
| phys_alloc zone=0xbfecee70 size=156 align=10 ret=bfec14c0 (detail=0xbfec1490) |
| Add romfile: img/nvramcui (size=107868) |
| phys_alloc zone=0xbfecee70 size=156 align=10 ret=bfec13f0 (detail=0xbfec13c0) |
| Add romfile: fallback/payload (size=68021) |
| phys_alloc zone=0xbfecee70 size=156 align=10 ret=bfec1320 (detail=0xbfec12f0) |
| Add romfile: img/tint (size=61000) |
| phys_alloc zone=0xbfecee70 size=156 align=10 ret=bfec1250 (detail=0xbfec1220) |
| Add romfile: img/memtest (size=180268) |
| phys_alloc zone=0xbfecee70 size=156 align=10 ret=bfec1180 (detail=0xbfec1150) |
| Add romfile: img/grub2 (size=580307) |
| phys_alloc zone=0xbfecee70 size=156 align=10 ret=bfec10b0 (detail=0xbfec1080) |
| Add romfile: grubtest.cfg (size=4586) |
| phys_alloc zone=0xbfecee70 size=156 align=10 ret=bfec0fe0 (detail=0xbfec0fb0) |
| Add romfile: (size=11038744) |
| phys_alloc zone=0xbfecee70 size=156 align=10 ret=bfec0f10 (detail=0xbfec0ee0) |
| Add romfile: bootblock (size=4200) |
| multiboot: eax=bffc6320, ebx=bffc62d4 |
| init ivt |
| init bda |
| Add to e820 map: 0009fc00 00000400 2 |
| phys_alloc zone=0xbfecee70 size=16 align=10 ret=bfecef60 (detail=0xbfec0eb0) |
| Copying romfile 'bootorder' (len 15) |
| Copying data 15@0xff43deb8 to 15@0xbfecef60 |
| phys_alloc zone=0xbfecee70 size=8 align=10 ret=bfec0ea0 (detail=0xbfec0e70) |
| boot order: |
| 1: /rom@img/grub2 |
| 2: |
| init bios32 |
| init PMM |
| init PNPBIOS table |
| init keyboard |
| init mouse |
| init pic |
| math cp init |
| PCI probe |
| phys_alloc zone=0xbfecee70 size=32 align=10 ret=bfec0e50 (detail=0xbfec0e20) |
| PCI device 00:00.0 (vd=8086:0154 c=0600) |
| phys_alloc zone=0xbfecee70 size=32 align=10 ret=bfec0e00 (detail=0xbfec0dd0) |
| PCI device 00:02.0 (vd=8086:0166 c=0300) |
| phys_alloc zone=0xbfecee70 size=32 align=10 ret=bfec0db0 (detail=0xbfec0d80) |
| PCI device 00:04.0 (vd=8086:0153 c=1180) |
| phys_alloc zone=0xbfecee70 size=32 align=10 ret=bfec0d60 (detail=0xbfec0d30) |
| PCI device 00:14.0 (vd=8086:1e31 c=0c03) |
| phys_alloc zone=0xbfecee70 size=32 align=10 ret=bfec0d10 (detail=0xbfec0ce0) |
| PCI device 00:16.0 (vd=8086:1e3a c=0780) |
| phys_alloc zone=0xbfecee70 size=32 align=10 ret=bfec0cc0 (detail=0xbfec0c90) |
| PCI device 00:19.0 (vd=8086:1502 c=0200) |
| phys_alloc zone=0xbfecee70 size=32 align=10 ret=bfec0c70 (detail=0xbfec0c40) |
| PCI device 00:1a.0 (vd=8086:1e2d c=0c03) |
| phys_alloc zone=0xbfecee70 size=32 align=10 ret=bfec0c20 (detail=0xbfec0bf0) |
| PCI device 00:1b.0 (vd=8086:1e20 c=0403) |
| phys_alloc zone=0xbfecee70 size=32 align=10 ret=bfec0bd0 (detail=0xbfec0ba0) |
| PCI device 00:1c.0 (vd=8086:1e10 c=0604) |
| phys_alloc zone=0xbfecee70 size=32 align=10 ret=bfec0b80 (detail=0xbfec0b50) |
| PCI device 00:1c.1 (vd=8086:1e12 c=0604) |
| phys_alloc zone=0xbfecee70 size=32 align=10 ret=bfec0b30 (detail=0xbfec0b00) |
| PCI device 00:1c.2 (vd=8086:1e14 c=0604) |
| phys_alloc zone=0xbfecee70 size=32 align=10 ret=bfec0ae0 (detail=0xbfec0ab0) |
| PCI device 00:1d.0 (vd=8086:1e26 c=0c03) |
| phys_alloc zone=0xbfecee70 size=32 align=10 ret=bfec0a90 (detail=0xbfec0a60) |
| PCI device 00:1f.0 (vd=8086:1e55 c=0601) |
| phys_alloc zone=0xbfecee70 size=32 align=10 ret=bfec0a40 (detail=0xbfec0a10) |
| PCI device 00:1f.2 (vd=8086:1e03 c=0106) |
| phys_alloc zone=0xbfecee70 size=32 align=10 ret=bfec09f0 (detail=0xbfec09c0) |
| PCI device 00:1f.3 (vd=8086:1e22 c=0c05) |
| phys_alloc zone=0xbfecee70 size=32 align=10 ret=bfec09a0 (detail=0xbfec0970) |
| PCI device 01:00.0 (vd=1180:e822 c=0805) |
| phys_alloc zone=0xbfecee70 size=32 align=10 ret=bfec0950 (detail=0xbfec0920) |
| PCI device 02:00.0 (vd=168c:0030 c=0280) |
| Found 17 PCI devices (max PCI bus is 03) |
| Relocating coreboot bios tables |
| phys_alloc zone=0xbfecee78 size=31 align=10 ret=f64e0 (detail=0xbfec08f0) |
| Copying SMBIOS entry point from 0xbff0f000 to 0x000f64e0 |
| phys_alloc zone=0xbfecee78 size=36 align=10 ret=f64b0 (detail=0xbfec08c0) |
| Copying ACPI RSDP from 0xbff23000 to 0x000f64b0 |
| rsdp=0x000f64b0 |
| rsdt=0xbff23030 |
| fadt=0xbff266f0 |
| pm_tmr_blk=508 |
| Using pmtimer, ioport 0x508 |
| init timer |
| WARNING - Timeout at tis_wait_sts:160! |
| WARNING - Timeout at tis_wait_sts:160! |
| Scan for VGA option rom |
| Attempting to init PCI bdf 00:02.0 (vd 8086:0166) |
| Attempting to map option rom on dev 00:02.0 |
| Option rom sizing returned 0 0 |
| Copying data 27136@0xff435c88 to 27136@0x000c0000 |
| Checking rom 0x000c0000 (sig aa55 size 53) |
| Running option rom at c000:0003 |
| pmm call arg1=0 |
| pmm00: length=200 handle=ffffffff flags=9 |
| phys_alloc zone=0xbfecee80 size=8192 align=10 ret=eb1c0 (detail=0xbfec0890) |
| Turning on vga text mode console |
| SeaBIOS (version rel-1.10.1-0-g8891697) |
| Machine UUID f39d7f81-52b3-11cb-bc53-959848042c5c |
| init usb |
| phys_alloc zone=0xbfecee7c size=68 align=10 ret=bff0efb0 (detail=0xbfec0860) |
| XHCI init on dev 00:14.0: regs @ 0xf1620000, 8 ports, 32 slots, 32 byte contexts |
| XHCI protocol USB 2.00, 4 ports (offset 1), def 3001 |
| XHCI protocol USB 3.00, 4 ports (offset 5), def 1000 |
| XHCI extcap 0xc1 @ 0xf1628040 |
| XHCI extcap 0xc0 @ 0xf1628070 |
| XHCI extcap 0x1 @ 0xf1628330 |
| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfebf000 (detail=0xbfec0830) |
| /bfebf000\ Start thread |
| |bfebf000| phys_alloc zone=0xbfecee7c size=264 align=40 ret=bff0ee80 (detail=0xbfec0800) |
| |bfebf000| phys_alloc zone=0xbfecee7c size=16 align=40 ret=bff0ee40 (detail=0xbfec07d0) |
| |bfebf000| phys_alloc zone=0xbfecee7c size=288 align=100 ret=bff0ed00 (detail=0xbfec07a0) |
| |bfebf000| phys_alloc zone=0xbfecee7c size=288 align=100 ret=bff0eb00 (detail=0xbfec0770) |
| |bfebf000| configure_xhci: resetting |
| phys_alloc zone=0xbfecee70 size=32 align=10 ret=bfec0750 (detail=0xbfec0720) |
| EHCI init on dev 00:1a.0 (regs=0xf163e020) |
| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfebe000 (detail=0xbfec06f0) |
| /bfebe000\ Start thread |
| |bfebe000| phys_alloc zone=0xbfecee7c size=4096 align=1000 ret=bff0d000 (detail=0xbfec06c0) |
| |bfebe000| phys_alloc zone=0xbfecee7c size=68 align=80 ret=bff0ec80 (detail=0xbfec0690) |
| |bfebe000| phys_alloc zone=0xbfecee7c size=68 align=80 ret=bff0ea80 (detail=0xbfec0660) |
| |bfebf000| configure_xhci: setup 16 scratch pad buffers |
| |bfebf000| phys_alloc zone=0xbfecee7c size=128 align=40 ret=bff0ea00 (detail=0xbfec0630) |
| |bfebf000| phys_alloc zone=0xbfecee7c size=65536 align=1000 ret=bfefd000 (detail=0xbfec0600) |
| phys_alloc zone=0xbfecee70 size=32 align=10 ret=bfec05e0 (detail=0xbfec05b0) |
| EHCI init on dev 00:1d.0 (regs=0xf163f020) |
| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfebd000 (detail=0xbfec0580) |
| /bfebd000\ Start thread |
| |bfebd000| phys_alloc zone=0xbfecee7c size=4096 align=1000 ret=bfefc000 (detail=0xbfec0550) |
| |bfebd000| phys_alloc zone=0xbfecee7c size=68 align=80 ret=bff0e980 (detail=0xbfec0520) |
| |bfebd000| phys_alloc zone=0xbfecee7c size=68 align=80 ret=bff0e900 (detail=0xbfec04f0) |
| init ps2port |
| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfebc000 (detail=0xbfec04c0) |
| /bfebc000\ Start thread |
| |bfebc000| i8042_flush |
| |bfebc000| i8042 flushed aa (status=39) |
| |bfebc000| i8042_command cmd=1aa |
| |bfebc000| i8042_wait_write |
| |bfebc000| i8042_wait_read |
| |bfebc000| i8042 param=55 |
| |bfebc000| i8042_command cmd=1ab |
| |bfebc000| i8042_wait_write |
| |bfebc000| i8042_wait_read |
| |bfebc000| i8042 param=0 |
| |bfebc000| Copying data 8@0xff43de78 to 8@0xbfebcfd4 |
| init floppy drives |
| init hard drives |
| init ahci |
| phys_alloc zone=0xbfecee80 size=2048 align=10 ret=ea9c0 (detail=0xbfec0490) |
| phys_alloc zone=0xbfecee78 size=20 align=10 ret=f6490 (detail=0xbfec0460) |
| AHCI controller at 00:1f.2, iobase 0xf163d000, irq 10 |
| AHCI: cap 0xff30ff05, ports_impl 0x7 |
| phys_alloc zone=0xbfecee70 size=68 align=10 ret=bfec0410 (detail=0xbfec03e0) |
| phys_alloc zone=0xbfecee70 size=1024 align=400 ret=bfebbc00 (detail=0xbfec03b0) |
| phys_alloc zone=0xbfecee70 size=256 align=100 ret=bfec0200 (detail=0xbfec0380) |
| phys_alloc zone=0xbfecee70 size=256 align=100 ret=bfec0100 (detail=0xbfec0350) |
| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeba000 (detail=0xbfec0320) |
| /bfeba000\ Start thread |
| |bfeba000| AHCI/0: probing |
| phys_alloc zone=0xbfecee70 size=68 align=10 ret=bfec00b0 (detail=0xbfec0080) |
| phys_alloc zone=0xbfecee70 size=1024 align=400 ret=bfebb800 (detail=0xbfec0050) |
| phys_alloc zone=0xbfecee70 size=256 align=100 ret=bfebb700 (detail=0xbfec0020) |
| phys_alloc zone=0xbfecee70 size=256 align=100 ret=bfebb600 (detail=0xbfebb5d0) |
| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeb9000 (detail=0xbfebb5a0) |
| /bfeb9000\ Start thread |
| |bfeb9000| AHCI/1: probing |
| |bfeba000| AHCI/0: link up |
| |bfebc000| ps2_command aux=0 cmd=1ff |
| |bfebc000| i8042 ctr old=30 new=30 |
| |bfebc000| i8042_command cmd=1060 |
| |bfebc000| i8042_wait_write |
| |bfebc000| i8042_wait_write |
| phys_alloc zone=0xbfecee70 size=68 align=10 ret=bfebb550 (detail=0xbfebb520) |
| phys_alloc zone=0xbfecee70 size=1024 align=400 ret=bfebb000 (detail=0xbfebb4f0) |
| phys_alloc zone=0xbfecee70 size=256 align=100 ret=bfeb8f00 (detail=0xbfebb4c0) |
| phys_alloc zone=0xbfecee70 size=256 align=100 ret=bfeb8e00 (detail=0xbfebb490) |
| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeb7000 (detail=0xbfebb460) |
| /bfeb7000\ Start thread |
| |bfeb7000| AHCI/2: probing |
| |bfebc000| i8042_command cmd=1060 |
| |bfebc000| i8042_wait_write |
| |bfebc000| i8042_wait_write |
| |bfebc000| ps2_sendbyte aux=0 cmd=ff |
| |bfebc000| i8042_kbd_write c=255 |
| |bfebc000| i8042_wait_write |
| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeb6000 (detail=0xbfebb430) |
| /bfeb6000\ Start thread |
| |bfeb6000| Searching bootorder for: /pci@i0cf8/pci-bridge@1c/*@0 |
| \bfeb6000/ End thread |
| phys_free bfeb6000 (detail=0xbfebb430) |
| |bfeb7000| AHCI/2: link up |
| init megasas |
| init lpt |
| Found 0 lpt ports |
| init serial |
| Found 0 serial ports |
| phys_alloc zone=0xbfecee70 size=80 align=10 ret=bfebb410 (detail=0xbfeb8dd0) |
| Searching bootorder for: /rom@img/grub2 |
| phys_alloc zone=0xbfecee70 size=24 align=10 ret=bfec0300 (detail=0xbfeb8da0) |
| Registering bootable: Payload [grub2] (type:32 prio:1 data:ff4e91c0) |
| phys_alloc zone=0xbfecee70 size=80 align=10 ret=bfeb8d50 (detail=0xbfeb8d20) |
| Searching bootorder for: /rom@img/memtest |
| phys_alloc zone=0xbfecee70 size=24 align=10 ret=bfec0000 (detail=0xbfeb8cf0) |
| Registering bootable: Payload [memtest] (type:32 prio:9999 data:ff4bd140) |
| phys_alloc zone=0xbfecee70 size=80 align=10 ret=bfeb8ca0 (detail=0xbfeb8c70) |
| Searching bootorder for: /rom@img/tint |
| phys_alloc zone=0xbfecee70 size=24 align=10 ret=bfeb8c50 (detail=0xbfeb8c20) |
| Registering bootable: Payload [tint] (type:32 prio:9999 data:ff4ae2c0) |
| phys_alloc zone=0xbfecee70 size=80 align=10 ret=bfeb8bd0 (detail=0xbfeb8ba0) |
| Searching bootorder for: /rom@img/nvramcui |
| phys_alloc zone=0xbfecee70 size=24 align=10 ret=bfeb8b80 (detail=0xbfeb8b50) |
| Registering bootable: Payload [nvramcui] (type:32 prio:9999 data:ff483300) |
| phys_alloc zone=0xbfecee70 size=80 align=10 ret=bfeb8b00 (detail=0xbfeb8ad0) |
| Searching bootorder for: /rom@img/coreinfo |
| phys_alloc zone=0xbfecee70 size=24 align=10 ret=bfeb8ab0 (detail=0xbfeb8a80) |
| Registering bootable: Payload [coreinfo] (type:32 prio:9999 data:ff46a840) |
| |bfebc000| ps2 read fa |
| |bfeba000| AHCI/0: send cmd ... |
| |bfeba000| AHCI/0: ... intbits 0x40000001, status 0x51 ... |
| |bfeba000| AHCI/0: ... finished, status 0x51, ERROR 0x4 |
| |bfeba000| AHCI/0: send cmd ... |
| |bfeba000| AHCI/0: ... intbits 0x2, status 0x58 ... |
| |bfeba000| AHCI/0: ... finished, status 0x58, OK |
| |bfeba000| phys_alloc zone=0xbfecee70 size=80 align=10 ret=bfeb8a30 (detail=0xbfeb8a00) |
| |bfeba000| Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0 |
| |bfeba000| AHCI/0: supported modes: udma 6, multi-dma 2, pio 4 |
| |bfeba000| AHCI/0: Set transfer mode to UDMA-6 |
| |bfeba000| AHCI/0: send cmd ... |
| |bfeba000| AHCI/0: ... intbits 0x1, status 0x50 ... |
| |bfeba000| AHCI/0: ... finished, status 0x50, OK |
| |bfeba000| phys_alloc zone=0xbfecee78 size=68 align=10 ret=f6440 (detail=0xbfeb89d0) |
| |bfeba000| phys_free bfec0410 (detail=0xbfec03e0) |
| |bfeba000| phys_free bfebbc00 (detail=0xbfec03b0) |
| |bfeba000| phys_free bfec0200 (detail=0xbfec0380) |
| |bfeba000| phys_free bfec0100 (detail=0xbfec0350) |
| |bfeba000| phys_alloc zone=0xbfecee7c size=1024 align=400 ret=bff0e400 (detail=0xbfec0430) |
| |bfeba000| phys_alloc zone=0xbfecee7c size=256 align=100 ret=bff0e800 (detail=0xbfec0400) |
| |bfeba000| phys_alloc zone=0xbfecee7c size=256 align=100 ret=bff0e300 (detail=0xbfec03d0) |
| |bfeba000| AHCI/0: registering: "AHCI/0: WDC WD10SPCX-08HWST0 ATA-9 Hard-Disk (931 GiBytes)" |
| |bfeba000| phys_alloc zone=0xbfecee70 size=24 align=10 ret=bfec03b0 (detail=0xbfec0380) |
| |bfeba000| Registering bootable: AHCI/0: WDC WD10SPCX-08HWST0 ATA-9 Hard-Disk (931 GiBytes) (type:2 prio:103 data:f6440) |
| \bfeba000/ End thread |
| phys_free bfeba000 (detail=0xbfec0320) |
| |bfeb9000| AHCI/1: link down |
| |bfeb9000| phys_free bfebb800 (detail=0xbfec0050) |
| |bfeb9000| phys_free bfebb700 (detail=0xbfec0020) |
| |bfeb9000| phys_free bfebb600 (detail=0xbfebb5d0) |
| |bfeb9000| phys_free bfec00b0 (detail=0xbfec0080) |
| \bfeb9000/ End thread |
| phys_free bfeb9000 (detail=0xbfebb5a0) |
| |bfeb7000| AHCI/2: send cmd ... |
| |bfeb7000| AHCI/2: ... intbits 0x40000001, status 0x51 ... |
| |bfeb7000| AHCI/2: ... finished, status 0x51, ERROR 0x4 |
| |bfeb7000| AHCI/2: send cmd ... |
| |bfeb7000| AHCI/2: ... intbits 0x2, status 0x58 ... |
| |bfeb7000| AHCI/2: ... finished, status 0x58, OK |
| |bfeb7000| phys_alloc zone=0xbfecee70 size=80 align=10 ret=bfec0330 (detail=0xbfec02d0) |
| |bfeb7000| Searching bootorder for: /pci@i0cf8/*@1f,2/drive@2/disk@0 |
| |bfeb7000| AHCI/2: supported modes: udma 6, multi-dma 2, pio 4 |
| |bfeb7000| AHCI/2: Set transfer mode to UDMA-6 |
| |bfeb7000| AHCI/2: send cmd ... |
| |bfeb7000| AHCI/2: ... intbits 0x1, status 0x50 ... |
| |bfeb7000| AHCI/2: ... finished, status 0x50, OK |
| |bfeb7000| phys_alloc zone=0xbfecee78 size=68 align=10 ret=f63f0 (detail=0xbfec02a0) |
| |bfeb7000| phys_free bfebb550 (detail=0xbfebb520) |
| |bfeb7000| phys_free bfebb000 (detail=0xbfebb4f0) |
| |bfeb7000| phys_free bfeb8f00 (detail=0xbfebb4c0) |
| |bfeb7000| phys_free bfeb8e00 (detail=0xbfebb490) |
| |bfeb7000| phys_alloc zone=0xbfecee7c size=1024 align=400 ret=bfefbc00 (detail=0xbfec0270) |
| |bfeb7000| phys_alloc zone=0xbfecee7c size=256 align=100 ret=bff0e200 (detail=0xbfec0240) |
| |bfeb7000| phys_alloc zone=0xbfecee7c size=256 align=100 ret=bff0e100 (detail=0xbfec0210) |
| |bfeb7000| AHCI/2: registering: "AHCI/2: LITEONIT LSS-32L6G-HP ATA-8 Hard-Disk (30533 MiBytes)" |
| |bfeb7000| phys_alloc zone=0xbfecee70 size=24 align=10 ret=bfec01f0 (detail=0xbfec01c0) |
| |bfeb7000| Registering bootable: AHCI/2: LITEONIT LSS-32L6G-HP ATA-8 Hard-Disk (30533 MiBytes) (type:2 prio:103 data:f63f0) |
| \bfeb7000/ End thread |
| phys_free bfeb7000 (detail=0xbfebb460) |
| |bfebf000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfec01a0 (detail=0xbfec0170) |
| |bfebf000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeba000 (detail=0xbfec0140) |
| /bfeba000\ Start thread |
| |bfebf000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfec0120 (detail=0xbfec00f0) |
| |bfebf000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeb9000 (detail=0xbfec00c0) |
| /bfeb9000\ Start thread |
| |bfebf000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfec00a0 (detail=0xbfec0070) |
| |bfebf000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeb7000 (detail=0xbfec0040) |
| /bfeb7000\ Start thread |
| |bfebf000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfec0020 (detail=0xbfebbfd0) |
| |bfebf000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeb6000 (detail=0xbfebbfa0) |
| /bfeb6000\ Start thread |
| |bfebf000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfebbf80 (detail=0xbfebbf50) |
| |bfebf000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeb5000 (detail=0xbfebbf20) |
| /bfeb5000\ Start thread |
| |bfebf000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfebbf00 (detail=0xbfebbed0) |
| |bfebf000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeb4000 (detail=0xbfebbea0) |
| /bfeb4000\ Start thread |
| |bfebf000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfebbe80 (detail=0xbfebbe50) |
| |bfebf000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeb3000 (detail=0xbfebbe20) |
| /bfeb3000\ Start thread |
| |bfebf000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfebbe00 (detail=0xbfebbdd0) |
| |bfebf000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeb2000 (detail=0xbfebbda0) |
| /bfeb2000\ Start thread |
| |bfebe000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfebbd80 (detail=0xbfebbd50) |
| |bfebe000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeb1000 (detail=0xbfebbd20) |
| /bfeb1000\ Start thread |
| |bfebd000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfebbd00 (detail=0xbfebbcd0) |
| |bfebd000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeb0000 (detail=0xbfebbca0) |
| /bfeb0000\ Start thread |
| |bfebe000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfebbc80 (detail=0xbfebbc50) |
| |bfebe000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeaf000 (detail=0xbfebbc20) |
| /bfeaf000\ Start thread |
| |bfebd000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfebbc00 (detail=0xbfebbbd0) |
| |bfebd000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeae000 (detail=0xbfebbba0) |
| /bfeae000\ Start thread |
| |bfebe000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfebbb80 (detail=0xbfebbb50) |
| |bfebe000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfead000 (detail=0xbfebbb20) |
| /bfead000\ Start thread |
| |bfebd000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfebbb00 (detail=0xbfebbad0) |
| |bfebd000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeac000 (detail=0xbfebbaa0) |
| /bfeac000\ Start thread |
| |bfeb1000| set_address 0xbfec0750 |
| |bfeb0000| set_address 0xbfec05e0 |
| |bfeb1000| ehci_alloc_async_pipe 0xbfec0750 0 |
| |bfeb1000| phys_alloc zone=0xbfecee70 size=92 align=80 ret=bfebba00 (detail=0xbfebba70) |
| |bfeb1000| ehci_send_pipe qh=0xbfebba00 dir=0 data=0x00000000 size=0 |
| |bfeb0000| ehci_alloc_async_pipe 0xbfec05e0 0 |
| |bfeb0000| phys_alloc zone=0xbfecee70 size=92 align=80 ret=bfebb980 (detail=0xbfebb950) |
| |bfeb0000| ehci_send_pipe qh=0xbfebb980 dir=0 data=0x00000000 size=0 |
| |bfeb1000| ehci_alloc_async_pipe 0xbfec0750 0 |
| |bfeb1000| config_usb: 0xbfebba50 |
| |bfeb1000| ehci_send_pipe qh=0xbfebba00 dir=128 data=0xbfeb1fb6 size=8 |
| |bfeb0000| ehci_alloc_async_pipe 0xbfec05e0 0 |
| |bfeb0000| config_usb: 0xbfebb9d0 |
| |bfeb0000| ehci_send_pipe qh=0xbfebb980 dir=128 data=0xbfeb0fb6 size=8 |
| |bfeb1000| device rev=0200 cls=09 sub=00 proto=01 size=64 |
| |bfeb1000| ehci_alloc_async_pipe 0xbfec0750 0 |
| |bfeb1000| ehci_send_pipe qh=0xbfebba00 dir=128 data=0xbfeb1fc8 size=9 |
| |bfeb0000| device rev=0200 cls=09 sub=00 proto=01 size=64 |
| |bfeb0000| ehci_alloc_async_pipe 0xbfec05e0 0 |
| |bfeb0000| ehci_send_pipe qh=0xbfebb980 dir=128 data=0xbfeb0fc8 size=9 |
| |bfeb1000| phys_alloc zone=0xbfecee70 size=25 align=10 ret=bfebb9e0 (detail=0xbfebb920) |
| |bfeb1000| ehci_send_pipe qh=0xbfebba00 dir=128 data=0xbfebb9e0 size=25 |
| |bfeb0000| phys_alloc zone=0xbfecee70 size=25 align=10 ret=bfebb900 (detail=0xbfebb8d0) |
| |bfeb0000| ehci_send_pipe qh=0xbfebb980 dir=128 data=0xbfebb900 size=25 |
| |bfeb1000| ehci_send_pipe qh=0xbfebba00 dir=0 data=0x00000000 size=0 |
| |bfeb0000| ehci_send_pipe qh=0xbfebb980 dir=0 data=0x00000000 size=0 |
| |bfeb1000| ehci_send_pipe qh=0xbfebba00 dir=128 data=0xbfeb1fa7 size=7 |
| |bfeb0000| ehci_send_pipe qh=0xbfebb980 dir=128 data=0xbfeb0fa7 size=7 |
| |bfeb1000| ehci_send_pipe qh=0xbfebba00 dir=0 data=0x00000000 size=0 |
| |bfeb0000| ehci_send_pipe qh=0xbfebb980 dir=0 data=0x00000000 size=0 |
| |bfeb1000| ehci_send_pipe qh=0xbfebba00 dir=0 data=0x00000000 size=0 |
| |bfeb0000| ehci_send_pipe qh=0xbfebb980 dir=0 data=0x00000000 size=0 |
| |bfeb1000| ehci_send_pipe qh=0xbfebba00 dir=0 data=0x00000000 size=0 |
| |bfeb0000| ehci_send_pipe qh=0xbfebb980 dir=0 data=0x00000000 size=0 |
| |bfeb1000| ehci_send_pipe qh=0xbfebba00 dir=0 data=0x00000000 size=0 |
| |bfeb0000| ehci_send_pipe qh=0xbfebb980 dir=0 data=0x00000000 size=0 |
| |bfeb1000| ehci_send_pipe qh=0xbfebba00 dir=0 data=0x00000000 size=0 |
| |bfeb0000| ehci_send_pipe qh=0xbfebb980 dir=0 data=0x00000000 size=0 |
| |bfeb1000| ehci_send_pipe qh=0xbfebba00 dir=0 data=0x00000000 size=0 |
| |bfeb0000| ehci_send_pipe qh=0xbfebb980 dir=0 data=0x00000000 size=0 |
| |bfeb0000| ehci_send_pipe qh=0xbfebb980 dir=0 data=0x00000000 size=0 |
| |bfeb0000| ehci_send_pipe qh=0xbfebb980 dir=0 data=0x00000000 size=0 |
| |bfeba000| phys_free bfec01a0 (detail=0xbfec0170) |
| \bfeba000/ End thread |
| phys_free bfeba000 (detail=0xbfec0140) |
| |bfeb9000| phys_free bfec0120 (detail=0xbfec00f0) |
| \bfeb9000/ End thread |
| phys_free bfeb9000 (detail=0xbfec00c0) |
| |bfeb7000| phys_free bfec00a0 (detail=0xbfec0070) |
| \bfeb7000/ End thread |
| phys_free bfeb7000 (detail=0xbfec0040) |
| |bfeb6000| phys_free bfec0020 (detail=0xbfebbfd0) |
| \bfeb6000/ End thread |
| phys_free bfeb6000 (detail=0xbfebbfa0) |
| |bfeb5000| phys_free bfebbf80 (detail=0xbfebbf50) |
| \bfeb5000/ End thread |
| phys_free bfeb5000 (detail=0xbfebbf20) |
| |bfeb4000| phys_free bfebbf00 (detail=0xbfebbed0) |
| \bfeb4000/ End thread |
| phys_free bfeb4000 (detail=0xbfebbea0) |
| |bfeb3000| phys_free bfebbe80 (detail=0xbfebbe50) |
| \bfeb3000/ End thread |
| phys_free bfeb3000 (detail=0xbfebbe20) |
| |bfeb2000| phys_free bfebbe00 (detail=0xbfebbdd0) |
| \bfeb2000/ End thread |
| phys_free bfeb2000 (detail=0xbfebbda0) |
| |bfebf000| XHCI no devices found |
| |bfebf000| phys_free bff0ee40 (detail=0xbfec07d0) |
| |bfebf000| phys_free bff0eb00 (detail=0xbfec0770) |
| |bfebf000| phys_free bff0ed00 (detail=0xbfec07a0) |
| |bfebf000| phys_free bff0ee80 (detail=0xbfec0800) |
| |bfebf000| phys_free bff0efb0 (detail=0xbfec0860) |
| \bfebf000/ End thread |
| phys_free bfebf000 (detail=0xbfec0830) |
| |bfeaf000| phys_free bfebbc80 (detail=0xbfebbc50) |
| \bfeaf000/ End thread |
| phys_free bfeaf000 (detail=0xbfebbc20) |
| |bfeae000| phys_free bfebbc00 (detail=0xbfebbbd0) |
| \bfeae000/ End thread |
| phys_free bfeae000 (detail=0xbfebbba0) |
| |bfead000| phys_free bfebbb80 (detail=0xbfebbb50) |
| \bfead000/ End thread |
| phys_free bfead000 (detail=0xbfebbb20) |
| |bfeac000| phys_free bfebbb00 (detail=0xbfebbad0) |
| \bfeac000/ End thread |
| phys_free bfeac000 (detail=0xbfebbaa0) |
| |bfeb1000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfec0870 (detail=0xbfec0840) |
| |bfeb1000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfebf000 (detail=0xbfec0810) |
| /bfebf000\ Start thread |
| |bfebf000| ehci_send_pipe qh=0xbfebba00 dir=128 data=0xbfebff70 size=4 |
| |bfeb1000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfec07f0 (detail=0xbfec07c0) |
| |bfeb1000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeba000 (detail=0xbfec0790) |
| /bfeba000\ Start thread |
| |bfeb1000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfec0770 (detail=0xbfec0190) |
| |bfeb1000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeb9000 (detail=0xbfec0160) |
| /bfeb9000\ Start thread |
| |bfeb9000| ehci_send_pipe qh=0xbfebba00 dir=128 data=0xbfeb9f70 size=4 |
| |bfeb1000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfec0140 (detail=0xbfec0110) |
| |bfeb1000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeb7000 (detail=0xbfec00e0) |
| /bfeb7000\ Start thread |
| |bfeba000| ehci_send_pipe qh=0xbfebba00 dir=128 data=0xbfebaf70 size=4 |
| |bfeb0000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfec00c0 (detail=0xbfec0090) |
| |bfeb0000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeb6000 (detail=0xbfec0060) |
| /bfeb6000\ Start thread |
| |bfeb6000| ehci_send_pipe qh=0xbfebb980 dir=128 data=0xbfeb6f70 size=4 |
| |bfeb1000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfec0040 (detail=0xbfebbfd0) |
| |bfeb1000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeb5000 (detail=0xbfebbfa0) |
| /bfeb5000\ Start thread |
| |bfeb0000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfec0020 (detail=0xbfebbf70) |
| |bfeb0000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeb4000 (detail=0xbfebbf40) |
| /bfeb4000\ Start thread |
| |bfeb1000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfebbf20 (detail=0xbfebbef0) |
| |bfeb1000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeb3000 (detail=0xbfebbec0) |
| /bfeb3000\ Start thread |
| |bfeb3000| ehci_send_pipe qh=0xbfebba00 dir=128 data=0xbfeb3f70 size=4 |
| |bfeb0000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfebbea0 (detail=0xbfebbe70) |
| |bfeb0000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeb2000 (detail=0xbfebbe40) |
| /bfeb2000\ Start thread |
| |bfeb2000| ehci_send_pipe qh=0xbfebb980 dir=128 data=0xbfeb2f70 size=4 |
| |bfeb3000| ehci_send_pipe qh=0xbfebba00 dir=0 data=0x00000000 size=0 |
| |bfeb0000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfebbe20 (detail=0xbfebbdf0) |
| |bfeb0000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeaf000 (detail=0xbfebbdc0) |
| /bfeaf000\ Start thread |
| |bfeb4000| ehci_send_pipe qh=0xbfebb980 dir=128 data=0xbfeb4f70 size=4 |
| |bfeb3000| ehci_send_pipe qh=0xbfebba00 dir=128 data=0xbfeb3f68 size=4 |
| |bfeb0000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfebbda0 (detail=0xbfebbc70) |
| |bfeb0000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeae000 (detail=0xbfebbc40) |
| /bfeae000\ Start thread |
| |bfeb5000| ehci_send_pipe qh=0xbfebba00 dir=128 data=0xbfeb5f70 size=4 |
| |bfeb0000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfebbc20 (detail=0xbfebbbf0) |
| |bfeb0000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfead000 (detail=0xbfebbbc0) |
| /bfead000\ Start thread |
| |bfead000| ehci_send_pipe qh=0xbfebb980 dir=128 data=0xbfeadf70 size=4 |
| |bfeb7000| ehci_send_pipe qh=0xbfebba00 dir=128 data=0xbfeb7f70 size=4 |
| |bfeb0000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfebbba0 (detail=0xbfebbb70) |
| |bfeb0000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeac000 (detail=0xbfebbb40) |
| /bfeac000\ Start thread |
| |bfead000| ehci_send_pipe qh=0xbfebb980 dir=0 data=0x00000000 size=0 |
| |bfeb0000| phys_alloc zone=0xbfecee70 size=28 align=10 ret=bfebbb20 (detail=0xbfebbaf0) |
| |bfeb0000| phys_alloc zone=0xbfecee70 size=4096 align=1000 ret=bfeab000 (detail=0xbfebbac0) |
| /bfeab000\ Start thread |
| |bfead000| ehci_send_pipe qh=0xbfebb980 dir=128 data=0xbfeadf68 size=4 |
| |bfeae000| ehci_send_pipe qh=0xbfebb980 dir=128 data=0xbfeaef70 size=4 |
| |bfeaf000| ehci_send_pipe qh=0xbfebb980 dir=128 data=0xbfeaff70 size=4 |
| |bfeab000| ehci_send_pipe qh=0xbfebb980 dir=128 data=0xbfeabf70 size=4 |
| |bfeac000| ehci_send_pipe qh=0xbfebb980 dir=128 data=0xbfeacf70 size=4 |
| |bfebf000| ehci_send_pipe qh=0xbfebba00 dir=128 data=0xbfebff70 size=4 |
| |bfeb9000| ehci_send_pipe qh=0xbfebba00 dir=128 data=0xbfeb9f70 size=4 |
| |bfeba000| ehci_send_pipe qh=0xbfebba00 dir=128 data=0xbfebaf70 size=4 |
| |bfeb6000| ehci_send_pipe qh=0xbfebb980 dir=128 data=0xbfeb6f70 size=4 |
| |bfeb2000| ehci_send_pipe qh=0xbfebb980 dir=128 data=0xbfeb2f70 size=4 |
| |bfeb4000| ehci_send_pipe qh=0xbfebb980 dir=128 data=0xbfeb4f70 size=4 |
| |bfeb3000| ehci_send_pipe qh=0xbfebba00 dir=128 data=0xbfeb3f68 size=4 |
| |bfeb5000| ehci_send_pipe qh=0xbfebba00 dir=128 data=0xbfeb5f70 size=4 |
| |bfead000| ehci_send_pipe qh=0xbfebb980 dir=128 data=0xbfeadf68 size=4 |
| |bfeae000| ehci_send_pipe qh=0xbfebb980 dir=128 data=0xbfeaef70 size=4 |
| |bfeaf000| ehci_send_pipe qh=0xbfebb980 dir=128 data=0xbfeaff70 size=4 |
| |bfeac000| ehci_send_pipe qh=0xbfebb980 dir=128 data=0xbfeacf70 size=4 |
| |bfebf000| ehci_send_pipe qh=0xbfebba00 dir=128 data=0xbfebff70 size=4 |
| |bfeb9000| ehci_send_pipe qh=0xbfebba00 dir=12 |
| 34892 bytes lost |