|
|
|
|
| coreboot- Mon Apr 29 15:07:52 PDT 2013 starting...
|
| Setting up static southbridge registers... done.
|
| Disabling Watchdog reboot... done.
|
| Setting up static northbridge registers... done.
|
| Boot Count incremented to 180
|
| Initializing Graphics...
|
| Back from sandybridge_early_initialization()
|
| SMBus controller enabled.
|
| CPU id(206a7): Intel(R) Celeron(R) CPU 847 @ 1.10GHz
|
| AES NOT supported, TXT NOT supported, VT supported
|
| PCH type: NM70, device id: 1e5f, rev id 4
|
| Intel ME early init
|
| Intel ME firmware is ready
|
| ME: Requested 16MB UMA
|
| Starting UEFI PEI System Agent
|
| REC MODE GPIO 68: 0
|
| Read scrambler seed 0x0000b279 from CMOS 0x98
|
| Read S3 scrambler seed 0x00003485 from CMOS 0x9c
|
| FMAP: Found "FMAP" version 1.0 at ffe10000.
|
| FMAP: base = 0 size = 800000 #areas = 32
|
| FMAP: area RW_MRC_CACHE found
|
| FMAP: offset: 3e0000
|
| FMAP: size: 65536 bytes
|
| FMAP: No valid base address, using 0xff800000
|
| picked entry 15 from cache block
|
| prepare_mrc_cache: at ffbef010, size bb0 checksum 4109
|
| CBFS: Looking for 'mrc.bin'
|
| CBFS: found.
|
| System Agent Version 1.2.2 Build 0
|
| ME: Sending Init Done with status: 0, UMA base: 0x0ff0
|
| ME: Requested BIOS Action: Continue to boot
|
| ME: FW Partition Table : OK
|
| ME: Bringup Loader Failure : NO
|
| ME: Firmware Init Complete : NO
|
| ME: Manufacturing Mode : NO
|
| ME: Boot Options Present : NO
|
| ME: Update In Progress : NO
|
| ME: Current Working State : Normal
|
| ME: Current Operation State : Bring up
|
| ME: Current Operation Mode : Security Override via Jumper
|
| ME: Error Code : No Error
|
| ME: Progress Phase : BUP Phase
|
| ME: Power Management Event : Clean Moff->Mx wake
|
| ME: Progress Phase State : 0x52
|
| memcfg DDR3 clock 1333 MHz
|
| memcfg channel assignment: A: 0, B 1, C 2
|
| memcfg channel[0] config (00600008):
|
| ECC inactive
|
| enhanced interleave mode on
|
| rank interleave on
|
| DIMMA 2048 MB width x8 single rank, selected
|
| DIMMB 0 MB width x8 single rank
|
| memcfg channel[1] config (00600008):
|
| ECC inactive
|
| enhanced interleave mode on
|
| rank interleave on
|
| DIMMA 2048 MB width x8 single rank, selected
|
| DIMMB 0 MB width x8 single rank
|
| Re-Initializing CBMEM area to 0xacec0000
|
| Initializing CBMEM area to 0xacec0000 (1310720 bytes)
|
| Adding CBMEM entry as no. 1
|
| Relocate MRC DATA from ff7e3237 to acec0200 (2992 bytes)
|
| Save scrambler seed 0x0000abfe to CMOS 0x98
|
| Save s3 scrambler seed 0x0000a1b8 to CMOS 0x9c
|
| Re-Initializing CBMEM area to 0xacec0000
|
| Adding CBMEM entry as no. 2
|
| Adding CBMEM entry as no. 3
|
| Loading image.
|
| CBFS: Looking for 'fallback/coreboot_ram'
|
| CBFS: found.
|
| CBFS: loading stage fallback/coreboot_ram @ 0x100000 (606208 bytes), entry @ 0x100000
|
| Jumping to image.
|
| coreboot- Mon Apr 29 15:07:52 PDT 2013 booting...
|
| Enumerating buses...
|
| Show all devs...Before device enumeration.
|
| Root Device: enabled 1
|
| APIC_CLUSTER: 0: enabled 1
|
| APIC: 00: enabled 1
|
| APIC: acac: enabled 0
|
| PCI_DOMAIN: 0000: enabled 1
|
| PCI: 00:00.0: enabled 1
|
| PCI: 00:02.0: enabled 1
|
| PCI: 00:16.0: enabled 1
|
| PCI: 00:16.1: enabled 0
|
| PCI: 00:16.2: enabled 0
|
| PCI: 00:16.3: enabled 0
|
| PCI: 00:19.0: enabled 0
|
| PCI: 00:1a.0: enabled 1
|
| PCI: 00:1b.0: enabled 1
|
| PCI: 00:1c.0: enabled 0
|
| PCI: 00:1c.1: enabled 1
|
| PCI: 00:1c.2: enabled 1
|
| PCI: 00:1c.3: enabled 0
|
| PCI: 00:1c.4: enabled 0
|
| PCI: 00:1c.5: enabled 0
|
| PCI: 00:1c.6: enabled 0
|
| PCI: 00:1c.7: enabled 0
|
| PCI: 00:1d.0: enabled 1
|
| PCI: 00:1e.0: enabled 0
|
| PCI: 00:1f.0: enabled 1
|
| PNP: 00ff.1: enabled 1
|
| PCI: 00:1f.2: enabled 1
|
| PCI: 00:1f.3: enabled 1
|
| PCI: 00:1f.5: enabled 0
|
| PCI: 00:1f.6: enabled 1
|
| Compare with tree...
|
| Root Device: enabled 1
|
| APIC_CLUSTER: 0: enabled 1
|
| APIC: 00: enabled 1
|
| APIC: acac: enabled 0
|
| PCI_DOMAIN: 0000: enabled 1
|
| PCI: 00:00.0: enabled 1
|
| PCI: 00:02.0: enabled 1
|
| PCI: 00:16.0: enabled 1
|
| PCI: 00:16.1: enabled 0
|
| PCI: 00:16.2: enabled 0
|
| PCI: 00:16.3: enabled 0
|
| PCI: 00:19.0: enabled 0
|
| PCI: 00:1a.0: enabled 1
|
| PCI: 00:1b.0: enabled 1
|
| PCI: 00:1c.0: enabled 0
|
| PCI: 00:1c.1: enabled 1
|
| PCI: 00:1c.2: enabled 1
|
| PCI: 00:1c.3: enabled 0
|
| PCI: 00:1c.4: enabled 0
|
| PCI: 00:1c.5: enabled 0
|
| PCI: 00:1c.6: enabled 0
|
| PCI: 00:1c.7: enabled 0
|
| PCI: 00:1d.0: enabled 1
|
| PCI: 00:1e.0: enabled 0
|
| PCI: 00:1f.0: enabled 1
|
| PNP: 00ff.1: enabled 1
|
| PCI: 00:1f.2: enabled 1
|
| PCI: 00:1f.3: enabled 1
|
| PCI: 00:1f.5: enabled 0
|
| PCI: 00:1f.6: enabled 1
|
| scan_static_bus for Root Device
|
| APIC_CLUSTER: 0 enabled
|
| PCI_DOMAIN: 0000 enabled
|
| PCI_DOMAIN: 0000 scanning...
|
| PCI: pci_scan_bus for bus 00
|
| PCI: 00:00.0 [8086/0104] ops
|
| Normal boot.
|
| PCI: 00:00.0 [8086/0104] enabled
|
| PCI: 00:02.0 [8086/0000] ops
|
| PCI: 00:02.0 [8086/0106] enabled
|
| PCI: 00:16.0 [8086/1e3a] bus ops
|
| PCI: 00:16.0 [8086/1e3a] enabled
|
| PCI: 00:16.1: Disabling device
|
| PCI: 00:16.2: Disabling device
|
| PCI: 00:16.3: Disabling device
|
| PCI: 00:19.0: Disabling device
|
| PCI: 00:1a.0 [8086/0000] ops
|
| PCI: 00:1a.0 [8086/1e2d] enabled
|
| PCI: 00:1b.0 [8086/0000] ops
|
| PCI: 00:1b.0 [8086/1e20] enabled
|
| PCH: PCIe Root Port coalescing is enabled
|
| PCI: 00:1c.0: Disabling device
|
| PCI: 00:1c.0: check set enabled
|
| PCH: Remap PCIe function 1 to 0
|
| PCI: 00:1c.1 [8086/0000] bus ops
|
| PCI: 00:1c.1 [8086/1e12] enabled
|
| PCH: Remap PCIe function 2 to 0
|
| PCI: 00:1c.2 [8086/0000] bus ops
|
| PCI: 00:1c.2 [8086/1e14] enabled
|
| PCI: 00:1c.3: Disabling device
|
| PCI: 00:1c.4: Disabling device
|
| PCI: 00:1c.4: check set enabled
|
| PCI: 00:1c.5: Disabling device
|
| PCI: 00:1c.6: Disabling device
|
| PCI: 00:1c.7: Disabling device
|
| PCH: RPFN 0x76543210 -> 0xfedcb10a
|
| PCH: PCIe map 1c.0 -> 1c.2
|
| PCH: PCIe map 1c.1 -> 1c.0
|
| PCH: PCIe map 1c.2 -> 1c.1
|
| PCI: 00:1d.0 [8086/0000] ops
|
| PCI: 00:1d.0 [8086/1e26] enabled
|
| PCI: 00:1e.0: Disabling device
|
| PCI: 00:1f.0 [8086/0000] bus ops
|
| PCI: 00:1f.0 [8086/1e5f] enabled
|
| PCI: 00:1f.2 [8086/0000] ops
|
| PCI: 00:1f.2 [8086/1e01] enabled
|
| PCI: 00:1f.3 [8086/0000] bus ops
|
| PCI: 00:1f.3 [8086/1e22] enabled
|
| PCI: 00:1f.5: Disabling device
|
| PCI: 00:1f.6 [8086/1e24] enabled
|
| scan_static_bus for PCI: 00:16.0
|
| scan_static_bus for PCI: 00:16.0 done
|
| do_pci_scan_bridge for PCI: 00:1c.0
|
| PCI: pci_scan_bus for bus 01
|
| PCI: 01:00.0 [168c/0034] enabled
|
| PCI: pci_scan_bus returning with max=001
|
| Capability: type 0x01 @ 0x40
|
| Capability: type 0x05 @ 0x50
|
| Capability: type 0x10 @ 0x70
|
| Capability: type 0x10 @ 0x40
|
| Enabling Common Clock Configuration
|
| ASPM: Enabled L0s and L1
|
| do_pci_scan_bridge returns max 1
|
| do_pci_scan_bridge for PCI: 00:1c.1
|
| PCI: pci_scan_bus for bus 02
|
| PCI: 02:00.0 [14e4/16b5] enabled
|
| PCI: 02:00.1 [14e4/16bc] enabled
|
| PCI: pci_scan_bus returning with max=002
|
| Capability: type 0x01 @ 0x48
|
| Capability: type 0x05 @ 0x58
|
| Capability: type 0x11 @ 0xa0
|
| Capability: type 0x10 @ 0xac
|
| Capability: type 0x10 @ 0x40
|
| Enabling Common Clock Configuration
|
| ASPM: Enabled L0s and L1
|
| Capability: type 0x01 @ 0x48
|
| Capability: type 0x05 @ 0x58
|
| Capability: type 0x10 @ 0xac
|
| Capability: type 0x10 @ 0x40
|
| Enabling Common Clock Configuration
|
| ASPM: Enabled L0s and L1
|
| do_pci_scan_bridge returns max 2
|
| scan_static_bus for PCI: 00:1f.0
|
| PNP: 00ff.1 enabled
|
| PNP: 00ff.0 enabled
|
| scan_static_bus for PCI: 00:1f.0 done
|
| scan_static_bus for PCI: 00:1f.3
|
| scan_static_bus for PCI: 00:1f.3 done
|
| PCI: pci_scan_bus returning with max=002
|
| scan_static_bus for Root Device done
|
| done
|
| Setting up VGA for PCI: 00:02.0
|
| Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000
|
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
|
| Allocating resources...
|
| Reading resources...
|
| Root Device read_resources bus 0 link: 0
|
| APIC_CLUSTER: 0 read_resources bus 0 link: 0
|
| APIC: 00 missing read_resources
|
| APIC_CLUSTER: 0 read_resources bus 0 link: 0 done
|
| PCI_DOMAIN: 0000 read_resources bus 0 link: 0
|
| Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
|
| PCI: 00:1c.0 read_resources bus 1 link: 0
|
| PCI: 00:1c.0 read_resources bus 1 link: 0 done
|
| PCI: 00:1c.1 read_resources bus 2 link: 0
|
| PCI: 00:1c.1 read_resources bus 2 link: 0 done
|
| PCI: 00:1f.0 read_resources bus 0 link: 0
|
| PNP: 00ff.1 missing read_resources
|
| PCI: 00:1f.0 read_resources bus 0 link: 0 done
|
| PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done
|
| Root Device read_resources bus 0 link: 0 done
|
| Done reading resources.
|
| Show resources in subtree (Root Device)...After reading.
|
| Root Device child on link 0 APIC_CLUSTER: 0
|
| APIC_CLUSTER: 0 child on link 0 APIC: 00
|
| APIC: 00
|
| APIC: acac
|
| PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0
|
| PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
|
| PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
|
| PCI: 00:00.0
|
| PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags e0000200 index cf
|
| PCI: 00:02.0
|
| PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10
|
| PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
|
| PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
|
| PCI: 00:16.0
|
| PCI: 00:16.0 resource base 0 size 10 align 4 gran 4 limit ffffffffffffffff flags 201 index 10
|
| PCI: 00:16.1
|
| PCI: 00:16.2
|
| PCI: 00:16.3
|
| PCI: 00:19.0
|
| PCI: 00:1a.0
|
| PCI: 00:1a.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 10
|
| PCI: 00:1b.0
|
| PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
|
| PCI: 00:1c.2
|
| PCI: 00:1c.0 child on link 0 PCI: 01:00.0
|
| PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
|
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
|
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
|
| PCI: 01:00.0
|
| PCI: 01:00.0 resource base 0 size 80000 align 19 gran 19 limit ffffffffffffffff flags 201 index 10
|
| PCI: 01:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30
|
| PCI: 00:1c.1 child on link 0 PCI: 02:00.0
|
| PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
|
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
|
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
|
| PCI: 02:00.0
|
| PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 1201 index 10
|
| PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 1201 index 18
|
| PCI: 02:00.0 resource base 0 size 800 align 11 gran 11 limit ffffffff flags 2200 index 30
|
| PCI: 02:00.1
|
| PCI: 02:00.1 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 1201 index 10
|
| PCI: 00:1c.3
|
| PCI: 00:1c.4
|
| PCI: 00:1c.5
|
| PCI: 00:1c.6
|
| PCI: 00:1c.7
|
| PCI: 00:1d.0
|
| PCI: 00:1d.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 10
|
| PCI: 00:1e.0
|
| PCI: 00:1f.0 child on link 0 PNP: 00ff.1
|
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
|
| PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
|
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
|
| PCI: 00:1f.0 resource base fd60 size 4 align 0 gran 0 limit 0 flags c0040100 index 10000200
|
| PNP: 00ff.1
|
| PNP: 00ff.0
|
| PCI: 00:1f.2
|
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
|
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
|
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
|
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
|
| PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
|
| PCI: 00:1f.2 resource base 0 size 800 align 11 gran 11 limit ffffffff flags 200 index 24
|
| PCI: 00:1f.3
|
| PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
|
| PCI: 00:1f.3 resource base 0 size 100 align 8 gran 8 limit ffffffffffffffff flags 201 index 10
|
| PCI: 00:1f.5
|
| PCI: 00:1f.6
|
| PCI: 00:1f.6 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
|
| PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
|
| PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
|
| PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
|
| PCI: 00:1c.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
|
| PCI: 00:1c.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
|
| PCI: 00:02.0 20 * [0x0 - 0x3f] io
|
| PCI: 00:1f.2 20 * [0x40 - 0x5f] io
|
| PCI: 00:1f.2 10 * [0x60 - 0x67] io
|
| PCI: 00:1f.2 18 * [0x68 - 0x6f] io
|
| PCI: 00:1f.2 14 * [0x70 - 0x73] io
|
| PCI: 00:1f.2 1c * [0x74 - 0x77] io
|
| PCI_DOMAIN: 0000 compute_resources_io: base: 78 size: 78 align: 6 gran: 0 limit: ffff done
|
| PCI_DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
|
| PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
|
| PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
|
| PCI: 00:1c.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
|
| PCI: 01:00.0 10 * [0x0 - 0x7ffff] mem
|
| PCI: 01:00.0 30 * [0x80000 - 0x8ffff] mem
|
| PCI: 00:1c.0 compute_resources_mem: base: 90000 size: 100000 align: 20 gran: 20 limit: ffffffff done
|
| PCI: 00:1c.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
|
| PCI: 02:00.0 10 * [0x0 - 0xffff] prefmem
|
| PCI: 02:00.0 18 * [0x10000 - 0x1ffff] prefmem
|
| PCI: 02:00.1 10 * [0x20000 - 0x2ffff] prefmem
|
| PCI: 00:1c.1 compute_resources_prefmem: base: 30000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
|
| PCI: 00:1c.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
|
| PCI: 02:00.0 30 * [0x0 - 0x7ff] mem
|
| PCI: 00:1c.1 compute_resources_mem: base: 800 size: 100000 align: 20 gran: 20 limit: ffffffff done
|
| PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
|
| PCI: 00:02.0 10 * [0x10000000 - 0x103fffff] mem
|
| PCI: 00:1c.0 20 * [0x10400000 - 0x104fffff] mem
|
| PCI: 00:1c.1 24 * [0x10500000 - 0x105fffff] prefmem
|
| PCI: 00:1c.1 20 * [0x10600000 - 0x106fffff] mem
|
| PCI: 00:1b.0 10 * [0x10700000 - 0x10703fff] mem
|
| PCI: 00:1f.6 10 * [0x10704000 - 0x10704fff] mem
|
| PCI: 00:1f.2 24 * [0x10705000 - 0x107057ff] mem
|
| PCI: 00:1a.0 10 * [0x10705800 - 0x10705bff] mem
|
| PCI: 00:1d.0 10 * [0x10705c00 - 0x10705fff] mem
|
| PCI: 00:1f.3 10 * [0x10706000 - 0x107060ff] mem
|
| PCI: 00:16.0 10 * [0x10706100 - 0x1070610f] mem
|
| PCI_DOMAIN: 0000 compute_resources_mem: base: 10706110 size: 10706110 align: 28 gran: 0 limit: ffffffff done
|
| avoid_fixed_resources: PCI_DOMAIN: 0000
|
| avoid_fixed_resources:@PCI_DOMAIN: 0000 10000000 limit 0000ffff
|
| avoid_fixed_resources:@PCI_DOMAIN: 0000 10000100 limit ffffffff
|
| constrain_resources: PCI_DOMAIN: 0000
|
| constrain_resources: PCI: 00:00.0
|
| constrain_resources: PCI: 00:02.0
|
| constrain_resources: PCI: 00:16.0
|
| constrain_resources: PCI: 00:1a.0
|
| constrain_resources: PCI: 00:1b.0
|
| constrain_resources: PCI: 00:1c.0
|
| constrain_resources: PCI: 01:00.0
|
| constrain_resources: PCI: 00:1c.1
|
| constrain_resources: PCI: 02:00.0
|
| constrain_resources: PCI: 02:00.1
|
| constrain_resources: PCI: 00:1d.0
|
| constrain_resources: PCI: 00:1f.0
|
| constrain_resources: PNP: 00ff.1
|
| constrain_resources: PNP: 00ff.0
|
| constrain_resources: PCI: 00:1f.2
|
| constrain_resources: PCI: 00:1f.3
|
| constrain_resources: PCI: 00:1f.6
|
| avoid_fixed_resources2: PCI_DOMAIN: 0000@10000000 limit 0000ffff
|
| lim->base 00001000 lim->limit 0000fd5f
|
| avoid_fixed_resources2: PCI_DOMAIN: 0000@10000100 limit ffffffff
|
| lim->base 00000000 lim->limit efffffff
|
| Setting resources...
|
| PCI_DOMAIN: 0000 allocate_resources_io: base:1000 size:78 align:6 gran:0 limit:fd5f
|
| Assigned: PCI: 00:02.0 20 * [0x1000 - 0x103f] io
|
| Assigned: PCI: 00:1f.2 20 * [0x1040 - 0x105f] io
|
| Assigned: PCI: 00:1f.2 10 * [0x1060 - 0x1067] io
|
| Assigned: PCI: 00:1f.2 18 * [0x1068 - 0x106f] io
|
| Assigned: PCI: 00:1f.2 14 * [0x1070 - 0x1073] io
|
| Assigned: PCI: 00:1f.2 1c * [0x1074 - 0x1077] io
|
| PCI_DOMAIN: 0000 allocate_resources_io: next_base: 1078 size: 78 align: 6 gran: 0 done
|
| PCI: 00:1c.0 allocate_resources_io: base:fd5f size:0 align:12 gran:12 limit:fd5f
|
| PCI: 00:1c.0 allocate_resources_io: next_base: fd5f size: 0 align: 12 gran: 12 done
|
| PCI: 00:1c.1 allocate_resources_io: base:fd5f size:0 align:12 gran:12 limit:fd5f
|
| PCI: 00:1c.1 allocate_resources_io: next_base: fd5f size: 0 align: 12 gran: 12 done
|
| PCI_DOMAIN: 0000 allocate_resources_mem: base:d0000000 size:10706110 align:28 gran:0 limit:efffffff
|
| Assigned: PCI: 00:02.0 18 * [0xd0000000 - 0xdfffffff] prefmem
|
| Assigned: PCI: 00:02.0 10 * [0xe0000000 - 0xe03fffff] mem
|
| Assigned: PCI: 00:1c.0 20 * [0xe0400000 - 0xe04fffff] mem
|
| Assigned: PCI: 00:1c.1 24 * [0xe0500000 - 0xe05fffff] prefmem
|
| Assigned: PCI: 00:1c.1 20 * [0xe0600000 - 0xe06fffff] mem
|
| Assigned: PCI: 00:1b.0 10 * [0xe0700000 - 0xe0703fff] mem
|
| Assigned: PCI: 00:1f.6 10 * [0xe0704000 - 0xe0704fff] mem
|
| Assigned: PCI: 00:1f.2 24 * [0xe0705000 - 0xe07057ff] mem
|
| Assigned: PCI: 00:1a.0 10 * [0xe0705800 - 0xe0705bff] mem
|
| Assigned: PCI: 00:1d.0 10 * [0xe0705c00 - 0xe0705fff] mem
|
| Assigned: PCI: 00:1f.3 10 * [0xe0706000 - 0xe07060ff] mem
|
| Assigned: PCI: 00:16.0 10 * [0xe0706100 - 0xe070610f] mem
|
| PCI_DOMAIN: 0000 allocate_resources_mem: next_base: e0706110 size: 10706110 align: 28 gran: 0 done
|
| PCI: 00:1c.0 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
|
| PCI: 00:1c.0 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
|
| PCI: 00:1c.0 allocate_resources_mem: base:e0400000 size:100000 align:20 gran:20 limit:efffffff
|
| Assigned: PCI: 01:00.0 10 * [0xe0400000 - 0xe047ffff] mem
|
| Assigned: PCI: 01:00.0 30 * [0xe0480000 - 0xe048ffff] mem
|
| PCI: 00:1c.0 allocate_resources_mem: next_base: e0490000 size: 100000 align: 20 gran: 20 done
|
| PCI: 00:1c.1 allocate_resources_prefmem: base:e0500000 size:100000 align:20 gran:20 limit:efffffff
|
| Assigned: PCI: 02:00.0 10 * [0xe0500000 - 0xe050ffff] prefmem
|
| Assigned: PCI: 02:00.0 18 * [0xe0510000 - 0xe051ffff] prefmem
|
| Assigned: PCI: 02:00.1 10 * [0xe0520000 - 0xe052ffff] prefmem
|
| PCI: 00:1c.1 allocate_resources_prefmem: next_base: e0530000 size: 100000 align: 20 gran: 20 done
|
| PCI: 00:1c.1 allocate_resources_mem: base:e0600000 size:100000 align:20 gran:20 limit:efffffff
|
| Assigned: PCI: 02:00.0 30 * [0xe0600000 - 0xe06007ff] mem
|
| PCI: 00:1c.1 allocate_resources_mem: next_base: e0600800 size: 100000 align: 20 gran: 20 done
|
| Root Device assign_resources, bus 0 link: 0
|
| TOUUD 0x14f600000 TOLUD 0xafa00000 TOM 0x100000000
|
| MEBASE 0xff000000
|
| IGD decoded, subtracting 32M UMA and 2M GTT
|
| TSEG base 0xad000000 size 8M
|
| Available memory below 4GB: 2768M
|
| Available memory above 4GB: 1270M
|
| Adding UMA memory area base=0xad000000 size=0x2a00000
|
| Adding PCIe config bar base=0xf0000000 size=0x4000000
|
| PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
|
| PCI: 00:00.0 cf <- [0x00f0000000 - 0x00f3ffffff] size 0x04000000 gran 0x00 mem<mmconfig>
|
| PCI: 00:02.0 10 <- [0x00e0000000 - 0x00e03fffff] size 0x00400000 gran 0x16 mem64
|
| PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64
|
| PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
|
| PCI: 00:16.0 10 <- [0x00e0706100 - 0x00e070610f] size 0x00000010 gran 0x04 mem64
|
| PCI: 00:1a.0 10 <- [0x00e0705800 - 0x00e0705bff] size 0x00000400 gran 0x0a mem
|
| PCI: 00:1b.0 10 <- [0x00e0700000 - 0x00e0703fff] size 0x00004000 gran 0x0e mem64
|
| PCI: 00:1c.0 1c <- [0x000000fd5f - 0x000000fd5e] size 0x00000000 gran 0x0c bus 01 io
|
| PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem
|
| PCI: 00:1c.0 20 <- [0x00e0400000 - 0x00e04fffff] size 0x00100000 gran 0x14 bus 01 mem
|
| PCI: 00:1c.0 assign_resources, bus 1 link: 0
|
| PCI: 01:00.0 10 <- [0x00e0400000 - 0x00e047ffff] size 0x00080000 gran 0x13 mem64
|
| PCI: 01:00.0 30 <- [0x00e0480000 - 0x00e048ffff] size 0x00010000 gran 0x10 romem
|
| PCI: 00:1c.0 assign_resources, bus 1 link: 0
|
| PCI: 00:1c.1 1c <- [0x000000fd5f - 0x000000fd5e] size 0x00000000 gran 0x0c bus 02 io
|
| PCI: 00:1c.1 24 <- [0x00e0500000 - 0x00e05fffff] size 0x00100000 gran 0x14 bus 02 prefmem
|
| PCI: 00:1c.1 20 <- [0x00e0600000 - 0x00e06fffff] size 0x00100000 gran 0x14 bus 02 mem
|
| PCI: 00:1c.1 assign_resources, bus 2 link: 0
|
| PCI: 02:00.0 10 <- [0x00e0500000 - 0x00e050ffff] size 0x00010000 gran 0x10 prefmem64
|
| PCI: 02:00.0 18 <- [0x00e0510000 - 0x00e051ffff] size 0x00010000 gran 0x10 prefmem64
|
| PCI: 02:00.0 30 <- [0x00e0600000 - 0x00e06007ff] size 0x00000800 gran 0x0b romem
|
| PCI: 02:00.1 10 <- [0x00e0520000 - 0x00e052ffff] size 0x00010000 gran 0x10 prefmem64
|
| PCI: 00:1c.1 assign_resources, bus 2 link: 0
|
| PCI: 00:1d.0 10 <- [0x00e0705c00 - 0x00e0705fff] size 0x00000400 gran 0x0a mem
|
| PCI: 00:1f.0 assign_resources, bus 0 link: 0
|
| PCI: 00:1f.0 assign_resources, bus 0 link: 0
|
| PCI: 00:1f.2 10 <- [0x0000001060 - 0x0000001067] size 0x00000008 gran 0x03 io
|
| PCI: 00:1f.2 14 <- [0x0000001070 - 0x0000001073] size 0x00000004 gran 0x02 io
|
| PCI: 00:1f.2 18 <- [0x0000001068 - 0x000000106f] size 0x00000008 gran 0x03 io
|
| PCI: 00:1f.2 1c <- [0x0000001074 - 0x0000001077] size 0x00000004 gran 0x02 io
|
| PCI: 00:1f.2 20 <- [0x0000001040 - 0x000000105f] size 0x00000020 gran 0x05 io
|
| PCI: 00:1f.2 24 <- [0x00e0705000 - 0x00e07057ff] size 0x00000800 gran 0x0b mem
|
| PCI: 00:1f.3 10 <- [0x00e0706000 - 0x00e07060ff] size 0x00000100 gran 0x08 mem64
|
| PCI: 00:1f.6 10 <- [0x00e0704000 - 0x00e0704fff] size 0x00001000 gran 0x0c mem64
|
| PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
|
| Root Device assign_resources, bus 0 link: 0
|
| Done setting resources.
|
| Show resources in subtree (Root Device)...After assigning values.
|
| Root Device child on link 0 APIC_CLUSTER: 0
|
| APIC_CLUSTER: 0 child on link 0 APIC: 00
|
| APIC: 00
|
| APIC: acac
|
| PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0
|
| PCI_DOMAIN: 0000 resource base 1000 size 78 align 6 gran 0 limit fd5f flags 40040100 index 10000000
|
| PCI_DOMAIN: 0000 resource base d0000000 size 10706110 align 28 gran 0 limit efffffff flags 40040200 index 10000100
|
| PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
|
| PCI_DOMAIN: 0000 resource base 100000 size acf00000 align 0 gran 0 limit 0 flags e0004200 index 4
|
| PCI_DOMAIN: 0000 resource base 100000000 size 4f600000 align 0 gran 0 limit 0 flags e0004200 index 5
|
| PCI_DOMAIN: 0000 resource base ad000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6
|
| PCI_DOMAIN: 0000 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 7
|
| PCI: 00:00.0
|
| PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags e0000200 index cf
|
| PCI: 00:02.0
|
| PCI: 00:02.0 resource base e0000000 size 400000 align 22 gran 22 limit efffffff flags 60000201 index 10
|
| PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001201 index 18
|
| PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit fd5f flags 60000100 index 20
|
| PCI: 00:16.0
|
| PCI: 00:16.0 resource base e0706100 size 10 align 4 gran 4 limit efffffff flags 60000201 index 10
|
| PCI: 00:16.1
|
| PCI: 00:16.2
|
| PCI: 00:16.3
|
| PCI: 00:19.0
|
| PCI: 00:1a.0
|
| PCI: 00:1a.0 resource base e0705800 size 400 align 10 gran 10 limit efffffff flags 60000200 index 10
|
| PCI: 00:1b.0
|
| PCI: 00:1b.0 resource base e0700000 size 4000 align 14 gran 14 limit efffffff flags 60000201 index 10
|
| PCI: 00:1c.2
|
| PCI: 00:1c.0 child on link 0 PCI: 01:00.0
|
| PCI: 00:1c.0 resource base fd5f size 0 align 12 gran 12 limit fd5f flags 60080102 index 1c
|
| PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
|
| PCI: 00:1c.0 resource base e0400000 size 100000 align 20 gran 20 limit efffffff flags 60080202 index 20
|
| PCI: 01:00.0
|
| PCI: 01:00.0 resource base e0400000 size 80000 align 19 gran 19 limit efffffff flags 60000201 index 10
|
| PCI: 01:00.0 resource base e0480000 size 10000 align 16 gran 16 limit efffffff flags 60002200 index 30
|
| PCI: 00:1c.1 child on link 0 PCI: 02:00.0
|
| PCI: 00:1c.1 resource base fd5f size 0 align 12 gran 12 limit fd5f flags 60080102 index 1c
|
| PCI: 00:1c.1 resource base e0500000 size 100000 align 20 gran 20 limit efffffff flags 60081202 index 24
|
| PCI: 00:1c.1 resource base e0600000 size 100000 align 20 gran 20 limit efffffff flags 60080202 index 20
|
| PCI: 02:00.0
|
| PCI: 02:00.0 resource base e0500000 size 10000 align 16 gran 16 limit efffffff flags 60001201 index 10
|
| PCI: 02:00.0 resource base e0510000 size 10000 align 16 gran 16 limit efffffff flags 60001201 index 18
|
| PCI: 02:00.0 resource base e0600000 size 800 align 11 gran 11 limit efffffff flags 60002200 index 30
|
| PCI: 02:00.1
|
| PCI: 02:00.1 resource base e0520000 size 10000 align 16 gran 16 limit efffffff flags 60001201 index 10
|
| PCI: 00:1c.3
|
| PCI: 00:1c.4
|
| PCI: 00:1c.5
|
| PCI: 00:1c.6
|
| PCI: 00:1c.7
|
| PCI: 00:1d.0
|
| PCI: 00:1d.0 resource base e0705c00 size 400 align 10 gran 10 limit efffffff flags 60000200 index 10
|
| PCI: 00:1e.0
|
| PCI: 00:1f.0 child on link 0 PNP: 00ff.1
|
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
|
| PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
|
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
|
| PCI: 00:1f.0 resource base fd60 size 4 align 0 gran 0 limit 0 flags c0040100 index 10000200
|
| PNP: 00ff.1
|
| PNP: 00ff.0
|
| PCI: 00:1f.2
|
| PCI: 00:1f.2 resource base 1060 size 8 align 3 gran 3 limit fd5f flags 60000100 index 10
|
| PCI: 00:1f.2 resource base 1070 size 4 align 2 gran 2 limit fd5f flags 60000100 index 14
|
| PCI: 00:1f.2 resource base 1068 size 8 align 3 gran 3 limit fd5f flags 60000100 index 18
|
| PCI: 00:1f.2 resource base 1074 size 4 align 2 gran 2 limit fd5f flags 60000100 index 1c
|
| PCI: 00:1f.2 resource base 1040 size 20 align 5 gran 5 limit fd5f flags 60000100 index 20
|
| PCI: 00:1f.2 resource base e0705000 size 800 align 11 gran 11 limit efffffff flags 60000200 index 24
|
| PCI: 00:1f.3
|
| PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
|
| PCI: 00:1f.3 resource base e0706000 size 100 align 8 gran 8 limit efffffff flags 60000201 index 10
|
| PCI: 00:1f.5
|
| PCI: 00:1f.6
|
| PCI: 00:1f.6 resource base e0704000 size 1000 align 12 gran 12 limit efffffff flags 60000201 index 10
|
| Done allocating resources.
|
| Enabling resources...
|
| PCI: 00:00.0 subsystem <- 0000/0000
|
| PCI: 00:00.0 cmd <- 06
|
| PCI: 00:02.0 subsystem <- 0000/0000
|
| PCI: 00:02.0 cmd <- 03
|
| PCI: 00:16.0 subsystem <- 0000/0000
|
| PCI: 00:16.0 cmd <- 02
|
| PCI: 00:1a.0 subsystem <- 0000/0000
|
| PCI: 00:1a.0 cmd <- 102
|
| PCI: 00:1b.0 subsystem <- 0000/0000
|
| PCI: 00:1b.0 cmd <- 102
|
| PCI: 00:1c.0 bridge ctrl <- 0003
|
| PCI: 00:1c.0 subsystem <- 0000/0000
|
| PCI: 00:1c.0 cmd <- 106
|
| PCI: 00:1c.1 bridge ctrl <- 0003
|
| PCI: 00:1c.1 subsystem <- 0000/0000
|
| PCI: 00:1c.1 cmd <- 106
|
| PCI: 00:1d.0 subsystem <- 0000/0000
|
| PCI: 00:1d.0 cmd <- 102
|
| pch_decode_init
|
| PCI: 00:1f.0 subsystem <- 0000/0000
|
| PCI: 00:1f.0 cmd <- 107
|
| PCI: 00:1f.2 subsystem <- 0000/0000
|
| PCI: 00:1f.2 cmd <- 03
|
| PCI: 00:1f.3 subsystem <- 0000/0000
|
| PCI: 00:1f.3 cmd <- 103
|
| PCI: 00:1f.6 subsystem <- 0000/0000
|
| PCI: 00:1f.6 cmd <- 02
|
| PCI: 01:00.0 cmd <- 02
|
| PCI: 02:00.0 cmd <- 02
|
| PCI: 02:00.1 cmd <- 06
|
| done.
|
| Initializing devices...
|
| Root Device init
|
| Parrot EC Init
|
| EC version 0.7.1
|
| EC Project: KZV1V
|
| Parrot Revision de
|
| APIC_CLUSTER: 0 init
|
| start_eip=0x0000a000, offset=0x00100000, code_size=0x00000062
|
| SF: Detected W25Q64 with page size 1000, total 800000
|
| FMAP: Found "FMAP" version 1.0 at ffe10000.
|
| FMAP: base = 0 size = 800000 #areas = 32
|
| FMAP: area RW_ELOG found
|
| FMAP: offset: 3f0000
|
| FMAP: size: 16384 bytes
|
| FMAP: No valid base address, using 0xff800000
|
| ELOG: MEM @0x00190be8 FLASH @0xffbf0000
|
| ELOG: areas are 4096 bytes, full threshold 3072, shrink size 1024
|
| ELOG: Event(17) added with size 13
|
| SF: Winbond: Successfully programmed 13 bytes @ 0x3f0b0c
|
| POST: Unexpected post code in previous boot: 0x9b
|
| ELOG: Event(A3) added with size 11
|
| SF: Winbond: Successfully programmed 11 bytes @ 0x3f0b19
|
| ELOG: Event(93) added with size 9
|
| SF: Winbond: Successfully programmed 9 bytes @ 0x3f0b24
|
| ELOG: Event(9A) added with size 9
|
| SF: Winbond: Successfully programmed 9 bytes @ 0x3f0b2d
|
| ELOG: Event(9E) added with size 10
|
| SF: Winbond: Successfully programmed 10 bytes @ 0x3f0b36
|
| Installing SMM handler to 0xad000000
|
| Installing IED header to 0xad400000
|
| Initializing SMM handler... ... pmbase = 0x0500
|
|
|
| SMI_STS: PM1
|
| PM1_STS: WAK
|
| GPE0_STS:
|
| ALT_GP_SMI_STS:
|
| TCO_STS:
|
| ... raise SMI#
|
| Initializing CPU #0
|
| CPU: vendor Intel device 206a7
|
| CPU: family 06, model 2a, stepping 07
|
| Enabling cache
|
| CBFS: Looking for 'microcode_blob.bin'
|
| CBFS: found.
|
| microcode: sig=0x206a7 pf=0x10 revision=0x28
|
| microcode: updated to revision 0x28 date=2012-04-24
|
| CPU: Intel(R) Celeron(R) CPU 847 @ 1.10GHz.
|
|
|
| Setting fixed MTRRs(0-88) Type: UC
|
| Setting fixed MTRRs(0-16) Type: WB
|
| DONE fixed MTRRs
|
| call enable_fixed_mtrr()
|
| Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
|
| Setting variable MTRR 1, base: 2048MB, range: 512MB, type WB
|
| Setting variable MTRR 2, base: 2560MB, range: 256MB, type WB
|
| Adding hole at 2768MB-2816MB
|
| Setting variable MTRR 3, base: 2768MB, range: 16MB, type UC
|
| Setting variable MTRR 4, base: 2784MB, range: 32MB, type UC
|
| Zero-sized MTRR range @0KB
|
| Allocate an msr - basek = 00400000, sizek = 0013d800,
|
| Setting variable MTRR 5, base: 4096MB, range: 1024MB, type WB
|
| Setting variable MTRR 6, base: 5120MB, range: 256MB, type WB
|
| Adding hole at 5366MB-5376MB
|
| Setting variable MTRR 7, base: 5366MB, range: 2MB, type UC
|
| Running out of variable MTRRs!
|
| Zero-sized MTRR range @0KB
|
| DONE variable MTRRs
|
| Clear out the extra MTRR's
|
| call enable_var_mtrr()
|
| Leave x86_setup_var_mtrrs
|
|
|
| MTRR check
|
| Fixed MTRRs : Enabled
|
| Variable MTRRs: Enabled
|
|
|
| Setting up local apic... apic_id: 0x00 done.
|
| model_x06ax: energy policy set to 6
|
| model_x06ax: frequency set to 1100
|
| Turbo is unavailable
|
| CPU: 0 has 2 cores 1 threads
|
| CPU: 0 has core 2
|
| CPU1: stack_base 00180000, stack_end 00187ff8
|
| Asserting INIT.
|
| Waiting for send to finish...
|
| +Deasserting INIT.
|
| Waiting for send to finish...
|
| +#startup loops: 2.
|
| Sending STARTUP #1 to 2.
|
| After apic_write.
|
| Initializing CPU #1
|
| Startup point 1.
|
| Waiting for send to finish...
|
| +CPU: vendor Intel device 206a7
|
| Sending STARTUP #2 to 2.
|
| After apic_write.
|
| CPU: family 06, model 2a, stepping 07
|
| Startup point 1.
|
| Waiting for send to finish...
|
| +Enabling cache
|
| After Startup.
|
| CPU #0 initialized
|
| Waiting for 1 CPUS to stop
|
| CBFS: Looking for 'microcode_blob.bin'
|
| CBFS: found.
|
| microcode: sig=0x206a7 pf=0x10 revision=0x0
|
| microcode: updated to revision 0x28 date=2012-04-24
|
| CPU: Intel(R) Celeron(R) CPU 847 @ 1.10GHz.
|
|
|
| Setting fixed MTRRs(0-88) Type: UC
|
| Setting fixed MTRRs(0-16) Type: WB
|
| DONE fixed MTRRs
|
| call enable_fixed_mtrr()
|
| Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
|
| Setting variable MTRR 1, base: 2048MB, range: 512MB, type WB
|
| Setting variable MTRR 2, base: 2560MB, range: 256MB, type WB
|
| Adding hole at 2768MB-2816MB
|
| Setting variable MTRR 3, base: 2768MB, range: 16MB, type UC
|
| Setting variable MTRR 4, base: 2784MB, range: 32MB, type UC
|
| Zero-sized MTRR range @0KB
|
| Allocate an msr - basek = 00400000, sizek = 0013d800,
|
| Setting variable MTRR 5, base: 4096MB, range: 1024MB, type WB
|
| Setting variable MTRR 6, base: 5120MB, range: 256MB, type WB
|
| Adding hole at 5366MB-5376MB
|
| Setting variable MTRR 7, base: 5366MB, range: 2MB, type UC
|
| Running out of variable MTRRs!
|
| Zero-sized MTRR range @0KB
|
| DONE variable MTRRs
|
| Clear out the extra MTRR's
|
| call enable_var_mtrr()
|
| Leave x86_setup_var_mtrrs
|
|
|
| MTRR check
|
| Fixed MTRRs : Enabled
|
| Variable MTRRs: Enabled
|
|
|
| Setting up local apic... apic_id: 0x02 done.
|
| model_x06ax: energy policy set to 6
|
| model_x06ax: frequency set to 1100
|
| CPU #1 initialized
|
| All AP CPUs stopped (3254 loops)
|
| CPU1: stack allocated from 00180000 to 00187ff4:lowest stack address was 00187c8c
|
| PCI: 00:00.0 init
|
| Set BIOS_RESET_CPL
|
| CPU TDP: 17 Watts
|
| PCI: 00:02.0 init
|
| GT Power Management Init
|
| SNB GT1 Power Meter Weights
|
| DEV MODE GPIO 17: 0
|
| REC MODE GPIO 68: 0
|
| CBFS: Looking for 'pci8086,0106.rom'
|
| CBFS: found.
|
| In CBFS, ROM address for PCI: 00:02.0 = fff0fd78
|
| PCI expansion ROM, signature 0xaa55, INIT size 0x10000, data ptr 0x0040
|
| PCI ROM image, vendor ID 8086, device ID 0106,
|
| PCI ROM image, Class Code 030000, Code Type 00
|
| Copying VGA ROM Image from fff0fd78 to 0xc0000, 0x10000 bytes
|
| Real mode stub @00000600: 867 bytes
|
| Calling Option ROM...
|
| int15_handler: INT15 function 5f34!
|
| ... Option ROM returned.
|
| Getting information about VESA mode 4117
|
| framebuffer: d0000000
|
| Setting VESA mode 4117
|
| int15_handler: INT15 function 5f70!
|
| VGA Option ROM has been loaded
|
| GT Power Management Init (post VBIOS)
|
| PCI: 00:16.0 init
|
| ME: FW Partition Table : OK
|
| ME: Bringup Loader Failure : NO
|
| ME: Firmware Init Complete : NO
|
| ME: Manufacturing Mode : NO
|
| ME: Boot Options Present : NO
|
| ME: Update In Progress : NO
|
| ME: Current Working State : Normal
|
| ME: Current Operation State : Bring up
|
| ME: Current Operation Mode : Security Override via Jumper
|
| ME: Error Code : No Error
|
| ME: Progress Phase : BUP Phase
|
| ME: Power Management Event : Clean Moff->Mx wake
|
| ME: Progress Phase State : 0x52
|
| ELOG: Event(A2) added with size 10
|
| SF: Winbond: Successfully programmed 10 bytes @ 0x3f0b40
|
| ELOG: Event(A4) added with size 16
|
| SF: Winbond: Successfully programmed 16 bytes @ 0x3f0b4a
|
| ME: BIOS path: Disable
|
| PCI: 00:1a.0 init
|
| EHCI: Setting up controller.. done.
|
| PCI: 00:1b.0 init
|
| Azalia: base = e0700000
|
| Azalia: codec_mask = 09
|
| Azalia: Initializing codec #3
|
| Azalia: codec viddid: 80862806
|
| Azalia: verb_size: 16
|
| Azalia: verb loaded.
|
| Azalia: Initializing codec #0
|
| Azalia: codec viddid: 10ec0269
|
| Azalia: verb_size: 56
|
| Azalia: verb loaded.
|
| PCI: 00:1c.0 init
|
| Initializing PCH PCIe bridge.
|
| PCI: 00:1c.1 init
|
| Initializing PCH PCIe bridge.
|
| PCI: 00:1d.0 init
|
| EHCI: Setting up controller.. done.
|
| PCI: 00:1f.0 init
|
| pch: lpc_init
|
| Southbridge APIC ID = 2
|
| Dumping IOAPIC registers
|
| reg 0x0000: 0x02000000
|
| reg 0x0001: 0x00170020
|
| reg 0x0002: 0x00170020
|
| Set power off after power failure.
|
| NMI sources disabled.
|
| PantherPoint PM init
|
| rtc_failed = 0x0
|
| RTC Init
|
| i8259_configure_irq_trigger: current interrupts are 0x0
|
| i8259_configure_irq_trigger: try to set interrupts 0x200
|
| Enabling BIOS updates outside of SMM... Disabling ACPI via APMC:
|
| done.
|
| Locking SMM.
|
| PCI: 00:1f.2 init
|
| SATA: Initializing...
|
| SATA: Controller in AHCI mode.
|
| ABAR: E0705000
|
| PCI: 00:1f.3 init
|
| PCI: 00:1f.6 init
|
| PCI: 01:00.0 init
|
| PCI: 02:00.0 init
|
| PCI: 02:00.1 init
|
| PNP: 00ff.0 init
|
| Compal ENE932: Initializing keyboard.
|
| Keyboard init...
|
| Devices initialized
|
| Show all devs...After init.
|
| Root Device: enabled 1
|
| APIC_CLUSTER: 0: enabled 1
|
| APIC: 00: enabled 1
|
| APIC: acac: enabled 0
|
| PCI_DOMAIN: 0000: enabled 1
|
| PCI: 00:00.0: enabled 1
|
| PCI: 00:02.0: enabled 1
|
| PCI: 00:16.0: enabled 1
|
| PCI: 00:16.1: enabled 0
|
| PCI: 00:16.2: enabled 0
|
| PCI: 00:16.3: enabled 0
|
| PCI: 00:19.0: enabled 0
|
| PCI: 00:1a.0: enabled 1
|
| PCI: 00:1b.0: enabled 1
|
| PCI: 00:1c.2: enabled 0
|
| PCI: 00:1c.0: enabled 1
|
| PCI: 00:1c.1: enabled 1
|
| PCI: 00:1c.3: enabled 0
|
| PCI: 00:1c.4: enabled 0
|
| PCI: 00:1c.5: enabled 0
|
| PCI: 00:1c.6: enabled 0
|
| PCI: 00:1c.7: enabled 0
|
| PCI: 00:1d.0: enabled 1
|
| PCI: 00:1e.0: enabled 0
|
| PCI: 00:1f.0: enabled 1
|
| PNP: 00ff.1: enabled 1
|
| PCI: 00:1f.2: enabled 1
|
| PCI: 00:1f.3: enabled 1
|
| PCI: 00:1f.5: enabled 0
|
| PCI: 00:1f.6: enabled 1
|
| PCI: 01:00.0: enabled 1
|
| PCI: 02:00.0: enabled 1
|
| PCI: 02:00.1: enabled 1
|
| PNP: 00ff.0: enabled 1
|
| APIC: 02: enabled 1
|
| Re-Initializing CBMEM area to 0xacec0000
|
| Adding CBMEM entry as no. 4
|
| Moving GDT to aced1000...ok
|
| Updating MRC cache data.
|
| FMAP: area RW_MRC_CACHE found
|
| FMAP: offset: 3e0000
|
| FMAP: size: 65536 bytes
|
| FMAP: No valid base address, using 0xff800000
|
| picked entry 15 from cache block
|
| SF: Detected W25Q64 with page size 1000, total 800000
|
| FMAP: area RW_MRC_CACHE found
|
| FMAP: offset: 3e0000
|
| FMAP: size: 65536 bytes
|
| FMAP: No valid base address, using 0xff800000
|
| picked entry 16 from cache block when looking for empty block
|
| We need to erase the MRC cache region
|
| SF: Successfully erased 0 bytes @ 0x0
|
| FMAP: area RW_MRC_CACHE found
|
| FMAP: offset: 3e0000
|
| FMAP: size: 65536 bytes
|
| FMAP: No valid base address, using 0xff800000
|
| Finally: write MRC cache update to flash
|
| SF: Winbond: Successfully programmed 3008 bytes @ 0x3e0000
|
| High Tables Base is acec0000.
|
| Adding CBMEM entry as no. 5
|
| ACPI: Writing ACPI tables at aced1200.
|
| ACPI: * FACS
|
| ACPI: * DSDT
|
| ACPI: * FADT
|
| ACPI: added table 1/32, length now 40
|
| ACPI: * HPET
|
| ACPI: added table 2/32, length now 44
|
| ACPI: * MADT
|
| ACPI: added table 3/32, length now 48
|
| ACPI: * MCFG
|
| ACPI: added table 4/32, length now 52
|
| ACPI: Patching up global NVS in DSDT at offset 0x01ab -> 0xaced4710
|
| Adding CBMEM entry as no. 6
|
| DEV MODE GPIO 17: 0
|
| REC MODE GPIO 68: 0
|
| ELOG: Event(A0) added with size 9
|
| SF: Winbond: Successfully programmed 9 bytes @ 0x3f0b5a
|
| REC MODE GPIO 68: 0
|
| ACPI: * DSDT @ aced1450 Length 30e0
|
| ACPI: * SSDT
|
| Found 1 CPU(s) with 2 core(s) each.
|
| PSS: 1100MHz power 17000 control 0xb00 status 0xb00
|
| PSS: 800MHz power 11938 control 0x800 status 0x800
|
| PSS: 1100MHz power 17000 control 0xb00 status 0xb00
|
| PSS: 800MHz power 11938 control 0x800 status 0x800
|
| ACPI: added table 5/32, length now 56
|
| current = aced5de0
|
| ACPI: done.
|
| ACPI tables: 19424 bytes.
|
| Adding CBMEM entry as no. 7
|
| smbios_write_tables: acedc800
|
| Root Device (Google Parrot ChromeBook)
|
| APIC_CLUSTER: 0 (Intel i7 (SandyBridge/IvyBridge) integrated Northbridge)
|
| APIC: 00 (Socket rPGA989 CPU)
|
| APIC: acac (Intel SandyBridge/IvyBridge CPU)
|
| PCI_DOMAIN: 0000 (Intel i7 (SandyBridge/IvyBridge) integrated Northbridge)
|
| PCI: 00:00.0 (Intel i7 (SandyBridge/IvyBridge) integrated Northbridge)
|
| PCI: 00:02.0 (Intel i7 (SandyBridge/IvyBridge) integrated Northbridge)
|
| PCI: 00:16.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
| PCI: 00:16.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
| PCI: 00:16.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
| PCI: 00:16.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
| PCI: 00:19.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
| PCI: 00:1a.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
| PCI: 00:1b.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
| PCI: 00:1c.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
| PCI: 00:1c.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
| PCI: 00:1c.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
| PCI: 00:1c.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
| PCI: 00:1c.4 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
| PCI: 00:1c.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
| PCI: 00:1c.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
| PCI: 00:1c.7 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
| PCI: 00:1d.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
| PCI: 00:1e.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
| PCI: 00:1f.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
| PNP: 00ff.1 (COMPAL ENE932 EC)
|
| PCI: 00:1f.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
| PCI: 00:1f.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
| PCI: 00:1f.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
| PCI: 00:1f.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
| PCI: 01:00.0 ()
|
| PCI: 02:00.0 ()
|
| PCI: 02:00.1 ()
|
| PNP: 00ff.0 ()
|
| APIC: 02 ()
|
| SMBIOS tables: 398 bytes.
|
| Adding CBMEM entry as no. 8
|
| Writing high table forward entry at 0x00000500
|
| Wrote coreboot table at: 00000500, 0x10 bytes, checksum 82f0
|
| New low_table_end: 0x00000528
|
| Now going to write high coreboot table at 0xacedd000
|
| rom_table_end = 0xacedd000
|
| Adjust low_table_end from 0x00000528 to 0x00001000
|
| Adjust rom_table_end from 0xacedd000 to 0xacee0000
|
| Adding high table area
|
| coreboot memory table:
|
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
|
| 1. 0000000000001000-000000000009ffff: RAM
|
| 2. 00000000000a0000-00000000000fffff: RESERVED
|
| 3. 0000000000100000-0000000000efffff: RAM
|
| 4. 0000000000f00000-0000000000ffffff: RESERVED
|
| 5. 0000000001000000-000000001fffffff: RAM
|
| 6. 0000000020000000-00000000201fffff: RESERVED
|
| 7. 0000000020200000-000000003fffffff: RAM
|
| 8. 0000000040000000-00000000401fffff: RESERVED
|
| 9. 0000000040200000-00000000acebffff: RAM
|
| 10. 00000000acec0000-00000000acffffff: CONFIGURATION TABLES
|
| 11. 00000000ad000000-00000000af9fffff: RESERVED
|
| 12. 00000000f0000000-00000000f3ffffff: RESERVED
|
| 13. 0000000100000000-000000014f5fffff: RAM
|
| REC MODE GPIO 68: 0
|
| DEV MODE GPIO 17: 0
|
| Wrote coreboot table at: acedd000, 0x3bc bytes, checksum 279a
|
| coreboot table: 980 bytes.
|
| Adding CBMEM entry as no. 9
|
| 0. FREE SPACE acfe5000 0001b000
|
| 1. MRC DATA acec0200 00000c00
|
| 2. TIME STAMP acec0e00 00000200
|
| 3. CONSOLE acec1000 00010000
|
| 4. GDT aced1000 00000200
|
| 5. ACPI aced1200 0000b400
|
| 6. 474e5653 acedc600 00000200
|
| 7. SMBIOS acedc800 00000800
|
| 8. COREBOOT acedd000 00008000
|
| 9. ACPI RESUMEacee5000 00100000
|
| CBFS: Looking for 'fallback/payload'
|
| CBFS: found.
|
| Got a payload
|
| CPU0: stack from 00188000 to 00190000:Lowest stack address 0018fafc
|
| Loading segment from rom address 0xfff3b238
|
| code (compression=1)
|
| New segment dstaddr 0x1110000 memsize 0x55c10 srcaddr 0xfff3b28c filesize 0x1c3b6
|
| (cleaned up) New segment addr 0x1110000 size 0x55c10 offset 0xfff3b28c filesize 0x1c3b6
|
| Loading segment from rom address 0xfff3b254
|
| data (compression=1)
|
| New segment dstaddr 0x1165c10 memsize 0x8740 srcaddr 0xfff57642 filesize 0x10c1
|
| (cleaned up) New segment addr 0x1165c10 size 0x8740 offset 0xfff57642 filesize 0x10c1
|
| Loading segment from rom address 0xfff3b270
|
| Entry Point 0x00000000
|
| Loading Segment: addr: 0x0000000001110000 memsz: 0x0000000000055c10 filesz: 0x000000000001c3b6
|
| lb: [0x0000000000100000, 0x0000000000194000)
|
| Post relocation: addr: 0x0000000001110000 memsz: 0x0000000000055c10 filesz: 0x000000000001c3b6
|
| using LZMA
|
| [ 0x01110000, 01150198, 0x01165c10) <- fff3b28c
|
| Clearing Segment: addr: 0x0000000001150198 memsz: 0x0000000000015a78
|
| dest 01110000, end 01165c10, bouncebuffer acd98000
|
| Loading Segment: addr: 0x0000000001165c10 memsz: 0x0000000000008740 filesz: 0x00000000000010c1
|
| lb: [0x0000000000100000, 0x0000000000194000)
|
| Post relocation: addr: 0x0000000001165c10 memsz: 0x0000000000008740 filesz: 0x00000000000010c1
|
| using LZMA
|
| [ 0x01165c10, 0116e350, 0x0116e350) <- fff57642
|
| dest 01165c10, end 0116e350, bouncebuffer acd98000
|
| Loaded segments
|
| PCH watchdog disabled
|
| Jumping to boot code at 1110008
|
| entry = 0x01110008
|
| lb_start = 0x00100000
|
| lb_size = 0x00094000
|
| adjust = 0xacd2c000
|
| buffer = 0xacd98000
|
| elf_boot_notes = 0x0013e4b0
|
| adjusted_boot_notes = 0xace6a4b0
|
| SCSI: Target spinup took 2331 ms. |
| Target spinup took 0 ms. |
| AHCI 0001.0300 32 slots 4 ports 6 Gbps 0x1 impl SATA mode |
| flags: 64bit ncq ilck stag pm led clo pio slum part apst |
| scanning bus for devices... |
| Device 0: (0:0) Vendor: ATA Prod.: ST320LT020-9YG14 Rev: 0010 |
| Type: Hard Disk |
| Capacity: 305245.3 MB = 298.0 GB (625142448 x 512) |
| Found 1 device(s). |
| intel_ich6_gpio.c: gpio_init: Found 8086:1e5f |
| vboot_flag_debug.c: vboot_flag_dump: vboot-flag-write-protect: port= 70, active_high=0, value=0 |
| vboot_flag_debug.c: vboot_flag_dump: vboot-flag-recovery : port= -1, active_high=1, value=0 |
| vboot_flag_debug.c: vboot_flag_dump: vboot-flag-developer : port= -1, active_high=1, value=0 |
| vboot_flag_debug.c: vboot_flag_dump: vboot-flag-oprom-loaded : port= -1, active_high=1, value=1 |
| cmd_vboot_twostop.c: twostop_init: FDT says oprom-matters |
| cros_fdtdec.c: process_fmap_node: Node 'rw-a': bad block-offset |
| cros_fdtdec.c: process_fmap_node: Node 'rw-b': bad block-offset |
| fmap.c: dump_fmap_entry: fmap 00610000:00000800 |
| fmap.c: dump_fmap_entry: gbb 00611000:000ef000 |
| fmap.c: dump_fmap_entry: firmware_id 00610800:00000040 |
| fmap.c: dump_fmap_firmware_entry: rw-a |
| fmap.c: dump_fmap_entry: all 00200000:000f0000 |
| fmap.c: dump_fmap_entry: boot 00210000:000dffc0 |
| fmap.c: dump_fmap_entry: vblock 00200000:00010000 |
| fmap.c: dump_fmap_entry: firmware_id 002effc0:00000040 |
| fmap.c: dump_fmap_firmware_entry: block_offset ffffffffffffffff |
| fmap.c: dump_fmap_firmware_entry: rw-b |
| fmap.c: dump_fmap_entry: all 002f0000:000f0000 |
| fmap.c: dump_fmap_entry: boot 00300000:000dffc0 |
| fmap.c: dump_fmap_entry: vblock 002f0000:00010000 |
| fmap.c: dump_fmap_entry: firmware_id 003dffc0:00000040 |
| fmap.c: dump_fmap_firmware_entry: block_offset ffffffffffffffff |
| SF: Detected W25Q64 with page size 4 KiB, total 8 MiB |
| cmd_vboot_twostop.c: twostop_init: read-only firmware id: "Google_Parrot.2685.54.0" |
| cmd_vboot_twostop.c: twostop_init: hardware id: "PARROT WHISTLER A-D 3036" |
| crossystem_data.c: crossystem_data_init: crossystem data at 01100000 |
| cmd_vboot_twostop.c: twostop_init_cparams: cparams: |
| cmd_vboot_twostop.c: twostop_init_cparams: - gbb_data : ffe11000 |
| cmd_vboot_twostop.c: twostop_init_cparams: - gbb_size : 000ef000 |
| cmd_vboot_twostop.c: twostop_init_cparams: - shared_data_blob : aced499a |
| cmd_vboot_twostop.c: twostop_init_cparams: - shared_data_size : 00000c00 |
| cmd_vboot_twostop.c: check_ro_normal_support: twostop-optional |
| cmd_vboot_twostop.c: twostop_init_vboot_library: iparams.flags: 000001e0 |
| Found TPM NPCT420AA V2 by Nuvoton |
| cmd_vboot_twostop.c: twostop_init_vboot_library: iparams.out_flags: 000000ce |
| cmd_vboot_twostop.c: twostop_init_vboot_library: cdata->boot_developer_switch=1 |
| memory_wipe.c: memory_wipe_execute: Wipe memory regions: |
| memory_wipe.c: memory_wipe_execute: [0x00000000001000, 0x000000000a0000) |
| memory_wipe.c: memory_wipe_execute: [0x00000000100000, 0x00000000f00000) |
| memory_wipe.c: memory_wipe_execute: [0x00000001000000, 0x00000001100000) |
| memory_wipe.c: memory_wipe_execute: [0x00000001104400, 0x00000020000000) |
| memory_wipe.c: memory_wipe_execute: [0x00000020200000, 0x00000040000000) |
| memory_wipe.c: memory_wipe_execute: [0x00000040200000, 0x000000aca49968) |
| memory_wipe.c: memory_wipe_execute: [0x000000acebfc10, 0x000000acec0000) |
| memory_wipe.c: memory_wipe_execute: [0x00000100000000, 0x0000014f600000) |
| cmd_vboot_twostop.c: twostop_make_selection: selected_firmware: 3 |
| cmd_vboot_twostop.c: twostop_select_and_set_main_firmware: selection: TWOSTOP_SELECT_FIRMWARE_READONLY |
| cmd_vboot_twostop.c: twostop_select_and_set_main_firmware: active main firmware type : 2 |
| cmd_vboot_twostop.c: twostop_select_and_set_main_firmware: active main firmware id : "Google_Parrot.2685.54.0" |
| cmd_vboot_twostop.c: twostop_boot: selection of bootstub: TWOSTOP_SELECT_FIRMWARE_READONLY |
| cmd_vboot_twostop.c: twostop_boot: boot_mode: 2 |
| cmd_vboot_twostop.c: twostop_init_cparams: cparams: |
| cmd_vboot_twostop.c: twostop_init_cparams: - gbb_data : ffe11000 |
| cmd_vboot_twostop.c: twostop_init_cparams: - gbb_size : 000ef000 |
| cmd_vboot_twostop.c: twostop_init_cparams: - shared_data_blob : aced499a |
| cmd_vboot_twostop.c: twostop_init_cparams: - shared_data_size : 00000c00 |
| cros_fdtdec.c: cros_fdtdec_alloc_region: failed to find kernel in /chromeos-config' |
| cmd_vboot_twostop.c: twostop_main_firmware: kparams: |
| cmd_vboot_twostop.c: twostop_main_firmware: - kernel_buffer: : (null) |
| cmd_vboot_twostop.c: twostop_main_firmware: - kernel_buffer_size: : 00000000 |
| boot_device.c: VbExDiskGetInfo: usb - start() returned 0 |
| cmd_vboot_twostop.c: twostop_main_firmware: kparams: |
| cmd_vboot_twostop.c: twostop_main_firmware: - kernel_buffer: : 00100000 |
| cmd_vboot_twostop.c: twostop_main_firmware: - kernel_buffer_size: : 00366000 |
| cmd_vboot_twostop.c: twostop_main_firmware: - disk_handle: : aceb2708 |
| cmd_vboot_twostop.c: twostop_main_firmware: - partition_number: : 00000006 |
| cmd_vboot_twostop.c: twostop_main_firmware: - bootloader_address: : 00462000 |
| cmd_vboot_twostop.c: twostop_main_firmware: - bootloader_size: : 00004000 |
| cmd_vboot_twostop.c: twostop_main_firmware: - partition_guid: : 37 1e 01 4a 89 b8 4e 1a 86 ab 3c c6 21 58 c7 c3 |
| crossystem_data.c: crossystem_data_dump: total_size : 00004400 |
| crossystem_data.c: crossystem_data_dump: signature : "CHROMEOS" |
| crossystem_data.c: crossystem_data_dump: version : 1 |
| crossystem_data.c: crossystem_data_dump: boot_write_protect_switch : 0 |
| crossystem_data.c: crossystem_data_dump: boot_recovery_switch : 0 |
| crossystem_data.c: crossystem_data_dump: boot_developer_switch : 1 |
| crossystem_data.c: crossystem_data_dump: boot_oprom_loaded : 1 |
| crossystem_data.c: crossystem_data_dump: polarity_write_protect_switch : 0 |
| crossystem_data.c: crossystem_data_dump: polarity_recovery_switch : 1 |
| crossystem_data.c: crossystem_data_dump: polarity_developer_switch : 1 |
| crossystem_data.c: crossystem_data_dump: polarity_oprom_loaded : 1 |
| crossystem_data.c: crossystem_data_dump: gpio_port_write_protect_switch: 70 |
| crossystem_data.c: crossystem_data_dump: gpio_port_recovery_switch : -1 |
| crossystem_data.c: crossystem_data_dump: gpio_port_developer_switch : -1 |
| crossystem_data.c: crossystem_data_dump: gpio_port_oprom_loaded : -1 |
| crossystem_data.c: crossystem_data_dump: fmap_offset : 00610000 |
| crossystem_data.c: crossystem_data_dump: active_ec_firmware : 0 |
| crossystem_data.c: crossystem_data_dump: firmware_type : 2 |
| crossystem_data.c: crossystem_data_dump: oprom_matters : 1 |
| crossystem_data.c: crossystem_data_dump: hardware_id : "PARROT WHISTLER A-D 3036" |
| crossystem_data.c: crossystem_data_dump: readonly_firmware_id : "Google_Parrot.2685.54.0" |
| crossystem_data.c: crossystem_data_dump: firmware_id : "Google_Parrot.2685.54.0" |
| boot_kernel.c: boot_kernel: cmdline before update: cros_secure console=tty1 debug verbose root=/dev/sda7 rootwait rw lsm.module_locking=0 |
| boot_kernel.c: boot_kernel: cmdline after update: cros_secure console=tty1 debug verbose root=/dev/sda7 rootwait rw lsm.module_locking=0 |
| Magic signature found |
| Kernel command line: "cros_secure console=tty1 debug verbose root=/dev/sda7 rootwait rw lsm.module_locking=0 " |
| Finalizing Coreboot |
| |
| Starting kernel ... |
| |
| |