| |
| |
| coreboot-4.5-933-g23b9a2b1a4 Fri Feb 3 17:20:17 UTC 2017 romstage starting... |
| Setting up static southbridge registers... done. |
| Disabling Watchdog reboot... done. |
| Setting up static northbridge registers... done. |
| Initializing Graphics... |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19d00 size 80c |
| Back from sandybridge_early_initialization() |
| SMBus controller enabled. |
| CPU id(206a7): Intel(R) Core(TM) i5-2520M CPU @ 2.50GHz |
| AES supported, TXT supported, VT supported |
| PCH type: QM67, device id: 1c4f, rev id 5 |
| Intel ME early init |
| Intel ME firmware is ready |
| ME: Requested 32MB UMA |
| Starting native Platform init |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| CBFS: Locating 'mrc.cache' |
| CBFS: Found @ offset 1fec0 size 10000 |
| find_current_mrc_cache_local: No valid MRC cache found. |
| Row addr bits : 16 |
| Column addr bits : 10 |
| Number of ranks : 1 |
| DIMM Capacity : 4096 MB |
| CAS latencies : 5 6 7 8 9 10 11 13 |
| tCKmin : 1.070 ns |
| tAAmin : 13.125 ns |
| tWRmin : 15.000 ns |
| tRCDmin : 13.125 ns |
| tRRDmin : 5.000 ns |
| tRPmin : 13.125 ns |
| tRASmin : 34.000 ns |
| tRCmin : 47.125 ns |
| tRFCmin : 260.000 ns |
| tWTRmin : 7.500 ns |
| tRTPmin : 7.500 ns |
| tFAWmin : 25.000 ns |
| channel[0] rankmap = 0x1 |
| Row addr bits : 16 |
| Column addr bits : 10 |
| Number of ranks : 1 |
| DIMM Capacity : 4096 MB |
| CAS latencies : 5 6 7 8 9 10 11 13 |
| tCKmin : 1.070 ns |
| tAAmin : 13.125 ns |
| tWRmin : 15.000 ns |
| tRCDmin : 13.125 ns |
| tRRDmin : 5.000 ns |
| tRPmin : 13.125 ns |
| tRASmin : 34.000 ns |
| tRCmin : 47.125 ns |
| tRFCmin : 260.000 ns |
| tWTRmin : 7.500 ns |
| tRTPmin : 7.500 ns |
| tFAWmin : 25.000 ns |
| channel[1] rankmap = 0x1 |
| Starting RAM training (0). |
| PLL busy... done in 10 us |
| MCU frequency is set at : 934 MHz |
| Selected DRAM frequency: 934 MHz |
| Minimum CAS latency : 13T |
| Selected CAS latency : 13T |
| Selected CWL latency : 9T |
| Selected tRCD : 13T |
| Selected tRP : 13T |
| Selected tRAS : 32T |
| Selected tWR : 15T |
| Selected tFAW : 24T |
| Selected tRRD : 5T |
| Selected tRTP : 8T |
| Selected tWTR : 8T |
| Selected tRFC : 243T |
| Done dimm mapping |
| Update PCI-E configuration space: |
| PCI(0, 0, 0)[a0] = 0 |
| PCI(0, 0, 0)[a4] = 2 |
| PCI(0, 0, 0)[bc] = c2a00000 |
| PCI(0, 0, 0)[a8] = 3b600000 |
| PCI(0, 0, 0)[ac] = 2 |
| PCI(0, 0, 0)[b8] = c0000000 |
| PCI(0, 0, 0)[b0] = c0a00000 |
| PCI(0, 0, 0)[b4] = c0800000 |
| PCI(0, 0, 0)[7c] = 7f |
| PCI(0, 0, 0)[70] = fe000000 |
| PCI(0, 0, 0)[74] = 1 |
| PCI(0, 0, 0)[78] = fe000c00 |
| Done memory map |
| Done io registers |
| Done jedec reset |
| Done MRS commands |
| t123: 1663, 9120, 500 |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware |
| |
| *** Log truncated, 2334 characters dropped. *** |
| |
| Relocate MRC DATA from fefff9fc to bffdc000 (1440 bytes) |
| CBMEM entry for DIMM info: 0xbfffe960 |
| TPM initialization. |
| TPM: Init |
| Found TPM ST33ZP24 by ST Microelectronics |
| TPM: Open |
| TPM: Startup |
| TPM: command 0x99 returned 0x0 |
| TPM: OK. |
| MTRR Range: Start=ff800000 End=0 (Size 800000) |
| MTRR Range: Start=0 End=1000000 (Size 1000000) |
| MTRR Range: Start=bf800000 End=c0000000 (Size 800000) |
| MTRR Range: Start=c0000000 End=c0800000 (Size 800000) |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| CBFS: Locating 'fallback/ramstage' |
| CBFS: Found @ offset 2ff00 size 168ed |
| Decompressing stage fallback/ramstage @ 0xbff94fc0 (269008 bytes) |
| Loading module at bff95000 with entry bff95000. filesize: 0x30398 memsize: 0x41a90 |
| Processing 3071 relocs. Offset value of 0xbfe95000 |
| |
| |
| coreboot-4.5-933-g23b9a2b1a4 Fri Feb 3 17:20:17 UTC 2017 ramstage starting... |
| Normal boot. |
| BS: BS_PRE_DEVICE times (us): entry 0 run 2 exit 0 |
| BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 3 exit 0 |
| Enumerating buses... |
| Show all devs... Before device enumeration. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:16.0: enabled 0 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 1 |
| PCI: 00:1c.4: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 1 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 00ff.1: enabled 1 |
| PNP: 0c31.0: enabled 1 |
| PNP: 00ff.2: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| I2C: 00:54: enabled 1 |
| I2C: 00:55: enabled 1 |
| I2C: 00:56: enabled 1 |
| I2C: 00:57: enabled 1 |
| I2C: 00:5c: enabled 1 |
| I2C: 00:5d: enabled 1 |
| I2C: 00:5e: enabled 1 |
| I2C: 00:5f: enabled 1 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 1 |
| Compare with tree... |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:16.0: enabled 0 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 1 |
| PCI: 00:1c.4: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 1 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 00ff.1: enabled 1 |
| PNP: 0c31.0: enabled 1 |
| PNP: 00ff.2: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| I2C: 00:54: enabled 1 |
| I2C: 00:55: enabled 1 |
| I2C: 00:56: enabled 1 |
| I2C: 00:57: enabled 1 |
| I2C: 00:5c: enabled 1 |
| I2C: 00:5d: enabled 1 |
| I2C: 00:5e: enabled 1 |
| I2C: 00:5f: enabled 1 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 1 |
| Root Device scanning... |
| root_dev_scan_bus for Root Device |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| DOMAIN: 0000 scanning... |
| PCI: pci_scan_bus for bus 00 |
| PCI: 00:00.0 [8086/0104] ops |
| PCI: 00:00.0 [8086/0104] enabled |
| Capability: type 0x0d @ 0x88 |
| Capability: type 0x01 @ 0x80 |
| Capability: type 0x05 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| Capability: type 0x0d @ 0x88 |
| Capability: type 0x01 @ 0x80 |
| Capability: type 0x05 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| PCI: 00:01.0 subordinate bus PCI Express |
| PCI: 00:01.0 [8086/0101] disabled |
| PCI: 00:02.0 [8086/0000] ops |
| PCI: 00:02.0 [8086/0126] enabled |
| PCI: 00:04.0 [8086/0103] enabled |
| PCI: 00:16.0: Disabling device |
| PCI: 00:16.0 [8086/1c3a] ops |
| PCI: 00:16.0 [8086/1c3a] disabled |
| PCI: 00:16.1: Disabling device |
| PCI: 00:16.2: Disabling device |
| PCI: 00:16.3: Disabling device |
| PCI: 00:19.0 [8086/1502] enabled |
| PCI: 00:1a.0 [8086/0000] ops |
| PCI: 00:1a.0 [8086/1c2d] enabled |
| PCI: 00:1b.0 [8086/0000] ops |
| PCI: 00:1b.0 [8086/1c20] enabled |
| PCH: PCIe Root Port coalescing is enabled |
| PCI: 00:1c.0 [8086/0000] bus ops |
| PCI: 00:1c.0 [8086/1c10] enabled |
| PCI: 00:1c.1 [8086/0000] bus ops |
| PCI: 00:1c.1 [8086/1c12] enabled |
| PCI: Static device PCI: 00:1c.2 not found, disabling it. |
| PCI: 00:1c.3 [8086/0000] bus ops |
| PCI: 00:1c.3 [8086/1c16] enabled |
| PCI: 00:1c.4 [8086/0000] bus ops |
| PCI: 00:1c.4 [8086/1c18] enabled |
| PCI: 00:1c.5: Disabling device |
| PCH: Remap PCIe function 6 to 5 |
| PCI: 00:1c.6 [8086/0000] bus ops |
| PCI: 00:1c.6 [8086/1c1c] enabled |
| PCI: 00:1c.7: Disabling device |
| PCH: RPFN 0x76543210 -> 0xf5e43210 |
| PCH: PCIe map 1c.5 -> 1c.6 |
| PCH: PCIe map 1c.6 -> 1c.5 |
| PCI: 00:1d.0 [8086/0000] ops |
| PCI: 00:1d.0 [8086/1c26] enabled |
| PCI: 00:1e.0: Disabling device |
| PCI: 00:1f.0 [8086/0000] bus ops |
| PCI: 00:1f.0 [8086/1c4f] enabled |
| PCI: 00:1f.2 [8086/0000] ops |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19d00 size 80c |
| PCI: 00:1f.2 [8086/1c01] enabled |
| PCI: 00:1f.3 [8086/0000] bus ops |
| PCI: 00:1f.3 [8086/1c22] enabled |
| PCI: 00:1f.5: Disabling device |
| PCI: Static device PCI: 00:1f.6 not found, disabling it. |
| PCI: 00:1c.0 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.0 |
| PCI: pci_scan_bus for bus 01 |
| scan_bus: scanning of bus PCI: 00:1c.0 took 61 usecs |
| PCI: 00:1c.1 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.1 |
| PCI: pci_scan_bus for bus 02 |
| PCI: 02:00.0 [168c/0034] enabled |
| Capability: type 0x01 @ 0x40 |
| Capability: type 0x05 @ 0x50 |
| Capability: type 0x10 @ 0x70 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpointASPM: Enabled L0s and L1 |
| scan_bus: scanning of bus PCI: 00:1c.1 took 217 usecs |
| PCI: 00:1c.3 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.3 |
| PCI: pci_scan_bus for bus 03 |
| scan_bus: scanning of bus PCI: 00:1c.3 took 60 usecs |
| PCI: 00:1c.4 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.4 |
| PCI: pci_scan_bus for bus 04 |
| PCI: 04:00.0 [1180/0000] ops |
| PCI: 04:00.0 [1180/e823] enabled |
| Capability: type 0x05 @ 0x50 |
| Capability: type 0x01 @ 0x78 |
| Capability: type 0x10 @ 0x80 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| scan_bus: scanning of bus PCI: 00:1c.4 took 241 usecs |
| PCI: 00:1c.5 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.5 |
| PCI: pci_scan_bus for bus 05 |
| scan_bus: scanning of bus PCI: 00:1c.5 took 60 usecs |
| PCI: 00:1f.0 scanning... |
| scan_lpc_bus for PCI: 00:1f.0 |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19d00 size 80c |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19d00 size 80c |
| PNP: 00ff.1 enabled |
| PNP: 0c31.0 enabled |
| recv_ec_data: 0x38 |
| recv_ec_data: 0x44 |
| recv_ec_data: 0x48 |
| recv_ec_data: 0x54 |
| recv_ec_data: 0x33 |
| recv_ec_data: 0x34 |
| recv_ec_data: 0x57 |
| recv_ec_data: 0x57 |
| recv_ec_data: 0x14 |
| recv_ec_data: 0x03 |
| recv_ec_data: 0x40 |
| recv_ec_data: 0x12 |
| EC Firmware ID 8DHT34WW-3.20, Version 4.01C |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19d00 size 80c |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19d00 size 80c |
| WARNING: No CMOS option 'low_battery_beep'. |
| recv_ec_data: 0x00 |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19d00 size 80c |
| recv_ec_data: 0x00 |
| recv_ec_data: 0x10 |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19d00 size 80c |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19d00 size 80c |
| recv_ec_data: 0x20 |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19d00 size 80c |
| recv_ec_data: 0x30 |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19d00 size 80c |
| recv_ec_data: 0x00 |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19d00 size 80c |
| recv_ec_data: 0xa6 |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19d00 size 80c |
| recv_ec_data: 0xa6 |
| recv_ec_data: 0x70 |
| PNP: 00ff.2 enabled |
| scan_lpc_bus for PCI: 00:1f.0 done |
| scan_bus: scanning of bus PCI: 00:1f.0 took 5543 usecs |
| PCI: 00:1f.3 scanning... |
| scan_smbus for PCI: 00:1f.3 |
| smbus: PCI: 00:1f.3[0]->I2C: 01:54 enabled |
| smbus: PCI: 00:1f.3[0]->I2C: 01:55 enabled |
| smbus: PCI: 00:1f.3[0]->I2C: 01:56 enabled |
| smbus: PCI: 00:1f.3[0]->I2C: 01:57 enabled |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5c enabled |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5d enabled |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5e enabled |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5f enabled |
| scan_smbus for PCI: 00:1f.3 done |
| scan_bus: scanning of bus PCI: 00:1f.3 took 30 usecs |
| scan_bus: scanning of bus DOMAIN: 0000 took 6713 usecs |
| root_dev_scan_bus for Root Device done |
| scan_bus: scanning of bus Root Device took 6723 usecs |
| done |
| BS: BS_DEV_ENUMERATE times (us): entry 0 run 6875 exit 0 |
| found VGA at PCI: 00:02.0 |
| Setting up VGA for PCI: 00:02.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| Allocating resources... |
| Reading resources... |
| Root Device read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 |
| Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000. |
| PCI: 00:1c.0 read_resources bus 1 link: 0 |
| PCI: 00:1c.0 read_resources bus 1 link: 0 done |
| PCI: 00:1c.1 read_resources bus 2 link: 0 |
| PCI: 00:1c.1 read_resources bus 2 link: 0 done |
| PCI: 00:1c.3 read_resources bus 3 link: 0 |
| PCI: 00:1c.3 read_resources bus 3 link: 0 done |
| PCI: 00:1c.4 read_resources bus 4 link: 0 |
| PCI: 00:1c.4 read_resources bus 4 link: 0 done |
| PCI: 00:1c.5 read_resources bus 5 link: 0 |
| PCI: 00:1c.5 read_resources bus 5 link: 0 done |
| PCI: 00:1f.0 read_resources bus 0 link: 0 |
| PNP: 00ff.1 missing read_resources |
| PNP: 00ff.2 missing read_resources |
| PCI: 00:1f.0 read_resources bus 0 link: 0 done |
| PCI: 00:1f.3 read_resources bus 1 link: 0 |
| PCI: 00:1f.3 read_resources bus 1 link: 0 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 done |
| Root Device read_resources bus 0 link: 0 done |
| Done reading resources. |
| Show resources in subtree (Root Device)...After reading. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: acac |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 |
| PCI: 00:00.0 |
| PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 |
| PCI: 00:01.0 |
| PCI: 00:02.0 |
| PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18 |
| PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20 |
| PCI: 00:04.0 |
| PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:16.0 |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:19.0 |
| PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 |
| PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 |
| PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 |
| PCI: 00:1a.0 |
| PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:1c.0 |
| PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 00:1c.1 child on link 0 PCI: 02:00.0 |
| PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 02:00.0 |
| PCI: 02:00.0 resource base 0 size 80000 align 19 gran 19 limit ffffffffffffffff flags 201 index 10 |
| PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30 |
| PCI: 00:1c.2 |
| PCI: 00:1c.3Unknown device path type: 0 |
| child on link 0 |
| PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| Unknown device path type: 0 |
| |
| Unknown device path type: 0 |
| resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10 |
| Unknown device path type: 0 |
| resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14 |
| Unknown device path type: 0 |
| resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18 |
| PCI: 00:1c.4 child on link 0 PCI: 04:00.0 |
| PCI: 00:1c.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.4 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 04:00.0 |
| PCI: 04:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| PCI: 00:1c.6 |
| PCI: 00:1c.5 |
| PCI: 00:1c.5 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.5 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.5 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 00:1c.7 |
| PCI: 00:1d.0 |
| PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| PCI: 00:1e.0 |
| PCI: 00:1f.0 child on link 0 PNP: 00ff.1 |
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200 |
| PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300 |
| PNP: 00ff.1 |
| PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 |
| PNP: 0c31.0 |
| PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0 |
| PNP: 00ff.2 |
| PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 |
| PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 |
| PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 |
| PCI: 00:1f.2 |
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 |
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 |
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 |
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c |
| PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 |
| PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24 |
| PCI: 00:1f.3 child on link 0 I2C: 01:54 |
| PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 |
| PCI: 00:1f.3 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10 |
| I2C: 01:54 |
| I2C: 01:55 |
| I2C: 01:56 |
| I2C: 01:57 |
| I2C: 01:5c |
| I2C: 01:5d |
| I2C: 01:5e |
| I2C: 01:5f |
| PCI: 00:1f.5 |
| PCI: 00:1f.6 |
| DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff |
| PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| Unknown device path type: 0 |
| 18 * [0x0 - 0xfff] io |
| PCI: 00:1c.3 io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.5 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.5 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.3 1c * [0x0 - 0xfff] io |
| PCI: 00:02.0 20 * [0x1000 - 0x103f] io |
| PCI: 00:19.0 18 * [0x1040 - 0x105f] io |
| PCI: 00:1f.2 20 * [0x1060 - 0x107f] io |
| PCI: 00:1f.2 10 * [0x1080 - 0x1087] io |
| PCI: 00:1f.2 18 * [0x1088 - 0x108f] io |
| PCI: 00:1f.2 14 * [0x1090 - 0x1093] io |
| PCI: 00:1f.2 1c * [0x1094 - 0x1097] io |
| DOMAIN: 0000 io: base: 1098 size: 1098 align: 12 gran: 0 limit: ffff done |
| DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff |
| PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 02:00.0 10 * [0x0 - 0x7ffff] mem |
| PCI: 02:00.0 30 * [0x80000 - 0x8ffff] mem |
| PCI: 00:1c.1 mem: base: 90000 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| Unknown device path type: 0 |
| 14 * [0x0 - 0x7fffff] prefmem |
| PCI: 00:1c.3 prefmem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done |
| PCI: 00:1c.3 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| Unknown device path type: 0 |
| 10 * [0x0 - 0x7fffff] mem |
| PCI: 00:1c.3 mem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done |
| PCI: 00:1c.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 04:00.0 10 * [0x0 - 0xff] mem |
| PCI: 00:1c.4 mem: base: 100 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.5 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.5 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.5 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 00:1c.5 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem |
| PCI: 00:1c.3 24 * [0x10000000 - 0x107fffff] prefmem |
| PCI: 00:1c.3 20 * [0x10800000 - 0x10ffffff] mem |
| PCI: 00:02.0 10 * [0x11000000 - 0x113fffff] mem |
| PCI: 00:1c.1 20 * [0x11400000 - 0x114fffff] mem |
| PCI: 00:1c.4 20 * [0x11500000 - 0x115fffff] mem |
| PCI: 00:19.0 10 * [0x11600000 - 0x1161ffff] mem |
| PCI: 00:04.0 10 * [0x11620000 - 0x11627fff] mem |
| PCI: 00:1b.0 10 * [0x11628000 - 0x1162bfff] mem |
| PCI: 00:19.0 14 * [0x1162c000 - 0x1162cfff] mem |
| PCI: 00:1f.2 24 * [0x1162d000 - 0x1162d7ff] mem |
| PCI: 00:1a.0 10 * [0x1162e000 - 0x1162e3ff] mem |
| PCI: 00:1d.0 10 * [0x1162f000 - 0x1162f3ff] mem |
| PCI: 00:1f.3 10 * [0x11630000 - 0x116300ff] mem |
| DOMAIN: 0000 mem: base: 11630100 size: 11630100 align: 28 gran: 0 limit: ffffffff done |
| avoid_fixed_resources: DOMAIN: 0000 |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff |
| constrain_resources: PCI: 00:00.0 60 base f8000000 limit fbffffff mem (fixed) |
| constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed) |
| constrain_resources: PCI: 00:1f.0 10000200 base 00001600 limit 0000167b io (fixed) |
| skipping PNP: 00ff.2@60 fixed resource, size=0! |
| skipping PNP: 00ff.2@62 fixed resource, size=0! |
| skipping PNP: 00ff.2@64 fixed resource, size=0! |
| skipping PNP: 00ff.2@66 fixed resource, size=0! |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 base 0000167c limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 base e0000000 limit f7ffffff |
| Setting resources... |
| DOMAIN: 0000 io: base:167c size:1098 align:12 gran:0 limit:ffff |
| PCI: 00:1c.3 1c * [0x2000 - 0x2fff] io |
| PCI: 00:02.0 20 * [0x3000 - 0x303f] io |
| PCI: 00:19.0 18 * [0x3040 - 0x305f] io |
| PCI: 00:1f.2 20 * [0x3060 - 0x307f] io |
| PCI: 00:1f.2 10 * [0x3080 - 0x3087] io |
| PCI: 00:1f.2 18 * [0x3088 - 0x308f] io |
| PCI: 00:1f.2 14 * [0x3090 - 0x3093] io |
| PCI: 00:1f.2 1c * [0x3094 - 0x3097] io |
| DOMAIN: 0000 io: next_base: 3098 size: 1098 align: 12 gran: 0 done |
| PCI: 00:1c.0 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:1c.0 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| PCI: 00:1c.1 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:1c.1 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| PCI: 00:1c.3 io: base:2000 size:1000 align:12 gran:12 limit:2fff |
| Unknown device path type: 0 |
| 18 * [0x2000 - 0x2fff] io |
| PCI: 00:1c.3 io: next_base: 3000 size: 1000 align: 12 gran: 12 done |
| PCI: 00:1c.4 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:1c.4 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| PCI: 00:1c.5 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:1c.5 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| DOMAIN: 0000 mem: base:e0000000 size:11630100 align:28 gran:0 limit:f7ffffff |
| PCI: 00:02.0 18 * [0xe0000000 - 0xefffffff] prefmem |
| PCI: 00:1c.3 24 * [0xf0000000 - 0xf07fffff] prefmem |
| PCI: 00:1c.3 20 * [0xf0800000 - 0xf0ffffff] mem |
| PCI: 00:02.0 10 * [0xf1000000 - 0xf13fffff] mem |
| PCI: 00:1c.1 20 * [0xf1400000 - 0xf14fffff] mem |
| PCI: 00:1c.4 20 * [0xf1500000 - 0xf15fffff] mem |
| PCI: 00:19.0 10 * [0xf1600000 - 0xf161ffff] mem |
| PCI: 00:04.0 10 * [0xf1620000 - 0xf1627fff] mem |
| PCI: 00:1b.0 10 * [0xf1628000 - 0xf162bfff] mem |
| PCI: 00:19.0 14 * [0xf162c000 - 0xf162cfff] mem |
| PCI: 00:1f.2 24 * [0xf162d000 - 0xf162d7ff] mem |
| PCI: 00:1a.0 10 * [0xf162e000 - 0xf162e3ff] mem |
| PCI: 00:1d.0 10 * [0xf162f000 - 0xf162f3ff] mem |
| PCI: 00:1f.3 10 * [0xf1630000 - 0xf16300ff] mem |
| DOMAIN: 0000 mem: next_base: f1630100 size: 11630100 align: 28 gran: 0 done |
| PCI: 00:1c.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:1c.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.0 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:1c.0 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.1 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:1c.1 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.1 mem: base:f1400000 size:100000 align:20 gran:20 limit:f14fffff |
| PCI: 02:00.0 10 * [0xf1400000 - 0xf147ffff] mem |
| PCI: 02:00.0 30 * [0xf1480000 - 0xf148ffff] mem |
| PCI: 00:1c.1 mem: next_base: f1490000 size: 100000 align: 20 gran: 20 done |
| PCI: 00:1c.3 prefmem: base:f0000000 size:800000 align:22 gran:20 limit:f07fffff |
| Unknown device path type: 0 |
| 14 * [0xf0000000 - 0xf07fffff] prefmem |
| PCI: 00:1c.3 prefmem: next_base: f0800000 size: 800000 align: 22 gran: 20 done |
| PCI: 00:1c.3 mem: base:f0800000 size:800000 align:22 gran:20 limit:f0ffffff |
| Unknown device path type: 0 |
| 10 * [0xf0800000 - 0xf0ffffff] mem |
| PCI: 00:1c.3 mem: next_base: f1000000 size: 800000 align: 22 gran: 20 done |
| PCI: 00:1c.4 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:1c.4 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.4 mem: base:f1500000 size:100000 align:20 gran:20 limit:f15fffff |
| PCI: 04:00.0 10 * [0xf1500000 - 0xf15000ff] mem |
| PCI: 00:1c.4 mem: next_base: f1500100 size: 100000 align: 20 gran: 20 done |
| PCI: 00:1c.5 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:1c.5 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.5 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:1c.5 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| Root Device assign_resources, bus 0 link: 0 |
| TOUUD 0x23b600000 TOLUD 0xc2a00000 TOM 0x200000000 |
| MEBASE 0x1fe000000 |
| IGD decoded, subtracting 32M UMA and 2M GTT |
| TSEG base 0xc0000000 size 8M |
| Available memory below 4GB: 3072M |
| Available memory above 4GB: 5046M |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| PCI: 00:02.0 10 <- [0x00f1000000 - 0x00f13fffff] size 0x00400000 gran 0x16 mem64 |
| PCI: 00:02.0 18 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem64 |
| PCI: 00:02.0 20 <- [0x0000003000 - 0x000000303f] size 0x00000040 gran 0x06 io |
| PCI: 00:04.0 10 <- [0x00f1620000 - 0x00f1627fff] size 0x00008000 gran 0x0f mem64 |
| PCI: 00:19.0 10 <- [0x00f1600000 - 0x00f161ffff] size 0x00020000 gran 0x11 mem |
| PCI: 00:19.0 14 <- [0x00f162c000 - 0x00f162cfff] size 0x00001000 gran 0x0c mem |
| PCI: 00:19.0 18 <- [0x0000003040 - 0x000000305f] size 0x00000020 gran 0x05 io |
| PCI: 00:1a.0 10 <- [0x00f162e000 - 0x00f162e3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1b.0 10 <- [0x00f1628000 - 0x00f162bfff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io |
| PCI: 00:1c.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 prefmem |
| PCI: 00:1c.0 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 mem |
| PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io |
| PCI: 00:1c.1 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem |
| PCI: 00:1c.1 20 <- [0x00f1400000 - 0x00f14fffff] size 0x00100000 gran 0x14 bus 02 mem |
| PCI: 00:1c.1 assign_resources, bus 2 link: 0 |
| PCI: 02:00.0 10 <- [0x00f1400000 - 0x00f147ffff] size 0x00080000 gran 0x13 mem64 |
| PCI: 02:00.0 30 <- [0x00f1480000 - 0x00f148ffff] size 0x00010000 gran 0x10 romem |
| PCI: 00:1c.1 assign_resources, bus 2 link: 0 |
| PCI: 00:1c.3 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 03 io |
| PCI: 00:1c.3 24 <- [0x00f0000000 - 0x00f07fffff] size 0x00800000 gran 0x14 bus 03 prefmem |
| PCI: 00:1c.3 20 <- [0x00f0800000 - 0x00f0ffffff] size 0x00800000 gran 0x14 bus 03 mem |
| PCI: 00:1c.3 assign_resources, bus 3 link: 0 |
| Unknown device path type: 0 |
| missing set_resources |
| PCI: 00:1c.3 assign_resources, bus 3 link: 0 |
| PCI: 00:1c.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io |
| PCI: 00:1c.4 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 04 prefmem |
| PCI: 00:1c.4 20 <- [0x00f1500000 - 0x00f15fffff] size 0x00100000 gran 0x14 bus 04 mem |
| PCI: 00:1c.4 assign_resources, bus 4 link: 0 |
| PCI: 04:00.0 10 <- [0x00f1500000 - 0x00f15000ff] size 0x00000100 gran 0x08 mem |
| PCI: 00:1c.4 assign_resources, bus 4 link: 0 |
| PCI: 00:1c.5 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 05 io |
| PCI: 00:1c.5 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 05 prefmem |
| PCI: 00:1c.5 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 05 mem |
| PCI: 00:1d.0 10 <- [0x00f162f000 - 0x00f162f3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1f.0 assign_resources, bus 0 link: 0 |
| PNP: 00ff.1 missing set_resources |
| PNP: 00ff.2 missing set_resources |
| PCI: 00:1f.0 assign_resources, bus 0 link: 0 |
| PCI: 00:1f.2 10 <- [0x0000003080 - 0x0000003087] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 14 <- [0x0000003090 - 0x0000003093] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 18 <- [0x0000003088 - 0x000000308f] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 1c <- [0x0000003094 - 0x0000003097] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 20 <- [0x0000003060 - 0x000000307f] size 0x00000020 gran 0x05 io |
| PCI: 00:1f.2 24 <- [0x00f162d000 - 0x00f162d7ff] size 0x00000800 gran 0x0b mem |
| PCI: 00:1f.3 10 <- [0x00f1630000 - 0x00f16300ff] size 0x00000100 gran 0x08 mem64 |
| PCI: 00:1f.3 assign_resources, bus 1 link: 0 |
| PCI: 00:1f.3 assign_resources, bus 1 link: 0 |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| Root Device assign_resources, bus 0 link: 0 |
| Done setting resources. |
| Show resources in subtree (Root Device)...After assigning values. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: acac |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 167c size 1098 align 12 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base e0000000 size 11630100 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100 |
| DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 |
| DOMAIN: 0000 resource base 100000 size bff00000 align 0 gran 0 limit 0 flags e0004200 index 4 |
| DOMAIN: 0000 resource base 100000000 size 13b600000 align 0 gran 0 limit 0 flags e0004200 index 5 |
| DOMAIN: 0000 resource base c0000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6 |
| DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7 |
| DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8 |
| DOMAIN: 0000 resource base 20000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index 9 |
| DOMAIN: 0000 resource base 40000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index a |
| DOMAIN: 0000 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b |
| DOMAIN: 0000 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c |
| PCI: 00:00.0 |
| PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 |
| PCI: 00:01.0 |
| PCI: 00:02.0 |
| PCI: 00:02.0 resource base f1000000 size 400000 align 22 gran 22 limit f13fffff flags 60000201 index 10 |
| PCI: 00:02.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001201 index 18 |
| PCI: 00:02.0 resource base 3000 size 40 align 6 gran 6 limit 303f flags 60000100 index 20 |
| PCI: 00:04.0 |
| PCI: 00:04.0 resource base f1620000 size 8000 align 15 gran 15 limit f1627fff flags 60000201 index 10 |
| PCI: 00:16.0 |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:19.0 |
| PCI: 00:19.0 resource base f1600000 size 20000 align 17 gran 17 limit f161ffff flags 60000200 index 10 |
| PCI: 00:19.0 resource base f162c000 size 1000 align 12 gran 12 limit f162cfff flags 60000200 index 14 |
| PCI: 00:19.0 resource base 3040 size 20 align 5 gran 5 limit 305f flags 60000100 index 18 |
| PCI: 00:1a.0 |
| PCI: 00:1a.0 resource base f162e000 size 400 align 12 gran 10 limit f162e3ff flags 60000200 index 10 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base f1628000 size 4000 align 14 gran 14 limit f162bfff flags 60000201 index 10 |
| PCI: 00:1c.0 |
| PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:1c.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 |
| PCI: 00:1c.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20 |
| PCI: 00:1c.1 child on link 0 PCI: 02:00.0 |
| PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:1c.1 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 |
| PCI: 00:1c.1 resource base f1400000 size 100000 align 20 gran 20 limit f14fffff flags 60080202 index 20 |
| PCI: 02:00.0 |
| PCI: 02:00.0 resource base f1400000 size 80000 align 19 gran 19 limit f147ffff flags 60000201 index 10 |
| PCI: 02:00.0 resource base f1480000 size 10000 align 16 gran 16 limit f148ffff flags 60002200 index 30 |
| PCI: 00:1c.2 |
| PCI: 00:1c.3Unknown device path type: 0 |
| child on link 0 |
| PCI: 00:1c.3 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c |
| PCI: 00:1c.3 resource base f0000000 size 800000 align 22 gran 20 limit f07fffff flags 60081202 index 24 |
| PCI: 00:1c.3 resource base f0800000 size 800000 align 22 gran 20 limit f0ffffff flags 60080202 index 20 |
| Unknown device path type: 0 |
| |
| Unknown device path type: 0 |
| resource base f0800000 size 800000 align 22 gran 22 limit f0ffffff flags 40000200 index 10 |
| Unknown device path type: 0 |
| resource base f0000000 size 800000 align 22 gran 22 limit f07fffff flags 40001200 index 14 |
| Unknown device path type: 0 |
| resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 40000100 index 18 |
| PCI: 00:1c.4 child on link 0 PCI: 04:00.0 |
| PCI: 00:1c.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:1c.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 |
| PCI: 00:1c.4 resource base f1500000 size 100000 align 20 gran 20 limit f15fffff flags 60080202 index 20 |
| PCI: 04:00.0 |
| PCI: 04:00.0 resource base f1500000 size 100 align 12 gran 8 limit f15000ff flags 60000200 index 10 |
| PCI: 00:1c.6 |
| PCI: 00:1c.5 |
| PCI: 00:1c.5 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:1c.5 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 |
| PCI: 00:1c.5 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20 |
| PCI: 00:1c.7 |
| PCI: 00:1d.0 |
| PCI: 00:1d.0 resource base f162f000 size 400 align 12 gran 10 limit f162f3ff flags 60000200 index 10 |
| PCI: 00:1e.0 |
| PCI: 00:1f.0 child on link 0 PNP: 00ff.1 |
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200 |
| PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300 |
| PNP: 00ff.1 |
| PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 |
| PNP: 0c31.0 |
| PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0 |
| PNP: 00ff.2 |
| PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 |
| PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 |
| PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 |
| PCI: 00:1f.2 |
| PCI: 00:1f.2 resource base 3080 size 8 align 3 gran 3 limit 3087 flags 60000100 index 10 |
| PCI: 00:1f.2 resource base 3090 size 4 align 2 gran 2 limit 3093 flags 60000100 index 14 |
| PCI: 00:1f.2 resource base 3088 size 8 align 3 gran 3 limit 308f flags 60000100 index 18 |
| PCI: 00:1f.2 resource base 3094 size 4 align 2 gran 2 limit 3097 flags 60000100 index 1c |
| PCI: 00:1f.2 resource base 3060 size 20 align 5 gran 5 limit 307f flags 60000100 index 20 |
| PCI: 00:1f.2 resource base f162d000 size 800 align 12 gran 11 limit f162d7ff flags 60000200 index 24 |
| PCI: 00:1f.3 child on link 0 I2C: 01:54 |
| PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 |
| PCI: 00:1f.3 resource base f1630000 size 100 align 12 gran 8 limit f16300ff flags 60000201 index 10 |
| I2C: 01:54 |
| I2C: 01:55 |
| I2C: 01:56 |
| I2C: 01:57 |
| I2C: 01:5c |
| I2C: 01:5d |
| I2C: 01:5e |
| I2C: 01:5f |
| PCI: 00:1f.5 |
| PCI: 00:1f.6 |
| Done allocating resources. |
| BS: BS_DEV_RESOURCES times (us): entry 0 run 2922 exit 0 |
| Enabling resources... |
| PCI: 00:00.0 subsystem <- 17aa/21db |
| PCI: 00:00.0 cmd <- 06 |
| PCI: 00:02.0 subsystem <- 17aa/21db |
| PCI: 00:02.0 cmd <- 03 |
| PCI: 00:04.0 cmd <- 02 |
| PCI: 00:19.0 subsystem <- 17aa/21ce |
| PCI: 00:19.0 cmd <- 103 |
| PCI: 00:1a.0 subsystem <- 17aa/21db |
| PCI: 00:1a.0 cmd <- 102 |
| PCI: 00:1b.0 subsystem <- 17aa/21db |
| PCI: 00:1b.0 cmd <- 102 |
| PCI: 00:1c.0 bridge ctrl <- 0003 |
| PCI: 00:1c.0 subsystem <- 17aa/21db |
| PCI: 00:1c.0 cmd <- 100 |
| PCI: 00:1c.1 bridge ctrl <- 0003 |
| PCI: 00:1c.1 subsystem <- 17aa/21db |
| PCI: 00:1c.1 cmd <- 106 |
| PCI: 00:1c.3 bridge ctrl <- 0003 |
| PCI: 00:1c.3 subsystem <- 17aa/21db |
| PCI: 00:1c.3 cmd <- 107 |
| PCI: 00:1c.4 bridge ctrl <- 0003 |
| PCI: 00:1c.4 subsystem <- 17aa/21db |
| PCI: 00:1c.4 cmd <- 106 |
| PCI: 00:1c.5 bridge ctrl <- 0003 |
| PCI: 00:1c.5 subsystem <- 17aa/21db |
| PCI: 00:1c.5 cmd <- 100 |
| PCI: 00:1d.0 subsystem <- 17aa/21db |
| PCI: 00:1d.0 cmd <- 102 |
| pch_decode_init |
| PCI: 00:1f.0 subsystem <- 17aa/21db |
| PCI: 00:1f.0 cmd <- 107 |
| PCI: 00:1f.2 subsystem <- 17aa/21db |
| PCI: 00:1f.2 cmd <- 03 |
| PCI: 00:1f.3 subsystem <- 17aa/21db |
| PCI: 00:1f.3 cmd <- 103 |
| PCI: 02:00.0 cmd <- 02 |
| PCI: 04:00.0 subsystem <- 17aa/21fa |
| PCI: 04:00.0 cmd <- 06 |
| done. |
| BS: BS_DEV_ENABLE times (us): entry 0 run 159 exit 0 |
| Initializing devices... |
| Root Device init ... |
| Root Device init finished in 1 usecs |
| CPU_CLUSTER: 0 init ... |
| start_eip=0x00001000, code_size=0x00000031 |
| Setting up SMI for CPU |
| Loading module at 00038000 with entry 00038000. filesize: 0x160 memsize: 0x160 |
| Processing 10 relocs. Offset value of 0x00038000 |
| Adjusting 00038002: 0x00000024 -> 0x00038024 |
| Adjusting 0003801d: 0x0000003c -> 0x0003803c |
| Adjusting 00038026: 0x00000024 -> 0x00038024 |
| Adjusting 00038054: 0x000000d8 -> 0x000380d8 |
| Adjusting 00038066: 0x00000160 -> 0x00038160 |
| Adjusting 0003806d: 0x000000c0 -> 0x000380c0 |
| Adjusting 00038075: 0x000000c4 -> 0x000380c4 |
| Adjusting 0003807e: 0x000000d0 -> 0x000380d0 |
| Adjusting 00038085: 0x000000cc -> 0x000380cc |
| Adjusting 0003808b: 0x000000c8 -> 0x000380c8 |
| SMM Module: stub loaded at 00038000. Will call bffaefad(bffd2a00) |
| Installing SMM handler to 0xc0000000 |
| Loading module at c0010000 with entry c001056d. filesize: 0x1958 memsize: 0x5978 |
| Processing 77 relocs. Offset value of 0xc0010000 |
| Adjusting c0010036: 0x00001874 -> 0xc0011874 |
| Adjusting c0010055: 0x00001874 -> 0xc0011874 |
| Adjusting c0010108: 0x00001874 -> 0xc0011874 |
| Adjusting c0010198: 0x000017be -> 0xc00117be |
| Adjusting c00104bc: 0x00001958 -> 0xc0011958 |
| Adjusting c00104d6: 0x00001960 -> 0xc0011960 |
| Adjusting c00104ed: 0x00001960 -> 0xc0011960 |
| Adjusting c001053a: 0x00001950 -> 0xc0011950 |
| Adjusting c0010550: 0x000018a0 -> 0xc00118a0 |
| Adjusting c0010576: 0x00001958 -> 0xc0011958 |
| Adjusting c0010584: 0x00001958 -> 0xc0011958 |
| Adjusting c0010591: 0x00001940 -> 0xc0011940 |
| Adjusting c001059c: 0x00001940 -> 0xc0011940 |
| Adjusting c00105b0: 0x00001944 -> 0xc0011944 |
| Adjusting c00105b6: 0x0000195c -> 0xc001195c |
| Adjusting c00105be: 0x00001944 -> 0xc0011944 |
| Adjusting c00105db: 0x0000195c -> 0xc001195c |
| Adjusting c00105e4: 0x00001940 -> 0xc0011940 |
| Adjusting c0010709: 0x000017c7 -> 0xc00117c7 |
| Adjusting c0010818: 0x0000194c -> 0xc001194c |
| Adjusting c0010841: 0x0000194c -> 0xc001194c |
| Adjusting c001085e: 0x0000194c -> 0xc001194c |
| Adjusting c0010887: 0x00001948 -> 0xc0011948 |
| Adjusting c00108a4: 0x0000194c -> 0xc001194c |
| Adjusting c00108ca: 0x00001948 -> 0xc0011948 |
| Adjusting c0010982: 0x0000194c -> 0xc001194c |
| Adjusting c0010987: 0x00001948 -> 0xc0011948 |
| Adjusting c0010990: 0x000017d7 -> 0xc00117d7 |
| Adjusting c00109dd: 0x00001860 -> 0xc0011860 |
| Adjusting c0010d20: 0x00001964 -> 0xc0011964 |
| Adjusting c0010d4f: 0x00001968 -> 0xc0011968 |
| Adjusting c0010d62: 0x00001964 -> 0xc0011964 |
| Adjusting c0010d85: 0x00001968 -> 0xc0011968 |
| Adjusting c0010e48: 0x00001964 -> 0xc0011964 |
| Adjusting c0011083: 0x00001968 -> 0xc0011968 |
| Adjusting c0011272: 0x00001968 -> 0xc0011968 |
| Adjusting c0011354: 0x00001950 -> 0xc0011950 |
| Adjusting c0011364: 0x00001950 -> 0xc0011950 |
| Adjusting c0011379: 0x00001950 -> 0xc0011950 |
| Adjusting c001139a: 0x00001950 -> 0xc0011950 |
| Adjusting c00113c9: 0x00001950 -> 0xc0011950 |
| Adjusting c00113e8: 0x00001950 -> 0xc0011950 |
| Adjusting c00113fb: 0x00001974 -> 0xc0011974 |
| Adjusting c001143f: 0x0000196c -> 0xc001196c |
| Adjusting c001145c: 0x0000196c -> 0xc001196c |
| Adjusting c001147a: 0x00001974 -> 0xc0011974 |
| Adjusting c0011480: 0x00001970 -> 0xc0011970 |
| Adjusting c001148d: 0x00001950 -> 0xc0011950 |
| Adjusting c00114b3: 0x00001950 -> 0xc0011950 |
| Adjusting c0011508: 0x00001970 -> 0xc0011970 |
| Adjusting c001155f: 0x00001841 -> 0xc0011841 |
| Adjusting c001157a: 0x00001950 -> 0xc0011950 |
| Adjusting c001159b: 0x00001898 -> 0xc0011898 |
| Adjusting c00115a0: 0x00001970 -> 0xc0011970 |
| Adjusting c0011663: 0x00001950 -> 0xc0011950 |
| Adjusting c0011691: 0x00001950 -> 0xc0011950 |
| Adjusting c00116bd: 0x00001950 -> 0xc0011950 |
| Adjusting c00116e1: 0x00001950 -> 0xc0011950 |
| Adjusting c001177f: 0x00001970 -> 0xc0011970 |
| Adjusting c0011793: 0x00001950 -> 0xc0011950 |
| Adjusting c0011858: 0x000017a8 -> 0xc00117a8 |
| Adjusting c0011860: 0x00000021 -> 0xc0010021 |
| Adjusting c0011864: 0x000017a8 -> 0xc00117a8 |
| Adjusting c001186c: 0x00000092 -> 0xc0010092 |
| Adjusting c0011878: 0x00001884 -> 0xc0011884 |
| Adjusting c0011884: 0x000002d2 -> 0xc00102d2 |
| Adjusting c0011888: 0x000002de -> 0xc00102de |
| Adjusting c001188c: 0x000002e1 -> 0xc00102e1 |
| Adjusting c00118b0: 0x00001549 -> 0xc0011549 |
| Adjusting c00118b4: 0x000013aa -> 0xc00113aa |
| Adjusting c00118c0: 0x0000148a -> 0xc001148a |
| Adjusting c00118c4: 0x00001351 -> 0xc0011351 |
| Adjusting c00118c8: 0x00001372 -> 0xc0011372 |
| Adjusting c00118cc: 0x0000136d -> 0xc001136d |
| Adjusting c00118d4: 0x000014b0 -> 0xc00114b0 |
| Adjusting c00118d8: 0x00001361 -> 0xc0011361 |
| Adjusting c00118f4: 0x000014f3 -> 0xc00114f3 |
| Loading module at c0008000 with entry c0008000. filesize: 0x160 memsize: 0x160 |
| Processing 10 relocs. Offset value of 0xc0008000 |
| Adjusting c0008002: 0x00000024 -> 0xc0008024 |
| Adjusting c000801d: 0x0000003c -> 0xc000803c |
| Adjusting c0008026: 0x00000024 -> 0xc0008024 |
| Adjusting c0008054: 0x000000d8 -> 0xc00080d8 |
| Adjusting c0008066: 0x00000160 -> 0xc0008160 |
| Adjusting c000806d: 0x000000c0 -> 0xc00080c0 |
| Adjusting c0008075: 0x000000c4 -> 0xc00080c4 |
| Adjusting c000807e: 0x000000d0 -> 0xc00080d0 |
| Adjusting c0008085: 0x000000cc -> 0xc00080cc |
| Adjusting c000808b: 0x000000c8 -> 0xc00080c8 |
| SMM Module: placing jmp sequence at c0007c00 rel16 0x03fd |
| SMM Module: placing jmp sequence at c0007800 rel16 0x07fd |
| SMM Module: placing jmp sequence at c0007400 rel16 0x0bfd |
| SMM Module: stub loaded at c0008000. Will call c001056d(00000000) |
| Initializing southbridge SMI... ... pmbase = 0x0500 |
| |
| SMI_STS: MCSMI PM1 |
| PM1_STS: WAK PWRBTN |
| GPE0_STS: GPIO14 GPIO13 GPIO11 GPIO10 GPIO9 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO1 GPIO0 |
| ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI1 GPI0 |
| TCO_STS: INTRD_DET |
| ... raise SMI# |
| In relocation handler: cpu 0 |
| New SMBASE=0xc0000000 IEDBASE=0xc0400000 @ 0003fc00 |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Relocation complete. |
| Locking SMM. |
| Initializing CPU #0 |
| CPU: vendor Intel device 206a7 |
| CPU: family 06, model 2a, stepping 07 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 13d00 size 5800 |
| microcode: sig=0x206a7 pf=0x10 revision=0x29 |
| CPU: Intel(R) Core(TM) i5-2520M CPU @ 2.50GHz. |
| MTRR: Physical address space: |
| 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 |
| 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 |
| 0x00000000000c0000 - 0x00000000c0000000 size 0xbff40000 type 6 |
| 0x00000000c0000000 - 0x00000000e0000000 size 0x20000000 type 0 |
| 0x00000000e0000000 - 0x00000000f0000000 size 0x10000000 type 1 |
| 0x00000000f0000000 - 0x0000000100000000 size 0x10000000 type 0 |
| 0x0000000100000000 - 0x000000023b600000 size 0x13b600000 type 6 |
| MTRR addr 0x0-0x10 set to 6 type @ 0 |
| MTRR addr 0x10-0x20 set to 6 type @ 1 |
| MTRR addr 0x20-0x30 set to 6 type @ 2 |
| MTRR addr 0x30-0x40 set to 6 type @ 3 |
| MTRR addr 0x40-0x50 set to 6 type @ 4 |
| MTRR addr 0x50-0x60 set to 6 type @ 5 |
| MTRR addr 0x60-0x70 set to 6 type @ 6 |
| MTRR addr 0x70-0x80 set to 6 type @ 7 |
| MTRR addr 0x80-0x84 set to 6 type @ 8 |
| MTRR addr 0x84-0x88 set to 6 type @ 9 |
| MTRR addr 0x88-0x8c set to 6 type @ 10 |
| MTRR addr 0x8c-0x90 set to 6 type @ 11 |
| MTRR addr 0x90-0x94 set to 6 type @ 12 |
| MTRR addr 0x94-0x98 set to 6 type @ 13 |
| MTRR addr 0x98-0x9c set to 6 type @ 14 |
| MTRR addr 0x9c-0xa0 set to 6 type @ 15 |
| MTRR addr 0xa0-0xa4 set to 0 type @ 16 |
| MTRR addr 0xa4-0xa8 set to 0 type @ 17 |
| MTRR addr 0xa8-0xac set to 0 type @ 18 |
| MTRR addr 0xac-0xb0 set to 0 type @ 19 |
| MTRR addr 0xb0-0xb4 set to 0 type @ 20 |
| MTRR addr 0xb4-0xb8 set to 0 type @ 21 |
| MTRR addr 0xb8-0xbc set to 0 type @ 22 |
| MTRR addr 0xbc-0xc0 set to 0 type @ 23 |
| MTRR addr 0xc0-0xc1 set to 6 type @ 24 |
| MTRR addr 0xc1-0xc2 set to 6 type @ 25 |
| MTRR addr 0xc2-0xc3 set to 6 type @ 26 |
| MTRR addr 0xc3-0xc4 set to 6 type @ 27 |
| MTRR addr 0xc4-0xc5 set to 6 type @ 28 |
| MTRR addr 0xc5-0xc6 set to 6 type @ 29 |
| MTRR addr 0xc6-0xc7 set to 6 type @ 30 |
| MTRR addr 0xc7-0xc8 set to 6 type @ 31 |
| MTRR addr 0xc8-0xc9 set to 6 type @ 32 |
| MTRR addr 0xc9-0xca set to 6 type @ 33 |
| MTRR addr 0xca-0xcb set to 6 type @ 34 |
| MTRR addr 0xcb-0xcc set to 6 type @ 35 |
| MTRR addr 0xcc-0xcd set to 6 type @ 36 |
| MTRR addr 0xcd-0xce set to 6 type @ 37 |
| MTRR addr 0xce-0xcf set to 6 type @ 38 |
| MTRR addr 0xcf-0xd0 set to 6 type @ 39 |
| MTRR addr 0xd0-0xd1 set to 6 type @ 40 |
| MTRR addr 0xd1-0xd2 set to 6 type @ 41 |
| MTRR addr 0xd2-0xd3 set to 6 type @ 42 |
| MTRR addr 0xd3-0xd4 set to 6 type @ 43 |
| MTRR addr 0xd4-0xd5 set to 6 type @ 44 |
| MTRR addr 0xd5-0xd6 set to 6 type @ 45 |
| MTRR addr 0xd6-0xd7 set to 6 type @ 46 |
| MTRR addr 0xd7-0xd8 set to 6 type @ 47 |
| MTRR addr 0xd8-0xd9 set to 6 type @ 48 |
| MTRR addr 0xd9-0xda set to 6 type @ 49 |
| MTRR addr 0xda-0xdb set to 6 type @ 50 |
| MTRR addr 0xdb-0xdc set to 6 type @ 51 |
| MTRR addr 0xdc-0xdd set to 6 type @ 52 |
| MTRR addr 0xdd-0xde set to 6 type @ 53 |
| MTRR addr 0xde-0xdf set to 6 type @ 54 |
| MTRR addr 0xdf-0xe0 set to 6 type @ 55 |
| MTRR addr 0xe0-0xe1 set to 6 type @ 56 |
| MTRR addr 0xe1-0xe2 set to 6 type @ 57 |
| MTRR addr 0xe2-0xe3 set to 6 type @ 58 |
| MTRR addr 0xe3-0xe4 set to 6 type @ 59 |
| MTRR addr 0xe4-0xe5 set to 6 type @ 60 |
| MTRR addr 0xe5-0xe6 set to 6 type @ 61 |
| MTRR addr 0xe6-0xe7 set to 6 type @ 62 |
| MTRR addr 0xe7-0xe8 set to 6 type @ 63 |
| MTRR addr 0xe8-0xe9 set to 6 type @ 64 |
| MTRR addr 0xe9-0xea set to 6 type @ 65 |
| MTRR addr 0xea-0xeb set to 6 type @ 66 |
| MTRR addr 0xeb-0xec set to 6 type @ 67 |
| MTRR addr 0xec-0xed set to 6 type @ 68 |
| MTRR addr 0xed-0xee set to 6 type @ 69 |
| MTRR addr 0xee-0xef set to 6 type @ 70 |
| MTRR addr 0xef-0xf0 set to 6 type @ 71 |
| MTRR addr 0xf0-0xf1 set to 6 type @ 72 |
| MTRR addr 0xf1-0xf2 set to 6 type @ 73 |
| MTRR addr 0xf2-0xf3 set to 6 type @ 74 |
| MTRR addr 0xf3-0xf4 set to 6 type @ 75 |
| MTRR addr 0xf4-0xf5 set to 6 type @ 76 |
| MTRR addr 0xf5-0xf6 set to 6 type @ 77 |
| MTRR addr 0xf6-0xf7 set to 6 type @ 78 |
| MTRR addr 0xf7-0xf8 set to 6 type @ 79 |
| MTRR addr 0xf8-0xf9 set to 6 type @ 80 |
| MTRR addr 0xf9-0xfa set to 6 type @ 81 |
| MTRR addr 0xfa-0xfb set to 6 type @ 82 |
| MTRR addr 0xfb-0xfc set to 6 type @ 83 |
| MTRR addr 0xfc-0xfd set to 6 type @ 84 |
| MTRR addr 0xfd-0xfe set to 6 type @ 85 |
| MTRR addr 0xfe-0xff set to 6 type @ 86 |
| MTRR addr 0xff-0x100 set to 6 type @ 87 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| MTRR: default type WB/UC MTRR counts: 3/10. |
| MTRR: WB selected as default type. |
| MTRR: 0 base 0x00000000c0000000 mask 0x0000000fe0000000 type 0 |
| MTRR: 1 base 0x00000000e0000000 mask 0x0000000ff0000000 type 1 |
| MTRR: 2 base 0x00000000f0000000 mask 0x0000000ff0000000 type 0 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x00 done. |
| VMX status: enabled, locked |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2500 |
| Turbo is available but hidden |
| Turbo has been enabled |
| CPU: 0 has 2 cores, 2 threads per core |
| CPU: 0 has core 1 |
| CPU1: stack_base bffcc000, stack_end bffccff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 1. |
| After apic_write. |
| In relocation handler: cpu 1 |
| New SMBASE=0xbffffc00 IEDBASE=0xc0400000 @ 0003fc00 |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 1. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #1 |
| CPU: 0 has core 2 |
| CPU: vendor Intel device 206a7 |
| CPU: family 06, model 2a, stepping 07 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 13d00 size 5800 |
| microcode: sig=0x206a7 pf=0x10 revision=0x29 |
| CPU: Intel(R) Core(TM) i5-2520M CPU @ 2.50GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x01 done. |
| VMX status: enabled, locked |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2500 |
| CPU #1 initialized |
| CPU2: stack_base bffcb000, stack_end bffcbff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 2. |
| After apic_write. |
| In relocation handler: cpu 2 |
| Startup point 1. |
| Waiting for send to finish... |
| +New SMBASE=0xbffff800 IEDBASE=0xc0400000 @ 0003fc00 |
| Sending STARTUP #2 to 2. |
| After apic_write. |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU: 0 has core 3 |
| Initializing CPU #2 |
| CPU: vendor Intel device 206a7 |
| CPU: family 06, model 2a, stepping 07 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 13d00 size 5800 |
| microcode: sig=0x206a7 pf=0x10 revision=0x0 |
| microcode: updated to revision 0x29 date=2013-06-12 |
| CPU: Intel(R) Core(TM) i5-2520M CPU @ 2.50GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x02 done. |
| VMX status: enabled, locked |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2500 |
| CPU #2 initialized |
| CPU3: stack_base bffca000, stack_end bffcaff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 3. |
| After apic_write. |
| In relocation handler: cpu 3 |
| New SMBASE=0xbffff400 IEDBASE=0xc0400000 @ 0003fc00 |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 3. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU #0 initialized |
| Waiting for 1 CPUS to stop |
| Initializing CPU #3 |
| CPU: vendor Intel device 206a7 |
| CPU: family 06, model 2a, stepping 07 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 13d00 size 5800 |
| microcode: sig=0x206a7 pf=0x10 revision=0x29 |
| CPU: Intel(R) Core(TM) i5-2520M CPU @ 2.50GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x03 done. |
| VMX status: enabled, locked |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2500 |
| CPU #3 initialized |
| All AP CPUs stopped (518 loops) |
| CPU0: stack: bffcd000 - bffce000, lowest used address bffcdab0, stack used: 1360 bytes |
| CPU1: stack: bffcc000 - bffcd000, lowest used address bffccca4, stack used: 860 bytes |
| CPU2: stack: bffcb000 - bffcc000, lowest used address bffcbca4, stack used: 860 bytes |
| CPU3: stack: bffca000 - bffcb000, lowest used address bffcaca4, stack used: 860 bytes |
| CPU_CLUSTER: 0 init finished in 58251 usecs |
| PCI: 00:00.0 init ... |
| Disabling PEG12. |
| Disabling PEG11. |
| Disabling PEG10. |
| Disabling PEG60. |
| Disabling PEG IO clock. |
| Set BIOS_RESET_CPL |
| CPU TDP: 35 Watts |
| PCI: 00:00.0 init finished in 1017 usecs |
| PCI: 00:02.0 init ... |
| GT Power Management Init |
| SNB GT2 Power Meter Weights |
| GT Power Management Init (post VBIOS) |
| Initializing VGA without OPROM. |
| EDID: |
| 00 ff ff ff ff ff ff 00 30 e4 d8 02 00 00 00 00 |
| 00 14 01 03 80 1c 10 78 ea d4 e5 95 59 57 8b 28 |
| 20 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 |
| 01 01 01 01 01 01 60 1d 56 d8 50 00 18 30 30 40 |
| 47 00 15 9c 10 00 00 1b 00 00 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 fe 00 4c |
| 47 20 44 69 73 70 6c 61 79 0a 20 20 00 00 00 fe |
| 00 4c 50 31 32 35 57 48 32 2d 53 4c 42 31 00 84 |
| Extracted contents: |
| header: 00 ff ff ff ff ff ff 00 |
| serial number: 30 e4 d8 02 00 00 00 00 00 14 |
| version: 01 03 |
| basic params: 80 1c 10 78 ea |
| chroma info: d4 e5 95 59 57 8b 28 20 50 54 |
| established: 00 00 00 |
| standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 |
| descriptor 1: 60 1d 56 d8 50 00 18 30 30 40 47 00 15 9c 10 00 00 1b |
| descriptor 2: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
| descriptor 3: 00 00 00 fe 00 4c 47 20 44 69 73 70 6c 61 79 0a 20 20 |
| descriptor 4: 00 00 00 fe 00 4c 50 31 32 35 57 48 32 2d 53 4c 42 31 |
| extensions: 00 |
| checksum: 84 |
| |
| Manufacturer: LGD Model 2d8 Serial Number 0 |
| Made week 0 of 2010 |
| EDID version: 1.3 |
| Digital display |
| Maximum image size: 28 cm x 16 cm |
| Gamma: 220% |
| Check DPMS levels |
| DPMS levels: Standby Suspend Off |
| Supported color formats: RGB 4:4:4, YCrCb 4:2:2 |
| First detailed timing is preferred timing |
| Established timings supported: |
| Standard timings supported: |
| Detailed timings |
| Hex of detail: 601d56d85000183030404700159c1000001b |
| Detailed mode (IN HEX): Clock 75200 KHz, 115 mm x 9c mm |
| 0556 0586 05c6 062e hborder 0 |
| 0300 0304 030b 0318 vborder 0 |
| +hsync -vsync |
| Did detailed timing |
| Hex of detail: 000000000000000000000000000000000000 |
| Manufacturer-specified data, tag 0 |
| Hex of detail: 000000fe004c4720446973706c61790a2020 |
| ASCII string: LG Display |
| Hex of detail: 000000fe004c503132355748322d534c4231 |
| ASCII string: LP125WH2-SLB1 |
| Checksum |
| Checksum: 0x84 (valid) |
| WARNING: EDID block does NOT fully conform to EDID 1.3. |
| Missing name descriptor |
| Missing monitor ranges |
| bringing up panel at resolution 1376 x 768 |
| Borders 0 x 0 |
| Blank 216 x 24 |
| Sync 64 x 7 |
| Front porch 48 x 4 |
| Spread spectrum clock |
| Single channel |
| Polarities 0, 1 |
| Data M1=1314215, N1=8388608 |
| Link frequency 270000 kHz |
| Link M1=146023, N1=524288 |
| Pixel N=9, M1=14, M2=9, P1=1 |
| Pixel clock 150476 kHz |
| waiting for panel powerup |
| panel powered up |
| PCI: 00:02.0 init finished in 28059 usecs |
| PCI: 00:04.0 init ... |
| PCI: 00:04.0 init finished in 0 usecs |
| PCI: 00:19.0 init ... |
| PCI: 00:19.0 init finished in 0 usecs |
| PCI: 00:1a.0 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1a.0 init finished in 12 usecs |
| PCI: 00:1b.0 init ... |
| Azalia: base = f1628000 |
| Azalia: codec_mask = 09 |
| Azalia: Initializing codec #3 |
| Azalia: codec viddid: 80862805 |
| Azalia: verb_size: 16 |
| Azalia: verb loaded. |
| Azalia: Initializing codec #0 |
| Azalia: codec viddid: 14f1506e |
| Azalia: verb_size: 52 |
| Azalia: verb loaded. |
| PCI: 00:1b.0 init finished in 4972 usecs |
| PCI: 00:1c.0 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.0 init finished in 9 usecs |
| PCI: 00:1c.1 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.1 init finished in 8 usecs |
| PCI: 00:1c.3 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.3 init finished in 12 usecs |
| PCI: 00:1c.4 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.4 init finished in 9 usecs |
| PCI: 00:1c.5 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.5 init finished in 9 usecs |
| PCI: 00:1d.0 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1d.0 init finished in 12 usecs |
| PCI: 00:1f.0 init ... |
| pch: lpc_init |
| IOAPIC: Initializing IOAPIC at 0xfec00000 |
| IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| IOAPIC: ID = 0x02 |
| IOAPIC: Dumping registers |
| reg 0x0000: 0x02000000 |
| reg 0x0001: 0x00170020 |
| reg 0x0002: 0x00170020 |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19d00 size 80c |
| Set power off after power failure. |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19d00 size 80c |
| NMI sources enabled. |
| CougarPoint PM init |
| rtc_failed = 0x0 |
| RTC Init |
| Enabling BIOS updates outside of SMM... Disabling ACPI via APMC: |
| done. |
| pch_spi_init |
| PCI: 00:1f.0 init finished in 744 usecs |
| PCI: 00:1f.2 init ... |
| SATA: Initializing... |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19d00 size 80c |
| SATA: Controller in AHCI mode. |
| ABAR: f162d000 |
| PCI: 00:1f.2 init finished in 311 usecs |
| PCI: 00:1f.3 init ... |
| PCI: 00:1f.3 init finished in 7 usecs |
| PCI: 02:00.0 init ... |
| PCI: 02:00.0 init finished in 0 usecs |
| PCI: 04:00.0 init ... |
| PCI: 04:00.0 init finished in 14 usecs |
| PNP: 00ff.2 init ... |
| PNP: 00ff.2 init finished in 0 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:54 init ... |
| I2C: 01:54 init finished in 1 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:55 init ... |
| I2C: 01:55 init finished in 0 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:56 init ... |
| I2C: 01:56 init finished in 0 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:57 init ... |
| I2C: 01:57 init finished in 0 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5c init ... |
| Locking EEPROM RFID |
| init EEPROM done |
| I2C: 01:5c init finished in 23463 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5d init ... |
| I2C: 01:5d init finished in 0 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5e init ... |
| I2C: 01:5e init finished in 0 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5f init ... |
| I2C: 01:5f init finished in 0 usecs |
| Devices initialized |
| Show all devs... After init. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:16.0: enabled 0 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 0 |
| PCI: 00:1c.3: enabled 1 |
| PCI: 00:1c.4: enabled 1 |
| PCI: 04:00.0: enabled 1 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.5: enabled 1 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 00ff.1: enabled 1 |
| PNP: 0c31.0: enabled 1 |
| PNP: 00ff.2: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| I2C: 01:54: enabled 1 |
| I2C: 01:55: enabled 1 |
| I2C: 01:56: enabled 1 |
| I2C: 01:57: enabled 1 |
| I2C: 01:5c: enabled 1 |
| I2C: 01:5d: enabled 1 |
| I2C: 01:5e: enabled 1 |
| I2C: 01:5f: enabled 1 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| PCI: 00:04.0: enabled 1 |
| PCI: 02:00.0: enabled 1 |
| Unknown device path type: 0 |
| : enabled 1 |
| APIC: 01: enabled 1 |
| APIC: 02: enabled 1 |
| APIC: 03: enabled 1 |
| BS: BS_DEV_INIT times (us): entry 8 run 117064 exit 0 |
| Finalize devices... |
| PCI: 00:1f.0 final |
| Devices finalized |
| BS: BS_POST_DEVICE times (us): entry 0 run 4 exit 0 |
| BS: BS_OS_RESUME_CHECK times (us): entry 0 run 3 exit 0 |
| Updating MRC cache data. |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| CBFS: Locating 'mrc.cache' |
| CBFS: Found @ offset 1fec0 size 10000 |
| find_current_mrc_cache_local: No valid MRC cache found. |
| Manufacturer: ef |
| SF: Detected W25Q64 with sector size 0x1000, total 0x800000 |
| Need to erase the MRC cache region of 65536 bytes at ff840000 |
| SF: Successfully erased 65536 bytes @ 0x40000 |
| Finally: write MRC cache update to flash at ff840000 |
| Successfully wrote MRC cache |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| CBFS: Locating 'fallback/dsdt.aml' |
| CBFS: Found @ offset 1a580 size 33cc |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| CBFS: Locating 'fallback/slic' |
| CBFS: 'fallback/slic' not found. |
| ACPI: Writing ACPI tables at bff26000. |
| ACPI: * FACS |
| ACPI: * DSDT |
| ACPI: * IGD OpRegion |
| GET_VBIOS: aa55 8086 0 0 3 |
| ... VBIOS found at 000c0000 |
| ACPI: * FADT |
| ACPI: added table 1/32, length now 40 |
| ACPI: * SSDT |
| Found 1 CPU(s) with 4 core(s) each. |
| PSS: 2501MHz power 35000 control 0x2000 status 0x2000 |
| PSS: 2500MHz power 35000 control 0x1900 status 0x1900 |
| PSS: 2000MHz power 26404 control 0x1400 status 0x1400 |
| PSS: 1600MHz power 20160 control 0x1000 status 0x1000 |
| PSS: 1200MHz power 14397 control 0xc00 status 0xc00 |
| PSS: 800MHz power 9139 control 0x800 status 0x800 |
| PSS: 2501MHz power 35000 control 0x2000 status 0x2000 |
| PSS: 2500MHz power 35000 control 0x1900 status 0x1900 |
| PSS: 2000MHz power 26404 control 0x1400 status 0x1400 |
| PSS: 1600MHz power 20160 control 0x1000 status 0x1000 |
| PSS: 1200MHz power 14397 control 0xc00 status 0xc00 |
| PSS: 800MHz power 9139 control 0x800 status 0x800 |
| PSS: 2501MHz power 35000 control 0x2000 status 0x2000 |
| PSS: 2500MHz power 35000 control 0x1900 status 0x1900 |
| PSS: 2000MHz power 26404 control 0x1400 status 0x1400 |
| PSS: 1600MHz power 20160 control 0x1000 status 0x1000 |
| PSS: 1200MHz power 14397 control 0xc00 status 0xc00 |
| PSS: 800MHz power 9139 control 0x800 status 0x800 |
| PSS: 2501MHz power 35000 control 0x2000 status 0x2000 |
| PSS: 2500MHz power 35000 control 0x1900 status 0x1900 |
| PSS: 2000MHz power 26404 control 0x1400 status 0x1400 |
| PSS: 1600MHz power 20160 control 0x1000 status 0x1000 |
| PSS: 1200MHz power 14397 control 0xc00 status 0xc00 |
| PSS: 800MHz power 9139 control 0x800 status 0x800 |
| Using default TPM ACPI path: 'PCI0.LPCB' |
| PCI0.LPCB.TPM: LPC TPM PNP: 0c31.0 |
| ACPI: added table 2/32, length now 44 |
| ACPI: * MCFG |
| ACPI: added table 3/32, length now 48 |
| ACPI: * TCPA |
| TCPA log created at bff13000 |
| ACPI: added table 4/32, length now 52 |
| ACPI: * MADT |
| ACPI: added table 5/32, length now 56 |
| current = bff2af50 |
| ACPI: * DMAR |
| ACPI: added table 6/32, length now 60 |
| current = bff2b000 |
| ACPI: * HPET |
| ACPI: added table 7/32, length now 64 |
| ACPI: done. |
| ACPI tables: 20544 bytes. |
| smbios_write_tables: bff12000 |
| recv_ec_data: 0x38 |
| recv_ec_data: 0x44 |
| recv_ec_data: 0x48 |
| recv_ec_data: 0x54 |
| recv_ec_data: 0x33 |
| recv_ec_data: 0x34 |
| recv_ec_data: 0x57 |
| recv_ec_data: 0x57 |
| recv_ec_data: 0x14 |
| recv_ec_data: 0x03 |
| Create SMBIOS type 17 |
| Root Device (LENOVO ThinkPad X220) |
| CPU_CLUSTER: 0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| APIC: 00 (unknown) |
| APIC: acac (Intel SandyBridge/IvyBridge CPU) |
| DOMAIN: 0000 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:00.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:01.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:02.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:16.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:19.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1a.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1b.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.4 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 04:00.0 (unknown) |
| PCI: 00:1c.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.7 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1d.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1e.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PNP: 00ff.1 (Lenovo Power Management Hardware Hub 7) |
| PNP: 0c31.0 (LPC TPM) |
| PNP: 00ff.2 (Lenovo H8 EC) |
| PCI: 00:1f.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| I2C: 01:54 (AT24RF08C) |
| I2C: 01:55 (AT24RF08C) |
| I2C: 01:56 (AT24RF08C) |
| I2C: 01:57 (AT24RF08C) |
| I2C: 01:5c (AT24RF08C) |
| I2C: 01:5d (AT24RF08C) |
| I2C: 01:5e (AT24RF08C) |
| I2C: 01:5f (AT24RF08C) |
| PCI: 00:1f.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:04.0 (unknown) |
| PCI: 02:00.0 (unknown) |
| Unknown device path type: 0 |
| (unknown) |
| APIC: 01 (unknown) |
| APIC: 02 (unknown) |
| APIC: 03 (unknown) |
| SMBIOS tables: 635 bytes. |
| Writing table forward entry at 0x00000500 |
| Wrote coreboot table at: 00000500, 0x10 bytes, checksum 9fe9 |
| Writing coreboot table at 0xbff4a000 |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19d00 size 80c |
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1. 0000000000001000-000000000009ffff: RAM |
| 2. 00000000000a0000-00000000000fffff: RESERVED |
| 3. 0000000000100000-000000001fffffff: RAM |
| 4. 0000000020000000-00000000201fffff: RESERVED |
| 5. 0000000020200000-000000003fffffff: RAM |
| 6. 0000000040000000-00000000401fffff: RESERVED |
| 7. 0000000040200000-00000000bff11fff: RAM |
| 8. 00000000bff12000-00000000bfffffff: CONFIGURATION TABLES |
| 9. 00000000c0000000-00000000c29fffff: RESERVED |
| 10. 00000000f8000000-00000000fbffffff: RESERVED |
| 11. 00000000fed40000-00000000fed44fff: RESERVED |
| 12. 00000000fed90000-00000000fed91fff: RESERVED |
| 13. 0000000100000000-000000023b5fffff: RAM |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| FMAP: Found "FLASH" version 1.1 at 20000. |
| FMAP: base = ff800000 size = 800000 #areas = 3 |
| Wrote coreboot table at: bff4a000, 0xbd4 bytes, checksum 4c0f |
| coreboot table: 3052 bytes. |
| IMD ROOT 0. bffff000 00001000 |
| IMD SMALL 1. bfffe000 00001000 |
| CONSOLE 2. bffde000 00020000 |
| TIME STAMP 3. bffdd000 00000400 |
| MRC DATA 4. bffdc000 000005b0 |
| ROMSTG STCK 5. bffd7000 00005000 |
| RAMSTAGE 6. bff94000 00043000 |
| 57a9e100 7. bff52000 00041a90 |
| COREBOOT 8. bff4a000 00008000 |
| ACPI 9. bff26000 00024000 |
| ACPI GNVS 10. bff25000 00001000 |
| 4f444749 11. bff23000 00002000 |
| TCPA LOG 12. bff13000 00010000 |
| SMBIOS 13. bff12000 00000800 |
| IMD small region: |
| IMD ROOT 0. bfffec00 00000400 |
| CAR GLOBALS 1. bfffeac0 00000140 |
| MEM INFO 2. bfffe960 00000141 |
| ROMSTAGE 3. bfffe940 00000004 |
| 57a9e000 4. bfffe920 00000010 |
| BS: BS_WRITE_TABLES times (us): entry 412640 run 29187 exit 0 |
| CBFS: 'Master Header Locator' located CBFS at [20100:7fffc0) |
| CBFS: Locating 'fallback/payload' |
| CBFS: Found @ offset 60e00 size 8f6ef |
| Loading segment from ROM address 0xff880f38 |
| code (compression=1) |
| New segment dstaddr 0x8200 memsize 0x17718 srcaddr 0xff880f8c filesize 0x83cd |
| Loading segment from ROM address 0xff880f54 |
| code (compression=1) |
| New segment dstaddr 0x100000 memsize 0x264c50 srcaddr 0xff889359 filesize 0x872ce |
| Loading segment from ROM address 0xff880f70 |
| Entry Point 0x00008200 |
| Loading Segment: addr: 0x0000000000008200 memsz: 0x0000000000017718 filesz: 0x00000000000083cd |
| lb: [0x00000000bff95000, 0x00000000bffd6a90) |
| Post relocation: addr: 0x0000000000008200 memsz: 0x0000000000017718 filesz: 0x00000000000083cd |
| using LZMA |
| [ 0x00008200, 00017fdb, 0x0001f918) <- ff880f8c |
| Clearing Segment: addr: 0x0000000000017fdb memsz: 0x000000000000793d |
| dest 00008200, end 0001f918, bouncebuffer ffffffff |
| Loading Segment: addr: 0x0000000000100000 memsz: 0x0000000000264c50 filesz: 0x00000000000872ce |
| lb: [0x00000000bff95000, 0x00000000bffd6a90) |
| Post relocation: addr: 0x0000000000100000 memsz: 0x0000000000264c50 filesz: 0x00000000000872ce |
| using LZMA |
| [ 0x00100000, 00364c50, 0x00364c50) <- ff889359 |
| dest 00100000, end 00364c50, bouncebuffer ffffffff |
| Loaded segments |
| BS: BS_PAYLOAD_LOAD times (us): entry 0 run 245111 exit 0 |
| PCH watchdog disabled |
| Jumping to boot code at 00008200(bff4a000) |
| CPU0: stack: bffcd000 - bffce000, lowest used address bffcda70, stack used: 1424 bytes |
| |