| |
| *** Pre-CBMEM romstage console overflowed, log truncated! *** |
| : 24T |
| Selected tWR : 10T |
| Selected tFAW : 20T |
| Selected tRRD : 4T |
| Selected tRTP : 5T |
| Selected tWTR : 5T |
| Selected tRFC : 107T |
| Done dimm mapping |
| Update PCI-E configuration space: |
| PCI(0, 0, 0)[a0] = 0 |
| PCI(0, 0, 0)[a4] = 1 |
| PCI(0, 0, 0)[bc] = 82a00000 |
| PCI(0, 0, 0)[a8] = 7b600000 |
| PCI(0, 0, 0)[ac] = 1 |
| PCI(0, 0, 0)[b8] = 80000000 |
| PCI(0, 0, 0)[b0] = 80a00000 |
| PCI(0, 0, 0)[b4] = 80800000 |
| PCI(0, 0, 0)[7c] = 7f |
| PCI(0, 0, 0)[70] = fe000000 |
| PCI(0, 0, 0)[74] = 0 |
| PCI(0, 0, 0)[78] = fe000c00 |
| Done memory map |
| Done io registers |
| Done jedec reset |
| Done MRS commands |
| t123: 1912, 6000, 7620 |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : NO |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Recovery |
| ME: Current Operation State : Bring up |
| ME: Current Operation Mode : Normal |
| ME: Error Code : No Error |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Clean Moff->Mx wake |
| ME: Progress Phase State : Waiting for DID BIOS message |
| ME: FWS2: 0x101f017a |
| ME: Bist in progress: 0x0 |
| ME: ICC Status : 0x1 |
| ME: Invoke MEBx : 0x1 |
| ME: CPU replaced : 0x1 |
| ME: MBP ready : 0x1 |
| ME: MFS failure : 0x1 |
| ME: Warm reset req : 0x0 |
| ME: CPU repl valid : 0x1 |
| ME: (Reserved) : 0x0 |
| ME: FW update req : 0x0 |
| ME: (Reserved) : 0x0 |
| ME: Current state : 0x1f |
| ME: Current PM event: 0x0 |
| ME: Progress code : 0x1 |
| Full training required |
| PASSED! Tell ME that DRAM is ready |
| ME: FWS2: 0x102c017a |
| ME: Bist in progress: 0x0 |
| ME: ICC Status : 0x1 |
| ME: Invoke MEBx : 0x1 |
| ME: CPU replaced : 0x1 |
| ME: MBP ready : 0x1 |
| ME: MFS failure : 0x1 |
| ME: Warm reset req : 0x0 |
| ME: CPU repl valid : 0x1 |
| ME: (Reserved) : 0x0 |
| ME: FW update req : 0x0 |
| ME: (Reserved) : 0x0 |
| ME: Current state : 0x2c |
| ME: Current PM event: 0x0 |
| ME: Progress code : 0x1 |
| ME: Requested BIOS Action: Continue to boot |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : NO |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Recovery |
| ME: Current Operation State : Bring up |
| ME: Current Operation Mode : Normal |
| ME: Error Code : No Error |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Clean Moff->Mx wake |
| ME: Progress Phase State : 0x2c |
| memcfg DDR3 ref clock 133 MHz |
| memcfg DDR3 clock 1330 MHz |
| memcfg channel assignment: A: 1, B 0, C 2 |
| memcfg channel[0] config (00000000): |
| ECC inactive |
| enhanced interleave mode off |
| rank interleave off |
| DIMMA 0 MB width x8 single rank, selected |
| DIMMB 0 MB width x8 single rank |
| memcfg channel[1] config (00620010): |
| ECC inactive |
| enhanced interleave mode on |
| rank interleave on |
| DIMMA 4096 MB width x8 dual rank, selected |
| DIMMB 0 MB width x8 single rank |
| CBMEM: |
| IMD: root @ 7ffff000 254 entries. |
| IMD: root @ 7fffec00 62 entries. |
| CBMEM entry for DIMM info: 0x7fffe960 |
| MTRR Range: Start=ff000000 End=0 (Size 1000000) |
| MTRR Range: Start=0 End=1000000 (Size 1000000) |
| MTRR Range: Start=7f800000 End=80000000 (Size 800000) |
| MTRR Range: Start=80000000 End=80800000 (Size 800000) |
| CBFS: 'Master Header Locator' located CBFS at [f20000:ffffc0) |
| CBFS: Locating 'fallback/ramstage' |
| CBFS: Found @ offset 18e40 size 16927 |
| Decompressing stage fallback/ramstage @ 0x7ff95fc0 (264592 bytes) |
| Loading module at 7ff96000 with entry 7ff96000. filesize: 0x2e1b0 memsize: 0x40950 |
| Processing 3002 relocs. Offset value of 0x7fe96000 |
| |
| |
| coreboot-4.7-163-g0f68b23aaf-dirty Mon Jan 29 09:41:35 UTC 2018 ramstage starting... |
| Normal boot. |
| BS: BS_PRE_DEVICE times (us): entry 0 run 0 exit 0 |
| BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 0 exit 0 |
| Enumerating buses... |
| Show all devs... Before device enumeration. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 1 |
| PCI: 00:1c.4: enabled 0 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 00ff.1: enabled 0 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 0 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| Compare with tree... |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 1 |
| PCI: 00:1c.4: enabled 0 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 00ff.1: enabled 0 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 0 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| Root Device scanning... |
| root_dev_scan_bus for Root Device |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| DOMAIN: 0000 scanning... |
| PCI: pci_scan_bus for bus 00 |
| PCI: 00:00.0 [8086/0154] ops |
| PCI: 00:00.0 [8086/0154] enabled |
| Capability: type 0x0d @ 0x88 |
| Capability: type 0x01 @ 0x80 |
| Capability: type 0x05 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| Capability: type 0x0d @ 0x88 |
| Capability: type 0x01 @ 0x80 |
| Capability: type 0x05 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| PCI: 00:01.0 subordinate bus PCI Express |
| PCI: 00:01.0 [8086/0151] disabled |
| PCI: 00:02.0 [8086/0000] ops |
| PCI: 00:02.0 [8086/0166] enabled |
| PCI: 00:04.0 [8086/0153] enabled |
| PCI: 00:14.0 [8086/0000] ops |
| PCI: 00:14.0 [8086/1e31] enabled |
| PCI: 00:16.0 [8086/1e3a] ops |
| PCI: 00:16.0 [8086/1e3a] enabled |
| PCI: 00:16.1: Disabling device |
| PCI: 00:16.1 [8086/1e3b] disabled No operations |
| PCI: 00:16.2: Disabling device |
| PCI: 00:16.2 [8086/1e3c] disabled No operations |
| PCI: 00:16.3: Disabling device |
| PCI: 00:16.3 [8086/1e3d] disabled No operations |
| PCI: 00:19.0 [8086/1502] enabled |
| PCI: 00:1a.0 [8086/0000] ops |
| PCI: 00:1a.0 [8086/1e2d] enabled |
| PCI: 00:1b.0 [8086/0000] ops |
| PCI: 00:1b.0 [8086/1e20] enabled |
| PCH: PCIe Root Port coalescing is enabled |
| PCI: 00:1c.0 [8086/0000] bus ops |
| PCI: 00:1c.0 [8086/1e10] enabled |
| PCI: 00:1c.1 [8086/0000] bus ops |
| PCI: 00:1c.1 [8086/1e12] enabled |
| PCI: 00:1c.2 [8086/0000] bus ops |
| PCI: 00:1c.2 [8086/1e14] enabled |
| PCI: 00:1c.3 [8086/0000] bus ops |
| PCI: 00:1c.3 [8086/1e16] enabled |
| PCI: 00:1c.4: Disabling device |
| PCI: 00:1c.4: check set enabled |
| PCI: 00:1c.4 [8086/0000] bus ops |
| PCI: 00:1c.4 [8086/1e18] disabled |
| PCI: 00:1c.5: Disabling device |
| PCI: 00:1c.5 [8086/0000] bus ops |
| PCI: 00:1c.5 [8086/1e1a] disabled |
| PCI: 00:1c.6: Disabling device |
| PCI: 00:1c.6 [8086/0000] bus ops |
| PCI: 00:1c.6 [8086/1e1c] disabled |
| PCI: 00:1c.7: Disabling device |
| PCH: RPFN 0x76543210 -> 0xfedc3210 |
| PCI: 00:1d.0 [8086/0000] ops |
| PCI: 00:1d.0 [8086/1e26] enabled |
| PCI: 00:1e.0: Disabling device |
| PCI: 00:1e.0 [8086/2448] bus ops |
| PCI: 00:1e.0 [8086/2448] disabled |
| PCI: 00:1f.0 [8086/0000] bus ops |
| PCI: 00:1f.0 [8086/1e55] enabled |
| PCI: 00:1f.2 [8086/0000] ops |
| CBFS: 'Master Header Locator' located CBFS at [f20000:ffffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 366c0 size 4ac |
| PCI: 00:1f.2 [8086/1e01] enabled |
| PCI: 00:1f.3: Disabling device |
| PCI: 00:1f.3 [8086/0000] bus ops |
| PCI: 00:1f.3 [8086/1e22] disabled |
| PCI: 00:1f.5: Disabling device |
| PCI: 00:1f.5 [8086/1e09] disabled No operations |
| PCI: 00:1f.6: Disabling device |
| PCI: 00:1f.6 [8086/1e24] disabled No operations |
| PCI: 00:1c.0 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.0 |
| PCI: pci_scan_bus for bus 01 |
| scan_bus: scanning of bus PCI: 00:1c.0 took 51 usecs |
| PCI: 00:1c.1 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.1 |
| PCI: pci_scan_bus for bus 02 |
| scan_bus: scanning of bus PCI: 00:1c.1 took 51 usecs |
| PCI: 00:1c.2 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.2 |
| PCI: pci_scan_bus for bus 03 |
| PCI: 03:00.0 [197b/2392] enabled |
| PCI: 03:00.2 [197b/2391] enabled |
| PCI: 03:00.3 [197b/2393] enabled |
| PCI: 03:00.4 [197b/2394] enabled |
| Capability: type 0x01 @ 0xa4 |
| Capability: type 0x10 @ 0x80 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpoint |
| ASPM: Enabled None |
| Capability: type 0x01 @ 0xa4 |
| Capability: type 0x10 @ 0x80 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpoint |
| ASPM: Enabled None |
| Capability: type 0x01 @ 0xa4 |
| Capability: type 0x10 @ 0x80 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpoint |
| ASPM: Enabled None |
| Capability: type 0x01 @ 0xa4 |
| Capability: type 0x10 @ 0x80 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpoint |
| ASPM: Enabled None |
| Capability: type 0x01 @ 0xa4 |
| Capability: type 0x10 @ 0x80 |
| Failed to enable LTR for dev = PCI: 03:00.0 |
| Capability: type 0x01 @ 0xa4 |
| Capability: type 0x10 @ 0x80 |
| Failed to enable LTR for dev = PCI: 03:00.2 |
| Capability: type 0x01 @ 0xa4 |
| Capability: type 0x10 @ 0x80 |
| Failed to enable LTR for dev = PCI: 03:00.3 |
| Capability: type 0x01 @ 0xa4 |
| Capability: type 0x10 @ 0x80 |
| Failed to enable LTR for dev = PCI: 03:00.4 |
| scan_bus: scanning of bus PCI: 00:1c.2 took 661 usecs |
| PCI: 00:1c.3 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.3 |
| PCI: pci_scan_bus for bus 04 |
| PCI: 04:00.0 [168c/0030] enabled |
| Capability: type 0x01 @ 0x40 |
| Capability: type 0x05 @ 0x50 |
| Capability: type 0x10 @ 0x70 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpoint |
| ASPM: Enabled L0s and L1 |
| Capability: type 0x01 @ 0x40 |
| Capability: type 0x05 @ 0x50 |
| Capability: type 0x10 @ 0x70 |
| Failed to enable LTR for dev = PCI: 04:00.0 |
| scan_bus: scanning of bus PCI: 00:1c.3 took 216 usecs |
| PCI: 00:1f.0 scanning... |
| scan_lpc_bus for PCI: 00:1f.0 |
| KBC1126: initialize fan control.KBC1126: fan control initialized. |
| PNP: 00ff.1 disabled |
| scan_lpc_bus for PCI: 00:1f.0 done |
| scan_bus: scanning of bus PCI: 00:1f.0 took 7688 usecs |
| scan_bus: scanning of bus DOMAIN: 0000 took 9113 usecs |
| root_dev_scan_bus for Root Device done |
| scan_bus: scanning of bus Root Device took 9120 usecs |
| done |
| FMAP: Found "FLASH" version 1.1 at f00000. |
| FMAP: base = ff000000 size = 1000000 #areas = 4 |
| FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes) |
| MRC: Checking cached data update for 'RW_MRC_CACHE'. |
| Manufacturer: ef |
| SF: Detected W25Q128 with sector size 0x1000, total 0x1000000 |
| MRC: no data in 'RW_MRC_CACHE' |
| MRC: cache data 'RW_MRC_CACHE' needs update. |
| BS: BS_DEV_ENUMERATE times (us): entry 0 run 9201 exit 5455 |
| found VGA at PCI: 00:02.0 |
| Setting up VGA for PCI: 00:02.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| Allocating resources... |
| Reading resources... |
| Root Device read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 |
| Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000. |
| PCI: 00:1c.0 read_resources bus 1 link: 0 |
| PCI: 00:1c.0 read_resources bus 1 link: 0 done |
| PCI: 00:1c.1 read_resources bus 2 link: 0 |
| PCI: 00:1c.1 read_resources bus 2 link: 0 done |
| PCI: 00:1c.2 read_resources bus 3 link: 0 |
| PCI: 00:1c.2 read_resources bus 3 link: 0 done |
| PCI: 00:1c.3 read_resources bus 4 link: 0 |
| PCI: 00:1c.3 read_resources bus 4 link: 0 done |
| PCI: 00:1f.0 read_resources bus 0 link: 0 |
| PCI: 00:1f.0 read_resources bus 0 link: 0 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 done |
| Root Device read_resources bus 0 link: 0 done |
| Done reading resources. |
| Show resources in subtree (Root Device)...After reading. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: acac |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 |
| PCI: 00:00.0 |
| PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 |
| PCI: 00:01.0 |
| PCI: 00:02.0 |
| PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18 |
| PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20 |
| PCI: 00:04.0 |
| PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:14.0 |
| PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:16.0 |
| PCI: 00:16.0 resource base 0 size 10 align 12 gran 4 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:19.0 |
| PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 |
| PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 |
| PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 |
| PCI: 00:1a.0 |
| PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:1c.0 |
| PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 00:1c.1 child on link 0 NONE |
| PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| NONE |
| NONE resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10 |
| NONE resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14 |
| NONE resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18 |
| PCI: 00:1c.2 child on link 0 PCI: 03:00.0 |
| PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 03:00.0 |
| PCI: 03:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| PCI: 03:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30 |
| PCI: 03:00.2 |
| PCI: 03:00.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| PCI: 03:00.3 |
| PCI: 03:00.3 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| PCI: 03:00.4 |
| PCI: 03:00.4 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| NONE |
| NONE resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10 |
| NONE resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14 |
| NONE resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18 |
| PCI: 00:1c.3 child on link 0 PCI: 04:00.0 |
| PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 04:00.0 |
| PCI: 04:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10 |
| PCI: 04:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30 |
| PCI: 00:1c.4 |
| PCI: 00:1c.5 |
| PCI: 00:1c.6 |
| PCI: 00:1c.7 |
| PCI: 00:1d.0 |
| PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| PCI: 00:1e.0 |
| PCI: 00:1f.0 child on link 0 PNP: 00ff.1 |
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PCI: 00:1f.0 resource base fe00 size fc align 0 gran 0 limit 0 flags c0040100 index 10000200 |
| PNP: 00ff.1 |
| PCI: 00:1f.2 |
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 |
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 |
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 |
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c |
| PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 |
| PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24 |
| PCI: 00:1f.3 |
| PCI: 00:1f.5 |
| PCI: 00:1f.6 |
| DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff |
| PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| NONE 18 * [0x0 - 0xfff] io |
| PCI: 00:1c.1 io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| NONE 18 * [0x0 - 0xfff] io |
| PCI: 00:1c.2 io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.1 1c * [0x0 - 0xfff] io |
| PCI: 00:1c.2 1c * [0x1000 - 0x1fff] io |
| PCI: 00:02.0 20 * [0x2000 - 0x203f] io |
| PCI: 00:19.0 18 * [0x2040 - 0x205f] io |
| PCI: 00:1f.2 20 * [0x2060 - 0x207f] io |
| PCI: 00:1f.2 10 * [0x2080 - 0x2087] io |
| PCI: 00:1f.2 18 * [0x2088 - 0x208f] io |
| PCI: 00:1f.2 14 * [0x2090 - 0x2093] io |
| PCI: 00:1f.2 1c * [0x2094 - 0x2097] io |
| DOMAIN: 0000 io: base: 2098 size: 2098 align: 12 gran: 0 limit: ffff done |
| DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff |
| PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| NONE 14 * [0x0 - 0x7fffff] prefmem |
| PCI: 00:1c.1 prefmem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done |
| PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| NONE 10 * [0x0 - 0x7fffff] mem |
| PCI: 00:1c.1 mem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done |
| PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| NONE 14 * [0x0 - 0x7fffff] prefmem |
| PCI: 00:1c.2 prefmem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done |
| PCI: 00:1c.2 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| NONE 10 * [0x0 - 0x7fffff] mem |
| PCI: 03:00.0 30 * [0x800000 - 0x80ffff] mem |
| PCI: 03:00.0 10 * [0x810000 - 0x8100ff] mem |
| PCI: 03:00.2 10 * [0x811000 - 0x8110ff] mem |
| PCI: 03:00.3 10 * [0x812000 - 0x8120ff] mem |
| PCI: 03:00.4 10 * [0x813000 - 0x8130ff] mem |
| PCI: 00:1c.2 mem: base: 813100 size: 900000 align: 22 gran: 20 limit: ffffffff done |
| PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.3 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 04:00.0 10 * [0x0 - 0x1ffff] mem |
| PCI: 04:00.0 30 * [0x20000 - 0x2ffff] mem |
| PCI: 00:1c.3 mem: base: 30000 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem |
| PCI: 00:1c.2 20 * [0x10000000 - 0x108fffff] mem |
| PCI: 00:1c.1 24 * [0x10c00000 - 0x113fffff] prefmem |
| PCI: 00:1c.1 20 * [0x11400000 - 0x11bfffff] mem |
| PCI: 00:1c.2 24 * [0x11c00000 - 0x123fffff] prefmem |
| PCI: 00:02.0 10 * [0x12400000 - 0x127fffff] mem |
| PCI: 00:1c.3 20 * [0x12800000 - 0x128fffff] mem |
| PCI: 00:19.0 10 * [0x12900000 - 0x1291ffff] mem |
| PCI: 00:14.0 10 * [0x12920000 - 0x1292ffff] mem |
| PCI: 00:04.0 10 * [0x12930000 - 0x12937fff] mem |
| PCI: 00:1b.0 10 * [0x12938000 - 0x1293bfff] mem |
| PCI: 00:19.0 14 * [0x1293c000 - 0x1293cfff] mem |
| PCI: 00:1f.2 24 * [0x1293d000 - 0x1293d7ff] mem |
| PCI: 00:1a.0 10 * [0x1293e000 - 0x1293e3ff] mem |
| PCI: 00:1d.0 10 * [0x1293f000 - 0x1293f3ff] mem |
| PCI: 00:16.0 10 * [0x12940000 - 0x1294000f] mem |
| DOMAIN: 0000 mem: base: 12940010 size: 12940010 align: 28 gran: 0 limit: ffffffff done |
| avoid_fixed_resources: DOMAIN: 0000 |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff |
| constrain_resources: PCI: 00:00.0 60 base f8000000 limit fbffffff mem (fixed) |
| constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed) |
| constrain_resources: PCI: 00:1f.0 10000200 base 0000fe00 limit 0000fefb io (fixed) |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000fdff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 base e0000000 limit f7ffffff |
| Setting resources... |
| DOMAIN: 0000 io: base:1000 size:2098 align:12 gran:0 limit:fdff |
| PCI: 00:1c.1 1c * [0x1000 - 0x1fff] io |
| PCI: 00:1c.2 1c * [0x2000 - 0x2fff] io |
| PCI: 00:02.0 20 * [0x3000 - 0x303f] io |
| PCI: 00:19.0 18 * [0x3040 - 0x305f] io |
| PCI: 00:1f.2 20 * [0x3060 - 0x307f] io |
| PCI: 00:1f.2 10 * [0x3080 - 0x3087] io |
| PCI: 00:1f.2 18 * [0x3088 - 0x308f] io |
| PCI: 00:1f.2 14 * [0x3090 - 0x3093] io |
| PCI: 00:1f.2 1c * [0x3094 - 0x3097] io |
| DOMAIN: 0000 io: next_base: 3098 size: 2098 align: 12 gran: 0 done |
| PCI: 00:1c.0 io: base:fdff size:0 align:12 gran:12 limit:fdff |
| PCI: 00:1c.0 io: next_base: fdff size: 0 align: 12 gran: 12 done |
| PCI: 00:1c.1 io: base:1000 size:1000 align:12 gran:12 limit:1fff |
| NONE 18 * [0x1000 - 0x1fff] io |
| PCI: 00:1c.1 io: next_base: 2000 size: 1000 align: 12 gran: 12 done |
| PCI: 00:1c.2 io: base:2000 size:1000 align:12 gran:12 limit:2fff |
| NONE 18 * [0x2000 - 0x2fff] io |
| PCI: 00:1c.2 io: next_base: 3000 size: 1000 align: 12 gran: 12 done |
| PCI: 00:1c.3 io: base:fdff size:0 align:12 gran:12 limit:fdff |
| PCI: 00:1c.3 io: next_base: fdff size: 0 align: 12 gran: 12 done |
| DOMAIN: 0000 mem: base:e0000000 size:12940010 align:28 gran:0 limit:f7ffffff |
| PCI: 00:02.0 18 * [0xe0000000 - 0xefffffff] prefmem |
| PCI: 00:1c.2 20 * [0xf0000000 - 0xf08fffff] mem |
| PCI: 00:1c.1 24 * [0xf0c00000 - 0xf13fffff] prefmem |
| PCI: 00:1c.1 20 * [0xf1400000 - 0xf1bfffff] mem |
| PCI: 00:1c.2 24 * [0xf1c00000 - 0xf23fffff] prefmem |
| PCI: 00:02.0 10 * [0xf2400000 - 0xf27fffff] mem |
| PCI: 00:1c.3 20 * [0xf2800000 - 0xf28fffff] mem |
| PCI: 00:19.0 10 * [0xf2900000 - 0xf291ffff] mem |
| PCI: 00:14.0 10 * [0xf2920000 - 0xf292ffff] mem |
| PCI: 00:04.0 10 * [0xf2930000 - 0xf2937fff] mem |
| PCI: 00:1b.0 10 * [0xf2938000 - 0xf293bfff] mem |
| PCI: 00:19.0 14 * [0xf293c000 - 0xf293cfff] mem |
| PCI: 00:1f.2 24 * [0xf293d000 - 0xf293d7ff] mem |
| PCI: 00:1a.0 10 * [0xf293e000 - 0xf293e3ff] mem |
| PCI: 00:1d.0 10 * [0xf293f000 - 0xf293f3ff] mem |
| PCI: 00:16.0 10 * [0xf2940000 - 0xf294000f] mem |
| DOMAIN: 0000 mem: next_base: f2940010 size: 12940010 align: 28 gran: 0 done |
| PCI: 00:1c.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:1c.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.0 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:1c.0 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.1 prefmem: base:f0c00000 size:800000 align:22 gran:20 limit:f13fffff |
| NONE 14 * [0xf0c00000 - 0xf13fffff] prefmem |
| PCI: 00:1c.1 prefmem: next_base: f1400000 size: 800000 align: 22 gran: 20 done |
| PCI: 00:1c.1 mem: base:f1400000 size:800000 align:22 gran:20 limit:f1bfffff |
| NONE 10 * [0xf1400000 - 0xf1bfffff] mem |
| PCI: 00:1c.1 mem: next_base: f1c00000 size: 800000 align: 22 gran: 20 done |
| PCI: 00:1c.2 prefmem: base:f1c00000 size:800000 align:22 gran:20 limit:f23fffff |
| NONE 14 * [0xf1c00000 - 0xf23fffff] prefmem |
| PCI: 00:1c.2 prefmem: next_base: f2400000 size: 800000 align: 22 gran: 20 done |
| PCI: 00:1c.2 mem: base:f0000000 size:900000 align:22 gran:20 limit:f08fffff |
| NONE 10 * [0xf0000000 - 0xf07fffff] mem |
| PCI: 03:00.0 30 * [0xf0800000 - 0xf080ffff] mem |
| PCI: 03:00.0 10 * [0xf0810000 - 0xf08100ff] mem |
| PCI: 03:00.2 10 * [0xf0811000 - 0xf08110ff] mem |
| PCI: 03:00.3 10 * [0xf0812000 - 0xf08120ff] mem |
| PCI: 03:00.4 10 * [0xf0813000 - 0xf08130ff] mem |
| PCI: 00:1c.2 mem: next_base: f0813100 size: 900000 align: 22 gran: 20 done |
| PCI: 00:1c.3 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:1c.3 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.3 mem: base:f2800000 size:100000 align:20 gran:20 limit:f28fffff |
| PCI: 04:00.0 10 * [0xf2800000 - 0xf281ffff] mem |
| PCI: 04:00.0 30 * [0xf2820000 - 0xf282ffff] mem |
| PCI: 00:1c.3 mem: next_base: f2830000 size: 100000 align: 20 gran: 20 done |
| Root Device assign_resources, bus 0 link: 0 |
| TOUUD 0x17b600000 TOLUD 0x82a00000 TOM 0x100000000 |
| MEBASE 0xfe000000 |
| IGD decoded, subtracting 32M UMA and 2M GTT |
| TSEG base 0x80000000 size 8M |
| Available memory below 4GB: 2048M |
| Available memory above 4GB: 1974M |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| PCI: 00:02.0 10 <- [0x00f2400000 - 0x00f27fffff] size 0x00400000 gran 0x16 mem64 |
| PCI: 00:02.0 18 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem64 |
| PCI: 00:02.0 20 <- [0x0000003000 - 0x000000303f] size 0x00000040 gran 0x06 io |
| PCI: 00:04.0 10 <- [0x00f2930000 - 0x00f2937fff] size 0x00008000 gran 0x0f mem64 |
| PCI: 00:14.0 10 <- [0x00f2920000 - 0x00f292ffff] size 0x00010000 gran 0x10 mem64 |
| PCI: 00:16.0 10 <- [0x00f2940000 - 0x00f294000f] size 0x00000010 gran 0x04 mem64 |
| PCI: 00:19.0 10 <- [0x00f2900000 - 0x00f291ffff] size 0x00020000 gran 0x11 mem |
| PCI: 00:19.0 14 <- [0x00f293c000 - 0x00f293cfff] size 0x00001000 gran 0x0c mem |
| PCI: 00:19.0 18 <- [0x0000003040 - 0x000000305f] size 0x00000020 gran 0x05 io |
| PCI: 00:1a.0 10 <- [0x00f293e000 - 0x00f293e3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1b.0 10 <- [0x00f2938000 - 0x00f293bfff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:1c.0 1c <- [0x000000fdff - 0x000000fdfe] size 0x00000000 gran 0x0c bus 01 io |
| PCI: 00:1c.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 prefmem |
| PCI: 00:1c.0 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 mem |
| PCI: 00:1c.1 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 02 io |
| PCI: 00:1c.1 24 <- [0x00f0c00000 - 0x00f13fffff] size 0x00800000 gran 0x14 bus 02 prefmem |
| PCI: 00:1c.1 20 <- [0x00f1400000 - 0x00f1bfffff] size 0x00800000 gran 0x14 bus 02 mem |
| PCI: 00:1c.1 assign_resources, bus 2 link: 0 |
| NONE missing set_resources |
| PCI: 00:1c.1 assign_resources, bus 2 link: 0 |
| PCI: 00:1c.2 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 03 io |
| PCI: 00:1c.2 24 <- [0x00f1c00000 - 0x00f23fffff] size 0x00800000 gran 0x14 bus 03 prefmem |
| PCI: 00:1c.2 20 <- [0x00f0000000 - 0x00f08fffff] size 0x00900000 gran 0x14 bus 03 mem |
| PCI: 00:1c.2 assign_resources, bus 3 link: 0 |
| PCI: 03:00.0 10 <- [0x00f0810000 - 0x00f08100ff] size 0x00000100 gran 0x08 mem |
| PCI: 03:00.0 30 <- [0x00f0800000 - 0x00f080ffff] size 0x00010000 gran 0x10 romem |
| PCI: 03:00.2 10 <- [0x00f0811000 - 0x00f08110ff] size 0x00000100 gran 0x08 mem |
| PCI: 03:00.3 10 <- [0x00f0812000 - 0x00f08120ff] size 0x00000100 gran 0x08 mem |
| PCI: 03:00.4 10 <- [0x00f0813000 - 0x00f08130ff] size 0x00000100 gran 0x08 mem |
| NONE missing set_resources |
| PCI: 00:1c.2 assign_resources, bus 3 link: 0 |
| PCI: 00:1c.3 1c <- [0x000000fdff - 0x000000fdfe] size 0x00000000 gran 0x0c bus 04 io |
| PCI: 00:1c.3 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 04 prefmem |
| PCI: 00:1c.3 20 <- [0x00f2800000 - 0x00f28fffff] size 0x00100000 gran 0x14 bus 04 mem |
| PCI: 00:1c.3 assign_resources, bus 4 link: 0 |
| PCI: 04:00.0 10 <- [0x00f2800000 - 0x00f281ffff] size 0x00020000 gran 0x11 mem64 |
| PCI: 04:00.0 30 <- [0x00f2820000 - 0x00f282ffff] size 0x00010000 gran 0x10 romem |
| PCI: 00:1c.3 assign_resources, bus 4 link: 0 |
| PCI: 00:1d.0 10 <- [0x00f293f000 - 0x00f293f3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1f.0 assign_resources, bus 0 link: 0 |
| PCI: 00:1f.0 assign_resources, bus 0 link: 0 |
| PCI: 00:1f.2 10 <- [0x0000003080 - 0x0000003087] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 14 <- [0x0000003090 - 0x0000003093] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 18 <- [0x0000003088 - 0x000000308f] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 1c <- [0x0000003094 - 0x0000003097] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 20 <- [0x0000003060 - 0x000000307f] size 0x00000020 gran 0x05 io |
| PCI: 00:1f.2 24 <- [0x00f293d000 - 0x00f293d7ff] size 0x00000800 gran 0x0b mem |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| Root Device assign_resources, bus 0 link: 0 |
| Done setting resources. |
| Show resources in subtree (Root Device)...After assigning values. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: acac |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 1000 size 2098 align 12 gran 0 limit fdff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base e0000000 size 12940010 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100 |
| DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 |
| DOMAIN: 0000 resource base 100000 size 7ff00000 align 0 gran 0 limit 0 flags e0004200 index 4 |
| DOMAIN: 0000 resource base 100000000 size 7b600000 align 0 gran 0 limit 0 flags e0004200 index 5 |
| DOMAIN: 0000 resource base 80000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6 |
| DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7 |
| DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8 |
| DOMAIN: 0000 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9 |
| DOMAIN: 0000 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a |
| PCI: 00:00.0 |
| PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 |
| PCI: 00:01.0 |
| PCI: 00:02.0 |
| PCI: 00:02.0 resource base f2400000 size 400000 align 22 gran 22 limit f27fffff flags 60000201 index 10 |
| PCI: 00:02.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001201 index 18 |
| PCI: 00:02.0 resource base 3000 size 40 align 6 gran 6 limit 303f flags 60000100 index 20 |
| PCI: 00:04.0 |
| PCI: 00:04.0 resource base f2930000 size 8000 align 15 gran 15 limit f2937fff flags 60000201 index 10 |
| PCI: 00:14.0 |
| PCI: 00:14.0 resource base f2920000 size 10000 align 16 gran 16 limit f292ffff flags 60000201 index 10 |
| PCI: 00:16.0 |
| PCI: 00:16.0 resource base f2940000 size 10 align 12 gran 4 limit f294000f flags 60000201 index 10 |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:19.0 |
| PCI: 00:19.0 resource base f2900000 size 20000 align 17 gran 17 limit f291ffff flags 60000200 index 10 |
| PCI: 00:19.0 resource base f293c000 size 1000 align 12 gran 12 limit f293cfff flags 60000200 index 14 |
| PCI: 00:19.0 resource base 3040 size 20 align 5 gran 5 limit 305f flags 60000100 index 18 |
| PCI: 00:1a.0 |
| PCI: 00:1a.0 resource base f293e000 size 400 align 12 gran 10 limit f293e3ff flags 60000200 index 10 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base f2938000 size 4000 align 14 gran 14 limit f293bfff flags 60000201 index 10 |
| PCI: 00:1c.0 |
| PCI: 00:1c.0 resource base fdff size 0 align 12 gran 12 limit fdff flags 60080102 index 1c |
| PCI: 00:1c.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 |
| PCI: 00:1c.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20 |
| PCI: 00:1c.1 child on link 0 NONE |
| PCI: 00:1c.1 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c |
| PCI: 00:1c.1 resource base f0c00000 size 800000 align 22 gran 20 limit f13fffff flags 60081202 index 24 |
| PCI: 00:1c.1 resource base f1400000 size 800000 align 22 gran 20 limit f1bfffff flags 60080202 index 20 |
| NONE |
| NONE resource base f1400000 size 800000 align 22 gran 22 limit f1bfffff flags 40000200 index 10 |
| NONE resource base f0c00000 size 800000 align 22 gran 22 limit f13fffff flags 40001200 index 14 |
| NONE resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 40000100 index 18 |
| PCI: 00:1c.2 child on link 0 PCI: 03:00.0 |
| PCI: 00:1c.2 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c |
| PCI: 00:1c.2 resource base f1c00000 size 800000 align 22 gran 20 limit f23fffff flags 60081202 index 24 |
| PCI: 00:1c.2 resource base f0000000 size 900000 align 22 gran 20 limit f08fffff flags 60080202 index 20 |
| PCI: 03:00.0 |
| PCI: 03:00.0 resource base f0810000 size 100 align 12 gran 8 limit f08100ff flags 60000200 index 10 |
| PCI: 03:00.0 resource base f0800000 size 10000 align 16 gran 16 limit f080ffff flags 60002200 index 30 |
| PCI: 03:00.2 |
| PCI: 03:00.2 resource base f0811000 size 100 align 12 gran 8 limit f08110ff flags 60000200 index 10 |
| PCI: 03:00.3 |
| PCI: 03:00.3 resource base f0812000 size 100 align 12 gran 8 limit f08120ff flags 60000200 index 10 |
| PCI: 03:00.4 |
| PCI: 03:00.4 resource base f0813000 size 100 align 12 gran 8 limit f08130ff flags 60000200 index 10 |
| NONE |
| NONE resource base f0000000 size 800000 align 22 gran 22 limit f07fffff flags 40000200 index 10 |
| NONE resource base f1c00000 size 800000 align 22 gran 22 limit f23fffff flags 40001200 index 14 |
| NONE resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 40000100 index 18 |
| PCI: 00:1c.3 child on link 0 PCI: 04:00.0 |
| PCI: 00:1c.3 resource base fdff size 0 align 12 gran 12 limit fdff flags 60080102 index 1c |
| PCI: 00:1c.3 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 |
| PCI: 00:1c.3 resource base f2800000 size 100000 align 20 gran 20 limit f28fffff flags 60080202 index 20 |
| PCI: 04:00.0 |
| PCI: 04:00.0 resource base f2800000 size 20000 align 17 gran 17 limit f281ffff flags 60000201 index 10 |
| PCI: 04:00.0 resource base f2820000 size 10000 align 16 gran 16 limit f282ffff flags 60002200 index 30 |
| PCI: 00:1c.4 |
| PCI: 00:1c.5 |
| PCI: 00:1c.6 |
| PCI: 00:1c.7 |
| PCI: 00:1d.0 |
| PCI: 00:1d.0 resource base f293f000 size 400 align 12 gran 10 limit f293f3ff flags 60000200 index 10 |
| PCI: 00:1e.0 |
| PCI: 00:1f.0 child on link 0 PNP: 00ff.1 |
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PCI: 00:1f.0 resource base fe00 size fc align 0 gran 0 limit 0 flags c0040100 index 10000200 |
| PNP: 00ff.1 |
| PCI: 00:1f.2 |
| PCI: 00:1f.2 resource base 3080 size 8 align 3 gran 3 limit 3087 flags 60000100 index 10 |
| PCI: 00:1f.2 resource base 3090 size 4 align 2 gran 2 limit 3093 flags 60000100 index 14 |
| PCI: 00:1f.2 resource base 3088 size 8 align 3 gran 3 limit 308f flags 60000100 index 18 |
| PCI: 00:1f.2 resource base 3094 size 4 align 2 gran 2 limit 3097 flags 60000100 index 1c |
| PCI: 00:1f.2 resource base 3060 size 20 align 5 gran 5 limit 307f flags 60000100 index 20 |
| PCI: 00:1f.2 resource base f293d000 size 800 align 12 gran 11 limit f293d7ff flags 60000200 index 24 |
| PCI: 00:1f.3 |
| PCI: 00:1f.5 |
| PCI: 00:1f.6 |
| Done allocating resources. |
| BS: BS_DEV_RESOURCES times (us): entry 0 run 2387 exit 0 |
| Enabling resources... |
| PCI: 00:00.0 subsystem <- 103c/17df |
| PCI: 00:00.0 cmd <- 06 |
| PCI: 00:02.0 subsystem <- 103c/17df |
| PCI: 00:02.0 cmd <- 03 |
| PCI: 00:04.0 cmd <- 02 |
| PCI: 00:14.0 subsystem <- 103c/17df |
| PCI: 00:14.0 cmd <- 102 |
| PCI: 00:16.0 subsystem <- 103c/17df |
| PCI: 00:16.0 cmd <- 02 |
| PCI: 00:19.0 subsystem <- 103c/17df |
| PCI: 00:19.0 cmd <- 103 |
| PCI: 00:1a.0 subsystem <- 103c/17df |
| PCI: 00:1a.0 cmd <- 102 |
| PCI: 00:1b.0 subsystem <- 103c/17df |
| PCI: 00:1b.0 cmd <- 102 |
| PCI: 00:1c.0 bridge ctrl <- 0003 |
| PCI: 00:1c.0 subsystem <- 103c/17df |
| PCI: 00:1c.0 cmd <- 100 |
| PCI: 00:1c.1 bridge ctrl <- 0003 |
| PCI: 00:1c.1 subsystem <- 103c/17df |
| PCI: 00:1c.1 cmd <- 107 |
| PCI: 00:1c.2 bridge ctrl <- 0003 |
| PCI: 00:1c.2 subsystem <- 103c/17df |
| PCI: 00:1c.2 cmd <- 107 |
| PCI: 00:1c.3 bridge ctrl <- 0003 |
| PCI: 00:1c.3 subsystem <- 103c/17df |
| PCI: 00:1c.3 cmd <- 106 |
| PCI: 00:1d.0 subsystem <- 103c/17df |
| PCI: 00:1d.0 cmd <- 102 |
| pch_decode_init |
| PCI: 00:1f.0 subsystem <- 103c/17df |
| PCI: 00:1f.0 cmd <- 107 |
| PCI: 00:1f.2 subsystem <- 103c/17df |
| PCI: 00:1f.2 cmd <- 03 |
| PCI: 03:00.0 cmd <- 06 |
| PCI: 03:00.2 cmd <- 06 |
| PCI: 03:00.3 cmd <- 06 |
| PCI: 03:00.4 cmd <- 06 |
| PCI: 04:00.0 cmd <- 02 |
| done. |
| BS: BS_DEV_ENABLE times (us): entry 0 run 125 exit 0 |
| Initializing devices... |
| Root Device init ... |
| Root Device init finished in 0 usecs |
| CPU_CLUSTER: 0 init ... |
| start_eip=0x00001000, code_size=0x00000031 |
| Setting up SMI for CPU |
| Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8 |
| Processing 12 relocs. Offset value of 0x00038000 |
| Adjusting 00038002: 0x00000024 -> 0x00038024 |
| Adjusting 0003801d: 0x0000003c -> 0x0003803c |
| Adjusting 00038026: 0x00000024 -> 0x00038024 |
| Adjusting 00038054: 0x00000120 -> 0x00038120 |
| Adjusting 00038066: 0x000001a8 -> 0x000381a8 |
| Adjusting 0003806f: 0x00000100 -> 0x00038100 |
| Adjusting 00038077: 0x00000104 -> 0x00038104 |
| Adjusting 00038081: 0x00000110 -> 0x00038110 |
| Adjusting 0003808a: 0x00000114 -> 0x00038114 |
| Adjusting 000380ab: 0x00000118 -> 0x00038118 |
| Adjusting 000380b2: 0x0000010c -> 0x0003810c |
| Adjusting 000380b8: 0x00000108 -> 0x00038108 |
| SMM Module: stub loaded at 00038000. Will call 7ffb14e6(7ffd28c0) |
| Installing SMM handler to 0x80000000 |
| Loading module at 80010000 with entry 80010561. filesize: 0x15d0 memsize: 0x55f0 |
| Processing 68 relocs. Offset value of 0x80010000 |
| Adjusting 80010036: 0x000014ac -> 0x800114ac |
| Adjusting 80010055: 0x000014ac -> 0x800114ac |
| Adjusting 80010108: 0x000014ac -> 0x800114ac |
| Adjusting 8001019d: 0x000014bc -> 0x800114bc |
| Adjusting 800104d8: 0x000015d0 -> 0x800115d0 |
| Adjusting 8001052e: 0x000015c8 -> 0x800115c8 |
| Adjusting 80010544: 0x00001520 -> 0x80011520 |
| Adjusting 8001056a: 0x000015d0 -> 0x800115d0 |
| Adjusting 80010578: 0x000015d0 -> 0x800115d0 |
| Adjusting 80010585: 0x000015c0 -> 0x800115c0 |
| Adjusting 80010590: 0x000015c0 -> 0x800115c0 |
| Adjusting 800105a4: 0x000015c4 -> 0x800115c4 |
| Adjusting 800105aa: 0x000015d4 -> 0x800115d4 |
| Adjusting 800105b2: 0x000015c4 -> 0x800115c4 |
| Adjusting 800105cf: 0x000015d4 -> 0x800115d4 |
| Adjusting 800105d8: 0x000015c0 -> 0x800115c0 |
| Adjusting 800105ef: 0x000015d8 -> 0x800115d8 |
| Adjusting 800105ff: 0x000015d8 -> 0x800115d8 |
| Adjusting 80010625: 0x000015d8 -> 0x800115d8 |
| Adjusting 8001068d: 0x000014dc -> 0x800114dc |
| Adjusting 80010784: 0x00001498 -> 0x80011498 |
| Adjusting 80010a80: 0x000015dc -> 0x800115dc |
| Adjusting 80010aaf: 0x000015e0 -> 0x800115e0 |
| Adjusting 80010ac2: 0x000015dc -> 0x800115dc |
| Adjusting 80010ae5: 0x000015e0 -> 0x800115e0 |
| Adjusting 80010ba8: 0x000015dc -> 0x800115dc |
| Adjusting 80010de0: 0x000015e0 -> 0x800115e0 |
| Adjusting 80010fe7: 0x000015e0 -> 0x800115e0 |
| Adjusting 800110c6: 0x000015c8 -> 0x800115c8 |
| Adjusting 800110d6: 0x000015c8 -> 0x800115c8 |
| Adjusting 800110eb: 0x000015c8 -> 0x800115c8 |
| Adjusting 8001110c: 0x000015c8 -> 0x800115c8 |
| Adjusting 80011139: 0x000015c8 -> 0x800115c8 |
| Adjusting 80011159: 0x000015c8 -> 0x800115c8 |
| Adjusting 8001116f: 0x000015ec -> 0x800115ec |
| Adjusting 800111bd: 0x000015ec -> 0x800115ec |
| Adjusting 800111c3: 0x000015e8 -> 0x800115e8 |
| Adjusting 800111cb: 0x000015e4 -> 0x800115e4 |
| Adjusting 800111e8: 0x000015e4 -> 0x800115e4 |
| Adjusting 80011203: 0x000015c8 -> 0x800115c8 |
| Adjusting 80011259: 0x000015e8 -> 0x800115e8 |
| Adjusting 800112af: 0x000014ec -> 0x800114ec |
| Adjusting 800112cc: 0x000015c8 -> 0x800115c8 |
| Adjusting 800112eb: 0x00001500 -> 0x80011500 |
| Adjusting 800112f0: 0x000015e8 -> 0x800115e8 |
| Adjusting 800113c1: 0x000015c8 -> 0x800115c8 |
| Adjusting 800113ef: 0x000015c8 -> 0x800115c8 |
| Adjusting 8001141d: 0x000015c8 -> 0x800115c8 |
| Adjusting 80011443: 0x000015c8 -> 0x800115c8 |
| Adjusting 80011450: 0x000015e8 -> 0x800115e8 |
| Adjusting 80011464: 0x000015c8 -> 0x800115c8 |
| Adjusting 80011490: 0x00001478 -> 0x80011478 |
| Adjusting 80011498: 0x00000021 -> 0x80010021 |
| Adjusting 8001149c: 0x00001478 -> 0x80011478 |
| Adjusting 800114a4: 0x00000092 -> 0x80010092 |
| Adjusting 800114b0: 0x000014c8 -> 0x800114c8 |
| Adjusting 800114c8: 0x000002a4 -> 0x800102a4 |
| Adjusting 800114cc: 0x000002b0 -> 0x800102b0 |
| Adjusting 800114d0: 0x000002b3 -> 0x800102b3 |
| Adjusting 80011530: 0x00001296 -> 0x80011296 |
| Adjusting 80011534: 0x0000111c -> 0x8001111c |
| Adjusting 80011540: 0x0000141a -> 0x8001141a |
| Adjusting 80011544: 0x000010c3 -> 0x800110c3 |
| Adjusting 80011548: 0x000010e4 -> 0x800110e4 |
| Adjusting 8001154c: 0x000010df -> 0x800110df |
| Adjusting 80011554: 0x00001200 -> 0x80011200 |
| Adjusting 80011558: 0x000010d3 -> 0x800110d3 |
| Adjusting 80011574: 0x00001244 -> 0x80011244 |
| Loading module at 80008000 with entry 80008000. filesize: 0x1a8 memsize: 0x1a8 |
| Processing 12 relocs. Offset value of 0x80008000 |
| Adjusting 80008002: 0x00000024 -> 0x80008024 |
| Adjusting 8000801d: 0x0000003c -> 0x8000803c |
| Adjusting 80008026: 0x00000024 -> 0x80008024 |
| Adjusting 80008054: 0x00000120 -> 0x80008120 |
| Adjusting 80008066: 0x000001a8 -> 0x800081a8 |
| Adjusting 8000806f: 0x00000100 -> 0x80008100 |
| Adjusting 80008077: 0x00000104 -> 0x80008104 |
| Adjusting 80008081: 0x00000110 -> 0x80008110 |
| Adjusting 8000808a: 0x00000114 -> 0x80008114 |
| Adjusting 800080ab: 0x00000118 -> 0x80008118 |
| Adjusting 800080b2: 0x0000010c -> 0x8000810c |
| Adjusting 800080b8: 0x00000108 -> 0x80008108 |
| SMM Module: placing jmp sequence at 80007c00 rel16 0x03fd |
| SMM Module: placing jmp sequence at 80007800 rel16 0x07fd |
| SMM Module: placing jmp sequence at 80007400 rel16 0x0bfd |
| SMM Module: stub loaded at 80008000. Will call 80010561(00000000) |
| Initializing southbridge SMI... ... pmbase = 0x0500 |
| |
| SMI_STS: MCSMI PM1 |
| PM1_STS: WAK PWRBTN |
| GPE0_STS: GPIO15 GPIO9 GPIO7 GPIO6 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0 |
| ALT_GP_SMI_STS: GPI15 GPI9 GPI7 GPI6 GPI4 GPI3 GPI2 GPI1 GPI0 |
| TCO_STS: INTRD_DET |
| ... raise SMI# |
| In relocation handler: cpu 0 |
| New SMBASE=0x80000000 IEDBASE=0x80400000 @ 0003fc00 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Relocation complete. |
| Locking SMM. |
| Initializing CPU #0 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [f20000:ffffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 135c0 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x1b |
| CPU: Intel(R) Core(TM) i5-3340M CPU @ 2.70GHz. |
| MTRR: Physical address space: |
| 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 |
| 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 |
| 0x00000000000c0000 - 0x0000000080000000 size 0x7ff40000 type 6 |
| 0x0000000080000000 - 0x00000000e0000000 size 0x60000000 type 0 |
| 0x00000000e0000000 - 0x00000000f0000000 size 0x10000000 type 1 |
| 0x00000000f0000000 - 0x0000000100000000 size 0x10000000 type 0 |
| 0x0000000100000000 - 0x000000017b600000 size 0x7b600000 type 6 |
| MTRR addr 0x0-0x10 set to 6 type @ 0 |
| MTRR addr 0x10-0x20 set to 6 type @ 1 |
| MTRR addr 0x20-0x30 set to 6 type @ 2 |
| MTRR addr 0x30-0x40 set to 6 type @ 3 |
| MTRR addr 0x40-0x50 set to 6 type @ 4 |
| MTRR addr 0x50-0x60 set to 6 type @ 5 |
| MTRR addr 0x60-0x70 set to 6 type @ 6 |
| MTRR addr 0x70-0x80 set to 6 type @ 7 |
| MTRR addr 0x80-0x84 set to 6 type @ 8 |
| MTRR addr 0x84-0x88 set to 6 type @ 9 |
| MTRR addr 0x88-0x8c set to 6 type @ 10 |
| MTRR addr 0x8c-0x90 set to 6 type @ 11 |
| MTRR addr 0x90-0x94 set to 6 type @ 12 |
| MTRR addr 0x94-0x98 set to 6 type @ 13 |
| MTRR addr 0x98-0x9c set to 6 type @ 14 |
| MTRR addr 0x9c-0xa0 set to 6 type @ 15 |
| MTRR addr 0xa0-0xa4 set to 0 type @ 16 |
| MTRR addr 0xa4-0xa8 set to 0 type @ 17 |
| MTRR addr 0xa8-0xac set to 0 type @ 18 |
| MTRR addr 0xac-0xb0 set to 0 type @ 19 |
| MTRR addr 0xb0-0xb4 set to 0 type @ 20 |
| MTRR addr 0xb4-0xb8 set to 0 type @ 21 |
| MTRR addr 0xb8-0xbc set to 0 type @ 22 |
| MTRR addr 0xbc-0xc0 set to 0 type @ 23 |
| MTRR addr 0xc0-0xc1 set to 6 type @ 24 |
| MTRR addr 0xc1-0xc2 set to 6 type @ 25 |
| MTRR addr 0xc2-0xc3 set to 6 type @ 26 |
| MTRR addr 0xc3-0xc4 set to 6 type @ 27 |
| MTRR addr 0xc4-0xc5 set to 6 type @ 28 |
| MTRR addr 0xc5-0xc6 set to 6 type @ 29 |
| MTRR addr 0xc6-0xc7 set to 6 type @ 30 |
| MTRR addr 0xc7-0xc8 set to 6 type @ 31 |
| MTRR addr 0xc8-0xc9 set to 6 type @ 32 |
| MTRR addr 0xc9-0xca set to 6 type @ 33 |
| MTRR addr 0xca-0xcb set to 6 type @ 34 |
| MTRR addr 0xcb-0xcc set to 6 type @ 35 |
| MTRR addr 0xcc-0xcd set to 6 type @ 36 |
| MTRR addr 0xcd-0xce set to 6 type @ 37 |
| MTRR addr 0xce-0xcf set to 6 type @ 38 |
| MTRR addr 0xcf-0xd0 set to 6 type @ 39 |
| MTRR addr 0xd0-0xd1 set to 6 type @ 40 |
| MTRR addr 0xd1-0xd2 set to 6 type @ 41 |
| MTRR addr 0xd2-0xd3 set to 6 type @ 42 |
| MTRR addr 0xd3-0xd4 set to 6 type @ 43 |
| MTRR addr 0xd4-0xd5 set to 6 type @ 44 |
| MTRR addr 0xd5-0xd6 set to 6 type @ 45 |
| MTRR addr 0xd6-0xd7 set to 6 type @ 46 |
| MTRR addr 0xd7-0xd8 set to 6 type @ 47 |
| MTRR addr 0xd8-0xd9 set to 6 type @ 48 |
| MTRR addr 0xd9-0xda set to 6 type @ 49 |
| MTRR addr 0xda-0xdb set to 6 type @ 50 |
| MTRR addr 0xdb-0xdc set to 6 type @ 51 |
| MTRR addr 0xdc-0xdd set to 6 type @ 52 |
| MTRR addr 0xdd-0xde set to 6 type @ 53 |
| MTRR addr 0xde-0xdf set to 6 type @ 54 |
| MTRR addr 0xdf-0xe0 set to 6 type @ 55 |
| MTRR addr 0xe0-0xe1 set to 6 type @ 56 |
| MTRR addr 0xe1-0xe2 set to 6 type @ 57 |
| MTRR addr 0xe2-0xe3 set to 6 type @ 58 |
| MTRR addr 0xe3-0xe4 set to 6 type @ 59 |
| MTRR addr 0xe4-0xe5 set to 6 type @ 60 |
| MTRR addr 0xe5-0xe6 set to 6 type @ 61 |
| MTRR addr 0xe6-0xe7 set to 6 type @ 62 |
| MTRR addr 0xe7-0xe8 set to 6 type @ 63 |
| MTRR addr 0xe8-0xe9 set to 6 type @ 64 |
| MTRR addr 0xe9-0xea set to 6 type @ 65 |
| MTRR addr 0xea-0xeb set to 6 type @ 66 |
| MTRR addr 0xeb-0xec set to 6 type @ 67 |
| MTRR addr 0xec-0xed set to 6 type @ 68 |
| MTRR addr 0xed-0xee set to 6 type @ 69 |
| MTRR addr 0xee-0xef set to 6 type @ 70 |
| MTRR addr 0xef-0xf0 set to 6 type @ 71 |
| MTRR addr 0xf0-0xf1 set to 6 type @ 72 |
| MTRR addr 0xf1-0xf2 set to 6 type @ 73 |
| MTRR addr 0xf2-0xf3 set to 6 type @ 74 |
| MTRR addr 0xf3-0xf4 set to 6 type @ 75 |
| MTRR addr 0xf4-0xf5 set to 6 type @ 76 |
| MTRR addr 0xf5-0xf6 set to 6 type @ 77 |
| MTRR addr 0xf6-0xf7 set to 6 type @ 78 |
| MTRR addr 0xf7-0xf8 set to 6 type @ 79 |
| MTRR addr 0xf8-0xf9 set to 6 type @ 80 |
| MTRR addr 0xf9-0xfa set to 6 type @ 81 |
| MTRR addr 0xfa-0xfb set to 6 type @ 82 |
| MTRR addr 0xfb-0xfc set to 6 type @ 83 |
| MTRR addr 0xfc-0xfd set to 6 type @ 84 |
| MTRR addr 0xfd-0xfe set to 6 type @ 85 |
| MTRR addr 0xfe-0xff set to 6 type @ 86 |
| MTRR addr 0xff-0x100 set to 6 type @ 87 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| MTRR: default type WB/UC MTRR counts: 4/3. |
| MTRR: UC selected as default type. |
| MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6 |
| MTRR: 1 base 0x00000000e0000000 mask 0x0000000ff0000000 type 1 |
| MTRR: 2 base 0x0000000100000000 mask 0x0000000f00000000 type 6 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x00 done. |
| VMX status: enabled, locked |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2700 |
| Turbo is available but hidden |
| Turbo has been enabled |
| CPU: 0 has 2 cores, 2 threads per core |
| CPU: 0 has core 1 |
| CPU1: stack_base 7ffcb000, stack_end 7ffcbff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 1. |
| After apic_write. |
| In relocation handler: cpu 1 |
| New SMBASE=0x7ffffc00 IEDBASE=0x80400000 @ 0003fc00 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 1. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #1 |
| CPU: 0 has core 2 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [f20000:ffffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 135c0 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x1b |
| CPU: Intel(R) Core(TM) i5-3340M CPU @ 2.70GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x01 done. |
| VMX status: enabled, locked |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2700 |
| CPU #1 initialized |
| CPU2: stack_base 7ffca000, stack_end 7ffcaff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 2. |
| After apic_write. |
| In relocation handler: cpu 2 |
| Startup point 1. |
| Waiting for send to finish... |
| +New SMBASE=0x7ffff800 IEDBASE=0x80400000 @ 0003fc00 |
| Sending STARTUP #2 to 2. |
| After apic_write. |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU: 0 has core 3 |
| Initializing CPU #2 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [f20000:ffffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 135c0 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x0 |
| microcode: updated to revision 0x1b date=2014-05-29 |
| CPU: Intel(R) Core(TM) i5-3340M CPU @ 2.70GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x02 done. |
| VMX status: enabled, locked |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2700 |
| CPU #2 initialized |
| CPU3: stack_base 7ffc9000, stack_end 7ffc9ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 3. |
| After apic_write. |
| In relocation handler: cpu 3 |
| New SMBASE=0x7ffff400 IEDBASE=0x80400000 @ 0003fc00 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 3. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU #0 initialized |
| Waiting for 1 CPUS to stop |
| Initializing CPU #3 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [f20000:ffffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 135c0 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x1b |
| CPU: Intel(R) Core(TM) i5-3340M CPU @ 2.70GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x03 done. |
| VMX status: enabled, locked |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2700 |
| CPU #3 initialized |
| All AP CPUs stopped (396 loops) |
| CPU0: stack: 7ffcc000 - 7ffcd000, lowest used address 7ffccaa0, stack used: 1376 bytes |
| CPU1: stack: 7ffcb000 - 7ffcc000, lowest used address 7ffcbc80, stack used: 896 bytes |
| CPU2: stack: 7ffca000 - 7ffcb000, lowest used address 7ffcac80, stack used: 896 bytes |
| CPU3: stack: 7ffc9000 - 7ffca000, lowest used address 7ffc9c80, stack used: 896 bytes |
| CPU_CLUSTER: 0 init finished in 90878 usecs |
| PCI: 00:00.0 init ... |
| Disabling PEG12. |
| Disabling PEG11. |
| Disabling PEG10. |
| Disabling PEG60. |
| Disabling Device 7. |
| Disabling PEG IO clock. |
| Set BIOS_RESET_CPL |
| CPU TDP: 35 Watts |
| PCI: 00:00.0 init finished in 1014 usecs |
| PCI: 00:02.0 init ... |
| GT Power Management Init |
| IVB GT2 25W-35W Power Meter Weights |
| GT Power Management Init (post VBIOS) |
| Initializing VGA without OPROM. |
| |
| [0.148648] CONFIG => |
| [0.148648] (Primary => |
| [0.148649] (Port => DP3 , |
| [0.148649] Framebuffer => |
| [0.148650] (Width => 1366, |
| [0.148650] Height => 768, |
| [0.148651] Stride => 1408, |
| [0.148651] Offset => 0x00000000, |
| [0.148652] BPC => 8), |
| [0.148652] Mode => |
| [0.148653] (Dotclock => 241500000, |
| [0.148653] H_Visible => 2560, |
| [0.148654] H_Sync_Begin => 2608, |
| [0.148654] H_Sync_End => 2640, |
| [0.148655] H_Total => 2720, |
| [0.148655] V_Visible => 1440, |
| [0.148656] V_Sync_Begin => 1443, |
| [0.148656] V_Sync_End => 1448, |
| [0.148657] V_Total => 1481, |
| [0.148657] H_Sync_Active_High => True, |
| [0.148658] V_Sync_Active_High => False, |
| [0.148658] BPC => 10)), |
| [0.148659] Secondary => |
| [0.148659] (Port => Internal, |
| [0.148660] Framebuffer => |
| [0.148660] (Width => 1366, |
| [0.148661] Height => 768, |
| [0.148661] Stride => 1408, |
| [0.148662] Offset => 0x00000000, |
| [0.148662] BPC => 8), |
| [0.148663] Mode => |
| [0.148663] (Dotclock => 70500000, |
| [0.148664] H_Visible => 1366, |
| [0.148664] H_Sync_Begin => 1414, |
| [0.148665] H_Sync_End => 1446, |
| [0.148665] H_Total => 1480, |
| [0.148666] V_Visible => 768, |
| [0.148666] V_Sync_Begin => 771, |
| [0.148667] V_Sync_End => 777, |
| [0.148667] V_Total => 793, |
| [0.148668] H_Sync_Active_High => False, |
| [0.148668] V_Sync_Active_High => False, |
| [0.148669] BPC => 6)), |
| [0.148669] Tertiary => |
| [0.148670] (Port => Disabled, |
| [0.148670] Framebuffer => |
| [0.148671] (Width => 1, |
| [0.148671] Height => 1, |
| [0.148672] Stride => 1, |
| [0.148672] Offset => 0x00000000, |
| [0.148673] BPC => 8), |
| [0.148673] Mode => |
| [0.148674] (Dotclock => 24000000, |
| [0.148674] H_Visible => 1, |
| [0.148675] H_Sync_Begin => 1, |
| [0.148675] H_Sync_End => 1, |
| [0.148676] H_Total => 1, |
| [0.148676] V_Visible => 1, |
| [0.148677] V_Sync_Begin => 1, |
| [0.148677] V_Sync_End => 1, |
| [0.148678] V_Total => 1, |
| [0.148678] H_Sync_Active_High => False, |
| [0.148679] V_Sync_Active_High => False, |
| [0.148679] BPC => 5))); |
| PCI: 00:02.0 init finished in 48750 usecs |
| PCI: 00:04.0 init ... |
| PCI: 00:04.0 init finished in 0 usecs |
| PCI: 00:14.0 init ... |
| XHCI: Setting up controller.. done. |
| PCI: 00:14.0 init finished in 6 usecs |
| PCI: 00:16.0 init ... |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : YES |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Recovery |
| ME: Current Operation State : M0 with UMA |
| ME: Current Operation Mode : Normal |
| ME: Error Code : Image Failure |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Clean Moff->Mx wake |
| ME: Progress Phase State : M0 kernel load |
| ME: BIOS path: Error |
| PCI: 00:16.0 init finished in 17 usecs |
| PCI: 00:19.0 init ... |
| PCI: 00:19.0 init finished in 1 usecs |
| PCI: 00:1a.0 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1a.0 init finished in 13 usecs |
| PCI: 00:1b.0 init ... |
| Azalia: base = f2938000 |
| Azalia: codec_mask = 0b |
| Azalia: Initializing codec #3 |
| Azalia: codec viddid: 80862806 |
| Azalia: verb_size: 16 |
| Azalia: verb loaded. |
| Azalia: Initializing codec #1 |
| Azalia: codec viddid: 11c11040 |
| Azalia: verb_size: 4 |
| Azalia: verb loaded. |
| Azalia: Initializing codec #0 |
| Azalia: codec viddid: 111d7605 |
| Azalia: verb_size: 44 |
| Azalia: verb loaded. |
| PCI: 00:1b.0 init finished in 4809 usecs |
| PCI: 00:1c.0 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.0 init finished in 9 usecs |
| PCI: 00:1c.1 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.1 init finished in 11 usecs |
| PCI: 00:1c.2 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.2 init finished in 10 usecs |
| PCI: 00:1c.3 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.3 init finished in 8 usecs |
| PCI: 00:1d.0 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1d.0 init finished in 13 usecs |
| PCI: 00:1f.0 init ... |
| pch: lpc_init |
| IOAPIC: Initializing IOAPIC at 0xfec00000 |
| IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| IOAPIC: ID = 0x02 |
| IOAPIC: Dumping registers |
| reg 0x0000: 0x02000000 |
| reg 0x0001: 0x00170020 |
| reg 0x0002: 0x00170020 |
| CBFS: 'Master Header Locator' located CBFS at [f20000:ffffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 366c0 size 4ac |
| Set power off after power failure. |
| CBFS: 'Master Header Locator' located CBFS at [f20000:ffffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 366c0 size 4ac |
| NMI sources enabled. |
| PantherPoint PM init |
| rtc_failed = 0x0 |
| RTC Init |
| Enabling BIOS updates outside of SMM... Disabling ACPI via APMC: |
| done. |
| pch_spi_init |
| PCI: 00:1f.0 init finished in 855 usecs |
| PCI: 00:1f.2 init ... |
| SATA: Initializing... |
| CBFS: 'Master Header Locator' located CBFS at [f20000:ffffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 366c0 size 4ac |
| SATA: Controller in AHCI mode. |
| ABAR: f293d000 |
| PCI: 00:1f.2 init finished in 299 usecs |
| PCI: 03:00.0 init ... |
| PCI: 03:00.0 init finished in 0 usecs |
| PCI: 03:00.2 init ... |
| PCI: 03:00.2 init finished in 0 usecs |
| PCI: 03:00.3 init ... |
| PCI: 03:00.3 init finished in 0 usecs |
| PCI: 03:00.4 init ... |
| PCI: 03:00.4 init finished in 0 usecs |
| PCI: 04:00.0 init ... |
| PCI: 04:00.0 init finished in 0 usecs |
| Devices initialized |
| Show all devs... After init. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 1 |
| PCI: 00:1c.4: enabled 0 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 00ff.1: enabled 0 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 0 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:04.0: enabled 1 |
| NONE: enabled 1 |
| PCI: 03:00.0: enabled 1 |
| PCI: 03:00.2: enabled 1 |
| PCI: 03:00.3: enabled 1 |
| PCI: 03:00.4: enabled 1 |
| NONE: enabled 1 |
| PCI: 04:00.0: enabled 1 |
| APIC: 01: enabled 1 |
| APIC: 02: enabled 1 |
| APIC: 03: enabled 1 |
| BS: BS_DEV_INIT times (us): entry 8 run 146729 exit 0 |
| Finalize devices... |
| PCI: 00:1f.0 final |
| Devices finalized |
| BS: BS_POST_DEVICE times (us): entry 0 run 50 exit 0 |
| BS: BS_OS_RESUME_CHECK times (us): entry 0 run 1 exit 0 |
| CBFS: 'Master Header Locator' located CBFS at [f20000:ffffc0) |
| CBFS: Locating 'fallback/dsdt.aml' |
| CBFS: Found @ offset 36bc0 size 334d |
| CBFS: 'Master Header Locator' located CBFS at [f20000:ffffc0) |
| CBFS: Locating 'fallback/slic' |
| CBFS: 'fallback/slic' not found. |
| ACPI: Writing ACPI tables at 7ff18000. |
| ACPI: * FACS |
| ACPI: * DSDT |
| ACPI: * FADT |
| ACPI: added table 1/32, length now 40 |
| ACPI: * SSDT |
| ACPI_PIRQ_GEN: PCI: 00:14.0: pin=1 pirq=1 |
| ACPI_PIRQ_GEN: PCI: 00:1a.0: pin=1 pirq=6 |
| ACPI_PIRQ_GEN: PCI: 00:1b.0: pin=1 pirq=1 |
| ACPI_PIRQ_GEN: PCI: 00:1c.0: pin=1 pirq=2 |
| ACPI_PIRQ_GEN: PCI: 00:1c.1: pin=2 pirq=6 |
| ACPI_PIRQ_GEN: PCI: 00:1c.2: pin=3 pirq=4 |
| ACPI_PIRQ_GEN: PCI: 00:1d.0: pin=1 pirq=4 |
| ACPI_PIRQ_GEN: PCI: 00:1f.2: pin=1 pirq=2 |
| ACPI_PIRQ_GEN: PCI: 00:02.0: pin=1 pirq=1 |
| ACPI_PIRQ_GEN: PCI: 00:04.0: pin=1 pirq=1 |
| Found 1 CPU(s) with 4 core(s) each. |
| PSS: 2701MHz power 35000 control 0x2200 status 0x2200 |
| PSS: 2700MHz power 35000 control 0x1b00 status 0x1b00 |
| PSS: 2400MHz power 30023 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 26866 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 23853 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 20979 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 18192 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 15537 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 12991 control 0xc00 status 0xc00 |
| PSS: 2701MHz power 35000 control 0x2200 status 0x2200 |
| PSS: 2700MHz power 35000 control 0x1b00 status 0x1b00 |
| PSS: 2400MHz power 30023 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 26866 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 23853 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 20979 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 18192 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 15537 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 12991 control 0xc00 status 0xc00 |
| PSS: 2701MHz power 35000 control 0x2200 status 0x2200 |
| PSS: 2700MHz power 35000 control 0x1b00 status 0x1b00 |
| PSS: 2400MHz power 30023 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 26866 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 23853 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 20979 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 18192 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 15537 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 12991 control 0xc00 status 0xc00 |
| PSS: 2701MHz power 35000 control 0x2200 status 0x2200 |
| PSS: 2700MHz power 35000 control 0x1b00 status 0x1b00 |
| PSS: 2400MHz power 30023 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 26866 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 23853 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 20979 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 18192 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 15537 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 12991 control 0xc00 status 0xc00 |
| ACPI: added table 2/32, length now 44 |
| ACPI: * MCFG |
| ACPI: added table 3/32, length now 48 |
| ACPI: * TCPA |
| TCPA log created at 7ff07000 |
| ACPI: added table 4/32, length now 52 |
| ACPI: * MADT |
| ACPI: added table 5/32, length now 56 |
| current = 7ff1d240 |
| ACPI: * DMAR |
| ACPI: added table 6/32, length now 60 |
| current = 7ff1d2f0 |
| ACPI: * HPET |
| ACPI: added table 7/32, length now 64 |
| CBFS: 'Master Header Locator' located CBFS at [f20000:ffffc0) |
| CBFS: Locating 'vbt.bin' |
| CBFS: 'vbt.bin' not found. |
| CBFS: 'Master Header Locator' located CBFS at [f20000:ffffc0) |
| CBFS: Locating 'pci8086,0166.rom' |
| CBFS: 'pci8086,0166.rom' not found. |
| CBFS: 'Master Header Locator' located CBFS at [f20000:ffffc0) |
| CBFS: Locating 'pci8086,0106.rom' |
| CBFS: 'pci8086,0106.rom' not found. |
| PCI Option ROM loading disabled for PCI: 00:02.0 |
| GMA: locate_vbt_vbios: d017 90f0 9e fd 8 |
| GMA: VBT couldn't be found |
| ACPI: done. |
| ACPI tables: 21296 bytes. |
| smbios_write_tables: 7ff06000 |
| Create SMBIOS type 17 |
| Root Device (HP EliteBook 2570p) |
| CPU_CLUSTER: 0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| APIC: 00 (unknown) |
| APIC: acac (Intel SandyBridge/IvyBridge CPU) |
| DOMAIN: 0000 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:14.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:19.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1a.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1b.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.4 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.7 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1d.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1e.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PNP: 00ff.1 (SMSC KBC1126 for HP laptops) |
| PCI: 00:1f.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:00.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:01.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:02.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:04.0 (unknown) |
| NONE (unknown) |
| PCI: 03:00.0 (unknown) |
| PCI: 03:00.2 (unknown) |
| PCI: 03:00.3 (unknown) |
| PCI: 03:00.4 (unknown) |
| NONE (unknown) |
| PCI: 04:00.0 (unknown) |
| APIC: 01 (unknown) |
| APIC: 02 (unknown) |
| APIC: 03 (unknown) |
| SMBIOS tables: 450 bytes. |
| Writing table forward entry at 0x00000500 |
| Wrote coreboot table at: 00000500, 0x10 bytes, checksum bfea |
| Writing coreboot table at 0x7ff3c000 |
| CBFS: 'Master Header Locator' located CBFS at [f20000:ffffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 366c0 size 4ac |
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1. 0000000000001000-000000000009ffff: RAM |
| 2. 00000000000a0000-00000000000fffff: RESERVED |
| 3. 0000000000100000-000000007ff05fff: RAM |
| 4. 000000007ff06000-000000007fffffff: CONFIGURATION TABLES |
| 5. 0000000080000000-00000000829fffff: RESERVED |
| 6. 00000000f8000000-00000000fbffffff: RESERVED |
| 7. 00000000fed90000-00000000fed91fff: RESERVED |
| 8. 0000000100000000-000000017b5fffff: RAM |
| CBFS: 'Master Header Locator' located CBFS at [f20000:ffffc0) |
| Wrote coreboot table at: 7ff3c000, 0x85c bytes, checksum bd9d |
| coreboot table: 2164 bytes. |
| IMD ROOT 0. 7ffff000 00001000 |
| IMD SMALL 1. 7fffe000 00001000 |
| CONSOLE 2. 7ffde000 00020000 |
| TIME STAMP 3. 7ffdd000 00000400 |
| MRC DATA 4. 7ffdc000 000005b0 |
| ROMSTG STCK 5. 7ffd7000 00005000 |
| RAMSTAGE 6. 7ff95000 00042000 |
| 57a9e100 7. 7ff54000 00040950 |
| SMM BACKUP 8. 7ff44000 00010000 |
| COREBOOT 9. 7ff3c000 00008000 |
| ACPI 10. 7ff18000 00024000 |
| ACPI GNVS 11. 7ff17000 00001000 |
| TCPA LOG 12. 7ff07000 00010000 |
| SMBIOS 13. 7ff06000 00000800 |
| IMD small region: |
| IMD ROOT 0. 7fffec00 00000400 |
| CAR GLOBALS 1. 7fffeac0 00000140 |
| MEM INFO 2. 7fffe960 00000141 |
| ROMSTAGE 3. 7fffe940 00000004 |
| 57a9e000 4. 7fffe920 00000018 |
| COREBOOTFWD 5. 7fffe8e0 00000028 |
| BS: BS_WRITE_TABLES times (us): entry 0 run 4385 exit 0 |
| CBFS: 'Master Header Locator' located CBFS at [f20000:ffffc0) |
| CBFS: Locating 'fallback/payload' |
| CBFS: Found @ offset 75a80 size f63c |
| Loading segment from ROM address 0xfff95ab8 |
| code (compression=1) |
| New segment dstaddr 0xe31e0 memsize 0x1ce20 srcaddr 0xfff95af0 filesize 0xf604 |
| Loading segment from ROM address 0xfff95ad4 |
| Entry Point 0x000ff06e |
| Payload being loaded at below 1MiB without region being marked as RAM usable. |
| Loading Segment: addr: 0x00000000000e31e0 memsz: 0x000000000001ce20 filesz: 0x000000000000f604 |
| lb: [0x000000007ff96000, 0x000000007ffd6950) |
| Post relocation: addr: 0x00000000000e31e0 memsz: 0x000000000001ce20 filesz: 0x000000000000f604 |
| using LZMA |
| [ 0x000e31e0, 00100000, 0x00100000) <- fff95af0 |
| dest 000e31e0, end 00100000, bouncebuffer ffffffff |
| Loaded segments |
| BS: BS_PAYLOAD_LOAD times (us): entry 1 run 25472 exit 0 |
| PCH watchdog disabled |
| Jumping to boot code at 000ff06e(7ff3c000) |
| CPU0: stack: 7ffcc000 - 7ffcd000, lowest used address 7ffcc9c8, stack used: 1592 bytes |
| SeaBIOS (version rel-1.10.3-0-gb7661dd) |
| BUILD: gcc: (coreboot toolchain v1.50 October 15th, 2017) 6.3.0 binutils: (GNU Binutils) 2.29.1 |
| Found coreboot cbmem console @ 7ffde000 |
| Found mainboard HP EliteBook 2570p |
| Relocating init from 0x000e4760 to 0x7feb9dc0 (size 49568) |
| Found CBFS header at 0xfff20038 |
| multiboot: eax=7ffc3b40, ebx=7ffc3af4 |
| Found 20 PCI devices (max PCI bus is 04) |
| Copying SMBIOS entry point from 0x7ff06000 to 0x000f08e0 |
| Copying ACPI RSDP from 0x7ff18000 to 0x000f08b0 |
| Using pmtimer, ioport 0x508 |
| WARNING - Timeout at tis_wait_sts:160! |
| Scan for VGA option rom |
| Running option rom at c000:0003 |
| pmm call arg1=0 |
| Turning on vga text mode console |
| SeaBIOS (version rel-1.10.3-0-gb7661dd) |
| XHCI init on dev 00:14.0: regs @ 0xf2920000, 8 ports, 32 slots, 32 byte contexts |
| XHCI protocol USB 2.00, 4 ports (offset 1), def 3001 |
| XHCI protocol USB 3.00, 4 ports (offset 5), def 1000 |
| XHCI extcap 0xc1 @ 0xf2928040 |
| XHCI extcap 0xc0 @ 0xf2928070 |
| XHCI extcap 0x1 @ 0xf2928330 |
| EHCI init on dev 00:1a.0 (regs=0xf293e020) |
| EHCI init on dev 00:1d.0 (regs=0xf293f020) |
| AHCI controller at 00:1f.2, iobase 0xf293d000, irq 10 |
| Searching bootorder for: /pci@i0cf8/pci-bridge@1c,2/*@0,2 |
| Found 0 lpt ports |
| Found 0 serial ports |
| Searching bootorder for: /rom@img/nvramcui |
| Searching bootorder for: /rom@img/coreinfo |
| Searching bootorder for: /pci@i0cf8/*@1f,2/drive@1/disk@0 |
| AHCI/1: registering: "DVD/CD [AHCI/1: hp CDDVDW SU-208BB ATAPI-8 DVD/CD]" |
| PS2 keyboard initialized |
| Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0 |
| AHCI/0: Set transfer mode to UDMA-6 |
| AHCI/0: registering: "AHCI/0: Crucial_CT1024MX200SSD1 ATA-10 Hard-Disk (931 GiBytes)" |
| XHCI no devices found |
| Initialized USB HUB (0 ports used) |
| Initialized USB HUB (0 ports used) |
| All threads complete. |
| Scan for option roms |
| |
| Press ESC for boot menu. |
| |
| Searching bootorder for: HALT |
| drive 0x000f07f0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=1953525168 |
| Space available for UMB: c6800-ec800, f0000-f07c0 |
| Returned 180224 bytes of ZoneHigh |
| e820 map has 8 items: |
| 0: 0000000000000000 - 000000000009fc00 = 1 RAM |
| 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED |
| 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED |
| 3: 0000000000100000 - 000000007fef2000 = 1 RAM |
| 4: 000000007fef2000 - 0000000082a00000 = 2 RESERVED |
| 5: 00000000f8000000 - 00000000fc000000 = 2 RESERVED |
| 6: 00000000fed90000 - 00000000fed92000 = 2 RESERVED |
| 7: 0000000100000000 - 000000017b600000 = 1 RAM |
| enter handle_19: |
| NULL |
| Booting from DVD/CD... |
| Device reports MEDIUM NOT PRESENT |
| scsi_is_ready returned -1 |
| Boot failed: Could not read from CDROM (code 0003) |
| enter handle_18: |
| NULL |
| Booting from Hard Disk... |
| Booting from 0000:7c00 |
| |