| *** Pre-CBMEM romstage console overflowed, log truncated! *** |
| |
| ference clock support: yes |
| Trying CAS 11, tCK 320. |
| Found compatible clock, CAS pair. |
| Selected DRAM frequency: 800 MHz |
| Selected CAS latency : 11T |
| PLL busy... done in 70 us |
| MCU frequency is set at : 800 MHz |
| Done dimm mapping |
| Update PCI-E configuration space: |
| PCI(0, 0, 0)[a0] = 0 |
| PCI(0, 0, 0)[a4] = 2 |
| PCI(0, 0, 0)[bc] = 82a00000 |
| PCI(0, 0, 0)[a8] = 7b600000 |
| PCI(0, 0, 0)[ac] = 2 |
| PCI(0, 0, 0)[b8] = 80000000 |
| PCI(0, 0, 0)[b0] = 80a00000 |
| PCI(0, 0, 0)[b4] = 80800000 |
| PCI(0, 0, 0)[7c] = 7f |
| PCI(0, 0, 0)[70] = fe000000 |
| PCI(0, 0, 0)[74] = 1 |
| PCI(0, 0, 0)[78] = fe000c00 |
| Done memory map |
| Done io registers |
| t123: 1767, 6000, 7620 |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : YES |
| ME: Manufacturing Mode : YES |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Normal |
| ME: Current Operation State : M0 without UMA |
| ME: Current Operation Mode : Normal |
| ME: Error Code : No Error |
| ME: Progress Phase : Policy Module |
| ME: Power Management Event : Non-power cycle reset |
| ME: Progress Phase State : Entery into Policy Module |
| ME: FWS2: 0x3900012e |
| ME: Bist in progress: 0x0 |
| ME: ICC Status : 0x3 |
| ME: Invoke MEBx : 0x1 |
| ME: CPU replaced : 0x0 |
| ME: MBP ready : 0x1 |
| ME: MFS failure : 0x0 |
| ME: Warm reset req : 0x0 |
| ME: CPU repl valid : 0x1 |
| ME: (Reserved) : 0x0 |
| ME: FW update req : 0x0 |
| ME: (Reserved) : 0x0 |
| ME: Current state : 0x0 |
| ME: Current PM event: 0x9 |
| ME: Progress code : 0x3 |
| PASSED! Tell ME that DRAM is ready |
| ME: FWS2: 0x390b012e |
| ME: Bist in progress: 0x0 |
| ME: ICC Status : 0x3 |
| ME: Invoke MEBx : 0x1 |
| ME: CPU replaced : 0x0 |
| ME: MBP ready : 0x1 |
| ME: MFS failure : 0x0 |
| ME: Warm reset req : 0x0 |
| ME: CPU repl valid : 0x1 |
| ME: (Reserved) : 0x0 |
| ME: FW update req : 0x0 |
| ME: (Reserved) : 0x0 |
| ME: Current state : 0xb |
| ME: Current PM event: 0x9 |
| ME: Progress code : 0x3 |
| ME: Requested BIOS Action: Continue to boot |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : YES |
| ME: Manufacturing Mode : YES |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Normal |
| ME: Current Operation State : M0 without UMA |
| ME: Current Operation Mode : Normal |
| ME: Error Code : No Error |
| ME: Progress Phase : Policy Module |
| ME: Power Management Event : Non-power cycle reset |
| ME: Progress Phase State : Received DRAM Init Done |
| memcfg DDR3 ref clock 133 MHz |
| memcfg DDR3 clock 1596 MHz |
| memcfg channel assignment: A: 0, B 1, C 2 |
| memcfg channel[0] config (00620010): |
| ECC inactive |
| enhanced interleave mode on |
| rank interleave on |
| DIMMA 4096 MB width x8 dual rank, selected |
| DIMMB 0 MB width x8 single rank |
| memcfg channel[1] config (00600010): |
| ECC inactive |
| enhanced interleave mode on |
| rank interleave on |
| DIMMA 4096 MB width x8 single rank, selected |
| DIMMB 0 MB width x8 single rank |
| CBMEM: |
| IMD: root @ 7ffff000 254 entries. |
| IMD: root @ 7fffec00 62 entries. |
| CBMEM entry for DIMM info: 0x7fffe960 |
| TPM initialization. |
| TPM: Init |
| Found TPM ST33ZP24 by ST Microelectronics |
| TPM: Open |
| TPM: Startup |
| TPM: command 0x99 returned 0x0 |
| TPM: OK. |
| MTRR Range: Start=ff000000 End=0 (Size 1000000) |
| MTRR Range: Start=0 End=1000000 (Size 1000000) |
| MTRR Range: Start=7f800000 End=80000000 (Size 800000) |
| MTRR Range: Start=80000000 End=80800000 (Size 800000) |
| CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0) |
| CBFS: Locating 'fallback/ramstage' |
| CBFS: Found @ offset 2ff00 size 168f9 |
| Decompressing stage fallback/ramstage @ 0x7ff75fc0 (268688 bytes) |
| Loading module at 7ff76000 with entry 7ff76000. filesize: 0x2fe50 memsize: 0x41950 |
| Processing 3139 relocs. Offset value of 0x7fe76000 |
| |
| |
| coreboot-4.6-906-gc81800a-dirty Sat Jul 29 08:00:25 UTC 2017 ramstage starting... |
| Normal boot. |
| BS: BS_PRE_DEVICE times (us): entry 0 run 0 exit 0 |
| BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 1 exit 0 |
| Enumerating buses... |
| Show all devs... Before device enumeration. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 0 |
| PCI: 00:1c.4: enabled 0 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 00ff.1: enabled 1 |
| PNP: 00ff.2: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| I2C: 00:54: enabled 1 |
| I2C: 00:55: enabled 1 |
| I2C: 00:56: enabled 1 |
| I2C: 00:57: enabled 1 |
| I2C: 00:5c: enabled 1 |
| I2C: 00:5d: enabled 1 |
| I2C: 00:5e: enabled 1 |
| I2C: 00:5f: enabled 1 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 1 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:04.0: enabled 0 |
| Compare with tree... |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 0 |
| PCI: 00:1c.4: enabled 0 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 00ff.1: enabled 1 |
| PNP: 00ff.2: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| I2C: 00:54: enabled 1 |
| I2C: 00:55: enabled 1 |
| I2C: 00:56: enabled 1 |
| I2C: 00:57: enabled 1 |
| I2C: 00:5c: enabled 1 |
| I2C: 00:5d: enabled 1 |
| I2C: 00:5e: enabled 1 |
| I2C: 00:5f: enabled 1 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 1 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:04.0: enabled 0 |
| Root Device scanning... |
| root_dev_scan_bus for Root Device |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| DOMAIN: 0000 scanning... |
| PCI: pci_scan_bus for bus 00 |
| PCI: 00:00.0 [8086/0154] ops |
| PCI: 00:00.0 [8086/0154] enabled |
| Capability: type 0x0d @ 0x88 |
| Capability: type 0x01 @ 0x80 |
| Capability: type 0x05 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| Capability: type 0x0d @ 0x88 |
| Capability: type 0x01 @ 0x80 |
| Capability: type 0x05 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| PCI: 00:01.0 subordinate bus PCI Express |
| PCI: 00:01.0 [8086/0151] enabled |
| PCI: 00:02.0 [8086/0000] ops |
| PCI: 00:02.0 [8086/0166] enabled |
| PCI: 00:04.0 [8086/0153] disabled |
| PCI: 00:14.0 [8086/0000] ops |
| PCI: 00:14.0 [8086/1e31] enabled |
| PCI: 00:16.0 [8086/1e3a] ops |
| PCI: 00:16.0 [8086/1e3a] enabled |
| PCI: 00:16.1: Disabling device |
| PCI: 00:16.1 [8086/1e3b] disabled No operations |
| PCI: 00:16.2: Disabling device |
| PCI: 00:16.2 [8086/1e3c] disabled No operations |
| PCI: 00:16.3: Disabling device |
| PCI: 00:16.3 [8086/1e3d] disabled No operations |
| PCI: 00:19.0 [8086/1502] enabled |
| PCI: 00:1a.0 [8086/0000] ops |
| PCI: 00:1a.0 [8086/1e2d] enabled |
| PCI: 00:1b.0 [8086/0000] ops |
| PCI: 00:1b.0 [8086/1e20] enabled |
| PCH: PCIe Root Port coalescing is enabled |
| PCI: 00:1c.0 [8086/0000] bus ops |
| PCI: 00:1c.0 [8086/1e10] enabled |
| PCI: 00:1c.1 [8086/0000] bus ops |
| PCI: 00:1c.1 [8086/1e12] enabled |
| PCI: 00:1c.2 [8086/0000] bus ops |
| PCI: 00:1c.2 [8086/1e14] enabled |
| PCI: 00:1c.3: Disabling device |
| PCI: 00:1c.3 [8086/0000] bus ops |
| PCI: 00:1c.3 [8086/1e16] disabled |
| PCI: 00:1c.4: Disabling device |
| PCI: 00:1c.4: check set enabled |
| PCI: 00:1c.5: Disabling device |
| PCI: 00:1c.6: Disabling device |
| PCI: 00:1c.7: Disabling device |
| PCH: RPFN 0x76543210 -> 0xfedcb210 |
| PCI: 00:1d.0 [8086/0000] ops |
| PCI: 00:1d.0 [8086/1e26] enabled |
| PCI: 00:1e.0: Disabling device |
| PCI: 00:1e.0 [8086/2448] bus ops |
| PCI: 00:1e.0 [8086/2448] disabled |
| PCI: 00:1f.0 [8086/0000] bus ops |
| PCI: 00:1f.0 [8086/1e55] enabled |
| PCI: 00:1f.2 [8086/0000] ops |
| CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19dc0 size 83c |
| PCI: 00:1f.2 [8086/1e01] enabled |
| PCI: 00:1f.3 [8086/0000] bus ops |
| PCI: 00:1f.3 [8086/1e22] enabled |
| PCI: 00:1f.5: Disabling device |
| PCI: 00:1f.5 [8086/1e09] disabled No operations |
| PCI: 00:1f.6: Disabling device |
| PCI: 00:1f.6 [8086/1e24] disabled No operations |
| PCI: 00:01.0 scanning... |
| do_pci_scan_bridge for PCI: 00:01.0 |
| PCI: pci_scan_bus for bus 01 |
| scan_bus: scanning of bus PCI: 00:01.0 took 9 usecs |
| PCI: 00:1c.0 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.0 |
| PCI: pci_scan_bus for bus 02 |
| PCI: 02:00.0 [1180/0000] ops |
| PCI: 02:00.0 [1180/e822] enabled |
| Capability: type 0x05 @ 0x50 |
| Capability: type 0x01 @ 0x78 |
| Capability: type 0x10 @ 0x80 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| scan_bus: scanning of bus PCI: 00:1c.0 took 209 usecs |
| PCI: 00:1c.1 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.1 |
| PCI: pci_scan_bus for bus 03 |
| PCI: 03:00.0 [8086/0000] ops |
| PCI: 03:00.0 [8086/0085] enabled |
| Capability: type 0x01 @ 0xc8 |
| Capability: type 0x05 @ 0xd0 |
| Capability: type 0x10 @ 0xe0 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| ASPM: Enabled L1 |
| scan_bus: scanning of bus PCI: 00:1c.1 took 213 usecs |
| PCI: 00:1c.2 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.2 |
| PCI: pci_scan_bus for bus 04 |
| scan_bus: scanning of bus PCI: 00:1c.2 took 45 usecs |
| PCI: 00:1f.0 scanning... |
| scan_lpc_bus for PCI: 00:1f.0 |
| CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19dc0 size 83c |
| CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19dc0 size 83c |
| PNP: 00ff.1 enabled |
| recv_ec_data: 0x47 |
| recv_ec_data: 0x31 |
| recv_ec_data: 0x48 |
| recv_ec_data: 0x54 |
| recv_ec_data: 0x33 |
| recv_ec_data: 0x35 |
| recv_ec_data: 0x57 |
| recv_ec_data: 0x57 |
| recv_ec_data: 0x16 |
| recv_ec_data: 0x03 |
| recv_ec_data: 0x30 |
| recv_ec_data: 0x11 |
| EC Firmware ID G1HT35WW-3.22, Version 3.01B |
| CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19dc0 size 83c |
| WARNING: No CMOS option 'power_management_beeps'. |
| CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19dc0 size 83c |
| WARNING: No CMOS option 'low_battery_beep'. |
| recv_ec_data: 0x00 |
| CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19dc0 size 83c |
| recv_ec_data: 0x70 |
| recv_ec_data: 0x90 |
| CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19dc0 size 83c |
| CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19dc0 size 83c |
| recv_ec_data: 0x70 |
| CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19dc0 size 83c |
| recv_ec_data: 0x70 |
| CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19dc0 size 83c |
| recv_ec_data: 0x00 |
| CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19dc0 size 83c |
| recv_ec_data: 0xa7 |
| CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19dc0 size 83c |
| recv_ec_data: 0xa7 |
| recv_ec_data: 0x70 |
| PNP: 00ff.2 enabled |
| scan_lpc_bus for PCI: 00:1f.0 done |
| scan_bus: scanning of bus PCI: 00:1f.0 took 4723 usecs |
| PCI: 00:1f.3 scanning... |
| scan_generic_bus for PCI: 00:1f.3 |
| bus: PCI: 00:1f.3[0]->I2C: 01:54 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled |
| scan_generic_bus for PCI: 00:1f.3 done |
| scan_bus: scanning of bus PCI: 00:1f.3 took 19 usecs |
| scan_bus: scanning of bus DOMAIN: 0000 took 5704 usecs |
| root_dev_scan_bus for Root Device done |
| scan_bus: scanning of bus Root Device took 5711 usecs |
| done |
| BS: BS_DEV_ENUMERATE times (us): entry 0 run 5816 exit 0 |
| found VGA at PCI: 00:02.0 |
| Setting up VGA for PCI: 00:02.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| Allocating resources... |
| Reading resources... |
| Root Device read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 |
| Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000. |
| PCI: 00:01.0 read_resources bus 1 link: 0 |
| PCI: 00:01.0 read_resources bus 1 link: 0 done |
| PCI: 00:1c.0 read_resources bus 2 link: 0 |
| PCI: 00:1c.0 read_resources bus 2 link: 0 done |
| PCI: 00:1c.1 read_resources bus 3 link: 0 |
| PCI: 00:1c.1 read_resources bus 3 link: 0 done |
| PCI: 00:1c.2 read_resources bus 4 link: 0 |
| PCI: 00:1c.2 read_resources bus 4 link: 0 done |
| PCI: 00:1f.0 read_resources bus 0 link: 0 |
| PNP: 00ff.1 missing read_resources |
| PNP: 00ff.2 missing read_resources |
| PCI: 00:1f.0 read_resources bus 0 link: 0 done |
| PCI: 00:1f.3 read_resources bus 1 link: 0 |
| PCI: 00:1f.3 read_resources bus 1 link: 0 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 done |
| Root Device read_resources bus 0 link: 0 done |
| Done reading resources. |
| Show resources in subtree (Root Device)...After reading. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: acac |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 |
| PCI: 00:00.0 |
| PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 |
| PCI: 00:01.0 |
| PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 00:02.0 |
| PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18 |
| PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20 |
| PCI: 00:04.0 |
| PCI: 00:14.0 |
| PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:16.0 |
| PCI: 00:16.0 resource base 0 size 10 align 12 gran 4 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:19.0 |
| PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 |
| PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 |
| PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 |
| PCI: 00:1a.0 |
| PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:1c.0 child on link 0 PCI: 02:00.0 |
| PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 02:00.0 |
| PCI: 02:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| PCI: 00:1c.1 child on link 0 PCI: 03:00.0 |
| PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 03:00.0 |
| PCI: 03:00.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:1c.2Unknown device path type: 0 |
| child on link 0 |
| PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| Unknown device path type: 0 |
| |
| Unknown device path type: 0 |
| resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10 |
| Unknown device path type: 0 |
| resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14 |
| Unknown device path type: 0 |
| resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18 |
| PCI: 00:1c.3 |
| PCI: 00:1c.4 |
| PCI: 00:1c.5 |
| PCI: 00:1c.6 |
| PCI: 00:1c.7 |
| PCI: 00:1d.0 |
| PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| PCI: 00:1e.0 |
| PCI: 00:1f.0 child on link 0 PNP: 00ff.1 |
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000200 |
| PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000300 |
| PNP: 00ff.1 |
| PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 |
| PNP: 00ff.2 |
| PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 |
| PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 |
| PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 |
| PCI: 00:1f.2 |
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 |
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 |
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 |
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c |
| PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 |
| PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24 |
| PCI: 00:1f.3 child on link 0 I2C: 01:54 |
| PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 |
| PCI: 00:1f.3 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10 |
| I2C: 01:54 |
| I2C: 01:55 |
| I2C: 01:56 |
| I2C: 01:57 |
| I2C: 01:5c |
| I2C: 01:5d |
| I2C: 01:5e |
| I2C: 01:5f |
| PCI: 00:1f.5 |
| PCI: 00:1f.6 |
| DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff |
| PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| Unknown device path type: 0 |
| 18 * [0x0 - 0xfff] io |
| PCI: 00:1c.2 io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.2 1c * [0x0 - 0xfff] io |
| PCI: 00:02.0 20 * [0x1000 - 0x103f] io |
| PCI: 00:19.0 18 * [0x1040 - 0x105f] io |
| PCI: 00:1f.2 20 * [0x1060 - 0x107f] io |
| PCI: 00:1f.2 10 * [0x1080 - 0x1087] io |
| PCI: 00:1f.2 18 * [0x1088 - 0x108f] io |
| PCI: 00:1f.2 14 * [0x1090 - 0x1093] io |
| PCI: 00:1f.2 1c * [0x1094 - 0x1097] io |
| DOMAIN: 0000 io: base: 1098 size: 1098 align: 12 gran: 0 limit: ffff done |
| DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff |
| PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:01.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 00:01.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 02:00.0 10 * [0x0 - 0xff] mem |
| PCI: 00:1c.0 mem: base: 100 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 03:00.0 10 * [0x0 - 0x1fff] mem |
| PCI: 00:1c.1 mem: base: 2000 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| Unknown device path type: 0 |
| 14 * [0x0 - 0x7fffff] prefmem |
| PCI: 00:1c.2 prefmem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done |
| PCI: 00:1c.2 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| Unknown device path type: 0 |
| 10 * [0x0 - 0x7fffff] mem |
| PCI: 00:1c.2 mem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done |
| PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem |
| PCI: 00:1c.2 24 * [0x10000000 - 0x107fffff] prefmem |
| PCI: 00:1c.2 20 * [0x10800000 - 0x10ffffff] mem |
| PCI: 00:02.0 10 * [0x11000000 - 0x113fffff] mem |
| PCI: 00:1c.0 20 * [0x11400000 - 0x114fffff] mem |
| PCI: 00:1c.1 20 * [0x11500000 - 0x115fffff] mem |
| PCI: 00:19.0 10 * [0x11600000 - 0x1161ffff] mem |
| PCI: 00:14.0 10 * [0x11620000 - 0x1162ffff] mem |
| PCI: 00:1b.0 10 * [0x11630000 - 0x11633fff] mem |
| PCI: 00:19.0 14 * [0x11634000 - 0x11634fff] mem |
| PCI: 00:1f.2 24 * [0x11635000 - 0x116357ff] mem |
| PCI: 00:1a.0 10 * [0x11636000 - 0x116363ff] mem |
| PCI: 00:1d.0 10 * [0x11637000 - 0x116373ff] mem |
| PCI: 00:1f.3 10 * [0x11638000 - 0x116380ff] mem |
| PCI: 00:16.0 10 * [0x11639000 - 0x1163900f] mem |
| DOMAIN: 0000 mem: base: 11639010 size: 11639010 align: 28 gran: 0 limit: ffffffff done |
| avoid_fixed_resources: DOMAIN: 0000 |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff |
| constrain_resources: PCI: 00:00.0 60 base f8000000 limit fbffffff mem (fixed) |
| constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed) |
| constrain_resources: PCI: 00:1f.0 10000200 base 000015e0 limit 000015eb io (fixed) |
| constrain_resources: PCI: 00:1f.0 10000300 base 00001600 limit 0000167b io (fixed) |
| skipping PNP: 00ff.2@60 fixed resource, size=0! |
| skipping PNP: 00ff.2@62 fixed resource, size=0! |
| skipping PNP: 00ff.2@64 fixed resource, size=0! |
| skipping PNP: 00ff.2@66 fixed resource, size=0! |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 base 0000167c limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 base e0000000 limit f7ffffff |
| Setting resources... |
| DOMAIN: 0000 io: base:167c size:1098 align:12 gran:0 limit:ffff |
| PCI: 00:1c.2 1c * [0x2000 - 0x2fff] io |
| PCI: 00:02.0 20 * [0x3000 - 0x303f] io |
| PCI: 00:19.0 18 * [0x3040 - 0x305f] io |
| PCI: 00:1f.2 20 * [0x3060 - 0x307f] io |
| PCI: 00:1f.2 10 * [0x3080 - 0x3087] io |
| PCI: 00:1f.2 18 * [0x3088 - 0x308f] io |
| PCI: 00:1f.2 14 * [0x3090 - 0x3093] io |
| PCI: 00:1f.2 1c * [0x3094 - 0x3097] io |
| DOMAIN: 0000 io: next_base: 3098 size: 1098 align: 12 gran: 0 done |
| PCI: 00:01.0 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:01.0 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| PCI: 00:1c.0 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:1c.0 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| PCI: 00:1c.1 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:1c.1 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| PCI: 00:1c.2 io: base:2000 size:1000 align:12 gran:12 limit:2fff |
| Unknown device path type: 0 |
| 18 * [0x2000 - 0x2fff] io |
| PCI: 00:1c.2 io: next_base: 3000 size: 1000 align: 12 gran: 12 done |
| DOMAIN: 0000 mem: base:e0000000 size:11639010 align:28 gran:0 limit:f7ffffff |
| PCI: 00:02.0 18 * [0xe0000000 - 0xefffffff] prefmem |
| PCI: 00:1c.2 24 * [0xf0000000 - 0xf07fffff] prefmem |
| PCI: 00:1c.2 20 * [0xf0800000 - 0xf0ffffff] mem |
| PCI: 00:02.0 10 * [0xf1000000 - 0xf13fffff] mem |
| PCI: 00:1c.0 20 * [0xf1400000 - 0xf14fffff] mem |
| PCI: 00:1c.1 20 * [0xf1500000 - 0xf15fffff] mem |
| PCI: 00:19.0 10 * [0xf1600000 - 0xf161ffff] mem |
| PCI: 00:14.0 10 * [0xf1620000 - 0xf162ffff] mem |
| PCI: 00:1b.0 10 * [0xf1630000 - 0xf1633fff] mem |
| PCI: 00:19.0 14 * [0xf1634000 - 0xf1634fff] mem |
| PCI: 00:1f.2 24 * [0xf1635000 - 0xf16357ff] mem |
| PCI: 00:1a.0 10 * [0xf1636000 - 0xf16363ff] mem |
| PCI: 00:1d.0 10 * [0xf1637000 - 0xf16373ff] mem |
| PCI: 00:1f.3 10 * [0xf1638000 - 0xf16380ff] mem |
| PCI: 00:16.0 10 * [0xf1639000 - 0xf163900f] mem |
| DOMAIN: 0000 mem: next_base: f1639010 size: 11639010 align: 28 gran: 0 done |
| PCI: 00:01.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:01.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:01.0 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:01.0 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:1c.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.0 mem: base:f1400000 size:100000 align:20 gran:20 limit:f14fffff |
| PCI: 02:00.0 10 * [0xf1400000 - 0xf14000ff] mem |
| PCI: 00:1c.0 mem: next_base: f1400100 size: 100000 align: 20 gran: 20 done |
| PCI: 00:1c.1 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:1c.1 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.1 mem: base:f1500000 size:100000 align:20 gran:20 limit:f15fffff |
| PCI: 03:00.0 10 * [0xf1500000 - 0xf1501fff] mem |
| PCI: 00:1c.1 mem: next_base: f1502000 size: 100000 align: 20 gran: 20 done |
| PCI: 00:1c.2 prefmem: base:f0000000 size:800000 align:22 gran:20 limit:f07fffff |
| Unknown device path type: 0 |
| 14 * [0xf0000000 - 0xf07fffff] prefmem |
| PCI: 00:1c.2 prefmem: next_base: f0800000 size: 800000 align: 22 gran: 20 done |
| PCI: 00:1c.2 mem: base:f0800000 size:800000 align:22 gran:20 limit:f0ffffff |
| Unknown device path type: 0 |
| 10 * [0xf0800000 - 0xf0ffffff] mem |
| PCI: 00:1c.2 mem: next_base: f1000000 size: 800000 align: 22 gran: 20 done |
| Root Device assign_resources, bus 0 link: 0 |
| TOUUD 0x27b600000 TOLUD 0x82a00000 TOM 0x200000000 |
| MEBASE 0x1fe000000 |
| IGD decoded, subtracting 32M UMA and 2M GTT |
| TSEG base 0x80000000 size 8M |
| Available memory below 4GB: 2048M |
| Available memory above 4GB: 6070M |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| PCI: 00:01.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io |
| PCI: 00:01.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 prefmem |
| PCI: 00:01.0 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 mem |
| PCI: 00:02.0 10 <- [0x00f1000000 - 0x00f13fffff] size 0x00400000 gran 0x16 mem64 |
| PCI: 00:02.0 18 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem64 |
| PCI: 00:02.0 20 <- [0x0000003000 - 0x000000303f] size 0x00000040 gran 0x06 io |
| PCI: 00:14.0 10 <- [0x00f1620000 - 0x00f162ffff] size 0x00010000 gran 0x10 mem64 |
| PCI: 00:16.0 10 <- [0x00f1639000 - 0x00f163900f] size 0x00000010 gran 0x04 mem64 |
| PCI: 00:19.0 10 <- [0x00f1600000 - 0x00f161ffff] size 0x00020000 gran 0x11 mem |
| PCI: 00:19.0 14 <- [0x00f1634000 - 0x00f1634fff] size 0x00001000 gran 0x0c mem |
| PCI: 00:19.0 18 <- [0x0000003040 - 0x000000305f] size 0x00000020 gran 0x05 io |
| PCI: 00:1a.0 10 <- [0x00f1636000 - 0x00f16363ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1b.0 10 <- [0x00f1630000 - 0x00f1633fff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io |
| PCI: 00:1c.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem |
| PCI: 00:1c.0 20 <- [0x00f1400000 - 0x00f14fffff] size 0x00100000 gran 0x14 bus 02 mem |
| PCI: 00:1c.0 assign_resources, bus 2 link: 0 |
| PCI: 02:00.0 10 <- [0x00f1400000 - 0x00f14000ff] size 0x00000100 gran 0x08 mem |
| PCI: 00:1c.0 assign_resources, bus 2 link: 0 |
| PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io |
| PCI: 00:1c.1 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 03 prefmem |
| PCI: 00:1c.1 20 <- [0x00f1500000 - 0x00f15fffff] size 0x00100000 gran 0x14 bus 03 mem |
| PCI: 00:1c.1 assign_resources, bus 3 link: 0 |
| PCI: 03:00.0 10 <- [0x00f1500000 - 0x00f1501fff] size 0x00002000 gran 0x0d mem64 |
| PCI: 00:1c.1 assign_resources, bus 3 link: 0 |
| PCI: 00:1c.2 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 04 io |
| PCI: 00:1c.2 24 <- [0x00f0000000 - 0x00f07fffff] size 0x00800000 gran 0x14 bus 04 prefmem |
| PCI: 00:1c.2 20 <- [0x00f0800000 - 0x00f0ffffff] size 0x00800000 gran 0x14 bus 04 mem |
| PCI: 00:1c.2 assign_resources, bus 4 link: 0 |
| Unknown device path type: 0 |
| missing set_resources |
| PCI: 00:1c.2 assign_resources, bus 4 link: 0 |
| PCI: 00:1d.0 10 <- [0x00f1637000 - 0x00f16373ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1f.0 assign_resources, bus 0 link: 0 |
| PNP: 00ff.1 missing set_resources |
| PNP: 00ff.2 missing set_resources |
| PCI: 00:1f.0 assign_resources, bus 0 link: 0 |
| PCI: 00:1f.2 10 <- [0x0000003080 - 0x0000003087] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 14 <- [0x0000003090 - 0x0000003093] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 18 <- [0x0000003088 - 0x000000308f] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 1c <- [0x0000003094 - 0x0000003097] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 20 <- [0x0000003060 - 0x000000307f] size 0x00000020 gran 0x05 io |
| PCI: 00:1f.2 24 <- [0x00f1635000 - 0x00f16357ff] size 0x00000800 gran 0x0b mem |
| PCI: 00:1f.3 10 <- [0x00f1638000 - 0x00f16380ff] size 0x00000100 gran 0x08 mem64 |
| PCI: 00:1f.3 assign_resources, bus 1 link: 0 |
| PCI: 00:1f.3 assign_resources, bus 1 link: 0 |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| Root Device assign_resources, bus 0 link: 0 |
| Done setting resources. |
| Show resources in subtree (Root Device)...After assigning values. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: acac |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 167c size 1098 align 12 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base e0000000 size 11639010 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100 |
| DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 |
| DOMAIN: 0000 resource base 100000 size 7ff00000 align 0 gran 0 limit 0 flags e0004200 index 4 |
| DOMAIN: 0000 resource base 100000000 size 17b600000 align 0 gran 0 limit 0 flags e0004200 index 5 |
| DOMAIN: 0000 resource base 80000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6 |
| DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7 |
| DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8 |
| DOMAIN: 0000 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9 |
| DOMAIN: 0000 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a |
| PCI: 00:00.0 |
| PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 |
| PCI: 00:01.0 |
| PCI: 00:01.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:01.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 |
| PCI: 00:01.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20 |
| PCI: 00:02.0 |
| PCI: 00:02.0 resource base f1000000 size 400000 align 22 gran 22 limit f13fffff flags 60000201 index 10 |
| PCI: 00:02.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001201 index 18 |
| PCI: 00:02.0 resource base 3000 size 40 align 6 gran 6 limit 303f flags 60000100 index 20 |
| PCI: 00:04.0 |
| PCI: 00:14.0 |
| PCI: 00:14.0 resource base f1620000 size 10000 align 16 gran 16 limit f162ffff flags 60000201 index 10 |
| PCI: 00:16.0 |
| PCI: 00:16.0 resource base f1639000 size 10 align 12 gran 4 limit f163900f flags 60000201 index 10 |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:19.0 |
| PCI: 00:19.0 resource base f1600000 size 20000 align 17 gran 17 limit f161ffff flags 60000200 index 10 |
| PCI: 00:19.0 resource base f1634000 size 1000 align 12 gran 12 limit f1634fff flags 60000200 index 14 |
| PCI: 00:19.0 resource base 3040 size 20 align 5 gran 5 limit 305f flags 60000100 index 18 |
| PCI: 00:1a.0 |
| PCI: 00:1a.0 resource base f1636000 size 400 align 12 gran 10 limit f16363ff flags 60000200 index 10 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base f1630000 size 4000 align 14 gran 14 limit f1633fff flags 60000201 index 10 |
| PCI: 00:1c.0 child on link 0 PCI: 02:00.0 |
| PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:1c.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 |
| PCI: 00:1c.0 resource base f1400000 size 100000 align 20 gran 20 limit f14fffff flags 60080202 index 20 |
| PCI: 02:00.0 |
| PCI: 02:00.0 resource base f1400000 size 100 align 12 gran 8 limit f14000ff flags 60000200 index 10 |
| PCI: 00:1c.1 child on link 0 PCI: 03:00.0 |
| PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:1c.1 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 |
| PCI: 00:1c.1 resource base f1500000 size 100000 align 20 gran 20 limit f15fffff flags 60080202 index 20 |
| PCI: 03:00.0 |
| PCI: 03:00.0 resource base f1500000 size 2000 align 13 gran 13 limit f1501fff flags 60000201 index 10 |
| PCI: 00:1c.2Unknown device path type: 0 |
| child on link 0 |
| PCI: 00:1c.2 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c |
| PCI: 00:1c.2 resource base f0000000 size 800000 align 22 gran 20 limit f07fffff flags 60081202 index 24 |
| PCI: 00:1c.2 resource base f0800000 size 800000 align 22 gran 20 limit f0ffffff flags 60080202 index 20 |
| Unknown device path type: 0 |
| |
| Unknown device path type: 0 |
| resource base f0800000 size 800000 align 22 gran 22 limit f0ffffff flags 40000200 index 10 |
| Unknown device path type: 0 |
| resource base f0000000 size 800000 align 22 gran 22 limit f07fffff flags 40001200 index 14 |
| Unknown device path type: 0 |
| resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 40000100 index 18 |
| PCI: 00:1c.3 |
| PCI: 00:1c.4 |
| PCI: 00:1c.5 |
| PCI: 00:1c.6 |
| PCI: 00:1c.7 |
| PCI: 00:1d.0 |
| PCI: 00:1d.0 resource base f1637000 size 400 align 12 gran 10 limit f16373ff flags 60000200 index 10 |
| PCI: 00:1e.0 |
| PCI: 00:1f.0 child on link 0 PNP: 00ff.1 |
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000200 |
| PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000300 |
| PNP: 00ff.1 |
| PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 |
| PNP: 00ff.2 |
| PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 |
| PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 |
| PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 |
| PCI: 00:1f.2 |
| PCI: 00:1f.2 resource base 3080 size 8 align 3 gran 3 limit 3087 flags 60000100 index 10 |
| PCI: 00:1f.2 resource base 3090 size 4 align 2 gran 2 limit 3093 flags 60000100 index 14 |
| PCI: 00:1f.2 resource base 3088 size 8 align 3 gran 3 limit 308f flags 60000100 index 18 |
| PCI: 00:1f.2 resource base 3094 size 4 align 2 gran 2 limit 3097 flags 60000100 index 1c |
| PCI: 00:1f.2 resource base 3060 size 20 align 5 gran 5 limit 307f flags 60000100 index 20 |
| PCI: 00:1f.2 resource base f1635000 size 800 align 12 gran 11 limit f16357ff flags 60000200 index 24 |
| PCI: 00:1f.3 child on link 0 I2C: 01:54 |
| PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 |
| PCI: 00:1f.3 resource base f1638000 size 100 align 12 gran 8 limit f16380ff flags 60000201 index 10 |
| I2C: 01:54 |
| I2C: 01:55 |
| I2C: 01:56 |
| I2C: 01:57 |
| I2C: 01:5c |
| I2C: 01:5d |
| I2C: 01:5e |
| I2C: 01:5f |
| PCI: 00:1f.5 |
| PCI: 00:1f.6 |
| Done allocating resources. |
| BS: BS_DEV_RESOURCES times (us): entry 0 run 2255 exit 0 |
| Enabling resources... |
| PCI: 00:00.0 subsystem <- 17aa/21f3 |
| PCI: 00:00.0 cmd <- 06 |
| PCI: 00:01.0 bridge ctrl <- 0003 |
| PCI: 00:01.0 cmd <- 00 |
| PCI: 00:02.0 subsystem <- 17aa/21f3 |
| PCI: 00:02.0 cmd <- 03 |
| PCI: 00:14.0 subsystem <- 17aa/21f3 |
| PCI: 00:14.0 cmd <- 102 |
| PCI: 00:16.0 subsystem <- 17aa/21f3 |
| PCI: 00:16.0 cmd <- 02 |
| PCI: 00:19.0 subsystem <- 17aa/21f3 |
| PCI: 00:19.0 cmd <- 103 |
| PCI: 00:1a.0 subsystem <- 17aa/21f3 |
| PCI: 00:1a.0 cmd <- 102 |
| PCI: 00:1b.0 subsystem <- 17aa/21f3 |
| PCI: 00:1b.0 cmd <- 102 |
| PCI: 00:1c.0 bridge ctrl <- 0003 |
| PCI: 00:1c.0 subsystem <- 17aa/21f3 |
| PCI: 00:1c.0 cmd <- 106 |
| PCI: 00:1c.1 bridge ctrl <- 0003 |
| PCI: 00:1c.1 subsystem <- 17aa/21f3 |
| PCI: 00:1c.1 cmd <- 106 |
| PCI: 00:1c.2 bridge ctrl <- 0003 |
| PCI: 00:1c.2 subsystem <- 17aa/21f3 |
| PCI: 00:1c.2 cmd <- 107 |
| PCI: 00:1d.0 subsystem <- 17aa/21f3 |
| PCI: 00:1d.0 cmd <- 102 |
| pch_decode_init |
| PCI: 00:1f.0 subsystem <- 17aa/21f3 |
| PCI: 00:1f.0 cmd <- 107 |
| PCI: 00:1f.2 subsystem <- 17aa/21f3 |
| PCI: 00:1f.2 cmd <- 03 |
| PCI: 00:1f.3 subsystem <- 17aa/21f3 |
| PCI: 00:1f.3 cmd <- 103 |
| PCI: 02:00.0 subsystem <- 17aa/21f3 |
| PCI: 02:00.0 cmd <- 06 |
| PCI: 03:00.0 cmd <- 02 |
| done. |
| BS: BS_DEV_ENABLE times (us): entry 0 run 152 exit 0 |
| Initializing devices... |
| Root Device init ... |
| Root Device init finished in 0 usecs |
| CPU_CLUSTER: 0 init ... |
| start_eip=0x00001000, code_size=0x00000031 |
| Setting up SMI for CPU |
| Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8 |
| Processing 12 relocs. Offset value of 0x00038000 |
| Adjusting 00038002: 0x00000024 -> 0x00038024 |
| Adjusting 0003801d: 0x0000003c -> 0x0003803c |
| Adjusting 00038026: 0x00000024 -> 0x00038024 |
| Adjusting 00038054: 0x00000120 -> 0x00038120 |
| Adjusting 00038066: 0x000001a8 -> 0x000381a8 |
| Adjusting 0003806f: 0x00000100 -> 0x00038100 |
| Adjusting 00038077: 0x00000104 -> 0x00038104 |
| Adjusting 00038081: 0x00000110 -> 0x00038110 |
| Adjusting 0003808a: 0x00000114 -> 0x00038114 |
| Adjusting 000380ab: 0x00000118 -> 0x00038118 |
| Adjusting 000380b2: 0x0000010c -> 0x0003810c |
| Adjusting 000380b8: 0x00000108 -> 0x00038108 |
| SMM Module: stub loaded at 00038000. Will call 7ff902ba(7ffb38c0) |
| Installing SMM handler to 0x80000000 |
| Loading module at 80010000 with entry 80010554. filesize: 0x18d8 memsize: 0x58f8 |
| Processing 78 relocs. Offset value of 0x80010000 |
| Adjusting 80010036: 0x000017d4 -> 0x800117d4 |
| Adjusting 80010055: 0x000017d4 -> 0x800117d4 |
| Adjusting 80010108: 0x000017d4 -> 0x800117d4 |
| Adjusting 8001019d: 0x000017e4 -> 0x800117e4 |
| Adjusting 800104cb: 0x000018d8 -> 0x800118d8 |
| Adjusting 80010521: 0x000018d0 -> 0x800118d0 |
| Adjusting 80010537: 0x00001840 -> 0x80011840 |
| Adjusting 8001055d: 0x000018d8 -> 0x800118d8 |
| Adjusting 8001056b: 0x000018d8 -> 0x800118d8 |
| Adjusting 80010578: 0x000018c0 -> 0x800118c0 |
| Adjusting 80010583: 0x000018c0 -> 0x800118c0 |
| Adjusting 80010597: 0x000018c4 -> 0x800118c4 |
| Adjusting 8001059d: 0x000018dc -> 0x800118dc |
| Adjusting 800105a5: 0x000018c4 -> 0x800118c4 |
| Adjusting 800105c2: 0x000018dc -> 0x800118dc |
| Adjusting 800105cb: 0x000018c0 -> 0x800118c0 |
| Adjusting 8001067c: 0x000018e0 -> 0x800118e0 |
| Adjusting 8001068c: 0x000018e0 -> 0x800118e0 |
| Adjusting 800106b2: 0x000018e0 -> 0x800118e0 |
| Adjusting 8001071a: 0x00001804 -> 0x80011804 |
| Adjusting 80010819: 0x000018cc -> 0x800118cc |
| Adjusting 80010842: 0x000018cc -> 0x800118cc |
| Adjusting 80010865: 0x000018cc -> 0x800118cc |
| Adjusting 8001088e: 0x000018c8 -> 0x800118c8 |
| Adjusting 800108ac: 0x000018cc -> 0x800118cc |
| Adjusting 800108d2: 0x000018c8 -> 0x800118c8 |
| Adjusting 8001098e: 0x000018cc -> 0x800118cc |
| Adjusting 80010993: 0x000018c8 -> 0x800118c8 |
| Adjusting 8001099c: 0x00001814 -> 0x80011814 |
| Adjusting 80010a1a: 0x000017c0 -> 0x800117c0 |
| Adjusting 80010d16: 0x000018e4 -> 0x800118e4 |
| Adjusting 80010d45: 0x000018e8 -> 0x800118e8 |
| Adjusting 80010d58: 0x000018e4 -> 0x800118e4 |
| Adjusting 80010d7b: 0x000018e8 -> 0x800118e8 |
| Adjusting 80010e3e: 0x000018e4 -> 0x800118e4 |
| Adjusting 80011076: 0x000018e8 -> 0x800118e8 |
| Adjusting 8001127d: 0x000018e8 -> 0x800118e8 |
| Adjusting 8001135c: 0x000018d0 -> 0x800118d0 |
| Adjusting 8001136c: 0x000018d0 -> 0x800118d0 |
| Adjusting 80011381: 0x000018d0 -> 0x800118d0 |
| Adjusting 800113a2: 0x000018d0 -> 0x800118d0 |
| Adjusting 800113cb: 0x000018d0 -> 0x800118d0 |
| Adjusting 800113e8: 0x000018d0 -> 0x800118d0 |
| Adjusting 800113fb: 0x000018f4 -> 0x800118f4 |
| Adjusting 8001143f: 0x000018ec -> 0x800118ec |
| Adjusting 8001145c: 0x000018ec -> 0x800118ec |
| Adjusting 8001147a: 0x000018f4 -> 0x800118f4 |
| Adjusting 80011480: 0x000018f0 -> 0x800118f0 |
| Adjusting 8001148d: 0x000018d0 -> 0x800118d0 |
| Adjusting 800114e3: 0x000018f0 -> 0x800118f0 |
| Adjusting 80011538: 0x00001822 -> 0x80011822 |
| Adjusting 80011555: 0x000018d0 -> 0x800118d0 |
| Adjusting 80011574: 0x00001838 -> 0x80011838 |
| Adjusting 80011579: 0x000018f0 -> 0x800118f0 |
| Adjusting 8001163e: 0x000018d0 -> 0x800118d0 |
| Adjusting 8001166c: 0x000018d0 -> 0x800118d0 |
| Adjusting 80011699: 0x000018d0 -> 0x800118d0 |
| Adjusting 800116bf: 0x000018d0 -> 0x800118d0 |
| Adjusting 800116e3: 0x000018d0 -> 0x800118d0 |
| Adjusting 80011777: 0x000018f0 -> 0x800118f0 |
| Adjusting 8001178b: 0x000018d0 -> 0x800118d0 |
| Adjusting 800117b8: 0x000017a0 -> 0x800117a0 |
| Adjusting 800117c0: 0x00000021 -> 0x80010021 |
| Adjusting 800117c4: 0x000017a0 -> 0x800117a0 |
| Adjusting 800117cc: 0x00000092 -> 0x80010092 |
| Adjusting 800117d8: 0x000017f0 -> 0x800117f0 |
| Adjusting 800117f0: 0x000002d5 -> 0x800102d5 |
| Adjusting 800117f4: 0x000002e1 -> 0x800102e1 |
| Adjusting 800117f8: 0x000002e4 -> 0x800102e4 |
| Adjusting 80011850: 0x00001520 -> 0x80011520 |
| Adjusting 80011854: 0x000013b2 -> 0x800113b2 |
| Adjusting 80011860: 0x00001696 -> 0x80011696 |
| Adjusting 80011864: 0x00001359 -> 0x80011359 |
| Adjusting 80011868: 0x0000137a -> 0x8001137a |
| Adjusting 8001186c: 0x00001375 -> 0x80011375 |
| Adjusting 80011874: 0x0000148a -> 0x8001148a |
| Adjusting 80011878: 0x00001369 -> 0x80011369 |
| Adjusting 80011894: 0x000014ce -> 0x800114ce |
| Loading module at 80008000 with entry 80008000. filesize: 0x1a8 memsize: 0x1a8 |
| Processing 12 relocs. Offset value of 0x80008000 |
| Adjusting 80008002: 0x00000024 -> 0x80008024 |
| Adjusting 8000801d: 0x0000003c -> 0x8000803c |
| Adjusting 80008026: 0x00000024 -> 0x80008024 |
| Adjusting 80008054: 0x00000120 -> 0x80008120 |
| Adjusting 80008066: 0x000001a8 -> 0x800081a8 |
| Adjusting 8000806f: 0x00000100 -> 0x80008100 |
| Adjusting 80008077: 0x00000104 -> 0x80008104 |
| Adjusting 80008081: 0x00000110 -> 0x80008110 |
| Adjusting 8000808a: 0x00000114 -> 0x80008114 |
| Adjusting 800080ab: 0x00000118 -> 0x80008118 |
| Adjusting 800080b2: 0x0000010c -> 0x8000810c |
| Adjusting 800080b8: 0x00000108 -> 0x80008108 |
| SMM Module: placing jmp sequence at 80007c00 rel16 0x03fd |
| SMM Module: placing jmp sequence at 80007800 rel16 0x07fd |
| SMM Module: placing jmp sequence at 80007400 rel16 0x0bfd |
| SMM Module: stub loaded at 80008000. Will call 80010554(00000000) |
| Initializing southbridge SMI... ... pmbase = 0x0500 |
| |
| SMI_STS: MCSMI |
| PM1_STS: |
| GPE0_STS: GPIO14 GPIO13 GPIO11 GPIO10 GPIO9 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO1 GPIO0 TCO_SCI |
| ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI1 GPI0 |
| TCO_STS: |
| ... raise SMI# |
| In relocation handler: cpu 0 |
| New SMBASE=0x80000000 IEDBASE=0x80400000 @ 0003fc00 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Relocation complete. |
| Locking SMM. |
| Initializing CPU #0 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 13e80 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x1b |
| CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. |
| MTRR: Physical address space: |
| 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 |
| 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 |
| 0x00000000000c0000 - 0x0000000080000000 size 0x7ff40000 type 6 |
| 0x0000000080000000 - 0x00000000e0000000 size 0x60000000 type 0 |
| 0x00000000e0000000 - 0x00000000f0000000 size 0x10000000 type 1 |
| 0x00000000f0000000 - 0x0000000100000000 size 0x10000000 type 0 |
| 0x0000000100000000 - 0x000000027b600000 size 0x17b600000 type 6 |
| MTRR addr 0x0-0x10 set to 6 type @ 0 |
| MTRR addr 0x10-0x20 set to 6 type @ 1 |
| MTRR addr 0x20-0x30 set to 6 type @ 2 |
| MTRR addr 0x30-0x40 set to 6 type @ 3 |
| MTRR addr 0x40-0x50 set to 6 type @ 4 |
| MTRR addr 0x50-0x60 set to 6 type @ 5 |
| MTRR addr 0x60-0x70 set to 6 type @ 6 |
| MTRR addr 0x70-0x80 set to 6 type @ 7 |
| MTRR addr 0x80-0x84 set to 6 type @ 8 |
| MTRR addr 0x84-0x88 set to 6 type @ 9 |
| MTRR addr 0x88-0x8c set to 6 type @ 10 |
| MTRR addr 0x8c-0x90 set to 6 type @ 11 |
| MTRR addr 0x90-0x94 set to 6 type @ 12 |
| MTRR addr 0x94-0x98 set to 6 type @ 13 |
| MTRR addr 0x98-0x9c set to 6 type @ 14 |
| MTRR addr 0x9c-0xa0 set to 6 type @ 15 |
| MTRR addr 0xa0-0xa4 set to 0 type @ 16 |
| MTRR addr 0xa4-0xa8 set to 0 type @ 17 |
| MTRR addr 0xa8-0xac set to 0 type @ 18 |
| MTRR addr 0xac-0xb0 set to 0 type @ 19 |
| MTRR addr 0xb0-0xb4 set to 0 type @ 20 |
| MTRR addr 0xb4-0xb8 set to 0 type @ 21 |
| MTRR addr 0xb8-0xbc set to 0 type @ 22 |
| MTRR addr 0xbc-0xc0 set to 0 type @ 23 |
| MTRR addr 0xc0-0xc1 set to 6 type @ 24 |
| MTRR addr 0xc1-0xc2 set to 6 type @ 25 |
| MTRR addr 0xc2-0xc3 set to 6 type @ 26 |
| MTRR addr 0xc3-0xc4 set to 6 type @ 27 |
| MTRR addr 0xc4-0xc5 set to 6 type @ 28 |
| MTRR addr 0xc5-0xc6 set to 6 type @ 29 |
| MTRR addr 0xc6-0xc7 set to 6 type @ 30 |
| MTRR addr 0xc7-0xc8 set to 6 type @ 31 |
| MTRR addr 0xc8-0xc9 set to 6 type @ 32 |
| MTRR addr 0xc9-0xca set to 6 type @ 33 |
| MTRR addr 0xca-0xcb set to 6 type @ 34 |
| MTRR addr 0xcb-0xcc set to 6 type @ 35 |
| MTRR addr 0xcc-0xcd set to 6 type @ 36 |
| MTRR addr 0xcd-0xce set to 6 type @ 37 |
| MTRR addr 0xce-0xcf set to 6 type @ 38 |
| MTRR addr 0xcf-0xd0 set to 6 type @ 39 |
| MTRR addr 0xd0-0xd1 set to 6 type @ 40 |
| MTRR addr 0xd1-0xd2 set to 6 type @ 41 |
| MTRR addr 0xd2-0xd3 set to 6 type @ 42 |
| MTRR addr 0xd3-0xd4 set to 6 type @ 43 |
| MTRR addr 0xd4-0xd5 set to 6 type @ 44 |
| MTRR addr 0xd5-0xd6 set to 6 type @ 45 |
| MTRR addr 0xd6-0xd7 set to 6 type @ 46 |
| MTRR addr 0xd7-0xd8 set to 6 type @ 47 |
| MTRR addr 0xd8-0xd9 set to 6 type @ 48 |
| MTRR addr 0xd9-0xda set to 6 type @ 49 |
| MTRR addr 0xda-0xdb set to 6 type @ 50 |
| MTRR addr 0xdb-0xdc set to 6 type @ 51 |
| MTRR addr 0xdc-0xdd set to 6 type @ 52 |
| MTRR addr 0xdd-0xde set to 6 type @ 53 |
| MTRR addr 0xde-0xdf set to 6 type @ 54 |
| MTRR addr 0xdf-0xe0 set to 6 type @ 55 |
| MTRR addr 0xe0-0xe1 set to 6 type @ 56 |
| MTRR addr 0xe1-0xe2 set to 6 type @ 57 |
| MTRR addr 0xe2-0xe3 set to 6 type @ 58 |
| MTRR addr 0xe3-0xe4 set to 6 type @ 59 |
| MTRR addr 0xe4-0xe5 set to 6 type @ 60 |
| MTRR addr 0xe5-0xe6 set to 6 type @ 61 |
| MTRR addr 0xe6-0xe7 set to 6 type @ 62 |
| MTRR addr 0xe7-0xe8 set to 6 type @ 63 |
| MTRR addr 0xe8-0xe9 set to 6 type @ 64 |
| MTRR addr 0xe9-0xea set to 6 type @ 65 |
| MTRR addr 0xea-0xeb set to 6 type @ 66 |
| MTRR addr 0xeb-0xec set to 6 type @ 67 |
| MTRR addr 0xec-0xed set to 6 type @ 68 |
| MTRR addr 0xed-0xee set to 6 type @ 69 |
| MTRR addr 0xee-0xef set to 6 type @ 70 |
| MTRR addr 0xef-0xf0 set to 6 type @ 71 |
| MTRR addr 0xf0-0xf1 set to 6 type @ 72 |
| MTRR addr 0xf1-0xf2 set to 6 type @ 73 |
| MTRR addr 0xf2-0xf3 set to 6 type @ 74 |
| MTRR addr 0xf3-0xf4 set to 6 type @ 75 |
| MTRR addr 0xf4-0xf5 set to 6 type @ 76 |
| MTRR addr 0xf5-0xf6 set to 6 type @ 77 |
| MTRR addr 0xf6-0xf7 set to 6 type @ 78 |
| MTRR addr 0xf7-0xf8 set to 6 type @ 79 |
| MTRR addr 0xf8-0xf9 set to 6 type @ 80 |
| MTRR addr 0xf9-0xfa set to 6 type @ 81 |
| MTRR addr 0xfa-0xfb set to 6 type @ 82 |
| MTRR addr 0xfb-0xfc set to 6 type @ 83 |
| MTRR addr 0xfc-0xfd set to 6 type @ 84 |
| MTRR addr 0xfd-0xfe set to 6 type @ 85 |
| MTRR addr 0xfe-0xff set to 6 type @ 86 |
| MTRR addr 0xff-0x100 set to 6 type @ 87 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| MTRR: default type WB/UC MTRR counts: 4/10. |
| MTRR: WB selected as default type. |
| MTRR: 0 base 0x0000000080000000 mask 0x0000000fc0000000 type 0 |
| MTRR: 1 base 0x00000000c0000000 mask 0x0000000fe0000000 type 0 |
| MTRR: 2 base 0x00000000e0000000 mask 0x0000000ff0000000 type 1 |
| MTRR: 3 base 0x00000000f0000000 mask 0x0000000ff0000000 type 0 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x00 done. |
| VMX is locked, so set_vmx will do nothing |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2600 |
| Turbo is available but hidden |
| Turbo has been enabled |
| CPU: 0 has 2 cores, 2 threads per core |
| CPU: 0 has core 1 |
| CPU1: stack_base 7ffac000, stack_end 7ffacff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 1. |
| After apic_write. |
| In relocation handler: cpu 1 |
| New SMBASE=0x7ffffc00 IEDBASE=0x80400000 @ 0003fc00 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 1. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #1 |
| CPU: 0 has core 2 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 13e80 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x1b |
| CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x01 done. |
| VMX is locked, so set_vmx will do nothing |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2600 |
| CPU #1 initialized |
| CPU2: stack_base 7ffab000, stack_end 7ffabff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 2. |
| After apic_write. |
| In relocation handler: cpu 2 |
| Startup point 1. |
| Waiting for send to finish... |
| +New SMBASE=0x7ffff800 IEDBASE=0x80400000 @ 0003fc00 |
| Sending STARTUP #2 to 2. |
| After apic_write. |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU: 0 has core 3 |
| Initializing CPU #2 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 13e80 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x0 |
| microcode: updated to revision 0x1b date=2014-05-29 |
| CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x02 done. |
| VMX is locked, so set_vmx will do nothing |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2600 |
| CPU #2 initialized |
| CPU3: stack_base 7ffaa000, stack_end 7ffaaff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 3. |
| After apic_write. |
| In relocation handler: cpu 3 |
| New SMBASE=0x7ffff400 IEDBASE=0x80400000 @ 0003fc00 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 3. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU #0 initialized |
| Waiting for 1 CPUS to stop |
| Initializing CPU #3 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 13e80 size 5800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x1b |
| CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x03 done. |
| VMX is locked, so set_vmx will do nothing |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2600 |
| CPU #3 initialized |
| All AP CPUs stopped (398 loops) |
| CPU0: stack: 7ffad000 - 7ffae000, lowest used address 7ffadaa0, stack used: 1376 bytes |
| CPU1: stack: 7ffac000 - 7ffad000, lowest used address 7ffacc80, stack used: 896 bytes |
| CPU2: stack: 7ffab000 - 7ffac000, lowest used address 7ffabc80, stack used: 896 bytes |
| CPU3: stack: 7ffaa000 - 7ffab000, lowest used address 7ffaac80, stack used: 896 bytes |
| CPU_CLUSTER: 0 init finished in 78302 usecs |
| PCI: 00:00.0 init ... |
| Disabling PEG12. |
| Disabling PEG11. |
| Disabling Device 4. |
| Disabling PEG60. |
| Disabling Device 7. |
| Set BIOS_RESET_CPL |
| CPU TDP: 35 Watts |
| PCI: 00:00.0 init finished in 1014 usecs |
| PCI: 00:02.0 init ... |
| GT Power Management Init |
| IVB GT2 25W-35W Power Meter Weights |
| GT Power Management Init (post VBIOS) |
| Initializing VGA without OPROM. |
| EDID: |
| 00 ff ff ff ff ff ff 00 06 af 3e 21 00 00 00 00 |
| 21 14 01 04 90 1f 11 78 02 61 95 9c 59 52 8f 26 |
| 21 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 |
| 01 01 01 01 01 01 f8 2a 40 9a 61 84 0c 30 40 2a |
| 33 00 35 ae 10 00 00 18 a5 1c 40 9a 61 84 0c 30 |
| 40 2a 33 00 35 ae 10 00 00 18 00 00 00 fe 00 41 |
| 55 4f 0a 20 20 20 20 20 20 20 20 20 00 00 00 fe |
| 00 42 31 34 30 52 57 30 32 20 56 31 20 0a 00 d0 |
| Extracted contents: |
| header: 00 ff ff ff ff ff ff 00 |
| serial number: 06 af 3e 21 00 00 00 00 21 14 |
| version: 01 04 |
| basic params: 90 1f 11 78 02 |
| chroma info: 61 95 9c 59 52 8f 26 21 50 54 |
| established: 00 00 00 |
| standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 |
| descriptor 1: f8 2a 40 9a 61 84 0c 30 40 2a 33 00 35 ae 10 00 00 18 |
| descriptor 2: a5 1c 40 9a 61 84 0c 30 40 2a 33 00 35 ae 10 00 00 18 |
| descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20 |
| descriptor 4: 00 00 00 fe 00 42 31 34 30 52 57 30 32 20 56 31 20 0a |
| extensions: 00 |
| checksum: d0 |
| |
| Manufacturer: AUO Model 213e Serial Number 0 |
| Made week 33 of 2010 |
| EDID version: 1.4 |
| Digital display |
| 6 bits per primary color channel |
| Digital interface is not defined |
| Maximum image size: 31 cm x 17 cm |
| Gamma: 220% |
| Check DPMS levels |
| Supported color formats: RGB 4:4:4 |
| First detailed timing is preferred timing |
| Established timings supported: |
| Standard timings supported: |
| Detailed timings |
| Hex of detail: f82a409a61840c30402a330035ae10000018 |
| Detailed mode (IN HEX): Clock 110000 KHz, 135 mm x ae mm |
| 0640 0680 06aa 07da hborder 0 |
| 0384 0387 038a 0390 vborder 0 |
| -hsync -vsync |
| Did detailed timing |
| Hex of detail: a51c409a61840c30402a330035ae10000018 |
| Detailed mode (IN HEX): Clock 73330 KHz, 135 mm x ae mm |
| 0640 0680 06aa 07da hborder 0 |
| 0384 0387 038a 0390 vborder 0 |
| -hsync -vsync |
| Hex of detail: 000000fe0041554f0a202020202020202020 |
| ASCII string: AUO |
| Hex of detail: 000000fe004231343052573032205631200a |
| ASCII string: B140RW02 V1 |
| Checksum |
| Checksum: 0xd0 (valid) |
| bringing up panel at resolution 1600 x 900 |
| Borders 0 x 0 |
| Blank 410 x 12 |
| Sync 42 x 3 |
| Front porch 64 x 3 |
| Spread spectrum clock |
| Dual channel |
| Polarities 1, 1 |
| Data M1=7689557, N1=8388608 |
| Link frequency 270000 kHz |
| Link M1=213598, N1=524288 |
| Pixel N=6, M1=14, M2=7, P1=2 |
| Pixel clock 110000 kHz |
| waiting for panel powerup |
| panel powered up |
| PCI: 00:02.0 init finished in 41138 usecs |
| PCI: 00:14.0 init ... |
| XHCI: Setting up controller.. done. |
| PCI: 00:14.0 init finished in 7 usecs |
| PCI: 00:16.0 init ... |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : YES |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Normal |
| ME: Current Operation State : M0 with UMA |
| ME: Current Operation Mode : Normal |
| ME: Error Code : No Error |
| ME: Progress Phase : Host Communication |
| ME: Power Management Event : Non-power cycle reset |
| ME: Progress Phase State : Host communication established |
| ME: BIOS path: Normal |
| ME: Extend SHA-256: 8c94cd28d87dc681a84d1609b718cb63f2bfd68e5ea89afeccc39e0a559269b2 |
| ME: MBP item header 00020103 |
| ME: MBP item header 00050102 |
| ME: MBP item header 00020501 |
| ME: MBP item header 00020201 |
| ME: MBP item header 00020104 |
| ME: unknown mbp item id 0x104! Skipping |
| ME: MBP item header 02030101 |
| ME: MBP item header 02060301 |
| ME: MBP item header 02090401 |
| ME: mbp read OK after 1 cycles |
| ME: found version 8.1.30.1350 |
| ME Capability: Full Network manageability : enabled |
| ME Capability: Regular Network manageability : disabled |
| ME Capability: Manageability : enabled |
| ME Capability: Small business technology : disabled |
| ME Capability: Level III manageability : disabled |
| ME Capability: IntelR Anti-Theft (AT) : enabled |
| ME Capability: IntelR Capability Licensing Service (CLS) : enabled |
| ME Capability: IntelR Power Sharing Technology (MPC) : enabled |
| ME Capability: ICC Over Clocking : enabled |
| ME Capability: Protected Audio Video Path (PAVP) : enabled |
| ME Capability: IPV6 : enabled |
| ME Capability: KVM Remote Control (KVM) : enabled |
| ME Capability: Outbreak Containment Heuristic (OCH) : disabled |
| ME Capability: Virtual LAN (VLAN) : enabled |
| ME Capability: TLS : enabled |
| ME Capability: Wireless LAN (WLAN) : enabled |
| PCI: 00:16.0 init finished in 63 usecs |
| PCI: 00:19.0 init ... |
| PCI: 00:19.0 init finished in 1 usecs |
| PCI: 00:1a.0 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1a.0 init finished in 12 usecs |
| PCI: 00:1b.0 init ... |
| Azalia: base = f1630000 |
| Azalia: codec_mask = 09 |
| Azalia: Initializing codec #3 |
| Azalia: codec viddid: 80862806 |
| Azalia: verb_size: 16 |
| Azalia: verb loaded. |
| Azalia: Initializing codec #0 |
| Azalia: codec viddid: 10ec0269 |
| Azalia: verb_size: 44 |
| Azalia: verb loaded. |
| PCI: 00:1b.0 init finished in 4601 usecs |
| PCI: 00:1c.0 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.0 init finished in 11 usecs |
| PCI: 00:1c.1 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.1 init finished in 10 usecs |
| PCI: 00:1c.2 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.2 init finished in 14 usecs |
| PCI: 00:1d.0 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1d.0 init finished in 13 usecs |
| PCI: 00:1f.0 init ... |
| pch: lpc_init |
| IOAPIC: Initializing IOAPIC at 0xfec00000 |
| IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| IOAPIC: ID = 0x02 |
| IOAPIC: Dumping registers |
| reg 0x0000: 0x02000000 |
| reg 0x0001: 0x00170020 |
| reg 0x0002: 0x00170020 |
| CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19dc0 size 83c |
| Set power off after power failure. |
| CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19dc0 size 83c |
| NMI sources enabled. |
| PantherPoint PM init |
| rtc_failed = 0x0 |
| RTC Init |
| Enabling BIOS updates outside of SMM... Disabling ACPI via APMC: |
| done. |
| pch_spi_init |
| PCI: 00:1f.0 init finished in 824 usecs |
| PCI: 00:1f.2 init ... |
| SATA: Initializing... |
| CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19dc0 size 83c |
| SATA: Controller in AHCI mode. |
| ABAR: f1635000 |
| PCI: 00:1f.2 init finished in 307 usecs |
| PCI: 00:1f.3 init ... |
| PCI: 00:1f.3 init finished in 7 usecs |
| PCI: 02:00.0 init ... |
| PCI: 02:00.0 init finished in 14 usecs |
| PCI: 03:00.0 init ... |
| PCI: 03:00.0 init finished in 1 usecs |
| PNP: 00ff.2 init ... |
| PNP: 00ff.2 init finished in 0 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:54 init ... |
| I2C: 01:54 init finished in 1 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:55 init ... |
| I2C: 01:55 init finished in 1 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:56 init ... |
| I2C: 01:56 init finished in 1 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:57 init ... |
| I2C: 01:57 init finished in 1 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5c init ... |
| Locking EEPROM RFID |
| init EEPROM done |
| I2C: 01:5c init finished in 24120 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5d init ... |
| I2C: 01:5d init finished in 1 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5e init ... |
| I2C: 01:5e init finished in 1 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5f init ... |
| I2C: 01:5f init finished in 1 usecs |
| Devices initialized |
| Show all devs... After init. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 02:00.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 0 |
| PCI: 00:1c.4: enabled 0 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 00ff.1: enabled 1 |
| PNP: 00ff.2: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 1 |
| I2C: 01:54: enabled 1 |
| I2C: 01:55: enabled 1 |
| I2C: 01:56: enabled 1 |
| I2C: 01:57: enabled 1 |
| I2C: 01:5c: enabled 1 |
| I2C: 01:5d: enabled 1 |
| I2C: 01:5e: enabled 1 |
| I2C: 01:5f: enabled 1 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 1 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:04.0: enabled 0 |
| PCI: 03:00.0: enabled 1 |
| Unknown device path type: 0 |
| : enabled 1 |
| APIC: 01: enabled 1 |
| APIC: 02: enabled 1 |
| APIC: 03: enabled 1 |
| BS: BS_DEV_INIT times (us): entry 6 run 150513 exit 0 |
| Finalize devices... |
| PCI: 00:1f.0 final |
| Devices finalized |
| BS: BS_POST_DEVICE times (us): entry 0 run 2 exit 0 |
| BS: BS_OS_RESUME_CHECK times (us): entry 0 run 1 exit 0 |
| Updating MRC cache data. |
| No MRC cache in cbmem. Can't update flash. |
| CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0) |
| CBFS: Locating 'fallback/dsdt.aml' |
| CBFS: Found @ offset 1a640 size 3443 |
| CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0) |
| CBFS: Locating 'fallback/slic' |
| CBFS: 'fallback/slic' not found. |
| ACPI: Writing ACPI tables at 7ff07000. |
| ACPI: * FACS |
| ACPI: * DSDT |
| ACPI: * FADT |
| ACPI: added table 1/32, length now 40 |
| ACPI: * SSDT |
| Found 1 CPU(s) with 4 core(s) each. |
| PSS: 2601MHz power 35000 control 0x2100 status 0x2100 |
| PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 31561 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 28247 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 25084 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 22064 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 19135 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 16344 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 13666 control 0xc00 status 0xc00 |
| PSS: 2601MHz power 35000 control 0x2100 status 0x2100 |
| PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 31561 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 28247 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 25084 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 22064 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 19135 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 16344 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 13666 control 0xc00 status 0xc00 |
| PSS: 2601MHz power 35000 control 0x2100 status 0x2100 |
| PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 31561 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 28247 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 25084 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 22064 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 19135 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 16344 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 13666 control 0xc00 status 0xc00 |
| PSS: 2601MHz power 35000 control 0x2100 status 0x2100 |
| PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 31561 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 28247 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 25084 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 22064 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 19135 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 16344 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 13666 control 0xc00 status 0xc00 |
| \_SB.PCI0.RP02.WIFI: PCI: 03:00.0 |
| ACPI: added table 2/32, length now 44 |
| ACPI: * MCFG |
| ACPI: added table 3/32, length now 48 |
| ACPI: * TCPA |
| TCPA log created at 7fef6000 |
| ACPI: added table 4/32, length now 52 |
| ACPI: * MADT |
| ACPI: added table 5/32, length now 56 |
| current = 7ff0c020 |
| ACPI: * DMAR |
| ACPI: added table 6/32, length now 60 |
| current = 7ff0c0d0 |
| ACPI: * HPET |
| ACPI: added table 7/32, length now 64 |
| GET_VBIOS: aa55 8086 0 0 3 |
| ... VBIOS found at 000c0000 |
| ACPI: done. |
| ACPI tables: 28944 bytes. |
| smbios_write_tables: 7fef5000 |
| recv_ec_data: 0x47 |
| recv_ec_data: 0x31 |
| recv_ec_data: 0x48 |
| recv_ec_data: 0x54 |
| recv_ec_data: 0x33 |
| recv_ec_data: 0x35 |
| recv_ec_data: 0x57 |
| recv_ec_data: 0x57 |
| recv_ec_data: 0x16 |
| recv_ec_data: 0x03 |
| Create SMBIOS type 17 |
| Root Device (LENOVO ThinkPad T430) |
| CPU_CLUSTER: 0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| APIC: 00 (unknown) |
| APIC: acac (Intel SandyBridge/IvyBridge CPU) |
| DOMAIN: 0000 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:14.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:19.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1a.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1b.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 02:00.0 (unknown) |
| PCI: 00:1c.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.4 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.7 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1d.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1e.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PNP: 00ff.1 (Lenovo Power Management Hardware Hub 7) |
| PNP: 00ff.2 (Lenovo H8 EC) |
| PCI: 00:1f.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| I2C: 01:54 (AT24RF08C) |
| I2C: 01:55 (AT24RF08C) |
| I2C: 01:56 (AT24RF08C) |
| I2C: 01:57 (AT24RF08C) |
| I2C: 01:5c (AT24RF08C) |
| I2C: 01:5d (AT24RF08C) |
| I2C: 01:5e (AT24RF08C) |
| I2C: 01:5f (AT24RF08C) |
| PCI: 00:1f.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:00.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:01.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:02.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:04.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 03:00.0 (unknown) |
| Unknown device path type: 0 |
| (unknown) |
| APIC: 01 (unknown) |
| APIC: 02 (unknown) |
| APIC: 03 (unknown) |
| SMBIOS tables: 645 bytes. |
| Writing table forward entry at 0x00000500 |
| Wrote coreboot table at: 00000500, 0x10 bytes, checksum cfeb |
| Writing coreboot table at 0x7ff2b000 |
| CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 19dc0 size 83c |
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1. 0000000000001000-000000000009ffff: RAM |
| 2. 00000000000a0000-00000000000fffff: RESERVED |
| 3. 0000000000100000-000000007fef4fff: RAM |
| 4. 000000007fef5000-000000007fffffff: CONFIGURATION TABLES |
| 5. 0000000080000000-00000000829fffff: RESERVED |
| 6. 00000000f8000000-00000000fbffffff: RESERVED |
| 7. 00000000fed90000-00000000fed91fff: RESERVED |
| 8. 0000000100000000-000000027b5fffff: RAM |
| flash size 0xc00000 bytes |
| SF: Detected Opaque HW-sequencing with sector size 0x1000, total 0xc00000 |
| CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0) |
| FMAP: Found "FLASH" version 1.1 at b00000. |
| FMAP: base = ff400000 size = c00000 #areas = 3 |
| Wrote coreboot table at: 7ff2b000, 0xb7c bytes, checksum 72f4 |
| coreboot table: 2964 bytes. |
| IMD ROOT 0. 7ffff000 00001000 |
| IMD SMALL 1. 7fffe000 00001000 |
| CONSOLE 2. 7ffbe000 00040000 |
| TIME STAMP 3. 7ffbd000 00000400 |
| ROMSTG STCK 4. 7ffb8000 00005000 |
| RAMSTAGE 5. 7ff75000 00043000 |
| 57a9e100 6. 7ff33000 00041950 |
| COREBOOT 7. 7ff2b000 00008000 |
| ACPI 8. 7ff07000 00024000 |
| ACPI GNVS 9. 7ff06000 00001000 |
| TCPA LOG 10. 7fef6000 00010000 |
| SMBIOS 11. 7fef5000 00000800 |
| IMD small region: |
| IMD ROOT 0. 7fffec00 00000400 |
| CAR GLOBALS 1. 7fffeac0 00000140 |
| MEM INFO 2. 7fffe960 00000141 |
| ROMSTAGE 3. 7fffe940 00000004 |
| 57a9e000 4. 7fffe920 00000010 |
| BS: BS_WRITE_TABLES times (us): entry 2 run 25565 exit 0 |
| CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0) |
| CBFS: Locating 'fallback/payload' |
| CBFS: Found @ offset 4d4c0 size 10b48 |
| Loading segment from ROM address 0xfff4d5f8 |
| code (compression=1) |
| New segment dstaddr 0xdfaa0 memsize 0x20560 srcaddr 0xfff4d630 filesize 0x10b10 |
| Loading segment from ROM address 0xfff4d614 |
| Entry Point 0x000ff06e |
| Payload being loaded at below 1MiB without region being marked as RAM usable. |
| Loading Segment: addr: 0x00000000000dfaa0 memsz: 0x0000000000020560 filesz: 0x0000000000010b10 |
| lb: [0x000000007ff76000, 0x000000007ffb7950) |
| Post relocation: addr: 0x00000000000dfaa0 memsz: 0x0000000000020560 filesz: 0x0000000000010b10 |
| using LZMA |
| [ 0x000dfaa0, 00100000, 0x00100000) <- fff4d630 |
| dest 000dfaa0, end 00100000, bouncebuffer ffffffff |
| Loaded segments |
| BS: BS_PAYLOAD_LOAD times (us): entry 0 run 27856 exit 0 |
| PCH watchdog disabled |
| Jumping to boot code at 000ff06e(7ff2b000) |
| CPU0: stack: 7ffad000 - 7ffae000, lowest used address 7ffad880, stack used: 1920 bytes |
| SeaBIOS (version rel-1.10.0-53-gdd9bba5-dirty-20170729_105005-localhost.localdomain) |
| BUILD: gcc: (coreboot toolchain v1.44 March 3rd, 2017) 6.3.0 binutils: (GNU Binutils) 2.28 |
| Found coreboot cbmem console @ 7ffbe000 |
| Found mainboard LENOVO ThinkPad T430 |
| malloc preinit |
| Relocating init from 0x000e1220 to 0x7fea7e20 (size 53568) |
| malloc init |
| Found CBFS header at 0xfff00138 |
| Add romfile: cbfs master header (size=32) |
| Add romfile: fallback/romstage (size=81284) |
| Add romfile: cpu_microcode_blob.bin (size=22528) |
| Add romfile: config (size=697) |
| Add romfile: revision (size=575) |
| Add romfile: cmos.default (size=256) |
| Add romfile: cmos_layout.bin (size=2108) |
| Add romfile: fallback/dsdt.aml (size=13379) |
| Add romfile: payload_config (size=1684) |
| Add romfile: payload_revision (size=279) |
| Add romfile: etc/ps2-keyboard-spinup (size=8) |
| Add romfile: (size=6872) |
| Add romfile: mrc.cache (size=65536) |
| Add romfile: fallback/ramstage (size=92409) |
| Add romfile: vgaroms/seavgabios.bin (size=27648) |
| Add romfile: fallback/payload (size=68424) |
| Add romfile: (size=658904) |
| Add romfile: bootblock (size=4200) |
| multiboot: eax=7ffa5540, ebx=7ffa54f4 |
| init ivt |
| init bda |
| init bios32 |
| init PMM |
| init PNPBIOS table |
| init keyboard |
| init mouse |
| init pic |
| math cp init |
| PCI probe |
| Found 17 PCI devices (max PCI bus is 04) |
| Relocating coreboot bios tables |
| Copying SMBIOS entry point from 0x7fef5000 to 0x000f69a0 |
| Copying ACPI RSDP from 0x7ff07000 to 0x000f6970 |
| Using pmtimer, ioport 0x508 |
| init timer |
| Scan for VGA option rom |
| Copying data 27648@0xfff46988 to 27648@0x000c0000 |
| Running option rom at c000:0003 |
| pmm call arg1=0 |
| pmm00: length=200 handle=ffffffff flags=9 |
| Turning on vga text mode console |
| SeaBIOS (version rel-1.10.0-53-gdd9bba5-dirty-20170729_105005-localhost.localdomain) |
| Machine UUID 3dca3501-52a3-11cb-a150-e3aa54d41674 |
| init usb |
| XHCI init on dev 00:14.0: regs @ 0xf1620000, 8 ports, 32 slots, 32 byte contexts |
| XHCI protocol USB 2.00, 4 ports (offset 1), def 3001 |
| XHCI protocol USB 3.00, 4 ports (offset 5), def 1000 |
| XHCI extcap 0xc1 @ 0xf1628040 |
| XHCI extcap 0xc0 @ 0xf1628070 |
| XHCI extcap 0x1 @ 0xf1628330 |
| /7fea5000\ Start thread |
| |7fea5000| configure_xhci: resetting |
| EHCI init on dev 00:1a.0 (regs=0xf1636020) |
| /7fea4000\ Start thread |
| |7fea5000| configure_xhci: setup 16 scratch pad buffers |
| EHCI init on dev 00:1d.0 (regs=0xf1637020) |
| /7fea3000\ Start thread |
| init ps2port |
| /7fea2000\ Start thread |
| |7fea2000| Copying data 8@0xfff1e4b8 to 8@0x7fea2fd4 |
| init floppy drives |
| init hard drives |
| init ahci |
| AHCI controller at 00:1f.2, iobase 0xf1635000, irq 10 |
| AHCI: cap 0xff30ff05, ports_impl 0x17 |
| /7fea0000\ Start thread |
| |7fea0000| AHCI/0: probing |
| /7fe9f000\ Start thread |
| |7fe9f000| AHCI/1: probing |
| /7fe9d000\ Start thread |
| |7fe9d000| AHCI/2: probing |
| |7fea0000| AHCI/0: link up |
| /7fe9c000\ Start thread |
| |7fe9c000| AHCI/4: probing |
| /7fe9b000\ Start thread |
| |7fe9b000| Searching bootorder for: /pci@i0cf8/pci-bridge@1c/*@0 |
| \7fe9b000/ End thread |
| init megasas |
| init nvme |
| init lpt |
| Found 0 lpt ports |
| init serial |
| Found 0 serial ports |
| |7fe9f000| AHCI/1: link up |
| |7fe9f000| Searching bootorder for: /pci@i0cf8/*@1f,2/drive@1/disk@0 |
| |7fe9f000| AHCI/1: registering: "DVD/CD [AHCI/1: HL-DT-STDVDRAM GT33N ATAPI-7 DVD/CD]" |
| |7fe9f000| Registering bootable: DVD/CD [AHCI/1: HL-DT-STDVDRAM GT33N ATAPI-7 DVD/CD] (type:3 prio:102 data:f6900) |
| \7fe9f000/ End thread |
| |7fe9d000| AHCI/2: link down |
| \7fe9d000/ End thread |
| |7fe9c000| AHCI/4: link down |
| \7fe9c000/ End thread |
| |7fea0000| AHCI/0: ... finished, status 0x51, ERROR 0x4 |
| |7fea0000| Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0 |
| |7fea0000| AHCI/0: supported modes: udma 6, multi-dma 2, pio 4 |
| |7fea0000| AHCI/0: Set transfer mode to UDMA-6 |
| |7fea0000| AHCI/0: registering: "AHCI/0: Crucial_CT120M500SSD1 ATA-9 Hard-Disk (111 GiBytes)" |
| |7fea0000| Registering bootable: AHCI/0: Crucial_CT120M500SSD1 ATA-9 Hard-Disk (111 GiBytes) (type:2 prio:103 data:f68b0) |
| \7fea0000/ End thread |
| /7fea0000\ Start thread |
| /7fe9f000\ Start thread |
| /7fe9d000\ Start thread |
| /7fe9c000\ Start thread |
| /7fe9b000\ Start thread |
| /7fe9a000\ Start thread |
| /7fe99000\ Start thread |
| /7fe98000\ Start thread |
| /7fe97000\ Start thread |
| /7fe96000\ Start thread |
| /7fe95000\ Start thread |
| /7fe94000\ Start thread |
| /7fe93000\ Start thread |
| /7fe92000\ Start thread |
| |7fe97000| set_address 0x7fea67d0 |
| |7fe95000| set_address 0x7fea6660 |
| |7fe97000| config_usb: 0x7fea1b50 |
| |7fe97000| device rev=0200 cls=09 sub=00 proto=01 size=64 |
| |7fe95000| config_usb: 0x7fea1a50 |
| |7fe95000| device rev=0200 cls=09 sub=00 proto=01 size=64 |
| \7fea0000/ End thread |
| \7fe9d000/ End thread |
| \7fe9f000/ End thread |
| \7fe9c000/ End thread |
| \7fe9b000/ End thread |
| \7fe9a000/ End thread |
| \7fe99000/ End thread |
| \7fe98000/ End thread |
| |7fea5000| XHCI no devices found |
| \7fea5000/ End thread |
| \7fe96000/ End thread |
| \7fe94000/ End thread |
| \7fe93000/ End thread |
| \7fe92000/ End thread |
| /7fea5000\ Start thread |
| /7fea0000\ Start thread |
| /7fe9f000\ Start thread |
| /7fe9d000\ Start thread |
| /7fe9c000\ Start thread |
| /7fe9b000\ Start thread |
| /7fe9a000\ Start thread |
| /7fe99000\ Start thread |
| /7fe98000\ Start thread |
| /7fe96000\ Start thread |
| /7fe94000\ Start thread |
| /7fe93000\ Start thread |
| /7fe92000\ Start thread |
| /7fe91000\ Start thread |
| |7fea5000| set_address 0x7fea67d0 |
| |7fea5000| config_usb: 0x7fea1950 |
| |7fea5000| device rev=0200 cls=00 sub=00 proto=00 size=8 |
| \7fea5000/ End thread |
| |7fe9b000| set_address 0x7fea67d0 |
| |7fe9b000| config_usb: 0x7fea1950 |
| |7fe9b000| device rev=0200 cls=ef sub=02 proto=01 size=64 |
| |7fe9b000| usb_hid_setup 0x7fea1950 |
| \7fe9b000/ End thread |
| |7fe9d000| set_address 0x7fea67d0 |
| |7fe9d000| config_usb: 0x7fea1950 |
| |7fe9d000| device rev=0200 cls=ff sub=01 proto=01 size=64 |
| \7fe9d000/ End thread |
| |7fe9f000| set_address 0x7fea67d0 |
| \7fe9a000/ End thread |
| \7fe98000/ End thread |
| \7fe9c000/ End thread |
| \7fe99000/ End thread |
| \7fea0000/ End thread |
| \7fe93000/ End thread |
| \7fe94000/ End thread |
| \7fe96000/ End thread |
| \7fe91000/ End thread |
| \7fe92000/ End thread |
| |7fe95000| Initialized USB HUB (0 ports used) |
| \7fe95000/ End thread |
| \7fea3000/ End thread |
| |7fe9f000| config_usb: 0x7fea1950 |
| |7fe9f000| device rev=0110 cls=00 sub=00 proto=00 size=8 |
| \7fe9f000/ End thread |
| |7fe97000| Initialized USB HUB (0 ports used) |
| \7fe97000/ End thread |
| \7fea4000/ End thread |
| |7fea2000| PS2 keyboard initialized |
| \7fea2000/ End thread |
| All threads complete. |
| Scan for option roms |
| |
| Press ESC for boot menu. |
| |
| Checking for bootsplash |
| Searching bootorder for: HALT |
| Mapping cd drive 0x000f6900 |
| Mapping hd drive 0x000f68b0 to 0 |
| drive 0x000f68b0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=234441648 |
| finalize PMM |
| malloc finalize |
| Space available for UMB: c7000-eb000, f61c0-f6880 |
| Returned 180224 bytes of ZoneHigh |
| e820 map has 8 items: |
| 0: 0000000000000000 - 000000000009fc00 = 1 RAM |
| 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED |
| 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED |
| 3: 0000000000100000 - 000000007fee1000 = 1 RAM |
| 4: 000000007fee1000 - 0000000082a00000 = 2 RESERVED |
| 5: 00000000f8000000 - 00000000fc000000 = 2 RESERVED |
| 6: 00000000fed90000 - 00000000fed92000 = 2 RESERVED |
| 7: 0000000100000000 - 000000027b600000 = 1 RAM |
| Jump to int19 |
| enter handle_19: |
| NULL |
| Booting from DVD/CD... |
| AHCI/1: ... finished, status 0x51, ERROR 0x20 |
| Device reports MEDIUM NOT PRESENT |
| scsi_is_ready returned -1 |
| AHCI/1: ... finished, status 0x51, ERROR 0x20 |
| Boot failed: Could not read from CDROM (code 0003) |
| enter handle_18: |
| NULL |
| Booting from Hard Disk... |
| Booting from 0000:7c00 |
| |