| |
| |
| coreboot-4.0-8821-g1ea2e76 Sat Apr 4 02:04:24 UTC 2015 romstage starting... |
| BSP Family_Model: 00100f62 |
| *sysinfo range: [000c4000,000c7c31] |
| bsp_apicid = 00 |
| cpu_init_detectedx = 00000000 |
| [microcode] patch id to apply = 0x010000c7 |
| [microcode] updated to patch id = 0x010000c7 success |
| POST: 0x33 |
| cpuSetAMDMSR done |
| POST: 0x34 |
| Enter amd_ht_init() |
| AMD_CB_EventNotify() |
| event class: 02 |
| event: 2005 |
| data: 05 00 00 00 01 |
| AMD_CB_EventNotify() |
| event class: 05 |
| event: 2006 |
| data: 04 00 00 ff |
| Exit amd_ht_init() |
| POST: 0x35 |
| cpuSetAMDPCI 00 done |
| Prep FID/VID Node:00 |
| F3x80: e600e681 |
| F3x84: 80e641e6 |
| F3xD4: c8810f26 |
| F3xD8: 03001016 |
| F3xDC: 00005328 |
| POST: 0x36 |
| core0 started: |
| start_other_cores() |
| init node: 00 cores: 01 |
| Start other core - nodeid: 00 cores: 01 |
| POST: 0x37 |
| started ap apicid: * AP 01started |
| |
| POST: 0x38 |
| rs780_early_setup() |
| fam10_optimization() |
| rs780_por_init |
| sb700_early_setup() |
| sb700_devices_por_init() |
| sb700_devices_por_init(): SMBus Device, BDF:0-20-0 |
| SMBus controller enabled, sb revision is A14 |
| sb700_devices_por_init(): IDE Device, BDF:0-20-1 |
| sb700_devices_por_init(): LPC Device, BDF:0-20-3 |
| sb700_devices_por_init(): P2P Bridge, BDF:0-20-4 |
| sb700_devices_por_init(): SATA Device, BDF:0-18-0 |
| sb700_pmio_por_init() |
| |
| Begin FIDVID MSR 0xc0010071 0x30ba0063 0x3c005040 |
| POST: 0x39 |
| POST: 0x3a |
| End FIDVIDMSR 0xc0010071 0x30ba0063 0x3c00180d |
| rs780_htinit cpu_ht_freq=0. |
| rs780_htinit: HT1 mode |
| POST: 0x3b |
| fill_mem_ctrl() |
| POST: 0x40 |
| raminit_amdmct() |
| raminit_amdmct begin: |
| DIMMPresence: DIMMValid=3 |
| DIMMPresence: DIMMPresent=3 |
| DIMMPresence: RegDIMMPresent=0 |
| DIMMPresence: DimmECCPresent=0 |
| DIMMPresence: DimmPARPresent=0 |
| DIMMPresence: Dimmx4Present=0 |
| DIMMPresence: Dimmx8Present=3 |
| DIMMPresence: Dimmx16Present=0 |
| DIMMPresence: DimmPlPresent=0 |
| DIMMPresence: DimmDRPresent=0 |
| DIMMPresence: DimmQRPresent=0 |
| DIMMPresence: DATAload[0]=1 |
| DIMMPresence: MAload[0]=8 |
| DIMMPresence: MAdimms[0]=1 |
| DIMMPresence: DATAload[1]=1 |
| DIMMPresence: MAload[1]=8 |
| DIMMPresence: MAdimms[1]=1 |
| DIMMPresence: Status 1000 |
| DIMMPresence: ErrStatus 0 |
| DIMMPresence: ErrCode 0 |
| DIMMPresence: Done |
| |
| DCTInit_D: mct_DIMMPresence Done |
| SPDCalcWidth: Status 1000 |
| SPDCalcWidth: ErrStatus 0 |
| SPDCalcWidth: ErrCode 0 |
| SPDCalcWidth: Done |
| DCTInit_D: mct_SPDCalcWidth Done |
| SPDGetTCL_D: DIMMCASL 4 |
| SPDGetTCL_D: DIMMAutoSpeed 4 |
| SPDGetTCL_D: Status 1000 |
| SPDGetTCL_D: ErrStatus 0 |
| SPDGetTCL_D: ErrCode 0 |
| SPDGetTCL_D: Done |
| |
| AutoCycTiming: Status 1000 |
| AutoCycTiming: ErrStatus 0 |
| AutoCycTiming: ErrCode 0 |
| AutoCycTiming: Done |
| |
| DCTInit_D: AutoCycTiming_D Done |
| SPDSetBanks: CSPresent 1 |
| SPDSetBanks: Status 1000 |
| SPDSetBanks: ErrStatus 0 |
| SPDSetBanks: ErrCode 0 |
| SPDSetBanks: Done |
| |
| AfterStitch pDCTstat->NodeSysBase = 0 |
| mct_AfterStitchMemory: pDCTstat->NodeSysLimit = 3fffff |
| StitchMemory: Status 1000 |
| StitchMemory: ErrStatus 0 |
| StitchMemory: ErrCode 0 |
| StitchMemory: Done |
| |
| InterleaveBanks_D: Status 1000 |
| InterleaveBanks_D: ErrStatus 80 |
| InterleaveBanks_D: ErrCode 0 |
| InterleaveBanks_D: Done |
| |
| AutoConfig_D: DramControl: 2a06 |
| AutoConfig_D: DramTimingLo: a0092 |
| AutoConfig_D: DramConfigMisc: 0 |
| AutoConfig_D: DramConfigMisc2: 0 |
| AutoConfig_D: DramConfigLo: 8010000 |
| AutoConfig_D: DramConfigHi: f48000b |
| AutoConfig: Status 1000 |
| AutoConfig: ErrStatus 80 |
| AutoConfig: ErrCode 0 |
| AutoConfig: Done |
| |
| DCTInit_D: AutoConfig_D Done |
| DCTInit_D: PlatformSpec_D Done |
| DCTInit_D: StartupDCT_D |
| DCTInit_D: mct_DIMMPresence Done |
| SPDCalcWidth: Status 1000 |
| SPDCalcWidth: ErrStatus 80 |
| SPDCalcWidth: ErrCode 0 |
| SPDCalcWidth: Done |
| DCTInit_D: mct_SPDCalcWidth Done |
| AutoCycTiming: Status 1000 |
| AutoCycTiming: ErrStatus 80 |
| AutoCycTiming: ErrCode 0 |
| AutoCycTiming: Done |
| |
| DCTInit_D: AutoCycTiming_D Done |
| SPDSetBanks: CSPresent 1 |
| SPDSetBanks: Status 1000 |
| SPDSetBanks: ErrStatus 80 |
| SPDSetBanks: ErrCode 0 |
| SPDSetBanks: Done |
| |
| AfterStitch pDCTstat->NodeSysBase = 0 |
| mct_AfterStitchMemory: pDCTstat->NodeSysLimit = 7ffffe |
| StitchMemory: Status 1000 |
| StitchMemory: ErrStatus 80 |
| StitchMemory: ErrCode 0 |
| StitchMemory: Done |
| |
| InterleaveBanks_D: Status 1000 |
| InterleaveBanks_D: ErrStatus 80 |
| InterleaveBanks_D: ErrCode 0 |
| InterleaveBanks_D: Done |
| |
| AutoConfig_D: DramControl: 2a06 |
| AutoConfig_D: DramTimingLo: a0092 |
| AutoConfig_D: DramConfigMisc: 0 |
| AutoConfig_D: DramConfigMisc2: 0 |
| AutoConfig_D: DramConfigLo: 8010000 |
| AutoConfig_D: DramConfigHi: f48000b |
| AutoConfig: Status 1000 |
| AutoConfig: ErrStatus 80 |
| AutoConfig: ErrCode 0 |
| AutoConfig: Done |
| |
| DCTInit_D: AutoConfig_D Done |
| DCTInit_D: PlatformSpec_D Done |
| DCTInit_D: StartupDCT_D |
| mctAutoInitMCT_D: SyncDCTsReady_D |
| mctAutoInitMCT_D: HTMemMapInit_D |
| Node: 00 base: 00 limit: 7fffff BottomIO: c00000 |
| Node: 00 base: 03 limit: 7fffff |
| Node: 01 base: 00 limit: 00 |
| Node: 02 base: 00 limit: 00 |
| Node: 03 base: 00 limit: 00 |
| Node: 04 base: 00 limit: 00 |
| Node: 05 base: 00 limit: 00 |
| Node: 06 base: 00 limit: 00 |
| Node: 07 base: 00 limit: 00 |
| mctAutoInitMCT_D: CPUMemTyping_D |
| CPUMemTyping: Cache32bTOP:800000 |
| CPUMemTyping: Bottom32bIO:800000 |
| CPUMemTyping: Bottom40bIO:0 |
| mctAutoInitMCT_D: DQSTiming_D |
| TrainRcvrEn: Status 1000 |
| TrainRcvrEn: ErrStatus 80 |
| TrainRcvrEn: ErrCode 0 |
| TrainRcvrEn: Done |
| |
| TrainDQSRdWrPos: Status 1000 |
| TrainDQSRdWrPos: TrainErrors 0 |
| TrainDQSRdWrPos: ErrStatus 80 |
| TrainDQSRdWrPos: ErrCode 0 |
| TrainDQSRdWrPos: Done |
| |
| TrainDQSRdWrPos: Status 1000 |
| TrainDQSRdWrPos: TrainErrors 0 |
| TrainDQSRdWrPos: ErrStatus 80 |
| TrainDQSRdWrPos: ErrCode 0 |
| TrainDQSRdWrPos: Done |
| |
| TrainDQSRdWrPos: Status 1000 |
| TrainDQSRdWrPos: TrainErrors 0 |
| TrainDQSRdWrPos: ErrStatus 80 |
| TrainDQSRdWrPos: ErrCode 0 |
| TrainDQSRdWrPos: Done |
| |
| TrainDQSRdWrPos: Status 1000 |
| TrainDQSRdWrPos: TrainErrors 0 |
| TrainDQSRdWrPos: ErrStatus 80 |
| TrainDQSRdWrPos: ErrCode 0 |
| TrainDQSRdWrPos: Done |
| |
| mctAutoInitMCT_D: UMAMemTyping_D |
| mctAutoInitMCT_D: :OtherTiming |
| InterleaveNodes_D: Status 1000 |
| InterleaveNodes_D: ErrStatus 80 |
| InterleaveNodes_D: ErrCode 0 |
| InterleaveNodes_D: Done |
| |
| InterleaveChannels_D: Node 0 |
| InterleaveChannels_D: Status 1000 |
| InterleaveChannels_D: ErrStatus 80 |
| InterleaveChannels_D: ErrCode 0 |
| InterleaveChannels_D: Node 1 |
| InterleaveChannels_D: Status 1000 |
| InterleaveChannels_D: ErrStatus 0 |
| InterleaveChannels_D: ErrCode 0 |
| InterleaveChannels_D: Node 2 |
| InterleaveChannels_D: Status 1000 |
| InterleaveChannels_D: ErrStatus 0 |
| InterleaveChannels_D: ErrCode 0 |
| InterleaveChannels_D: Node 3 |
| InterleaveChannels_D: Status 1000 |
| InterleaveChannels_D: ErrStatus 0 |
| InterleaveChannels_D: ErrCode 0 |
| InterleaveChannels_D: Node 4 |
| InterleaveChannels_D: Status 1000 |
| InterleaveChannels_D: ErrStatus 0 |
| InterleaveChannels_D: ErrCode 0 |
| InterleaveChannels_D: Node 5 |
| InterleaveChannels_D: Status 1000 |
| InterleaveChannels_D: ErrStatus 0 |
| InterleaveChannels_D: ErrCode 0 |
| InterleaveChannels_D: Node 6 |
| InterleaveChannels_D: Status 1000 |
| InterleaveChannels_D: ErrStatus 0 |
| InterleaveChannels_D: ErrCode 0 |
| InterleaveChannels_D: Node 7 |
| InterleaveChannels_D: Status 1000 |
| InterleaveChannels_D: ErrStatus 0 |
| InterleaveChannels_D: ErrCode 0 |
| InterleaveChannels_D: Done |
| |
| mctAutoInitMCT_D: ECCInit_D |
| ECCInit: Node 00 |
| ECCInit: Status 1000 |
| ECCInit: ErrStatus 80 |
| ECCInit: ErrCode 0 |
| ECCInit: Done |
| mctAutoInitMCT_D Done: Global Status: 0 |
| raminit_amdmct end: |
| CBMEM: root @ 6ffff000 254 entries. |
| POST: 0x41 |
| amdmct_cbmem_store_info: Storing AMDMCT configuration in CBMEM |
| POST: 0x42 |
| Prepare CAR migration and stack regions... Fill [003fbc00-003fffff] ... Done |
| Copying data from cache to RAM... Copy [000c4000-000c7cff] to [003fc300 - 003fffff] ... Done |
| Switching to use RAM as stack... Top about 003fc2ec ... Done |
| Disabling cache as ram now |
| Prepare ramstage memory region... Fill [00000000-003fbbff] ... |
| |
| coreboot-4.0-8821-g1ea2e76 Sat Apr 4 02:04:24 UTC 2015 ramstage starting... |
| POST: 0x39 |
| CBMEM: recovering 6/254 entries from root @ 6ffff000 |
| Moving GDT to 6ffd5000...ok |
| POST: 0x70 |
| BS: BS_PRE_DEVICE times (us): entry 7104 run 979 exit 0 |
| POST: 0x71 |
| BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 980 exit 0 |
| POST: 0x72 |
| Enumerating buses... |
| Show all devs... Before device enumeration. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:18.0: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 1 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:03.0: enabled 1 |
| PCI: 00:04.0: enabled 1 |
| PCI: 00:05.0: enabled 0 |
| PCI: 00:06.0: enabled 0 |
| PCI: 00:07.0: enabled 0 |
| PCI: 00:08.0: enabled 0 |
| PCI: 00:09.0: enabled 1 |
| PCI: 00:0a.0: enabled 1 |
| PCI: 00:11.0: enabled 1 |
| PCI: 00:12.0: enabled 1 |
| PCI: 00:12.1: enabled 1 |
| PCI: 00:12.2: enabled 1 |
| PCI: 00:13.0: enabled 1 |
| PCI: 00:13.1: enabled 1 |
| PCI: 00:13.2: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| I2C: 00:50: enabled 1 |
| I2C: 00:51: enabled 1 |
| I2C: 00:52: enabled 1 |
| I2C: 00:53: enabled 1 |
| PCI: 00:14.1: enabled 1 |
| PCI: 00:14.2: enabled 1 |
| PCI: 00:14.3: enabled 1 |
| PNP: 002e.0: enabled 0 |
| PNP: 002e.1: enabled 1 |
| PNP: 002e.2: enabled 0 |
| PNP: 002e.3: enabled 0 |
| PNP: 002e.4: enabled 0 |
| PNP: 002e.5: enabled 1 |
| PNP: 002e.6: enabled 1 |
| PNP: 002e.7: enabled 0 |
| PNP: 002e.8: enabled 0 |
| PNP: 002e.9: enabled 0 |
| PNP: 002e.a: enabled 0 |
| PCI: 00:14.4: enabled 1 |
| PCI: 00:14.5: enabled 1 |
| PCI: 00:18.1: enabled 1 |
| PCI: 00:18.2: enabled 1 |
| PCI: 00:18.3: enabled 1 |
| PCI: 00:18.4: enabled 1 |
| Compare with tree... |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:18.0: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 1 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:03.0: enabled 1 |
| PCI: 00:04.0: enabled 1 |
| PCI: 00:05.0: enabled 0 |
| PCI: 00:06.0: enabled 0 |
| PCI: 00:07.0: enabled 0 |
| PCI: 00:08.0: enabled 0 |
| PCI: 00:09.0: enabled 1 |
| PCI: 00:0a.0: enabled 1 |
| PCI: 00:11.0: enabled 1 |
| PCI: 00:12.0: enabled 1 |
| PCI: 00:12.1: enabled 1 |
| PCI: 00:12.2: enabled 1 |
| PCI: 00:13.0: enabled 1 |
| PCI: 00:13.1: enabled 1 |
| PCI: 00:13.2: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| I2C: 00:50: enabled 1 |
| I2C: 00:51: enabled 1 |
| I2C: 00:52: enabled 1 |
| I2C: 00:53: enabled 1 |
| PCI: 00:14.1: enabled 1 |
| PCI: 00:14.2: enabled 1 |
| PCI: 00:14.3: enabled 1 |
| PNP: 002e.0: enabled 0 |
| PNP: 002e.1: enabled 1 |
| PNP: 002e.2: enabled 0 |
| PNP: 002e.3: enabled 0 |
| PNP: 002e.4: enabled 0 |
| PNP: 002e.5: enabled 1 |
| PNP: 002e.6: enabled 1 |
| PNP: 002e.7: enabled 0 |
| PNP: 002e.8: enabled 0 |
| PNP: 002e.9: enabled 0 |
| PNP: 002e.a: enabled 0 |
| PCI: 00:14.4: enabled 1 |
| PCI: 00:14.5: enabled 1 |
| PCI: 00:18.1: enabled 1 |
| PCI: 00:18.2: enabled 1 |
| PCI: 00:18.3: enabled 1 |
| PCI: 00:18.4: enabled 1 |
| Mainboard MA785GMT-UD2H Enable. dev=0x0013ed80 |
| Init adt7461 end , status 0x02 fd |
| Dev3 is not present. GFX Configuration is One x16 slot |
| scan_static_bus for Root Device |
| setup_bsp_ramtop, TOP MEM: msr.lo = 0x80000000, msr.hi = 0x00000000 |
| setup_bsp_ramtop, TOP MEM2: msr.lo = 0x00000000, msr.hi = 0x00000000 |
| setup_uma_memory: uma size 0x10000000, memory start 0x70000000 |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| CPU_CLUSTER: 0 scanning... |
| PCI: 00:18.3 siblings=1 |
| CPU: APIC: 00 enabled |
| CPU: APIC: 01 enabled |
| DOMAIN: 0000 scanning... |
| PCI: pci_scan_bus for bus 00 |
| POST: 0x24 |
| PCI: 00:18.0 [1022/1200] bus ops |
| PCI: 00:18.0 [1022/1200] enabled |
| PCI: 00:18.1 [1022/1201] enabled |
| PCI: 00:18.2 [1022/1202] enabled |
| PCI: 00:18.3 [1022/1203] ops |
| PCI: 00:18.3 [1022/1203] enabled |
| PCI: 00:18.4 [1022/1204] enabled |
| POST: 0x25 |
| rs780_enable: dev=00140920, VID_DID=0x96011022 |
| Bus-0, Dev-0, Fun-0. |
| enable_pcie_bar3() |
| addr=e0000000,bus=0,devfn=40 |
| gpp_sb_init nb_dev=0x0, dev=0x40, port=0x8 |
| NB_PCI_REG04 = 6. |
| NB_PCI_REG84 = 3000095. |
| NB_PCI_REG4C = 52042. |
| PCI: 00:00.0 [1022/9601] enabled |
| Capability: type 0x08 @ 0xc4 |
| flags: 0x0181 |
| PCI: pci_scan_bus for bus 00 |
| PCI: pci_scan_bus limits devfn 0 - devfn ffffffff |
| PCI: pci_scan_bus upper limit too big. Using 0xff. |
| POST: 0x24 |
| rs780_enable: dev=00140920, VID_DID=0x96011022 |
| Bus-0, Dev-0, Fun-0. |
| enable_pcie_bar3() |
| gpp_sb_init nb_dev=0x0, dev=0x40, port=0x8 |
| NB_PCI_REG04 = 6. |
| NB_PCI_REG84 = 3000095. |
| NB_PCI_REG4C = 52042. |
| PCI: 00:00.0 [1022/9601] enabled |
| rs780_enable: dev=00140880, VID_DID=0x96021022 |
| Bus-0, Dev-1, Fun-0. |
| GC is accessible from now on. |
| Capability: type 0x08 @ 0x44 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0x44 |
| Capability: type 0x08 @ 0x44 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0x44 |
| Capability: type 0x0d @ 0xb0 |
| PCI: 00:01.0 [1022/9602] enabled |
| rs780_enable: dev=001407e0, VID_DID=0x96031022 |
| Bus-0, Dev-2,3, Fun-0. enable=1 |
| rs780_gfx_init, nb_dev=0x00140920, dev=0x001407e0, port=0x2. |
| misc 28 = 1 |
| rs780_gfx_init step5.9.12.1. |
| rs780_gfx_init step5.9.12.3. |
| rs780_gfx_init step5.9.12.9. |
| rs780_gfx_init step1. |
| rs780_gfx_init single_port_configuration. |
| PcieLinkTraining port=2:lc current state=2030400 |
| rs780_gfx_init single_port_configuration step12. |
| rs780_gfx_init single_port_configuration step13. |
| rs780_gfx_init single_port_configuration step14. |
| PCI: Static device PCI: 00:02.0 not found, disabling it. |
| rs780_enable: dev=00140740, VID_DID=0xffffffff |
| Bus-0, Dev-2,3, Fun-0. enable=1 |
| rs780_gfx_init, nb_dev=0x00140920, dev=0x00140740, port=0x3. |
| misc 28 = 1 |
| rs780_gfx_init step5.9.12.1. |
| rs780_gfx_init step5.9.12.3. |
| rs780_gfx_init step5.9.12.9. |
| rs780_gfx_init step1. |
| If dev3.., single port. Do nothing. |
| PCI: Static device PCI: 00:03.0 not found, disabling it. |
| rs780_enable: dev=001406a0, VID_DID=0xffffffff |
| Bus-0, Dev-4,5,6,7, Fun-0. enable=1 |
| gpp_sb_init nb_dev=0x0, dev=0x20, port=0x4 |
| PcieLinkTraining port=4:lc current state=10203 |
| PcieTrainPort port=0x4 result=0 |
| PCI: Static device PCI: 00:04.0 not found, disabling it. |
| rs780_enable: dev=00140600, VID_DID=0xffffffff |
| Bus-0, Dev-4,5,6,7, Fun-0. enable=0 |
| rs780_enable: dev=00140560, VID_DID=0xffffffff |
| Bus-0, Dev-4,5,6,7, Fun-0. enable=0 |
| rs780_enable: dev=001404c0, VID_DID=0xffffffff |
| Bus-0, Dev-4,5,6,7, Fun-0. enable=0 |
| rs780_enable: dev=00140420, VID_DID=0x960a1022 |
| Bus-0, Dev-8, Fun-0. enable=0 |
| rs780_enable: dev=00140380, VID_DID=0x96081022 |
| Bus-0, Dev-9, 10, Fun-0. enable=1 |
| gpp_sb_init nb_dev=0x0, dev=0x48, port=0x9 |
| PcieLinkTraining port=9:lc current state=10203 |
| PcieTrainPort port=0x9 result=0 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Capability: type 0x05 @ 0xa0 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0xb8 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Capability: type 0x05 @ 0xa0 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0xb8 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Capability: type 0x05 @ 0xa0 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0xb8 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| PCI: 00:09.0 subordinate bus PCI Express |
| PCI: 00:09.0 [1022/9608] enabled |
| rs780_enable: dev=001402e0, VID_DID=0x96091022 |
| Bus-0, Dev-9, 10, Fun-0. enable=1 |
| gpp_sb_init nb_dev=0x0, dev=0x50, port=0xa |
| PcieLinkTraining port=a:lc current state=a0b0f10 |
| addr=e0000000,bus=0,devfn=50 |
| PcieTrainPort reg=0x10000 |
| PcieTrainPort port=0xa result=1 |
| disable_pcie_bar3() |
| rs780 unused GPP ports bitmap=0x2fc, force disabled |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Capability: type 0x05 @ 0xa0 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0xb8 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Capability: type 0x05 @ 0xa0 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0xb8 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| Capability: type 0x05 @ 0xa0 |
| Capability: type 0x0d @ 0xb0 |
| Capability: type 0x08 @ 0xb8 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| PCI: 00:0a.0 subordinate bus PCI Express |
| PCI: 00:0a.0 [1022/9609] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:11.0 [1002/4390] ops |
| PCI: 00:11.0 [1002/4390] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:12.0 [1002/4397] ops |
| PCI: 00:12.0 [1002/4397] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:12.1 [1002/4398] ops |
| PCI: 00:12.1 [1002/4398] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:12.2 [1002/4396] ops |
| PCI: 00:12.2 [1002/4396] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:13.0 [1002/4397] ops |
| PCI: 00:13.0 [1002/4397] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:13.1 [1002/4398] ops |
| PCI: 00:13.1 [1002/4398] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:13.2 [1002/4396] ops |
| PCI: 00:13.2 [1002/4396] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:14.0 [1002/4385] bus ops |
| PCI: 00:14.0 [1002/4385] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:14.1 [1002/439c] ops |
| PCI: 00:14.1 [1002/439c] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:14.2 [1002/4383] ops |
| PCI: 00:14.2 [1002/4383] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:14.3 [1002/439d] bus ops |
| PCI: 00:14.3 [1002/439d] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:14.4 [1002/4384] bus ops |
| PCI: 00:14.4 [1002/4384] enabled |
| sb7xx_51xx_enable() |
| PCI: 00:14.5 [1002/4399] ops |
| PCI: 00:14.5 [1002/4399] enabled |
| PCI: 00:18.0 [1022/1200] bus ops |
| PCI: 00:18.0 [1022/1200] enabled |
| PCI: 00:18.1 [1022/1201] enabled |
| PCI: 00:18.2 [1022/1202] enabled |
| PCI: 00:18.3 [1022/1203] ops |
| PCI: 00:18.3 [1022/1203] enabled |
| PCI: 00:18.4 [1022/1204] enabled |
| POST: 0x25 |
| do_pci_scan_bridge for PCI: 00:01.0 |
| PCI: pci_scan_bus for bus 01 |
| POST: 0x24 |
| PCI: 01:05.0 [1002/0000] ops |
| rs780_internal_gfx_enable dev = 0x00166208, nb_dev = 0x00140920. |
| Sysmem TOM = 0_80000000 |
| Sysmem TOM2 = 0_0 |
| PCI: 01:05.0 [1002/9710] enabled |
| POST: 0x25 |
| PCI: pci_scan_bus returning with max=001 |
| POST: 0x55 |
| do_pci_scan_bridge returns max 1 |
| do_pci_scan_bridge for PCI: 00:09.0 |
| PCI: pci_scan_bus for bus 02 |
| POST: 0x24 |
| POST: 0x25 |
| PCI: pci_scan_bus returning with max=002 |
| POST: 0x55 |
| do_pci_scan_bridge returns max 2 |
| do_pci_scan_bridge for PCI: 00:0a.0 |
| PCI: pci_scan_bus for bus 03 |
| POST: 0x24 |
| PCI: 03:00.0 [10ec/8168] enabled |
| POST: 0x25 |
| PCI: pci_scan_bus returning with max=003 |
| POST: 0x55 |
| Capability: type 0x01 @ 0x40 |
| Capability: type 0x05 @ 0x50 |
| Capability: type 0x10 @ 0x70 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x10 @ 0x58 |
| do_pci_scan_bridge returns max 3 |
| scan_static_bus for PCI: 00:14.0 |
| smbus: PCI: 00:14.0[0]->I2C: 01:50 enabled |
| smbus: PCI: 00:14.0[0]->I2C: 01:51 enabled |
| smbus: PCI: 00:14.0[0]->I2C: 01:52 enabled |
| smbus: PCI: 00:14.0[0]->I2C: 01:53 enabled |
| scan_static_bus for PCI: 00:14.0 done |
| scan_static_bus for PCI: 00:14.3 |
| PNP: 002e.0 disabled |
| PNP: 002e.1 enabled |
| PNP: 002e.2 disabled |
| PNP: 002e.3 disabled |
| PNP: 002e.4 disabled |
| PNP: 002e.5 enabled |
| PNP: 002e.6 enabled |
| PNP: 002e.7 disabled |
| PNP: 002e.8 disabled |
| PNP: 002e.9 disabled |
| PNP: 002e.a disabled |
| scan_static_bus for PCI: 00:14.3 done |
| do_pci_scan_bridge for PCI: 00:14.4 |
| PCI: pci_scan_bus for bus 04 |
| POST: 0x24 |
| PCI: 04:0e.0 [104c/8024] enabled |
| POST: 0x25 |
| PCI: pci_scan_bus returning with max=004 |
| POST: 0x55 |
| do_pci_scan_bridge returns max 4 |
| PCI: pci_scan_bus returning with max=004 |
| POST: 0x55 |
| PCI: pci_scan_bus returning with max=004 |
| POST: 0x55 |
| DOMAIN: 0000 passpw: enabled |
| scan_static_bus for Root Device done |
| done |
| BS: BS_DEV_ENUMERATE times (us): entry 0 run 1119076 exit 0 |
| POST: 0x73 |
| found VGA at PCI: 01:05.0 |
| Setting up VGA for PCI: 01:05.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:01.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| Allocating resources... |
| Reading resources... |
| Root Device read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 |
| APIC: 00 missing read_resources |
| APIC: 01 missing read_resources |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 |
| PCI: 00:18.0 read_resources bus 0 link: 0 |
| PCI: 00:00.0 register 1c(00000004), read-only ignoring it |
| PCI: 00:01.0 read_resources bus 1 link: 0 |
| rs780_gfx_read_resources. |
| PCI: 00:01.0 read_resources bus 1 link: 0 done |
| PCI: 00:09.0 register 10(ffffffff), read-only ignoring it |
| PCI: 00:09.0 register 14(ffffffff), read-only ignoring it |
| PCI: 00:09.0 register 38(ffffffff), read-only ignoring it |
| PCI: 00:09.0 read_resources bus 2 link: 0 |
| PCI: 00:09.0 read_resources bus 2 link: 0 done |
| PCI: 00:0a.0 read_resources bus 3 link: 0 |
| PCI: 00:0a.0 read_resources bus 3 link: 0 done |
| PCI: 00:14.0 read_resources bus 1 link: 0 |
| I2C: 01:50 missing read_resources |
| I2C: 01:51 missing read_resources |
| I2C: 01:52 missing read_resources |
| I2C: 01:53 missing read_resources |
| PCI: 00:14.0 read_resources bus 1 link: 0 done |
| PCI: 00:14.3 read_resources bus 0 link: 0 |
| PNP: 002e.6 missing read_resources |
| PCI: 00:14.3 read_resources bus 0 link: 0 done |
| PCI: 00:14.4 read_resources bus 4 link: 0 |
| PCI: 00:14.4 read_resources bus 4 link: 0 done |
| PCI: 00:18.0 read_resources bus 0 link: 0 done |
| PCI: 00:18.0 read_resources bus 0 link: 1 |
| PCI: 00:18.0 read_resources bus 0 link: 1 done |
| PCI: 00:18.0 read_resources bus 0 link: 2 |
| PCI: 00:18.0 read_resources bus 0 link: 2 done |
| PCI: 00:18.0 read_resources bus 0 link: 3 |
| PCI: 00:18.0 read_resources bus 0 link: 3 done |
| PCI: 00:18.0 read_resources bus 0 link: 4 |
| PCI: 00:18.0 read_resources bus 0 link: 4 done |
| PCI: 00:18.0 read_resources bus 0 link: 5 |
| PCI: 00:18.0 read_resources bus 0 link: 5 done |
| PCI: 00:18.0 read_resources bus 0 link: 6 |
| PCI: 00:18.0 read_resources bus 0 link: 6 done |
| PCI: 00:18.0 read_resources bus 0 link: 7 |
| PCI: 00:18.0 read_resources bus 0 link: 7 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 done |
| Root Device read_resources bus 0 link: 0 done |
| Done reading resources. |
| Show resources in subtree (Root Device)...After reading. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: 01 |
| DOMAIN: 0000 child on link 0 PCI: 00:18.0 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 |
| DOMAIN: 0000 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 |
| DOMAIN: 0000 resource base 0 size 80000000 align 0 gran 0 limit 0 flags e0004200 index 7 |
| PCI: 00:18.0 child on link 0 PCI: 00:00.0 |
| PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 10d8 |
| PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 10b8 |
| PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 80200 index 10b0 |
| PCI: 00:00.0 |
| PCI: 00:01.0 child on link 0 PCI: 01:05.0 |
| PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit 1ffffff flags 80102 index 1c |
| PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81202 index 24 |
| PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 01:05.0 |
| PCI: 01:05.0 resource base 0 size 8000000 align 27 gran 27 limit ffffffff flags 1200 index 10 |
| PCI: 01:05.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 14 |
| PCI: 01:05.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 200 index 18 |
| PCI: 01:05.0 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 24 |
| PCI: 00:02.0 |
| PCI: 00:03.0 |
| PCI: 00:04.0 |
| PCI: 00:05.0 |
| PCI: 00:06.0 |
| PCI: 00:07.0 |
| PCI: 00:08.0 |
| PCI: 00:09.0 |
| PCI: 00:0a.0 child on link 0 PCI: 03:00.0 |
| PCI: 00:0a.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c |
| PCI: 00:0a.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:0a.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 03:00.0 |
| PCI: 03:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10 |
| PCI: 03:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 1201 index 18 |
| PCI: 03:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 1201 index 20 |
| PCI: 03:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30 |
| PCI: 00:11.0 |
| PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 |
| PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 |
| PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 |
| PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c |
| PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 |
| PCI: 00:11.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 24 |
| PCI: 00:12.0 |
| PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 |
| PCI: 00:12.1 |
| PCI: 00:12.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 |
| PCI: 00:12.2 |
| PCI: 00:12.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 |
| PCI: 00:13.0 |
| PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 |
| PCI: 00:13.1 |
| PCI: 00:13.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 |
| PCI: 00:13.2 |
| PCI: 00:13.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 |
| PCI: 00:14.0 child on link 0 I2C: 01:50 |
| PCI: 00:14.0 resource base fec00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 74 |
| PCI: 00:14.0 resource base fed00000 size 400 align 8 gran 8 limit ffffffff flags d0000200 index b4 |
| PCI: 00:14.0 resource base b00 size 10 align 8 gran 8 limit ffff flags d0000100 index 90 |
| I2C: 01:50 |
| I2C: 01:51 |
| I2C: 01:52 |
| I2C: 01:53 |
| PCI: 00:14.1 |
| PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 |
| PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 |
| PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 |
| PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c |
| PCI: 00:14.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 |
| PCI: 00:14.2 |
| PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:14.3 child on link 0 PNP: 002e.0 |
| PCI: 00:14.3 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 200 index a0 |
| PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PNP: 002e.0 |
| PNP: 002e.0 resource base 3f0 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 002e.0 resource base 6 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.0 resource base 2 size 0 align 0 gran 0 limit 0 flags c0000800 index 74 |
| PNP: 002e.1 |
| PNP: 002e.1 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 |
| PNP: 002e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.2 |
| PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 |
| PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 |
| PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75 |
| PNP: 002e.3 |
| PNP: 002e.3 resource base 378 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 002e.3 resource base 7 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.4 |
| PNP: 002e.5 |
| PNP: 002e.5 resource base 60 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 |
| PNP: 002e.5 resource base 64 size 8 align 3 gran 3 limit 7ff flags c0000100 index 62 |
| PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.6 |
| PNP: 002e.6 resource base c size 0 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.7 |
| PNP: 002e.8 |
| PNP: 002e.8 resource base 300 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 002e.8 resource base 9 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.9 |
| PNP: 002e.9 resource base 220 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 002e.a |
| PCI: 00:14.4 child on link 0 PCI: 04:0e.0 |
| PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24 |
| PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 04:0e.0 |
| PCI: 04:0e.0 resource base 0 size 800 align 11 gran 11 limit ffffffff flags 200 index 10 |
| PCI: 04:0e.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 14 |
| PCI: 00:14.5 |
| PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 |
| PCI: 00:18.0 |
| PCI: 00:18.1 |
| PCI: 00:18.2 |
| PCI: 00:18.3 |
| PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 200 index 94 |
| PCI: 00:18.4 |
| PCI: 00:18.1 |
| PCI: 00:18.2 |
| PCI: 00:18.3 |
| PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 200 index 94 |
| PCI: 00:18.4 |
| DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff |
| PCI: 00:18.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: 1ffffff |
| PCI: 01:05.0 14 * [0x0 - 0xff] io |
| PCI: 00:01.0 compute_resources_io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:0a.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff |
| PCI: 03:00.0 10 * [0x0 - 0xff] io |
| PCI: 00:0a.0 compute_resources_io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:01.0 1c * [0x0 - 0xfff] io |
| PCI: 00:0a.0 1c * [0x1000 - 0x1fff] io |
| PCI: 00:11.0 20 * [0x2000 - 0x200f] io |
| PCI: 00:14.1 20 * [0x2010 - 0x201f] io |
| PCI: 00:11.0 10 * [0x2020 - 0x2027] io |
| PCI: 00:11.0 18 * [0x2028 - 0x202f] io |
| PCI: 00:14.1 10 * [0x2030 - 0x2037] io |
| PCI: 00:14.1 18 * [0x2038 - 0x203f] io |
| PCI: 00:11.0 14 * [0x2040 - 0x2043] io |
| PCI: 00:11.0 1c * [0x2044 - 0x2047] io |
| PCI: 00:14.1 14 * [0x2048 - 0x204b] io |
| PCI: 00:14.1 1c * [0x204c - 0x204f] io |
| PCI: 00:18.0 compute_resources_io: base: 2050 size: 3000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:18.0 10d8 * [0x0 - 0x2fff] io |
| DOMAIN: 0000 compute_resources_io: base: 3000 size: 3000 align: 12 gran: 0 limit: ffff done |
| DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff |
| PCI: 00:18.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff |
| PCI: 00:01.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff |
| PCI: 01:05.0 10 * [0x0 - 0x7ffffff] prefmem |
| PCI: 00:01.0 compute_resources_prefmem: base: 8000000 size: 8000000 align: 27 gran: 20 limit: ffffffff done |
| PCI: 00:0a.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 03:00.0 20 * [0x0 - 0xffff] prefmem |
| PCI: 03:00.0 18 * [0x10000 - 0x10fff] prefmem |
| PCI: 00:0a.0 compute_resources_prefmem: base: 11000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:01.0 24 * [0x0 - 0x7ffffff] prefmem |
| PCI: 00:0a.0 24 * [0x8000000 - 0x80fffff] prefmem |
| PCI: 00:18.0 compute_resources_prefmem: base: 8100000 size: 8100000 align: 27 gran: 20 limit: ffffffff done |
| PCI: 00:18.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff |
| PCI: 00:01.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 01:05.0 24 * [0x0 - 0xfffff] mem |
| PCI: 01:05.0 18 * [0x100000 - 0x10ffff] mem |
| PCI: 00:01.0 compute_resources_mem: base: 110000 size: 200000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:0a.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 03:00.0 30 * [0x0 - 0xffff] mem |
| PCI: 00:0a.0 compute_resources_mem: base: 10000 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 04:0e.0 14 * [0x0 - 0x3fff] mem |
| PCI: 04:0e.0 10 * [0x4000 - 0x47ff] mem |
| PCI: 00:14.4 compute_resources_mem: base: 4800 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:18.3 94 * [0x0 - 0x3ffffff] mem |
| PCI: 00:01.0 20 * [0x4000000 - 0x41fffff] mem |
| PCI: 00:0a.0 20 * [0x4200000 - 0x42fffff] mem |
| PCI: 00:14.4 20 * [0x4300000 - 0x43fffff] mem |
| PCI: 00:14.2 10 * [0x4400000 - 0x4403fff] mem |
| PCI: 00:12.0 10 * [0x4404000 - 0x4404fff] mem |
| PCI: 00:12.1 10 * [0x4405000 - 0x4405fff] mem |
| PCI: 00:13.0 10 * [0x4406000 - 0x4406fff] mem |
| PCI: 00:13.1 10 * [0x4407000 - 0x4407fff] mem |
| PCI: 00:14.5 10 * [0x4408000 - 0x4408fff] mem |
| PCI: 00:11.0 24 * [0x4409000 - 0x44093ff] mem |
| PCI: 00:12.2 10 * [0x4409400 - 0x44094ff] mem |
| PCI: 00:13.2 10 * [0x4409500 - 0x44095ff] mem |
| PCI: 00:14.3 a0 * [0x4409600 - 0x4409600] mem |
| PCI: 00:18.0 compute_resources_mem: base: 4409601 size: 4500000 align: 26 gran: 20 limit: ffffffff done |
| PCI: 00:18.0 10b8 * [0x0 - 0x80fffff] prefmem |
| PCI: 00:18.0 10b0 * [0xc000000 - 0x104fffff] mem |
| PCI: 00:18.3 94 * [0x14000000 - 0x17ffffff] mem |
| DOMAIN: 0000 compute_resources_mem: base: 18000000 size: 18000000 align: 27 gran: 0 limit: ffffffff done |
| avoid_fixed_resources: DOMAIN: 0000 |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff |
| constrain_resources: DOMAIN: 0000 |
| constrain_resources: PCI: 00:18.0 |
| constrain_resources: PCI: 00:00.0 |
| constrain_resources: PCI: 00:01.0 |
| constrain_resources: PCI: 01:05.0 |
| constrain_resources: PCI: 00:09.0 |
| constrain_resources: PCI: 00:0a.0 |
| constrain_resources: PCI: 03:00.0 |
| constrain_resources: PCI: 00:11.0 |
| constrain_resources: PCI: 00:12.0 |
| constrain_resources: PCI: 00:12.1 |
| constrain_resources: PCI: 00:12.2 |
| constrain_resources: PCI: 00:13.0 |
| constrain_resources: PCI: 00:13.1 |
| constrain_resources: PCI: 00:13.2 |
| constrain_resources: PCI: 00:14.0 |
| constrain_resources: I2C: 01:50 |
| constrain_resources: I2C: 01:51 |
| constrain_resources: I2C: 01:52 |
| constrain_resources: I2C: 01:53 |
| constrain_resources: PCI: 00:14.1 |
| constrain_resources: PCI: 00:14.2 |
| constrain_resources: PCI: 00:14.3 |
| constrain_resources: PNP: 002e.1 |
| constrain_resources: PNP: 002e.5 |
| constrain_resources: PNP: 002e.6 |
| skipping PNP: 002e.6@70 fixed resource, size=0! |
| constrain_resources: PCI: 00:14.4 |
| constrain_resources: PCI: 04:0e.0 |
| constrain_resources: PCI: 00:14.5 |
| constrain_resources: PCI: 00:18.0 |
| constrain_resources: PCI: 00:18.1 |
| constrain_resources: PCI: 00:18.2 |
| constrain_resources: PCI: 00:18.3 |
| constrain_resources: PCI: 00:18.4 |
| constrain_resources: PCI: 00:18.1 |
| constrain_resources: PCI: 00:18.2 |
| constrain_resources: PCI: 00:18.3 |
| constrain_resources: PCI: 00:18.4 |
| avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 0000ffff |
| lim->base 00001000 lim->limit 0000ffff |
| avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff |
| lim->base 80000000 lim->limit dfffffff |
| Setting resources... |
| DOMAIN: 0000 allocate_resources_io: base:1000 size:3000 align:12 gran:0 limit:ffff |
| Assigned: PCI: 00:18.0 10d8 * [0x1000 - 0x3fff] io |
| DOMAIN: 0000 allocate_resources_io: next_base: 4000 size: 3000 align: 12 gran: 0 done |
| PCI: 00:18.0 allocate_resources_io: base:1000 size:3000 align:12 gran:12 limit:ffff |
| Assigned: PCI: 00:01.0 1c * [0x1000 - 0x1fff] io |
| Assigned: PCI: 00:0a.0 1c * [0x2000 - 0x2fff] io |
| Assigned: PCI: 00:11.0 20 * [0x3000 - 0x300f] io |
| Assigned: PCI: 00:14.1 20 * [0x3010 - 0x301f] io |
| Assigned: PCI: 00:11.0 10 * [0x3020 - 0x3027] io |
| Assigned: PCI: 00:11.0 18 * [0x3028 - 0x302f] io |
| Assigned: PCI: 00:14.1 10 * [0x3030 - 0x3037] io |
| Assigned: PCI: 00:14.1 18 * [0x3038 - 0x303f] io |
| Assigned: PCI: 00:11.0 14 * [0x3040 - 0x3043] io |
| Assigned: PCI: 00:11.0 1c * [0x3044 - 0x3047] io |
| Assigned: PCI: 00:14.1 14 * [0x3048 - 0x304b] io |
| Assigned: PCI: 00:14.1 1c * [0x304c - 0x304f] io |
| PCI: 00:18.0 allocate_resources_io: next_base: 3050 size: 3000 align: 12 gran: 12 done |
| PCI: 00:01.0 allocate_resources_io: base:1000 size:1000 align:12 gran:12 limit:ffff |
| Assigned: PCI: 01:05.0 14 * [0x1000 - 0x10ff] io |
| PCI: 00:01.0 allocate_resources_io: next_base: 1100 size: 1000 align: 12 gran: 12 done |
| PCI: 00:0a.0 allocate_resources_io: base:2000 size:1000 align:12 gran:12 limit:ffff |
| Assigned: PCI: 03:00.0 10 * [0x2000 - 0x20ff] io |
| PCI: 00:0a.0 allocate_resources_io: next_base: 2100 size: 1000 align: 12 gran: 12 done |
| PCI: 00:14.4 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:14.4 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done |
| DOMAIN: 0000 allocate_resources_mem: base:c8000000 size:18000000 align:27 gran:0 limit:dfffffff |
| Assigned: PCI: 00:18.0 10b8 * [0xc8000000 - 0xd00fffff] prefmem |
| Assigned: PCI: 00:18.0 10b0 * [0xd4000000 - 0xd84fffff] mem |
| Assigned: PCI: 00:18.3 94 * [0xdc000000 - 0xdfffffff] mem |
| DOMAIN: 0000 allocate_resources_mem: next_base: e0000000 size: 18000000 align: 27 gran: 0 done |
| PCI: 00:18.0 allocate_resources_prefmem: base:c8000000 size:8100000 align:27 gran:20 limit:dfffffff |
| Assigned: PCI: 00:01.0 24 * [0xc8000000 - 0xcfffffff] prefmem |
| Assigned: PCI: 00:0a.0 24 * [0xd0000000 - 0xd00fffff] prefmem |
| PCI: 00:18.0 allocate_resources_prefmem: next_base: d0100000 size: 8100000 align: 27 gran: 20 done |
| PCI: 00:01.0 allocate_resources_prefmem: base:c8000000 size:8000000 align:27 gran:20 limit:dfffffff |
| Assigned: PCI: 01:05.0 10 * [0xc8000000 - 0xcfffffff] prefmem |
| PCI: 00:01.0 allocate_resources_prefmem: next_base: d0000000 size: 8000000 align: 27 gran: 20 done |
| PCI: 00:0a.0 allocate_resources_prefmem: base:d0000000 size:100000 align:20 gran:20 limit:dfffffff |
| Assigned: PCI: 03:00.0 20 * [0xd0000000 - 0xd000ffff] prefmem |
| Assigned: PCI: 03:00.0 18 * [0xd0010000 - 0xd0010fff] prefmem |
| PCI: 00:0a.0 allocate_resources_prefmem: next_base: d0011000 size: 100000 align: 20 gran: 20 done |
| PCI: 00:14.4 allocate_resources_prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff |
| PCI: 00:14.4 allocate_resources_prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:18.0 allocate_resources_mem: base:d4000000 size:4500000 align:26 gran:20 limit:dfffffff |
| Assigned: PCI: 00:18.3 94 * [0xd4000000 - 0xd7ffffff] mem |
| Assigned: PCI: 00:01.0 20 * [0xd8000000 - 0xd81fffff] mem |
| Assigned: PCI: 00:0a.0 20 * [0xd8200000 - 0xd82fffff] mem |
| Assigned: PCI: 00:14.4 20 * [0xd8300000 - 0xd83fffff] mem |
| Assigned: PCI: 00:14.2 10 * [0xd8400000 - 0xd8403fff] mem |
| Assigned: PCI: 00:12.0 10 * [0xd8404000 - 0xd8404fff] mem |
| Assigned: PCI: 00:12.1 10 * [0xd8405000 - 0xd8405fff] mem |
| Assigned: PCI: 00:13.0 10 * [0xd8406000 - 0xd8406fff] mem |
| Assigned: PCI: 00:13.1 10 * [0xd8407000 - 0xd8407fff] mem |
| Assigned: PCI: 00:14.5 10 * [0xd8408000 - 0xd8408fff] mem |
| Assigned: PCI: 00:11.0 24 * [0xd8409000 - 0xd84093ff] mem |
| Assigned: PCI: 00:12.2 10 * [0xd8409400 - 0xd84094ff] mem |
| Assigned: PCI: 00:13.2 10 * [0xd8409500 - 0xd84095ff] mem |
| Assigned: PCI: 00:14.3 a0 * [0xd8409600 - 0xd8409600] mem |
| PCI: 00:18.0 allocate_resources_mem: next_base: d8409601 size: 4500000 align: 26 gran: 20 done |
| PCI: 00:01.0 allocate_resources_mem: base:d8000000 size:200000 align:20 gran:20 limit:dfffffff |
| Assigned: PCI: 01:05.0 24 * [0xd8000000 - 0xd80fffff] mem |
| Assigned: PCI: 01:05.0 18 * [0xd8100000 - 0xd810ffff] mem |
| PCI: 00:01.0 allocate_resources_mem: next_base: d8110000 size: 200000 align: 20 gran: 20 done |
| PCI: 00:0a.0 allocate_resources_mem: base:d8200000 size:100000 align:20 gran:20 limit:dfffffff |
| Assigned: PCI: 03:00.0 30 * [0xd8200000 - 0xd820ffff] mem |
| PCI: 00:0a.0 allocate_resources_mem: next_base: d8210000 size: 100000 align: 20 gran: 20 done |
| PCI: 00:14.4 allocate_resources_mem: base:d8300000 size:100000 align:20 gran:20 limit:dfffffff |
| Assigned: PCI: 04:0e.0 14 * [0xd8300000 - 0xd8303fff] mem |
| Assigned: PCI: 04:0e.0 10 * [0xd8304000 - 0xd83047ff] mem |
| PCI: 00:14.4 allocate_resources_mem: next_base: d8304800 size: 100000 align: 20 gran: 20 done |
| Root Device assign_resources, bus 0 link: 0 |
| 0: mmio_basek=00320000, basek=00000300, limitk=00200000 |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| VGA: PCI: 00:18.0 (aka node 0) link 0 has VGA device |
| PCI: 00:18.0 10d8 <- [0x0000001000 - 0x0000003fff] size 0x00003000 gran 0x0c io <node 0 link 0> |
| PCI: 00:18.0 10b8 <- [0x00c8000000 - 0x00d00fffff] size 0x08100000 gran 0x14 prefmem <node 0 link 0> |
| PCI: 00:18.0 10b0 <- [0x00d4000000 - 0x00d84fffff] size 0x04500000 gran 0x14 mem <node 0 link 0> |
| PCI: 00:18.0 assign_resources, bus 0 link: 0 |
| PCI: 00:01.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io |
| PCI: 00:01.0 24 <- [0x00c8000000 - 0x00cfffffff] size 0x08000000 gran 0x14 bus 01 prefmem |
| PCI: 00:01.0 20 <- [0x00d8000000 - 0x00d81fffff] size 0x00200000 gran 0x14 bus 01 mem |
| PCI: 00:01.0 assign_resources, bus 1 link: 0 |
| PCI: 01:05.0 10 <- [0x00c8000000 - 0x00cfffffff] size 0x08000000 gran 0x1b prefmem |
| PCI: 01:05.0 14 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io |
| PCI: 01:05.0 18 <- [0x00d8100000 - 0x00d810ffff] size 0x00010000 gran 0x10 mem |
| PCI: 01:05.0 24 <- [0x00d8000000 - 0x00d80fffff] size 0x00100000 gran 0x14 mem |
| PCI: 00:01.0 assign_resources, bus 1 link: 0 |
| PCI: 00:0a.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 03 io |
| PCI: 00:0a.0 24 <- [0x00d0000000 - 0x00d00fffff] size 0x00100000 gran 0x14 bus 03 prefmem |
| PCI: 00:0a.0 20 <- [0x00d8200000 - 0x00d82fffff] size 0x00100000 gran 0x14 bus 03 mem |
| PCI: 00:0a.0 assign_resources, bus 3 link: 0 |
| PCI: 03:00.0 10 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io |
| PCI: 03:00.0 18 <- [0x00d0010000 - 0x00d0010fff] size 0x00001000 gran 0x0c prefmem64 |
| PCI: 03:00.0 20 <- [0x00d0000000 - 0x00d000ffff] size 0x00010000 gran 0x10 prefmem64 |
| PCI: 03:00.0 30 <- [0x00d8200000 - 0x00d820ffff] size 0x00010000 gran 0x10 romem |
| PCI: 00:0a.0 assign_resources, bus 3 link: 0 |
| PCI: 00:11.0 10 <- [0x0000003020 - 0x0000003027] size 0x00000008 gran 0x03 io |
| PCI: 00:11.0 14 <- [0x0000003040 - 0x0000003043] size 0x00000004 gran 0x02 io |
| PCI: 00:11.0 18 <- [0x0000003028 - 0x000000302f] size 0x00000008 gran 0x03 io |
| PCI: 00:11.0 1c <- [0x0000003044 - 0x0000003047] size 0x00000004 gran 0x02 io |
| PCI: 00:11.0 20 <- [0x0000003000 - 0x000000300f] size 0x00000010 gran 0x04 io |
| PCI: 00:11.0 24 <- [0x00d8409000 - 0x00d84093ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:12.0 10 <- [0x00d8404000 - 0x00d8404fff] size 0x00001000 gran 0x0c mem |
| PCI: 00:12.1 10 <- [0x00d8405000 - 0x00d8405fff] size 0x00001000 gran 0x0c mem |
| PCI: 00:12.2 10 <- [0x00d8409400 - 0x00d84094ff] size 0x00000100 gran 0x08 mem |
| PCI: 00:13.0 10 <- [0x00d8406000 - 0x00d8406fff] size 0x00001000 gran 0x0c mem |
| PCI: 00:13.1 10 <- [0x00d8407000 - 0x00d8407fff] size 0x00001000 gran 0x0c mem |
| PCI: 00:13.2 10 <- [0x00d8409500 - 0x00d84095ff] size 0x00000100 gran 0x08 mem |
| PCI: 00:14.0 assign_resources, bus 1 link: 0 |
| PCI: 00:14.0 assign_resources, bus 1 link: 0 |
| PCI: 00:14.1 10 <- [0x0000003030 - 0x0000003037] size 0x00000008 gran 0x03 io |
| PCI: 00:14.1 14 <- [0x0000003048 - 0x000000304b] size 0x00000004 gran 0x02 io |
| PCI: 00:14.1 18 <- [0x0000003038 - 0x000000303f] size 0x00000008 gran 0x03 io |
| PCI: 00:14.1 1c <- [0x000000304c - 0x000000304f] size 0x00000004 gran 0x02 io |
| PCI: 00:14.1 20 <- [0x0000003010 - 0x000000301f] size 0x00000010 gran 0x04 io |
| PCI: 00:14.2 10 <- [0x00d8400000 - 0x00d8403fff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:14.3 a0 <- [0x00d8409600 - 0x00d8409600] size 0x00000001 gran 0x00 mem |
| PCI: 00:14.3 assign_resources, bus 0 link: 0 |
| PNP: 002e.1 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io |
| PNP: 002e.1 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq |
| PNP: 002e.5 60 <- [0x0000000060 - 0x0000000067] size 0x00000008 gran 0x03 io |
| PNP: 002e.5 62 <- [0x0000000064 - 0x000000006b] size 0x00000008 gran 0x03 io |
| PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq |
| PNP: 002e.6 missing set_resources |
| PCI: 00:14.3 assign_resources, bus 0 link: 0 |
| PCI: 00:14.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io |
| PCI: 00:14.4 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 04 prefmem |
| PCI: 00:14.4 20 <- [0x00d8300000 - 0x00d83fffff] size 0x00100000 gran 0x14 bus 04 mem |
| PCI: 00:14.4 assign_resources, bus 4 link: 0 |
| PCI: 04:0e.0 10 <- [0x00d8304000 - 0x00d83047ff] size 0x00000800 gran 0x0b mem |
| PCI: 04:0e.0 14 <- [0x00d8300000 - 0x00d8303fff] size 0x00004000 gran 0x0e mem |
| PCI: 00:14.4 assign_resources, bus 4 link: 0 |
| PCI: 00:14.5 10 <- [0x00d8408000 - 0x00d8408fff] size 0x00001000 gran 0x0c mem |
| PCI: 00:18.3 94 <- [0x00d4000000 - 0x00d7ffffff] size 0x04000000 gran 0x1a mem <gart> |
| PCI: 00:18.3 94 <- [0x00d4000000 - 0x00d7ffffff] size 0x04000000 gran 0x1a mem <gart> |
| PCI: 00:18.0 assign_resources, bus 0 link: 0 |
| PCI: 00:18.3 94 <- [0x00dc000000 - 0x00dfffffff] size 0x04000000 gran 0x1a mem <gart> |
| PCI: 00:18.3 94 <- [0x00dc000000 - 0x00dfffffff] size 0x04000000 gran 0x1a mem <gart> |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| Root Device assign_resources, bus 0 link: 0 |
| Done setting resources. |
| Show resources in subtree (Root Device)...After assigning values. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: 01 |
| DOMAIN: 0000 child on link 0 PCI: 00:18.0 |
| DOMAIN: 0000 resource base 1000 size 3000 align 12 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base c8000000 size 18000000 align 27 gran 0 limit dfffffff flags 40040200 index 10000100 |
| DOMAIN: 0000 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 |
| DOMAIN: 0000 resource base 70000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 7 |
| DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10 |
| DOMAIN: 0000 resource base c0000 size 7ff40000 align 0 gran 0 limit 0 flags e0004200 index 20 |
| PCI: 00:18.0 child on link 0 PCI: 00:00.0 |
| PCI: 00:18.0 resource base 1000 size 3000 align 12 gran 12 limit ffff flags 60080100 index 10d8 |
| PCI: 00:18.0 resource base c8000000 size 8100000 align 27 gran 20 limit dfffffff flags 60081200 index 10b8 |
| PCI: 00:18.0 resource base d4000000 size 4500000 align 26 gran 20 limit dfffffff flags 60080200 index 10b0 |
| PCI: 00:00.0 |
| PCI: 00:01.0 child on link 0 PCI: 01:05.0 |
| PCI: 00:01.0 resource base 1000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:01.0 resource base c8000000 size 8000000 align 27 gran 20 limit dfffffff flags 60081202 index 24 |
| PCI: 00:01.0 resource base d8000000 size 200000 align 20 gran 20 limit dfffffff flags 60080202 index 20 |
| PCI: 01:05.0 |
| PCI: 01:05.0 resource base c8000000 size 8000000 align 27 gran 27 limit dfffffff flags 60001200 index 10 |
| PCI: 01:05.0 resource base 1000 size 100 align 8 gran 8 limit ffff flags 60000100 index 14 |
| PCI: 01:05.0 resource base d8100000 size 10000 align 16 gran 16 limit dfffffff flags 60000200 index 18 |
| PCI: 01:05.0 resource base d8000000 size 100000 align 20 gran 20 limit dfffffff flags 60000200 index 24 |
| PCI: 00:02.0 |
| PCI: 00:03.0 |
| PCI: 00:04.0 |
| PCI: 00:05.0 |
| PCI: 00:06.0 |
| PCI: 00:07.0 |
| PCI: 00:08.0 |
| PCI: 00:09.0 |
| PCI: 00:0a.0 child on link 0 PCI: 03:00.0 |
| PCI: 00:0a.0 resource base 2000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:0a.0 resource base d0000000 size 100000 align 20 gran 20 limit dfffffff flags 60081202 index 24 |
| PCI: 00:0a.0 resource base d8200000 size 100000 align 20 gran 20 limit dfffffff flags 60080202 index 20 |
| PCI: 03:00.0 |
| PCI: 03:00.0 resource base 2000 size 100 align 8 gran 8 limit ffff flags 60000100 index 10 |
| PCI: 03:00.0 resource base d0010000 size 1000 align 12 gran 12 limit dfffffff flags 60001201 index 18 |
| PCI: 03:00.0 resource base d0000000 size 10000 align 16 gran 16 limit dfffffff flags 60001201 index 20 |
| PCI: 03:00.0 resource base d8200000 size 10000 align 16 gran 16 limit dfffffff flags 60002200 index 30 |
| PCI: 00:11.0 |
| PCI: 00:11.0 resource base 3020 size 8 align 3 gran 3 limit ffff flags 60000100 index 10 |
| PCI: 00:11.0 resource base 3040 size 4 align 2 gran 2 limit ffff flags 60000100 index 14 |
| PCI: 00:11.0 resource base 3028 size 8 align 3 gran 3 limit ffff flags 60000100 index 18 |
| PCI: 00:11.0 resource base 3044 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c |
| PCI: 00:11.0 resource base 3000 size 10 align 4 gran 4 limit ffff flags 60000100 index 20 |
| PCI: 00:11.0 resource base d8409000 size 400 align 10 gran 10 limit dfffffff flags 60000200 index 24 |
| PCI: 00:12.0 |
| PCI: 00:12.0 resource base d8404000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 10 |
| PCI: 00:12.1 |
| PCI: 00:12.1 resource base d8405000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 10 |
| PCI: 00:12.2 |
| PCI: 00:12.2 resource base d8409400 size 100 align 8 gran 8 limit dfffffff flags 60000200 index 10 |
| PCI: 00:13.0 |
| PCI: 00:13.0 resource base d8406000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 10 |
| PCI: 00:13.1 |
| PCI: 00:13.1 resource base d8407000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 10 |
| PCI: 00:13.2 |
| PCI: 00:13.2 resource base d8409500 size 100 align 8 gran 8 limit dfffffff flags 60000200 index 10 |
| PCI: 00:14.0 child on link 0 I2C: 01:50 |
| PCI: 00:14.0 resource base fec00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 74 |
| PCI: 00:14.0 resource base fed00000 size 400 align 8 gran 8 limit ffffffff flags d0000200 index b4 |
| PCI: 00:14.0 resource base b00 size 10 align 8 gran 8 limit ffff flags d0000100 index 90 |
| I2C: 01:50 |
| I2C: 01:51 |
| I2C: 01:52 |
| I2C: 01:53 |
| PCI: 00:14.1 |
| PCI: 00:14.1 resource base 3030 size 8 align 3 gran 3 limit ffff flags 60000100 index 10 |
| PCI: 00:14.1 resource base 3048 size 4 align 2 gran 2 limit ffff flags 60000100 index 14 |
| PCI: 00:14.1 resource base 3038 size 8 align 3 gran 3 limit ffff flags 60000100 index 18 |
| PCI: 00:14.1 resource base 304c size 4 align 2 gran 2 limit ffff flags 60000100 index 1c |
| PCI: 00:14.1 resource base 3010 size 10 align 4 gran 4 limit ffff flags 60000100 index 20 |
| PCI: 00:14.2 |
| PCI: 00:14.2 resource base d8400000 size 4000 align 14 gran 14 limit dfffffff flags 60000201 index 10 |
| PCI: 00:14.3 child on link 0 PNP: 002e.0 |
| PCI: 00:14.3 resource base d8409600 size 1 align 0 gran 0 limit dfffffff flags 60000200 index a0 |
| PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PNP: 002e.0 |
| PNP: 002e.0 resource base 3f0 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 002e.0 resource base 6 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.0 resource base 2 size 0 align 0 gran 0 limit 0 flags c0000800 index 74 |
| PNP: 002e.1 |
| PNP: 002e.1 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 |
| PNP: 002e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| PNP: 002e.2 |
| PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 |
| PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 |
| PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75 |
| PNP: 002e.3 |
| PNP: 002e.3 resource base 378 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 002e.3 resource base 7 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.4 |
| PNP: 002e.5 |
| PNP: 002e.5 resource base 60 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 |
| PNP: 002e.5 resource base 64 size 8 align 3 gran 3 limit 7ff flags e0000100 index 62 |
| PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| PNP: 002e.6 |
| PNP: 002e.6 resource base c size 0 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.7 |
| PNP: 002e.8 |
| PNP: 002e.8 resource base 300 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 002e.8 resource base 9 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.9 |
| PNP: 002e.9 resource base 220 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| PNP: 002e.a |
| PCI: 00:14.4 child on link 0 PCI: 04:0e.0 |
| PCI: 00:14.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:14.4 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24 |
| PCI: 00:14.4 resource base d8300000 size 100000 align 20 gran 20 limit dfffffff flags 60080202 index 20 |
| PCI: 04:0e.0 |
| PCI: 04:0e.0 resource base d8304000 size 800 align 11 gran 11 limit dfffffff flags 60000200 index 10 |
| PCI: 04:0e.0 resource base d8300000 size 4000 align 14 gran 14 limit dfffffff flags 60000200 index 14 |
| PCI: 00:14.5 |
| PCI: 00:14.5 resource base d8408000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 10 |
| PCI: 00:18.0 |
| PCI: 00:18.1 |
| PCI: 00:18.2 |
| PCI: 00:18.3 |
| PCI: 00:18.3 resource base d4000000 size 4000000 align 26 gran 26 limit dfffffff flags 60000200 index 94 |
| PCI: 00:18.4 |
| PCI: 00:18.1 |
| PCI: 00:18.2 |
| PCI: 00:18.3 |
| PCI: 00:18.3 resource base dc000000 size 4000000 align 26 gran 26 limit dfffffff flags 60000200 index 94 |
| PCI: 00:18.4 |
| Done allocating resources. |
| BS: BS_DEV_RESOURCES times (us): entry 0 run 3057068 exit 0 |
| POST: 0x74 |
| Enabling resources... |
| PCI: 00:18.0 cmd <- 00 |
| PCI: 00:18.1 subsystem <- 1022/3060 |
| PCI: 00:18.1 cmd <- 00 |
| PCI: 00:18.2 subsystem <- 1022/3060 |
| PCI: 00:18.2 cmd <- 00 |
| PCI: 00:18.3 cmd <- 00 |
| PCI: 00:18.4 subsystem <- 1022/3060 |
| PCI: 00:18.4 cmd <- 00 |
| PCI: 00:00.0 subsystem <- 1022/3060 |
| PCI: 00:00.0 cmd <- 06 |
| PCI: 00:01.0 bridge ctrl <- 000b |
| PCI: 00:01.0 cmd <- 07 |
| PCI: 00:09.0 bridge ctrl <- ffff |
| PCI: 00:09.0 cmd <- ffff |
| PCI: 00:0a.0 bridge ctrl <- 0003 |
| PCI: 00:0a.0 cmd <- 07 |
| PCI: 00:11.0 subsystem <- 1022/3060 |
| PCI: 00:11.0 cmd <- 03 |
| PCI: 00:12.0 subsystem <- 1022/3060 |
| PCI: 00:12.0 cmd <- 02 |
| PCI: 00:12.1 subsystem <- 1022/3060 |
| PCI: 00:12.1 cmd <- 02 |
| PCI: 00:12.2 subsystem <- 1022/3060 |
| PCI: 00:12.2 cmd <- 02 |
| PCI: 00:13.0 subsystem <- 1022/3060 |
| PCI: 00:13.0 cmd <- 02 |
| PCI: 00:13.1 subsystem <- 1022/3060 |
| PCI: 00:13.1 cmd <- 02 |
| PCI: 00:13.2 subsystem <- 1022/3060 |
| PCI: 00:13.2 cmd <- 02 |
| PCI: 00:14.0 subsystem <- 1022/3060 |
| PCI: 00:14.0 cmd <- 403 |
| PCI: 00:14.1 subsystem <- 1022/3060 |
| PCI: 00:14.1 cmd <- 01 |
| PCI: 00:14.2 subsystem <- 1022/3060 |
| PCI: 00:14.2 cmd <- 02 |
| PCI: 00:14.3 subsystem <- 1022/3060 |
| PCI: 00:14.3 cmd <- 0f |
| sb700 lpc decode:PNP: 002e.1, base=0x000003f8, end=0x000003ff |
| sb700 lpc decode:PNP: 002e.5, base=0x00000060, end=0x00000067 |
| sb700 lpc decode:PNP: 002e.5, base=0x00000064, end=0x0000006b |
| PCI: 00:14.4 bridge ctrl <- 0003 |
| PCI: 00:14.4 cmd <- 07 |
| PCI: 00:14.5 subsystem <- 1022/3060 |
| PCI: 00:14.5 cmd <- 02 |
| PCI: 00:18.0 cmd <- 00 |
| PCI: 00:18.1 cmd <- 00 |
| PCI: 00:18.2 cmd <- 00 |
| PCI: 00:18.3 cmd <- 00 |
| PCI: 00:18.4 cmd <- 00 |
| PCI: 01:05.0 cmd <- 03 |
| PCI: 03:00.0 cmd <- 03 |
| PCI: 04:0e.0 cmd <- 02 |
| done. |
| BS: BS_DEV_ENABLE times (us): entry 0 run 142422 exit 0 |
| POST: 0x75 |
| Initializing devices... |
| Root Device init |
| Root Device init 1490 usecs |
| POST: 0x75 |
| CPU_CLUSTER: 0 init |
| start_eip=0x00001000, code_size=0x00000031 |
| Initializing CPU #0 |
| CPU: vendor AMD device 100f62 |
| CPU: family 10, model 06, stepping 02 |
| nodeid = 00, coreid = 00 |
| POST: 0x60 |
| Enabling cache |
| CPU ID 0x80000001: 100f62 |
| CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB |
| MTRR: Physical address space: |
| 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 |
| 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 |
| 0x00000000000c0000 - 0x0000000070000000 size 0x6ff40000 type 6 |
| 0x0000000070000000 - 0x00000000c8000000 size 0x58000000 type 0 |
| 0x00000000c8000000 - 0x00000000d0000000 size 0x08000000 type 1 |
| 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0 |
| MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e |
| MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e |
| MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e |
| MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e |
| MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e |
| MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e |
| MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e |
| MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e |
| MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e |
| MTRR: default type WB/UC MTRR counts: 6/4. |
| MTRR: UC selected as default type. |
| MTRR: 0 base 0x0000000000000000 mask 0x0000ffffc0000000 type 6 |
| MTRR: 1 base 0x0000000040000000 mask 0x0000ffffe0000000 type 6 |
| MTRR: 2 base 0x0000000060000000 mask 0x0000fffff0000000 type 6 |
| MTRR: 3 base 0x00000000c8000000 mask 0x0000fffff8000000 type 1 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Setting up local apic... apic_id: 0x00 done. |
| POST: 0x9b |
| CPU model: AMD Athlon(tm) II X2 245 Processor |
| siblings = 01, CPU #0 initialized |
| CPU1: stack_base 0014f000, stack_end 0014fff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 1. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 1. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Waiting for 1 CPUS to stop |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| POST: 0x93 |
| Setting up local apic... apic_id: 0x01 done. |
| POST: 0x9b |
| CPU model: AMD Athlon(tm) II X2 245 Processor |
| siblings = 01, CPU #1 initialized |
| All AP CPUs stopped (7761 loops) |
| CPU1: stack: 0014f000 - 00150000, lowest used address 0014fc5c, stack used: 932 bytes |
| CPU_CLUSTER: 0 init 274770 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 00:18.0 init |
| PCI: 00:18.0 init 1577 usecs |
| POST: 0x75 |
| PCI: 00:18.1 init |
| PCI: 00:18.1 init 1587 usecs |
| POST: 0x75 |
| PCI: 00:18.2 init |
| PCI: 00:18.2 init 1575 usecs |
| POST: 0x75 |
| PCI: 00:18.3 init |
| NB: Function 3 Misc Control.. done. |
| PCI: 00:18.3 init 4765 usecs |
| POST: 0x75 |
| PCI: 00:18.4 init |
| PCI: 00:18.4 init 1585 usecs |
| POST: 0x75 |
| PCI: 00:00.0 init |
| PCI: 00:00.0 init 1575 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 00:11.0 init |
| sata_bar0=3020 |
| sata_bar1=3040 |
| sata_bar2=3028 |
| sata_bar3=3044 |
| sata_bar4=3000 |
| sata_bar5=d8409000 |
| SATA port 0 status = 0 |
| No Primary Master SATA drive on Slot0 |
| SATA port 1 status = 23 |
| 0x6=ff, 0x7=7f |
| drive no longer selected after 0 ms, retrying init |
| 0x6=ff, 0x7=7f |
| drive no longer selected after 0 ms, retrying init |
| 0x6=ff, 0x7=7f |
| drive no longer selected after 0 ms, retrying init |
| 0x6=ff, 0x7=7f |
| drive no longer selected after 0 ms, retrying init |
| 0x6=ff, 0x7=7f |
| drive no longer selected after 0 ms, retrying init |
| 0x6=ff, 0x7=7f |
| drive no longer selected after 0 ms, retrying init |
| 0x6=ff, 0x7=7f |
| drive no longer selected after 0 ms, retrying init |
| 0x6=ff, 0x7=7f |
| drive no longer selected after 0 ms, retrying init |
| 0x6=ff, 0x7=7f |
| drive no longer selected after 0 ms, retrying init |
| 0x6=ff, 0x7=7f |
| drive no longer selected after 0 ms, retrying init |
| Primary Slave device is not ready after 10 tries |
| SATA port 2 status = 0 |
| No Secondary Master SATA drive on Slot2 |
| SATA port 3 status = 0 |
| No Secondary Slave SATA drive on Slot3 |
| PCI: 00:11.0 init 90338 usecs |
| POST: 0x75 |
| PCI: 00:12.0 init |
| PCI: 00:12.0 init 1624 usecs |
| POST: 0x75 |
| PCI: 00:12.1 init |
| PCI: 00:12.1 init 1625 usecs |
| POST: 0x75 |
| PCI: 00:12.2 init |
| usb2_bar0=0xd8409400 |
| rpr 6.23, final dword=809e01c8 |
| PCI: 00:12.2 init 6170 usecs |
| POST: 0x75 |
| PCI: 00:13.0 init |
| PCI: 00:13.0 init 1625 usecs |
| POST: 0x75 |
| PCI: 00:13.1 init |
| PCI: 00:13.1 init 1631 usecs |
| POST: 0x75 |
| PCI: 00:13.2 init |
| usb2_bar0=0xd8409500 |
| rpr 6.23, final dword=809e01c8 |
| PCI: 00:13.2 init 6179 usecs |
| POST: 0x75 |
| PCI: 00:14.0 init |
| sm_init(). |
| IOAPIC: Clearing IOAPIC at fec00000 |
| IOAPIC: 24 interrupts |
| IOAPIC: reg 0x00000000 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000001 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000002 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000003 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000004 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000005 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000006 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000007 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000008 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000009 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000a value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000b value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000c value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000d value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000e value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000f value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000010 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000011 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000012 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000013 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000014 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000015 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000016 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000017 value 0x00000000 0x00010000 |
| set power off after power fail |
| ++++++++++no set NMI+++++ |
| RTC Init |
| sm_init() end |
| PCI: 00:14.0 init 121872 usecs |
| POST: 0x75 |
| PCI: 00:14.1 init |
| PCI: 00:14.1 init 1586 usecs |
| POST: 0x75 |
| PCI: 00:14.2 init |
| base = 0xd8400000 |
| codec_mask = 01 |
| 0(th) codec viddid: 10ec0885 |
| PCI: 00:14.2 init 10174 usecs |
| POST: 0x75 |
| PCI: 00:14.3 init |
| PCI: 00:14.3 init 1612 usecs |
| POST: 0x75 |
| PCI: 00:14.4 init |
| PCI: 00:14.4 init 1629 usecs |
| POST: 0x75 |
| PCI: 00:14.5 init |
| PCI: 00:14.5 init 1631 usecs |
| POST: 0x75 |
| PCI: 00:18.0 init |
| PCI: 00:18.0 init 1584 usecs |
| POST: 0x75 |
| PCI: 00:18.1 init |
| PCI: 00:18.1 init 1585 usecs |
| POST: 0x75 |
| PCI: 00:18.2 init |
| PCI: 00:18.2 init 1584 usecs |
| POST: 0x75 |
| PCI: 00:18.3 init |
| NB: Function 3 Misc Control.. done. |
| PCI: 00:18.3 init 4749 usecs |
| POST: 0x75 |
| PCI: 00:18.4 init |
| PCI: 00:18.4 init 1578 usecs |
| POST: 0x75 |
| PCI: 01:05.0 init |
| internal_gfx_pci_dev_init device=9710, vendor=1002. |
| vgainfo: |
| ulBootUpEngineClock:50000 |
| ulBootUpUMAClock:53300 |
| ulBootUpSidePortClock:0 |
| ulMinSidePortClock:0 |
| ulSystemConfig:0 |
| ulBootUpReqDisplayVector:0 |
| ulOtherDisplayMisc:0 |
| ulDDISlot1Config:0 |
| ulDDISlot2Config:0 |
| ucMemoryType:0 |
| ucUMAChannelNumber:1 |
| ucDockingPinBit:0 |
| ucDockingPinPolarity:0 |
| ulDockingPinCFGInfo:0 |
| ulCPUCapInfo: 2 |
| usNumberOfCyclesInPeriod:0 |
| usMaxNBVoltage:0 |
| usMinNBVoltage:0 |
| usBootUpNBVoltage:0 |
| ulHTLinkFreq:20000 |
| usMinHTLinkWidth:8 |
| usMaxHTLinkWidth:8 |
| usUMASyncStartDelay:100 |
| usUMADataReturnTime:300 |
| usLinkStatusZeroTime:600 |
| ulHighVoltageHTLinkFreq:20000 |
| ulLowVoltageHTLinkFreq:20000 |
| usMaxUpStreamHTLinkWidth:8 |
| usMaxDownStreamHTLinkWidth:8 |
| usMinUpStreamHTLinkWidth:8 |
| usMinDownStreamHTLinkWidth:8 |
| PCI: 01:05.0 init 75454 usecs |
| POST: 0x75 |
| PCI: 03:00.0 init |
| PCI: 03:00.0 init 1586 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PNP: 002e.1 init |
| PNP: 002e.1 init 1490 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PNP: 002e.5 init |
| Keyboard init... |
| No PS/2 keyboard detected. |
| PNP: 002e.5 init 291132 usecs |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| POST: 0x75 |
| PCI: 04:0e.0 init |
| PCI: 04:0e.0 init 1586 usecs |
| Devices initialized |
| Show all devs... After init. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:18.0: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 1 |
| PCI: 00:02.0: enabled 0 |
| PCI: 00:03.0: enabled 0 |
| PCI: 00:04.0: enabled 0 |
| PCI: 00:05.0: enabled 0 |
| PCI: 00:06.0: enabled 0 |
| PCI: 00:07.0: enabled 0 |
| PCI: 00:08.0: enabled 0 |
| PCI: 00:09.0: enabled 1 |
| PCI: 00:0a.0: enabled 1 |
| PCI: 00:11.0: enabled 1 |
| PCI: 00:12.0: enabled 1 |
| PCI: 00:12.1: enabled 1 |
| PCI: 00:12.2: enabled 1 |
| PCI: 00:13.0: enabled 1 |
| PCI: 00:13.1: enabled 1 |
| PCI: 00:13.2: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| I2C: 01:50: enabled 1 |
| I2C: 01:51: enabled 1 |
| I2C: 01:52: enabled 1 |
| I2C: 01:53: enabled 1 |
| PCI: 00:14.1: enabled 1 |
| PCI: 00:14.2: enabled 1 |
| PCI: 00:14.3: enabled 1 |
| PNP: 002e.0: enabled 0 |
| PNP: 002e.1: enabled 1 |
| PNP: 002e.2: enabled 0 |
| PNP: 002e.3: enabled 0 |
| PNP: 002e.4: enabled 0 |
| PNP: 002e.5: enabled 1 |
| PNP: 002e.6: enabled 1 |
| PNP: 002e.7: enabled 0 |
| PNP: 002e.8: enabled 0 |
| PNP: 002e.9: enabled 0 |
| PNP: 002e.a: enabled 0 |
| PCI: 00:14.4: enabled 1 |
| PCI: 00:14.5: enabled 1 |
| PCI: 00:18.1: enabled 1 |
| PCI: 00:18.2: enabled 1 |
| PCI: 00:18.3: enabled 1 |
| PCI: 00:18.4: enabled 1 |
| APIC: 01: enabled 1 |
| PCI: 00:18.0: enabled 1 |
| PCI: 00:18.1: enabled 1 |
| PCI: 00:18.2: enabled 1 |
| PCI: 00:18.3: enabled 1 |
| PCI: 00:18.4: enabled 1 |
| PCI: 01:05.0: enabled 1 |
| PCI: 03:00.0: enabled 1 |
| PCI: 04:0e.0: enabled 1 |
| BS: BS_DEV_INIT times (us): entry 0 run 1178001 exit 0 |
| POST: 0x76 |
| Finalize devices... |
| Devices finalized |
| BS: BS_POST_DEVICE times (us): entry 0 run 4317 exit 0 |
| POST: 0x77 |
| BS: BS_OS_RESUME_CHECK times (us): entry 0 run 980 exit 0 |
| POST: 0x79 |
| POST: 0x9a |
| Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done. |
| Writing IRQ routing tables to 0x6ffd4000...write_pirq_routing_table done. |
| PIRQ table: 48 bytes. |
| POST: 0x9b |
| Wrote the mp table end at: 000f0410 - 000f051c |
| Wrote the mp table end at: 6ffd3010 - 6ffd311c |
| MP table: 284 bytes. |
| POST: 0x9c |
| ACPI: Writing ACPI tables at 6ffaf000. |
| ACPI: * FACS |
| ACPI: * DSDT |
| ACPI: * FADT |
| pm_base: 0x0800 |
| ACPI: added table 1/32, length now 40 |
| ACPI: * SSDT |
| processor_brand=AMD Athlon(tm) II X2 245 Processor |
| Pstates algorithm ... |
| Pstate_freq[0] = 2900MHz Pstate_power[0] = 31500mw |
| Pstate_latency[0] = 5us |
| Pstate_freq[1] = 2200MHz Pstate_power[1] = 26520mw |
| Pstate_latency[1] = 5us |
| Pstate_freq[2] = 1700MHz Pstate_power[2] = 22680mw |
| Pstate_latency[2] = 5us |
| PSS: 2900MHz power 31500 control 0x0 status 0x0 |
| PSS: 2200MHz power 26520 control 0x1 status 0x1 |
| PSS: 1700MHz power 22680 control 0x2 status 0x2 |
| PSS: 2900MHz power 31500 control 0x0 status 0x0 |
| PSS: 2200MHz power 26520 control 0x1 status 0x1 |
| PSS: 1700MHz power 22680 control 0x2 status 0x2 |
| ACPI: added table 2/32, length now 44 |
| ACPI: * MCFG |
| ACPI: * MADT |
| ACPI: added table 3/32, length now 48 |
| current = 6ffb2510 |
| ACPI: * SRAT at 6ffb2510 |
| SRAT: lapic cpu_index=00, node_id=00, apic_id=00 |
| SRAT: lapic cpu_index=01, node_id=00, apic_id=01 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=001ffd00 |
| ACPI: added table 4/32, length now 52 |
| ACPI: * SLIT at 6ffb25b0 |
| ACPI: added table 5/32, length now 56 |
| ACPI: * HPET |
| ACPI: added table 6/32, length now 60 |
| ACPI: * SRAT at 6ffb2620 |
| SRAT: lapic cpu_index=00, node_id=00, apic_id=00 |
| SRAT: lapic cpu_index=01, node_id=00, apic_id=01 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280 |
| set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=001ffd00 |
| ACPI: added table 7/32, length now 64 |
| ACPI: * SLIT at 6ffb26c0 |
| ACPI: added table 8/32, length now 68 |
| ACPI: done. |
| ACPI tables: 14064 bytes. |
| smbios_write_tables: 6ffae000 |
| Root Device (GIGABYTE GA-MA785GMT-UD2H) |
| CPU_CLUSTER: 0 (AMD FAM10 Root Complex) |
| APIC: 00 (socket AM3) |
| DOMAIN: 0000 (AMD FAM10 Root Complex) |
| PCI: 00:18.0 (AMD FAM10 Northbridge) |
| PCI: 00:00.0 (ATI RS780) |
| PCI: 00:01.0 (ATI RS780) |
| PCI: 00:02.0 (ATI RS780) |
| PCI: 00:03.0 (ATI RS780) |
| PCI: 00:04.0 (ATI RS780) |
| PCI: 00:05.0 (ATI RS780) |
| PCI: 00:06.0 (ATI RS780) |
| PCI: 00:07.0 (ATI RS780) |
| PCI: 00:08.0 (ATI RS780) |
| PCI: 00:09.0 (ATI RS780) |
| PCI: 00:0a.0 (ATI RS780) |
| PCI: 00:11.0 (ATI SB700) |
| PCI: 00:12.0 (ATI SB700) |
| PCI: 00:12.1 (ATI SB700) |
| PCI: 00:12.2 (ATI SB700) |
| PCI: 00:13.0 (ATI SB700) |
| PCI: 00:13.1 (ATI SB700) |
| PCI: 00:13.2 (ATI SB700) |
| PCI: 00:14.0 (ATI SB700) |
| I2C: 01:50 (unknown) |
| I2C: 01:51 (unknown) |
| I2C: 01:52 (unknown) |
| I2C: 01:53 (unknown) |
| PCI: 00:14.1 (ATI SB700) |
| PCI: 00:14.2 (ATI SB700) |
| PCI: 00:14.3 (ATI SB700) |
| PNP: 002e.0 (ITE IT8718F Super I/O) |
| PNP: 002e.1 (ITE IT8718F Super I/O) |
| PNP: 002e.2 (ITE IT8718F Super I/O) |
| PNP: 002e.3 (ITE IT8718F Super I/O) |
| PNP: 002e.4 (ITE IT8718F Super I/O) |
| PNP: 002e.5 (ITE IT8718F Super I/O) |
| PNP: 002e.6 (ITE IT8718F Super I/O) |
| PNP: 002e.7 (ITE IT8718F Super I/O) |
| PNP: 002e.8 (ITE IT8718F Super I/O) |
| PNP: 002e.9 (ITE IT8718F Super I/O) |
| PNP: 002e.a (ITE IT8718F Super I/O) |
| PCI: 00:14.4 (ATI SB700) |
| PCI: 00:14.5 (ATI SB700) |
| PCI: 00:18.1 (AMD FAM10 Northbridge) |
| PCI: 00:18.2 (AMD FAM10 Northbridge) |
| PCI: 00:18.3 (AMD FAM10 Northbridge) |
| PCI: 00:18.4 (AMD FAM10 Northbridge) |
| APIC: 01 (unknown) |
| PCI: 00:18.0 (unknown) |
| PCI: 00:18.1 (unknown) |
| PCI: 00:18.2 (unknown) |
| PCI: 00:18.3 (unknown) |
| PCI: 00:18.4 (unknown) |
| PCI: 01:05.0 (unknown) |
| PCI: 03:00.0 (unknown) |
| PCI: 04:0e.0 (unknown) |
| SMBIOS tables: 578 bytes. |
| POST: 0x9e |
| POST: 0x9d |
| Writing table forward entry at 0x00000500 |
| Wrote coreboot table at: 00000500, 0x10 bytes, checksum 2fe4 |
| Table forward entry ends at 0x00000528. |
| ... aligned to 0x00001000 |
| Writing coreboot table at 0x6ffa6000 |
| rom_table_end = 0x6ffa6000 |
| ... aligned to 0x6ffb0000 |
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1. 0000000000001000-000000000009ffff: RAM |
| 2. 00000000000c0000-000000006ffa5fff: RAM |
| 3. 000000006ffa6000-000000006fffffff: CONFIGURATION TABLES |
| 4. 0000000070000000-000000007fffffff: RESERVED |
| 5. 00000000e0000000-00000000efffffff: RESERVED |
| 6. 00000000fec00000-00000000fec00fff: RESERVED |
| 7. 00000000fed00000-00000000fed00fff: RESERVED |
| Wrote coreboot table at: 6ffa6000, 0x180 bytes, checksum 6dc8 |
| coreboot table: 408 bytes. |
| CBMEM ROOT 0. 6ffff000 00001000 |
| CAR GLOBALS 1. 6fffb000 00004000 |
| CONSOLE 2. 6ffdb000 00020000 |
| TIME STAMP 3. 6ffda000 00001000 |
| AMDMEM INFO 4. 6ffd7000 00003000 |
| ROMSTAGE 5. 6ffd6000 00001000 |
| GDT 6. 6ffd5000 00001000 |
| IRQ TABLE 7. 6ffd4000 00001000 |
| SMP TABLE 8. 6ffd3000 00001000 |
| ACPI 9. 6ffaf000 00024000 |
| SMBIOS 10. 6ffae000 00001000 |
| COREBOOT 11. 6ffa6000 00008000 |
| BS: BS_WRITE_TABLES times (us): entry 0 run 429030 exit 0 |
| POST: 0x7a |
| CBFS: located payload @ fff35878, 55820 bytes. |
| Loading segment from rom address 0xfff35878 |
| code (compression=1) |
| New segment dstaddr 0xe6444 memsize 0x19bbc srcaddr 0xfff358b0 filesize 0xd9d4 |
| Loading segment from rom address 0xfff35894 |
| Entry Point 0x000fd516 |
| Bounce Buffer at 6fd5a000, 2407328 bytes |
| Loading Segment: addr: 0x00000000000e6444 memsz: 0x0000000000019bbc filesz: 0x000000000000d9d4 |
| lb: [0x0000000000100000, 0x0000000000225dd0) |
| Post relocation: addr: 0x00000000000e6444 memsz: 0x0000000000019bbc filesz: 0x000000000000d9d4 |
| using LZMA |
| [ 0x000e6444, 00100000, 0x00100000) <- fff358b0 |
| dest 000e6444, end 00100000, bouncebuffer 6fd5a000 |
| Loaded segments |
| BS: BS_PAYLOAD_LOAD times (us): entry 0 run 94574 exit 1 |
| POST: 0x7b |
| Jumping to boot code at 000fd516(6ffa6000) |
| POST: 0xf8 |
| CPU0: stack: 00150000 - 00151000, lowest used address 00150878, stack used: 1928 bytes |
| entry = 0x000fd516 |
| lb_start = 0x00100000 |
| lb_size = 0x00125dd0 |
| buffer = 0x6fd5a000 |
| SeaBIOS (version rel-1.7.5-0-ge51488c-20150404_050908-x201) |
| Found coreboot cbmem console @ 6ffdb000 |
| Found mainboard GIGABYTE GA-MA785GMT-UD2H |
| Relocating init from 0x000e75f9 to 0x6ff5b880 (size 42676) |
| Found CBFS header at 0xfffffc20 |
| CPU Mhz=2910 |
| Found 24 PCI devices (max PCI bus is 04) |
| Copying SMBIOS entry point from 0x6ffae000 to 0x000f1c90 |
| Copying ACPI RSDP from 0x6ffaf000 to 0x000f1c60 |
| Copying MPTABLE from 0x6ffd3000/6ffd3010 to 0x000f1b40 |
| Copying PIR from 0x6ffd4000 to 0x000f1b10 |
| Using pmtimer, ioport 0x818 |
| Scan for VGA option rom |
| EHCI init on dev 00:12.2 (regs=0xd8409420) |
| EHCI init on dev 00:13.2 (regs=0xd8409520) |
| Found 0 lpt ports |
| Found 4 serial ports |
| ATA controller 1 at 3020/3040/0 (irq 0 dev 88) |
| ATA controller 2 at 3028/3044/0 (irq 0 dev 88) |
| ATA controller 3 at 1f0/3f4/0 (irq 14 dev a1) |
| ATA controller 4 at 170/374/0 (irq 15 dev a1) |
| ata1-0: ST9160314AS ATA-8 Hard-Disk (149 GiBytes) |
| Searching bootorder for: /pci@i0cf8/*@11/drive@1/disk@0 |
| Got ps2 nak (status=51) |
| OHCI init on dev 00:12.0 (regs=0xd8404000) |
| OHCI init on dev 00:12.1 (regs=0xd8405000) |
| OHCI init on dev 00:13.0 (regs=0xd8406000) |
| OHCI init on dev 00:13.1 (regs=0xd8407000) |
| OHCI init on dev 00:14.5 (regs=0xd8408000) |
| All threads complete. |
| Scan for option roms |
| |
| Press F12 for boot menu. |
| |
| Searching bootorder for: HALT |
| drive 0x000f1aa0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=312581808 |
| Space available for UMB: c0000-ef000, f0000-f1aa0 |
| Returned 262144 bytes of ZoneHigh |
| e820 map has 8 items: |
| 0: 0000000000000000 - 000000000009fc00 = 1 RAM |
| 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED |
| 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED |
| 3: 0000000000100000 - 000000006ffa6000 = 1 RAM |
| 4: 000000006ffa6000 - 0000000080000000 = 2 RESERVED |
| 5: 00000000e0000000 - 00000000f0000000 = 2 RESERVED |
| 6: 00000000fec00000 - 00000000fec01000 = 2 RESERVED |
| 7: 00000000fed00000 - 00000000fed01000 = 2 RESERVED |
| enter handle_19: |
| NULL |
| Booting from Hard Disk... |
| Booting from 0000:7c00 |
| |