| |
| |
| coreboot-4.11-1542-g8fb7cd4123 Tue Mar 10 10:05:48 UTC 2020 bootblock starting (log level: 7)... |
| CPU: Intel(R) Core(TM) i7-6500U CPU @ 2.50GHz |
| CPU: ID 406e3, Skylake D0, ucode: 000000cb |
| CPU: AES supported, TXT NOT supported, VT supported |
| MCH: device id 1904 (rev 08) is Skylake-U |
| PCH: device id 9d48 (rev 21) is Skylake-U Premium |
| IGD: device id 1916 (rev 07) is Skylake ULT GT2 |
| FMAP: Found "FLASH" version 1.1 at 0x210000. |
| FMAP: base = 0xff800000 size = 0x800000 #areas = 4 |
| FMAP: area COREBOOT found @ 210200 (6225408 bytes) |
| CBFS: Locating 'fallback/romstage' |
| CBFS: Found @ offset 80 size 9f64 |
| BS: bootblock times (exec / console): total (unknown) / 53 ms |
| |
| |
| coreboot-4.11-1542-g8fb7cd4123 Tue Mar 10 10:05:48 UTC 2020 romstage starting (log level: 7)... |
| pm1_sts: 0000 pm1_en: 0000 pm1_cnt: 00000000 |
| gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000 |
| gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000 |
| gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000 |
| gpe0_sts[3]: 00000800 gpe0_en[3]: 00000000 |
| TCO_STS: 0000 0000 |
| GEN_PMCON: e0a00200 00001a38 |
| GBLRST_CAUSE: 00000000 00000000 |
| prev_sleep_state 0 |
| FMAP: area COREBOOT found @ 210200 (6225408 bytes) |
| CBFS: Locating 'fspm.bin' |
| CBFS: Found @ offset 8edc0 size 63000 |
| FMAP: area RW_MRC_CACHE found @ 200000 (65536 bytes) |
| MRC: no data in 'RW_MRC_CACHE' |
| PRMRR disabled by config. |
| SPD @ 0x50 |
| Defaulting to using DDR4 params. Please add dram_type check for 255 to use_ddr4_params |
| Defaulting to using DDR4 params. Please add dram_type check for 255 to use_ddr4_params |
| Defaulting to using DDR4 params. Please add dram_type check for 255 to use_ddr4_params |
| SPD: module type is UNKNOWN |
| SPD: module part number is |
| SPD: banks -1, ranks 8, rows -1, columns -1, density -1 Mb |
| SPD: device width -1 bits, bus width -1 bits |
| SPD @ 0x52 |
| SPD: module type is DDR4 |
| SPD: module part number is TMKS4G56ALFBZH-2133P |
| SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb |
| SPD: device width 16 bits, bus width 64 bits |
| SPD: module size is 4096 MB (per channel) |
| CBMEM: |
| IMD: root @ 0x7afff000 254 entries. |
| IMD: root @ 0x7affec00 62 entries. |
| External stage cache: |
| IMD: root @ 0x7b3ff000 254 entries. |
| IMD: root @ 0x7b3fec00 62 entries. |
| 1 DIMMs found |
| SMM Memory Map |
| SMRAM : 0x7b000000 0x800000 |
| Subregion 0: 0x7b000000 0x200000 |
| Subregion 1: 0x7b200000 0x200000 |
| Subregion 2: 0x7b400000 0x400000 |
| top_of_ram = 0x7b000000 |
| MTRR Range: Start=7a000000 End=7b000000 (Size 1000000) |
| MTRR Range: Start=7b000000 End=7b800000 (Size 800000) |
| MTRR Range: Start=ff800000 End=0 (Size 800000) |
| FMAP: area COREBOOT found @ 210200 (6225408 bytes) |
| CBFS: Locating 'fallback/postcar' |
| CBFS: Found @ offset 120e00 size 46a4 |
| Decompressing stage fallback/postcar @ 0x7abd0fc0 (34544 bytes) |
| Loading module at 0x7abd1000 with entry 0x7abd1000. filesize: 0x43d0 memsize: 0x86b0 |
| Processing 158 relocs. Offset value of 0x78bd1000 |
| BS: romstage times (exec / console): total (unknown) / 191 ms |
| |
| |
| coreboot-4.11-1542-g8fb7cd4123 Tue Mar 10 10:05:48 UTC 2020 postcar starting (log level: 7)... |
| FMAP: area COREBOOT found @ 210200 (6225408 bytes) |
| CBFS: Locating 'fallback/ramstage' |
| CBFS: Found @ offset 6b100 size 1c519 |
| Decompressing stage fallback/ramstage @ 0x7ab08fc0 (812664 bytes) |
| Loading module at 0x7ab09000 with entry 0x7ab09000. filesize: 0x39eb0 memsize: 0xc6638 |
| Processing 3969 relocs. Offset value of 0x79d09000 |
| BS: postcar times (exec / console): total (unknown) / 38 ms |
| |
| |
| coreboot-4.11-1542-g8fb7cd4123 Tue Mar 10 10:05:48 UTC 2020 ramstage starting (log level: 7)... |
| Normal boot |
| FMAP: area COREBOOT found @ 210200 (6225408 bytes) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset a080 size 61000 |
| microcode: sig=0x406e3 pf=0x80 revision=0xcb |
| Skip microcode update |
| FMAP: area COREBOOT found @ 210200 (6225408 bytes) |
| CBFS: Locating 'fsps.bin' |
| CBFS: Found @ offset f2dc0 size 2e000 |
| Detected 2 core, 4 thread CPU. |
| Setting up SMI for CPU |
| IED base = 0x7b400000 |
| IED size = 0x00400000 |
| Will perform SMM setup. |
| CPU: Intel(R) Core(TM) i7-6500U CPU @ 2.50GHz. |
| Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170 |
| Processing 16 relocs. Offset value of 0x00030000 |
| Attempting to start 3 APs |
| Waiting for 10ms after sending INIT. |
| Waiting for 1st SIPI to complete...done. |
| AP: slot 3 apic_id 1. |
| Waiting for 2nd SIPI to complete...done. |
| AP: slot 2 apic_id 2. |
| AP: slot 1 apic_id 3. |
| Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b0 memsize: 0x1b0 |
| Processing 13 relocs. Offset value of 0x00038000 |
| SMM Module: stub loaded at 0x00038000. Will call 0x7ab28601(0x00000000) |
| Installing SMM handler to 0x7b000000 |
| Loading module at 0x7b010000 with entry 0x7b01008e. filesize: 0xe88 memsize: 0x4ea0 |
| Processing 103 relocs. Offset value of 0x7b010000 |
| Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b0 memsize: 0x1b0 |
| Processing 13 relocs. Offset value of 0x7b008000 |
| SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd |
| SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd |
| SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd |
| SMM Module: stub loaded at 0x7b008000. Will call 0x7b01008e(0x00000000) |
| Clearing SMI status registers |
| SMI_STS: PM1 |
| TMROF GPE0 STD STS: PME |
| New SMBASE 0x7b000000 |
| In relocation handler: CPU 0 |
| New SMBASE=0x7b000000 IEDBASE=0x7b400000 |
| Writing SMRR. base = 0x7b000006, mask=0xff800800 |
| Relocation complete. |
| New SMBASE 0x7afff400 |
| In relocation handler: CPU 3 |
| New SMBASE=0x7afff400 IEDBASE=0x7b400000 |
| Writing SMRR. base = 0x7b000006, mask=0xff800800 |
| Relocation complete. |
| New SMBASE 0x7afffc00 |
| In relocation handler: CPU 1 |
| New SMBASE=0x7afffc00 IEDBASE=0x7b400000 |
| Writing SMRR. base = 0x7b000006, mask=0xff800800 |
| Relocation complete. |
| New SMBASE 0x7afff800 |
| In relocation handler: CPU 2 |
| New SMBASE=0x7afff800 IEDBASE=0x7b400000 |
| Writing SMRR. base = 0x7b000006, mask=0xff800800 |
| Relocation complete. |
| Initializing CPU #0 |
| CPU: vendor Intel device 406e3 |
| CPU: family 06, model 4e, stepping 03 |
| Clearing out pending MCEs |
| Setting up local APIC... |
| apic_id: 0x00 done. |
| cpu: energy policy set to 6 |
| Turbo is available but hidden |
| Turbo is available and visible |
| Skip microcode update |
| CPU #0 initialized |
| Initializing CPU #3 |
| Initializing CPU #2 |
| Initializing CPU #1 |
| CPU: vendor Intel device 406e3 |
| CPU: family 06, model 4e, stepping 03 |
| CPU: vendor Intel device 406e3 |
| CPU: family 06, model 4e, stepping 03 |
| Clearing out pending MCEs |
| Clearing out pending MCEs |
| Setting up local APIC... |
| CPU: vendor Intel device 406e3 |
| CPU: family 06, model 4e, stepping 03 |
| Clearing out pending MCEs |
| Setting up local APIC... |
| Setting up local APIC... |
| apic_id: 0x02 done. |
| apic_id: 0x03 done. |
| cpu: energy policy set to 6 |
| cpu: energy policy set to 6 |
| Skip microcode update |
| CPU #2 initialized |
| Skip microcode update |
| CPU #1 initialized |
| apic_id: 0x01 done. |
| cpu: energy policy set to 6 |
| Skip microcode update |
| CPU #3 initialized |
| bsp_do_flight_plan done after 224 msecs. |
| CPU: frequency set to 3100 MHz |
| Enabling SMIs. |
| Locking SMM. |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| IA32_FEATURE_CONTROL already locked |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| IA32_FEATURE_CONTROL already locked |
| IA32_FEATURE_CONTROL already locked |
| IA32_FEATURE_CONTROL already locked |
| BS: BS_DEV_INIT_CHIPS entry times (exec / console): 156 / 199 ms |
| ITSS IRQ Polarities Before: |
| IPC0: 0x00ff4000 |
| IPC1: 0x00000007 |
| IPC2: 0x00000000 |
| IPC3: 0x00000000 |
| ITSS IRQ Polarities After: |
| IPC0: 0x00ff4000 |
| IPC1: 0x00000007 |
| IPC2: 0x00000000 |
| IPC3: 0x00000000 |
| Found PCIe Root Port #3 at PCI: 00:1c.0. |
| Found PCIe Root Port #5 at PCI: 00:1c.4. |
| Remapping PCIe Root Port #3 from PCI: 00:1c.2 to new function number 0. |
| pcie_rp_update_dev: Couldn't find PCIe Root Port #6 (originally PCI: 00:1c.5) which was enabled in devicetree, removing. |
| pcie_rp_update_dev: Couldn't find PCIe Root Port #9 (originally PCI: 00:1d.0) which was enabled in devicetree, removing. |
| pcie_rp_update_dev: Couldn't find PCIe Root Port #10 (originally PCI: 00:1d.1) which was enabled in devicetree, removing. |
| pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing. |
| pcie_rp_update_dev: Couldn't find PCIe Root Port #12 (originally PCI: 00:1d.3) which was enabled in devicetree, removing. |
| BS: BS_DEV_INIT_CHIPS run times (exec / console): 19 / 84 ms |
| Enumerating buses... |
| Root Device scanning... |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| DOMAIN: 0000 scanning... |
| PCI: pci_scan_bus for bus 00 |
| PCI: 00:00.0 [8086/1904] enabled |
| PCI: 00:02.0 [8086/1916] enabled |
| PCI: 00:04.0 [8086/1903] enabled |
| PCI: 00:14.0 [8086/9d2f] enabled |
| PCI: 00:14.1 [8086/9d30] enabled |
| PCI: 00:14.2 [8086/9d31] enabled |
| PCI: 00:16.0 [8086/9d3a] enabled |
| PCI: 00:17.0 [8086/9d03] enabled |
| PCI: 00:1c.0 [8086/9d12] enabled |
| PCI: 00:1c.4 [8086/9d14] enabled |
| PCI: 00:1f.0 [8086/9d48] enabled |
| PCI: 00:1f.1 [8086/9d20] enabled |
| PCI: 00:1f.2 [8086/9d21] enabled |
| PCI: 00:1f.3 [8086/9d70] enabled |
| PCI: 00:1f.4 [8086/9d23] enabled |
| PCI: 00:1f.5 [8086/9d24] enabled |
| PCI: Leftover static devices: |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:16.4 |
| PCI: 00:1f.6 |
| PCI: Check your devicetree.cb. |
| PCI: 00:02.0 scanning... |
| scan_bus: bus PCI: 00:02.0 finished in 0 msecs |
| PCI: 00:14.0 scanning... |
| scan_bus: bus PCI: 00:14.0 finished in 0 msecs |
| PCI: 00:1c.0 scanning... |
| PCI: pci_scan_bus for bus 01 |
| PCI: 01:00.0 [10ec/8168] enabled |
| Enabling Common Clock Configuration |
| ASPM: Enabled L1 |
| PCIe: Max_Payload_Size adjusted to 128 |
| Failed to enable LTR for dev = PCI: 01:00.0 |
| scan_bus: bus PCI: 00:1c.0 finished in 17 msecs |
| PCI: 00:1c.4 scanning... |
| PCI: pci_scan_bus for bus 02 |
| PCI: 02:00.0 [10ec/c821] enabled |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| PCIe: Max_Payload_Size adjusted to 128 |
| scan_bus: bus PCI: 00:1c.4 finished in 14 msecs |
| PCI: 00:1f.0 scanning... |
| PNP: 0c31.0 enabled |
| PNP: 002e.1 enabled |
| PNP: 002e.2 enabled |
| PNP: 002e.3 enabled |
| PNP: 002e.4 enabled |
| PNP: 002e.5 enabled |
| PNP: 002e.6 enabled |
| PNP: 002e.7 disabled |
| PNP: 002e.8 enabled |
| PNP: 002e.9 enabled |
| PNP: 002e.a disabled |
| PNP: 002e.b enabled |
| PNP: 002e.c enabled |
| scan_bus: bus PCI: 00:1f.0 finished in 24 msecs |
| PCI: 00:1f.2 scanning... |
| scan_bus: bus PCI: 00:1f.2 finished in 0 msecs |
| PCI: 00:1f.3 scanning... |
| scan_bus: bus PCI: 00:1f.3 finished in 0 msecs |
| PCI: 00:1f.4 scanning... |
| scan_bus: bus PCI: 00:1f.4 finished in 0 msecs |
| PCI: 00:1f.5 scanning... |
| scan_bus: bus PCI: 00:1f.5 finished in 0 msecs |
| scan_bus: bus DOMAIN: 0000 finished in 177 msecs |
| scan_bus: bus Root Device finished in 187 msecs |
| done |
| BS: BS_DEV_ENUMERATE run times (exec / console): 2 / 195 ms |
| FMAP: area RW_MRC_CACHE found @ 200000 (65536 bytes) |
| MRC: Checking cached data update for 'RW_MRC_CACHE'. |
| SF: Detected 00 0000 with sector size 0x1000, total 0x800000 |
| MRC: no data in 'RW_MRC_CACHE' |
| MRC: cache data 'RW_MRC_CACHE' needs update. |
| MRC: Could not find region 'UNIFIED_MRC_CACHE' |
| FMAP: area RW_MRC_CACHE found @ 200000 (65536 bytes) |
| MRC: NOT enabling PRR for 'RW_MRC_CACHE'. |
| BS: BS_DEV_ENUMERATE exit times (exec / console): 7 / 34 ms |
| found VGA at PCI: 00:02.0 |
| Setting up VGA for PCI: 00:02.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| Allocating resources... |
| Reading resources... |
| Done reading resources. |
| Setting resources... |
| PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64 |
| PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64 |
| PCI: 00:02.0 20 <- [0x0000004000 - 0x000000403f] size 0x00000040 gran 0x06 io |
| PCI: 00:04.0 10 <- [0x00d1520000 - 0x00d1527fff] size 0x00008000 gran 0x0f mem64 |
| PCI: 00:14.0 10 <- [0x00d1500000 - 0x00d150ffff] size 0x00010000 gran 0x10 mem64 |
| PCI: 00:14.1 10 <- [0x00d1000000 - 0x00d11fffff] size 0x00200000 gran 0x15 mem64 |
| PCI: 00:14.1 18 <- [0x00d1532000 - 0x00d1532fff] size 0x00001000 gran 0x0c mem64 |
| PCI: 00:14.2 10 <- [0x00d1533000 - 0x00d1533fff] size 0x00001000 gran 0x0c mem64 |
| PCI: 00:16.0 10 <- [0x00d1534000 - 0x00d1534fff] size 0x00001000 gran 0x0c mem64 |
| PCI: 00:17.0 10 <- [0x00d1530000 - 0x00d1531fff] size 0x00002000 gran 0x0d mem |
| PCI: 00:17.0 14 <- [0x00d1537000 - 0x00d15370ff] size 0x00000100 gran 0x08 mem |
| PCI: 00:17.0 18 <- [0x0000004060 - 0x0000004067] size 0x00000008 gran 0x03 io |
| PCI: 00:17.0 1c <- [0x0000004068 - 0x000000406b] size 0x00000004 gran 0x02 io |
| PCI: 00:17.0 20 <- [0x0000004040 - 0x000000405f] size 0x00000020 gran 0x05 io |
| PCI: 00:17.0 24 <- [0x00d1536000 - 0x00d15367ff] size 0x00000800 gran 0x0b mem |
| PCI: 00:1c.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 01 io |
| PCI: 00:1c.0 24 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 bus 01 prefmem |
| PCI: 00:1c.0 20 <- [0x00d1300000 - 0x00d13fffff] size 0x00100000 gran 0x14 bus 01 mem |
| PCI: 01:00.0 10 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io |
| PCI: 01:00.0 18 <- [0x00d1300000 - 0x00d1300fff] size 0x00001000 gran 0x0c mem64 |
| PCI: 01:00.0 20 <- [0x00d1200000 - 0x00d1203fff] size 0x00004000 gran 0x0e prefmem64 |
| PCI: 00:1c.4 1c <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x0c bus 02 io |
| PCI: 00:1c.4 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem |
| PCI: 00:1c.4 20 <- [0x00d1400000 - 0x00d14fffff] size 0x00100000 gran 0x14 bus 02 mem |
| PCI: 02:00.0 10 <- [0x0000003000 - 0x00000030ff] size 0x00000100 gran 0x08 io |
| PCI: 02:00.0 18 <- [0x00d1400000 - 0x00d140ffff] size 0x00010000 gran 0x10 mem64 |
| PNP: 002e.1 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io |
| PNP: 002e.1 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq |
| WARNING: PNP: 002e.1 f0 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.1 f1 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.1 f2 irq size: 0x0000000001 not assigned in devicetree |
| PNP: 002e.2 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io |
| PNP: 002e.2 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq |
| WARNING: PNP: 002e.2 f0 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.2 f1 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.2 f2 irq size: 0x0000000001 not assigned in devicetree |
| PNP: 002e.3 60 <- [0x0000000378 - 0x000000037f] size 0x00000008 gran 0x03 io |
| PNP: 002e.3 62 <- [0x0000000778 - 0x000000077b] size 0x00000004 gran 0x02 io |
| PNP: 002e.3 70 <- [0x0000000005 - 0x0000000005] size 0x00000001 gran 0x00 irq |
| PNP: 002e.3 74 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 drq |
| WARNING: PNP: 002e.3 f0 irq size: 0x0000000001 not assigned in devicetree |
| PNP: 002e.4 60 <- [0x0000000a40 - 0x0000000a47] size 0x00000008 gran 0x03 io |
| PNP: 002e.4 62 <- [0x0000000a30 - 0x0000000a33] size 0x00000004 gran 0x02 io |
| PNP: 002e.4 70 <- [0x0000000009 - 0x0000000009] size 0x00000001 gran 0x00 irq |
| WARNING: PNP: 002e.4 f0 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.4 f1 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.4 f2 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.4 f3 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.4 f4 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.4 f5 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.4 f6 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.4 fa irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.4 fb irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.4 fc irq size: 0x0000000001 not assigned in devicetree |
| PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io |
| PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io |
| PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq |
| WARNING: PNP: 002e.5 f0 irq size: 0x0000000001 not assigned in devicetree |
| PNP: 002e.6 70 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq |
| WARNING: PNP: 002e.6 f0 irq size: 0x0000000001 not assigned in devicetree |
| PNP: 002e.8 60 <- [0x00000003e8 - 0x00000003ef] size 0x00000008 gran 0x03 io |
| PNP: 002e.8 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq |
| WARNING: PNP: 002e.8 f0 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.8 f1 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.8 f2 irq size: 0x0000000001 not assigned in devicetree |
| PNP: 002e.9 60 <- [0x00000002e8 - 0x00000002ef] size 0x00000008 gran 0x03 io |
| PNP: 002e.9 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq |
| WARNING: PNP: 002e.9 f0 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.9 f1 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.9 f2 irq size: 0x0000000001 not assigned in devicetree |
| PNP: 002e.b 60 <- [0x00000002f0 - 0x00000002f7] size 0x00000008 gran 0x03 io |
| PNP: 002e.b 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq |
| WARNING: PNP: 002e.b f0 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.b f1 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.b f2 irq size: 0x0000000001 not assigned in devicetree |
| PNP: 002e.c 60 <- [0x00000002e0 - 0x00000002e7] size 0x00000008 gran 0x03 io |
| PNP: 002e.c 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq |
| WARNING: PNP: 002e.c f0 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.c f1 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.c f2 irq size: 0x0000000001 not assigned in devicetree |
| LPC: Cannot open IO window: 3f8 size 8 |
| No more IO windows |
| LPC: Cannot open IO window: 2f8 size 8 |
| No more IO windows |
| LPC: Cannot open IO window: 378 size 8 |
| No more IO windows |
| LPC: Cannot open IO window: 778 size 4 |
| No more IO windows |
| LPC: Cannot open IO window: a40 size 8 |
| No more IO windows |
| LPC: Cannot open IO window: a30 size 4 |
| No more IO windows |
| LPC: Cannot open IO window: 60 size 1 |
| No more IO windows |
| LPC: Cannot open IO window: 64 size 1 |
| No more IO windows |
| LPC: Cannot open IO window: 0 size 4 |
| No more IO windows |
| LPC: Cannot open IO window: 0 size 1 |
| No more IO windows |
| LPC: Cannot open IO window: 3e8 size 8 |
| No more IO windows |
| LPC: Cannot open IO window: 2e8 size 8 |
| No more IO windows |
| LPC: Cannot open IO window: 0 size 8 |
| No more IO windows |
| LPC: Cannot open IO window: 2f0 size 8 |
| No more IO windows |
| LPC: Cannot open IO window: 2e0 size 8 |
| No more IO windows |
| PCI: 00:1f.2 10 <- [0x00d1528000 - 0x00d152bfff] size 0x00004000 gran 0x0e mem |
| PCI: 00:1f.3 10 <- [0x00d152c000 - 0x00d152ffff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:1f.3 20 <- [0x00d1510000 - 0x00d151ffff] size 0x00010000 gran 0x10 mem64 |
| PCI: 00:1f.4 10 <- [0x00d1538000 - 0x00d15380ff] size 0x00000100 gran 0x08 mem64 |
| PCI: 00:1f.5 10 <- [0x00d1535000 - 0x00d1535fff] size 0x00001000 gran 0x0c mem |
| Done setting resources. |
| Done allocating resources. |
| BS: BS_DEV_RESOURCES run times (exec / console): 1 / 684 ms |
| Enabling resources... |
| PCI: 00:00.0 subsystem <- 8086/1904 |
| PCI: 00:00.0 cmd <- 06 |
| PCI: 00:02.0 subsystem <- 8086/1916 |
| PCI: 00:02.0 cmd <- 03 |
| PCI: 00:04.0 cmd <- 02 |
| PCI: 00:14.0 subsystem <- 8086/9d2f |
| PCI: 00:14.0 cmd <- 02 |
| PCI: 00:14.1 subsystem <- 8086/9d30 |
| PCI: 00:14.1 cmd <- 02 |
| PCI: 00:14.2 subsystem <- 8086/9d31 |
| PCI: 00:14.2 cmd <- 02 |
| PCI: 00:16.0 subsystem <- 8086/9d3a |
| PCI: 00:16.0 cmd <- 02 |
| PCI: 00:17.0 subsystem <- 8086/9d03 |
| PCI: 00:17.0 cmd <- 03 |
| PCI: 00:1c.0 bridge ctrl <- 0013 |
| PCI: 00:1c.0 subsystem <- 8086/9d12 |
| PCI: 00:1c.0 cmd <- 07 |
| PCI: 00:1c.4 bridge ctrl <- 0013 |
| PCI: 00:1c.4 subsystem <- 8086/9d14 |
| PCI: 00:1c.4 cmd <- 07 |
| PCI: 00:1f.0 subsystem <- 8086/9d48 |
| PCI: 00:1f.0 cmd <- 07 |
| PCI: 00:1f.2 subsystem <- 8086/9d21 |
| PCI: 00:1f.2 cmd <- 02 |
| PCI: 00:1f.3 subsystem <- 8086/9d70 |
| PCI: 00:1f.3 cmd <- 02 |
| PCI: 00:1f.4 subsystem <- 8086/9d23 |
| PCI: 00:1f.4 cmd <- 03 |
| PCI: 00:1f.5 subsystem <- 8086/9d24 |
| PCI: 00:1f.5 cmd <- 406 |
| PCI: 01:00.0 cmd <- 03 |
| PCI: 02:00.0 cmd <- 03 |
| done. |
| BS: BS_DEV_ENABLE run times (exec / console): 1 / 89 ms |
| ME: Version: Unavailable |
| BS: BS_DEV_ENABLE exit times (exec / console): 0 / 2 ms |
| Found TPM SLB9665 TT 2.0 by Infineon |
| tlcl_send_startup: Startup return code is 0 |
| TPM: setup succeeded |
| BS: BS_DEV_INIT entry times (exec / console): 6 / 9 ms |
| Initializing devices... |
| Root Device init |
| Root Device init finished in 0 msecs |
| CPU_CLUSTER: 0 init |
| CPU_CLUSTER: 0 init finished in 0 msecs |
| PCI: 00:00.0 init |
| CPU TDP: 15 Watts |
| CPU PL2 = 25 Watts |
| PCI: 00:00.0 init finished in 4 msecs |
| PCI: 00:02.0 init |
| PCI: 00:02.0 init finished in 2 msecs |
| PCI: 00:04.0 init |
| PCI: 00:04.0 init finished in 0 msecs |
| PCI: 00:14.0 init |
| PCI: 00:14.0 init finished in 0 msecs |
| PCI: 00:14.1 init |
| PCI: 00:14.1 init finished in 0 msecs |
| PCI: 00:14.2 init |
| PCI: 00:14.2 init finished in 0 msecs |
| PCI: 00:16.0 init |
| PCI: 00:16.0 init finished in 0 msecs |
| PCI: 00:1c.0 init |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.0 init finished in 2 msecs |
| PCI: 00:1c.4 init |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.4 init finished in 2 msecs |
| PCI: 00:1f.0 init |
| IOAPIC: Initializing IOAPIC at 0xfec00000 |
| IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| IOAPIC: ID = 0x02 |
| PCI: 00:1f.0 init finished in 9 msecs |
| PCI: 00:1f.2 init |
| RTC Init |
| Set power off after power failure. |
| Disabling ACPI via APMC: |
| done. |
| Disabling Deep S3 |
| Disabling Deep S3 |
| Enabling Deep S4 |
| Enabling Deep S4 |
| Enabling Deep S5 |
| Enabling Deep S5 |
| PCI: 00:1f.2 init finished in 16 msecs |
| PCI: 00:1f.4 init |
| PCI: 00:1f.4 init finished in 0 msecs |
| PCI: 01:00.0 init |
| PCI: 01:00.0 init finished in 0 msecs |
| PCI: 02:00.0 init |
| PCI: 02:00.0 init finished in 0 msecs |
| PNP: 002e.1 init |
| PNP: 002e.1 init finished in 0 msecs |
| PNP: 002e.2 init |
| PNP: 002e.2 init finished in 0 msecs |
| PNP: 002e.3 init |
| PNP: 002e.3 init finished in 0 msecs |
| PNP: 002e.4 init |
| PECI specified for multiple TMPIN |
| Unsupported thermal mode 0x0 on TMPIN3 |
| PNP: 002e.4 init finished in 6 msecs |
| PNP: 002e.5 init |
| PNP: 002e.5 init finished in 0 msecs |
| PNP: 002e.6 init |
| PNP: 002e.6 init finished in 0 msecs |
| PNP: 002e.8 init |
| PNP: 002e.8 init finished in 0 msecs |
| PNP: 002e.9 init |
| PNP: 002e.9 init finished in 0 msecs |
| PNP: 002e.b init |
| PNP: 002e.b init finished in 0 msecs |
| PNP: 002e.c init |
| PNP: 002e.c init finished in 0 msecs |
| Devices initialized |
| BS: BS_DEV_INIT run times (exec / console): 4 / 175 ms |
| Finalize devices... |
| PCI: 00:17.0 final |
| Devices finalized |
| BS: BS_POST_DEVICE run times (exec / console): 0 / 5 ms |
| FMAP: area COREBOOT found @ 210200 (6225408 bytes) |
| CBFS: Locating 'fallback/dsdt.aml' |
| CBFS: Found @ offset 125500 size 29ee |
| FMAP: area COREBOOT found @ 210200 (6225408 bytes) |
| CBFS: Locating 'fallback/slic' |
| CBFS: 'fallback/slic' not found. |
| ACPI: Writing ACPI tables at 7aa9e000. |
| ACPI: * FACS |
| ACPI: * DSDT |
| ACPI: * FADT |
| SCI is IRQ9 |
| ACPI: added table 1/32, length now 40 |
| ACPI: * SSDT |
| Found 1 CPU(s) with 4 core(s) each. |
| PSS: 2501MHz power 15000 control 0x1f00 status 0x1f00 |
| PSS: 2500MHz power 15000 control 0x1900 status 0x1900 |
| PSS: 2500MHz power 15000 control 0x1900 status 0x1900 |
| PSS: 2200MHz power 12751 control 0x1600 status 0x1600 |
| PSS: 1900MHz power 10624 control 0x1300 status 0x1300 |
| PSS: 1600MHz power 8640 control 0x1000 status 0x1000 |
| PSS: 1300MHz power 6770 control 0xd00 status 0xd00 |
| PSS: 1000MHz power 5016 control 0xa00 status 0xa00 |
| PSS: 700MHz power 3381 control 0x700 status 0x700 |
| PSS: 400MHz power 1860 control 0x400 status 0x400 |
| PSS: 2501MHz power 15000 control 0x1f00 status 0x1f00 |
| PSS: 2500MHz power 15000 control 0x1900 status 0x1900 |
| PSS: 2500MHz power 15000 control 0x1900 status 0x1900 |
| PSS: 2200MHz power 12751 control 0x1600 status 0x1600 |
| PSS: 1900MHz power 10624 control 0x1300 status 0x1300 |
| PSS: 1600MHz power 8640 control 0x1000 status 0x1000 |
| PSS: 1300MHz power 6770 control 0xd00 status 0xd00 |
| PSS: 1000MHz power 5016 control 0xa00 status 0xa00 |
| PSS: 700MHz power 3381 control 0x700 status 0x700 |
| PSS: 400MHz power 1860 control 0x400 status 0x400 |
| PSS: 2501MHz power 15000 control 0x1f00 status 0x1f00 |
| PSS: 2500MHz power 15000 control 0x1900 status 0x1900 |
| PSS: 2500MHz power 15000 control 0x1900 status 0x1900 |
| PSS: 2200MHz power 12751 control 0x1600 status 0x1600 |
| PSS: 1900MHz power 10624 control 0x1300 status 0x1300 |
| PSS: 1600MHz power 8640 control 0x1000 status 0x1000 |
| PSS: 1300MHz power 6770 control 0xd00 status 0xd00 |
| PSS: 1000MHz power 5016 control 0xa00 status 0xa00 |
| PSS: 700MHz power 3381 control 0x700 status 0x700 |
| PSS: 400MHz power 1860 control 0x400 status 0x400 |
| PSS: 2501MHz power 15000 control 0x1f00 status 0x1f00 |
| PSS: 2500MHz power 15000 control 0x1900 status 0x1900 |
| PSS: 2500MHz power 15000 control 0x1900 status 0x1900 |
| PSS: 2200MHz power 12751 control 0x1600 status 0x1600 |
| PSS: 1900MHz power 10624 control 0x1300 status 0x1300 |
| PSS: 1600MHz power 8640 control 0x1000 status 0x1000 |
| PSS: 1300MHz power 6770 control 0xd00 status 0xd00 |
| PSS: 1000MHz power 5016 control 0xa00 status 0xa00 |
| PSS: 700MHz power 3381 control 0x700 status 0x700 |
| PSS: 400MHz power 1860 control 0x400 status 0x400 |
| \_SB.PCI0.LPCB.TPM.TPM: LPC TPM PNP: 0c31.0 |
| ACPI: added table 2/32, length now 44 |
| ACPI: * MCFG |
| ACPI: added table 3/32, length now 48 |
| ACPI: * TPM2 |
| TPM2 log created at 0x7aa8d000 |
| ACPI: added table 4/32, length now 52 |
| ACPI: * MADT |
| SCI is IRQ9 |
| ACPI: added table 5/32, length now 56 |
| current = 7aaa1c80 |
| ACPI: * DMAR |
| ACPI: added table 6/32, length now 60 |
| ACPI: * IGD OpRegion |
| FMAP: area COREBOOT found @ 210200 (6225408 bytes) |
| CBFS: Locating 'vbt.bin' |
| CBFS: Found @ offset f1e00 size 48a |
| Found a VBT of 4608 bytes after decompression |
| GMA: Found VBT in CBFS |
| GMA: Found valid VBT in CBFS |
| current = 7aaa3d10 |
| acpi_write_dbg2_pci_uart: Device not found |
| ACPI: * HPET |
| ACPI: added table 7/32, length now 64 |
| ACPI: done. |
| ACPI tables: 23888 bytes. |
| smbios_write_tables: 7aa8c000 |
| Create SMBIOS type 17 |
| PCI: 00:00.0 (Intel 6th Gen) |
| SMBIOS tables: 790 bytes. |
| Writing table forward entry at 0x00000500 |
| Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 6532 |
| Writing coreboot table at 0x7aac2000 |
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1. 0000000000001000-000000000009ffff: RAM |
| 2. 00000000000a0000-00000000000fffff: RESERVED |
| 3. 0000000000100000-000000007aa8bfff: RAM |
| 4. 000000007aa8c000-000000007ab08fff: CONFIGURATION TABLES |
| 5. 000000007ab09000-000000007abcffff: RAMSTAGE |
| 6. 000000007abd0000-000000007affffff: CONFIGURATION TABLES |
| 7. 000000007b000000-000000007fffffff: RESERVED |
| 8. 00000000e0000000-00000000efffffff: RESERVED |
| 9. 00000000fd000000-00000000fe00ffff: RESERVED |
| 10. 00000000fed10000-00000000fed19fff: RESERVED |
| 11. 00000000fed40000-00000000fed44fff: RESERVED |
| 12. 00000000fed80000-00000000fed84fff: RESERVED |
| 13. 00000000fed90000-00000000fed91fff: RESERVED |
| 14. 0000000100000000-000000017effffff: RAM |
| FMAP: area COREBOOT found @ 210200 (6225408 bytes) |
| Wrote coreboot table at: 0x7aac2000, 0x424 bytes, checksum 10e9 |
| coreboot table: 1084 bytes. |
| IMD ROOT 0. 0x7afff000 0x00001000 |
| IMD SMALL 1. 0x7affe000 0x00001000 |
| FSP MEMORY 2. 0x7abfe000 0x00400000 |
| CONSOLE 3. 0x7abde000 0x00020000 |
| TIME STAMP 4. 0x7abdd000 0x00000910 |
| MRC DATA 5. 0x7abdb000 0x00001878 |
| ROMSTG STCK 6. 0x7abda000 0x00001000 |
| AFTER CAR 7. 0x7abd0000 0x0000a000 |
| RAMSTAGE 8. 0x7ab08000 0x000c8000 |
| REFCODE 9. 0x7aada000 0x0002e000 |
| SMM BACKUP 10. 0x7aaca000 0x00010000 |
| COREBOOT 11. 0x7aac2000 0x00008000 |
| ACPI 12. 0x7aa9e000 0x00024000 |
| ACPI GNVS 13. 0x7aa9d000 0x00001000 |
| TPM2 TCGLOG14. 0x7aa8d000 0x00010000 |
| SMBIOS 15. 0x7aa8c000 0x00000800 |
| IMD small region: |
| IMD ROOT 0. 0x7affec00 0x00000400 |
| FSP RUNTIME 1. 0x7affebe0 0x00000004 |
| FMAP 2. 0x7affeb00 0x000000e0 |
| POWER STATE 3. 0x7affeac0 0x00000040 |
| ROMSTAGE 4. 0x7affeaa0 0x00000004 |
| MEM INFO 5. 0x7affe8e0 0x000001b9 |
| BS: BS_WRITE_TABLES run times (exec / console): 2 / 468 ms |
| MTRR: Physical address space: |
| 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 |
| 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 |
| 0x00000000000c0000 - 0x000000007b800000 size 0x7b740000 type 6 |
| 0x000000007b800000 - 0x00000000c0000000 size 0x44800000 type 0 |
| 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1 |
| 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0 |
| 0x0000000100000000 - 0x000000017f000000 size 0x7f000000 type 6 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| CPU physical address size: 39 bits |
| MTRR: default type WB/UC MTRR counts: 6/5. |
| MTRR: UC selected as default type. |
| MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6 |
| MTRR: 1 base 0x000000007b800000 mask 0x0000007fff800000 type 0 |
| MTRR: 2 base 0x000000007c000000 mask 0x0000007ffc000000 type 0 |
| MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1 |
| MTRR: 4 base 0x0000000100000000 mask 0x0000007f80000000 type 6 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| CPU physical address size: 39 bits |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| CPU physical address size: 39 bits |
| BS: BS_WRITE_TABLES exit times (exec / console): 125 / 125 ms |
| CPU physical address size: 39 bits |
| FMAP: ar |
| |
| coreboot-4.11-1542-g8fb7cd4123 Tue Mar 10 10:05:48 UTC 2020 bootblock starting (log level: 7)... |
| CPU: Intel(R) Core(TM) i7-6500U CPU @ 2.50GHz |
| CPU: ID 406e3, Skylake D0, ucode: 000000cb |
| CPU: AES supported, TXT NOT supported, VT supported |
| MCH: device id 1904 (rev 08) is Skylake-U |
| PCH: device id 9d48 (rev 21) is Skylake-U Premium |
| IGD: device id 1916 (rev 07) is Skylake ULT GT2 |
| FMAP: Found "FLASH" version 1.1 at 0x210000. |
| FMAP: base = 0xff800000 size = 0x800000 #areas = 4 |
| FMAP: area COREBOOT found @ 210200 (6225408 bytes) |
| CBFS: Locating 'fallback/romstage' |
| CBFS: Found @ offset 80 size 9f64 |
| BS: bootblock times (exec / console): total (unknown) / 53 ms |
| |
| |
| coreboot-4.11-1542-g8fb7cd4123 Tue Mar 10 10:05:48 UTC 2020 romstage starting (log level: 7)... |
| pm1_sts: 0000 pm1_en: 0000 pm1_cnt: 00000000 |
| gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000 |
| gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000 |
| gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000 |
| gpe0_sts[3]: 00000800 gpe0_en[3]: 00000000 |
| TCO_STS: 0000 0000 |
| GEN_PMCON: e0a00200 00001a39 |
| GBLRST_CAUSE: 00000000 00000000 |
| prev_sleep_state 0 |
| FMAP: area COREBOOT found @ 210200 (6225408 bytes) |
| CBFS: Locating 'fspm.bin' |
| CBFS: Found @ offset 8edc0 size 63000 |
| FMAP: area RW_MRC_CACHE found @ 200000 (65536 bytes) |
| PRMRR disabled by config. |
| SPD @ 0x50 |
| Defaulting to using DDR4 params. Please add dram_type check for 255 to use_ddr4_params |
| Defaulting to using DDR4 params. Please add dram_type check for 255 to use_ddr4_params |
| Defaulting to using DDR4 params. Please add dram_type check for 255 to use_ddr4_params |
| SPD: module type is UNKNOWN |
| SPD: module part number is |
| SPD: banks -1, ranks 8, rows -1, columns -1, density -1 Mb |
| SPD: device width -1 bits, bus width -1 bits |
| SPD @ 0x52 |
| SPD: module type is DDR4 |
| SPD: module part number is TMKS4G56ALFBZH-2133P |
| SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb |
| SPD: device width 16 bits, bus width 64 bits |
| SPD: module size is 4096 MB (per channel) |
| CBMEM: |
| IMD: root @ 0x7afff000 254 entries. |
| IMD: root @ 0x7affec00 62 entries. |
| External stage cache: |
| IMD: root @ 0x7b3ff000 254 entries. |
| IMD: root @ 0x7b3fec00 62 entries. |
| 1 DIMMs found |
| SMM Memory Map |
| SMRAM : 0x7b000000 0x800000 |
| Subregion 0: 0x7b000000 0x200000 |
| Subregion 1: 0x7b200000 0x200000 |
| Subregion 2: 0x7b400000 0x400000 |
| top_of_ram = 0x7b000000 |
| MTRR Range: Start=7a000000 End=7b000000 (Size 1000000) |
| MTRR Range: Start=7b000000 End=7b800000 (Size 800000) |
| MTRR Range: Start=ff800000 End=0 (Size 800000) |
| FMAP: area COREBOOT found @ 210200 (6225408 bytes) |
| CBFS: Locating 'fallback/postcar' |
| CBFS: Found @ offset 120e00 size 46a4 |
| Decompressing stage fallback/postcar @ 0x7abd0fc0 (34544 bytes) |
| Loading module at 0x7abd1000 with entry 0x7abd1000. filesize: 0x43d0 memsize: 0x86b0 |
| Processing 158 relocs. Offset value of 0x78bd1000 |
| BS: romstage times (exec / console): total (unknown) / 188 ms |
| |
| |
| coreboot-4.11-1542-g8fb7cd4123 Tue Mar 10 10:05:48 UTC 2020 postcar starting (log level: 7)... |
| FMAP: area COREBOOT found @ 210200 (6225408 bytes) |
| CBFS: Locating 'fallback/ramstage' |
| CBFS: Found @ offset 6b100 size 1c519 |
| Decompressing stage fallback/ramstage @ 0x7ab08fc0 (812664 bytes) |
| Loading module at 0x7ab09000 with entry 0x7ab09000. filesize: 0x39eb0 memsize: 0xc6638 |
| Processing 3969 relocs. Offset value of 0x79d09000 |
| BS: postcar times (exec / console): total (unknown) / 38 ms |
| |
| |
| coreboot-4.11-1542-g8fb7cd4123 Tue Mar 10 10:05:48 UTC 2020 ramstage starting (log level: 7)... |
| Normal boot |
| FMAP: area COREBOOT found @ 210200 (6225408 bytes) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset a080 size 61000 |
| microcode: sig=0x406e3 pf=0x80 revision=0xcb |
| Skip microcode update |
| FMAP: area COREBOOT found @ 210200 (6225408 bytes) |
| CBFS: Locating 'fsps.bin' |
| CBFS: Found @ offset f2dc0 size 2e000 |
| Detected 2 core, 4 thread CPU. |
| Setting up SMI for CPU |
| IED base = 0x7b400000 |
| IED size = 0x00400000 |
| Will perform SMM setup. |
| CPU: Intel(R) Core(TM) i7-6500U CPU @ 2.50GHz. |
| Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170 |
| Processing 16 relocs. Offset value of 0x00030000 |
| Attempting to start 3 APs |
| Waiting for 10ms after sending INIT. |
| Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1. |
| done. |
| AP: slot 1 apic_id 3. |
| AP: slot 2 apic_id 2. |
| Waiting for 2nd SIPI to complete...done. |
| Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b0 memsize: 0x1b0 |
| Processing 13 relocs. Offset value of 0x00038000 |
| SMM Module: stub loaded at 0x00038000. Will call 0x7ab28601(0x00000000) |
| Installing SMM handler to 0x7b000000 |
| Loading module at 0x7b010000 with entry 0x7b01008e. filesize: 0xe88 memsize: 0x4ea0 |
| Processing 103 relocs. Offset value of 0x7b010000 |
| Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b0 memsize: 0x1b0 |
| Processing 13 relocs. Offset value of 0x7b008000 |
| SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd |
| SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd |
| SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd |
| SMM Module: stub loaded at 0x7b008000. Will call 0x7b01008e(0x00000000) |
| Clearing SMI status registers |
| GPE0 STD STS: PME |
| New SMBASE 0x7b000000 |
| In relocation handler: CPU 0 |
| New SMBASE=0x7b000000 IEDBASE=0x7b400000 |
| Writing SMRR. base = 0x7b000006, mask=0xff800800 |
| Relocation complete. |
| New SMBASE 0x7afff400 |
| In relocation handler: CPU 3 |
| New SMBASE=0x7afff400 IEDBASE=0x7b400000 |
| Writing SMRR. base = 0x7b000006, mask=0xff800800 |
| Relocation complete. |
| New SMBASE 0x7afff800 |
| In relocation handler: CPU 2 |
| New SMBASE=0x7afff800 IEDBASE=0x7b400000 |
| Writing SMRR. base = 0x7b000006, mask=0xff800800 |
| Relocation complete. |
| New SMBASE 0x7afffc00 |
| In relocation handler: CPU 1 |
| New SMBASE=0x7afffc00 IEDBASE=0x7b400000 |
| Writing SMRR. base = 0x7b000006, mask=0xff800800 |
| Relocation complete. |
| Initializing CPU #0 |
| CPU: vendor Intel device 406e3 |
| CPU: family 06, model 4e, stepping 03 |
| Clearing out pending MCEs |
| Setting up local APIC... |
| apic_id: 0x00 done. |
| cpu: energy policy set to 6 |
| Turbo is available but hidden |
| Turbo is available and visible |
| Skip microcode update |
| CPU #0 initialized |
| Initializing CPU #3 |
| Initializing CPU #2 |
| Initializing CPU #1 |
| CPU: vendor Intel device 406e3 |
| CPU: family 06, model 4e, stepping 03 |
| CPU: vendor Intel device 406e3 |
| CPU: family 06, model 4e, stepping 03 |
| Clearing out pending MCEs |
| Clearing out pending MCEs |
| Setting up local APIC... |
| CPU: vendor Intel device 406e3 |
| CPU: family 06, model 4e, stepping 03 |
| Clearing out pending MCEs |
| Setting up local APIC... |
| Setting up local APIC... |
| apic_id: 0x03 done. |
| apic_id: 0x02 done. |
| cpu: energy policy set to 6 |
| cpu: energy policy set to 6 |
| Skip microcode update |
| CPU #1 initialized |
| Skip microcode update |
| CPU #2 initialized |
| apic_id: 0x01 done. |
| cpu: energy policy set to 6 |
| Skip microcode update |
| CPU #3 initialized |
| bsp_do_flight_plan done after 218 msecs. |
| CPU: frequency set to 3100 MHz |
| Enabling SMIs. |
| Locking SMM. |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| IA32_FEATURE_CONTROL already locked |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| IA32_FEATURE_CONTROL already locked |
| IA32_FEATURE_CONTROL already locked |
| BS: BS_DEV_INIT_CHIPS entry times (exec / console): 156 / 197 ms |
| IA32_FEATURE_CONTROL already locked |
| ITSS IRQ Polarities Before: |
| IPC0: 0x00ff4000 |
| IPC1: 0x00000007 |
| IPC2: 0x00000000 |
| IPC3: 0x00000000 |
| ITSS IRQ Polarities After: |
| IPC0: 0x00ff4000 |
| IPC1: 0x00000007 |
| IPC2: 0x00000000 |
| IPC3: 0x00000000 |
| Found PCIe Root Port #3 at PCI: 00:1c.0. |
| Found PCIe Root Port #5 at PCI: 00:1c.4. |
| Remapping PCIe Root Port #3 from PCI: 00:1c.2 to new function number 0. |
| pcie_rp_update_dev: Couldn't find PCIe Root Port #6 (originally PCI: 00:1c.5) which was enabled in devicetree, removing. |
| pcie_rp_update_dev: Couldn't find PCIe Root Port #9 (originally PCI: 00:1d.0) which was enabled in devicetree, removing. |
| pcie_rp_update_dev: Couldn't find PCIe Root Port #10 (originally PCI: 00:1d.1) which was enabled in devicetree, removing. |
| pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing. |
| pcie_rp_update_dev: Couldn't find PCIe Root Port #12 (originally PCI: 00:1d.3) which was enabled in devicetree, removing. |
| BS: BS_DEV_INIT_CHIPS run times (exec / console): 21 / 84 ms |
| Enumerating buses... |
| Root Device scanning... |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| DOMAIN: 0000 scanning... |
| PCI: pci_scan_bus for bus 00 |
| PCI: 00:00.0 [8086/1904] enabled |
| PCI: 00:02.0 [8086/1916] enabled |
| PCI: 00:04.0 [8086/1903] enabled |
| PCI: 00:14.0 [8086/9d2f] enabled |
| PCI: 00:14.1 [8086/9d30] enabled |
| PCI: 00:14.2 [8086/9d31] enabled |
| PCI: 00:16.0 [8086/9d3a] enabled |
| PCI: 00:17.0 [8086/9d03] enabled |
| PCI: 00:1c.0 [8086/9d12] enabled |
| PCI: 00:1c.4 [8086/9d14] enabled |
| PCI: 00:1f.0 [8086/9d48] enabled |
| PCI: 00:1f.1 [8086/9d20] enabled |
| PCI: 00:1f.2 [8086/9d21] enabled |
| PCI: 00:1f.3 [8086/9d70] enabled |
| PCI: 00:1f.4 [8086/9d23] enabled |
| PCI: 00:1f.5 [8086/9d24] enabled |
| PCI: Leftover static devices: |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:16.4 |
| PCI: 00:1f.6 |
| PCI: Check your devicetree.cb. |
| PCI: 00:02.0 scanning... |
| scan_bus: bus PCI: 00:02.0 finished in 0 msecs |
| PCI: 00:14.0 scanning... |
| scan_bus: bus PCI: 00:14.0 finished in 0 msecs |
| PCI: 00:1c.0 scanning... |
| PCI: pci_scan_bus for bus 01 |
| PCI: 01:00.0 [10ec/8168] enabled |
| Enabling Common Clock Configuration |
| ASPM: Enabled L1 |
| PCIe: Max_Payload_Size adjusted to 128 |
| Failed to enable LTR for dev = PCI: 01:00.0 |
| scan_bus: bus PCI: 00:1c.0 finished in 17 msecs |
| PCI: 00:1c.4 scanning... |
| PCI: pci_scan_bus for bus 02 |
| PCI: 02:00.0 [10ec/c821] enabled |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| PCIe: Max_Payload_Size adjusted to 128 |
| scan_bus: bus PCI: 00:1c.4 finished in 14 msecs |
| PCI: 00:1f.0 scanning... |
| PNP: 0c31.0 enabled |
| PNP: 002e.1 enabled |
| PNP: 002e.2 enabled |
| PNP: 002e.3 enabled |
| PNP: 002e.4 enabled |
| PNP: 002e.5 enabled |
| PNP: 002e.6 enabled |
| PNP: 002e.7 disabled |
| PNP: 002e.8 enabled |
| PNP: 002e.9 enabled |
| PNP: 002e.a disabled |
| PNP: 002e.b enabled |
| PNP: 002e.c enabled |
| scan_bus: bus PCI: 00:1f.0 finished in 24 msecs |
| PCI: 00:1f.2 scanning... |
| scan_bus: bus PCI: 00:1f.2 finished in 0 msecs |
| PCI: 00:1f.3 scanning... |
| scan_bus: bus PCI: 00:1f.3 finished in 0 msecs |
| PCI: 00:1f.4 scanning... |
| scan_bus: bus PCI: 00:1f.4 finished in 0 msecs |
| PCI: 00:1f.5 scanning... |
| scan_bus: bus PCI: 00:1f.5 finished in 0 msecs |
| scan_bus: bus DOMAIN: 0000 finished in 177 msecs |
| scan_bus: bus Root Device finished in 187 msecs |
| done |
| BS: BS_DEV_ENUMERATE run times (exec / console): 2 / 195 ms |
| FMAP: area RW_MRC_CACHE found @ 200000 (65536 bytes) |
| MRC: Checking cached data update for 'RW_MRC_CACHE'. |
| SF: Detected 00 0000 with sector size 0x1000, total 0x800000 |
| MRC: Could not find region 'UNIFIED_MRC_CACHE' |
| FMAP: area RW_MRC_CACHE found @ 200000 (65536 bytes) |
| MRC: NOT enabling PRR for 'RW_MRC_CACHE'. |
| BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 27 ms |
| found VGA at PCI: 00:02.0 |
| Setting up VGA for PCI: 00:02.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| Allocating resources... |
| Reading resources... |
| Done reading resources. |
| Setting resources... |
| PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64 |
| PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64 |
| PCI: 00:02.0 20 <- [0x0000004000 - 0x000000403f] size 0x00000040 gran 0x06 io |
| PCI: 00:04.0 10 <- [0x00d1520000 - 0x00d1527fff] size 0x00008000 gran 0x0f mem64 |
| PCI: 00:14.0 10 <- [0x00d1500000 - 0x00d150ffff] size 0x00010000 gran 0x10 mem64 |
| PCI: 00:14.1 10 <- [0x00d1000000 - 0x00d11fffff] size 0x00200000 gran 0x15 mem64 |
| PCI: 00:14.1 18 <- [0x00d1532000 - 0x00d1532fff] size 0x00001000 gran 0x0c mem64 |
| PCI: 00:14.2 10 <- [0x00d1533000 - 0x00d1533fff] size 0x00001000 gran 0x0c mem64 |
| PCI: 00:16.0 10 <- [0x00d1534000 - 0x00d1534fff] size 0x00001000 gran 0x0c mem64 |
| PCI: 00:17.0 10 <- [0x00d1530000 - 0x00d1531fff] size 0x00002000 gran 0x0d mem |
| PCI: 00:17.0 14 <- [0x00d1537000 - 0x00d15370ff] size 0x00000100 gran 0x08 mem |
| PCI: 00:17.0 18 <- [0x0000004060 - 0x0000004067] size 0x00000008 gran 0x03 io |
| PCI: 00:17.0 1c <- [0x0000004068 - 0x000000406b] size 0x00000004 gran 0x02 io |
| PCI: 00:17.0 20 <- [0x0000004040 - 0x000000405f] size 0x00000020 gran 0x05 io |
| PCI: 00:17.0 24 <- [0x00d1536000 - 0x00d15367ff] size 0x00000800 gran 0x0b mem |
| PCI: 00:1c.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 01 io |
| PCI: 00:1c.0 24 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 bus 01 prefmem |
| PCI: 00:1c.0 20 <- [0x00d1300000 - 0x00d13fffff] size 0x00100000 gran 0x14 bus 01 mem |
| PCI: 01:00.0 10 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io |
| PCI: 01:00.0 18 <- [0x00d1300000 - 0x00d1300fff] size 0x00001000 gran 0x0c mem64 |
| PCI: 01:00.0 20 <- [0x00d1200000 - 0x00d1203fff] size 0x00004000 gran 0x0e prefmem64 |
| PCI: 00:1c.4 1c <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x0c bus 02 io |
| PCI: 00:1c.4 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem |
| PCI: 00:1c.4 20 <- [0x00d1400000 - 0x00d14fffff] size 0x00100000 gran 0x14 bus 02 mem |
| PCI: 02:00.0 10 <- [0x0000003000 - 0x00000030ff] size 0x00000100 gran 0x08 io |
| PCI: 02:00.0 18 <- [0x00d1400000 - 0x00d140ffff] size 0x00010000 gran 0x10 mem64 |
| PNP: 002e.1 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io |
| PNP: 002e.1 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq |
| WARNING: PNP: 002e.1 f0 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.1 f1 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.1 f2 irq size: 0x0000000001 not assigned in devicetree |
| PNP: 002e.2 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io |
| PNP: 002e.2 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq |
| WARNING: PNP: 002e.2 f0 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.2 f1 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.2 f2 irq size: 0x0000000001 not assigned in devicetree |
| PNP: 002e.3 60 <- [0x0000000378 - 0x000000037f] size 0x00000008 gran 0x03 io |
| PNP: 002e.3 62 <- [0x0000000778 - 0x000000077b] size 0x00000004 gran 0x02 io |
| PNP: 002e.3 70 <- [0x0000000005 - 0x0000000005] size 0x00000001 gran 0x00 irq |
| PNP: 002e.3 74 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 drq |
| WARNING: PNP: 002e.3 f0 irq size: 0x0000000001 not assigned in devicetree |
| PNP: 002e.4 60 <- [0x0000000a40 - 0x0000000a47] size 0x00000008 gran 0x03 io |
| PNP: 002e.4 62 <- [0x0000000a30 - 0x0000000a33] size 0x00000004 gran 0x02 io |
| PNP: 002e.4 70 <- [0x0000000009 - 0x0000000009] size 0x00000001 gran 0x00 irq |
| WARNING: PNP: 002e.4 f0 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.4 f1 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.4 f2 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.4 f3 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.4 f4 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.4 f5 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.4 f6 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.4 fa irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.4 fb irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.4 fc irq size: 0x0000000001 not assigned in devicetree |
| PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io |
| PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io |
| PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq |
| WARNING: PNP: 002e.5 f0 irq size: 0x0000000001 not assigned in devicetree |
| PNP: 002e.6 70 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq |
| WARNING: PNP: 002e.6 f0 irq size: 0x0000000001 not assigned in devicetree |
| PNP: 002e.8 60 <- [0x00000003e8 - 0x00000003ef] size 0x00000008 gran 0x03 io |
| PNP: 002e.8 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq |
| WARNING: PNP: 002e.8 f0 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.8 f1 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.8 f2 irq size: 0x0000000001 not assigned in devicetree |
| PNP: 002e.9 60 <- [0x00000002e8 - 0x00000002ef] size 0x00000008 gran 0x03 io |
| PNP: 002e.9 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq |
| WARNING: PNP: 002e.9 f0 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.9 f1 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.9 f2 irq size: 0x0000000001 not assigned in devicetree |
| PNP: 002e.b 60 <- [0x00000002f0 - 0x00000002f7] size 0x00000008 gran 0x03 io |
| PNP: 002e.b 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq |
| WARNING: PNP: 002e.b f0 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.b f1 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.b f2 irq size: 0x0000000001 not assigned in devicetree |
| PNP: 002e.c 60 <- [0x00000002e0 - 0x00000002e7] size 0x00000008 gran 0x03 io |
| PNP: 002e.c 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq |
| WARNING: PNP: 002e.c f0 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.c f1 irq size: 0x0000000001 not assigned in devicetree |
| WARNING: PNP: 002e.c f2 irq size: 0x0000000001 not assigned in devicetree |
| LPC: Cannot open IO window: 3f8 size 8 |
| No more IO windows |
| LPC: Cannot open IO window: 2f8 size 8 |
| No more IO windows |
| LPC: Cannot open IO window: 378 size 8 |
| No more IO windows |
| LPC: Cannot open IO window: 778 size 4 |
| No more IO windows |
| LPC: Cannot open IO window: a40 size 8 |
| No more IO windows |
| LPC: Cannot open IO window: a30 size 4 |
| No more IO windows |
| LPC: Cannot open IO window: 60 size 1 |
| No more IO windows |
| LPC: Cannot open IO window: 64 size 1 |
| No more IO windows |
| LPC: Cannot open IO window: 0 size 4 |
| No more IO windows |
| LPC: Cannot open IO window: 0 size 1 |
| No more IO windows |
| LPC: Cannot open IO window: 3e8 size 8 |
| No more IO windows |
| LPC: Cannot open IO window: 2e8 size 8 |
| No more IO windows |
| LPC: Cannot open IO window: 0 size 8 |
| No more IO windows |
| LPC: Cannot open IO window: 2f0 size 8 |
| No more IO windows |
| LPC: Cannot open IO window: 2e0 size 8 |
| No more IO windows |
| PCI: 00:1f.2 10 <- [0x00d1528000 - 0x00d152bfff] size 0x00004000 gran 0x0e mem |
| PCI: 00:1f.3 10 <- [0x00d152c000 - 0x00d152ffff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:1f.3 20 <- [0x00d1510000 - 0x00d151ffff] size 0x00010000 gran 0x10 mem64 |
| PCI: 00:1f.4 10 <- [0x00d1538000 - 0x00d15380ff] size 0x00000100 gran 0x08 mem64 |
| PCI: 00:1f.5 10 <- [0x00d1535000 - 0x00d1535fff] size 0x00001000 gran 0x0c mem |
| Done setting resources. |
| Done allocating resources. |
| BS: BS_DEV_RESOURCES run times (exec / console): 1 / 684 ms |
| Enabling resources... |
| PCI: 00:00.0 subsystem <- 8086/1904 |
| PCI: 00:00.0 cmd <- 06 |
| PCI: 00:02.0 subsystem <- 8086/1916 |
| PCI: 00:02.0 cmd <- 03 |
| PCI: 00:04.0 cmd <- 02 |
| PCI: 00:14.0 subsystem <- 8086/9d2f |
| PCI: 00:14.0 cmd <- 02 |
| PCI: 00:14.1 subsystem <- 8086/9d30 |
| PCI: 00:14.1 cmd <- 02 |
| PCI: 00:14.2 subsystem <- 8086/9d31 |
| PCI: 00:14.2 cmd <- 02 |
| PCI: 00:16.0 subsystem <- 8086/9d3a |
| PCI: 00:16.0 cmd <- 02 |
| PCI: 00:17.0 subsystem <- 8086/9d03 |
| PCI: 00:17.0 cmd <- 03 |
| PCI: 00:1c.0 bridge ctrl <- 0013 |
| PCI: 00:1c.0 subsystem <- 8086/9d12 |
| PCI: 00:1c.0 cmd <- 07 |
| PCI: 00:1c.4 bridge ctrl <- 0013 |
| PCI: 00:1c.4 subsystem <- 8086/9d14 |
| PCI: 00:1c.4 cmd <- 07 |
| PCI: 00:1f.0 subsystem <- 8086/9d48 |
| PCI: 00:1f.0 cmd <- 07 |
| PCI: 00:1f.2 subsystem <- 8086/9d21 |
| PCI: 00:1f.2 cmd <- 02 |
| PCI: 00:1f.3 subsystem <- 8086/9d70 |
| PCI: 00:1f.3 cmd <- 02 |
| PCI: 00:1f.4 subsystem <- 8086/9d23 |
| PCI: 00:1f.4 cmd <- 03 |
| PCI: 00:1f.5 subsystem <- 8086/9d24 |
| PCI: 00:1f.5 cmd <- 406 |
| PCI: 01:00.0 cmd <- 03 |
| PCI: 02:00.0 cmd <- 03 |
| done. |
| BS: BS_DEV_ENABLE run times (exec / console): 1 / 89 ms |
| ME: Version: Unavailable |
| BS: BS_DEV_ENABLE exit times (exec / console): 0 / 2 ms |
| Found TPM SLB9665 TT 2.0 by Infineon |
| tlcl_send_startup: Startup return code is 0 |
| TPM: setup succeeded |
| BS: BS_DEV_INIT entry times (exec / console): 7 / 9 ms |
| Initializing devices... |
| Root Device init |
| Root Device init finished in 0 msecs |
| CPU_CLUSTER: 0 init |
| CPU_CLUSTER: 0 init finished in 0 msecs |
| PCI: 00:00.0 init |
| CPU TDP: 15 Watts |
| CPU PL2 = 25 Watts |
| PCI: 00:00.0 init finished in 4 msecs |
| PCI: 00:02.0 init |
| PCI: 00:02.0 init finished in 2 msecs |
| PCI: 00:04.0 init |
| PCI: 00:04.0 init finished in 0 msecs |
| PCI: 00:14.0 init |
| PCI: 00:14.0 init finished in 0 msecs |
| PCI: 00:14.1 init |
| PCI: 00:14.1 init finished in 0 msecs |
| PCI: 00:14.2 init |
| PCI: 00:14.2 init finished in 0 msecs |
| PCI: 00:16.0 init |
| PCI: 00:16.0 init finished in 0 msecs |
| PCI: 00:1c.0 init |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.0 init finished in 2 msecs |
| PCI: 00:1c.4 init |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.4 init finished in 2 msecs |
| PCI: 00:1f.0 init |
| IOAPIC: Initializing IOAPIC at 0xfec00000 |
| IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| IOAPIC: ID = 0x02 |
| PCI: 00:1f.0 init finished in 9 msecs |
| PCI: 00:1f.2 init |
| RTC Init |
| Set power off after power failure. |
| Disabling ACPI via APMC: |
| done. |
| Disabling Deep S3 |
| Disabling Deep S3 |
| Enabling Deep S4 |
| Enabling Deep S4 |
| Enabling Deep S5 |
| Enabling Deep S5 |
| PCI: 00:1f.2 init finished in 16 msecs |
| PCI: 00:1f.4 init |
| PCI: 00:1f.4 init finished in 0 msecs |
| PCI: 01:00.0 init |
| PCI: 01:00.0 init finished in 0 msecs |
| PCI: 02:00.0 init |
| PCI: 02:00.0 init finished in 0 msecs |
| PNP: 002e.1 init |
| PNP: 002e.1 init finished in 0 msecs |
| PNP: 002e.2 init |
| PNP: 002e.2 init finished in 0 msecs |
| PNP: 002e.3 init |
| PNP: 002e.3 init finished in 0 msecs |
| PNP: 002e.4 init |
| PECI specified for multiple TMPIN |
| Unsupported thermal mode 0x0 on TMPIN3 |
| PNP: 002e.4 init finished in 6 msecs |
| PNP: 002e.5 init |
| PNP: 002e.5 init finished in 0 msecs |
| PNP: 002e.6 init |
| PNP: 002e.6 init finished in 0 msecs |
| PNP: 002e.8 init |
| PNP: 002e.8 init finished in 0 msecs |
| PNP: 002e.9 init |
| PNP: 002e.9 init finished in 0 msecs |
| PNP: 002e.b init |
| PNP: 002e.b init finished in 0 msecs |
| PNP: 002e.c init |
| PNP: 002e.c init finished in 0 msecs |
| Devices initialized |
| BS: BS_DEV_INIT run times (exec / console): 4 / 175 ms |
| Finalize devices... |
| PCI: 00:17.0 final |
| Devices finalized |
| BS: BS_POST_DEVICE run times (exec / console): 0 / 5 ms |
| FMAP: area COREBOOT found @ 210200 (6225408 bytes) |
| CBFS: Locating 'fallback/dsdt.aml' |
| CBFS: Found @ offset 125500 size 29ee |
| FMAP: area COREBOOT found @ 210200 (6225408 bytes) |
| CBFS: Locating 'fallback/slic' |
| CBFS: 'fallback/slic' not found. |
| ACPI: Writing ACPI tables at 7aa9e000. |
| ACPI: * FACS |
| ACPI: * DSDT |
| ACPI: * FADT |
| SCI is IRQ9 |
| ACPI: added table 1/32, length now 40 |
| ACPI: * SSDT |
| Found 1 CPU(s) with 4 core(s) each. |
| PSS: 2501MHz power 15000 control 0x1f00 status 0x1f00 |
| PSS: 2500MHz power 15000 control 0x1900 status 0x1900 |
| PSS: 2500MHz power 15000 control 0x1900 status 0x1900 |
| PSS: 2200MHz power 12751 control 0x1600 status 0x1600 |
| PSS: 1900MHz power 10624 control 0x1300 status 0x1300 |
| PSS: 1600MHz power 8640 control 0x1000 status 0x1000 |
| PSS: 1300MHz power 6770 control 0xd00 status 0xd00 |
| PSS: 1000MHz power 5016 control 0xa00 status 0xa00 |
| PSS: 700MHz power 3381 control 0x700 status 0x700 |
| PSS: 400MHz power 1860 control 0x400 status 0x400 |
| PSS: 2501MHz power 15000 control 0x1f00 status 0x1f00 |
| PSS: 2500MHz power 15000 control 0x1900 status 0x1900 |
| PSS: 2500MHz power 15000 control 0x1900 status 0x1900 |
| PSS: 2200MHz power 12751 control 0x1600 status 0x1600 |
| PSS: 1900MHz power 10624 control 0x1300 status 0x1300 |
| PSS: 1600MHz power 8640 control 0x1000 status 0x1000 |
| PSS: 1300MHz power 6770 control 0xd00 status 0xd00 |
| PSS: 1000MHz power 5016 control 0xa00 status 0xa00 |
| PSS: 700MHz power 3381 control 0x700 status 0x700 |
| PSS: 400MHz power 1860 control 0x400 status 0x400 |
| PSS: 2501MHz power 15000 control 0x1f00 status 0x1f00 |
| PSS: 2500MHz power 15000 control 0x1900 status 0x1900 |
| PSS: 2500MHz power 15000 control 0x1900 status 0x1900 |
| PSS: 2200MHz power 12751 control 0x1600 status 0x1600 |
| PSS: 1900MHz power 10624 control 0x1300 status 0x1300 |
| PSS: 1600MHz power 8640 control 0x1000 status 0x1000 |
| PSS: 1300MHz power 6770 control 0xd00 status 0xd00 |
| PSS: 1000MHz power 5016 control 0xa00 status 0xa00 |
| PSS: 700MHz power 3381 control 0x700 status 0x700 |
| PSS: 400MHz power 1860 control 0x400 status 0x400 |
| PSS: 2501MHz power 15000 control 0x1f00 status 0x1f00 |
| PSS: 2500MHz power 15000 control 0x1900 status 0x1900 |
| PSS: 2500MHz power 15000 control 0x1900 status 0x1900 |
| PSS: 2200MHz power 12751 control 0x1600 status 0x1600 |
| PSS: 1900MHz power 10624 control 0x1300 status 0x1300 |
| PSS: 1600MHz power 8640 control 0x1000 status 0x1000 |
| PSS: 1300MHz power 6770 control 0xd00 status 0xd00 |
| PSS: 1000MHz power 5016 control 0xa00 status 0xa00 |
| PSS: 700MHz power 3381 control 0x700 status 0x700 |
| PSS: 400MHz power 1860 control 0x400 status 0x400 |
| \_SB.PCI0.LPCB.TPM.TPM: LPC TPM PNP: 0c31.0 |
| ACPI: added table 2/32, length now 44 |
| ACPI: * MCFG |
| ACPI: added table 3/32, length now 48 |
| ACPI: * TPM2 |
| TPM2 log created at 0x7aa8d000 |
| ACPI: added table 4/32, length now 52 |
| ACPI: * MADT |
| SCI is IRQ9 |
| ACPI: added table 5/32, length now 56 |
| current = 7aaa1c80 |
| ACPI: * DMAR |
| ACPI: added table 6/32, length now 60 |
| ACPI: * IGD OpRegion |
| FMAP: area COREBOOT found @ 210200 (6225408 bytes) |
| CBFS: Locating 'vbt.bin' |
| CBFS: Found @ offset f1e00 size 48a |
| Found a VBT of 4608 bytes after decompression |
| GMA: Found VBT in CBFS |
| GMA: Found valid VBT in CBFS |
| current = 7aaa3d10 |
| acpi_write_dbg2_pci_uart: Device not found |
| ACPI: * HPET |
| ACPI: added table 7/32, length now 64 |
| ACPI: done. |
| ACPI tables: 23888 bytes. |
| smbios_write_tables: 7aa8c000 |
| Create SMBIOS type 17 |
| PCI: 00:00.0 (Intel 6th Gen) |
| SMBIOS tables: 790 bytes. |
| Writing table forward entry at 0x00000500 |
| Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 6532 |
| Writing coreboot table at 0x7aac2000 |
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1. 0000000000001000-000000000009ffff: RAM |
| 2. 00000000000a0000-00000000000fffff: RESERVED |
| 3. 0000000000100000-000000007aa8bfff: RAM |
| 4. 000000007aa8c000-000000007ab08fff: CONFIGURATION TABLES |
| 5. 000000007ab09000-000000007abcffff: RAMSTAGE |
| 6. 000000007abd0000-000000007affffff: CONFIGURATION TABLES |
| 7. 000000007b000000-000000007fffffff: RESERVED |
| 8. 00000000e0000000-00000000efffffff: RESERVED |
| 9. 00000000fd000000-00000000fe00ffff: RESERVED |
| 10. 00000000fed10000-00000000fed19fff: RESERVED |
| 11. 00000000fed40000-00000000fed44fff: RESERVED |
| 12. 00000000fed80000-00000000fed84fff: RESERVED |
| 13. 00000000fed90000-00000000fed91fff: RESERVED |
| 14. 0000000100000000-000000017effffff: RAM |
| FMAP: area COREBOOT found @ 210200 (6225408 bytes) |
| Wrote coreboot table at: 0x7aac2000, 0x424 bytes, checksum 10e9 |
| coreboot table: 1084 bytes. |
| IMD ROOT 0. 0x7afff000 0x00001000 |
| IMD SMALL 1. 0x7affe000 0x00001000 |
| FSP MEMORY 2. 0x7abfe000 0x00400000 |
| CONSOLE 3. 0x7abde000 0x00020000 |
| TIME STAMP 4. 0x7abdd000 0x00000910 |
| MRC DATA 5. 0x7abdb000 0x00001878 |
| ROMSTG STCK 6. 0x7abda000 0x00001000 |
| AFTER CAR 7. 0x7abd0000 0x0000a000 |
| RAMSTAGE 8. 0x7ab08000 0x000c8000 |
| REFCODE 9. 0x7aada000 0x0002e000 |
| SMM BACKUP 10. 0x7aaca000 0x00010000 |
| COREBOOT 11. 0x7aac2000 0x00008000 |
| ACPI 12. 0x7aa9e000 0x00024000 |
| ACPI GNVS 13. 0x7aa9d000 0x00001000 |
| TPM2 TCGLOG14. 0x7aa8d000 0x00010000 |
| SMBIOS 15. 0x7aa8c000 0x00000800 |
| IMD small region: |
| IMD ROOT 0. 0x7affec00 0x00000400 |
| FSP RUNTIME 1. 0x7affebe0 0x00000004 |
| FMAP 2. 0x7affeb00 0x000000e0 |
| POWER STATE 3. 0x7affeac0 0x00000040 |
| ROMSTAGE 4. 0x7affeaa0 0x00000004 |
| MEM INFO 5. 0x7affe8e0 0x000001b9 |
| BS: BS_WRITE_TABLES run times (exec / console): 3 / 468 ms |
| MTRR: Physical address space: |
| 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 |
| 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 |
| 0x00000000000c0000 - 0x000000007b800000 size 0x7b740000 type 6 |
| 0x000000007b800000 - 0x00000000c0000000 size 0x44800000 type 0 |
| 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1 |
| 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0 |
| 0x0000000100000000 - 0x000000017f000000 size 0x7f000000 type 6 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| CPU physical address size: 39 bits |
| MTRR: default type WB/UC MTRR counts: 6/5. |
| MTRR: UC selected as default type. |
| MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6 |
| MTRR: 1 base 0x000000007b800000 mask 0x0000007fff800000 type 0 |
| MTRR: 2 base 0x000000007c000000 mask 0x0000007ffc000000 type 0 |
| MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1 |
| MTRR: 4 base 0x0000000100000000 mask 0x0000007f80000000 type 6 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| CPU physical address size: 39 bits |
| BS: BS_WRITE_TABLES exit times (exec / console): 42 / 125 ms |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| CPU physical address size: 39 bits |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| FMAP: area COREBOOT found @ 210200 (6225408 bytes) |
| CPU physical address size: 39 bits |
| CBFS: Locating 'fallback/payload' |
| CBFS: Found @ offset 127f40 size 10f7b |
| Checking segment from ROM address 0xffb38178 |
| Payload being loaded at below 1MiB without region being marked as RAM usable. |
| Checking segment from ROM address 0xffb38194 |
| Loading segment from ROM address 0xffb38178 |
| code (compression=1) |
| New segment dstaddr 0x000dfc60 memsize 0x203a0 srcaddr 0xffb381b0 filesize 0x10f43 |
| Loading Segment: addr: 0x000dfc60 memsz: 0x00000000000203a0 filesz: 0x0000000000010f43 |
| using LZMA |
| Loading segment from ROM address 0xffb38194 |
| Entry Point 0x000fd263 |
| BS: BS_PAYLOAD_LOAD run times (exec / console): 117 / 54 ms |
| Finalizing chipset. |
| ME: Host Firmware Status Register 1 : 0x80002014 |
| ME: Host Firmware Status Register 2 : 0x36650116 |
| ME: Host Firmware Status Register 3 : 0x000001A0 |
| ME: Host Firmware Status Register 4 : 0x00084000 |
| ME: Host Firmware Status Register 5 : 0x00000000 |
| ME: Host Firmware Status Register 6 : 0x40000000 |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : YES |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: D3 Support : NO |
| ME: D0i3 Support : YES |
| ME: Low Power State Enabled : NO |
| ME: CPU Replaced : YES |
| ME: CPU Replacement Valid : YES |
| ME: Current Working State : Unknown (4) |
| ME: Current Operation State : Preboot |
| ME: Current Operation Mode : Normal |
| ME: Error Code : <NULL> |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Pseudo-global reset |
| ME: Progress Phase State : 0x65 |
| ME: Power Down Mitigation : NO |
| ME: FPF status : fused |
| Finalizing SMM. |
| BS: BS_PAYLOAD_LOAD exit times (exec / console): 14 / 93 ms |
| mp_park_aps done after 0 msecs. |
| Jumping to boot code at 0x000fd263(0x7aac2000) |
| SeaBIOS (version rel-1.13.0-0-gf21b5a4) |
| BUILD: gcc: (coreboot toolchain v1.52 June 11th, 2018) 8.1.0 binutils: (GNU Binutils) 2.30 |
| Found coreboot cbmem console @ 7abde000 |
| Found mainboard Libretrend LT1000 |
| Relocating init from 0x000e1340 to 0x7aa3ed40 (size 53792) |
| Found CBFS header at 0xffa10238 |
| multiboot: eax=7ab428a0, ebx=7ab42864 |
| Found 17 PCI devices (max PCI bus is 02) |
| Copying SMBIOS entry point from 0x7aa8c000 to 0x000f6280 |
| Copying ACPI RSDP from 0x7aa9e000 to 0x000f6250 |
| Using pmtimer, ioport 0x1808 |
| Scan for VGA option rom |
| Running option rom at c000:0003 |
| pmm call arg1=0 |
| sercon: using ioport 0x3f8 |
| sercon: configuring in splitmode (vgabios c000:3dd6) |
| Turning on vga text mode console |
| XHCI init on dev 00:14.0: regs @ 0xd1500000, 18 ports, 64 slots, 32 byte contexts |
| XHCI protocol USB 2.00, 12 ports (offset 1), def 3011 |
| XHCI protocol USB 3.00, 6 ports (offset 13), def 3000 |
| XHCI extcap 0xc0 @ 0xd1508070 |
| XHCI extcap 0x1 @ 0xd150846c |
| XHCI extcap 0xc6 @ 0xd15084f4 |
| XHCI extcap 0xc7 @ 0xd1508500 |
| XHCI extcap 0xc2 @ 0xd1508600 |
| XHCI extcap 0xa @ 0xd1508700 |
| XHCI extcap 0xc3 @ 0xd1508740 |
| XHCI extcap 0xc4 @ 0xd1508800 |
| XHCI extcap 0xc5 @ 0xd1508900 |
| AHCI controller at 00:17.0, iobase 0xd1536000, irq 11 |
| Found 0 lpt ports |
| Found 4 serial ports |
| Searching bootorder for: /pci@i0cf8/*@17/drive@2/disk@0 |
| AHCI/2: Set transfer mode to UDMA-6 |
| Searching bios-geometry for: /pci@i0cf8/*@17/drive@2/disk@0 |
| AHCI/2: registering: "AHCI/2: Hoodisk SSD ATA-10 Hard-Disk (30533 MiBytes)" |
| Got ps2 nak (status=51) |
| XHCI port #3: 0x00200603, powered, enabled, pls 0, speed 1 [Full] |
| xhci_realloc_pipe: reconf ctl endpoint pkt size: 8 -> 64 |
| XHCI port #8: 0x00200e03, powered, enabled, pls 0, speed 3 [High] |
| XHCI port #7: 0x00200e03, powered, enabled, pls 0, speed 3 [High] |
| Searching bootorder for: /pci@i0cf8/usb@14/storage@7/*@0/*@0,0 |
| Searching bootorder for: /pci@i0cf8/usb@14/usb-*@7 |
| USB MSC vendor='SanDisk' product='Ultra USB 3.0' rev='1.00' type=0 removable=1 |
| USB MSC blksize=512 sectors=30031872 |
| XHCI port #6: 0x00200e03, powered, enabled, pls 0, speed 3 [High] |
| Searching bootorder for: /pci@i0cf8/usb@14/storage@6/*@0/*@0,0 |
| Searching bootorder for: /pci@i0cf8/usb@14/usb-*@6 |
| Initialized USB HUB (0 ports used) |
| USB MSC vendor='Intenso' product='Premium Line' rev='1100' type=0 removable=1 |
| USB MSC blksize=512 sectors=15716352 |
| All threads complete. |
| Scan for option roms |
| Running option rom at c700:0003 |
| pmm call arg1=1 |
| pmm call arg1=0 |
| pmm call arg1=1 |
| pmm call arg1=0 |
| |