| |
| |
| coreboot-4.5-906-g3fb6e6e-dirty Fri Jan 27 02:44:47 UTC 2017 romstage starting... |
| Setting up static southbridge registers... done. |
| Disabling Watchdog reboot... done. |
| Setting up static northbridge registers... done. |
| Initializing Graphics... |
| Back from sandybridge_early_initialization() |
| SMBus controller enabled. |
| CPU id(206a7): Intel(R) Core(TM) i5-2410M CPU @ 2.30GHz |
| AES supported, TXT NOT supported, VT supported |
| PCH type: QM67, device id: 1c4f, rev id 5 |
| Intel ME early init |
| Intel ME firmware is ready |
| ME: Requested 32MB UMA |
| Starting native Platform init |
| CBFS: 'Master Header Locator' located CBFS at [7a0100:7fffc0) |
| CBFS: Locating 'mrc.cache' |
| CBFS: Found @ offset 1fec0 size 10000 |
| find_current_mrc_cache_local: No valid MRC cache found. |
| Row addr bits : 15 |
| Column addr bits : 10 |
| Number of ranks : 2 |
| DIMM Capacity : 4096 MB |
| CAS latencies : 5 6 7 8 9 |
| tCKmin : 1.500 ns |
| tAAmin : 13.125 ns |
| tWRmin : 15.000 ns |
| tRCDmin : 13.125 ns |
| tRRDmin : 6.000 ns |
| tRPmin : 13.125 ns |
| tRASmin : 36.000 ns |
| tRCmin : 49.125 ns |
| tRFCmin : 160.000 ns |
| tWTRmin : 7.500 ns |
| tRTPmin : 7.500 ns |
| tFAWmin : 30.000 ns |
| channel[0] rankmap = 0x3 |
| Starting RAM training (0). |
| PLL busy... done in 10 us |
| MCU frequency is set at : 666 MHz |
| Selected DRAM frequency: 666 MHz |
| Minimum CAS latency : 9T |
| Selected CAS latency : 9T |
| Selected CWL latency : 7T |
| Selected tRCD : 9T |
| Selected tRP : 9T |
| Selected tRAS : 24T |
| Selected tWR : 10T |
| Selected tFAW : 20T |
| Selected tRRD : 4T |
| Selected tRTP : 5T |
| Selected tWTR : 5T |
| Selected tRFC : 107T |
| Done dimm mapping |
| Update PCI-E configuration space: |
| PCI(0, 0, 0)[a0] = 0 |
| PCI(0, 0, 0)[a4] = 1 |
| PCI(0, 0, 0)[bc] = 82a00000 |
| PCI(0, 0, 0)[a8] = 7b600000 |
| PCI(0, 0, 0)[ac] = 1 |
| PCI(0, 0, 0)[b8] = 80000000 |
| PCI(0, 0, 0)[b0] = 80a00000 |
| PCI(0, 0, 0)[b4] = 80800000 |
| PCI(0, 0, 0)[7c] = 7f |
| PCI(0, 0, 0)[70] = fe000000 |
| PCI(0, 0, 0)[74] = 0 |
| PCI(0, 0, 0)[78] = fe000c00 |
| Done memory map |
| Done io registers |
| Done jedec reset |
| Done MRS commands |
| t123: 1912, 9120, 500 |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : NO |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Normal |
| ME: Current Operation State : Bring up |
| ME: Current Operation Mode : Normal |
| ME: Error Code : No Error |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Clean Moff->Mx wake |
| ME: Progress Phase State : 0x4e |
| ME: FWS2: 0x104e0006 |
| ME: Bist in progress: 0x0 |
| ME: ICC Status : 0x3 |
| ME: Invoke MEBx : 0x0 |
| ME: CPU replaced : 0x0 |
| ME: MBP ready : 0x0 |
| ME: MFS failure : 0x0 |
| ME: Warm reset req : 0x0 |
| ME: CPU repl valid : 0x0 |
| ME: (Reserved) : 0x0 |
| ME: FW update req : 0x0 |
| ME: (Reserved |
| |
| *** Log truncated, 1626 characters dropped. *** |
| |
| Relocate MRC DATA from fefff9fc to 7ffdc000 (1440 bytes) |
| CBMEM entry for DIMM info: 0x7fffe880 |
| MTRR Range: Start=ff800000 End=0 (Size 800000) |
| MTRR Range: Start=0 End=1000000 (Size 1000000) |
| MTRR Range: Start=7f800000 End=80000000 (Size 800000) |
| MTRR Range: Start=80000000 End=80800000 (Size 800000) |
| CBFS: 'Master Header Locator' located CBFS at [7a0100:7fffc0) |
| CBFS: Locating 'fallback/ramstage' |
| CBFS: Found @ offset 2ff00 size 150d6 |
| Decompressing stage fallback/ramstage @ 0x7ff99fc0 (248496 bytes) |
| Loading module at 7ff9a000 with entry 7ff9a000. filesize: 0x2bff8 memsize: 0x3ca70 |
| Processing 2880 relocs. Offset value of 0x7fe9a000 |
| Capability: type 0x01 @ 0x50 |
| Capability: type 0x0a @ 0x58 |
| |
| |
| coreboot-4.5-906-g3fb6e6e-dirty Fri Jan 27 02:44:47 UTC 2017 ramstage starting... |
| Normal boot. |
| BS: BS_PRE_DEVICE times (us): entry 0 run 0 exit 0 |
| BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 0 exit 0 |
| Enumerating buses... |
| Show all devs... Before device enumeration. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 1 |
| PCI: 00:1c.4: enabled 0 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 0 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| Compare with tree... |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 1 |
| PCI: 00:1c.4: enabled 0 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 0 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| Root Device scanning... |
| root_dev_scan_bus for Root Device |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| DOMAIN: 0000 scanning... |
| PCI: pci_scan_bus for bus 00 |
| PCI: 00:00.0 [8086/0104] ops |
| PCI: 00:00.0 [8086/0104] enabled |
| Capability: type 0x0d @ 0x88 |
| Capability: type 0x01 @ 0x80 |
| Capability: type 0x05 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| Capability: type 0x0d @ 0x88 |
| Capability: type 0x01 @ 0x80 |
| Capability: type 0x05 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| PCI: 00:01.0 subordinate bus PCI Express |
| PCI: 00:01.0 [8086/0101] disabled |
| PCI: 00:02.0 [8086/0000] ops |
| PCI: 00:02.0 [8086/0116] enabled |
| PCI: 00:04.0 [8086/0103] enabled |
| PCI: 00:16.0 [8086/1c3a] ops |
| PCI: 00:16.0 [8086/1c3a] enabled |
| PCI: 00:16.1: Disabling device |
| PCI: 00:16.1 [8086/1c3b] disabled No operations |
| PCI: 00:16.2: Disabling device |
| PCI: 00:16.2 [8086/1c3c] disabled No operations |
| PCI: 00:16.3: Disabling device |
| PCI: 00:16.3 [8086/1c3d] disabled No operations |
| PCI: 00:19.0 [8086/1502] enabled |
| PCI: 00:1a.0 [8086/0000] ops |
| PCI: 00:1a.0 [8086/1c2d] enabled |
| PCI: 00:1b.0 [8086/0000] ops |
| PCI: 00:1b.0 [8086/1c20] enabled |
| PCH: PCIe Root Port coalescing is enabled |
| PCI: 00:1c.0 [8086/0000] bus ops |
| PCI: 00:1c.0 [8086/1c10] enabled |
| PCI: 00:1c.1 [8086/0000] bus ops |
| PCI: 00:1c.1 [8086/1c12] enabled |
| PCI: 00:1c.2 [8086/0000] bus ops |
| PCI: 00:1c.2 [8086/1c14] enabled |
| PCI: 00:1c.3 [8086/0000] bus ops |
| PCI: 00:1c.3 [8086/1c16] enabled |
| PCI: 00:1c.4: Disabling device |
| PCI: 00:1c.4: check set enabled |
| PCI: 00:1c.5: Disabling device |
| PCI: 00:1c.6: Disabling device |
| PCI: 00:1c.7: Disabling device |
| PCH: RPFN 0x76543210 -> 0xfedc3210 |
| PCI: 00:1d.0 [8086/0000] ops |
| PCI: 00:1d.0 [8086/1c26] enabled |
| PCI: 00:1e.0: Disabling device |
| PCI: 00:1f.0 [8086/0000] bus ops |
| PCI: 00:1f.0 [8086/1c4f] enabled |
| PCI: 00:1f.2 [8086/0000] ops |
| PCI: 00:1f.2 [8086/1c01] enabled |
| PCI: 00:1f.3: Disabling device |
| PCI: 00:1f.5: Disabling device |
| PCI: 00:1f.6: Disabling device |
| PCI: 00:1c.0 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.0 |
| PCI: pci_scan_bus for bus 01 |
| scan_bus: scanning of bus PCI: 00:1c.0 took 49 usecs |
| PCI: 00:1c.1 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.1 |
| PCI: pci_scan_bus for bus 02 |
| scan_bus: scanning of bus PCI: 00:1c.1 took 48 usecs |
| PCI: 00:1c.2 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.2 |
| PCI: pci_scan_bus for bus 03 |
| PCI: 03:00.0 [197b/2380] enabled |
| PCI: 03:00.1 [197b/2392] enabled |
| PCI: 03:00.2 [197b/2391] enabled |
| PCI: 03:00.3 [197b/2393] enabled |
| PCI: 03:00.4 [197b/2394] enabled |
| Capability: type 0x01 @ 0x44 |
| Capability: type 0x10 @ 0x80 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| ASPM: Enabled None |
| Capability: type 0x01 @ 0xa4 |
| Capability: type 0x10 @ 0x80 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| ASPM: Enabled None |
| Capability: type 0x01 @ 0xa4 |
| Capability: type 0x10 @ 0x80 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| ASPM: Enabled None |
| Capability: type 0x01 @ 0xa4 |
| Capability: type 0x10 @ 0x80 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| ASPM: Enabled None |
| Capability: type 0x01 @ 0xa4 |
| Capability: type 0x10 @ 0x80 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| ASPM: Enabled None |
| scan_bus: scanning of bus PCI: 00:1c.2 took 824 usecs |
| PCI: 00:1c.3 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.3 |
| PCI: pci_scan_bus for bus 04 |
| PCI: 04:00.0 [168c/0030] enabled |
| Capability: type 0x01 @ 0x40 |
| Capability: type 0x05 @ 0x50 |
| Capability: type 0x10 @ 0x70 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| scan_bus: scanning of bus PCI: 00:1c.3 took 216 usecs |
| PCI: 00:1f.0 scanning... |
| scan_lpc_bus for PCI: 00:1f.0 |
| scan_lpc_bus for PCI: 00:1f.0 done |
| scan_bus: scanning of bus PCI: 00:1f.0 took 9 usecs |
| scan_bus: scanning of bus DOMAIN: 0000 took 1571 usecs |
| root_dev_scan_bus for Root Device done |
| scan_bus: scanning of bus Root Device took 1590 usecs |
| done |
| BS: BS_DEV_ENUMERATE times (us): entry 0 run 1777 exit 0 |
| found VGA at PCI: 00:02.0 |
| Setting up VGA for PCI: 00:02.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| Allocating resources... |
| Reading resources... |
| Root Device read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 |
| Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000. |
| More than one caller of pci_ehci_read_resources from PCI: 00:1a.0 |
| PCI: 00:1c.0 read_resources bus 1 link: 0 |
| PCI: 00:1c.0 read_resources bus 1 link: 0 done |
| PCI: 00:1c.1 read_resources bus 2 link: 0 |
| PCI: 00:1c.1 read_resources bus 2 link: 0 done |
| PCI: 00:1c.2 read_resources bus 3 link: 0 |
| PCI: 00:1c.2 read_resources bus 3 link: 0 done |
| PCI: 00:1c.3 read_resources bus 4 link: 0 |
| PCI: 00:1c.3 read_resources bus 4 link: 0 done |
| PCI: 00:1d.0 EHCI BAR hook registered |
| DOMAIN: 0000 read_resources bus 0 link: 0 done |
| Root Device read_resources bus 0 link: 0 done |
| Done reading resources. |
| Show resources in subtree (Root Device)...After reading. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: acac |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 |
| PCI: 00:00.0 |
| PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 |
| PCI: 00:01.0 |
| PCI: 00:02.0 |
| PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18 |
| PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20 |
| PCI: 00:04.0 |
| PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:16.0 |
| PCI: 00:16.0 resource base 0 size 10 align 12 gran 4 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:19.0 |
| PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 |
| PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 |
| PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 |
| PCI: 00:1a.0 |
| PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:1c.0 |
| PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 00:1c.1 |
| PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 00:1c.2 child on link 0 PCI: 03:00.0 |
| PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 03:00.0 |
| PCI: 03:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 10 |
| PCI: 03:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14 |
| PCI: 03:00.1 |
| PCI: 03:00.1 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| PCI: 03:00.1 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30 |
| PCI: 03:00.2 |
| PCI: 03:00.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| PCI: 03:00.3 |
| PCI: 03:00.3 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| PCI: 03:00.4 |
| PCI: 03:00.4 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| Unknown device path type: 0 |
| |
| Unknown device path type: 0 |
| resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10 |
| Unknown device path type: 0 |
| resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14 |
| Unknown device path type: 0 |
| resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18 |
| PCI: 00:1c.3 child on link 0 PCI: 04:00.0 |
| PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 04:00.0 |
| PCI: 04:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10 |
| PCI: 04:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30 |
| PCI: 00:1c.4 |
| PCI: 00:1c.5 |
| PCI: 00:1c.6 |
| PCI: 00:1c.7 |
| PCI: 00:1d.0 |
| PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| PCI: 00:1e.0 |
| PCI: 00:1f.0 |
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PCI: 00:1f.0 resource base fe00 size fc align 0 gran 0 limit 0 flags c0040100 index 10000200 |
| PCI: 00:1f.2 |
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 |
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 |
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 |
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c |
| PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 |
| PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24 |
| PCI: 00:1f.3 |
| PCI: 00:1f.5 |
| PCI: 00:1f.6 |
| DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff |
| PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| Unknown device path type: 0 |
| 18 * [0x0 - 0xfff] io |
| PCI: 00:1c.2 io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.2 1c * [0x0 - 0xfff] io |
| PCI: 00:02.0 20 * [0x1000 - 0x103f] io |
| PCI: 00:19.0 18 * [0x1040 - 0x105f] io |
| PCI: 00:1f.2 20 * [0x1060 - 0x107f] io |
| PCI: 00:1f.2 10 * [0x1080 - 0x1087] io |
| PCI: 00:1f.2 18 * [0x1088 - 0x108f] io |
| PCI: 00:1f.2 14 * [0x1090 - 0x1093] io |
| PCI: 00:1f.2 1c * [0x1094 - 0x1097] io |
| DOMAIN: 0000 io: base: 1098 size: 1098 align: 12 gran: 0 limit: ffff done |
| DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff |
| PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| Unknown device path type: 0 |
| 14 * [0x0 - 0x7fffff] prefmem |
| PCI: 00:1c.2 prefmem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done |
| PCI: 00:1c.2 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| Unknown device path type: 0 |
| 10 * [0x0 - 0x7fffff] mem |
| PCI: 03:00.1 30 * [0x800000 - 0x80ffff] mem |
| PCI: 03:00.0 10 * [0x810000 - 0x8107ff] mem |
| PCI: 03:00.0 14 * [0x811000 - 0x8110ff] mem |
| PCI: 03:00.1 10 * [0x812000 - 0x8120ff] mem |
| PCI: 03:00.2 10 * [0x813000 - 0x8130ff] mem |
| PCI: 03:00.3 10 * [0x814000 - 0x8140ff] mem |
| PCI: 03:00.4 10 * [0x815000 - 0x8150ff] mem |
| PCI: 00:1c.2 mem: base: 815100 size: 900000 align: 22 gran: 20 limit: ffffffff done |
| PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.3 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 04:00.0 10 * [0x0 - 0x1ffff] mem |
| PCI: 04:00.0 30 * [0x20000 - 0x2ffff] mem |
| PCI: 00:1c.3 mem: base: 30000 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem |
| PCI: 00:1c.2 20 * [0x10000000 - 0x108fffff] mem |
| PCI: 00:1c.2 24 * [0x10c00000 - 0x113fffff] prefmem |
| PCI: 00:02.0 10 * [0x11400000 - 0x117fffff] mem |
| PCI: 00:1c.3 20 * [0x11800000 - 0x118fffff] mem |
| PCI: 00:19.0 10 * [0x11900000 - 0x1191ffff] mem |
| PCI: 00:04.0 10 * [0x11920000 - 0x11927fff] mem |
| PCI: 00:1b.0 10 * [0x11928000 - 0x1192bfff] mem |
| PCI: 00:19.0 14 * [0x1192c000 - 0x1192cfff] mem |
| PCI: 00:1f.2 24 * [0x1192d000 - 0x1192d7ff] mem |
| PCI: 00:1a.0 10 * [0x1192e000 - 0x1192e3ff] mem |
| PCI: 00:1d.0 10 * [0x1192f000 - 0x1192f3ff] mem |
| PCI: 00:16.0 10 * [0x11930000 - 0x1193000f] mem |
| DOMAIN: 0000 mem: base: 11930010 size: 11930010 align: 28 gran: 0 limit: ffffffff done |
| avoid_fixed_resources: DOMAIN: 0000 |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff |
| constrain_resources: PCI: 00:00.0 60 base f0000000 limit f3ffffff mem (fixed) |
| constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed) |
| constrain_resources: PCI: 00:1f.0 10000200 base 0000fe00 limit 0000fefb io (fixed) |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000fdff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 base d0000000 limit efffffff |
| Setting resources... |
| DOMAIN: 0000 io: base:1000 size:1098 align:12 gran:0 limit:fdff |
| PCI: 00:1c.2 1c * [0x1000 - 0x1fff] io |
| PCI: 00:02.0 20 * [0x2000 - 0x203f] io |
| PCI: 00:19.0 18 * [0x2040 - 0x205f] io |
| PCI: 00:1f.2 20 * [0x2060 - 0x207f] io |
| PCI: 00:1f.2 10 * [0x2080 - 0x2087] io |
| PCI: 00:1f.2 18 * [0x2088 - 0x208f] io |
| PCI: 00:1f.2 14 * [0x2090 - 0x2093] io |
| PCI: 00:1f.2 1c * [0x2094 - 0x2097] io |
| DOMAIN: 0000 io: next_base: 2098 size: 1098 align: 12 gran: 0 done |
| PCI: 00:1c.0 io: base:fdff size:0 align:12 gran:12 limit:fdff |
| PCI: 00:1c.0 io: next_base: fdff size: 0 align: 12 gran: 12 done |
| PCI: 00:1c.1 io: base:fdff size:0 align:12 gran:12 limit:fdff |
| PCI: 00:1c.1 io: next_base: fdff size: 0 align: 12 gran: 12 done |
| PCI: 00:1c.2 io: base:1000 size:1000 align:12 gran:12 limit:1fff |
| Unknown device path type: 0 |
| 18 * [0x1000 - 0x1fff] io |
| PCI: 00:1c.2 io: next_base: 2000 size: 1000 align: 12 gran: 12 done |
| PCI: 00:1c.3 io: base:fdff size:0 align:12 gran:12 limit:fdff |
| PCI: 00:1c.3 io: next_base: fdff size: 0 align: 12 gran: 12 done |
| DOMAIN: 0000 mem: base:d0000000 size:11930010 align:28 gran:0 limit:efffffff |
| PCI: 00:02.0 18 * [0xd0000000 - 0xdfffffff] prefmem |
| PCI: 00:1c.2 20 * [0xe0000000 - 0xe08fffff] mem |
| PCI: 00:1c.2 24 * [0xe0c00000 - 0xe13fffff] prefmem |
| PCI: 00:02.0 10 * [0xe1400000 - 0xe17fffff] mem |
| PCI: 00:1c.3 20 * [0xe1800000 - 0xe18fffff] mem |
| PCI: 00:19.0 10 * [0xe1900000 - 0xe191ffff] mem |
| PCI: 00:04.0 10 * [0xe1920000 - 0xe1927fff] mem |
| PCI: 00:1b.0 10 * [0xe1928000 - 0xe192bfff] mem |
| PCI: 00:19.0 14 * [0xe192c000 - 0xe192cfff] mem |
| PCI: 00:1f.2 24 * [0xe192d000 - 0xe192d7ff] mem |
| PCI: 00:1a.0 10 * [0xe192e000 - 0xe192e3ff] mem |
| PCI: 00:1d.0 10 * [0xe192f000 - 0xe192f3ff] mem |
| PCI: 00:16.0 10 * [0xe1930000 - 0xe193000f] mem |
| DOMAIN: 0000 mem: next_base: e1930010 size: 11930010 align: 28 gran: 0 done |
| PCI: 00:1c.0 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff |
| PCI: 00:1c.0 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.0 mem: base:efffffff size:0 align:20 gran:20 limit:efffffff |
| PCI: 00:1c.0 mem: next_base: efffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.1 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff |
| PCI: 00:1c.1 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.1 mem: base:efffffff size:0 align:20 gran:20 limit:efffffff |
| PCI: 00:1c.1 mem: next_base: efffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.2 prefmem: base:e0c00000 size:800000 align:22 gran:20 limit:e13fffff |
| Unknown device path type: 0 |
| 14 * [0xe0c00000 - 0xe13fffff] prefmem |
| PCI: 00:1c.2 prefmem: next_base: e1400000 size: 800000 align: 22 gran: 20 done |
| PCI: 00:1c.2 mem: base:e0000000 size:900000 align:22 gran:20 limit:e08fffff |
| Unknown device path type: 0 |
| 10 * [0xe0000000 - 0xe07fffff] mem |
| PCI: 03:00.1 30 * [0xe0800000 - 0xe080ffff] mem |
| PCI: 03:00.0 10 * [0xe0810000 - 0xe08107ff] mem |
| PCI: 03:00.0 14 * [0xe0811000 - 0xe08110ff] mem |
| PCI: 03:00.1 10 * [0xe0812000 - 0xe08120ff] mem |
| PCI: 03:00.2 10 * [0xe0813000 - 0xe08130ff] mem |
| PCI: 03:00.3 10 * [0xe0814000 - 0xe08140ff] mem |
| PCI: 03:00.4 10 * [0xe0815000 - 0xe08150ff] mem |
| PCI: 00:1c.2 mem: next_base: e0815100 size: 900000 align: 22 gran: 20 done |
| PCI: 00:1c.3 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff |
| PCI: 00:1c.3 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.3 mem: base:e1800000 size:100000 align:20 gran:20 limit:e18fffff |
| PCI: 04:00.0 10 * [0xe1800000 - 0xe181ffff] mem |
| PCI: 04:00.0 30 * [0xe1820000 - 0xe182ffff] mem |
| PCI: 00:1c.3 mem: next_base: e1830000 size: 100000 align: 20 gran: 20 done |
| Root Device assign_resources, bus 0 link: 0 |
| TOUUD 0x17b600000 TOLUD 0x82a00000 TOM 0x100000000 |
| MEBASE 0xfe000000 |
| IGD decoded, subtracting 32M UMA and 2M GTT |
| TSEG base 0x80000000 size 8M |
| Available memory below 4GB: 2048M |
| Available memory above 4GB: 1974M |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| PCI: 00:02.0 10 <- [0x00e1400000 - 0x00e17fffff] size 0x00400000 gran 0x16 mem64 |
| PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64 |
| PCI: 00:02.0 20 <- [0x0000002000 - 0x000000203f] size 0x00000040 gran 0x06 io |
| PCI: 00:04.0 10 <- [0x00e1920000 - 0x00e1927fff] size 0x00008000 gran 0x0f mem64 |
| PCI: 00:16.0 10 <- [0x00e1930000 - 0x00e193000f] size 0x00000010 gran 0x04 mem64 |
| PCI: 00:19.0 10 <- [0x00e1900000 - 0x00e191ffff] size 0x00020000 gran 0x11 mem |
| PCI: 00:19.0 14 <- [0x00e192c000 - 0x00e192cfff] size 0x00001000 gran 0x0c mem |
| PCI: 00:19.0 18 <- [0x0000002040 - 0x000000205f] size 0x00000020 gran 0x05 io |
| PCI: 00:1a.0 10 <- [0x00e192e000 - 0x00e192e3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1b.0 10 <- [0x00e1928000 - 0x00e192bfff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:1c.0 1c <- [0x000000fdff - 0x000000fdfe] size 0x00000000 gran 0x0c bus 01 io |
| PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem |
| PCI: 00:1c.0 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 mem |
| PCI: 00:1c.1 1c <- [0x000000fdff - 0x000000fdfe] size 0x00000000 gran 0x0c bus 02 io |
| PCI: 00:1c.1 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 prefmem |
| PCI: 00:1c.1 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 mem |
| PCI: 00:1c.2 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 03 io |
| PCI: 00:1c.2 24 <- [0x00e0c00000 - 0x00e13fffff] size 0x00800000 gran 0x14 bus 03 prefmem |
| PCI: 00:1c.2 20 <- [0x00e0000000 - 0x00e08fffff] size 0x00900000 gran 0x14 bus 03 mem |
| PCI: 00:1c.2 assign_resources, bus 3 link: 0 |
| PCI: 03:00.0 10 <- [0x00e0810000 - 0x00e08107ff] size 0x00000800 gran 0x0b mem |
| PCI: 03:00.0 14 <- [0x00e0811000 - 0x00e08110ff] size 0x00000100 gran 0x08 mem |
| PCI: 03:00.1 10 <- [0x00e0812000 - 0x00e08120ff] size 0x00000100 gran 0x08 mem |
| PCI: 03:00.1 30 <- [0x00e0800000 - 0x00e080ffff] size 0x00010000 gran 0x10 romem |
| PCI: 03:00.2 10 <- [0x00e0813000 - 0x00e08130ff] size 0x00000100 gran 0x08 mem |
| PCI: 03:00.3 10 <- [0x00e0814000 - 0x00e08140ff] size 0x00000100 gran 0x08 mem |
| PCI: 03:00.4 10 <- [0x00e0815000 - 0x00e08150ff] size 0x00000100 gran 0x08 mem |
| Unknown device path type: 0 |
| missing set_resources |
| PCI: 00:1c.2 assign_resources, bus 3 link: 0 |
| PCI: 00:1c.3 1c <- [0x000000fdff - 0x000000fdfe] size 0x00000000 gran 0x0c bus 04 io |
| PCI: 00:1c.3 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 04 prefmem |
| PCI: 00:1c.3 20 <- [0x00e1800000 - 0x00e18fffff] size 0x00100000 gran 0x14 bus 04 mem |
| PCI: 00:1c.3 assign_resources, bus 4 link: 0 |
| PCI: 04:00.0 10 <- [0x00e1800000 - 0x00e181ffff] size 0x00020000 gran 0x11 mem64 |
| PCI: 04:00.0 30 <- [0x00e1820000 - 0x00e182ffff] size 0x00010000 gran 0x10 romem |
| PCI: 00:1c.3 assign_resources, bus 4 link: 0 |
| PCI: 00:1d.0 EHCI Debug Port hook triggered |
| PCI: 00:1d.0 10 <- [0x00e192f000 - 0x00e192f3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1d.0 10 <- [0x00e192f000 - 0x00e192f3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1d.0 EHCI Debug Port relocated |
| PCI: 00:1f.2 10 <- [0x0000002080 - 0x0000002087] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 14 <- [0x0000002090 - 0x0000002093] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 18 <- [0x0000002088 - 0x000000208f] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 1c <- [0x0000002094 - 0x0000002097] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 20 <- [0x0000002060 - 0x000000207f] size 0x00000020 gran 0x05 io |
| PCI: 00:1f.2 24 <- [0x00e192d000 - 0x00e192d7ff] size 0x00000800 gran 0x0b mem |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| Root Device assign_resources, bus 0 link: 0 |
| Done setting resources. |
| Show resources in subtree (Root Device)...After assigning values. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: acac |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 1000 size 1098 align 12 gran 0 limit fdff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base d0000000 size 11930010 align 28 gran 0 limit efffffff flags 40040200 index 10000100 |
| DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 |
| DOMAIN: 0000 resource base 100000 size 7ff00000 align 0 gran 0 limit 0 flags e0004200 index 4 |
| DOMAIN: 0000 resource base 100000000 size 7b600000 align 0 gran 0 limit 0 flags e0004200 index 5 |
| DOMAIN: 0000 resource base 80000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6 |
| DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7 |
| DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8 |
| DOMAIN: 0000 resource base 20000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index 9 |
| DOMAIN: 0000 resource base 40000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index a |
| PCI: 00:00.0 |
| PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 |
| PCI: 00:01.0 |
| PCI: 00:02.0 |
| PCI: 00:02.0 resource base e1400000 size 400000 align 22 gran 22 limit e17fffff flags 60000201 index 10 |
| PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit dfffffff flags 60001201 index 18 |
| PCI: 00:02.0 resource base 2000 size 40 align 6 gran 6 limit 203f flags 60000100 index 20 |
| PCI: 00:04.0 |
| PCI: 00:04.0 resource base e1920000 size 8000 align 15 gran 15 limit e1927fff flags 60000201 index 10 |
| PCI: 00:16.0 |
| PCI: 00:16.0 resource base e1930000 size 10 align 12 gran 4 limit e193000f flags 60000201 index 10 |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:19.0 |
| PCI: 00:19.0 resource base e1900000 size 20000 align 17 gran 17 limit e191ffff flags 60000200 index 10 |
| PCI: 00:19.0 resource base e192c000 size 1000 align 12 gran 12 limit e192cfff flags 60000200 index 14 |
| PCI: 00:19.0 resource base 2040 size 20 align 5 gran 5 limit 205f flags 60000100 index 18 |
| PCI: 00:1a.0 |
| PCI: 00:1a.0 resource base e192e000 size 400 align 12 gran 10 limit e192e3ff flags 60000200 index 10 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base e1928000 size 4000 align 14 gran 14 limit e192bfff flags 60000201 index 10 |
| PCI: 00:1c.0 |
| PCI: 00:1c.0 resource base fdff size 0 align 12 gran 12 limit fdff flags 60080102 index 1c |
| PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 |
| PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20 |
| PCI: 00:1c.1 |
| PCI: 00:1c.1 resource base fdff size 0 align 12 gran 12 limit fdff flags 60080102 index 1c |
| PCI: 00:1c.1 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 |
| PCI: 00:1c.1 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20 |
| PCI: 00:1c.2 child on link 0 PCI: 03:00.0 |
| PCI: 00:1c.2 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c |
| PCI: 00:1c.2 resource base e0c00000 size 800000 align 22 gran 20 limit e13fffff flags 60081202 index 24 |
| PCI: 00:1c.2 resource base e0000000 size 900000 align 22 gran 20 limit e08fffff flags 60080202 index 20 |
| PCI: 03:00.0 |
| PCI: 03:00.0 resource base e0810000 size 800 align 12 gran 11 limit e08107ff flags 60000200 index 10 |
| PCI: 03:00.0 resource base e0811000 size 100 align 12 gran 8 limit e08110ff flags 60000200 index 14 |
| PCI: 03:00.1 |
| PCI: 03:00.1 resource base e0812000 size 100 align 12 gran 8 limit e08120ff flags 60000200 index 10 |
| PCI: 03:00.1 resource base e0800000 size 10000 align 16 gran 16 limit e080ffff flags 60002200 index 30 |
| PCI: 03:00.2 |
| PCI: 03:00.2 resource base e0813000 size 100 align 12 gran 8 limit e08130ff flags 60000200 index 10 |
| PCI: 03:00.3 |
| PCI: 03:00.3 resource base e0814000 size 100 align 12 gran 8 limit e08140ff flags 60000200 index 10 |
| PCI: 03:00.4 |
| PCI: 03:00.4 resource base e0815000 size 100 align 12 gran 8 limit e08150ff flags 60000200 index 10 |
| Unknown device path type: 0 |
| |
| Unknown device path type: 0 |
| resource base e0000000 size 800000 align 22 gran 22 limit e07fffff flags 40000200 index 10 |
| Unknown device path type: 0 |
| resource base e0c00000 size 800000 align 22 gran 22 limit e13fffff flags 40001200 index 14 |
| Unknown device path type: 0 |
| resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 40000100 index 18 |
| PCI: 00:1c.3 child on link 0 PCI: 04:00.0 |
| PCI: 00:1c.3 resource base fdff size 0 align 12 gran 12 limit fdff flags 60080102 index 1c |
| PCI: 00:1c.3 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 |
| PCI: 00:1c.3 resource base e1800000 size 100000 align 20 gran 20 limit e18fffff flags 60080202 index 20 |
| PCI: 04:00.0 |
| PCI: 04:00.0 resource base e1800000 size 20000 align 17 gran 17 limit e181ffff flags 60000201 index 10 |
| PCI: 04:00.0 resource base e1820000 size 10000 align 16 gran 16 limit e182ffff flags 60002200 index 30 |
| PCI: 00:1c.4 |
| PCI: 00:1c.5 |
| PCI: 00:1c.6 |
| PCI: 00:1c.7 |
| PCI: 00:1d.0 |
| PCI: 00:1d.0 resource base e192f000 size 400 align 12 gran 10 limit e192f3ff flags 60000200 index 10 |
| PCI: 00:1e.0 |
| PCI: 00:1f.0 |
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PCI: 00:1f.0 resource base fe00 size fc align 0 gran 0 limit 0 flags c0040100 index 10000200 |
| PCI: 00:1f.2 |
| PCI: 00:1f.2 resource base 2080 size 8 align 3 gran 3 limit 2087 flags 60000100 index 10 |
| PCI: 00:1f.2 resource base 2090 size 4 align 2 gran 2 limit 2093 flags 60000100 index 14 |
| PCI: 00:1f.2 resource base 2088 size 8 align 3 gran 3 limit 208f flags 60000100 index 18 |
| PCI: 00:1f.2 resource base 2094 size 4 align 2 gran 2 limit 2097 flags 60000100 index 1c |
| PCI: 00:1f.2 resource base 2060 size 20 align 5 gran 5 limit 207f flags 60000100 index 20 |
| PCI: 00:1f.2 resource base e192d000 size 800 align 12 gran 11 limit e192d7ff flags 60000200 index 24 |
| PCI: 00:1f.3 |
| PCI: 00:1f.5 |
| PCI: 00:1f.6 |
| Done allocating resources. |
| BS: BS_DEV_RESOURCES times (us): entry 0 run 4229 exit 0 |
| Enabling resources... |
| PCI: 00:00.0 subsystem <- 103c/162a |
| PCI: 00:00.0 cmd <- 06 |
| PCI: 00:02.0 subsystem <- 103c/162a |
| PCI: 00:02.0 cmd <- 03 |
| PCI: 00:04.0 cmd <- 02 |
| PCI: 00:16.0 subsystem <- 103c/162a |
| PCI: 00:16.0 cmd <- 02 |
| PCI: 00:19.0 subsystem <- 103c/162a |
| PCI: 00:19.0 cmd <- 103 |
| PCI: 00:1a.0 subsystem <- 103c/162a |
| PCI: 00:1a.0 cmd <- 102 |
| PCI: 00:1b.0 subsystem <- 103c/162a |
| PCI: 00:1b.0 cmd <- 102 |
| PCI: 00:1c.0 bridge ctrl <- 0003 |
| PCI: 00:1c.0 subsystem <- 103c/162a |
| PCI: 00:1c.0 cmd <- 100 |
| PCI: 00:1c.1 bridge ctrl <- 0003 |
| PCI: 00:1c.1 subsystem <- 103c/162a |
| PCI: 00:1c.1 cmd <- 100 |
| PCI: 00:1c.2 bridge ctrl <- 0003 |
| PCI: 00:1c.2 subsystem <- 103c/162a |
| PCI: 00:1c.2 cmd <- 107 |
| PCI: 00:1c.3 bridge ctrl <- 0003 |
| PCI: 00:1c.3 subsystem <- 0000/0000 |
| PCI: 00:1c.3 cmd <- 106 |
| PCI: 00:1d.0 subsystem <- 103c/162a |
| PCI: 00:1d.0 cmd <- 102 |
| pch_decode_init |
| PCI: 00:1f.0 subsystem <- 103c/162a |
| PCI: 00:1f.0 cmd <- 107 |
| PCI: 00:1f.2 subsystem <- 103c/162a |
| PCI: 00:1f.2 cmd <- 03 |
| PCI: 03:00.0 cmd <- 02 |
| PCI: 03:00.1 cmd <- 06 |
| PCI: 03:00.2 cmd <- 06 |
| PCI: 03:00.3 cmd <- 06 |
| PCI: 03:00.4 cmd <- 06 |
| PCI: 04:00.0 cmd <- 02 |
| done. |
| BS: BS_DEV_ENABLE times (us): entry 0 run 211 exit 0 |
| Initializing devices... |
| Root Device init ... |
| Root Device init finished in 2 usecs |
| CPU_CLUSTER: 0 init ... |
| start_eip=0x00001000, code_size=0x00000031 |
| Setting up SMI for CPU |
| Loading module at 00038000 with entry 00038000. filesize: 0x160 memsize: 0x160 |
| Processing 10 relocs. Offset value of 0x00038000 |
| SMM Module: stub loaded at 00038000. Will call 7ffb2d21(7ffd2a00) |
| Installing SMM handler to 0x80000000 |
| Loading module at 80010000 with entry 8001010a. filesize: 0xed0 memsize: 0x4ef0 |
| Processing 51 relocs. Offset value of 0x80010000 |
| Loading module at 80008000 with entry 80008000. filesize: 0x160 memsize: 0x160 |
| Processing 10 relocs. Offset value of 0x80008000 |
| SMM Module: placing jmp sequence at 80007c00 rel16 0x03fd |
| SMM Module: placing jmp sequence at 80007800 rel16 0x07fd |
| SMM Module: placing jmp sequence at 80007400 rel16 0x0bfd |
| SMM Module: stub loaded at 80008000. Will call 8001010a(00000000) |
| Initializing southbridge SMI... ... pmbase = 0x0500 |
| |
| SMI_STS: TCO PM1 |
| PM1_STS: WAK PWRBTN TMROF |
| GPE0_STS: GPIO15 GPIO14 GPIO13 GPIO11 GPIO10 GPIO9 GPIO8 GPIO7 GPIO6 GPIO4 GPIO3 GPIO2 GPIO1 |
| ALT_GP_SMI_STS: GPI15 GPI14 GPI13 GPI11 GPI10 GPI9 GPI8 GPI7 GPI6 GPI4 GPI3 GPI2 GPI1 |
| TCO_STS: INTRD_DET TIMEOUT |
| In relocation handler: cpu 0 |
| New SMBASE=0x80000000 IEDBASE=0x80400000 @ 0003fc00 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| ... raise SMI# |
| Relocation complete. |
| Locking SMM. |
| Initializing CPU #0 |
| CPU: vendor Intel device 206a7 |
| CPU: family 06, model 2a, stepping 07 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [7a0100:7fffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 13300 size 5800 |
| microcode: sig=0x206a7 pf=0x10 revision=0x29 |
| CPU: Intel(R) Core(TM) i5-2410M CPU @ 2.30GHz. |
| MTRR: Physical address space: |
| 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 |
| 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 |
| 0x00000000000c0000 - 0x0000000080000000 size 0x7ff40000 type 6 |
| 0x0000000080000000 - 0x00000000d0000000 size 0x50000000 type 0 |
| 0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1 |
| 0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0 |
| 0x0000000100000000 - 0x000000017b600000 size 0x7b600000 type 6 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| MTRR: default type WB/UC MTRR counts: 4/3. |
| MTRR: UC selected as default type. |
| MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6 |
| MTRR: 1 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1 |
| MTRR: 2 base 0x0000000100000000 mask 0x0000000f00000000 type 6 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x00 done. |
| VMX status: enabled, locked |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2300 |
| Turbo is available but hidden |
| Turbo has been enabled |
| CPU: 0 has 2 cores, 2 threads per core |
| CPU: 0 has core 1 |
| CPU1: stack_base 7ffcc000, stack_end 7ffccff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 1. |
| After apic_write. |
| In relocation handler: cpu 1 |
| New SMBASE=0x7ffffc00 IEDBASE=0x80400000 @ 0003fc00 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 1. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #1 |
| CPU: 0 has core 2 |
| CPU: vendor Intel device 206a7 |
| CPU: family 06, model 2a, stepping 07 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [7a0100:7fffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 13300 size 5800 |
| microcode: sig=0x206a7 pf=0x10 revision=0x29 |
| CPU: Intel(R) Core(TM) i5-2410M CPU @ 2.30GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x01 done. |
| VMX status: enabled, locked |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2300 |
| CPU #1 initialized |
| CPU2: stack_base 7ffcb000, stack_end 7ffcbff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 2. |
| After apic_write. |
| In relocation handler: cpu 2 |
| Startup point 1. |
| Waiting for send to finish... |
| +New SMBASE=0x7ffff800 IEDBASE=0x80400000 @ 0003fc00 |
| Sending STARTUP #2 to 2. |
| After apic_write. |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU: 0 has core 3 |
| Initializing CPU #2 |
| CPU: vendor Intel device 206a7 |
| CPU: family 06, model 2a, stepping 07 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [7a0100:7fffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 13300 size 5800 |
| microcode: sig=0x206a7 pf=0x10 revision=0x0 |
| microcode: updated to revision 0x29 date=2013-06-12 |
| CPU: Intel(R) Core(TM) i5-2410M CPU @ 2.30GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x02 done. |
| VMX status: enabled, locked |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2300 |
| CPU #2 initialized |
| CPU3: stack_base 7ffca000, stack_end 7ffcaff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 3. |
| After apic_write. |
| In relocation handler: cpu 3 |
| New SMBASE=0x7ffff400 IEDBASE=0x80400000 @ 0003fc00 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 3. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU #0 initialized |
| Waiting for 1 CPUS to stop |
| Initializing CPU #3 |
| CPU: vendor Intel device 206a7 |
| CPU: family 06, model 2a, stepping 07 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [7a0100:7fffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 13300 size 5800 |
| microcode: sig=0x206a7 pf=0x10 revision=0x29 |
| CPU: Intel(R) Core(TM) i5-2410M CPU @ 2.30GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x03 done. |
| VMX status: enabled, locked |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2300 |
| CPU #3 initialized |
| All AP CPUs stopped (738 loops) |
| CPU0: stack: 7ffcd000 - 7ffce000, lowest used address 7ffcdaa0, stack used: 1376 bytes |
| CPU1: stack: 7ffcc000 - 7ffcd000, lowest used address 7ffccc54, stack used: 940 bytes |
| CPU2: stack: 7ffcb000 - 7ffcc000, lowest used address 7ffcbc54, stack used: 940 bytes |
| CPU3: stack: 7ffca000 - 7ffcb000, lowest used address 7ffcac54, stack used: 940 bytes |
| CPU_CLUSTER: 0 init finished in 89725 usecs |
| PCI: 00:00.0 init ... |
| Disabling PEG12. |
| Disabling PEG11. |
| Disabling PEG10. |
| Disabling PEG60. |
| Disabling PEG IO clock. |
| Set BIOS_RESET_CPL |
| CPU TDP: 35 Watts |
| PCI: 00:00.0 init finished in 1024 usecs |
| PCI: 00:02.0 init ... |
| GT Power Management Init |
| SNB GT2 Power Meter Weights |
| GT Power Management Init (post VBIOS) |
| Initializing VGA without OPROM. |
| EDID: |
| 00 ff ff ff ff ff ff 00 09 e5 a0 08 00 00 00 00 |
| 00 14 01 04 95 1a 10 78 2a 92 75 90 59 5a 90 26 |
| 1d 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 |
| 01 01 01 01 01 01 12 1b 00 8a 50 20 0e 30 1a 16 |
| 22 00 05 a3 10 00 00 19 0c 12 00 8a 50 20 0e 30 |
| 1a 16 22 00 05 a3 10 00 00 19 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 |
| 00 19 3d e5 1a 3c 78 19 14 22 7d 00 00 00 00 4d |
| Extracted contents: |
| header: 00 ff ff ff ff ff ff 00 |
| serial number: 09 e5 a0 08 00 00 00 00 00 14 |
| version: 01 04 |
| basic params: 95 1a 10 78 2a |
| chroma info: 92 75 90 59 5a 90 26 1d 50 54 |
| established: 00 00 00 |
| standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 |
| descriptor 1: 12 1b 00 8a 50 20 0e 30 1a 16 22 00 05 a3 10 00 00 19 |
| descriptor 2: 0c 12 00 8a 50 20 0e 30 1a 16 22 00 05 a3 10 00 00 19 |
| descriptor 3: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
| descriptor 4: 00 00 00 02 00 19 3d e5 1a 3c 78 19 14 22 7d 00 00 00 |
| extensions: 00 |
| checksum: 4d |
| |
| Manufacturer: BOE Model 8a0 Serial Number 0 |
| Made week 0 of 2010 |
| EDID version: 1.4 |
| Digital display |
| 6 bits per primary color channel |
| DisplayPort interface |
| Maximum image size: 26 cm x 16 cm |
| Gamma: 220% |
| Check DPMS levels |
| DPMS levels: Off |
| Supported color formats: RGB 4:4:4, YCrCb 4:2:2 |
| First detailed timing is preferred timing |
| Established timings supported: |
| Standard timings supported: |
| Detailed timings |
| Hex of detail: 121b008a50200e301a16220005a310000019 |
| Detailed mode (IN HEX): Clock 69300 KHz, 105 mm x a3 mm |
| 0500 051a 0530 058a hborder 0 |
| 0320 0322 0324 032e vborder 0 |
| -hsync -vsync |
| Did detailed timing |
| Hex of detail: 0c12008a50200e301a16220005a310000019 |
| Detailed mode (IN HEX): Clock 46200 KHz, 105 mm x a3 mm |
| 0500 051a 0530 058a hborder 0 |
| 0320 0322 0324 032e vborder 0 |
| -hsync -vsync |
| Hex of detail: 000000000000000000000000000000000000 |
| Manufacturer-specified data, tag 0 |
| Hex of detail: 0000000200193de51a3c781914227d000000 |
| Manufacturer-specified data, tag 2 |
| Checksum |
| Checksum: 0x4d (valid) |
| bringing up panel at resolution 1280 x 800 |
| Borders 0 x 0 |
| Blank 138 x 14 |
| Sync 22 x 2 |
| Front porch 26 x 2 |
| Spread spectrum clock |
| Single channel |
| Polarities 1, 1 |
| Data M1=1211105, N1=8388608 |
| Link frequency 270000 kHz |
| Link M1=134567, N1=524288 |
| Pixel N=6, M1=18, M2=7, P1=2 |
| Pixel clock 138571 kHz |
| waiting for panel powerup |
| panel powered up |
| PCI: 00:02.0 init finished in 27388 usecs |
| PCI: 00:04.0 init ... |
| PCI: 00:04.0 init finished in 1 usecs |
| PCI: 00:16.0 init ... |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : YES |
| ME: Manufacturing Mode : NO |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Normal |
| ME: Current Operation State : M0 with UMA |
| ME: Current Operation Mode : Normal |
| ME: Error Code : No Error |
| ME: Progress Phase : Host Communication |
| ME: Power Management Event : Clean Moff->Mx wake |
| ME: Progress Phase State : Host communication established |
| ME: BIOS path: Normal |
| ME: Extend SHA-256: 84df47384ae9fd5d79658a32495fe790b8980d0425223795290fcc2ce0afe3a0 |
| ME: Firmware Version 7.1.1053.3 (code) 7.1.1053.3 (recovery) |
| ME Capability: Full Network manageability : disabled |
| ME Capability: Regular Network manageability : disabled |
| ME Capability: Manageability : disabled |
| ME Capability: Small business technology : disabled |
| ME Capability: Level III manageability : disabled |
| ME Capability: IntelR Anti-Theft (AT) : enabled |
| ME Capability: IntelR Capability Licensing Service (CLS) : enabled |
| ME Capability: IntelR Power Sharing Technology (MPC) : disabled |
| ME Capability: ICC Over Clocking : enabled |
| ME Capability: Protected Audio Video Path (PAVP) : enabled |
| ME Capability: IPV6 : disabled |
| ME Capability: KVM Remote Control (KVM) : disabled |
| ME Capability: Outbreak Containment Heuristic (OCH) : disabled |
| ME Capability: Virtual LAN (VLAN) : enabled |
| ME Capability: TLS : enabled |
| ME Capability: Wireless LAN (WLAN) : enabled |
| PCI: 00:16.0 init finished in 987 usecs |
| PCI: 00:19.0 init ... |
| PCI: 00:19.0 init finished in 0 usecs |
| PCI: 00:1a.0 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1a.0 init finished in 14 usecs |
| PCI: 00:1b.0 init ... |
| Azalia: base = e1928000 |
| Azalia: codec_mask = 0b |
| Azalia: Initializing codec #3 |
| Azalia: codec viddid: 80862805 |
| Azalia: verb_size: 16 |
| Azalia: verb loaded. |
| Azalia: Initializing codec #1 |
| Azalia: codec viddid: 11c11040 |
| Azalia: verb_size: 4 |
| Azalia: verb loaded. |
| Azalia: Initializing codec #0 |
| Azalia: codec viddid: 111d7605 |
| Azalia: verb_size: 44 |
| Azalia: verb loaded. |
| PCI: 00:1b.0 init finished in 4808 usecs |
| PCI: 00:1c.0 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.0 init finished in 9 usecs |
| PCI: 00:1c.1 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.1 init finished in 9 usecs |
| PCI: 00:1c.2 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.2 init finished in 11 usecs |
| PCI: 00:1c.3 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.3 init finished in 9 usecs |
| PCI: 00:1d.0 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1d.0 init finished in 14 usecs |
| PCI: 00:1f.0 init ... |
| pch: lpc_init |
| IOAPIC: Initializing IOAPIC at 0xfec00000 |
| IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| IOAPIC: ID = 0x02 |
| IOAPIC: Dumping registers |
| reg 0x0000: 0x02000000 |
| reg 0x0001: 0x00170020 |
| reg 0x0002: 0x00170020 |
| Set power off after power failure. |
| NMI sources disabled. |
| CougarPoint PM init |
| rtc_failed = 0x0 |
| RTC Init |
| Enabling BIOS updates outside of SMM... Disabling ACPI via APMC: |
| done. |
| pch_spi_init |
| PCI: 00:1f.0 init finished in 259 usecs |
| PCI: 00:1f.2 init ... |
| SATA: Initializing... |
| SATA: Controller in AHCI mode. |
| ABAR: e192d000 |
| PCI: 00:1f.2 init finished in 75 usecs |
| PCI: 03:00.0 init ... |
| PCI: 03:00.0 init finished in 0 usecs |
| PCI: 03:00.1 init ... |
| PCI: 03:00.1 init finished in 0 usecs |
| PCI: 03:00.2 init ... |
| PCI: 03:00.2 init finished in 0 usecs |
| PCI: 03:00.3 init ... |
| PCI: 03:00.3 init finished in 0 usecs |
| PCI: 03:00.4 init ... |
| PCI: 03:00.4 init finished in 0 usecs |
| PCI: 04:00.0 init ... |
| PCI: 04:00.0 init finished in 0 usecs |
| Devices initialized |
| Show all devs... After init. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 1 |
| PCI: 00:1c.4: enabled 0 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 0 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:04.0: enabled 1 |
| PCI: 03:00.0: enabled 1 |
| PCI: 03:00.1: enabled 1 |
| PCI: 03:00.2: enabled 1 |
| PCI: 03:00.3: enabled 1 |
| PCI: 03:00.4: enabled 1 |
| Unknown device path type: 0 |
| : enabled 1 |
| PCI: 04:00.0: enabled 1 |
| APIC: 01: enabled 1 |
| APIC: 02: enabled 1 |
| APIC: 03: enabled 1 |
| BS: BS_DEV_INIT times (us): entry 6 run 124414 exit 0 |
| Finalize devices... |
| PCI: 00:1f.0 final |
| Devices finalized |
| BS: BS_POST_DEVICE times (us): entry 0 run 3 exit 0 |
| BS: BS_OS_RESUME_CHECK times (us): entry 0 run 0 exit 0 |
| Updating MRC cache data. |
| CBFS: 'Master Header Locator' located CBFS at [7a0100:7fffc0) |
| CBFS: Locating 'mrc.cache' |
| CBFS: Found @ offset 1fec0 size 10000 |
| find_current_mrc_cache_local: No valid MRC cache found. |
| Manufacturer: c2 |
| SF: Detected MX25L6405D with sector size 0x1000, total 0x800000 |
| Need to erase the MRC cache region of 65536 bytes at fffc0000 |
| SF: Successfully erased 65536 bytes @ 0x7c0000 |
| Finally: write MRC cache update to flash at fffc0000 |
| Successfully wrote MRC cache |
| CBFS: 'Master Header Locator' located CBFS at [7a0100:7fffc0) |
| CBFS: Locating 'fallback/dsdt.aml' |
| CBFS: Found @ offset 45040 size 27cf |
| CBFS: 'Master Header Locator' located CBFS at [7a0100:7fffc0) |
| CBFS: Locating 'fallback/slic' |
| CBFS: 'fallback/slic' not found. |
| ACPI: Writing ACPI tables at 7ff30000. |
| ACPI: * FACS |
| ACPI: * DSDT |
| ACPI: * IGD OpRegion |
| GET_VBIOS: aa55 8086 0 0 3 |
| ... VBIOS found at 000c0000 |
| ACPI: * FADT |
| ACPI: added table 1/32, length now 40 |
| ACPI: * SSDT |
| Found 1 CPU(s) with 4 core(s) each. |
| PSS: 2301MHz power 35000 control 0x1d00 status 0x1d00 |
| PSS: 2300MHz power 35000 control 0x1700 status 0x1700 |
| PSS: 2000MHz power 29380 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 25809 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 22403 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 19152 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 16010 control 0xc00 status 0xc00 |
| PSS: 1000MHz power 13017 control 0xa00 status 0xa00 |
| PSS: 800MHz power 10153 control 0x800 status 0x800 |
| PSS: 2301MHz power 35000 control 0x1d00 status 0x1d00 |
| PSS: 2300MHz power 35000 control 0x1700 status 0x1700 |
| PSS: 2000MHz power 29380 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 25809 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 22403 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 19152 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 16010 control 0xc00 status 0xc00 |
| PSS: 1000MHz power 13017 control 0xa00 status 0xa00 |
| PSS: 800MHz power 10153 control 0x800 status 0x800 |
| PSS: 2301MHz power 35000 control 0x1d00 status 0x1d00 |
| PSS: 2300MHz power 35000 control 0x1700 status 0x1700 |
| PSS: 2000MHz power 29380 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 25809 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 22403 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 19152 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 16010 control 0xc00 status 0xc00 |
| PSS: 1000MHz power 13017 control 0xa00 status 0xa00 |
| PSS: 800MHz power 10153 control 0x800 status 0x800 |
| PSS: 2301MHz power 35000 control 0x1d00 status 0x1d00 |
| PSS: 2300MHz power 35000 control 0x1700 status 0x1700 |
| PSS: 2000MHz power 29380 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 25809 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 22403 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 19152 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 16010 control 0xc00 status 0xc00 |
| PSS: 1000MHz power 13017 control 0xa00 status 0xa00 |
| PSS: 800MHz power 10153 control 0x800 status 0x800 |
| ACPI: added table 2/32, length now 44 |
| ACPI: * MCFG |
| ACPI: added table 3/32, length now 48 |
| ACPI: * TCPA |
| TCPA log created at 7ff1d000 |
| ACPI: added table 4/32, length now 52 |
| ACPI: * MADT |
| ACPI: added table 5/32, length now 56 |
| current = 7ff34350 |
| ACPI: * HPET |
| ACPI: added table 6/32, length now 60 |
| ACPI: done. |
| ACPI tables: 17296 bytes. |
| smbios_write_tables: 7ff1c000 |
| Create SMBIOS type 17 |
| Root Device (HP HP EliteBook 2760p) |
| CPU_CLUSTER: 0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| APIC: 00 (unknown) |
| APIC: acac (Intel SandyBridge/IvyBridge CPU) |
| DOMAIN: 0000 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:16.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:19.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1a.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1b.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.4 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.7 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1d.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1e.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:00.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:01.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:02.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:04.0 (unknown) |
| PCI: 03:00.0 (unknown) |
| PCI: 03:00.1 (unknown) |
| PCI: 03:00.2 (unknown) |
| PCI: 03:00.3 (unknown) |
| PCI: 03:00.4 (unknown) |
| Unknown device path type: 0 |
| (unknown) |
| PCI: 04:00.0 (unknown) |
| APIC: 01 (unknown) |
| APIC: 02 (unknown) |
| APIC: 03 (unknown) |
| SMBIOS tables: 459 bytes. |
| Writing table forward entry at 0x00000500 |
| Wrote coreboot table at: 00000500, 0x10 bytes, checksum 3fe9 |
| Writing coreboot table at 0x7ff54000 |
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1. 0000000000001000-000000000009ffff: RAM |
| 2. 00000000000a0000-00000000000fffff: RESERVED |
| 3. 0000000000100000-000000001fffffff: RAM |
| 4. 0000000020000000-00000000201fffff: RESERVED |
| 5. 0000000020200000-000000003fffffff: RAM |
| 6. 0000000040000000-00000000401fffff: RESERVED |
| 7. 0000000040200000-000000007ff1bfff: RAM |
| 8. 000000007ff1c000-000000007fffffff: CONFIGURATION TABLES |
| 9. 0000000080000000-00000000829fffff: RESERVED |
| 10. 00000000f0000000-00000000f3ffffff: RESERVED |
| 11. 0000000100000000-000000017b5fffff: RAM |
| CBFS: 'Master Header Locator' located CBFS at [7a0100:7fffc0) |
| FMAP: Found "FLASH" version 1.1 at 7a0000. |
| FMAP: base = ff800000 size = 800000 #areas = 3 |
| Wrote coreboot table at: 7ff54000, 0x3d4 bytes, checksum 8684 |
| coreboot table: 1004 bytes. |
| IMD ROOT 0. 7ffff000 00001000 |
| IMD SMALL 1. 7fffe000 00001000 |
| CONSOLE 2. 7ffde000 00020000 |
| TIME STAMP 3. 7ffdd000 00000400 |
| MRC DATA 4. 7ffdc000 000005b0 |
| ROMSTG STCK 5. 7ffd7000 00005000 |
| RAMSTAGE 6. 7ff99000 0003e000 |
| 57a9e100 7. 7ff5c000 0003ca70 |
| COREBOOT 8. 7ff54000 00008000 |
| ACPI 9. 7ff30000 00024000 |
| ACPI GNVS 10. 7ff2f000 00001000 |
| 4f444749 11. 7ff2d000 00002000 |
| TCPA LOG 12. 7ff1d000 00010000 |
| SMBIOS 13. 7ff1c000 00000800 |
| IMD small region: |
| IMD ROOT 0. 7fffec00 00000400 |
| CAR GLOBALS 1. 7fffea40 000001c0 |
| USBDEBUG 2. 7fffe9e0 00000058 |
| MEM INFO 3. 7fffe880 00000141 |
| ROMSTAGE 4. 7fffe860 00000004 |
| 57a9e000 5. 7fffe840 00000010 |
| BS: BS_WRITE_TABLES times (us): entry 574540 run 2718 exit 0 |
| CBFS: 'Master Header Locator' located CBFS at [7a0100:7fffc0) |
| CBFS: Locating 'fallback/payload' |
| CBFS: Found @ offset 47880 size 109b9 |
| Loading segment from ROM address 0xfffe79b8 |
| code (compression=1) |
| New segment dstaddr 0xdf8e0 memsize 0x20720 srcaddr 0xfffe79f0 filesize 0x10981 |
| Loading segment from ROM address 0xfffe79d4 |
| Entry Point 0x000ff06e |
| Payload being loaded at below 1MiB without region being marked as RAM usable. |
| Loading Segment: addr: 0x00000000000df8e0 memsz: 0x0000000000020720 filesz: 0x0000000000010981 |
| lb: [0x000000007ff9a000, 0x000000007ffd6a70) |
| Post relocation: addr: 0x00000000000df8e0 memsz: 0x0000000000020720 filesz: 0x0000000000010981 |
| using LZMA |
| [ 0x000df8e0, 00100000, 0x00100000) <- fffe79f0 |
| dest 000df8e0, end 00100000, bouncebuffer ffffffff |
| Loaded segments |
| BS: BS_PAYLOAD_LOAD times (us): entry 0 run 36310 exit 0 |
| PCH watchdog disabled |
| Jumping to boot code at 000ff06e(7ff54000) |
| CPU0: stack: 7ffcd000 - 7ffce000, lowest used address 7ffcda20, stack used: 1504 bytes |
| SeaBIOS (version rel-1.10.1-0-g8891697) |
| BUILD: gcc: (coreboot toolchain v1.44 October 29th, 2016) 6.3.0 binutils: (GNU Binutils) 2.27 |
| Found coreboot cbmem console @ 7ffde000 |
| Found mainboard HP HP EliteBook 2760p |
| malloc preinit |
| Add to e820 map: 000a0000 00050000 -1 |
| Add to e820 map: 000f0000 00010000 2 |
| Add to e820 map: 7fedc000 00040000 2 |
| phys_alloc zone=0x000ed970 size=51712 align=20 ret=7fecf500 (detail=0x7fecf4d0) |
| Relocating init from 0x000e1060 to 0x7fecf500 (size 51712) |
| malloc init |
| Found CBFS header at 0xfffa0138 |
| phys_alloc zone=0x7fedbe10 size=156 align=10 ret=7fecf3d0 (detail=0x7fecf3a0) |
| Add romfile: cbfs master header (size=32) |
| phys_alloc zone=0x7fedbe10 size=156 align=10 ret=7fecf300 (detail=0x7fecf2d0) |
| Add romfile: fallback/romstage (size=78308) |
| phys_alloc zone=0x7fedbe10 size=156 align=10 ret=7fecf230 (detail=0x7fecf200) |
| Add romfile: cpu_microcode_blob.bin (size=22528) |
| phys_alloc zone=0x7fedbe10 size=156 align=10 ret=7fecf160 (detail=0x7fecf130) |
| Add romfile: vgaroms/seavgabios.bin (size=27136) |
| phys_alloc zone=0x7fedbe10 size=156 align=10 ret=7fecf090 (detail=0x7fecf060) |
| Add romfile: config (size=342) |
| phys_alloc zone=0x7fedbe10 size=156 align=10 ret=7fecefc0 (detail=0x7fecef90) |
| Add romfile: revision (size=575) |
| phys_alloc zone=0x7fedbe10 size=156 align=10 ret=7feceef0 (detail=0x7feceec0) |
| Add romfile: payload_revision (size=237) |
| phys_alloc zone=0x7fedbe10 size=156 align=10 ret=7fecee20 (detail=0x7fecedf0) |
| Add romfile: (size=792) |
| phys_alloc zone=0x7fedbe10 size=156 align=10 ret=7feced50 (detail=0x7feced20) |
| Add romfile: mrc.cache (size=65536) |
| phys_alloc zone=0x7fedbe10 size=156 align=10 ret=7fecec80 (detail=0x7fecec50) |
| Add romfile: fallback/ramstage (size=86230) |
| phys_alloc zone=0x7fedbe10 size=156 align=10 ret=7fecebb0 (detail=0x7feceb80) |
| Add romfile: fallback/dsdt.aml (size=10191) |
| phys_alloc zone=0x7fedbe10 size=156 align=10 ret=7feceae0 (detail=0x7feceab0) |
| Add romfile: fallback/payload (size=68025) |
| phys_alloc zone=0x7fedbe10 size=156 align=10 ret=7fecea10 (detail=0x7fece9e0) |
| Add romfile: payload_config (size=1632) |
| phys_alloc zone=0x7fedbe10 size=156 align=10 ret=7fece940 (detail=0x7fece910) |
| Add romfile: (size=26008) |
| phys_alloc zone=0x7fedbe10 size=156 align=10 ret=7fece870 (detail=0x7fece840) |
| Add romfile: bootblock (size=4016) |
| multiboot: eax=7ffc59a0, ebx=7ffc5954 |
| init ivt |
| init bda |
| Add to e820 map: 0009fc00 00000400 2 |
| init bios32 |
| init PMM |
| init PNPBIOS table |
| init keyboard |
| init mouse |
| init pic |
| math cp init |
| PCI probe |
| phys_alloc zone=0x7fedbe10 size=32 align=10 ret=7fece820 (detail=0x7fece7f0) |
| PCI device 00:00.0 (vd=8086:0104 c=0600) |
| phys_alloc zone=0x7fedbe10 size=32 align=10 ret=7fece7d0 (detail=0x7fece7a0) |
| PCI device 00:02.0 (vd=8086:0116 c=0300) |
| phys_alloc zone=0x7fedbe10 size=32 align=10 ret=7fece780 (detail=0x7fece750) |
| PCI device 00:04.0 (vd=8086:0103 c=1180) |
| phys_alloc zone=0x7fedbe10 size=32 align=10 ret=7fece730 (detail=0x7fece700) |
| PCI device 00:16.0 (vd=8086:1c3a c=0780) |
| phys_alloc zone=0x7fedbe10 size=32 align=10 ret=7fece6e0 (detail=0x7fece6b0) |
| PCI device 00:19.0 (vd=8086:1502 c=0200) |
| phys_alloc zone=0x7fedbe10 size=32 align=10 ret=7fece690 (detail=0x7fece660) |
| PCI device 00:1a.0 (vd=8086:1c2d c=0c03) |
| phys_alloc zone=0x7fedbe10 size=32 align=10 ret=7fece640 (detail=0x7fece610) |
| PCI device 00:1b.0 (vd=8086:1c20 c=0403) |
| phys_alloc zone=0x7fedbe10 size=32 align=10 ret=7fece5f0 (detail=0x7fece5c0) |
| PCI device 00:1c.0 (vd=8086:1c10 c=0604) |
| phys_alloc zone=0x7fedbe10 size=32 align=10 ret=7fece5a0 (detail=0x7fece570) |
| PCI device 00:1c.1 (vd=8086:1c12 c=0604) |
| phys_alloc zone=0x7fedbe10 size=32 align=10 ret=7fece550 (detail=0x7fece520) |
| PCI device 00:1c.2 (vd=8086:1c14 c=0604) |
| phys_alloc zone=0x7fedbe10 size=32 align=10 ret=7fece500 (detail=0x7fece4d0) |
| PCI device 00:1c.3 (vd=8086:1c16 c=0604) |
| phys_alloc zone=0x7fedbe10 size=32 align=10 ret=7fece4b0 (detail=0x7fece480) |
| PCI device 00:1d.0 (vd=8086:1c26 c=0c03) |
| phys_alloc zone=0x7fedbe10 size=32 align=10 ret=7fece460 (detail=0x7fece430) |
| PCI device 00:1f.0 (vd=8086:1c4f c=0601) |
| phys_alloc zone=0x7fedbe10 size=32 align=10 ret=7fece410 (detail=0x7fece3e0) |
| PCI device 00:1f.2 (vd=8086:1c03 c=0106) |
| phys_alloc zone=0x7fedbe10 size=32 align=10 ret=7fece3c0 (detail=0x7fece390) |
| PCI device 03:00.0 (vd=197b:2380 c=0c00) |
| phys_alloc zone=0x7fedbe10 size=32 align=10 ret=7fece370 (detail=0x7fece340) |
| PCI device 03:00.1 (vd=197b:2392 c=0880) |
| phys_alloc zone=0x7fedbe10 size=32 align=10 ret=7fece320 (detail=0x7fece2f0) |
| PCI device 03:00.2 (vd=197b:2391 c=0805) |
| phys_alloc zone=0x7fedbe10 size=32 align=10 ret=7fece2d0 (detail=0x7fece2a0) |
| PCI device 03:00.3 (vd=197b:2393 c=0880) |
| phys_alloc zone=0x7fedbe10 size=32 align=10 ret=7fece280 (detail=0x7fece250) |
| PCI device 03:00.4 (vd=197b:2394 c=0880) |
| phys_alloc zone=0x7fedbe10 size=32 align=10 ret=7fece230 (detail=0x7fece200) |
| PCI device 04:00.0 (vd=168c:0030 c=0280) |
| Found 20 PCI devices (max PCI bus is 04) |
| Relocating coreboot bios tables |
| phys_alloc zone=0x7fedbe18 size=31 align=10 ret=f64e0 (detail=0x7fece1d0) |
| Copying SMBIOS entry point from 0x7ff1c000 to 0x000f64e0 |
| phys_alloc zone=0x7fedbe18 size=36 align=10 ret=f64b0 (detail=0x7fece1a0) |
| Copying ACPI RSDP from 0x7ff30000 to 0x000f64b0 |
| rsdp=0x000f64b0 |
| rsdt=0x7ff30030 |
| fadt=0x7ff32a60 |
| pm_tmr_blk=508 |
| Using pmtimer, ioport 0x508 |
| init timer |
| WARNING - Timeout at tis_wait_sts:160! |
| Scan for VGA option rom |
| Attempting to init PCI bdf 00:02.0 (vd 8086:0116) |
| Attempting to map option rom on dev 00:02.0 |
| Option rom sizing returned 0 0 |
| Copying data 27136@0xfffb8cc8 to 27136@0x000c0000 |
| Checking rom 0x000c0000 (sig aa55 size 53) |
| Running option rom at c000:0003 |
| pmm call arg1=0 |
| pmm00: length=200 handle=ffffffff flags=9 |
| phys_alloc zone=0x7fedbe20 size=8192 align=10 ret=eb1c0 (detail=0x7fece170) |
| Turning on vga text mode console |
| SeaBIOS (version rel-1.10.1-0-g8891697) |
| init usb |
| phys_alloc zone=0x7fedbe10 size=32 align=10 ret=7fece150 (detail=0x7fece120) |
| EHCI init on dev 00:1a.0 (regs=0xe192e020) |
| phys_alloc zone=0x7fedbe10 size=4096 align=1000 ret=7fecd000 (detail=0x7fece0f0) |
| /7fecd000\ Start thread |
| |7fecd000| phys_alloc zone=0x7fedbe1c size=4096 align=1000 ret=7ff1b000 (detail=0x7fece0c0) |
| |7fecd000| phys_alloc zone=0x7fedbe1c size=68 align=80 ret=7ff1af80 (detail=0x7fece090) |
| |7fecd000| phys_alloc zone=0x7fedbe1c size=68 align=80 ret=7ff1af00 (detail=0x7fece060) |
| phys_alloc zone=0x7fedbe10 size=32 align=10 ret=7fece040 (detail=0x7fece010) |
| EHCI init on dev 00:1d.0 (regs=0xe192f020) |
| phys_alloc zone=0x7fedbe10 size=4096 align=1000 ret=7fecc000 (detail=0x7fecbfd0) |
| /7fecc000\ Start thread |
| |7fecc000| phys_alloc zone=0x7fedbe1c size=4096 align=1000 ret=7ff19000 (detail=0x7fecbfa0) |
| |7fecc000| phys_alloc zone=0x7fedbe1c size=68 align=80 ret=7ff1ae80 (detail=0x7fecbf70) |
| |7fecc000| phys_alloc zone=0x7fedbe1c size=68 align=80 ret=7ff1ae00 (detail=0x7fecbf40) |
| init ps2port |
| phys_alloc zone=0x7fedbe10 size=4096 align=1000 ret=7feca000 (detail=0x7fecbf10) |
| /7feca000\ Start thread |
| |7feca000| i8042_flush |
| |7feca000| i8042 flushed ff (status=ff) |
| |7feca000| i8042 flushed ff (status=ff) |
| |7feca000| i8042 flushed ff (status=ff) |
| |7feca000| i8042 flushed ff (status=ff) |
| |7feca000| i8042 flushed ff (status=ff) |
| |7feca000| i8042 flushed ff (status=ff) |
| |7feca000| i8042 flushed ff (status=ff) |
| |7feca000| i8042 flushed ff (status=ff) |
| |7feca000| i8042 flushed ff (status=ff) |
| |7feca000| i8042 flushed ff (status=ff) |
| |7feca000| i8042 flushed ff (status=ff) |
| |7feca000| i8042 flushed ff (status=ff) |
| |7feca000| i8042 flushed ff (status=ff) |
| |7feca000| i8042 flushed ff (status=ff) |
| |7feca000| i8042 flushed ff (status=ff) |
| |7feca000| i8042 flushed ff (status=ff) |
| |7feca000| WARNING - Timeout at i8042_flush:71! |
| \7feca000/ End thread |
| phys_free 7feca000 (detail=0x7fecbf10) |
| init floppy drives |
| init hard drives |
| init ahci |
| phys_alloc zone=0x7fedbe20 size=2048 align=10 ret=ea9c0 (detail=0x7fecbf10) |
| phys_alloc zone=0x7fedbe18 size=20 align=10 ret=f6490 (detail=0x7fecbee0) |
| AHCI controller at 00:1f.2, iobase 0xe192d000, irq 10 |
| AHCI: cap 0xff30ff05, ports_impl 0x21 |
| phys_alloc zone=0x7fedbe10 size=68 align=10 ret=7fecbe90 (detail=0x7fecbe60) |
| phys_alloc zone=0x7fedbe10 size=1024 align=400 ret=7fecb800 (detail=0x7fecbe30) |
| phys_alloc zone=0x7fedbe10 size=256 align=100 ret=7fecbd00 (detail=0x7fecbe00) |
| phys_alloc zone=0x7fedbe10 size=256 align=100 ret=7fecbc00 (detail=0x7fecb7d0) |
| phys_alloc zone=0x7fedbe10 size=4096 align=1000 ret=7feca000 (detail=0x7fecb7a0) |
| /7feca000\ Start thread |
| |7feca000| AHCI/0: probing |
| phys_alloc zone=0x7fedbe10 size=68 align=10 ret=7fecb750 (detail=0x7fecb720) |
| phys_alloc zone=0x7fedbe10 size=1024 align=400 ret=7fecb000 (detail=0x7fecb6f0) |
| phys_alloc zone=0x7fedbe10 size=256 align=100 ret=7fecb500 (detail=0x7fecb6c0) |
| phys_alloc zone=0x7fedbe10 size=256 align=100 ret=7fecb400 (detail=0x7fecb690) |
| phys_alloc zone=0x7fedbe10 size=4096 align=1000 ret=7fec9000 (detail=0x7fecb660) |
| /7fec9000\ Start thread |
| |7fec9000| AHCI/5: probing |
| |7feca000| AHCI/0: link up |
| phys_alloc zone=0x7fedbe10 size=4096 align=1000 ret=7fec8000 (detail=0x7fecb630) |
| /7fec8000\ Start thread |
| |7fec8000| Searching bootorder for: /pci@i0cf8/pci-bridge@1c,2/*@0,2 |
| \7fec8000/ End thread |
| phys_free 7fec8000 (detail=0x7fecb630) |
| init megasas |
| init lpt |
| Found 0 lpt ports |
| init serial |
| Found 0 serial ports |
| |7feca000| AHCI/0: send cmd ... |
| |7feca000| AHCI/0: ... intbits 0x40000001, status 0x51 ... |
| |7feca000| AHCI/0: ... finished, status 0x51, ERROR 0x4 |
| |7feca000| AHCI/0: send cmd ... |
| |7fec9000| AHCI/5: link down |
| |7fec9000| phys_free 7fecb000 (detail=0x7fecb6f0) |
| |7fec9000| phys_free 7fecb500 (detail=0x7fecb6c0) |
| |7fec9000| phys_free 7fecb400 (detail=0x7fecb690) |
| |7fec9000| phys_free 7fecb750 (detail=0x7fecb720) |
| \7fec9000/ End thread |
| phys_free 7fec9000 (detail=0x7fecb660) |
| |7feca000| AHCI/0: ... intbits 0x2, status 0x58 ... |
| |7feca000| AHCI/0: ... finished, status 0x58, OK |
| |7feca000| phys_alloc zone=0x7fedbe10 size=80 align=10 ret=7fecb750 (detail=0x7fecb720) |
| |7feca000| Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0 |
| |7feca000| AHCI/0: supported modes: udma 6, multi-dma 2, pio 4 |
| |7feca000| AHCI/0: Set transfer mode to UDMA-6 |
| |7feca000| AHCI/0: send cmd ... |
| |7feca000| AHCI/0: ... intbits 0x1, status 0x50 ... |
| |7feca000| AHCI/0: ... finished, status 0x50, OK |
| |7feca000| phys_alloc zone=0x7fedbe18 size=68 align=10 ret=f6440 (detail=0x7fecb6f0) |
| |7feca000| phys_free 7fecbe90 (detail=0x7fecbe60) |
| |7feca000| phys_free 7fecb800 (detail=0x7fecbe30) |
| |7feca000| phys_free 7fecbd00 (detail=0x7fecbe00) |
| |7feca000| phys_free 7fecbc00 (detail=0x7fecb7d0) |
| |7feca000| phys_alloc zone=0x7fedbe1c size=1024 align=400 ret=7ff1a800 (detail=0x7fecbeb0) |
| |7feca000| phys_alloc zone=0x7fedbe1c size=256 align=100 ret=7ff1ad00 (detail=0x7fecbe80) |
| |7feca000| phys_alloc zone=0x7fedbe1c size=256 align=100 ret=7ff1ac00 (detail=0x7fecbe50) |
| |7feca000| AHCI/0: registering: "AHCI/0: INTEL SSDSC2BW240A3L ATA-9 Hard-Disk (223 GiBytes)" |
| |7feca000| phys_alloc zone=0x7fedbe10 size=24 align=10 ret=7fecbe30 (detail=0x7fecbe00) |
| |7feca000| Registering bootable: AHCI/0: INTEL SSDSC2BW240A3L ATA-9 Hard-Disk (223 GiBytes) (type:2 prio:103 data:f6440) |
| \7feca000/ End thread |
| phys_free 7feca000 (detail=0x7fecb7a0) |
| |7fecc000| phys_alloc zone=0x7fedbe10 size=28 align=10 ret=7fecbde0 (detail=0x7fecbdb0) |
| |7fecc000| phys_alloc zone=0x7fedbe10 size=4096 align=1000 ret=7feca000 (detail=0x7fecbd80) |
| /7feca000\ Start thread |
| |7fecd000| phys_alloc zone=0x7fedbe10 size=28 align=10 ret=7fecbd60 (detail=0x7fecbd30) |
| |7fecd000| phys_alloc zone=0x7fedbe10 size=4096 align=1000 ret=7fec9000 (detail=0x7fecbd00) |
| /7fec9000\ Start thread |
| |7fecc000| phys_alloc zone=0x7fedbe10 size=28 align=10 ret=7fecbce0 (detail=0x7fecbcb0) |
| |7fecc000| phys_alloc zone=0x7fedbe10 size=4096 align=1000 ret=7fec8000 (detail=0x7fecbc80) |
| /7fec8000\ Start thread |
| |7fecd000| phys_alloc zone=0x7fedbe10 size=28 align=10 ret=7fecbc60 (detail=0x7fecbc30) |
| |7fecd000| phys_alloc zone=0x7fedbe10 size=4096 align=1000 ret=7fec7000 (detail=0x7fecbc00) |
| /7fec7000\ Start thread |
| |7fecc000| phys_alloc zone=0x7fedbe10 size=28 align=10 ret=7fecbbe0 (detail=0x7fecbbb0) |
| |7fecc000| phys_alloc zone=0x7fedbe10 size=4096 align=1000 ret=7fec6000 (detail=0x7fecbb80) |
| /7fec6000\ Start thread |
| |7fecd000| phys_alloc zone=0x7fedbe10 size=28 align=10 ret=7fecbb60 (detail=0x7fecbb30) |
| |7fecd000| phys_alloc zone=0x7fedbe10 size=4096 align=1000 ret=7fec5000 (detail=0x7fecbb00) |
| /7fec5000\ Start thread |
| |7feca000| set_address 0x7fece040 |
| |7fec9000| set_address 0x7fece150 |
| |7feca000| ehci_alloc_async_pipe 0x7fece040 0 |
| |7feca000| phys_alloc zone=0x7fedbe10 size=92 align=80 ret=7fecba80 (detail=0x7fecba50) |
| |7feca000| ehci_send_pipe qh=0x7fecba80 dir=0 data=0x00000000 size=0 |
| |7fec9000| ehci_alloc_async_pipe 0x7fece150 0 |
| |7fec9000| phys_alloc zone=0x7fedbe10 size=92 align=80 ret=7fecb980 (detail=0x7fecba20) |
| |7fec9000| ehci_send_pipe qh=0x7fecb980 dir=0 data=0x00000000 size=0 |
| |7feca000| ehci_alloc_async_pipe 0x7fece040 0 |
| |7feca000| config_usb: 0x7fecbad0 |
| |7feca000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fecafb6 size=8 |
| |7feca000| device rev=0200 cls=09 sub=00 proto=01 size=64 |
| |7feca000| ehci_alloc_async_pipe 0x7fece040 0 |
| |7feca000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fecafc8 size=9 |
| |7fec9000| ehci_alloc_async_pipe 0x7fece150 0 |
| |7fec9000| config_usb: 0x7fecb9d0 |
| |7fec9000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec9fb6 size=8 |
| |7feca000| phys_alloc zone=0x7fedbe10 size=25 align=10 ret=7fecbae0 (detail=0x7fecb9f0) |
| |7feca000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fecbae0 size=25 |
| |7fec9000| device rev=0200 cls=09 sub=00 proto=01 size=64 |
| |7fec9000| ehci_alloc_async_pipe 0x7fece150 0 |
| |7fec9000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec9fc8 size=9 |
| |7feca000| ehci_send_pipe qh=0x7fecba80 dir=0 data=0x00000000 size=0 |
| |7fec9000| phys_alloc zone=0x7fedbe10 size=25 align=10 ret=7fecb960 (detail=0x7fecb930) |
| |7fec9000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fecb960 size=25 |
| |7feca000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fecafa7 size=7 |
| |7fec9000| ehci_send_pipe qh=0x7fecb980 dir=0 data=0x00000000 size=0 |
| |7feca000| ehci_send_pipe qh=0x7fecba80 dir=0 data=0x00000000 size=0 |
| |7fec9000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec9fa7 size=7 |
| |7feca000| ehci_send_pipe qh=0x7fecba80 dir=0 data=0x00000000 size=0 |
| |7fec9000| ehci_send_pipe qh=0x7fecb980 dir=0 data=0x00000000 size=0 |
| |7feca000| ehci_send_pipe qh=0x7fecba80 dir=0 data=0x00000000 size=0 |
| |7fec9000| ehci_send_pipe qh=0x7fecb980 dir=0 data=0x00000000 size=0 |
| |7feca000| ehci_send_pipe qh=0x7fecba80 dir=0 data=0x00000000 size=0 |
| |7fec9000| ehci_send_pipe qh=0x7fecb980 dir=0 data=0x00000000 size=0 |
| |7feca000| ehci_send_pipe qh=0x7fecba80 dir=0 data=0x00000000 size=0 |
| |7fec9000| ehci_send_pipe qh=0x7fecb980 dir=0 data=0x00000000 size=0 |
| |7feca000| ehci_send_pipe qh=0x7fecba80 dir=0 data=0x00000000 size=0 |
| |7fec9000| ehci_send_pipe qh=0x7fecb980 dir=0 data=0x00000000 size=0 |
| |7feca000| ehci_send_pipe qh=0x7fecba80 dir=0 data=0x00000000 size=0 |
| |7fec9000| ehci_send_pipe qh=0x7fecb980 dir=0 data=0x00000000 size=0 |
| |7feca000| ehci_send_pipe qh=0x7fecba80 dir=0 data=0x00000000 size=0 |
| |7fec8000| phys_free 7fecbce0 (detail=0x7fecbcb0) |
| \7fec8000/ End thread |
| phys_free 7fec8000 (detail=0x7fecbc80) |
| |7fec7000| phys_free 7fecbc60 (detail=0x7fecbc30) |
| \7fec7000/ End thread |
| phys_free 7fec7000 (detail=0x7fecbc00) |
| |7fec6000| phys_free 7fecbbe0 (detail=0x7fecbbb0) |
| \7fec6000/ End thread |
| phys_free 7fec6000 (detail=0x7fecbb80) |
| |7fec5000| phys_free 7fecbb60 (detail=0x7fecbb30) |
| \7fec5000/ End thread |
| phys_free 7fec5000 (detail=0x7fecbb00) |
| |7fec9000| phys_alloc zone=0x7fedbe10 size=28 align=10 ret=7fecbce0 (detail=0x7fecbcb0) |
| |7fec9000| phys_alloc zone=0x7fedbe10 size=4096 align=1000 ret=7fec8000 (detail=0x7fecbc80) |
| /7fec8000\ Start thread |
| |7fec8000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec8f70 size=4 |
| |7feca000| phys_alloc zone=0x7fedbe10 size=28 align=10 ret=7fecbc60 (detail=0x7fecbc30) |
| |7feca000| phys_alloc zone=0x7fedbe10 size=4096 align=1000 ret=7fec7000 (detail=0x7fecbc00) |
| /7fec7000\ Start thread |
| |7fec7000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec7f70 size=4 |
| |7fec9000| phys_alloc zone=0x7fedbe10 size=28 align=10 ret=7fecbbe0 (detail=0x7fecbbb0) |
| |7fec9000| phys_alloc zone=0x7fedbe10 size=4096 align=1000 ret=7fec6000 (detail=0x7fecbb80) |
| /7fec6000\ Start thread |
| |7fec8000| ehci_send_pipe qh=0x7fecb980 dir=0 data=0x00000000 size=0 |
| |7feca000| phys_alloc zone=0x7fedbe10 size=28 align=10 ret=7fecbb60 (detail=0x7fecbb30) |
| |7feca000| phys_alloc zone=0x7fedbe10 size=4096 align=1000 ret=7fec5000 (detail=0x7fecbb00) |
| /7fec5000\ Start thread |
| |7fec9000| phys_alloc zone=0x7fedbe10 size=28 align=10 ret=7fecb910 (detail=0x7fecb8e0) |
| |7fec9000| phys_alloc zone=0x7fedbe10 size=4096 align=1000 ret=7fec4000 (detail=0x7fecb8b0) |
| /7fec4000\ Start thread |
| |7fec8000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec8f68 size=4 |
| |7feca000| phys_alloc zone=0x7fedbe10 size=28 align=10 ret=7fecb890 (detail=0x7fecb860) |
| |7feca000| phys_alloc zone=0x7fedbe10 size=4096 align=1000 ret=7fec3000 (detail=0x7fecb830) |
| /7fec3000\ Start thread |
| |7fec3000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec3f70 size=4 |
| |7fec9000| phys_alloc zone=0x7fedbe10 size=28 align=10 ret=7fecb810 (detail=0x7fecb7e0) |
| |7fec9000| phys_alloc zone=0x7fedbe10 size=4096 align=1000 ret=7fec2000 (detail=0x7fecb7b0) |
| /7fec2000\ Start thread |
| |7feca000| phys_alloc zone=0x7fedbe10 size=28 align=10 ret=7fecb6d0 (detail=0x7fecb6a0) |
| |7feca000| phys_alloc zone=0x7fedbe10 size=4096 align=1000 ret=7fec1000 (detail=0x7fecb670) |
| /7fec1000\ Start thread |
| |7fec3000| ehci_send_pipe qh=0x7fecba80 dir=0 data=0x00000000 size=0 |
| |7fec9000| phys_alloc zone=0x7fedbe10 size=28 align=10 ret=7fecb650 (detail=0x7fecb620) |
| |7fec9000| phys_alloc zone=0x7fedbe10 size=4096 align=1000 ret=7fec0000 (detail=0x7fecb5f0) |
| /7fec0000\ Start thread |
| |7fec0000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec0f70 size=4 |
| |7feca000| phys_alloc zone=0x7fedbe10 size=28 align=10 ret=7fecb5d0 (detail=0x7fecb5a0) |
| |7feca000| phys_alloc zone=0x7fedbe10 size=4096 align=1000 ret=7febf000 (detail=0x7fecb570) |
| /7febf000\ Start thread |
| |7fec3000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec3f68 size=4 |
| |7fec9000| phys_alloc zone=0x7fedbe10 size=28 align=10 ret=7fecb550 (detail=0x7fecb520) |
| |7fec9000| phys_alloc zone=0x7fedbe10 size=4096 align=1000 ret=7febe000 (detail=0x7fecb4f0) |
| /7febe000\ Start thread |
| |7fec2000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec2f70 size=4 |
| |7feca000| phys_alloc zone=0x7fedbe10 size=28 align=10 ret=7fecb4d0 (detail=0x7fecb4a0) |
| |7feca000| phys_alloc zone=0x7fedbe10 size=4096 align=1000 ret=7febd000 (detail=0x7fecb470) |
| /7febd000\ Start thread |
| |7fec5000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec5f70 size=4 |
| |7fec4000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec4f70 size=4 |
| |7feca000| phys_alloc zone=0x7fedbe10 size=28 align=10 ret=7fecb450 (detail=0x7fecb420) |
| |7feca000| phys_alloc zone=0x7fedbe10 size=4096 align=1000 ret=7febc000 (detail=0x7fecb3f0) |
| /7febc000\ Start thread |
| |7fec6000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec6f70 size=4 |
| |7feca000| phys_alloc zone=0x7fedbe10 size=28 align=10 ret=7fecb3d0 (detail=0x7fecb3a0) |
| |7feca000| phys_alloc zone=0x7fedbe10 size=4096 align=1000 ret=7febb000 (detail=0x7fecb370) |
| /7febb000\ Start thread |
| |7febb000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febbf70 size=4 |
| |7febc000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febcf70 size=4 |
| |7febe000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7febef70 size=4 |
| |7febd000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febdf70 size=4 |
| |7febf000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febff70 size=4 |
| |7fec1000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec1f70 size=4 |
| |7fec7000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec7f70 size=4 |
| |7fec8000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec8f68 size=4 |
| |7fec0000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec0f70 size=4 |
| |7fec3000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec3f68 size=4 |
| |7fec2000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec2f70 size=4 |
| |7fec5000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec5f70 size=4 |
| |7fec4000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec4f70 size=4 |
| |7fec6000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec6f70 size=4 |
| |7febb000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febbf70 size=4 |
| |7febc000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febcf70 size=4 |
| |7febe000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7febef70 size=4 |
| |7febd000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febdf70 size=4 |
| |7febf000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febff70 size=4 |
| |7fec7000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec7f70 size=4 |
| |7fec8000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec8f68 size=4 |
| |7fec0000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec0f70 size=4 |
| |7fec3000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec3f68 size=4 |
| |7fec2000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec2f70 size=4 |
| |7fec5000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec5f70 size=4 |
| |7fec4000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec4f70 size=4 |
| |7fec6000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec6f70 size=4 |
| |7febb000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febbf70 size=4 |
| |7febc000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febcf70 size=4 |
| |7febe000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7febef70 size=4 |
| |7febd000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febdf70 size=4 |
| |7febf000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febff70 size=4 |
| |7fec7000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec7f70 size=4 |
| |7fec8000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec8f68 size=4 |
| |7fec8000| set_address 0x7fece150 |
| |7fec0000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec0f70 size=4 |
| |7fec3000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec3f68 size=4 |
| |7fec2000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec2f70 size=4 |
| |7fec3000| set_address 0x7fece040 |
| |7fec5000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec5f70 size=4 |
| |7fec4000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec4f70 size=4 |
| |7fec6000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec6f70 size=4 |
| |7febb000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febbf70 size=4 |
| |7febc000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febcf70 size=4 |
| |7febe000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7febef70 size=4 |
| |7febd000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febdf70 size=4 |
| |7febf000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febff70 size=4 |
| |7fec7000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec7f70 size=4 |
| |7fec0000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec0f70 size=4 |
| |7fec2000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec2f70 size=4 |
| |7fec5000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec5f70 size=4 |
| |7fec4000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec4f70 size=4 |
| |7fec6000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec6f70 size=4 |
| |7febb000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febbf70 size=4 |
| |7febc000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febcf70 size=4 |
| |7febe000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7febef70 size=4 |
| |7febd000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febdf70 size=4 |
| |7febf000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febff70 size=4 |
| |7fec8000| ehci_alloc_async_pipe 0x7fece150 0 |
| |7fec8000| phys_alloc zone=0x7fedbe10 size=92 align=80 ret=7fecb300 (detail=0x7fecb2d0) |
| |7fec8000| ehci_send_pipe qh=0x7fecb300 dir=0 data=0x00000000 size=0 |
| |7fec7000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec7f70 size=4 |
| |7fec3000| ehci_alloc_async_pipe 0x7fece040 0 |
| |7fec3000| phys_alloc zone=0x7fedbe10 size=92 align=80 ret=7fecb200 (detail=0x7fecb2a0) |
| |7fec3000| ehci_send_pipe qh=0x7fecb200 dir=0 data=0x00000000 size=0 |
| |7fec0000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec0f70 size=4 |
| |7fec2000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec2f70 size=4 |
| |7fec5000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec5f70 size=4 |
| |7fec4000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec4f70 size=4 |
| |7fec6000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec6f70 size=4 |
| |7febb000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febbf70 size=4 |
| |7febc000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febcf70 size=4 |
| |7febe000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7febef70 size=4 |
| |7febd000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febdf70 size=4 |
| |7febf000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febff70 size=4 |
| |7fec8000| ehci_alloc_async_pipe 0x7fece150 0 |
| |7fec8000| config_usb: 0x7fecb350 |
| |7fec8000| ehci_send_pipe qh=0x7fecb300 dir=128 data=0x7fec8fb6 size=8 |
| |7fec3000| ehci_alloc_async_pipe 0x7fece040 0 |
| |7fec3000| config_usb: 0x7fecb250 |
| |7fec3000| ehci_send_pipe qh=0x7fecb200 dir=128 data=0x7fec3fb6 size=8 |
| |7fec1000| ehci_send_pipe qh=0x7fecba80 dir=0 data=0x00000000 size=0 |
| |7fec1000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec1f68 size=4 |
| |7fec8000| device rev=0110 cls=ff sub=12 proto=ff size=8 |
| |7fec8000| ehci_alloc_async_pipe 0x7fece150 0 |
| |7fec8000| ehci_send_pipe qh=0x7fecb300 dir=128 data=0x7fec8fc8 size=9 |
| |7fec3000| device rev=0200 cls=00 sub=00 proto=00 size=8 |
| |7fec3000| ehci_alloc_async_pipe 0x7fece040 0 |
| |7fec3000| ehci_send_pipe qh=0x7fecb200 dir=128 data=0x7fec3fc8 size=9 |
| |7fec8000| phys_alloc zone=0x7fedbe10 size=46 align=10 ret=7fecb270 (detail=0x7fecb1d0) |
| |7fec8000| ehci_send_pipe qh=0x7fecb300 dir=128 data=0x7fecb270 size=46 |
| |7fec3000| phys_alloc zone=0x7fedbe10 size=84 align=10 ret=7fecb170 (detail=0x7fecb140) |
| |7fec3000| ehci_send_pipe qh=0x7fecb200 dir=128 data=0x7fecb170 size=84 |
| |7fec8000| phys_free 7fecb270 (detail=0x7fecb1d0) |
| |7fec8000| ehci_send_pipe qh=0x7fecb980 dir=0 data=0x00000000 size=0 |
| |7fec8000| phys_free 7fecbce0 (detail=0x7fecbcb0) |
| \7fec8000/ End thread |
| phys_free 7fec8000 (detail=0x7fecbc80) |
| |7fec3000| ehci_send_pipe qh=0x7fecb200 dir=0 data=0x00000000 size=0 |
| |7fec3000| usb_hid_setup 0x7fecb250 |
| |7fec3000| ehci_send_pipe qh=0x7fecb200 dir=0 data=0x00000000 size=0 |
| |7fec3000| ehci_send_pipe qh=0x7fecb200 dir=0 data=0x00000000 size=0 |
| |7fec3000| ehci_alloc_intr_pipe 0x7fece040 3 |
| |7fec3000| phys_alloc zone=0x7fedbe20 size=92 align=80 ret=ea900 (detail=0x7fecbcd0) |
| |7fec3000| phys_alloc zone=0x7fedbe20 size=896 align=40 ret=ea580 (detail=0x7fecbca0) |
| |7fec3000| phys_alloc zone=0x7fedbe20 size=112 align=10 ret=ea510 (detail=0x7fecb270) |
| |7fec3000| USB keyboard initialized |
| |7fec3000| phys_free 7fecb170 (detail=0x7fecb140) |
| |7fec3000| phys_free 7fecb890 (detail=0x7fecb860) |
| \7fec3000/ End thread |
| phys_free 7fec3000 (detail=0x7fecb830) |
| |7fec7000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec7f70 size=4 |
| |7fec0000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec0f70 size=4 |
| |7fec2000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec2f70 size=4 |
| |7fec5000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec5f70 size=4 |
| |7fec4000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec4f70 size=4 |
| |7fec6000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec6f70 size=4 |
| |7febb000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febbf70 size=4 |
| |7febc000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febcf70 size=4 |
| |7febe000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7febef70 size=4 |
| |7febd000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febdf70 size=4 |
| |7febf000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febff70 size=4 |
| |7fec1000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec1f68 size=4 |
| |7fec7000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec7f70 size=4 |
| |7fec0000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec0f70 size=4 |
| |7fec2000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec2f70 size=4 |
| |7fec5000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec5f70 size=4 |
| |7fec4000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec4f70 size=4 |
| |7fec6000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec6f70 size=4 |
| |7febb000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febbf70 size=4 |
| |7febc000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febcf70 size=4 |
| |7febe000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7febef70 size=4 |
| |7febd000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febdf70 size=4 |
| |7febf000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febff70 size=4 |
| |7fec1000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec1f68 size=4 |
| |7fec7000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec7f70 size=4 |
| |7fec0000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec0f70 size=4 |
| |7fec2000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec2f70 size=4 |
| |7fec5000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec5f70 size=4 |
| |7fec4000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec4f70 size=4 |
| |7fec6000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec6f70 size=4 |
| |7febb000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febbf70 size=4 |
| |7febc000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febcf70 size=4 |
| |7febe000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7febef70 size=4 |
| |7febd000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febdf70 size=4 |
| |7febf000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febff70 size=4 |
| |7fec1000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec1f68 size=4 |
| |7fec1000| set_address 0x7fece040 |
| |7fec7000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec7f70 size=4 |
| |7fec0000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec0f70 size=4 |
| |7fec2000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec2f70 size=4 |
| |7fec5000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec5f70 size=4 |
| |7fec4000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec4f70 size=4 |
| |7fec6000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec6f70 size=4 |
| |7febb000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febbf70 size=4 |
| |7febc000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febcf70 size=4 |
| |7febe000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7febef70 size=4 |
| |7febd000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febdf70 size=4 |
| |7febf000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febff70 size=4 |
| |7fec7000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec7f70 size=4 |
| |7fec0000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec0f70 size=4 |
| |7fec2000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec2f70 size=4 |
| |7fec5000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec5f70 size=4 |
| |7fec4000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec4f70 size=4 |
| |7fec6000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec6f70 size=4 |
| |7febb000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febbf70 size=4 |
| |7febc000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febcf70 size=4 |
| |7febe000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7febef70 size=4 |
| |7febd000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febdf70 size=4 |
| |7febf000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febff70 size=4 |
| |7fec1000| ehci_alloc_async_pipe 0x7fece040 0 |
| |7fec1000| ehci_send_pipe qh=0x7fecb200 dir=0 data=0x00000000 size=0 |
| |7fec1000| ehci_alloc_async_pipe 0x7fece040 0 |
| |7fec1000| config_usb: 0x7fecb250 |
| |7fec1000| ehci_send_pipe qh=0x7fecb200 dir=128 data=0x7fec1fb6 size=8 |
| |7fec7000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec7f70 size=4 |
| |7fec0000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec0f70 size=4 |
| |7fec2000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec2f70 size=4 |
| |7fec5000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec5f70 size=4 |
| |7fec4000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec4f70 size=4 |
| |7fec6000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec6f70 size=4 |
| |7febb000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febbf70 size=4 |
| |7febc000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febcf70 size=4 |
| |7febe000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7febef70 size=4 |
| |7febd000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febdf70 size=4 |
| |7febf000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febff70 size=4 |
| |7fec7000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec7f70 size=4 |
| |7fec0000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec0f70 size=4 |
| |7fec2000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec2f70 size=4 |
| |7fec5000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec5f70 size=4 |
| |7fec4000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec4f70 size=4 |
| |7fec6000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec6f70 size=4 |
| |7febb000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febbf70 size=4 |
| |7febc000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febcf70 size=4 |
| |7febe000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7febef70 size=4 |
| |7febd000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febdf70 size=4 |
| |7febf000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febff70 size=4 |
| |7fec7000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec7f70 size=4 |
| |7fec0000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec0f70 size=4 |
| |7fec2000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec2f70 size=4 |
| |7fec5000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec5f70 size=4 |
| |7fec4000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec4f70 size=4 |
| |7fec6000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec6f70 size=4 |
| |7febb000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febbf70 size=4 |
| |7febc000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febcf70 size=4 |
| |7febe000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7febef70 size=4 |
| |7febd000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febdf70 size=4 |
| |7febf000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febff70 size=4 |
| |7fec7000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec7f70 size=4 |
| |7fec0000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec0f70 size=4 |
| |7fec2000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec2f70 size=4 |
| |7fec5000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec5f70 size=4 |
| |7fec4000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec4f70 size=4 |
| |7fec6000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec6f70 size=4 |
| |7febb000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febbf70 size=4 |
| |7febc000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febcf70 size=4 |
| |7febe000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7febef70 size=4 |
| |7febd000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febdf70 size=4 |
| |7febf000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febff70 size=4 |
| |7fec7000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec7f70 size=4 |
| |7fec0000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec0f70 size=4 |
| |7fec2000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec2f70 size=4 |
| |7fec5000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec5f70 size=4 |
| |7fec4000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec4f70 size=4 |
| |7fec6000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec6f70 size=4 |
| |7febb000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febbf70 size=4 |
| |7febc000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febcf70 size=4 |
| |7febe000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7febef70 size=4 |
| |7febd000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febdf70 size=4 |
| |7febf000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febff70 size=4 |
| |7fec1000| device rev=0200 cls=ef sub=02 proto=01 size=64 |
| |7fec1000| ehci_alloc_async_pipe 0x7fece040 0 |
| |7fec1000| ehci_send_pipe qh=0x7fecb200 dir=128 data=0x7fec1fc8 size=9 |
| |7fec1000| phys_alloc zone=0x7fedbe10 size=845 align=10 ret=7fec8cb0 (detail=0x7fecb880) |
| |7fec1000| ehci_send_pipe qh=0x7fecb200 dir=128 data=0x7fec8cb0 size=845 |
| |7fec7000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec7f70 size=4 |
| |7fec0000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec0f70 size=4 |
| |7fec2000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec2f70 size=4 |
| |7fec5000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec5f70 size=4 |
| |7fec4000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec4f70 size=4 |
| |7fec6000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec6f70 size=4 |
| |7febb000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febbf70 size=4 |
| |7febc000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febcf70 size=4 |
| |7febe000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7febef70 size=4 |
| |7febd000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febdf70 size=4 |
| |7febf000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febff70 size=4 |
| |7fec7000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec7f70 size=4 |
| |7fec0000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec0f70 size=4 |
| |7fec2000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec2f70 size=4 |
| |7fec5000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec5f70 size=4 |
| |7fec4000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec4f70 size=4 |
| |7fec6000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec6f70 size=4 |
| |7febb000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febbf70 size=4 |
| |7febc000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febcf70 size=4 |
| |7febe000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7febef70 size=4 |
| |7febd000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febdf70 size=4 |
| |7febf000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febff70 size=4 |
| |7fec7000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec7f70 size=4 |
| |7fec0000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec0f70 size=4 |
| |7fec2000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec2f70 size=4 |
| |7fec5000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec5f70 size=4 |
| |7fec4000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec4f70 size=4 |
| |7fec6000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec6f70 size=4 |
| |7febb000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febbf70 size=4 |
| |7febc000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febcf70 size=4 |
| |7febe000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7febef70 size=4 |
| |7febd000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febdf70 size=4 |
| |7febf000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febff70 size=4 |
| |7fec7000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec7f70 size=4 |
| |7fec0000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec0f70 size=4 |
| |7fec2000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec2f70 size=4 |
| |7fec5000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec5f70 size=4 |
| |7fec4000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec4f70 size=4 |
| |7fec6000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec6f70 size=4 |
| |7febb000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febbf70 size=4 |
| |7febc000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febcf70 size=4 |
| |7febe000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7febef70 size=4 |
| |7febd000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febdf70 size=4 |
| |7febf000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febff70 size=4 |
| |7fec7000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec7f70 size=4 |
| |7fec7000| phys_free 7fecbc60 (detail=0x7fecbc30) |
| \7fec7000/ End thread |
| phys_free 7fec7000 (detail=0x7fecbc00) |
| |7fec0000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec0f70 size=4 |
| |7fec0000| phys_free 7fecb650 (detail=0x7fecb620) |
| \7fec0000/ End thread |
| phys_free 7fec0000 (detail=0x7fecb5f0) |
| |7fec2000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec2f70 size=4 |
| |7fec5000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7fec5f70 size=4 |
| |7fec2000| phys_free 7fecb810 (detail=0x7fecb7e0) |
| \7fec2000/ End thread |
| phys_free 7fec2000 (detail=0x7fecb7b0) |
| |7fec4000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec4f70 size=4 |
| |7fec5000| phys_free 7fecbb60 (detail=0x7fecbb30) |
| \7fec5000/ End thread |
| phys_free 7fec5000 (detail=0x7fecbb00) |
| |7fec4000| phys_free 7fecb910 (detail=0x7fecb8e0) |
| \7fec4000/ End thread |
| phys_free 7fec4000 (detail=0x7fecb8b0) |
| |7fec6000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7fec6f70 size=4 |
| |7febb000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febbf70 size=4 |
| |7fec6000| phys_free 7fecbbe0 (detail=0x7fecbbb0) |
| \7fec6000/ End thread |
| phys_free 7fec6000 (detail=0x7fecbb80) |
| |7febb000| phys_free 7fecb3d0 (detail=0x7fecb3a0) |
| \7febb000/ End thread |
| phys_free 7febb000 (detail=0x7fecb370) |
| |7febc000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febcf70 size=4 |
| |7febc000| phys_free 7fecb450 (detail=0x7fecb420) |
| \7febc000/ End thread |
| phys_free 7febc000 (detail=0x7fecb3f0) |
| |7febe000| ehci_send_pipe qh=0x7fecb980 dir=128 data=0x7febef70 size=4 |
| |7febe000| phys_free 7fecb550 (detail=0x7fecb520) |
| \7febe000/ End thread |
| phys_free 7febe000 (detail=0x7fecb4f0) |
| |7febd000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febdf70 size=4 |
| |7fec9000| Initialized USB HUB (0 ports used) |
| |7fec9000| phys_free 7fecb960 (detail=0x7fecb930) |
| |7fec9000| phys_free 7fecbd60 (detail=0x7fecbd30) |
| \7fec9000/ End thread |
| phys_free 7fec9000 (detail=0x7fecbd00) |
| |7febd000| phys_free 7fecb4d0 (detail=0x7fecb4a0) |
| \7febd000/ End thread |
| phys_free 7febd000 (detail=0x7fecb470) |
| |7febf000| ehci_send_pipe qh=0x7fecba80 dir=128 data=0x7febff70 size=4 |
| |7fecd000| ehci_free_pipes 0x7fece150 |
| |7febf000| phys_free 7fecb5d0 (detail=0x7fecb5a0) |
| \7febf000/ End thread |
| phys_free 7febf000 (detail=0x7fecb570) |
| |7fecd000| phys_free 7fecb980 (detail=0x7fecba20) |
| |7fecd000| phys_free 7fecb300 (detail=0x7fecb2d0) |
| |7fecd000| phys_free 7ff1b000 (detail=0x7fece0c0) |
| |7fecd000| phys_free 7ff1af80 (detail=0x7fece090) |
| |7fecd000| phys_free 7ff1af00 (detail=0x7fece060) |
| |7fecd000| phys_free 7fece150 (detail=0x7fece120) |
| \7fecd000/ End thread |
| phys_free 7fecd000 (detail=0x7fece0f0) |
| |7fec1000| ehci_send_pipe qh=0x7fecb200 dir=0 data=0x00000000 size=0 |
| |7fec1000| usb_hid_setup 0x7fecb250 |
| |7fec1000| phys_free 7fec8cb0 (detail=0x7fecb880) |
| |7fec1000| ehci_send_pipe qh=0x7fecba80 dir=0 data=0x00000000 size=0 |
| |7fec1000| phys_free 7fecb6d0 (detail=0x7fecb6a0) |
| \7fec1000/ End thread |
| phys_free 7fec1000 (detail=0x7fecb670) |
| |7feca000| Initialized USB HUB (1 ports used) |
| |7feca000| phys_free 7fecbae0 (detail=0x7fecb9f0) |
| |7feca000| phys_free 7fecbde0 (detail=0x7fecbdb0) |
| \7feca000/ End thread |
| phys_free 7feca000 (detail=0x7fecbd80) |
| |7fecc000| ehci_free_pipes 0x7fece040 |
| |7fecc000| phys_free 7fecba80 (detail=0x7fecba50) |
| |7fecc000| phys_free 7fecb200 (detail=0x7fecb2a0) |
| \7fecc000/ End thread |
| phys_free 7fecc000 (detail=0x7fecbfd0) |
| All threads complete. |
| Scan for option roms |
| Attempting to init PCI bdf 00:00.0 (vd 8086:0104) |
| Attempting to map option rom on dev 00:00.0 |
| Option rom sizing returned 0 0 |
| Attempting to init PCI bdf 00:04.0 (vd 8086:0103) |
| Attempting to map option rom on dev 00:04.0 |
| Option rom sizing returned 0 0 |
| Attempting to init PCI bdf 00:16.0 (vd 8086:1c3a) |
| Attempting to map option rom on dev 00:16.0 |
| Option rom sizing returned 0 0 |
| Attempting to init PCI bdf 00:19.0 (vd 8086:1502) |
| Attempting to map option rom on dev 00:19.0 |
| Option rom sizing returned 0 0 |
| Attempting to init PCI bdf 00:1b.0 (vd 8086:1c20) |
| Attempting to map option rom on dev 00:1b.0 |
| Option rom sizing returned 0 0 |
| Attempting to init PCI bdf 00:1c.0 (vd 8086:1c10) |
| Attempting to map option rom on dev 00:1c.0 |
| Skipping non-normal pci device (type=81) |
| Attempting to init PCI bdf 00:1c.1 (vd 8086:1c12) |
| Attempting to map option rom on dev 00:1c.1 |
| Skipping non-normal pci device (type=81) |
| Attempting to init PCI bdf 00:1c.2 (vd 8086:1c14) |
| Attempting to map option rom on dev 00:1c.2 |
| Skipping non-normal pci device (type=81) |
| Attempting to init PCI bdf 00:1c.3 (vd 8086:1c16) |
| Attempting to map option rom on dev 00:1c.3 |
| Skipping non-normal pci device (type=81) |
| Attempting to init PCI bdf 00:1f.0 (vd 8086:1c4f) |
| Attempting to map option rom on dev 00:1f.0 |
| Option rom sizing returned 0 0 |
| Attempting to init PCI bdf 03:00.0 (vd 197b:2380) |
| Attempting to map option rom on dev 03:00.0 |
| Option rom sizing returned 0 0 |
| Attempting to init PCI bdf 03:00.1 (vd 197b:2392) |
| Attempting to map option rom on dev 03:00.1 |
| Option rom sizing returned e0800000 ffff0000 |
| Inspecting possible rom at 0xe0800000 (vd=197b:2392 bdf=03:00.1) |
| No option rom signature (got 0) |
| Attempting to init PCI bdf 03:00.3 (vd 197b:2393) |
| Attempting to map option rom on dev 03:00.3 |
| Option rom sizing returned 0 0 |
| Attempting to init PCI bdf 03:00.4 (vd 197b:2394) |
| Attempting to map option rom on dev 03:00.4 |
| Option rom sizing returned 0 0 |
| Attempting to init PCI bdf 04:00.0 (vd 168c:0030) |
| Attempting to map option rom on dev 04:00.0 |
| Option rom sizing returned e1820000 ffff0000 |
| Inspecting possible rom at 0xe1820000 (vd=168c:0030 bdf=04:00.0) |
| No option rom signature (got beef) |
| |
| Press ESC for boot menu. |
| |
| Checking for bootsplash |
| Searching bootorder for: HALT |
| Mapping hd drive 0x000f6440 to 0 |
| drive 0x000f6440: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=468862128 |
| finalize PMM |
| malloc finalize |
| Add to e820 map: 0009fc00 00000400 2 |
| Space available for UMB: c7000-ea000, f5d00-f6440 |
| Add to e820 map: 7fedc000 0003d000 1 |
| Returned 249856 bytes of ZoneHigh |
| e820 map has 11 items: |
| 0: 0000000000000000 - 000000000009fc00 = 1 RAM |
| 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED |
| 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED |
| 3: 0000000000100000 - 0000000020000000 = 1 RAM |
| 4: 0000000020000000 - 0000000020200000 = 2 RESERVED |
| 5: 0000000020200000 - 0000000040000000 = 1 RAM |
| 6: 0000000040000000 - 0000000040200000 = 2 RESERVED |
| 7: 0000000040200000 - 000000007ff19000 = 1 RAM |
| 8: 000000007ff19000 - 0000000082a00000 = 2 RESERVED |
| 9: 00000000f0000000 - 00000000f4000000 = 2 RESERVED |
| 10: 0000000100000000 - 000000017b600000 = 1 RAM |
| Jump to int19 |
| enter handle_19: |
| NULL |
| Booting from Hard Disk... |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba 0, count 1, buf 0x00007c00, rc 0 |
| Booting from 0000:7c00 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba 1, count 1, buf 0x00070000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba 2, count 63, buf 0x00070000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba 0, count 3f, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba 3f, count 1, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba 91a2000, count e, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba 91a200e, count 32, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba 91a4100, count 8, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba 91a4108, count 38, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba 91b4100, count 37, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba 91b4137, count 9, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba d1a2100, count 6, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba d1a2106, count 3a, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba d1b2100, count 35, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba d1b2135, count b, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba d1a2140, count 5, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba d1a2145, count 3b, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba 14df1f00, count 5, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba 14df1f05, count 3b, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba 14df1f40, count 4, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba 14df1f44, count 3c, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba 14df1f80, count 3, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba 14df1f83, count 3d, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba 14df1fc0, count 2, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba 14df1fc2, count 3e, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba fe0d640, count 11, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba fe0d651, count 2f, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba d3bf040, count 23, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba d3bf063, count 1d, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba fe0de40, count 30, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba fe0de70, count 10, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba d7eb7c0, count 8, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba d7eb7c8, count 38, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba fe0db40, count 3c, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba fe0db7c, count 4, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba fe0df40, count 2c, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba fe0df6c, count 14, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba d1a2180, count 4, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba d1a2184, count 3c, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba d3bf200, count 1c, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba d3bf21c, count 24, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba d3bf240, count 1b, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba d3bf25b, count 25, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba e3d1040, count 10, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba e3d1050, count 30, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba d7eb780, count 9, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba d7eb789, count 37, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba fe0de00, count 31, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba fe0de31, count f, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba fe0d5c0, count 13, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
| AHCI/0: ... finished, status 0x50, OK |
| ahci disk read, lba fe0d5d3, count 2d, buf 0x00068000, rc 0 |
| AHCI/0: send cmd ... |
| AHCI/0: ... intbits 0x1, status 0x50 ... |
|