blob: d5f12abf8fc6e3881962df333824d2758f1d49c0 [file] [log] [blame]
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20160831-64
* Copyright (c) 2000 - 2016 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
* Disassembly of dsdt.dat, Mon Jan 2 17:42:50 2017
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00002244 (8772)
* Revision 0x02
* Checksum 0x9C
* OEM ID "COREv4"
* OEM Table ID "COREBOOT"
* OEM Revision 0x20090419 (537461785)
* Compiler ID "INTL"
* Compiler Version 0x20160831 (538314801)
*/
DefinitionBlock ("", "DSDT", 2, "COREv4", "COREBOOT", 0x20090419)
{
External (_PR_.CP00, DeviceObj)
External (_PR_.CP00._PPC, UnknownObj)
External (_PR_.CP01, DeviceObj)
External (_PR_.CP01._PPC, UnknownObj)
External (LCD0, DeviceObj)
External (NVSA, UnknownObj)
External (PDC0, UnknownObj)
External (PDC1, UnknownObj)
Scope (\)
{
Name (NVSA, 0x7F7FE980)
}
Name (PICM, Zero)
Name (DSEN, One)
OperationRegion (GNVS, SystemMemory, NVSA, 0x0100)
Field (GNVS, ByteAcc, NoLock, Preserve)
{
OSYS, 16,
SMIF, 8,
PRM0, 8,
PRM1, 8,
SCIF, 8,
PRM2, 8,
PRM3, 8,
LCKF, 8,
PRM4, 8,
PRM5, 8,
P80D, 32,
LIDS, 8,
PWRS, 8,
DBGS, 8,
LINX, 8,
DCKN, 8,
ACTT, 8,
PSVT, 8,
TC1V, 8,
TC2V, 8,
TSPV, 8,
CRTT, 8,
DTSE, 8,
DTS1, 8,
DTS2, 8,
Offset (0x1E),
BNUM, 8,
B0SC, 8,
B1SC, 8,
B2SC, 8,
B0SS, 8,
B1SS, 8,
B2SS, 8,
Offset (0x28),
APIC, 8,
MPEN, 8,
PCP0, 8,
PCP1, 8,
PPCM, 8,
Offset (0x32),
NATP, 8,
CMAP, 8,
CMBP, 8,
LPTP, 8,
FDCP, 8,
RFDV, 8,
HOTK, 8,
RTCF, 8,
UTIL, 8,
ACIN, 8,
IGDS, 8,
TLST, 8,
CADL, 8,
PADL, 8,
CSTE, 16,
NSTE, 16,
SSTE, 16,
NDID, 8,
DID1, 32,
DID2, 32,
DID3, 32,
DID4, 32,
DID5, 32,
Offset (0x64),
BLCS, 8,
BRTL, 8,
ODDS, 8,
Offset (0x6E),
ALSE, 8,
ALAF, 8,
LLOW, 8,
LHIH, 8,
Offset (0x78),
EMAE, 8,
EMAP, 16,
EMAL, 16,
Offset (0x82),
MEFE, 8,
Offset (0x8C),
TPMP, 8,
TPME, 8,
Offset (0x96),
GTF0, 56,
GTF1, 56,
GTF2, 56,
IDEM, 8,
IDET, 8,
Offset (0xB4),
ASLB, 32,
IBTT, 8,
IPAT, 8,
ITVF, 8,
ITVM, 8,
IPSC, 8,
IBLC, 8,
IBIA, 8,
ISSC, 8,
I409, 8,
I509, 8,
I609, 8,
I709, 8,
IDMM, 8,
IDMS, 8,
IF1E, 8,
HVCO, 8,
NXD1, 32,
NXD2, 32,
NXD3, 32,
NXD4, 32,
NXD5, 32,
NXD6, 32,
NXD7, 32,
NXD8, 32,
Offset (0xF0),
DOCK, 8,
BTEN, 8
}
OperationRegion (APMP, SystemIO, 0xB2, 0x02)
Field (APMP, ByteAcc, NoLock, Preserve)
{
APMC, 8,
APMS, 8
}
OperationRegion (POST, SystemIO, 0x80, One)
Field (POST, ByteAcc, Lock, Preserve)
{
DBG0, 8
}
Method (TRAP, 1, Serialized)
{
SMIF = Arg0
TRP0 = Zero
Return (SMIF) /* \SMIF */
}
Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model
{
PICM = Arg0
}
Method (GOS, 0, NotSerialized)
{
OSYS = 0x07D0
If (CondRefOf (_OSI))
{
If (_OSI ("Linux"))
{
LINX = One
}
If (_OSI ("Windows 2001"))
{
OSYS = 0x07D1
}
If (_OSI ("Windows 2001 SP1"))
{
OSYS = 0x07D1
}
If (_OSI ("Windows 2001 SP2"))
{
OSYS = 0x07D2
}
If (_OSI ("Windows 2006"))
{
OSYS = 0x07D6
}
}
}
Device (SLPB)
{
Name (_HID, EisaId ("PNP0C0E") /* Sleep Button Device */) // _HID: Hardware ID
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x1D,
0x04
})
}
Device (PWRB)
{
Name (_HID, EisaId ("PNP0C0C") /* Power Button Device */) // _HID: Hardware ID
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x1D,
0x04
})
}
Method (PNOT, 0, NotSerialized)
{
If (MPEN)
{
If (PDC0 & 0x08)
{
Notify (\_PR.CP00, 0x80) // Status Change
If (PDC0 & 0x10)
{
Sleep (0x64)
Notify (\_PR.CP00, 0x81) // Information Change
}
}
If (PDC1 & 0x08)
{
Notify (\_PR.CP01, 0x80) // Status Change
If (PDC1 & 0x10)
{
Sleep (0x64)
Notify (\_PR.CP01, 0x81) // Information Change
}
}
}
Else
{
Notify (\_PR.CP00, 0x80) // Status Change
Sleep (0x64)
Notify (\_PR.CP00, 0x81) // Information Change
}
}
Scope (_SB)
{
Device (PCI0)
{
Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID
Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID
Name (_ADR, Zero) // _ADR: Address
Name (_BBN, Zero) // _BBN: BIOS Bus Number
Device (MCHC)
{
Name (_ADR, Zero) // _ADR: Address
OperationRegion (MCHP, PCI_Config, Zero, 0x0100)
Field (MCHP, DWordAcc, NoLock, Preserve)
{
Offset (0x40),
EPEN, 1,
, 11,
EPBR, 20,
MHEN, 1,
, 13,
MHBR, 18,
PXEN, 1,
PXSZ, 2,
, 23,
PXBR, 6,
DMEN, 1,
, 11,
DMBR, 20,
Offset (0x90),
, 4,
PM0H, 2,
Offset (0x91),
PM1L, 2,
, 2,
PM1H, 2,
Offset (0x92),
PM2L, 2,
, 2,
PM2H, 2,
Offset (0x93),
PM3L, 2,
, 2,
PM3H, 2,
Offset (0x94),
PM4L, 2,
, 2,
PM4H, 2,
Offset (0x95),
PM5L, 2,
, 2,
PM5H, 2,
Offset (0x96),
PM6L, 2,
, 2,
PM6H, 2,
Offset (0x97),
Offset (0x9C),
, 3,
TLUD, 5,
Offset (0xA0),
TOM, 16
}
}
Name (MCRS, ResourceTemplate ()
{
WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
0x0000, // Granularity
0x0000, // Range Minimum
0x00FF, // Range Maximum
0x0000, // Translation Offset
0x0100, // Length
,, )
DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
0x00000000, // Granularity
0x00000000, // Range Minimum
0x00000CF7, // Range Maximum
0x00000000, // Translation Offset
0x00000CF8, // Length
,, , TypeStatic)
IO (Decode16,
0x0CF8, // Range Minimum
0x0CF8, // Range Maximum
0x01, // Alignment
0x08, // Length
)
DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
0x00000000, // Granularity
0x00000D00, // Range Minimum
0x0000FFFF, // Range Maximum
0x00000000, // Translation Offset
0x0000F300, // Length
,, , TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000A0000, // Range Minimum
0x000BFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00020000, // Length
,, , AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000C0000, // Range Minimum
0x000C3FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, , AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000C4000, // Range Minimum
0x000C7FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, , AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000C8000, // Range Minimum
0x000CBFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, , AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000CC000, // Range Minimum
0x000CFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, , AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000D0000, // Range Minimum
0x000D3FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, , AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000D4000, // Range Minimum
0x000D7FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, , AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000D8000, // Range Minimum
0x000DBFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, , AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000DC000, // Range Minimum
0x000DFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, , AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000E0000, // Range Minimum
0x000E3FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, , AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000E4000, // Range Minimum
0x000E7FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, , AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000E8000, // Range Minimum
0x000EBFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, , AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000EC000, // Range Minimum
0x000EFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, , AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000F0000, // Range Minimum
0x000FFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00010000, // Length
,, , AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x00000000, // Range Minimum
0xFEBFFFFF, // Range Maximum
0x00000000, // Translation Offset
0xFEC00000, // Length
,, _Y00, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0xFED40000, // Range Minimum
0xFED44FFF, // Range Maximum
0x00000000, // Translation Offset
0x00005000, // Length
,, , AddressRangeMemory, TypeStatic)
})
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
CreateDWordField (MCRS, \_SB.PCI0._Y00._MIN, PMIN) // _MIN: Minimum Base Address
CreateDWordField (MCRS, \_SB.PCI0._Y00._MAX, PMAX) // _MAX: Maximum Base Address
CreateDWordField (MCRS, \_SB.PCI0._Y00._LEN, PLEN) // _LEN: Length
PMIN = (^MCHC.TLUD << 0x1B)
PLEN = ((PMAX - PMIN) + One)
Return (MCRS) /* \_SB_.PCI0.MCRS */
}
Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
{
If (PICM)
{
Return (Package (0x0F)
{
Package (0x04)
{
0x0001FFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0x0002FFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0x001BFFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0x001CFFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0x001CFFFF,
One,
Zero,
0x11
},
Package (0x04)
{
0x001CFFFF,
0x02,
Zero,
0x12
},
Package (0x04)
{
0x001CFFFF,
0x03,
Zero,
0x13
},
Package (0x04)
{
0x001DFFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0x001DFFFF,
One,
Zero,
0x11
},
Package (0x04)
{
0x001DFFFF,
0x02,
Zero,
0x12
},
Package (0x04)
{
0x001DFFFF,
0x03,
Zero,
0x13
},
Package (0x04)
{
0x001FFFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0x001FFFFF,
One,
Zero,
0x11
},
Package (0x04)
{
0x001FFFFF,
0x02,
Zero,
0x12
},
Package (0x04)
{
0x001FFFFF,
0x03,
Zero,
0x13
}
})
}
Else
{
Return (Package (0x0F)
{
Package (0x04)
{
0x0001FFFF,
Zero,
^LPCB.LNKA,
Zero
},
Package (0x04)
{
0x0002FFFF,
Zero,
^LPCB.LNKA,
Zero
},
Package (0x04)
{
0x001BFFFF,
Zero,
^LPCB.LNKA,
Zero
},
Package (0x04)
{
0x001CFFFF,
Zero,
^LPCB.LNKA,
Zero
},
Package (0x04)
{
0x001CFFFF,
One,
^LPCB.LNKB,
Zero
},
Package (0x04)
{
0x001CFFFF,
0x02,
^LPCB.LNKC,
Zero
},
Package (0x04)
{
0x001CFFFF,
0x03,
^LPCB.LNKD,
Zero
},
Package (0x04)
{
0x001DFFFF,
Zero,
^LPCB.LNKA,
Zero
},
Package (0x04)
{
0x001DFFFF,
One,
^LPCB.LNKB,
Zero
},
Package (0x04)
{
0x001DFFFF,
0x02,
^LPCB.LNKC,
Zero
},
Package (0x04)
{
0x001DFFFF,
0x03,
^LPCB.LNKD,
Zero
},
Package (0x04)
{
0x001FFFFF,
Zero,
^LPCB.LNKA,
Zero
},
Package (0x04)
{
0x001FFFFF,
One,
^LPCB.LNKB,
Zero
},
Package (0x04)
{
0x001FFFFF,
0x02,
^LPCB.LNKC,
Zero
},
Package (0x04)
{
0x001FFFFF,
0x03,
^LPCB.LNKD,
Zero
}
})
}
}
Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities
{
CreateDWordField (Arg3, Zero, CDW1)
CreateDWordField (Arg3, 0x04, CDW2)
CreateDWordField (Arg3, 0x08, CDW3)
If (Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)
{
Return (Arg3)
}
Else
{
CDW1 |= 0x04
Return (Arg3)
}
}
Device (PDRC)
{
Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID
Name (_UID, One) // _UID: Unique ID
Name (PDRS, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0xFED1C000, // Address Base
0x00004000, // Address Length
)
Memory32Fixed (ReadWrite,
0xFED14000, // Address Base
0x00004000, // Address Length
)
Memory32Fixed (ReadWrite,
0xFED18000, // Address Base
0x00001000, // Address Length
)
Memory32Fixed (ReadWrite,
0xFED19000, // Address Base
0x00001000, // Address Length
)
Memory32Fixed (ReadWrite,
0xF0000000, // Address Base
0x04000000, // Address Length
)
Memory32Fixed (ReadWrite,
0xFED20000, // Address Base
0x00020000, // Address Length
)
Memory32Fixed (ReadWrite,
0xFED40000, // Address Base
0x00005000, // Address Length
)
Memory32Fixed (ReadWrite,
0xFED45000, // Address Base
0x0004B000, // Address Length
)
})
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Return (PDRS) /* \_SB_.PCI0.PDRC.PDRS */
}
}
Device (PEGP)
{
Name (_ADR, 0x00010000) // _ADR: Address
Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
{
If (PICM)
{
Return (Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0xFFFF,
One,
Zero,
0x11
},
Package (0x04)
{
0xFFFF,
0x02,
Zero,
0x12
},
Package (0x04)
{
0xFFFF,
0x03,
Zero,
0x13
}
})
}
Else
{
Return (Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
^^LPCB.LNKA,
Zero
},
Package (0x04)
{
0xFFFF,
One,
^^LPCB.LNKB,
Zero
},
Package (0x04)
{
0xFFFF,
0x02,
^^LPCB.LNKC,
Zero
},
Package (0x04)
{
0xFFFF,
0x03,
^^LPCB.LNKD,
Zero
}
})
}
}
}
Device (GFX0)
{
Name (_ADR, 0x00020000) // _ADR: Address
Name (BRIG, Package (0x12)
{
0x0F,
0x0F,
Zero,
One,
0x02,
0x03,
0x04,
0x05,
0x06,
0x07,
0x08,
0x09,
0x0A,
0x0B,
0x0C,
0x0D,
0x0E,
0x0F
})
Method (XBCM, 1, NotSerialized)
{
^^DSPC.BRTC = ((Arg0 << 0x04) | 0x0F)
}
Method (XBQC, 0, NotSerialized)
{
Local0 = ^^DSPC.BRTC /* \_SB_.PCI0.DSPC.BRTC */
Local0 >>= 0x04
Return (Local0)
}
Name (BRCT, Zero)
Method (BRID, 1, NotSerialized)
{
Local0 = Match (BRIG, MEQ, Arg0, MTR, Zero, 0x02)
If (Local0 == Ones)
{
Return ((SizeOf (BRIG) - One))
}
Return (Local0)
}
Method (XBCL, 0, NotSerialized)
{
BRCT = One
Return (BRIG) /* \_SB_.PCI0.GFX0.BRIG */
}
Method (_DOS, 1, NotSerialized) // _DOS: Disable Output Switching
{
DSEN = (Arg0 & 0x07)
}
Method (DECB, 0, NotSerialized)
{
If (BRCT)
{
Notify (LCD0, 0x87) // Device-Specific
}
Else
{
Local0 = BRID (XBQC ())
If (Local0 != 0x02)
{
Local0--
}
XBCM (DerefOf (BRIG [Local0]))
}
}
Method (INCB, 0, NotSerialized)
{
If (BRCT)
{
Notify (LCD0, 0x86) // Device-Specific
}
Else
{
Local0 = BRID (XBQC ())
If (Local0 != (SizeOf (BRIG) - One))
{
Local0++
}
XBCM (DerefOf (BRIG [Local0]))
}
}
Method (XDCS, 1, NotSerialized)
{
TRAP (One)
If (CSTE & (One << Arg0))
{
Return (0x1F)
}
Return (0x1D)
}
Method (XDGS, 1, NotSerialized)
{
If (NSTE & (One << Arg0))
{
Return (One)
}
Return (Zero)
}
Method (XDSS, 2, NotSerialized)
{
If ((Arg0 & 0xC0000000) == 0xC0000000)
{
CSTE = NSTE /* \NSTE */
}
}
}
Device (DSPC)
{
Name (_ADR, 0x00020001) // _ADR: Address
OperationRegion (DSPC, PCI_Config, Zero, 0x0100)
Field (DSPC, ByteAcc, NoLock, Preserve)
{
Offset (0xF4),
BRTC, 8
}
}
Scope (\)
{
OperationRegion (IO_T, SystemIO, 0x0800, 0x10)
Field (IO_T, ByteAcc, NoLock, Preserve)
{
Offset (0x08),
TRP0, 8
}
OperationRegion (PMIO, SystemIO, 0x0500, 0x80)
Field (PMIO, ByteAcc, NoLock, Preserve)
{
Offset (0x42),
, 1,
GPEC, 1,
, 9,
SCIS, 1,
, 6
}
OperationRegion (GPIO, SystemIO, 0x0480, 0x3C)
Field (GPIO, ByteAcc, NoLock, Preserve)
{
GU00, 8,
GU01, 8,
GU02, 8,
GU03, 8,
GIO0, 8,
GIO1, 8,
GIO2, 8,
GIO3, 8,
Offset (0x0C),
GP00, 1,
GP01, 1,
GP02, 1,
GP03, 1,
GP04, 1,
GP05, 1,
GP06, 1,
GP07, 1,
GP08, 1,
GP09, 1,
GP10, 1,
GP11, 1,
GP12, 1,
GP13, 1,
GP14, 1,
GP15, 1,
GP16, 1,
GP17, 1,
GP18, 1,
GP19, 1,
GP20, 1,
GP21, 1,
GP22, 1,
GP23, 1,
GP24, 1,
GP25, 1,
GP26, 1,
GP27, 1,
GP28, 1,
GP29, 1,
GP30, 1,
GP31, 1,
Offset (0x18),
GB00, 8,
GB01, 8,
GB02, 8,
GB03, 8,
Offset (0x2C),
GIV0, 8,
GIV1, 8,
GIV2, 8,
GIV3, 8,
GU04, 8,
GU05, 8,
GU06, 8,
GU07, 8,
GIO4, 8,
GIO5, 8,
GIO6, 8,
GIO7, 8,
GP32, 1,
GP33, 1,
GP34, 1,
GP35, 1,
GP36, 1,
GP37, 1,
GP38, 1,
GP39, 1,
GL05, 8,
GL06, 8,
GL07, 8
}
OperationRegion (RCRB, SystemMemory, 0xFED1C000, 0x4000)
Field (RCRB, DWordAcc, Lock, Preserve)
{
Offset (0x1000),
Offset (0x3000),
Offset (0x3404),
HPAS, 2,
, 5,
HPTE, 1,
Offset (0x3418),
, 1,
PATD, 1,
SATD, 1,
SMBD, 1,
HDAD, 1,
A97D, 1,
M97D, 1,
ILND, 1,
US1D, 1,
US2D, 1,
US3D, 1,
US4D, 1,
, 2,
LPBD, 1,
EHCD, 1,
RP1D, 1,
RP2D, 1,
RP3D, 1,
RP4D, 1,
RP5D, 1,
RP6D, 1
}
}
Device (HDEF)
{
Name (_ADR, 0x001B0000) // _ADR: Address
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x05,
0x04
})
}
Device (RP01)
{
Name (_ADR, 0x001C0000) // _ADR: Address
Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
{
If (PICM)
{
Return (Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0xFFFF,
One,
Zero,
0x11
},
Package (0x04)
{
0xFFFF,
0x02,
Zero,
0x12
},
Package (0x04)
{
0xFFFF,
0x03,
Zero,
0x13
}
})
}
Else
{
Return (Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
^^LPCB.LNKA,
Zero
},
Package (0x04)
{
0xFFFF,
One,
^^LPCB.LNKB,
Zero
},
Package (0x04)
{
0xFFFF,
0x02,
^^LPCB.LNKC,
Zero
},
Package (0x04)
{
0xFFFF,
0x03,
^^LPCB.LNKD,
Zero
}
})
}
}
}
Device (RP02)
{
Name (_ADR, 0x001C0001) // _ADR: Address
Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
{
If (PICM)
{
Return (Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
Zero,
0x11
},
Package (0x04)
{
0xFFFF,
One,
Zero,
0x12
},
Package (0x04)
{
0xFFFF,
0x02,
Zero,
0x13
},
Package (0x04)
{
0xFFFF,
0x03,
Zero,
0x10
}
})
}
Else
{
Return (Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
^^LPCB.LNKB,
Zero
},
Package (0x04)
{
0xFFFF,
One,
^^LPCB.LNKC,
Zero
},
Package (0x04)
{
0xFFFF,
0x02,
^^LPCB.LNKD,
Zero
},
Package (0x04)
{
0xFFFF,
0x03,
^^LPCB.LNKA,
Zero
}
})
}
}
}
Device (RP03)
{
Name (_ADR, 0x001C0002) // _ADR: Address
Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
{
If (PICM)
{
Return (Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
Zero,
0x12
},
Package (0x04)
{
0xFFFF,
One,
Zero,
0x13
},
Package (0x04)
{
0xFFFF,
0x02,
Zero,
0x10
},
Package (0x04)
{
0xFFFF,
0x03,
Zero,
0x11
}
})
}
Else
{
Return (Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
^^LPCB.LNKC,
Zero
},
Package (0x04)
{
0xFFFF,
One,
^^LPCB.LNKD,
Zero
},
Package (0x04)
{
0xFFFF,
0x02,
^^LPCB.LNKA,
Zero
},
Package (0x04)
{
0xFFFF,
0x03,
^^LPCB.LNKB,
Zero
}
})
}
}
}
Device (RP04)
{
Name (_ADR, 0x001C0003) // _ADR: Address
Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
{
If (PICM)
{
Return (Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
Zero,
0x13
},
Package (0x04)
{
0xFFFF,
One,
Zero,
0x10
},
Package (0x04)
{
0xFFFF,
0x02,
Zero,
0x11
},
Package (0x04)
{
0xFFFF,
0x03,
Zero,
0x12
}
})
}
Else
{
Return (Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
^^LPCB.LNKD,
Zero
},
Package (0x04)
{
0xFFFF,
One,
^^LPCB.LNKA,
Zero
},
Package (0x04)
{
0xFFFF,
0x02,
^^LPCB.LNKB,
Zero
},
Package (0x04)
{
0xFFFF,
0x03,
^^LPCB.LNKC,
Zero
}
})
}
}
}
Device (RP05)
{
Name (_ADR, 0x001C0004) // _ADR: Address
Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
{
If (PICM)
{
Return (Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0xFFFF,
One,
Zero,
0x11
},
Package (0x04)
{
0xFFFF,
0x02,
Zero,
0x12
},
Package (0x04)
{
0xFFFF,
0x03,
Zero,
0x13
}
})
}
Else
{
Return (Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
^^LPCB.LNKA,
Zero
},
Package (0x04)
{
0xFFFF,
One,
^^LPCB.LNKB,
Zero
},
Package (0x04)
{
0xFFFF,
0x02,
^^LPCB.LNKC,
Zero
},
Package (0x04)
{
0xFFFF,
0x03,
^^LPCB.LNKD,
Zero
}
})
}
}
}
Device (RP06)
{
Name (_ADR, 0x001C0005) // _ADR: Address
Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
{
If (PICM)
{
Return (Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
Zero,
0x11
},
Package (0x04)
{
0xFFFF,
One,
Zero,
0x12
},
Package (0x04)
{
0xFFFF,
0x02,
Zero,
0x13
},
Package (0x04)
{
0xFFFF,
0x03,
Zero,
0x10
}
})
}
Else
{
Return (Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
^^LPCB.LNKB,
Zero
},
Package (0x04)
{
0xFFFF,
One,
^^LPCB.LNKC,
Zero
},
Package (0x04)
{
0xFFFF,
0x02,
^^LPCB.LNKD,
Zero
},
Package (0x04)
{
0xFFFF,
0x03,
^^LPCB.LNKA,
Zero
}
})
}
}
}
Device (USB1)
{
Name (_ADR, 0x001D0000) // _ADR: Address
OperationRegion (U01P, PCI_Config, Zero, 0x0100)
Field (U01P, DWordAcc, NoLock, Preserve)
{
Offset (0xC4),
U1WE, 2
}
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x03,
0x04
})
Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake
{
If (Arg0)
{
U1WE = 0x03
}
Else
{
U1WE = Zero
}
}
Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
{
Return (0x02)
}
Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
{
Return (0x02)
}
}
Device (USB2)
{
Name (_ADR, 0x001D0001) // _ADR: Address
OperationRegion (U02P, PCI_Config, Zero, 0x0100)
Field (U02P, DWordAcc, NoLock, Preserve)
{
Offset (0xC4),
U2WE, 2
}
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x03,
0x04
})
Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake
{
If (Arg0)
{
U2WE = 0x03
}
Else
{
U2WE = Zero
}
}
Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
{
Return (0x02)
}
Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
{
Return (0x02)
}
}
Device (USB3)
{
Name (_ADR, 0x001D0002) // _ADR: Address
OperationRegion (U03P, PCI_Config, Zero, 0x0100)
Field (U03P, DWordAcc, NoLock, Preserve)
{
Offset (0xC4),
U3WE, 2
}
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x03,
0x04
})
Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake
{
If (Arg0)
{
U3WE = 0x03
}
Else
{
U3WE = Zero
}
}
Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
{
Return (0x02)
}
Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
{
Return (0x02)
}
}
Device (USB4)
{
Name (_ADR, 0x001D0003) // _ADR: Address
OperationRegion (U04P, PCI_Config, Zero, 0x0100)
Field (U04P, DWordAcc, NoLock, Preserve)
{
Offset (0xC4),
U4WE, 2
}
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x03,
0x04
})
Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake
{
If (Arg0)
{
U4WE = 0x03
}
Else
{
U4WE = Zero
}
}
Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
{
Return (0x02)
}
Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
{
Return (0x02)
}
}
Device (EHC1)
{
Name (_ADR, 0x001D0007) // _ADR: Address
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x0D,
0x04
})
Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
{
Return (0x02)
}
Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
{
Return (0x02)
}
Device (HUB7)
{
Name (_ADR, Zero) // _ADR: Address
Device (PRT1)
{
Name (_ADR, One) // _ADR: Address
}
Device (PRT2)
{
Name (_ADR, 0x02) // _ADR: Address
}
Device (PRT3)
{
Name (_ADR, 0x03) // _ADR: Address
}
Device (PRT4)
{
Name (_ADR, 0x04) // _ADR: Address
}
Device (PRT5)
{
Name (_ADR, 0x05) // _ADR: Address
}
Device (PRT6)
{
Name (_ADR, 0x06) // _ADR: Address
}
}
}
Device (PCIB)
{
Name (_ADR, 0x001E0000) // _ADR: Address
Device (SLT1)
{
Name (_ADR, Zero) // _ADR: Address
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x0B,
0x04
})
}
Device (SLT2)
{
Name (_ADR, 0x00010000) // _ADR: Address
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x0B,
0x04
})
}
Device (SLT3)
{
Name (_ADR, 0x00020000) // _ADR: Address
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x0B,
0x04
})
}
Device (SLT6)
{
Name (_ADR, 0x00050000) // _ADR: Address
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x0B,
0x04
})
}
Device (LANC)
{
Name (_ADR, 0x00080000) // _ADR: Address
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x0B,
0x03
})
}
Device (LANR)
{
Name (_ADR, Zero) // _ADR: Address
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x0B,
0x03
})
}
Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
{
If (PICM)
{
Return (Package (0x09)
{
Package (0x04)
{
0xFFFF,
Zero,
Zero,
0x11
},
Package (0x04)
{
0xFFFF,
One,
Zero,
0x12
},
Package (0x04)
{
0xFFFF,
0x02,
Zero,
0x13
},
Package (0x04)
{
0xFFFF,
0x03,
Zero,
0x10
},
Package (0x04)
{
0x0001FFFF,
Zero,
Zero,
0x15
},
Package (0x04)
{
0x0001FFFF,
One,
Zero,
0x16
},
Package (0x04)
{
0x0001FFFF,
0x02,
Zero,
0x17
},
Package (0x04)
{
0x0001FFFF,
0x03,
Zero,
0x14
},
Package (0x04)
{
0x0008FFFF,
Zero,
Zero,
0x14
}
})
}
Else
{
Return (Package (0x09)
{
Package (0x04)
{
0xFFFF,
Zero,
^^LPCB.LNKB,
Zero
},
Package (0x04)
{
0xFFFF,
One,
^^LPCB.LNKC,
Zero
},
Package (0x04)
{
0xFFFF,
0x02,
^^LPCB.LNKD,
Zero
},
Package (0x04)
{
0xFFFF,
0x03,
^^LPCB.LNKA,
Zero
},
Package (0x04)
{
0x0001FFFF,
Zero,
^^LPCB.LNKF,
Zero
},
Package (0x04)
{
0x0001FFFF,
One,
^^LPCB.LNKG,
Zero
},
Package (0x04)
{
0x0001FFFF,
0x02,
^^LPCB.LNKH,
Zero
},
Package (0x04)
{
0x0001FFFF,
0x03,
^^LPCB.LNKE,
Zero
},
Package (0x04)
{
0x0008FFFF,
Zero,
^^LPCB.LNKE,
Zero
}
})
}
}
}
Device (AUD0)
{
Name (_ADR, 0x001E0002) // _ADR: Address
}
Device (MODM)
{
Name (_ADR, 0x001E0003) // _ADR: Address
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x05,
0x04
})
}
Device (LPCB)
{
Name (_ADR, 0x001F0000) // _ADR: Address
OperationRegion (LPC0, PCI_Config, Zero, 0x0100)
Field (LPC0, AnyAcc, NoLock, Preserve)
{
Offset (0x40),
PMBS, 16,
Offset (0x60),
PRTA, 8,
PRTB, 8,
PRTC, 8,
PRTD, 8,
Offset (0x68),
PRTE, 8,
PRTF, 8,
PRTG, 8,
PRTH, 8,
Offset (0x80),
IOD0, 8,
IOD1, 8,
Offset (0xF0),
RCEN, 1,
, 13,
RCBA, 18
}
Device (LNKA)
{
Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
Name (_UID, One) // _UID: Unique ID
Method (_DIS, 0, Serialized) // _DIS: Disable Device
{
PRTA = 0x80
}
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
{
IRQ (Level, ActiveLow, Shared, )
{3,4,5,6,7,10,12,14,15}
})
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (RTLA, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{}
})
CreateWordField (RTLA, One, IRQ0)
IRQ0 = Zero
IRQ0 = (One << (PRTA & 0x0F))
Return (RTLA) /* \_SB_.PCI0.LPCB.LNKA._CRS.RTLA */
}
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
{
CreateWordField (Arg0, One, IRQ0)
FindSetRightBit (IRQ0, Local0)
Local0--
PRTA = Local0
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (PRTA & 0x80)
{
Return (0x09)
}
Else
{
Return (0x0B)
}
}
}
Device (LNKB)
{
Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
Name (_UID, 0x02) // _UID: Unique ID
Method (_DIS, 0, Serialized) // _DIS: Disable Device
{
PRTB = 0x80
}
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
{
IRQ (Level, ActiveLow, Shared, )
{3,4,5,6,7,11,12,14,15}
})
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (RTLB, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{}
})
CreateWordField (RTLB, One, IRQ0)
IRQ0 = Zero
IRQ0 = (One << (PRTB & 0x0F))
Return (RTLB) /* \_SB_.PCI0.LPCB.LNKB._CRS.RTLB */
}
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
{
CreateWordField (Arg0, One, IRQ0)
FindSetRightBit (IRQ0, Local0)
Local0--
PRTB = Local0
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (PRTB & 0x80)
{
Return (0x09)
}
Else
{
Return (0x0B)
}
}
}
Device (LNKC)
{
Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
Name (_UID, 0x03) // _UID: Unique ID
Method (_DIS, 0, Serialized) // _DIS: Disable Device
{
PRTC = 0x80
}
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
{
IRQ (Level, ActiveLow, Shared, )
{3,4,5,6,7,10,12,14,15}
})
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (RTLC, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{}
})
CreateWordField (RTLC, One, IRQ0)
IRQ0 = Zero
IRQ0 = (One << (PRTC & 0x0F))
Return (RTLC) /* \_SB_.PCI0.LPCB.LNKC._CRS.RTLC */
}
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
{
CreateWordField (Arg0, One, IRQ0)
FindSetRightBit (IRQ0, Local0)
Local0--
PRTC = Local0
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (PRTC & 0x80)
{
Return (0x09)
}
Else
{
Return (0x0B)
}
}
}
Device (LNKD)
{
Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
Name (_UID, 0x04) // _UID: Unique ID
Method (_DIS, 0, Serialized) // _DIS: Disable Device
{
PRTD = 0x80
}
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
{
IRQ (Level, ActiveLow, Shared, )
{3,4,5,6,7,11,12,14,15}
})
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (RTLD, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{}
})
CreateWordField (RTLD, One, IRQ0)
IRQ0 = Zero
IRQ0 = (One << (PRTD & 0x0F))
Return (RTLD) /* \_SB_.PCI0.LPCB.LNKD._CRS.RTLD */
}
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
{
CreateWordField (Arg0, One, IRQ0)
FindSetRightBit (IRQ0, Local0)
Local0--
PRTD = Local0
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (PRTD & 0x80)
{
Return (0x09)
}
Else
{
Return (0x0B)
}
}
}
Device (LNKE)
{
Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
Name (_UID, 0x05) // _UID: Unique ID
Method (_DIS, 0, Serialized) // _DIS: Disable Device
{
PRTE = 0x80
}
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
{
IRQ (Level, ActiveLow, Shared, )
{3,4,5,6,7,10,12,14,15}
})
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (RTLE, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{}
})
CreateWordField (RTLE, One, IRQ0)
IRQ0 = Zero
IRQ0 = (One << (PRTE & 0x0F))
Return (RTLE) /* \_SB_.PCI0.LPCB.LNKE._CRS.RTLE */
}
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
{
CreateWordField (Arg0, One, IRQ0)
FindSetRightBit (IRQ0, Local0)
Local0--
PRTE = Local0
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (PRTE & 0x80)
{
Return (0x09)
}
Else
{
Return (0x0B)
}
}
}
Device (LNKF)
{
Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
Name (_UID, 0x06) // _UID: Unique ID
Method (_DIS, 0, Serialized) // _DIS: Disable Device
{
PRTF = 0x80
}
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
{
IRQ (Level, ActiveLow, Shared, )
{3,4,5,6,7,11,12,14,15}
})
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (RTLF, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{}
})
CreateWordField (RTLF, One, IRQ0)
IRQ0 = Zero
IRQ0 = (One << (PRTF & 0x0F))
Return (RTLF) /* \_SB_.PCI0.LPCB.LNKF._CRS.RTLF */
}
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
{
CreateWordField (Arg0, One, IRQ0)
FindSetRightBit (IRQ0, Local0)
Local0--
PRTF = Local0
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (PRTF & 0x80)
{
Return (0x09)
}
Else
{
Return (0x0B)
}
}
}
Device (LNKG)
{
Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
Name (_UID, 0x07) // _UID: Unique ID
Method (_DIS, 0, Serialized) // _DIS: Disable Device
{
PRTG = 0x80
}
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
{
IRQ (Level, ActiveLow, Shared, )
{3,4,5,6,7,10,12,14,15}
})
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (RTLG, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{}
})
CreateWordField (RTLG, One, IRQ0)
IRQ0 = Zero
IRQ0 = (One << (PRTG & 0x0F))
Return (RTLG) /* \_SB_.PCI0.LPCB.LNKG._CRS.RTLG */
}
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
{
CreateWordField (Arg0, One, IRQ0)
FindSetRightBit (IRQ0, Local0)
Local0--
PRTG = Local0
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (PRTG & 0x80)
{
Return (0x09)
}
Else
{
Return (0x0B)
}
}
}
Device (LNKH)
{
Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
Name (_UID, 0x08) // _UID: Unique ID
Method (_DIS, 0, Serialized) // _DIS: Disable Device
{
PRTH = 0x80
}
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
{
IRQ (Level, ActiveLow, Shared, )
{3,4,5,6,7,11,12,14,15}
})
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (RTLH, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{}
})
CreateWordField (RTLH, One, IRQ0)
IRQ0 = Zero
IRQ0 = (One << (PRTH & 0x0F))
Return (RTLH) /* \_SB_.PCI0.LPCB.LNKH._CRS.RTLH */
}
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
{
CreateWordField (Arg0, One, IRQ0)
FindSetRightBit (IRQ0, Local0)
Local0--
PRTH = Local0
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (PRTH & 0x80)
{
Return (0x09)
}
Else
{
Return (0x0B)
}
}
}
Device (DMAC)
{
Name (_HID, EisaId ("PNP0200") /* PC-class DMA Controller */) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0000, // Range Minimum
0x0000, // Range Maximum
0x01, // Alignment
0x20, // Length
)
IO (Decode16,
0x0081, // Range Minimum
0x0081, // Range Maximum
0x01, // Alignment
0x11, // Length
)
IO (Decode16,
0x0093, // Range Minimum
0x0093, // Range Maximum
0x01, // Alignment
0x0D, // Length
)
IO (Decode16,
0x00C0, // Range Minimum
0x00C0, // Range Maximum
0x01, // Alignment
0x20, // Length
)
DMA (Compatibility, NotBusMaster, Transfer8_16, )
{4}
})
}
Device (FWH)
{
Name (_HID, EisaId ("INT0800") /* Intel 82802 Firmware Hub Device */) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
Memory32Fixed (ReadOnly,
0xFF000000, // Address Base
0x01000000, // Address Length
)
})
}
Device (HPET)
{
Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID
Name (_CID, EisaId ("PNP0C01") /* System Board */) // _CID: Compatible ID
Name (BUF0, ResourceTemplate ()
{
Memory32Fixed (ReadOnly,
0xFED00000, // Address Base
0x00000400, // Address Length
_Y01)
})
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (HPTE)
{
If (OSYS >= 0x07D1)
{
Return (0x0F)
}
Else
{
Return (0x0B)
}
}
Return (Zero)
}
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
If (HPTE)
{
CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET._Y01._BAS, HPT0) // _BAS: Base Address
If (HPAS == One)
{
HPT0 = 0xFED01000
}
If (HPAS == 0x02)
{
HPT0 = 0xFED02000
}
If (HPAS == 0x03)
{
HPT0 = 0xFED03000
}
}
Return (BUF0) /* \_SB_.PCI0.LPCB.HPET.BUF0 */
}
}
Device (PIC)
{
Name (_HID, EisaId ("PNP0000") /* 8259-compatible Programmable Interrupt Controller */) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0020, // Range Minimum
0x0020, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0024, // Range Minimum
0x0024, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0028, // Range Minimum
0x0028, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x002C, // Range Minimum
0x002C, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0030, // Range Minimum
0x0030, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0034, // Range Minimum
0x0034, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0038, // Range Minimum
0x0038, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x003C, // Range Minimum
0x003C, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00A0, // Range Minimum
0x00A0, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00A4, // Range Minimum
0x00A4, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00A8, // Range Minimum
0x00A8, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00AC, // Range Minimum
0x00AC, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00B0, // Range Minimum
0x00B0, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00B4, // Range Minimum
0x00B4, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00B8, // Range Minimum
0x00B8, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00BC, // Range Minimum
0x00BC, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x04D0, // Range Minimum
0x04D0, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IRQNoFlags ()
{2}
})
}
Device (MATH)
{
Name (_HID, EisaId ("PNP0C04") /* x87-compatible Floating Point Processing Unit */) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x00F0, // Range Minimum
0x00F0, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IRQNoFlags ()
{13}
})
}
Device (LDRC)
{
Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID
Name (_UID, 0x02) // _UID: Unique ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x002E, // Range Minimum
0x002E, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x004E, // Range Minimum
0x004E, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0061, // Range Minimum
0x0061, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0x0063, // Range Minimum
0x0063, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0x0065, // Range Minimum
0x0065, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0x0067, // Range Minimum
0x0067, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0x0080, // Range Minimum
0x0080, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0x0092, // Range Minimum
0x0092, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0x00B2, // Range Minimum
0x00B2, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0800, // Range Minimum
0x0800, // Range Maximum
0x01, // Alignment
0x10, // Length
)
IO (Decode16,
0x0500, // Range Minimum
0x0500, // Range Maximum
0x01, // Alignment
0x80, // Length
)
IO (Decode16,
0x0480, // Range Minimum
0x0480, // Range Maximum
0x01, // Alignment
0x40, // Length
)
})
}
Device (RTC)
{
Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0070, // Range Minimum
0x0070, // Range Maximum
0x01, // Alignment
0x08, // Length
)
})
}
Device (TIMR)
{
Name (_HID, EisaId ("PNP0100") /* PC-class System Timer */) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0040, // Range Minimum
0x0040, // Range Maximum
0x01, // Alignment
0x04, // Length
)
IO (Decode16,
0x0050, // Range Minimum
0x0050, // Range Maximum
0x10, // Alignment
0x04, // Length
)
IRQNoFlags ()
{0}
})
}
Device (PS2K)
{
Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID
Name (_CID, EisaId ("PNP030B")) // _CID: Compatible ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0060, // Range Minimum
0x0060, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0x0064, // Range Minimum
0x0064, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IRQ (Edge, ActiveHigh, Exclusive, )
{1}
})
Method (_STA, 0, NotSerialized) // _STA: Status
{
Return (0x0F)
}
}
Device (PS2M)
{
Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IRQ (Edge, ActiveHigh, Exclusive, )
{12}
})
Method (_STA, 0, NotSerialized) // _STA: Status
{
Return (0x0F)
}
}
}
Device (PATA)
{
Name (_ADR, 0x001F0001) // _ADR: Address
Device (PRID)
{
Name (_ADR, Zero) // _ADR: Address
Method (_GTM, 0, NotSerialized) // _GTM: Get Timing Mode
{
Name (PBUF, Buffer (0x14)
{
/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0010 */ 0x00, 0x00, 0x00, 0x00 /* .... */
})
CreateDWordField (PBUF, Zero, PIO0)
CreateDWordField (PBUF, 0x04, DMA0)
CreateDWordField (PBUF, 0x08, PIO1)
CreateDWordField (PBUF, 0x0C, DMA1)
CreateDWordField (PBUF, 0x10, FLAG)
Return (PBUF) /* \_SB_.PCI0.PATA.PRID._GTM.PBUF */
}
Method (_STM, 3, NotSerialized) // _STM: Set Timing Mode
{
CreateDWordField (Arg0, Zero, PIO0)
CreateDWordField (Arg0, 0x04, DMA0)
CreateDWordField (Arg0, 0x08, PIO1)
CreateDWordField (Arg0, 0x0C, DMA1)
CreateDWordField (Arg0, 0x10, FLAG)
}
Device (DSK0)
{
Name (_ADR, Zero) // _ADR: Address
}
Device (DSK1)
{
Name (_ADR, One) // _ADR: Address
}
}
}
Device (SATA)
{
Name (_ADR, 0x001F0002) // _ADR: Address
Device (PRID)
{
Name (_ADR, Zero) // _ADR: Address
Method (_GTM, 0, NotSerialized) // _GTM: Get Timing Mode
{
Name (PBUF, Buffer (0x14)
{
/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0010 */ 0x00, 0x00, 0x00, 0x00 /* .... */
})
CreateDWordField (PBUF, Zero, PIO0)
CreateDWordField (PBUF, 0x04, DMA0)
CreateDWordField (PBUF, 0x08, PIO1)
CreateDWordField (PBUF, 0x0C, DMA1)
CreateDWordField (PBUF, 0x10, FLAG)
Return (PBUF) /* \_SB_.PCI0.SATA.PRID._GTM.PBUF */
}
Method (_STM, 3, NotSerialized) // _STM: Set Timing Mode
{
CreateDWordField (Arg0, Zero, PIO0)
CreateDWordField (Arg0, 0x04, DMA0)
CreateDWordField (Arg0, 0x08, PIO1)
CreateDWordField (Arg0, 0x0C, DMA1)
CreateDWordField (Arg0, 0x10, FLAG)
}
Device (DSK0)
{
Name (_ADR, Zero) // _ADR: Address
}
Device (DSK1)
{
Name (_ADR, One) // _ADR: Address
}
}
}
Device (SBUS)
{
Name (_ADR, 0x001F0003) // _ADR: Address
}
}
}
Name (_S0, Package (0x04) // _S0_: S0 System State
{
Zero,
Zero,
Zero,
Zero
})
Name (_S3, Package (0x04) // _S3_: S3 System State
{
0x05,
0x05,
Zero,
Zero
})
Name (_S4, Package (0x04) // _S4_: S4 System State
{
0x06,
0x06,
Zero,
Zero
})
Name (_S5, Package (0x04) // _S5_: S5 System State
{
0x07,
0x07,
Zero,
Zero
})
}