| |
| *** Pre-CBMEM romstage console overflowed, log truncated! *** |
| arting SandyBridge RAM training (1). |
| Trying CAS 9, tCK 384. |
| Found compatible clock, CAS pair. |
| Selected DRAM frequency: 666 MHz |
| Selected CAS latency : 9T |
| PLL busy... done in 70 us |
| MCU frequency is set at : 666 MHz |
| Done dimm mapping |
| Update PCI-E configuration space: |
| PCI(0, 0, 0)[a0] = 0 |
| PCI(0, 0, 0)[a4] = 4 |
| PCI(0, 0, 0)[bc] = 82a00000 |
| PCI(0, 0, 0)[a8] = 7b600000 |
| PCI(0, 0, 0)[ac] = 4 |
| PCI(0, 0, 0)[b8] = 80000000 |
| PCI(0, 0, 0)[b0] = 80a00000 |
| PCI(0, 0, 0)[b4] = 80800000 |
| PCI(0, 0, 0)[7c] = 7f |
| PCI(0, 0, 0)[70] = fe000000 |
| PCI(0, 0, 0)[74] = 3 |
| PCI(0, 0, 0)[78] = fe000c00 |
| Done memory map |
| Done io registers |
| t123: 1912, 9120, 500 |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : NO |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Recovery |
| ME: Current Operation State : Bring up |
| ME: Current Operation Mode : Normal |
| ME: Error Code : No Error |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Pseudo-global reset |
| ME: Progress Phase State : 0x4e |
| ME: FWS2: 0x164e0002 |
| ME: Bist in progress: 0x0 |
| ME: ICC Status : 0x1 |
| ME: Invoke MEBx : 0x0 |
| ME: CPU replaced : 0x0 |
| ME: MBP ready : 0x0 |
| ME: MFS failure : 0x0 |
| ME: Warm reset req : 0x0 |
| ME: CPU repl valid : 0x0 |
| ME: (Reserved) : 0x0 |
| ME: FW update req : 0x0 |
| ME: (Reserved) : 0x0 |
| ME: Current state : 0x4e |
| ME: Current PM event: 0x6 |
| ME: Progress code : 0x1 |
| Waited long enough, or CPU was not replaced, continue... |
| PASSED! Tell ME that DRAM is ready |
| ME: FWS2: 0x162c0002 |
| ME: Bist in progress: 0x0 |
| ME: ICC Status : 0x1 |
| ME: Invoke MEBx : 0x0 |
| ME: CPU replaced : 0x0 |
| ME: MBP ready : 0x0 |
| ME: MFS failure : 0x0 |
| ME: Warm reset req : 0x0 |
| ME: CPU repl valid : 0x0 |
| ME: (Reserved) : 0x0 |
| ME: FW update req : 0x0 |
| ME: (Reserved) : 0x0 |
| ME: Current state : 0x2c |
| ME: Current PM event: 0x6 |
| ME: Progress code : 0x1 |
| ME: Requested BIOS Action: Continue to boot |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : NO |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Recovery |
| ME: Current Operation State : Bring up |
| ME: Current Operation Mode : Normal |
| ME: Error Code : No Error |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Pseudo-global reset |
| ME: Progress Phase State : 0x2c |
| memcfg DDR3 ref clock 133 MHz |
| memcfg DDR3 clock 1330 MHz |
| memcfg channel assignment: A: 0, B 1, C 2 |
| memcfg channel[0] config (00620020): |
| ECC inactive |
| enhanced interleave mode on |
| rank interleave on |
| DIMMA 8192 MB width x8 dual rank, selected |
| DIMMB 0 MB width x8 single rank |
| memcfg channel[1] config (00620020): |
| ECC inactive |
| enhanced interleave mode on |
| rank interleave on |
| DIMMA 8192 MB width x8 dual rank, selected |
| DIMMB 0 MB width x8 single rank |
| CBMEM: |
| IMD: root @ 7ffff000 254 entries. |
| IMD: root @ 7fffec00 62 entries. |
| CBMEM entry for DIMM info: 0x7fffe960 |
| MTRR Range: Start=ff800000 End=0 (Size 800000) |
| MTRR Range: Start=0 End=1000000 (Size 1000000) |
| MTRR Range: Start=7f800000 End=80000000 (Size 800000) |
| MTRR Range: Start=80000000 End=80800000 (Size 800000) |
| CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) |
| CBFS: Locating 'fallback/ramstage' |
| CBFS: Found @ offset 2ff00 size 14d12 |
| Decompressing stage fallback/ramstage @ 0x7ff99fc0 (252048 bytes) |
| Loading module at 7ff9a000 with entry 7ff9a000. filesize: 0x2baf0 memsize: 0x3d850 |
| Processing 2883 relocs. Offset value of 0x7fe9a000 |
| |
| |
| coreboot-4.6-1144-gb3dfcb863c Mon Aug 21 20:37:57 UTC 2017 ramstage starting... |
| Normal boot. |
| BS: BS_PRE_DEVICE times (us): entry 0 run 0 exit 0 |
| BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 1 exit 0 |
| Enumerating buses... |
| Show all devs... Before device enumeration. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 1 |
| PCI: 00:1c.4: enabled 0 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 00ff.1: enabled 0 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 0 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| Compare with tree... |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 1 |
| PCI: 00:1c.4: enabled 0 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 00ff.1: enabled 0 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 0 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| Root Device scanning... |
| root_dev_scan_bus for Root Device |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| DOMAIN: 0000 scanning... |
| PCI: pci_scan_bus for bus 00 |
| PCI: 00:00.0 [8086/0104] ops |
| PCI: 00:00.0 [8086/0104] enabled |
| Capability: type 0x0d @ 0x88 |
| Capability: type 0x01 @ 0x80 |
| Capability: type 0x05 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| Capability: type 0x0d @ 0x88 |
| Capability: type 0x01 @ 0x80 |
| Capability: type 0x05 @ 0x90 |
| Capability: type 0x10 @ 0xa0 |
| PCI: 00:01.0 subordinate bus PCI Express |
| PCI: 00:01.0 [8086/0101] disabled |
| PCI: 00:02.0 [8086/0000] ops |
| PCI: 00:02.0 [8086/0116] enabled |
| PCI: 00:04.0 [8086/0103] enabled |
| PCI: 00:16.0 [8086/1c3a] ops |
| PCI: 00:16.0 [8086/1c3a] enabled |
| PCI: 00:16.1: Disabling device |
| PCI: 00:16.1 [8086/1c3b] disabled No operations |
| PCI: 00:16.2: Disabling device |
| PCI: 00:16.2 [8086/1c3c] disabled No operations |
| PCI: 00:16.3: Disabling device |
| PCI: 00:16.3 [8086/1c3d] disabled No operations |
| PCI: 00:19.0 [8086/1502] enabled |
| PCI: 00:1a.0 [8086/0000] ops |
| PCI: 00:1a.0 [8086/1c2d] enabled |
| PCI: 00:1b.0 [8086/0000] ops |
| PCI: 00:1b.0 [8086/1c20] enabled |
| PCH: PCIe Root Port coalescing is enabled |
| PCI: 00:1c.0 [8086/0000] bus ops |
| PCI: 00:1c.0 [8086/1c10] enabled |
| PCI: 00:1c.1 [8086/0000] bus ops |
| PCI: 00:1c.1 [8086/1c12] enabled |
| PCI: 00:1c.2 [8086/0000] bus ops |
| PCI: 00:1c.2 [8086/1c14] enabled |
| PCI: 00:1c.3 [8086/0000] bus ops |
| PCI: 00:1c.3 [8086/1c16] enabled |
| PCI: 00:1c.4: Disabling device |
| PCI: 00:1c.4: check set enabled |
| PCI: 00:1c.4 [8086/0000] bus ops |
| PCI: 00:1c.4 [8086/1c18] disabled |
| PCI: 00:1c.5: Disabling device |
| PCI: 00:1c.5 [8086/0000] bus ops |
| PCI: 00:1c.5 [8086/1c1a] disabled |
| PCI: 00:1c.6: Disabling device |
| PCI: 00:1c.6 [8086/0000] bus ops |
| PCI: 00:1c.6 [8086/1c1c] disabled |
| PCI: 00:1c.7: Disabling device |
| PCH: RPFN 0x76543210 -> 0xfedc3210 |
| PCI: 00:1d.0 [8086/0000] ops |
| PCI: 00:1d.0 [8086/1c26] enabled |
| PCI: 00:1e.0: Disabling device |
| PCI: 00:1e.0 [8086/2448] bus ops |
| PCI: 00:1e.0 [8086/2448] disabled |
| PCI: 00:1f.0 [8086/0000] bus ops |
| PCI: 00:1f.0 [8086/1c4f] enabled |
| PCI: 00:1f.2 [8086/0000] ops |
| PCI: 00:1f.2 [8086/1c01] enabled |
| PCI: 00:1f.3: Disabling device |
| PCI: 00:1f.3 [8086/0000] bus ops |
| PCI: 00:1f.3 [8086/1c22] disabled |
| PCI: 00:1f.5: Disabling device |
| PCI: 00:1f.5 [8086/1c09] disabled No operations |
| PCI: 00:1f.6: Disabling device |
| PCI: 00:1f.6 [8086/1c24] disabled No operations |
| PCI: 00:1c.0 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.0 |
| PCI: pci_scan_bus for bus 01 |
| scan_bus: scanning of bus PCI: 00:1c.0 took 54 usecs |
| PCI: 00:1c.1 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.1 |
| PCI: pci_scan_bus for bus 02 |
| scan_bus: scanning of bus PCI: 00:1c.1 took 53 usecs |
| PCI: 00:1c.2 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.2 |
| PCI: pci_scan_bus for bus 03 |
| PCI: 03:00.0 [197b/2380] enabled |
| PCI: 03:00.1 [197b/2392] enabled |
| PCI: 03:00.2 [197b/2391] enabled |
| PCI: 03:00.3 [197b/2393] enabled |
| PCI: 03:00.4 [197b/2394] enabled |
| Capability: type 0x01 @ 0x44 |
| Capability: type 0x10 @ 0x80 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpoint |
| ASPM: Enabled None |
| Capability: type 0x01 @ 0xa4 |
| Capability: type 0x10 @ 0x80 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpoint |
| ASPM: Enabled None |
| Capability: type 0x01 @ 0xa4 |
| Capability: type 0x10 @ 0x80 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpoint |
| ASPM: Enabled None |
| Capability: type 0x01 @ 0xa4 |
| Capability: type 0x10 @ 0x80 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpoint |
| ASPM: Enabled None |
| Capability: type 0x01 @ 0xa4 |
| Capability: type 0x10 @ 0x80 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpoint |
| ASPM: Enabled None |
| scan_bus: scanning of bus PCI: 00:1c.2 took 773 usecs |
| PCI: 00:1c.3 scanning... |
| do_pci_scan_bridge for PCI: 00:1c.3 |
| PCI: pci_scan_bus for bus 04 |
| PCI: 04:00.0 [168c/0030] enabled |
| Capability: type 0x01 @ 0x40 |
| Capability: type 0x05 @ 0x50 |
| Capability: type 0x10 @ 0x70 |
| Capability: type 0x10 @ 0x40 |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpoint |
| ASPM: Enabled L0s and L1 |
| scan_bus: scanning of bus PCI: 00:1c.3 took 205 usecs |
| PCI: 00:1f.0 scanning... |
| scan_lpc_bus for PCI: 00:1f.0 |
| KBC1126: initialize fan control...KBC1126: fan control initialized. |
| PNP: 00ff.1 disabled |
| scan_lpc_bus for PCI: 00:1f.0 done |
| scan_bus: scanning of bus PCI: 00:1f.0 took 7348 usecs |
| scan_bus: scanning of bus DOMAIN: 0000 took 8873 usecs |
| root_dev_scan_bus for Root Device done |
| scan_bus: scanning of bus Root Device took 8884 usecs |
| done |
| BS: BS_DEV_ENUMERATE times (us): entry 0 run 8998 exit 0 |
| found VGA at PCI: 00:02.0 |
| Setting up VGA for PCI: 00:02.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| Allocating resources... |
| Reading resources... |
| Root Device read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 |
| Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000. |
| PCI: 00:1c.0 read_resources bus 1 link: 0 |
| PCI: 00:1c.0 read_resources bus 1 link: 0 done |
| PCI: 00:1c.1 read_resources bus 2 link: 0 |
| PCI: 00:1c.1 read_resources bus 2 link: 0 done |
| PCI: 00:1c.2 read_resources bus 3 link: 0 |
| PCI: 00:1c.2 read_resources bus 3 link: 0 done |
| PCI: 00:1c.3 read_resources bus 4 link: 0 |
| PCI: 00:1c.3 read_resources bus 4 link: 0 done |
| PCI: 00:1f.0 read_resources bus 0 link: 0 |
| PCI: 00:1f.0 read_resources bus 0 link: 0 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 done |
| Root Device read_resources bus 0 link: 0 done |
| Done reading resources. |
| Show resources in subtree (Root Device)...After reading. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: acac |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 |
| PCI: 00:00.0 |
| PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 |
| PCI: 00:01.0 |
| PCI: 00:02.0 |
| PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18 |
| PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20 |
| PCI: 00:04.0 |
| PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:16.0 |
| PCI: 00:16.0 resource base 0 size 10 align 12 gran 4 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:19.0 |
| PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 |
| PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 |
| PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 |
| PCI: 00:1a.0 |
| PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:1c.0 |
| PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 00:1c.1 |
| PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 00:1c.2 child on link 0 PCI: 03:00.0 |
| PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 03:00.0 |
| PCI: 03:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 10 |
| PCI: 03:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14 |
| PCI: 03:00.1 |
| PCI: 03:00.1 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| PCI: 03:00.1 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30 |
| PCI: 03:00.2 |
| PCI: 03:00.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| PCI: 03:00.3 |
| PCI: 03:00.3 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| PCI: 03:00.4 |
| PCI: 03:00.4 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| Unknown device path type: 0 |
| |
| Unknown device path type: 0 |
| resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10 |
| Unknown device path type: 0 |
| resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14 |
| Unknown device path type: 0 |
| resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18 |
| PCI: 00:1c.3 child on link 0 PCI: 04:00.0 |
| PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 04:00.0 |
| PCI: 04:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10 |
| PCI: 04:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30 |
| PCI: 00:1c.4 |
| PCI: 00:1c.5 |
| PCI: 00:1c.6 |
| PCI: 00:1c.7 |
| PCI: 00:1d.0 |
| PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| PCI: 00:1e.0 |
| PCI: 00:1f.0 child on link 0 PNP: 00ff.1 |
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PCI: 00:1f.0 resource base fe00 size fc align 0 gran 0 limit 0 flags c0040100 index 10000200 |
| PNP: 00ff.1 |
| PCI: 00:1f.2 |
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 |
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 |
| PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 |
| PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c |
| PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 |
| PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24 |
| PCI: 00:1f.3 |
| PCI: 00:1f.5 |
| PCI: 00:1f.6 |
| DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff |
| PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| Unknown device path type: 0 |
| 18 * [0x0 - 0xfff] io |
| PCI: 00:1c.2 io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.2 1c * [0x0 - 0xfff] io |
| PCI: 00:02.0 20 * [0x1000 - 0x103f] io |
| PCI: 00:19.0 18 * [0x1040 - 0x105f] io |
| PCI: 00:1f.2 20 * [0x1060 - 0x107f] io |
| PCI: 00:1f.2 10 * [0x1080 - 0x1087] io |
| PCI: 00:1f.2 18 * [0x1088 - 0x108f] io |
| PCI: 00:1f.2 14 * [0x1090 - 0x1093] io |
| PCI: 00:1f.2 1c * [0x1094 - 0x1097] io |
| DOMAIN: 0000 io: base: 1098 size: 1098 align: 12 gran: 0 limit: ffff done |
| DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff |
| PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| Unknown device path type: 0 |
| 14 * [0x0 - 0x7fffff] prefmem |
| PCI: 00:1c.2 prefmem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done |
| PCI: 00:1c.2 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| Unknown device path type: 0 |
| 10 * [0x0 - 0x7fffff] mem |
| PCI: 03:00.1 30 * [0x800000 - 0x80ffff] mem |
| PCI: 03:00.0 10 * [0x810000 - 0x8107ff] mem |
| PCI: 03:00.0 14 * [0x811000 - 0x8110ff] mem |
| PCI: 03:00.1 10 * [0x812000 - 0x8120ff] mem |
| PCI: 03:00.2 10 * [0x813000 - 0x8130ff] mem |
| PCI: 03:00.3 10 * [0x814000 - 0x8140ff] mem |
| PCI: 03:00.4 10 * [0x815000 - 0x8150ff] mem |
| PCI: 00:1c.2 mem: base: 815100 size: 900000 align: 22 gran: 20 limit: ffffffff done |
| PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.3 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 04:00.0 10 * [0x0 - 0x1ffff] mem |
| PCI: 04:00.0 30 * [0x20000 - 0x2ffff] mem |
| PCI: 00:1c.3 mem: base: 30000 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem |
| PCI: 00:1c.2 20 * [0x10000000 - 0x108fffff] mem |
| PCI: 00:1c.2 24 * [0x10c00000 - 0x113fffff] prefmem |
| PCI: 00:02.0 10 * [0x11400000 - 0x117fffff] mem |
| PCI: 00:1c.3 20 * [0x11800000 - 0x118fffff] mem |
| PCI: 00:19.0 10 * [0x11900000 - 0x1191ffff] mem |
| PCI: 00:04.0 10 * [0x11920000 - 0x11927fff] mem |
| PCI: 00:1b.0 10 * [0x11928000 - 0x1192bfff] mem |
| PCI: 00:19.0 14 * [0x1192c000 - 0x1192cfff] mem |
| PCI: 00:1f.2 24 * [0x1192d000 - 0x1192d7ff] mem |
| PCI: 00:1a.0 10 * [0x1192e000 - 0x1192e3ff] mem |
| PCI: 00:1d.0 10 * [0x1192f000 - 0x1192f3ff] mem |
| PCI: 00:16.0 10 * [0x11930000 - 0x1193000f] mem |
| DOMAIN: 0000 mem: base: 11930010 size: 11930010 align: 28 gran: 0 limit: ffffffff done |
| avoid_fixed_resources: DOMAIN: 0000 |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff |
| constrain_resources: PCI: 00:00.0 60 base f8000000 limit fbffffff mem (fixed) |
| constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed) |
| constrain_resources: PCI: 00:1f.0 10000200 base 0000fe00 limit 0000fefb io (fixed) |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000fdff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 base e0000000 limit f7ffffff |
| Setting resources... |
| DOMAIN: 0000 io: base:1000 size:1098 align:12 gran:0 limit:fdff |
| PCI: 00:1c.2 1c * [0x1000 - 0x1fff] io |
| PCI: 00:02.0 20 * [0x2000 - 0x203f] io |
| PCI: 00:19.0 18 * [0x2040 - 0x205f] io |
| PCI: 00:1f.2 20 * [0x2060 - 0x207f] io |
| PCI: 00:1f.2 10 * [0x2080 - 0x2087] io |
| PCI: 00:1f.2 18 * [0x2088 - 0x208f] io |
| PCI: 00:1f.2 14 * [0x2090 - 0x2093] io |
| PCI: 00:1f.2 1c * [0x2094 - 0x2097] io |
| DOMAIN: 0000 io: next_base: 2098 size: 1098 align: 12 gran: 0 done |
| PCI: 00:1c.0 io: base:fdff size:0 align:12 gran:12 limit:fdff |
| PCI: 00:1c.0 io: next_base: fdff size: 0 align: 12 gran: 12 done |
| PCI: 00:1c.1 io: base:fdff size:0 align:12 gran:12 limit:fdff |
| PCI: 00:1c.1 io: next_base: fdff size: 0 align: 12 gran: 12 done |
| PCI: 00:1c.2 io: base:1000 size:1000 align:12 gran:12 limit:1fff |
| Unknown device path type: 0 |
| 18 * [0x1000 - 0x1fff] io |
| PCI: 00:1c.2 io: next_base: 2000 size: 1000 align: 12 gran: 12 done |
| PCI: 00:1c.3 io: base:fdff size:0 align:12 gran:12 limit:fdff |
| PCI: 00:1c.3 io: next_base: fdff size: 0 align: 12 gran: 12 done |
| DOMAIN: 0000 mem: base:e0000000 size:11930010 align:28 gran:0 limit:f7ffffff |
| PCI: 00:02.0 18 * [0xe0000000 - 0xefffffff] prefmem |
| PCI: 00:1c.2 20 * [0xf0000000 - 0xf08fffff] mem |
| PCI: 00:1c.2 24 * [0xf0c00000 - 0xf13fffff] prefmem |
| PCI: 00:02.0 10 * [0xf1400000 - 0xf17fffff] mem |
| PCI: 00:1c.3 20 * [0xf1800000 - 0xf18fffff] mem |
| PCI: 00:19.0 10 * [0xf1900000 - 0xf191ffff] mem |
| PCI: 00:04.0 10 * [0xf1920000 - 0xf1927fff] mem |
| PCI: 00:1b.0 10 * [0xf1928000 - 0xf192bfff] mem |
| PCI: 00:19.0 14 * [0xf192c000 - 0xf192cfff] mem |
| PCI: 00:1f.2 24 * [0xf192d000 - 0xf192d7ff] mem |
| PCI: 00:1a.0 10 * [0xf192e000 - 0xf192e3ff] mem |
| PCI: 00:1d.0 10 * [0xf192f000 - 0xf192f3ff] mem |
| PCI: 00:16.0 10 * [0xf1930000 - 0xf193000f] mem |
| DOMAIN: 0000 mem: next_base: f1930010 size: 11930010 align: 28 gran: 0 done |
| PCI: 00:1c.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:1c.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.0 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:1c.0 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.1 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:1c.1 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.1 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:1c.1 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.2 prefmem: base:f0c00000 size:800000 align:22 gran:20 limit:f13fffff |
| Unknown device path type: 0 |
| 14 * [0xf0c00000 - 0xf13fffff] prefmem |
| PCI: 00:1c.2 prefmem: next_base: f1400000 size: 800000 align: 22 gran: 20 done |
| PCI: 00:1c.2 mem: base:f0000000 size:900000 align:22 gran:20 limit:f08fffff |
| Unknown device path type: 0 |
| 10 * [0xf0000000 - 0xf07fffff] mem |
| PCI: 03:00.1 30 * [0xf0800000 - 0xf080ffff] mem |
| PCI: 03:00.0 10 * [0xf0810000 - 0xf08107ff] mem |
| PCI: 03:00.0 14 * [0xf0811000 - 0xf08110ff] mem |
| PCI: 03:00.1 10 * [0xf0812000 - 0xf08120ff] mem |
| PCI: 03:00.2 10 * [0xf0813000 - 0xf08130ff] mem |
| PCI: 03:00.3 10 * [0xf0814000 - 0xf08140ff] mem |
| PCI: 03:00.4 10 * [0xf0815000 - 0xf08150ff] mem |
| PCI: 00:1c.2 mem: next_base: f0815100 size: 900000 align: 22 gran: 20 done |
| PCI: 00:1c.3 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:1c.3 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:1c.3 mem: base:f1800000 size:100000 align:20 gran:20 limit:f18fffff |
| PCI: 04:00.0 10 * [0xf1800000 - 0xf181ffff] mem |
| PCI: 04:00.0 30 * [0xf1820000 - 0xf182ffff] mem |
| PCI: 00:1c.3 mem: next_base: f1830000 size: 100000 align: 20 gran: 20 done |
| Root Device assign_resources, bus 0 link: 0 |
| TOUUD 0x47b600000 TOLUD 0x82a00000 TOM 0x400000000 |
| MEBASE 0x3fe000000 |
| IGD decoded, subtracting 32M UMA and 2M GTT |
| TSEG base 0x80000000 size 8M |
| Available memory below 4GB: 2048M |
| Available memory above 4GB: 14262M |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| PCI: 00:02.0 10 <- [0x00f1400000 - 0x00f17fffff] size 0x00400000 gran 0x16 mem64 |
| PCI: 00:02.0 18 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem64 |
| PCI: 00:02.0 20 <- [0x0000002000 - 0x000000203f] size 0x00000040 gran 0x06 io |
| PCI: 00:04.0 10 <- [0x00f1920000 - 0x00f1927fff] size 0x00008000 gran 0x0f mem64 |
| PCI: 00:16.0 10 <- [0x00f1930000 - 0x00f193000f] size 0x00000010 gran 0x04 mem64 |
| PCI: 00:19.0 10 <- [0x00f1900000 - 0x00f191ffff] size 0x00020000 gran 0x11 mem |
| PCI: 00:19.0 14 <- [0x00f192c000 - 0x00f192cfff] size 0x00001000 gran 0x0c mem |
| PCI: 00:19.0 18 <- [0x0000002040 - 0x000000205f] size 0x00000020 gran 0x05 io |
| PCI: 00:1a.0 10 <- [0x00f192e000 - 0x00f192e3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1b.0 10 <- [0x00f1928000 - 0x00f192bfff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:1c.0 1c <- [0x000000fdff - 0x000000fdfe] size 0x00000000 gran 0x0c bus 01 io |
| PCI: 00:1c.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 prefmem |
| PCI: 00:1c.0 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 mem |
| PCI: 00:1c.1 1c <- [0x000000fdff - 0x000000fdfe] size 0x00000000 gran 0x0c bus 02 io |
| PCI: 00:1c.1 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem |
| PCI: 00:1c.1 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 mem |
| PCI: 00:1c.2 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 03 io |
| PCI: 00:1c.2 24 <- [0x00f0c00000 - 0x00f13fffff] size 0x00800000 gran 0x14 bus 03 prefmem |
| PCI: 00:1c.2 20 <- [0x00f0000000 - 0x00f08fffff] size 0x00900000 gran 0x14 bus 03 mem |
| PCI: 00:1c.2 assign_resources, bus 3 link: 0 |
| PCI: 03:00.0 10 <- [0x00f0810000 - 0x00f08107ff] size 0x00000800 gran 0x0b mem |
| PCI: 03:00.0 14 <- [0x00f0811000 - 0x00f08110ff] size 0x00000100 gran 0x08 mem |
| PCI: 03:00.1 10 <- [0x00f0812000 - 0x00f08120ff] size 0x00000100 gran 0x08 mem |
| PCI: 03:00.1 30 <- [0x00f0800000 - 0x00f080ffff] size 0x00010000 gran 0x10 romem |
| PCI: 03:00.2 10 <- [0x00f0813000 - 0x00f08130ff] size 0x00000100 gran 0x08 mem |
| PCI: 03:00.3 10 <- [0x00f0814000 - 0x00f08140ff] size 0x00000100 gran 0x08 mem |
| PCI: 03:00.4 10 <- [0x00f0815000 - 0x00f08150ff] size 0x00000100 gran 0x08 mem |
| Unknown device path type: 0 |
| missing set_resources |
| PCI: 00:1c.2 assign_resources, bus 3 link: 0 |
| PCI: 00:1c.3 1c <- [0x000000fdff - 0x000000fdfe] size 0x00000000 gran 0x0c bus 04 io |
| PCI: 00:1c.3 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 04 prefmem |
| PCI: 00:1c.3 20 <- [0x00f1800000 - 0x00f18fffff] size 0x00100000 gran 0x14 bus 04 mem |
| PCI: 00:1c.3 assign_resources, bus 4 link: 0 |
| PCI: 04:00.0 10 <- [0x00f1800000 - 0x00f181ffff] size 0x00020000 gran 0x11 mem64 |
| PCI: 04:00.0 30 <- [0x00f1820000 - 0x00f182ffff] size 0x00010000 gran 0x10 romem |
| PCI: 00:1c.3 assign_resources, bus 4 link: 0 |
| PCI: 00:1d.0 10 <- [0x00f192f000 - 0x00f192f3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1f.0 assign_resources, bus 0 link: 0 |
| PCI: 00:1f.0 assign_resources, bus 0 link: 0 |
| PCI: 00:1f.2 10 <- [0x0000002080 - 0x0000002087] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 14 <- [0x0000002090 - 0x0000002093] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 18 <- [0x0000002088 - 0x000000208f] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 1c <- [0x0000002094 - 0x0000002097] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 20 <- [0x0000002060 - 0x000000207f] size 0x00000020 gran 0x05 io |
| PCI: 00:1f.2 24 <- [0x00f192d000 - 0x00f192d7ff] size 0x00000800 gran 0x0b mem |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| Root Device assign_resources, bus 0 link: 0 |
| Done setting resources. |
| Show resources in subtree (Root Device)...After assigning values. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: acac |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 1000 size 1098 align 12 gran 0 limit fdff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base e0000000 size 11930010 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100 |
| DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 |
| DOMAIN: 0000 resource base 100000 size 7ff00000 align 0 gran 0 limit 0 flags e0004200 index 4 |
| DOMAIN: 0000 resource base 100000000 size 37b600000 align 0 gran 0 limit 0 flags e0004200 index 5 |
| DOMAIN: 0000 resource base 80000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6 |
| DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7 |
| DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8 |
| DOMAIN: 0000 resource base 20000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index 9 |
| DOMAIN: 0000 resource base 40000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index a |
| PCI: 00:00.0 |
| PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 |
| PCI: 00:01.0 |
| PCI: 00:02.0 |
| PCI: 00:02.0 resource base f1400000 size 400000 align 22 gran 22 limit f17fffff flags 60000201 index 10 |
| PCI: 00:02.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001201 index 18 |
| PCI: 00:02.0 resource base 2000 size 40 align 6 gran 6 limit 203f flags 60000100 index 20 |
| PCI: 00:04.0 |
| PCI: 00:04.0 resource base f1920000 size 8000 align 15 gran 15 limit f1927fff flags 60000201 index 10 |
| PCI: 00:16.0 |
| PCI: 00:16.0 resource base f1930000 size 10 align 12 gran 4 limit f193000f flags 60000201 index 10 |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:19.0 |
| PCI: 00:19.0 resource base f1900000 size 20000 align 17 gran 17 limit f191ffff flags 60000200 index 10 |
| PCI: 00:19.0 resource base f192c000 size 1000 align 12 gran 12 limit f192cfff flags 60000200 index 14 |
| PCI: 00:19.0 resource base 2040 size 20 align 5 gran 5 limit 205f flags 60000100 index 18 |
| PCI: 00:1a.0 |
| PCI: 00:1a.0 resource base f192e000 size 400 align 12 gran 10 limit f192e3ff flags 60000200 index 10 |
| PCI: 00:1b.0 |
| PCI: 00:1b.0 resource base f1928000 size 4000 align 14 gran 14 limit f192bfff flags 60000201 index 10 |
| PCI: 00:1c.0 |
| PCI: 00:1c.0 resource base fdff size 0 align 12 gran 12 limit fdff flags 60080102 index 1c |
| PCI: 00:1c.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 |
| PCI: 00:1c.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20 |
| PCI: 00:1c.1 |
| PCI: 00:1c.1 resource base fdff size 0 align 12 gran 12 limit fdff flags 60080102 index 1c |
| PCI: 00:1c.1 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 |
| PCI: 00:1c.1 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20 |
| PCI: 00:1c.2 child on link 0 PCI: 03:00.0 |
| PCI: 00:1c.2 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c |
| PCI: 00:1c.2 resource base f0c00000 size 800000 align 22 gran 20 limit f13fffff flags 60081202 index 24 |
| PCI: 00:1c.2 resource base f0000000 size 900000 align 22 gran 20 limit f08fffff flags 60080202 index 20 |
| PCI: 03:00.0 |
| PCI: 03:00.0 resource base f0810000 size 800 align 12 gran 11 limit f08107ff flags 60000200 index 10 |
| PCI: 03:00.0 resource base f0811000 size 100 align 12 gran 8 limit f08110ff flags 60000200 index 14 |
| PCI: 03:00.1 |
| PCI: 03:00.1 resource base f0812000 size 100 align 12 gran 8 limit f08120ff flags 60000200 index 10 |
| PCI: 03:00.1 resource base f0800000 size 10000 align 16 gran 16 limit f080ffff flags 60002200 index 30 |
| PCI: 03:00.2 |
| PCI: 03:00.2 resource base f0813000 size 100 align 12 gran 8 limit f08130ff flags 60000200 index 10 |
| PCI: 03:00.3 |
| PCI: 03:00.3 resource base f0814000 size 100 align 12 gran 8 limit f08140ff flags 60000200 index 10 |
| PCI: 03:00.4 |
| PCI: 03:00.4 resource base f0815000 size 100 align 12 gran 8 limit f08150ff flags 60000200 index 10 |
| Unknown device path type: 0 |
| |
| Unknown device path type: 0 |
| resource base f0000000 size 800000 align 22 gran 22 limit f07fffff flags 40000200 index 10 |
| Unknown device path type: 0 |
| resource base f0c00000 size 800000 align 22 gran 22 limit f13fffff flags 40001200 index 14 |
| Unknown device path type: 0 |
| resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 40000100 index 18 |
| PCI: 00:1c.3 child on link 0 PCI: 04:00.0 |
| PCI: 00:1c.3 resource base fdff size 0 align 12 gran 12 limit fdff flags 60080102 index 1c |
| PCI: 00:1c.3 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 |
| PCI: 00:1c.3 resource base f1800000 size 100000 align 20 gran 20 limit f18fffff flags 60080202 index 20 |
| PCI: 04:00.0 |
| PCI: 04:00.0 resource base f1800000 size 20000 align 17 gran 17 limit f181ffff flags 60000201 index 10 |
| PCI: 04:00.0 resource base f1820000 size 10000 align 16 gran 16 limit f182ffff flags 60002200 index 30 |
| PCI: 00:1c.4 |
| PCI: 00:1c.5 |
| PCI: 00:1c.6 |
| PCI: 00:1c.7 |
| PCI: 00:1d.0 |
| PCI: 00:1d.0 resource base f192f000 size 400 align 12 gran 10 limit f192f3ff flags 60000200 index 10 |
| PCI: 00:1e.0 |
| PCI: 00:1f.0 child on link 0 PNP: 00ff.1 |
| PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PCI: 00:1f.0 resource base fe00 size fc align 0 gran 0 limit 0 flags c0040100 index 10000200 |
| PNP: 00ff.1 |
| PCI: 00:1f.2 |
| PCI: 00:1f.2 resource base 2080 size 8 align 3 gran 3 limit 2087 flags 60000100 index 10 |
| PCI: 00:1f.2 resource base 2090 size 4 align 2 gran 2 limit 2093 flags 60000100 index 14 |
| PCI: 00:1f.2 resource base 2088 size 8 align 3 gran 3 limit 208f flags 60000100 index 18 |
| PCI: 00:1f.2 resource base 2094 size 4 align 2 gran 2 limit 2097 flags 60000100 index 1c |
| PCI: 00:1f.2 resource base 2060 size 20 align 5 gran 5 limit 207f flags 60000100 index 20 |
| PCI: 00:1f.2 resource base f192d000 size 800 align 12 gran 11 limit f192d7ff flags 60000200 index 24 |
| PCI: 00:1f.3 |
| PCI: 00:1f.5 |
| PCI: 00:1f.6 |
| Done allocating resources. |
| BS: BS_DEV_RESOURCES times (us): entry 0 run 3017 exit 0 |
| Enabling resources... |
| PCI: 00:00.0 subsystem <- 103c/162a |
| PCI: 00:00.0 cmd <- 06 |
| PCI: 00:02.0 subsystem <- 103c/162a |
| PCI: 00:02.0 cmd <- 03 |
| PCI: 00:04.0 cmd <- 02 |
| PCI: 00:16.0 subsystem <- 103c/162a |
| PCI: 00:16.0 cmd <- 02 |
| PCI: 00:19.0 subsystem <- 103c/162a |
| PCI: 00:19.0 cmd <- 103 |
| PCI: 00:1a.0 subsystem <- 103c/162a |
| PCI: 00:1a.0 cmd <- 102 |
| PCI: 00:1b.0 subsystem <- 103c/162a |
| PCI: 00:1b.0 cmd <- 102 |
| PCI: 00:1c.0 bridge ctrl <- 0003 |
| PCI: 00:1c.0 subsystem <- 103c/162a |
| PCI: 00:1c.0 cmd <- 100 |
| PCI: 00:1c.1 bridge ctrl <- 0003 |
| PCI: 00:1c.1 subsystem <- 103c/162a |
| PCI: 00:1c.1 cmd <- 100 |
| PCI: 00:1c.2 bridge ctrl <- 0003 |
| PCI: 00:1c.2 subsystem <- 103c/162a |
| PCI: 00:1c.2 cmd <- 107 |
| PCI: 00:1c.3 bridge ctrl <- 0003 |
| PCI: 00:1c.3 subsystem <- 8086/1c16 |
| PCI: 00:1c.3 cmd <- 106 |
| PCI: 00:1d.0 subsystem <- 103c/162a |
| PCI: 00:1d.0 cmd <- 102 |
| pch_decode_init |
| PCI: 00:1f.0 subsystem <- 103c/162a |
| PCI: 00:1f.0 cmd <- 107 |
| PCI: 00:1f.2 subsystem <- 103c/162a |
| PCI: 00:1f.2 cmd <- 03 |
| PCI: 03:00.0 cmd <- 02 |
| PCI: 03:00.1 cmd <- 06 |
| PCI: 03:00.2 cmd <- 06 |
| PCI: 03:00.3 cmd <- 06 |
| PCI: 03:00.4 cmd <- 06 |
| PCI: 04:00.0 cmd <- 02 |
| done. |
| BS: BS_DEV_ENABLE times (us): entry 0 run 156 exit 0 |
| Initializing devices... |
| Root Device init ... |
| Root Device init finished in 1 usecs |
| CPU_CLUSTER: 0 init ... |
| start_eip=0x00001000, code_size=0x00000031 |
| Setting up SMI for CPU |
| Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8 |
| Processing 12 relocs. Offset value of 0x00038000 |
| SMM Module: stub loaded at 00038000. Will call 7ffb245d(7ffd37e0) |
| Installing SMM handler to 0x80000000 |
| Loading module at 80010000 with entry 80010118. filesize: 0xed0 memsize: 0x4ef0 |
| Processing 54 relocs. Offset value of 0x80010000 |
| Loading module at 80008000 with entry 80008000. filesize: 0x1a8 memsize: 0x1a8 |
| Processing 12 relocs. Offset value of 0x80008000 |
| SMM Module: placing jmp sequence at 80007c00 rel16 0x03fd |
| SMM Module: placing jmp sequence at 80007800 rel16 0x07fd |
| SMM Module: placing jmp sequence at 80007400 rel16 0x0bfd |
| SMM Module: stub loaded at 80008000. Will call 80010118(00000000) |
| Initializing southbridge SMI... ... pmbase = 0x0500 |
| |
| SMI_STS: PM1 |
| PM1_STS: WAK PWRBTN |
| GPE0_STS: GPIO15 GPIO14 GPIO13 GPIO11 GPIO10 GPIO9 GPIO8 GPIO7 GPIO6 GPIO4 GPIO3 GPIO2 GPIO1 |
| ALT_GP_SMI_STS: GPI15 GPI14 GPI13 GPI11 GPI10 GPI9 GPI8 GPI7 GPI6 GPI4 GPI3 GPI2 GPI1 |
| TCO_STS: INTRD_DET |
| ... raise SMI# |
| In relocation handler: cpu 0 |
| New SMBASE=0x80000000 IEDBASE=0x80400000 @ 0003fc00 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Relocation complete. |
| Locking SMM. |
| Initializing CPU #0 |
| CPU: vendor Intel device 206a7 |
| CPU: family 06, model 2a, stepping 07 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 12a80 size 5800 |
| microcode: sig=0x206a7 pf=0x10 revision=0x29 |
| CPU: Intel(R) Core(TM) i5-2410M CPU @ 2.30GHz. |
| MTRR: Physical address space: |
| 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 |
| 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 |
| 0x00000000000c0000 - 0x0000000080000000 size 0x7ff40000 type 6 |
| 0x0000000080000000 - 0x00000000e0000000 size 0x60000000 type 0 |
| 0x00000000e0000000 - 0x00000000f0000000 size 0x10000000 type 1 |
| 0x00000000f0000000 - 0x0000000100000000 size 0x10000000 type 0 |
| 0x0000000100000000 - 0x000000047b600000 size 0x37b600000 type 6 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| MTRR: default type WB/UC MTRR counts: 4/11. |
| MTRR: WB selected as default type. |
| MTRR: 0 base 0x0000000080000000 mask 0x0000000fc0000000 type 0 |
| MTRR: 1 base 0x00000000c0000000 mask 0x0000000fe0000000 type 0 |
| MTRR: 2 base 0x00000000e0000000 mask 0x0000000ff0000000 type 1 |
| MTRR: 3 base 0x00000000f0000000 mask 0x0000000ff0000000 type 0 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x00 done. |
| VMX status: enabled, locked |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2300 |
| Turbo is available but hidden |
| Turbo has been enabled |
| CPU: 0 has 2 cores, 2 threads per core |
| CPU: 0 has core 1 |
| CPU1: stack_base 7ffcc000, stack_end 7ffccff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 1. |
| After apic_write. |
| In relocation handler: cpu 1 |
| New SMBASE=0x7ffffc00 IEDBASE=0x80400000 @ 0003fc00 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 1. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #1 |
| CPU: 0 has core 2 |
| CPU: vendor Intel device 206a7 |
| CPU: family 06, model 2a, stepping 07 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 12a80 size 5800 |
| microcode: sig=0x206a7 pf=0x10 revision=0x29 |
| CPU: Intel(R) Core(TM) i5-2410M CPU @ 2.30GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x01 done. |
| VMX status: enabled, locked |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2300 |
| CPU #1 initialized |
| CPU2: stack_base 7ffcb000, stack_end 7ffcbff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 2. |
| After apic_write. |
| In relocation handler: cpu 2 |
| Startup point 1. |
| Waiting for send to finish... |
| +New SMBASE=0x7ffff800 IEDBASE=0x80400000 @ 0003fc00 |
| Sending STARTUP #2 to 2. |
| After apic_write. |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU: 0 has core 3 |
| Initializing CPU #2 |
| CPU: vendor Intel device 206a7 |
| CPU: family 06, model 2a, stepping 07 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 12a80 size 5800 |
| microcode: sig=0x206a7 pf=0x10 revision=0x0 |
| microcode: updated to revision 0x29 date=2013-06-12 |
| CPU: Intel(R) Core(TM) i5-2410M CPU @ 2.30GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x02 done. |
| VMX status: enabled, locked |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2300 |
| CPU #2 initialized |
| CPU3: stack_base 7ffca000, stack_end 7ffcaff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 3. |
| After apic_write. |
| In relocation handler: cpu 3 |
| New SMBASE=0x7ffff400 IEDBASE=0x80400000 @ 0003fc00 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 3. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| CPU #0 initialized |
| Waiting for 1 CPUS to stop |
| Initializing CPU #3 |
| CPU: vendor Intel device 206a7 |
| CPU: family 06, model 2a, stepping 07 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 12a80 size 5800 |
| microcode: sig=0x206a7 pf=0x10 revision=0x29 |
| CPU: Intel(R) Core(TM) i5-2410M CPU @ 2.30GHz. |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| call enable_fixed_mtrr() |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x03 done. |
| VMX status: enabled, locked |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2300 |
| CPU #3 initialized |
| All AP CPUs stopped (552 loops) |
| CPU0: stack: 7ffcd000 - 7ffce000, lowest used address 7ffcda9c, stack used: 1380 bytes |
| CPU1: stack: 7ffcc000 - 7ffcd000, lowest used address 7ffccc7c, stack used: 900 bytes |
| CPU2: stack: 7ffcb000 - 7ffcc000, lowest used address 7ffcbc7c, stack used: 900 bytes |
| CPU3: stack: 7ffca000 - 7ffcb000, lowest used address 7ffcac7c, stack used: 900 bytes |
| CPU_CLUSTER: 0 init finished in 74731 usecs |
| PCI: 00:00.0 init ... |
| Disabling PEG12. |
| Disabling PEG11. |
| Disabling PEG10. |
| Disabling PEG60. |
| Disabling Device 7. |
| Disabling PEG IO clock. |
| Set BIOS_RESET_CPL |
| CPU TDP: 35 Watts |
| PCI: 00:00.0 init finished in 1019 usecs |
| PCI: 00:02.0 init ... |
| GT Power Management Init |
| SNB GT2 Power Meter Weights |
| GT Power Management Init (post VBIOS) |
| Initializing VGA without OPROM. |
| EDID: |
| 00 ff ff ff ff ff ff 00 09 e5 a0 08 00 00 00 00 |
| 00 14 01 04 95 1a 10 78 2a 92 75 90 59 5a 90 26 |
| 1d 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 |
| 01 01 01 01 01 01 12 1b 00 8a 50 20 0e 30 1a 16 |
| 22 00 05 a3 10 00 00 19 0c 12 00 8a 50 20 0e 30 |
| 1a 16 22 00 05 a3 10 00 00 19 00 00 00 00 00 00 |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 |
| 00 19 3d e5 1a 3c 78 19 14 22 7d 00 00 00 00 4d |
| Extracted contents: |
| header: 00 ff ff ff ff ff ff 00 |
| serial number: 09 e5 a0 08 00 00 00 00 00 14 |
| version: 01 04 |
| basic params: 95 1a 10 78 2a |
| chroma info: 92 75 90 59 5a 90 26 1d 50 54 |
| established: 00 00 00 |
| standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 |
| descriptor 1: 12 1b 00 8a 50 20 0e 30 1a 16 22 00 05 a3 10 00 00 19 |
| descriptor 2: 0c 12 00 8a 50 20 0e 30 1a 16 22 00 05 a3 10 00 00 19 |
| descriptor 3: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
| descriptor 4: 00 00 00 02 00 19 3d e5 1a 3c 78 19 14 22 7d 00 00 00 |
| extensions: 00 |
| checksum: 4d |
| |
| Manufacturer: BOE Model 8a0 Serial Number 0 |
| Made week 0 of 2010 |
| EDID version: 1.4 |
| Digital display |
| 6 bits per primary color channel |
| DisplayPort interface |
| Maximum image size: 26 cm x 16 cm |
| Gamma: 220% |
| Check DPMS levels |
| DPMS levels: Off |
| Supported color formats: RGB 4:4:4, YCrCb 4:2:2 |
| First detailed timing is preferred timing |
| Established timings supported: |
| Standard timings supported: |
| Detailed timings |
| Hex of detail: 121b008a50200e301a16220005a310000019 |
| Detailed mode (IN HEX): Clock 69300 KHz, 105 mm x a3 mm |
| 0500 051a 0530 058a hborder 0 |
| 0320 0322 0324 032e vborder 0 |
| -hsync -vsync |
| Did detailed timing |
| Hex of detail: 0c12008a50200e301a16220005a310000019 |
| Detailed mode (IN HEX): Clock 46200 KHz, 105 mm x a3 mm |
| 0500 051a 0530 058a hborder 0 |
| 0320 0322 0324 032e vborder 0 |
| -hsync -vsync |
| Hex of detail: 000000000000000000000000000000000000 |
| Manufacturer-specified data, tag 0 |
| Hex of detail: 0000000200193de51a3c781914227d000000 |
| Manufacturer-specified data, tag 2 |
| Checksum |
| Checksum: 0x4d (valid) |
| bringing up panel at resolution 1280 x 800 |
| Borders 0 x 0 |
| Blank 138 x 14 |
| Sync 22 x 2 |
| Front porch 26 x 2 |
| Spread spectrum clock |
| Single channel |
| Polarities 1, 1 |
| Data M1=1211105, N1=8388608 |
| Link frequency 270000 kHz |
| Link M1=134567, N1=524288 |
| Pixel N=6, M1=18, M2=7, P1=2 |
| Pixel clock 138571 kHz |
| waiting for panel powerup |
| panel powered up |
| PCI: 00:02.0 init finished in 28596 usecs |
| PCI: 00:04.0 init ... |
| PCI: 00:04.0 init finished in 1 usecs |
| PCI: 00:16.0 init ... |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : YES |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Recovery |
| ME: Current Operation State : M0 with UMA |
| ME: Current Operation Mode : Normal |
| ME: Error Code : Image Failure |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Pseudo-global reset |
| ME: Progress Phase State : M0 kernel load |
| ME: BIOS path: Error |
| PCI: 00:16.0 init finished in 29 usecs |
| PCI: 00:19.0 init ... |
| PCI: 00:19.0 init finished in 1 usecs |
| PCI: 00:1a.0 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1a.0 init finished in 13 usecs |
| PCI: 00:1b.0 init ... |
| Azalia: base = f1928000 |
| Azalia: codec_mask = 0b |
| Azalia: Initializing codec #3 |
| Azalia: codec viddid: 80862805 |
| Azalia: verb_size: 16 |
| Azalia: verb loaded. |
| Azalia: Initializing codec #1 |
| Azalia: codec viddid: 11c11040 |
| Azalia: verb_size: 4 |
| Azalia: verb loaded. |
| Azalia: Initializing codec #0 |
| Azalia: codec viddid: 111d7605 |
| Azalia: verb_size: 44 |
| Azalia: verb loaded. |
| PCI: 00:1b.0 init finished in 4807 usecs |
| PCI: 00:1c.0 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.0 init finished in 9 usecs |
| PCI: 00:1c.1 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.1 init finished in 9 usecs |
| PCI: 00:1c.2 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.2 init finished in 11 usecs |
| PCI: 00:1c.3 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.3 init finished in 8 usecs |
| PCI: 00:1d.0 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1d.0 init finished in 13 usecs |
| PCI: 00:1f.0 init ... |
| pch: lpc_init |
| IOAPIC: Initializing IOAPIC at 0xfec00000 |
| IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| IOAPIC: ID = 0x02 |
| IOAPIC: Dumping registers |
| reg 0x0000: 0x02000000 |
| reg 0x0001: 0x00170020 |
| reg 0x0002: 0x00170020 |
| Set power off after power failure. |
| NMI sources disabled. |
| CougarPoint PM init |
| rtc_failed = 0x0 |
| RTC Init |
| Enabling BIOS updates outside of SMM... Disabling ACPI via APMC: |
| done. |
| pch_spi_init |
| PCI: 00:1f.0 init finished in 261 usecs |
| PCI: 00:1f.2 init ... |
| SATA: Initializing... |
| SATA: Controller in AHCI mode. |
| ABAR: f192d000 |
| PCI: 00:1f.2 init finished in 72 usecs |
| PCI: 03:00.0 init ... |
| PCI: 03:00.0 init finished in 0 usecs |
| PCI: 03:00.1 init ... |
| PCI: 03:00.1 init finished in 0 usecs |
| PCI: 03:00.2 init ... |
| PCI: 03:00.2 init finished in 0 usecs |
| PCI: 03:00.3 init ... |
| PCI: 03:00.3 init finished in 0 usecs |
| PCI: 03:00.4 init ... |
| PCI: 03:00.4 init finished in 0 usecs |
| PCI: 04:00.0 init ... |
| PCI: 04:00.0 init finished in 0 usecs |
| Devices initialized |
| Show all devs... After init. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| APIC: acac: enabled 0 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:16.1: enabled 0 |
| PCI: 00:16.2: enabled 0 |
| PCI: 00:16.3: enabled 0 |
| PCI: 00:19.0: enabled 1 |
| PCI: 00:1a.0: enabled 1 |
| PCI: 00:1b.0: enabled 1 |
| PCI: 00:1c.0: enabled 1 |
| PCI: 00:1c.1: enabled 1 |
| PCI: 00:1c.2: enabled 1 |
| PCI: 00:1c.3: enabled 1 |
| PCI: 00:1c.4: enabled 0 |
| PCI: 00:1c.5: enabled 0 |
| PCI: 00:1c.6: enabled 0 |
| PCI: 00:1c.7: enabled 0 |
| PCI: 00:1d.0: enabled 1 |
| PCI: 00:1e.0: enabled 0 |
| PCI: 00:1f.0: enabled 1 |
| PNP: 00ff.1: enabled 0 |
| PCI: 00:1f.2: enabled 1 |
| PCI: 00:1f.3: enabled 0 |
| PCI: 00:1f.5: enabled 0 |
| PCI: 00:1f.6: enabled 0 |
| PCI: 00:04.0: enabled 1 |
| PCI: 03:00.0: enabled 1 |
| PCI: 03:00.1: enabled 1 |
| PCI: 03:00.2: enabled 1 |
| PCI: 03:00.3: enabled 1 |
| PCI: 03:00.4: enabled 1 |
| Unknown device path type: 0 |
| : enabled 1 |
| PCI: 04:00.0: enabled 1 |
| APIC: 01: enabled 1 |
| APIC: 02: enabled 1 |
| APIC: 03: enabled 1 |
| BS: BS_DEV_INIT times (us): entry 6 run 109621 exit 0 |
| Finalize devices... |
| PCI: 00:1f.0 final |
| Devices finalized |
| BS: BS_POST_DEVICE times (us): entry 0 run 2 exit 0 |
| BS: BS_OS_RESUME_CHECK times (us): entry 1 run 0 exit 0 |
| Updating MRC cache data. |
| No MRC cache in cbmem. Can't update flash. |
| CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) |
| CBFS: Locating 'fallback/dsdt.aml' |
| CBFS: Found @ offset 44c80 size 3546 |
| CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) |
| CBFS: Locating 'fallback/slic' |
| CBFS: 'fallback/slic' not found. |
| ACPI: Writing ACPI tables at 7ff1f000. |
| ACPI: * FACS |
| ACPI: * DSDT |
| ACPI: * FADT |
| ACPI: added table 1/32, length now 40 |
| ACPI: * SSDT |
| Found 1 CPU(s) with 4 core(s) each. |
| PSS: 2301MHz power 35000 control 0x1d00 status 0x1d00 |
| PSS: 2300MHz power 35000 control 0x1700 status 0x1700 |
| PSS: 2000MHz power 29380 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 25809 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 22403 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 19152 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 16010 control 0xc00 status 0xc00 |
| PSS: 1000MHz power 13017 control 0xa00 status 0xa00 |
| PSS: 800MHz power 10153 control 0x800 status 0x800 |
| PSS: 2301MHz power 35000 control 0x1d00 status 0x1d00 |
| PSS: 2300MHz power 35000 control 0x1700 status 0x1700 |
| PSS: 2000MHz power 29380 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 25809 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 22403 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 19152 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 16010 control 0xc00 status 0xc00 |
| PSS: 1000MHz power 13017 control 0xa00 status 0xa00 |
| PSS: 800MHz power 10153 control 0x800 status 0x800 |
| PSS: 2301MHz power 35000 control 0x1d00 status 0x1d00 |
| PSS: 2300MHz power 35000 control 0x1700 status 0x1700 |
| PSS: 2000MHz power 29380 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 25809 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 22403 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 19152 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 16010 control 0xc00 status 0xc00 |
| PSS: 1000MHz power 13017 control 0xa00 status 0xa00 |
| PSS: 800MHz power 10153 control 0x800 status 0x800 |
| PSS: 2301MHz power 35000 control 0x1d00 status 0x1d00 |
| PSS: 2300MHz power 35000 control 0x1700 status 0x1700 |
| PSS: 2000MHz power 29380 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 25809 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 22403 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 19152 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 16010 control 0xc00 status 0xc00 |
| PSS: 1000MHz power 13017 control 0xa00 status 0xa00 |
| PSS: 800MHz power 10153 control 0x800 status 0x800 |
| ACPI: added table 2/32, length now 44 |
| ACPI: * MCFG |
| ACPI: added table 3/32, length now 48 |
| ACPI: * TCPA |
| TCPA log created at 7ff0e000 |
| ACPI: added table 4/32, length now 52 |
| ACPI: * MADT |
| ACPI: added table 5/32, length now 56 |
| current = 7ff240d0 |
| GET_VBIOS: aa55 8086 0 0 3 |
| ... VBIOS found at 000c0000 |
| ACPI: * HPET |
| ACPI: added table 6/32, length now 60 |
| ACPI: done. |
| ACPI tables: 28944 bytes. |
| smbios_write_tables: 7ff0d000 |
| Create SMBIOS type 17 |
| Root Device (HP EliteBook 2760p) |
| CPU_CLUSTER: 0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| APIC: 00 (unknown) |
| APIC: acac (Intel SandyBridge/IvyBridge CPU) |
| DOMAIN: 0000 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:00.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:01.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:02.0 (Intel SandyBridge/IvyBridge integrated Northbridge) |
| PCI: 00:16.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:16.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:19.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1a.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1b.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.4 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1c.7 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1d.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1e.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PNP: 00ff.1 (SMSC KBC1126 for HP laptops) |
| PCI: 00:1f.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:1f.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) |
| PCI: 00:04.0 (unknown) |
| PCI: 03:00.0 (unknown) |
| PCI: 03:00.1 (unknown) |
| PCI: 03:00.2 (unknown) |
| PCI: 03:00.3 (unknown) |
| PCI: 03:00.4 (unknown) |
| Unknown device path type: 0 |
| (unknown) |
| PCI: 04:00.0 (unknown) |
| APIC: 01 (unknown) |
| APIC: 02 (unknown) |
| APIC: 03 (unknown) |
| SMBIOS tables: 540 bytes. |
| Writing table forward entry at 0x00000500 |
| Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4fea |
| Writing coreboot table at 0x7ff43000 |
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1. 0000000000001000-000000000009ffff: RAM |
| 2. 00000000000a0000-00000000000fffff: RESERVED |
| 3. 0000000000100000-000000001fffffff: RAM |
| 4. 0000000020000000-00000000201fffff: RESERVED |
| 5. 0000000020200000-000000003fffffff: RAM |
| 6. 0000000040000000-00000000401fffff: RESERVED |
| 7. 0000000040200000-000000007ff0cfff: RAM |
| 8. 000000007ff0d000-000000007fffffff: CONFIGURATION TABLES |
| 9. 0000000080000000-00000000829fffff: RESERVED |
| 10. 00000000f8000000-00000000fbffffff: RESERVED |
| 11. 0000000100000000-000000047b5fffff: RAM |
| Manufacturer: c2 |
| SF: Detected MX25L6405D with sector size 0x1000, total 0x800000 |
| CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) |
| FMAP: Found "FLASH" version 1.1 at 700000. |
| FMAP: base = ff800000 size = 800000 #areas = 3 |
| Wrote coreboot table at: 7ff43000, 0x374 bytes, checksum 5f41 |
| coreboot table: 908 bytes. |
| IMD ROOT 0. 7ffff000 00001000 |
| IMD SMALL 1. 7fffe000 00001000 |
| CONSOLE 2. 7ffde000 00020000 |
| TIME STAMP 3. 7ffdd000 00000400 |
| ROMSTG STCK 4. 7ffd8000 00005000 |
| RAMSTAGE 5. 7ff99000 0003f000 |
| 57a9e100 6. 7ff5b000 0003d850 |
| SMM BACKUP 7. 7ff4b000 00010000 |
| COREBOOT 8. 7ff43000 00008000 |
| ACPI 9. 7ff1f000 00024000 |
| ACPI GNVS 10. 7ff1e000 00001000 |
| TCPA LOG 11. 7ff0e000 00010000 |
| SMBIOS 12. 7ff0d000 00000800 |
| IMD small region: |
| IMD ROOT 0. 7fffec00 00000400 |
| CAR GLOBALS 1. 7fffeac0 00000140 |
| MEM INFO 2. 7fffe960 00000141 |
| ROMSTAGE 3. 7fffe940 00000004 |
| 57a9e000 4. 7fffe920 00000010 |
| BS: BS_WRITE_TABLES times (us): entry 1 run 3358 exit 0 |
| CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) |
| CBFS: Locating 'fallback/payload' |
| CBFS: Found @ offset 48240 size f420 |
| Loading segment from ROM address 0xfff48378 |
| code (compression=1) |
| New segment dstaddr 0xe37c0 memsize 0x1c840 srcaddr 0xfff483b0 filesize 0xf3e8 |
| Loading segment from ROM address 0xfff48394 |
| Entry Point 0x000ff06e |
| Payload being loaded at below 1MiB without region being marked as RAM usable. |
| Loading Segment: addr: 0x00000000000e37c0 memsz: 0x000000000001c840 filesz: 0x000000000000f3e8 |
| lb: [0x000000007ff9a000, 0x000000007ffd7850) |
| Post relocation: addr: 0x00000000000e37c0 memsz: 0x000000000001c840 filesz: 0x000000000000f3e8 |
| using LZMA |
| [ 0x000e37c0, 00100000, 0x00100000) <- fff483b0 |
| dest 000e37c0, end 00100000, bouncebuffer ffffffff |
| Loaded segments |
| BS: BS_PAYLOAD_LOAD times (us): entry 0 run 30825 exit 0 |
| PCH watchdog disabled |
| Jumping to boot code at 000ff06e(7ff43000) |
| CPU0: stack: 7ffcd000 - 7ffce000, lowest used address 7ffcda4c, stack used: 1460 bytes |
| SeaBIOS (version rel-1.10.2-0-g5f4c7b1) |
| BUILD: gcc: (coreboot toolchain v1.45 May 9th, 2017) 7.1.0 binutils: (GNU Binutils) 2.28 |
| Found coreboot cbmem console @ 7ffde000 |
| Found mainboard HP EliteBook 2760p |
| Relocating init from 0x000e4d40 to 0x7fec10a0 (size 48736) |
| Found CBFS header at 0xfff00138 |
| multiboot: eax=7ffc5460, ebx=7ffc5414 |
| Found 20 PCI devices (max PCI bus is 04) |
| Copying SMBIOS entry point from 0x7ff0d000 to 0x000f0b80 |
| Copying ACPI RSDP from 0x7ff1f000 to 0x000f0b50 |
| Using pmtimer, ioport 0x508 |
| WARNING - Timeout at tis_wait_sts:160! |
| Scan for VGA option rom |
| Running option rom at c000:0003 |
| pmm call arg1=0 |
| Turning on vga text mode console |
| SeaBIOS (version rel-1.10.2-0-g5f4c7b1) |
| EHCI init on dev 00:1a.0 (regs=0xf192e020) |
| EHCI init on dev 00:1d.0 (regs=0xf192f020) |
| AHCI controller at 00:1f.2, iobase 0xf192d000, irq 10 |
| Searching bootorder for: /pci@i0cf8/pci-bridge@1c,2/*@0,2 |
| Found 0 lpt ports |
| Found 0 serial ports |
| PS2 keyboard initialized |
| Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0 |
| AHCI/0: Set transfer mode to UDMA-6 |
| AHCI/0: registering: "AHCI/0: Crucial_CT1024MX200SSD1 ATA-10 Hard-Disk (931 GiBytes)" |
| Initialized USB HUB (0 ports used) |
| Initialized USB HUB (0 ports used) |
| All threads complete. |
| Scan for option roms |
| |
| Press ESC for boot menu. |
| |
| Select boot device: |
| |
| 1. AHCI/0: Crucial_CT1024MX200SSD1 ATA-10 Hard-Disk (931 GiByt |
| |
| Searching bootorder for: HALT |
| drive 0x000f0ae0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=1953525168 |
| Space available for UMB: c6800-ec800, f0000-f0ae0 |
| Returned 253952 bytes of ZoneHigh |
| e820 map has 11 items: |
| 0: 0000000000000000 - 000000000009fc00 = 1 RAM |
| 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED |
| 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED |
| 3: 0000000000100000 - 0000000020000000 = 1 RAM |
| 4: 0000000020000000 - 0000000020200000 = 2 RESERVED |
| 5: 0000000020200000 - 0000000040000000 = 1 RAM |
| 6: 0000000040000000 - 0000000040200000 = 2 RESERVED |
| 7: 0000000040200000 - 000000007ff0b000 = 1 RAM |
| 8: 000000007ff0b000 - 0000000082a00000 = 2 RESERVED |
| 9: 00000000f8000000 - 00000000fc000000 = 2 RESERVED |
| 10: 0000000100000000 - 000000047b600000 = 1 RAM |
| enter handle_19: |
| NULL |
| Booting from Hard Disk... |
| Booting from 0000:7c00 |
| |