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review.coreboot.org / seabios / 31ae638cda019e9098127dba7a2f3f150fb65c0c / src / shadow.c
  1. e773930 Add support for enabling ram in 0xc0000-0xf0000 area. by Kevin O'Connor · 14 years ago
  2. 3528496 When enabling write access to 0xf0000, just copy from 0xffff0000. by Kevin O'Connor · 14 years ago
  3. b1b7c2a Change license from GPLv3 to LGPLv3. by Kevin O'Connor · 14 years ago
  4. 4132e02 Don't allow start_bdf with new auto max bus detection code. by Kevin O'Connor · 14 years ago
  5. be19cdc Overhaul PCI config functions. by Kevin O'Connor · 14 years ago
  6. 2ed2f58 Synch pci ids and registers with Linux kernel source. by Kevin O'Connor · 14 years ago
  7. 415c2dc Use defines for PCI ids. by Kevin O'Connor · 14 years ago
  8. e3677b1 Define 16bit OFFSET_x to be 32bit addresses; introduce CONFIG_BIOS_ADDR. by Kevin O'Connor · 15 years ago
  9. 9521e26 Extract 'struct bregs' out of biosvar.h; clean up header includes. by Kevin O'Connor · 15 years ago
  10. 276d4a9 Move acpi code out of rombios32.c; clean up use of fixed memory addresses. by Kevin O'Connor · 15 years ago
  11. da4a648 Separate out ram shadow code and permit more code to write to bios. by Kevin O'Connor · 15 years ago