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Kevin O'Connor30853762009-01-17 18:49:20 -05001// Code for misc 16bit handlers and variables.
2//
3// Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
4// Copyright (C) 2002 MandrakeSoft S.A.
5//
6// This file may be distributed under the terms of the GNU LGPLv3 license.
7
8#include "bregs.h" // struct bregs
9#include "biosvar.h" // GET_BDA
10#include "util.h" // debug_enter
11#include "pic.h" // enable_hwirq
12
13// Amount of continuous ram under 4Gig
14u32 RamSize VAR16_32;
15// Amount of continuous ram >4Gig
16u64 RamSizeOver4G;
17
18
19/****************************************************************
20 * Misc 16bit ISRs
21 ****************************************************************/
22
23// INT 12h Memory Size Service Entry Point
24void VISIBLE16
25handle_12(struct bregs *regs)
26{
27 debug_enter(regs, DEBUG_HDL_12);
28 regs->ax = GET_BDA(mem_size_kb);
29}
30
31// INT 11h Equipment List Service Entry Point
32void VISIBLE16
33handle_11(struct bregs *regs)
34{
35 debug_enter(regs, DEBUG_HDL_11);
36 regs->ax = GET_BDA(equipment_list_flags);
37}
38
39// INT 05h Print Screen Service Entry Point
40void VISIBLE16
41handle_05(struct bregs *regs)
42{
43 debug_enter(regs, DEBUG_HDL_05);
44}
45
46// INT 10h Video Support Service Entry Point
47void VISIBLE16
48handle_10(struct bregs *regs)
49{
50 debug_enter(regs, DEBUG_HDL_10);
51 // dont do anything, since the VGA BIOS handles int10h requests
52}
53
54void VISIBLE16
55handle_nmi()
56{
57 debug_isr(DEBUG_ISR_nmi);
58 BX_PANIC("NMI Handler called\n");
59}
60
61void
62mathcp_setup()
63{
64 dprintf(3, "math cp init\n");
65 // 80x87 coprocessor installed
66 SETBITS_BDA(equipment_list_flags, 0x02);
67 enable_hwirq(13, entry_75);
68}
69
70// INT 75 - IRQ13 - MATH COPROCESSOR EXCEPTION
71void VISIBLE16
72handle_75()
73{
74 debug_isr(DEBUG_ISR_75);
75
76 // clear irq13
77 outb(0, PORT_MATH_CLEAR);
78 // clear interrupt
79 eoi_pic2();
80 // legacy nmi call
81 u32 eax=0, flags;
82 call16_simpint(0x02, &eax, &flags);
83}
84
85
86/****************************************************************
87 * BIOS_CONFIG_TABLE
88 ****************************************************************/
89
90// DMA channel 3 used by hard disk BIOS
91#define CBT_F1_DMA3USED (1<<7)
92// 2nd interrupt controller (8259) installed
93#define CBT_F1_2NDPIC (1<<6)
94// Real-Time Clock installed
95#define CBT_F1_RTC (1<<5)
96// INT 15/AH=4Fh called upon INT 09h
97#define CBT_F1_INT154F (1<<4)
98// wait for external event (INT 15/AH=41h) supported
99#define CBT_F1_WAITEXT (1<<3)
100// extended BIOS area allocated (usually at top of RAM)
101#define CBT_F1_EBDA (1<<2)
102// bus is Micro Channel instead of ISA
103#define CBT_F1_MCA (1<<1)
104// system has dual bus (Micro Channel + ISA)
105#define CBT_F1_MCAISA (1<<0)
106
107// INT 16/AH=09h (keyboard functionality) supported
108#define CBT_F2_INT1609 (1<<6)
109
110struct bios_config_table_s BIOS_CONFIG_TABLE VAR16FIXED(0xe6f5) = {
111 .size = sizeof(BIOS_CONFIG_TABLE) - 2,
112 .model = CONFIG_MODEL_ID,
113 .submodel = CONFIG_SUBMODEL_ID,
114 .biosrev = CONFIG_BIOS_REVISION,
115 .feature1 = (
116 CBT_F1_2NDPIC | CBT_F1_RTC | CBT_F1_EBDA
117 | (CONFIG_KBD_CALL_INT15_4F ? CBT_F1_INT154F : 0)),
118 .feature2 = CBT_F2_INT1609,
119 .feature3 = 0,
120 .feature4 = 0,
121 .feature5 = 0,
122};
123
124
125/****************************************************************
126 * GDT and IDT tables
127 ****************************************************************/
128
129struct descloc_s {
130 u16 length;
131 u32 addr;
132} PACKED;
133
134// Real mode IDT descriptor
135struct descloc_s rmode_IDT_info VAR16_32 = {
136 .length = sizeof(struct rmode_IVT) - 1,
137 .addr = (u32)MAKE_FARPTR(SEG_IVT, 0),
138};
139
140// Dummy IDT that forces a machine shutdown if an irq happens in
141// protected mode.
142u8 dummy_IDT VAR16_32;
143
144// Protected mode IDT descriptor
145struct descloc_s pmode_IDT_info VAR16_32 = {
146 .length = sizeof(dummy_IDT) - 1,
147 .addr = (u32)MAKE_FARPTR(SEG_BIOS, &dummy_IDT),
148};
149
150// GDT
151u64 rombios32_gdt[] VAR16_32 __aligned(8) = {
152 // First entry can't be used.
153 0x0000000000000000LL,
154 // 32 bit flat code segment (SEG32_MODE32_CS)
155 0x00cf9b000000ffffLL,
156 // 32 bit flat data segment (SEG32_MODE32_DS)
157 0x00cf93000000ffffLL,
158 // 16 bit code segment base=0xf0000 limit=0xffff (SEG32_MODE16_CS)
159 0x00009b0f0000ffffLL,
160 // 16 bit data segment base=0x0 limit=0xffff (SEG32_MODE16_DS)
161 0x000093000000ffffLL,
162 // 16 bit code segment base=0 limit=0xffffffff (SEG32_MODE16BIG_CS)
163 0x008f9b000000ffffLL,
164 // 16 bit data segment base=0 limit=0xffffffff (SEG32_MODE16BIG_DS)
165 0x008f93000000ffffLL,
166};
167
168// GDT descriptor
169struct descloc_s rombios32_gdt_48 VAR16_32 = {
170 .length = sizeof(rombios32_gdt) - 1,
171 .addr = (u32)MAKE_FARPTR(SEG_BIOS, rombios32_gdt),
172};
173
174
175/****************************************************************
176 * Misc fixed vars
177 ****************************************************************/
178
179char BiosCopyright[] VAR16FIXED(0xff00) =
180 "(c) 2002 MandrakeSoft S.A. Written by Kevin Lawton & the Bochs team.";
181
182// BIOS build date
183char BiosDate[] VAR16FIXED(0xfff5) = "06/23/99";
184
185u8 BiosModelId VAR16FIXED(0xfffe) = CONFIG_MODEL_ID;
186
187u8 BiosChecksum VAR16FIXED(0xffff);
188
189// XXX - Initial Interrupt Vector Offsets Loaded by POST
190u8 InitVectors[13] VAR16FIXED(0xfef3);
191
192// XXX - INT 1D - SYSTEM DATA - VIDEO PARAMETER TABLES
193u8 VideoParams[88] VAR16FIXED(0xf0a4);