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Kevin O'Connorf076a3e2008-02-25 22:25:15 -05001// 16bit system callbacks
2//
3// Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
4// Copyright (C) 2002 MandrakeSoft S.A.
5//
6// This file may be distributed under the terms of the GNU GPLv3 license.
7
8#include "util.h" // irq_restore
Kevin O'Connor2ad37442008-05-06 19:49:01 -04009#include "biosvar.h" // BIOS_CONFIG_TABLE
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050010#include "ioport.h" // inb
Kevin O'Connorc7812932008-06-08 23:08:12 -040011#include "memmap.h" // E820_RAM
Kevin O'Connorf54c1502008-06-14 15:56:16 -040012#include "pic.h" // eoi_pic2
Kevin O'Connore2e5f012008-03-08 10:27:39 -050013
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050014// Use PS2 System Control port A to set A20 enable
15static inline u8
16set_a20(u8 cond)
17{
18 // get current setting first
19 u8 newval, oldval = inb(PORT_A20);
20 if (cond)
21 newval = oldval | 0x02;
22 else
23 newval = oldval & ~0x02;
24 outb(newval, PORT_A20);
25
26 return (newval & 0x02) != 0;
27}
28
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050029static void
30handle_152400(struct bregs *regs)
31{
32 set_a20(0);
Kevin O'Connor6c781222008-03-09 12:19:23 -040033 set_code_success(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050034}
35
36static void
37handle_152401(struct bregs *regs)
38{
39 set_a20(1);
Kevin O'Connor6c781222008-03-09 12:19:23 -040040 set_code_success(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050041}
42
43static void
44handle_152402(struct bregs *regs)
45{
46 regs->al = !!(inb(PORT_A20) & 0x20);
Kevin O'Connor6c781222008-03-09 12:19:23 -040047 set_code_success(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050048}
49
50static void
51handle_152403(struct bregs *regs)
52{
53 regs->bx = 3;
Kevin O'Connor6c781222008-03-09 12:19:23 -040054 set_code_success(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050055}
56
57static void
58handle_1524XX(struct bregs *regs)
59{
Kevin O'Connor6c781222008-03-09 12:19:23 -040060 set_code_fail(regs, RET_EUNSUPPORTED);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050061}
62
Kevin O'Connoradb6b372008-03-01 13:38:38 -050063static void
64handle_1524(struct bregs *regs)
65{
66 switch (regs->al) {
67 case 0x00: handle_152400(regs); break;
68 case 0x01: handle_152401(regs); break;
69 case 0x02: handle_152402(regs); break;
70 case 0x03: handle_152403(regs); break;
71 default: handle_1524XX(regs); break;
72 }
73}
74
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050075// removable media eject
76static void
77handle_1552(struct bregs *regs)
78{
Kevin O'Connor6c781222008-03-09 12:19:23 -040079 set_code_success(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050080}
81
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050082static void
83handle_1587(struct bregs *regs)
84{
85 // +++ should probably have descriptor checks
86 // +++ should have exception handlers
87
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050088 u8 prev_a20_enable = set_a20(1); // enable A20 line
89
90 // 128K max of transfer on 386+ ???
91 // source == destination ???
92
93 // ES:SI points to descriptor table
94 // offset use initially comments
95 // ==============================================
96 // 00..07 Unused zeros Null descriptor
97 // 08..0f GDT zeros filled in by BIOS
98 // 10..17 source ssssssss source of data
99 // 18..1f dest dddddddd destination of data
100 // 20..27 CS zeros filled in by BIOS
101 // 28..2f SS zeros filled in by BIOS
102
103 //es:si
104 //eeee0
105 //0ssss
106 //-----
107
108// check for access rights of source & dest here
109
110 // Initialize GDT descriptor
Kevin O'Connor67c00dd2008-03-09 16:10:19 -0400111 SET_SEG(ES, regs->es);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500112 u16 si = regs->si;
113 u16 base15_00 = (regs->es << 4) + si;
114 u16 base23_16 = regs->es >> 12;
Kevin O'Connor67c00dd2008-03-09 16:10:19 -0400115 if (base15_00 < (u16)(regs->es<<4))
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500116 base23_16++;
117 SET_VAR(ES, *(u16*)(si+0x08+0), 47); // limit 15:00 = 6 * 8bytes/descriptor
118 SET_VAR(ES, *(u16*)(si+0x08+2), base15_00);// base 15:00
119 SET_VAR(ES, *(u8 *)(si+0x08+4), base23_16);// base 23:16
120 SET_VAR(ES, *(u8 *)(si+0x08+5), 0x93); // access
121 SET_VAR(ES, *(u16*)(si+0x08+6), 0x0000); // base 31:24/reserved/limit 19:16
122
123 // Initialize CS descriptor
124 SET_VAR(ES, *(u16*)(si+0x20+0), 0xffff);// limit 15:00 = normal 64K limit
125 SET_VAR(ES, *(u16*)(si+0x20+2), 0x0000);// base 15:00
126 SET_VAR(ES, *(u8 *)(si+0x20+4), 0x000f);// base 23:16
127 SET_VAR(ES, *(u8 *)(si+0x20+5), 0x9b); // access
128 SET_VAR(ES, *(u16*)(si+0x20+6), 0x0000);// base 31:24/reserved/limit 19:16
129
130 // Initialize SS descriptor
131 u16 ss = GET_SEG(SS);
132 base15_00 = ss << 4;
133 base23_16 = ss >> 12;
134 SET_VAR(ES, *(u16*)(si+0x28+0), 0xffff); // limit 15:00 = normal 64K limit
135 SET_VAR(ES, *(u16*)(si+0x28+2), base15_00);// base 15:00
136 SET_VAR(ES, *(u8 *)(si+0x28+4), base23_16);// base 23:16
137 SET_VAR(ES, *(u8 *)(si+0x28+5), 0x93); // access
138 SET_VAR(ES, *(u16*)(si+0x28+6), 0x0000); // base 31:24/reserved/limit 19:16
139
Kevin O'Connor2cdd8b62008-03-09 23:37:04 -0400140 u16 count = regs->cx;
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500141 asm volatile(
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500142 // Load new descriptor tables
Kevin O'Connor67c00dd2008-03-09 16:10:19 -0400143 "lgdtw %%es:0x8(%%si)\n"
144 "lidtw %%cs:pmode_IDT_info\n"
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500145
146 // set PE bit in CR0
147 "movl %%cr0, %%eax\n"
148 "orb $0x01, %%al\n"
149 "movl %%eax, %%cr0\n"
150
151 // far jump to flush CPU queue after transition to protected mode
Kevin O'Connoradb6b372008-03-01 13:38:38 -0500152 "ljmpw $0x0020, $1f\n"
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500153 "1:\n"
154
155 // GDT points to valid descriptor table, now load DS, ES
156 "movw $0x10, %%ax\n" // 010 000 = 2nd descriptor in table, TI=GDT, RPL=00
157 "movw %%ax, %%ds\n"
158 "movw $0x18, %%ax\n" // 011 000 = 3rd descriptor in table, TI=GDT, RPL=00
159 "movw %%ax, %%es\n"
160
161 // move CX words from DS:SI to ES:DI
162 "xorw %%si, %%si\n"
163 "xorw %%di, %%di\n"
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500164 "rep movsw\n"
165
166 // reset PG bit in CR0 ???
167 "movl %%cr0, %%eax\n"
168 "andb $0xfe, %%al\n"
169 "movl %%eax, %%cr0\n"
170
171 // far jump to flush CPU queue after transition to real mode
172 "ljmpw $0xf000, $2f\n"
173 "2:\n"
174
175 // restore IDT to normal real-mode defaults
176 "lidt %%cs:rmode_IDT_info\n"
177
Kevin O'Connore20ed9f2008-03-01 14:25:44 -0500178 // Restore %ds (from %ss)
179 "movw %%ss, %%ax\n"
180 "movw %%ax, %%ds\n"
Kevin O'Connor2cdd8b62008-03-09 23:37:04 -0400181 : "+c"(count), "+S"(si)
Kevin O'Connored128492008-03-11 11:14:59 -0400182 : : "eax", "di", "cc"); // XXX - also clobbers %es
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500183
184 set_a20(prev_a20_enable);
185
Kevin O'Connor6c781222008-03-09 12:19:23 -0400186 set_code_success(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500187}
188
189// Get the amount of extended memory (above 1M)
190static void
191handle_1588(struct bregs *regs)
192{
Kevin O'Connor9571ac22008-05-17 22:20:27 -0400193 u32 rs = GET_EBDA(ram_size);
194
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500195 // According to Ralf Brown's interrupt the limit should be 15M,
196 // but real machines mostly return max. 63M.
Kevin O'Connor9571ac22008-05-17 22:20:27 -0400197 if (rs > 64*1024*1024)
198 regs->ax = 63 * 1024;
199 else
200 regs->ax = (rs - 1*1024*1024) / 1024;
Kevin O'Connor6c781222008-03-09 12:19:23 -0400201 set_success(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500202}
203
204// Device busy interrupt. Called by Int 16h when no key available
205static void
206handle_1590(struct bregs *regs)
207{
208}
209
210// Interrupt complete. Called by Int 16h when key becomes available
211static void
212handle_1591(struct bregs *regs)
213{
214}
215
Kevin O'Connor38fcbfe2008-02-25 22:30:47 -0500216// keyboard intercept
217static void
218handle_154f(struct bregs *regs)
219{
Kevin O'Connordb9e65e2008-06-07 14:41:21 -0400220 set_fail_silent(regs);
Kevin O'Connor38fcbfe2008-02-25 22:30:47 -0500221}
222
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500223static void
224handle_15c0(struct bregs *regs)
225{
226 regs->es = SEG_BIOS;
Kevin O'Connor117fc212008-04-13 18:17:02 -0400227 regs->bx = (u32)&BIOS_CONFIG_TABLE;
Kevin O'Connor6c781222008-03-09 12:19:23 -0400228 set_code_success(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500229}
230
231static void
232handle_15c1(struct bregs *regs)
233{
234 regs->es = GET_BDA(ebda_seg);
Kevin O'Connor6c781222008-03-09 12:19:23 -0400235 set_success(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500236}
237
238static void
239handle_15e801(struct bregs *regs)
240{
241 // my real system sets ax and bx to 0
242 // this is confirmed by Ralph Brown list
243 // but syslinux v1.48 is known to behave
244 // strangely if ax is set to 0
245 // regs.u.r16.ax = 0;
246 // regs.u.r16.bx = 0;
247
Kevin O'Connor9571ac22008-05-17 22:20:27 -0400248 u32 rs = GET_EBDA(ram_size);
249
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500250 // Get the amount of extended memory (above 1M)
Kevin O'Connor9571ac22008-05-17 22:20:27 -0400251 if (rs > 16*1024*1024) {
252 // limit to 15M
253 regs->cx = 15*1024;
254 // Get the amount of extended memory above 16M in 64k blocks
255 regs->dx = (rs - 16*1024*1024) / (64*1024);
256 } else {
257 regs->cx = (rs - 1*1024*1024) / 1024;
258 regs->dx = 0;
259 }
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500260
261 // Set configured memory equal to extended memory
262 regs->ax = regs->cx;
263 regs->bx = regs->dx;
264
Kevin O'Connor6c781222008-03-09 12:19:23 -0400265 set_success(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500266}
267
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500268static void
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500269handle_15e820(struct bregs *regs)
270{
Kevin O'Connorc7812932008-06-08 23:08:12 -0400271 int count = GET_EBDA(e820_count);
272 if (regs->edx != 0x534D4150 || regs->bx >= count) {
Kevin O'Connor6c781222008-03-09 12:19:23 -0400273 set_code_fail(regs, RET_EUNSUPPORTED);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500274 return;
275 }
276
Kevin O'Connorc7812932008-06-08 23:08:12 -0400277 struct e820entry *e = &((struct e820entry *)GET_EBDA(e820_loc))[regs->bx];
278 memcpy(MAKE_FARPTR(regs->es, regs->di), e, sizeof(*e));
279 if (regs->bx == count-1)
280 regs->ebx = 0;
281 else
282 regs->ebx++;
283 regs->eax = 0x534D4150;
284 regs->ecx = sizeof(*e);
285 set_success(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500286}
287
288static void
289handle_15e8XX(struct bregs *regs)
290{
Kevin O'Connor6c781222008-03-09 12:19:23 -0400291 set_code_fail(regs, RET_EUNSUPPORTED);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500292}
293
294static void
Kevin O'Connoradb6b372008-03-01 13:38:38 -0500295handle_15e8(struct bregs *regs)
296{
297 switch (regs->al) {
298 case 0x01: handle_15e801(regs); break;
299 case 0x20: handle_15e820(regs); break;
300 default: handle_15e8XX(regs); break;
301 }
302}
303
304static void
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500305handle_15XX(struct bregs *regs)
306{
Kevin O'Connor6c781222008-03-09 12:19:23 -0400307 set_code_fail(regs, RET_EUNSUPPORTED);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500308}
309
310// INT 15h System Services Entry Point
Kevin O'Connor19786762008-03-05 21:09:59 -0500311void VISIBLE16
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500312handle_15(struct bregs *regs)
313{
Kevin O'Connor15c1f222008-06-12 22:59:43 -0400314 debug_enter(regs, DEBUG_HDL_15);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500315 switch (regs->ah) {
Kevin O'Connoradb6b372008-03-01 13:38:38 -0500316 case 0x24: handle_1524(regs); break;
Kevin O'Connor38fcbfe2008-02-25 22:30:47 -0500317 case 0x4f: handle_154f(regs); break;
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500318 case 0x52: handle_1552(regs); break;
Kevin O'Connorbdce35f2008-02-26 21:33:14 -0500319 case 0x53: handle_1553(regs); break;
320 case 0x83: handle_1583(regs); break;
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500321 case 0x86: handle_1586(regs); break;
322 case 0x87: handle_1587(regs); break;
323 case 0x88: handle_1588(regs); break;
324 case 0x90: handle_1590(regs); break;
325 case 0x91: handle_1591(regs); break;
326 case 0xc0: handle_15c0(regs); break;
327 case 0xc1: handle_15c1(regs); break;
328 case 0xc2: handle_15c2(regs); break;
Kevin O'Connoradb6b372008-03-01 13:38:38 -0500329 case 0xe8: handle_15e8(regs); break;
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500330 default: handle_15XX(regs); break;
331 }
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500332}
333
334// INT 12h Memory Size Service Entry Point
Kevin O'Connor19786762008-03-05 21:09:59 -0500335void VISIBLE16
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500336handle_12(struct bregs *regs)
337{
Kevin O'Connor15c1f222008-06-12 22:59:43 -0400338 debug_enter(regs, DEBUG_HDL_12);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500339 regs->ax = GET_BDA(mem_size_kb);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500340}
341
342// INT 11h Equipment List Service Entry Point
Kevin O'Connor19786762008-03-05 21:09:59 -0500343void VISIBLE16
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500344handle_11(struct bregs *regs)
345{
Kevin O'Connor15c1f222008-06-12 22:59:43 -0400346 debug_enter(regs, DEBUG_HDL_11);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500347 regs->ax = GET_BDA(equipment_list_flags);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500348}
349
350// INT 05h Print Screen Service Entry Point
Kevin O'Connor19786762008-03-05 21:09:59 -0500351void VISIBLE16
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500352handle_05(struct bregs *regs)
353{
Kevin O'Connor15c1f222008-06-12 22:59:43 -0400354 debug_enter(regs, DEBUG_HDL_05);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500355}
356
357// INT 10h Video Support Service Entry Point
Kevin O'Connor19786762008-03-05 21:09:59 -0500358void VISIBLE16
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500359handle_10(struct bregs *regs)
360{
Kevin O'Connor15c1f222008-06-12 22:59:43 -0400361 debug_enter(regs, DEBUG_HDL_10);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500362 // dont do anything, since the VGA BIOS handles int10h requests
363}
364
Kevin O'Connor19786762008-03-05 21:09:59 -0500365void VISIBLE16
Kevin O'Connored128492008-03-11 11:14:59 -0400366handle_nmi()
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500367{
Kevin O'Connor15c1f222008-06-12 22:59:43 -0400368 debug_isr(DEBUG_ISR_nmi);
Kevin O'Connored128492008-03-11 11:14:59 -0400369 BX_PANIC("NMI Handler called\n");
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500370}
371
Kevin O'Connorf54c1502008-06-14 15:56:16 -0400372void
373mathcp_setup()
374{
375 dprintf(3, "math cp init\n");
376 // 80x87 coprocessor installed
377 SETBITS_BDA(equipment_list_flags, 0x02);
378 // Enable IRQ13 (handle_75)
379 unmask_pic2(PIC2_IRQ13);
380}
381
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500382// INT 75 - IRQ13 - MATH COPROCESSOR EXCEPTION
Kevin O'Connor19786762008-03-05 21:09:59 -0500383void VISIBLE16
Kevin O'Connored128492008-03-11 11:14:59 -0400384handle_75()
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500385{
Kevin O'Connor15c1f222008-06-12 22:59:43 -0400386 debug_isr(DEBUG_ISR_75);
Kevin O'Connor38fcbfe2008-02-25 22:30:47 -0500387
388 // clear irq13
389 outb(0, PORT_MATH_CLEAR);
390 // clear interrupt
Kevin O'Connorf54c1502008-06-14 15:56:16 -0400391 eoi_pic2();
Kevin O'Connor38fcbfe2008-02-25 22:30:47 -0500392 // legacy nmi call
393 struct bregs br;
394 memset(&br, 0, sizeof(br));
395 call16_int(0x02, &br);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500396}