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Kevin O'Connorf076a3e2008-02-25 22:25:15 -05001// 16bit system callbacks
2//
3// Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
4// Copyright (C) 2002 MandrakeSoft S.A.
5//
6// This file may be distributed under the terms of the GNU GPLv3 license.
7
8#include "util.h" // irq_restore
9#include "biosvar.h" // CONFIG_BIOS_TABLE
10#include "ioport.h" // inb
11#include "cmos.h" // inb_cmos
12
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050013// Use PS2 System Control port A to set A20 enable
14static inline u8
15set_a20(u8 cond)
16{
17 // get current setting first
18 u8 newval, oldval = inb(PORT_A20);
19 if (cond)
20 newval = oldval | 0x02;
21 else
22 newval = oldval & ~0x02;
23 outb(newval, PORT_A20);
24
25 return (newval & 0x02) != 0;
26}
27
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050028static void
29handle_152400(struct bregs *regs)
30{
31 set_a20(0);
32 handle_ret(regs, 0);
33}
34
35static void
36handle_152401(struct bregs *regs)
37{
38 set_a20(1);
39 handle_ret(regs, 0);
40}
41
42static void
43handle_152402(struct bregs *regs)
44{
45 regs->al = !!(inb(PORT_A20) & 0x20);
46 handle_ret(regs, 0);
47}
48
49static void
50handle_152403(struct bregs *regs)
51{
52 regs->bx = 3;
53 handle_ret(regs, 0);
54}
55
56static void
57handle_1524XX(struct bregs *regs)
58{
59 handle_ret(regs, RET_EUNSUPPORTED);
60}
61
Kevin O'Connoradb6b372008-03-01 13:38:38 -050062static void
63handle_1524(struct bregs *regs)
64{
65 switch (regs->al) {
66 case 0x00: handle_152400(regs); break;
67 case 0x01: handle_152401(regs); break;
68 case 0x02: handle_152402(regs); break;
69 case 0x03: handle_152403(regs); break;
70 default: handle_1524XX(regs); break;
71 }
72}
73
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050074// removable media eject
75static void
76handle_1552(struct bregs *regs)
77{
78 handle_ret(regs, 0);
79}
80
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050081static void
Kevin O'Connorbdce35f2008-02-26 21:33:14 -050082handle_1553(struct bregs *regs)
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050083{
Kevin O'Connorbdce35f2008-02-26 21:33:14 -050084 // XXX - APM call
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050085 handle_ret(regs, RET_EUNSUPPORTED);
86}
87
88// Sleep for n microseconds. currently using the
89// refresh request port 0x61 bit4, toggling every 15usec
90static void
91usleep(u32 count)
92{
93 count = count / 15;
Kevin O'Connoree2fd7a2008-03-02 08:42:16 -050094 u8 kbd = inb(PORT_PS2_CTRLB);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050095 while (count)
Kevin O'Connoree2fd7a2008-03-02 08:42:16 -050096 if ((inb(PORT_PS2_CTRLB) ^ kbd) & KBD_REFRESH)
Kevin O'Connorf076a3e2008-02-25 22:25:15 -050097 count--;
98}
99
100// Wait for CX:DX microseconds. currently using the
101// refresh request port 0x61 bit4, toggling every 15usec
102static void
103handle_1586(struct bregs *regs)
104{
105 irq_enable();
106 usleep((regs->cx << 16) | regs->dx);
107 irq_disable();
108}
109
110static void
111handle_1587(struct bregs *regs)
112{
113 // +++ should probably have descriptor checks
114 // +++ should have exception handlers
115
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500116 u8 prev_a20_enable = set_a20(1); // enable A20 line
117
118 // 128K max of transfer on 386+ ???
119 // source == destination ???
120
121 // ES:SI points to descriptor table
122 // offset use initially comments
123 // ==============================================
124 // 00..07 Unused zeros Null descriptor
125 // 08..0f GDT zeros filled in by BIOS
126 // 10..17 source ssssssss source of data
127 // 18..1f dest dddddddd destination of data
128 // 20..27 CS zeros filled in by BIOS
129 // 28..2f SS zeros filled in by BIOS
130
131 //es:si
132 //eeee0
133 //0ssss
134 //-----
135
136// check for access rights of source & dest here
137
138 // Initialize GDT descriptor
139 u16 si = regs->si;
140 u16 base15_00 = (regs->es << 4) + si;
141 u16 base23_16 = regs->es >> 12;
142 if (base15_00 < (regs->es<<4))
143 base23_16++;
144 SET_VAR(ES, *(u16*)(si+0x08+0), 47); // limit 15:00 = 6 * 8bytes/descriptor
145 SET_VAR(ES, *(u16*)(si+0x08+2), base15_00);// base 15:00
146 SET_VAR(ES, *(u8 *)(si+0x08+4), base23_16);// base 23:16
147 SET_VAR(ES, *(u8 *)(si+0x08+5), 0x93); // access
148 SET_VAR(ES, *(u16*)(si+0x08+6), 0x0000); // base 31:24/reserved/limit 19:16
149
150 // Initialize CS descriptor
151 SET_VAR(ES, *(u16*)(si+0x20+0), 0xffff);// limit 15:00 = normal 64K limit
152 SET_VAR(ES, *(u16*)(si+0x20+2), 0x0000);// base 15:00
153 SET_VAR(ES, *(u8 *)(si+0x20+4), 0x000f);// base 23:16
154 SET_VAR(ES, *(u8 *)(si+0x20+5), 0x9b); // access
155 SET_VAR(ES, *(u16*)(si+0x20+6), 0x0000);// base 31:24/reserved/limit 19:16
156
157 // Initialize SS descriptor
158 u16 ss = GET_SEG(SS);
159 base15_00 = ss << 4;
160 base23_16 = ss >> 12;
161 SET_VAR(ES, *(u16*)(si+0x28+0), 0xffff); // limit 15:00 = normal 64K limit
162 SET_VAR(ES, *(u16*)(si+0x28+2), base15_00);// base 15:00
163 SET_VAR(ES, *(u8 *)(si+0x28+4), base23_16);// base 23:16
164 SET_VAR(ES, *(u8 *)(si+0x28+5), 0x93); // access
165 SET_VAR(ES, *(u16*)(si+0x28+6), 0x0000); // base 31:24/reserved/limit 19:16
166
167 asm volatile(
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500168 // Load new descriptor tables
169 "lgdt %%es:(%1)\n"
170 "lidt %%cs:pmode_IDT_info\n"
171
172 // set PE bit in CR0
173 "movl %%cr0, %%eax\n"
174 "orb $0x01, %%al\n"
175 "movl %%eax, %%cr0\n"
176
177 // far jump to flush CPU queue after transition to protected mode
Kevin O'Connoradb6b372008-03-01 13:38:38 -0500178 "ljmpw $0x0020, $1f\n"
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500179 "1:\n"
180
181 // GDT points to valid descriptor table, now load DS, ES
182 "movw $0x10, %%ax\n" // 010 000 = 2nd descriptor in table, TI=GDT, RPL=00
183 "movw %%ax, %%ds\n"
184 "movw $0x18, %%ax\n" // 011 000 = 3rd descriptor in table, TI=GDT, RPL=00
185 "movw %%ax, %%es\n"
186
187 // move CX words from DS:SI to ES:DI
188 "xorw %%si, %%si\n"
189 "xorw %%di, %%di\n"
190 "cld\n"
191 "rep movsw\n"
192
193 // reset PG bit in CR0 ???
194 "movl %%cr0, %%eax\n"
195 "andb $0xfe, %%al\n"
196 "movl %%eax, %%cr0\n"
197
198 // far jump to flush CPU queue after transition to real mode
199 "ljmpw $0xf000, $2f\n"
200 "2:\n"
201
202 // restore IDT to normal real-mode defaults
203 "lidt %%cs:rmode_IDT_info\n"
204
Kevin O'Connore20ed9f2008-03-01 14:25:44 -0500205 // Restore %ds (from %ss)
206 "movw %%ss, %%ax\n"
207 "movw %%ax, %%ds\n"
208 : : "c" (regs->cx), "r" (si + 8)
209 : "eax", "di", "si"); // XXX - also clobbers %es
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500210
211 set_a20(prev_a20_enable);
212
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500213 handle_ret(regs, 0);
214}
215
216// Get the amount of extended memory (above 1M)
217static void
218handle_1588(struct bregs *regs)
219{
220 regs->al = inb_cmos(CMOS_EXTMEM_LOW);
221 regs->ah = inb_cmos(CMOS_EXTMEM_HIGH);
222 // According to Ralf Brown's interrupt the limit should be 15M,
223 // but real machines mostly return max. 63M.
224 if (regs->ax > 0xffc0)
225 regs->ax = 0xffc0;
226 set_cf(regs, 0);
227}
228
229// Device busy interrupt. Called by Int 16h when no key available
230static void
231handle_1590(struct bregs *regs)
232{
233}
234
235// Interrupt complete. Called by Int 16h when key becomes available
236static void
237handle_1591(struct bregs *regs)
238{
239}
240
Kevin O'Connor38fcbfe2008-02-25 22:30:47 -0500241// keyboard intercept
242static void
243handle_154f(struct bregs *regs)
244{
245 set_cf(regs, 1);
246}
247
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500248static void
249handle_15c0(struct bregs *regs)
250{
251 regs->es = SEG_BIOS;
252 regs->bx = (u16)&BIOS_CONFIG_TABLE;
253}
254
255static void
256handle_15c1(struct bregs *regs)
257{
258 regs->es = GET_BDA(ebda_seg);
259 set_cf(regs, 0);
260}
261
262static void
263handle_15e801(struct bregs *regs)
264{
265 // my real system sets ax and bx to 0
266 // this is confirmed by Ralph Brown list
267 // but syslinux v1.48 is known to behave
268 // strangely if ax is set to 0
269 // regs.u.r16.ax = 0;
270 // regs.u.r16.bx = 0;
271
272 // Get the amount of extended memory (above 1M)
273 regs->cl = inb_cmos(CMOS_EXTMEM_LOW);
274 regs->ch = inb_cmos(CMOS_EXTMEM_HIGH);
275
276 // limit to 15M
277 if (regs->cx > 0x3c00)
278 regs->cx = 0x3c00;
279
280 // Get the amount of extended memory above 16M in 64k blocs
281 regs->dl = inb_cmos(CMOS_EXTMEM2_LOW);
282 regs->dh = inb_cmos(CMOS_EXTMEM2_HIGH);
283
284 // Set configured memory equal to extended memory
285 regs->ax = regs->cx;
286 regs->bx = regs->dx;
287
288 set_cf(regs, 0);
289}
290
291#define ACPI_DATA_SIZE 0x00010000L
292
293static void
294set_e820_range(u16 DI, u32 start, u32 end, u16 type)
295{
296 SET_VAR(ES, *(u16*)(DI+0), start);
297 SET_VAR(ES, *(u16*)(DI+2), start >> 16);
298 SET_VAR(ES, *(u16*)(DI+4), 0x00);
299 SET_VAR(ES, *(u16*)(DI+6), 0x00);
300
301 end -= start;
302 SET_VAR(ES, *(u16*)(DI+8), end);
303 SET_VAR(ES, *(u16*)(DI+10), end >> 16);
304 SET_VAR(ES, *(u16*)(DI+12), 0x0000);
305 SET_VAR(ES, *(u16*)(DI+14), 0x0000);
306
307 SET_VAR(ES, *(u16*)(DI+16), type);
308 SET_VAR(ES, *(u16*)(DI+18), 0x0);
309}
310
311// XXX - should create e820 memory map in post and just copy it here.
312static void
313handle_15e820(struct bregs *regs)
314{
315 if (regs->edx != 0x534D4150) {
316 handle_ret(regs, RET_EUNSUPPORTED);
317 return;
318 }
319
320 u32 extended_memory_size = inb_cmos(CMOS_EXTMEM2_HIGH);
321 extended_memory_size <<= 8;
322 extended_memory_size |= inb_cmos(CMOS_EXTMEM2_LOW);
323 extended_memory_size *= 64;
324 // greater than EFF00000???
325 if (extended_memory_size > 0x3bc000)
326 // everything after this is reserved memory until we get to 0x100000000
327 extended_memory_size = 0x3bc000;
328 extended_memory_size *= 1024;
329 extended_memory_size += (16L * 1024 * 1024);
330
331 if (extended_memory_size <= (16L * 1024 * 1024)) {
332 extended_memory_size = inb_cmos(CMOS_EXTMEM_HIGH);
333 extended_memory_size <<= 8;
334 extended_memory_size |= inb_cmos(CMOS_EXTMEM_LOW);
335 extended_memory_size *= 1024;
336 }
337
338 switch (regs->bx) {
339 case 0:
340 set_e820_range(regs->di, 0x0000000L, 0x0009fc00L, 1);
341 regs->ebx = 1;
342 regs->eax = 0x534D4150;
343 regs->ecx = 0x14;
344 set_cf(regs, 0);
345 break;
346 case 1:
347 set_e820_range(regs->di, 0x0009fc00L, 0x000a0000L, 2);
348 regs->ebx = 2;
349 regs->eax = 0x534D4150;
350 regs->ecx = 0x14;
351 set_cf(regs, 0);
352 break;
353 case 2:
354 set_e820_range(regs->di, 0x000e8000L, 0x00100000L, 2);
355 regs->ebx = 3;
356 regs->eax = 0x534D4150;
357 regs->ecx = 0x14;
358 set_cf(regs, 0);
359 break;
360 case 3:
361 set_e820_range(regs->di, 0x00100000L,
362 extended_memory_size - ACPI_DATA_SIZE, 1);
363 regs->ebx = 4;
364 regs->eax = 0x534D4150;
365 regs->ecx = 0x14;
366 set_cf(regs, 0);
367 break;
368 case 4:
369 set_e820_range(regs->di,
370 extended_memory_size - ACPI_DATA_SIZE,
371 extended_memory_size, 3); // ACPI RAM
372 regs->ebx = 5;
373 regs->eax = 0x534D4150;
374 regs->ecx = 0x14;
375 set_cf(regs, 0);
376 break;
377 case 5:
378 /* 256KB BIOS area at the end of 4 GB */
379 set_e820_range(regs->di, 0xfffc0000L, 0x00000000L, 2);
380 regs->ebx = 0;
381 regs->eax = 0x534D4150;
382 regs->ecx = 0x14;
383 set_cf(regs, 0);
384 break;
385 default: /* AX=E820, DX=534D4150, BX unrecognized */
386 handle_ret(regs, RET_EUNSUPPORTED);
387 }
388}
389
390static void
391handle_15e8XX(struct bregs *regs)
392{
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500393 handle_ret(regs, RET_EUNSUPPORTED);
394}
395
396static void
Kevin O'Connoradb6b372008-03-01 13:38:38 -0500397handle_15e8(struct bregs *regs)
398{
399 switch (regs->al) {
400 case 0x01: handle_15e801(regs); break;
401 case 0x20: handle_15e820(regs); break;
402 default: handle_15e8XX(regs); break;
403 }
404}
405
406static void
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500407handle_15XX(struct bregs *regs)
408{
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500409 handle_ret(regs, RET_EUNSUPPORTED);
410}
411
412// INT 15h System Services Entry Point
413void VISIBLE
414handle_15(struct bregs *regs)
415{
Kevin O'Connoradb6b372008-03-01 13:38:38 -0500416 //debug_enter(regs);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500417 switch (regs->ah) {
Kevin O'Connoradb6b372008-03-01 13:38:38 -0500418 case 0x24: handle_1524(regs); break;
Kevin O'Connor38fcbfe2008-02-25 22:30:47 -0500419 case 0x4f: handle_154f(regs); break;
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500420 case 0x52: handle_1552(regs); break;
Kevin O'Connorbdce35f2008-02-26 21:33:14 -0500421 case 0x53: handle_1553(regs); break;
422 case 0x83: handle_1583(regs); break;
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500423 case 0x86: handle_1586(regs); break;
424 case 0x87: handle_1587(regs); break;
425 case 0x88: handle_1588(regs); break;
426 case 0x90: handle_1590(regs); break;
427 case 0x91: handle_1591(regs); break;
428 case 0xc0: handle_15c0(regs); break;
429 case 0xc1: handle_15c1(regs); break;
430 case 0xc2: handle_15c2(regs); break;
Kevin O'Connoradb6b372008-03-01 13:38:38 -0500431 case 0xe8: handle_15e8(regs); break;
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500432 default: handle_15XX(regs); break;
433 }
434 debug_exit(regs);
435}
436
437// INT 12h Memory Size Service Entry Point
438void VISIBLE
439handle_12(struct bregs *regs)
440{
441 debug_enter(regs);
442 regs->ax = GET_BDA(mem_size_kb);
443 debug_exit(regs);
444}
445
446// INT 11h Equipment List Service Entry Point
447void VISIBLE
448handle_11(struct bregs *regs)
449{
450 debug_enter(regs);
451 regs->ax = GET_BDA(equipment_list_flags);
452 debug_exit(regs);
453}
454
455// INT 05h Print Screen Service Entry Point
456void VISIBLE
457handle_05(struct bregs *regs)
458{
459 debug_enter(regs);
460}
461
462// INT 10h Video Support Service Entry Point
463void VISIBLE
464handle_10(struct bregs *regs)
465{
466 debug_enter(regs);
467 // dont do anything, since the VGA BIOS handles int10h requests
468}
469
470void VISIBLE
471handle_nmi(struct bregs *regs)
472{
473 debug_enter(regs);
474 // XXX
475}
476
477// INT 75 - IRQ13 - MATH COPROCESSOR EXCEPTION
478void VISIBLE
479handle_75(struct bregs *regs)
480{
481 debug_enter(regs);
Kevin O'Connor38fcbfe2008-02-25 22:30:47 -0500482
483 // clear irq13
484 outb(0, PORT_MATH_CLEAR);
485 // clear interrupt
486 eoi_both_pics();
487 // legacy nmi call
488 struct bregs br;
489 memset(&br, 0, sizeof(br));
490 call16_int(0x02, &br);
Kevin O'Connorf076a3e2008-02-25 22:25:15 -0500491}