Kevin O'Connor | ed68e5b | 2011-12-31 04:15:12 -0500 | [diff] [blame^] | 1 | #ifndef __STDVGA_H |
| 2 | #define __STDVGA_H |
| 3 | |
| 4 | #include "types.h" // u8 |
| 5 | |
| 6 | // VGA registers |
| 7 | #define VGAREG_ACTL_ADDRESS 0x3c0 |
| 8 | #define VGAREG_ACTL_WRITE_DATA 0x3c0 |
| 9 | #define VGAREG_ACTL_READ_DATA 0x3c1 |
| 10 | |
| 11 | #define VGAREG_INPUT_STATUS 0x3c2 |
| 12 | #define VGAREG_WRITE_MISC_OUTPUT 0x3c2 |
| 13 | #define VGAREG_VIDEO_ENABLE 0x3c3 |
| 14 | #define VGAREG_SEQU_ADDRESS 0x3c4 |
| 15 | #define VGAREG_SEQU_DATA 0x3c5 |
| 16 | |
| 17 | #define VGAREG_PEL_MASK 0x3c6 |
| 18 | #define VGAREG_DAC_STATE 0x3c7 |
| 19 | #define VGAREG_DAC_READ_ADDRESS 0x3c7 |
| 20 | #define VGAREG_DAC_WRITE_ADDRESS 0x3c8 |
| 21 | #define VGAREG_DAC_DATA 0x3c9 |
| 22 | |
| 23 | #define VGAREG_READ_FEATURE_CTL 0x3ca |
| 24 | #define VGAREG_READ_MISC_OUTPUT 0x3cc |
| 25 | |
| 26 | #define VGAREG_GRDC_ADDRESS 0x3ce |
| 27 | #define VGAREG_GRDC_DATA 0x3cf |
| 28 | |
| 29 | #define VGAREG_MDA_CRTC_ADDRESS 0x3b4 |
| 30 | #define VGAREG_MDA_CRTC_DATA 0x3b5 |
| 31 | #define VGAREG_VGA_CRTC_ADDRESS 0x3d4 |
| 32 | #define VGAREG_VGA_CRTC_DATA 0x3d5 |
| 33 | |
| 34 | #define VGAREG_MDA_WRITE_FEATURE_CTL 0x3ba |
| 35 | #define VGAREG_VGA_WRITE_FEATURE_CTL 0x3da |
| 36 | #define VGAREG_ACTL_RESET 0x3da |
| 37 | |
| 38 | #define VGAREG_MDA_MODECTL 0x3b8 |
| 39 | #define VGAREG_CGA_MODECTL 0x3d8 |
| 40 | #define VGAREG_CGA_PALETTE 0x3d9 |
| 41 | |
| 42 | /* Video memory */ |
| 43 | #define SEG_GRAPH 0xA000 |
| 44 | #define SEG_CTEXT 0xB800 |
| 45 | #define SEG_MTEXT 0xB000 |
| 46 | |
| 47 | /* |
| 48 | * Tables of default values for each mode |
| 49 | */ |
| 50 | #define TEXT 0x80 |
| 51 | |
| 52 | #define CTEXT (0x00 | TEXT) |
| 53 | #define MTEXT (0x01 | TEXT) |
| 54 | #define CGA 0x02 |
| 55 | #define PLANAR1 0x03 |
| 56 | #define PLANAR4 0x04 |
| 57 | #define LINEAR8 0x05 |
| 58 | |
| 59 | // for SVGA |
| 60 | #define LINEAR15 0x10 |
| 61 | #define LINEAR16 0x11 |
| 62 | #define LINEAR24 0x12 |
| 63 | #define LINEAR32 0x13 |
| 64 | |
| 65 | struct vgamode_s { |
| 66 | u8 svgamode; |
| 67 | u8 memmodel; /* CTEXT,MTEXT,CGA,PL1,PL2,PL4,P8,P15,P16,P24,P32 */ |
| 68 | u8 twidth; |
| 69 | u8 theight; |
| 70 | u8 cheight; |
| 71 | u8 pixbits; |
| 72 | u16 sstart; |
| 73 | u16 slength; |
| 74 | |
| 75 | u8 pelmask; |
| 76 | u8 *dac; |
| 77 | u16 dacsize; |
| 78 | u8 *sequ_regs; |
| 79 | u8 miscreg; |
| 80 | u8 *crtc_regs; |
| 81 | u8 *actl_regs; |
| 82 | u8 *grdc_regs; |
| 83 | }; |
| 84 | |
| 85 | struct saveVideoHardware { |
| 86 | u8 sequ_index; |
| 87 | u8 crtc_index; |
| 88 | u8 grdc_index; |
| 89 | u8 actl_index; |
| 90 | u8 feature; |
| 91 | u8 sequ_regs[4]; |
| 92 | u8 sequ0; |
| 93 | u8 crtc_regs[25]; |
| 94 | u8 actl_regs[20]; |
| 95 | u8 grdc_regs[9]; |
| 96 | u16 crtc_addr; |
| 97 | u8 plane_latch[4]; |
| 98 | }; |
| 99 | |
| 100 | struct saveDACcolors { |
| 101 | u8 rwmode; |
| 102 | u8 peladdr; |
| 103 | u8 pelmask; |
| 104 | u8 dac[768]; |
| 105 | u8 color_select; |
| 106 | }; |
| 107 | |
| 108 | void vgahw_screen_disable(void); |
| 109 | void vgahw_screen_enable(void); |
| 110 | void vgahw_set_border_color(u8 color); |
| 111 | void vgahw_set_overscan_border_color(u8 color); |
| 112 | u8 vgahw_get_overscan_border_color(void); |
| 113 | void vgahw_set_palette(u8 palid); |
| 114 | void vgahw_set_single_palette_reg(u8 reg, u8 val); |
| 115 | u8 vgahw_get_single_palette_reg(u8 reg); |
| 116 | void vgahw_set_all_palette_reg(u16 seg, u8 *data_far); |
| 117 | void vgahw_get_all_palette_reg(u16 seg, u8 *data_far); |
| 118 | void vgahw_toggle_intensity(u8 flag); |
| 119 | void vgahw_select_video_dac_color_page(u8 flag, u8 data); |
| 120 | void vgahw_read_video_dac_state(u8 *pmode, u8 *curpage); |
| 121 | void vgahw_set_dac_regs(u16 seg, u8 *data_far, u8 start, int count); |
| 122 | void vgahw_get_dac_regs(u16 seg, u8 *data_far, u8 start, int count); |
| 123 | void vgahw_set_pel_mask(u8 val); |
| 124 | u8 vgahw_get_pel_mask(void); |
| 125 | void vgahw_save_dac_state(u16 seg, struct saveDACcolors *info); |
| 126 | void vgahw_restore_dac_state(u16 seg, struct saveDACcolors *info); |
| 127 | void vgahw_sequ_write(u8 index, u8 value); |
| 128 | void vgahw_grdc_write(u8 index, u8 value); |
| 129 | void vgahw_set_text_block_specifier(u8 spec); |
| 130 | void get_font_access(void); |
| 131 | void release_font_access(void); |
| 132 | void vgahw_set_cursor_shape(u8 start, u8 end); |
| 133 | void vgahw_set_active_page(u16 address); |
| 134 | void vgahw_set_cursor_pos(u16 address); |
| 135 | void vgahw_set_scan_lines(u8 lines); |
| 136 | u16 vgahw_get_vde(void); |
| 137 | void vgahw_save_state(u16 seg, struct saveVideoHardware *info); |
| 138 | void vgahw_restore_state(u16 seg, struct saveVideoHardware *info); |
| 139 | void vgahw_set_mode(struct vgamode_s *vmode_g); |
| 140 | void vgahw_enable_video_addressing(u8 disable); |
| 141 | void vgahw_init(void); |
| 142 | |
| 143 | #endif // stdvga.h |