blob: 4b4f291a85dbdec9d2d869c60f5053e0d88349bd [file] [log] [blame]
Isaku Yamahataecbe3fd2012-11-28 10:17:36 +01001/*
2 * Bochs/QEMU ACPI DSDT ASL definition
3 *
4 * Copyright (c) 2006 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License version 2 as published by the Free Software Foundation.
9 *
10 * This library is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * Lesser General Public License for more details.
14 *
15 * You should have received a copy of the GNU Lesser General Public
16 * License along with this library; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19/*
20 * Copyright (c) 2010 Isaku Yamahata
21 * yamahata at valinux co jp
22 * Based on acpi-dsdt.dsl, but heavily modified for q35 chipset.
23 */
24
25DefinitionBlock (
26 "q35-acpi-dsdt.aml",// Output Filename
27 "DSDT", // Signature
28 0x01, // DSDT Compliance Revision
29 "BXPC", // OEMID
30 "BXDSDT", // TABLE ID
31 0x2 // OEM Revision
32 )
33{
34 Scope (\)
35 {
36 /* Debug Output */
37 OperationRegion (DBG, SystemIO, 0x0402, 0x01)
38 Field (DBG, ByteAcc, NoLock, Preserve)
39 {
40 DBGB, 8,
41 }
42
43 /* Debug method - use this method to send output to the QEMU
44 * BIOS debug port. This method handles strings, integers,
45 * and buffers. For example: DBUG("abc") DBUG(0x123) */
46 Method(DBUG, 1) {
47 ToHexString(Arg0, Local0)
48 ToBuffer(Local0, Local0)
49 Subtract(SizeOf(Local0), 1, Local1)
50 Store(Zero, Local2)
51 While (LLess(Local2, Local1)) {
52 Store(DerefOf(Index(Local0, Local2)), DBGB)
53 Increment(Local2)
54 }
55 Store(0x0A, DBGB)
56 }
57 }
58
59
60 Scope (\_SB)
61 {
62 OperationRegion(PCST, SystemIO, 0xae00, 0x0c)
63 OperationRegion(PCSB, SystemIO, 0xae0c, 0x01)
64 Field (PCSB, AnyAcc, NoLock, WriteAsZeros)
65 {
66 PCIB, 8,
67 }
68 }
69
70 /* Zero => PIC mode, One => APIC Mode */
71 Name (\PICF, Zero)
72 Method (\_PIC, 1, NotSerialized)
73 {
74 Store (Arg0, \PICF)
75 }
76
77 /* PCI Bus definition */
78 Scope(\_SB) {
79
80 Device(PCI0) {
81 Name (_HID, EisaId ("PNP0A08"))
82 Name (_CID, EisaId ("PNP0A03"))
83 Name (_ADR, 0x00)
84 Name (_UID, 1)
85
86 // _OSC: based on sample of ACPI3.0b spec
87 Name(SUPP,0) // PCI _OSC Support Field value
88 Name(CTRL,0) // PCI _OSC Control Field value
89 Method(_OSC,4)
90 {
91 // Create DWORD-addressable fields from the Capabilities Buffer
92 CreateDWordField(Arg3,0,CDW1)
93
94 // Check for proper UUID
95 If(LEqual(Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")))
96 {
97 // Create DWORD-addressable fields from the Capabilities Buffer
98 CreateDWordField(Arg3,4,CDW2)
99 CreateDWordField(Arg3,8,CDW3)
100
101 // Save Capabilities DWORD2 & 3
102 Store(CDW2,SUPP)
103 Store(CDW3,CTRL)
104
105 // Always allow native PME, AER (no dependencies)
106 // Never allow SHPC (no SHPC controller in this system)
107 And(CTRL,0x1D,CTRL)
108
109#if 0 // For now, nothing to do
110 If(Not(And(CDW1,1))) // Query flag clear?
111 { // Disable GPEs for features granted native control.
112 If(And(CTRL,0x01)) // Hot plug control granted?
113 {
114 Store(0,HPCE) // clear the hot plug SCI enable bit
115 Store(1,HPCS) // clear the hot plug SCI status bit
116 }
117 If(And(CTRL,0x04)) // PME control granted?
118 {
119 Store(0,PMCE) // clear the PME SCI enable bit
120 Store(1,PMCS) // clear the PME SCI status bit
121 }
122 If(And(CTRL,0x10)) // OS restoring PCI Express cap structure?
123 {
124 // Set status to not restore PCI Express cap structure
125 // upon resume from S3
126 Store(1,S3CR)
127 }
128
129 }
130#endif
131 If(LNotEqual(Arg1,One))
132 { // Unknown revision
133 Or(CDW1,0x08,CDW1)
134 }
135 If(LNotEqual(CDW3,CTRL))
136 { // Capabilities bits were masked
137 Or(CDW1,0x10,CDW1)
138 }
139 // Update DWORD3 in the buffer
140 Store(CTRL,CDW3)
141 } Else {
142 Or(CDW1,4,CDW1) // Unrecognized UUID
143 }
144 Return(Arg3)
145 }
146
147#define prt_slot_lnk(nr, lnk0, lnk1, lnk2, lnk3) \
148 Package() { nr##ffff, 0, lnk0, 0 }, \
149 Package() { nr##ffff, 1, lnk1, 0 }, \
150 Package() { nr##ffff, 2, lnk2, 0 }, \
151 Package() { nr##ffff, 3, lnk3, 0 }
152
153#define prt_slot_lnkA(nr) prt_slot_lnk(nr, LNKA, LNKB, LNKC, LNKD)
154#define prt_slot_lnkB(nr) prt_slot_lnk(nr, LNKB, LNKC, LNKD, LNKA)
155#define prt_slot_lnkC(nr) prt_slot_lnk(nr, LNKC, LNKD, LNKA, LNKB)
156#define prt_slot_lnkD(nr) prt_slot_lnk(nr, LNKD, LNKA, LNKB, LNKC)
157
158#define prt_slot_lnkE(nr) prt_slot_lnk(nr, LNKE, LNKF, LNKG, LNKH)
159#define prt_slot_lnkF(nr) prt_slot_lnk(nr, LNKF, LNKG, LNKH, LNKE)
160#define prt_slot_lnkG(nr) prt_slot_lnk(nr, LNKG, LNKH, LNKE, LNKF)
161#define prt_slot_lnkH(nr) prt_slot_lnk(nr, LNKH, LNKE, LNKF, LNKG)
162
163#define prt_slot_gsi(nr, gsi0, gsi1, gsi2, gsi3) \
164 Package() { nr##ffff, 0, 0, gsi0 }, \
165 Package() { nr##ffff, 1, 0, gsi1 }, \
166 Package() { nr##ffff, 2, 0, gsi2 }, \
167 Package() { nr##ffff, 3, 0, gsi3 }
168
169#define GSIA 0x10
170#define GSIB 0x11
171#define GSIC 0x12
172#define GSID 0x13
173#define GSIE 0x14
174#define GSIF 0x15
175#define GSIG 0x16
176#define GSIH 0x17
177
178#define prt_slot_gsiA(nr) prt_slot_gsi(nr, GSIA, GSIB, GSIC, GSID)
179#define prt_slot_gsiB(nr) prt_slot_gsi(nr, GSIB, GSIC, GSID, GSIA)
180#define prt_slot_gsiC(nr) prt_slot_gsi(nr, GSIC, GSID, GSIA, GSIB)
181#define prt_slot_gsiD(nr) prt_slot_gsi(nr, GSID, GSIA, GSIB, GSIC)
182
183#define prt_slot_gsiE(nr) prt_slot_gsi(nr, GSIE, GSIF, GSIG, GSIH)
184#define prt_slot_gsiF(nr) prt_slot_gsi(nr, GSIF, GSIG, GSIH, GSIE)
185#define prt_slot_gsiG(nr) prt_slot_gsi(nr, GSIG, GSIH, GSIE, GSIF)
186#define prt_slot_gsiH(nr) prt_slot_gsi(nr, GSIH, GSIE, GSIF, GSIG)
187
188 NAME(PRTP, package()
189 {
190 prt_slot_lnkE(0x0000),
191 prt_slot_lnkF(0x0001),
192 prt_slot_lnkG(0x0002),
193 prt_slot_lnkH(0x0003),
194 prt_slot_lnkE(0x0004),
195 prt_slot_lnkF(0x0005),
196 prt_slot_lnkG(0x0006),
197 prt_slot_lnkH(0x0007),
198 prt_slot_lnkE(0x0008),
199 prt_slot_lnkF(0x0009),
200 prt_slot_lnkG(0x000a),
201 prt_slot_lnkH(0x000b),
202 prt_slot_lnkE(0x000c),
203 prt_slot_lnkF(0x000d),
204 prt_slot_lnkG(0x000e),
205 prt_slot_lnkH(0x000f),
206 prt_slot_lnkE(0x0010),
207 prt_slot_lnkF(0x0011),
208 prt_slot_lnkG(0x0012),
209 prt_slot_lnkH(0x0013),
210 prt_slot_lnkE(0x0014),
211 prt_slot_lnkF(0x0015),
212 prt_slot_lnkG(0x0016),
213 prt_slot_lnkH(0x0017),
214 prt_slot_lnkE(0x0018),
215
216 /* INTA -> PIRQA for slot 25 - 31
217 see the default value of D<N>IR */
218 prt_slot_lnkA(0x0019),
219 prt_slot_lnkA(0x001a),
220 prt_slot_lnkA(0x001b),
221 prt_slot_lnkA(0x001c),
222 prt_slot_lnkA(0x001d),
223
224 /* PCIe->PCI bridge. use PIRQ[E-H] */
225 prt_slot_lnkE(0x001e),
226
227 prt_slot_lnkA(0x001f)
228 })
229
230 NAME(PRTA, package()
231 {
232 prt_slot_gsiE(0x0000),
233 prt_slot_gsiF(0x0001),
234 prt_slot_gsiG(0x0002),
235 prt_slot_gsiH(0x0003),
236 prt_slot_gsiE(0x0004),
237 prt_slot_gsiF(0x0005),
238 prt_slot_gsiG(0x0006),
239 prt_slot_gsiH(0x0007),
240 prt_slot_gsiE(0x0008),
241 prt_slot_gsiF(0x0009),
242 prt_slot_gsiG(0x000a),
243 prt_slot_gsiH(0x000b),
244 prt_slot_gsiE(0x000c),
245 prt_slot_gsiF(0x000d),
246 prt_slot_gsiG(0x000e),
247 prt_slot_gsiH(0x000f),
248 prt_slot_gsiE(0x0010),
249 prt_slot_gsiF(0x0011),
250 prt_slot_gsiG(0x0012),
251 prt_slot_gsiH(0x0013),
252 prt_slot_gsiE(0x0014),
253 prt_slot_gsiF(0x0015),
254 prt_slot_gsiG(0x0016),
255 prt_slot_gsiH(0x0017),
256 prt_slot_gsiE(0x0018),
257
258 /* INTA -> PIRQA for slot 25 - 31, but 30
259 see the default value of D<N>IR */
260 prt_slot_gsiA(0x0019),
261 prt_slot_gsiA(0x001a),
262 prt_slot_gsiA(0x001b),
263 prt_slot_gsiA(0x001c),
264 prt_slot_gsiA(0x001d),
265
266 /* PCIe->PCI bridge. use PIRQ[E-H] */
267 prt_slot_gsiE(0x001e),
268
269 prt_slot_gsiA(0x001f)
270 })
271
272 Method(_PRT, 0, NotSerialized)
273 {
274 /* PCI IRQ routing table, example from ACPI 2.0a specification,
275 section 6.2.8.1 */
276 /* Note: we provide the same info as the PCI routing
277 table of the Bochs BIOS */
278 If (LEqual (\PICF, Zero))
279 {
280 Return (PRTP)
281 }
282 Else
283 {
284 Return (PRTA)
285 }
286 }
287
288 Name (CRES, ResourceTemplate ()
289 {
290 WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
291 0x0000, // Address Space Granularity
292 0x0000, // Address Range Minimum
293 0x00FF, // Address Range Maximum
294 0x0000, // Address Translation Offset
295 0x0100, // Address Length
296 ,, )
297 IO (Decode16,
298 0x0CF8, // Address Range Minimum
299 0x0CF8, // Address Range Maximum
300 0x01, // Address Alignment
301 0x08, // Address Length
302 )
303 WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
304 0x0000, // Address Space Granularity
305 0x0000, // Address Range Minimum
306 0x0CF7, // Address Range Maximum
307 0x0000, // Address Translation Offset
308 0x0CF8, // Address Length
309 ,, , TypeStatic)
310 WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
311 0x0000, // Address Space Granularity
312 0x0D00, // Address Range Minimum
313 0xFFFF, // Address Range Maximum
314 0x0000, // Address Translation Offset
315 0xF300, // Address Length
316 ,, , TypeStatic)
317 DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
318 0x00000000, // Address Space Granularity
319 0x000A0000, // Address Range Minimum
320 0x000BFFFF, // Address Range Maximum
321 0x00000000, // Address Translation Offset
322 0x00020000, // Address Length
323 ,, , AddressRangeMemory, TypeStatic)
324 DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
325 0x00000000, // Address Space Granularity
326 0xC0000000, // Address Range Minimum
327 0xFEBFFFFF, // Address Range Maximum
328 0x00000000, // Address Translation Offset
329 0x3EC00000, // Address Length
330 ,, PW32, AddressRangeMemory, TypeStatic)
331 })
332 Name (CR64, ResourceTemplate ()
333 {
334 QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
335 0x00000000, // Address Space Granularity
336 0x8000000000, // Address Range Minimum
337 0xFFFFFFFFFF, // Address Range Maximum
338 0x00000000, // Address Translation Offset
339 0x8000000000, // Address Length
340 ,, PW64, AddressRangeMemory, TypeStatic)
341 })
342 Method (_CRS, 0)
343 {
344 /* see see acpi.h, struct bfld */
345 External (BDAT, OpRegionObj)
346 Field(BDAT, QWordAcc, NoLock, Preserve) {
347 P0S, 64,
348 P0E, 64,
349 P0L, 64,
350 P1S, 64,
351 P1E, 64,
352 P1L, 64,
353 }
354 Field(BDAT, DWordAcc, NoLock, Preserve) {
355 P0SL, 32,
356 P0SH, 32,
357 P0EL, 32,
358 P0EH, 32,
359 P0LL, 32,
360 P0LH, 32,
361 P1SL, 32,
362 P1SH, 32,
363 P1EL, 32,
364 P1EH, 32,
365 P1LL, 32,
366 P1LH, 32,
367 }
368
369 /* fixup 32bit pci io window */
370 CreateDWordField (CRES,\_SB.PCI0.PW32._MIN, PS32)
371 CreateDWordField (CRES,\_SB.PCI0.PW32._MAX, PE32)
372 CreateDWordField (CRES,\_SB.PCI0.PW32._LEN, PL32)
373 Store (P0SL, PS32)
374 Store (P0EL, PE32)
375 Store (P0LL, PL32)
376
377 If (LAnd(LEqual(P1SL, 0x00), LEqual(P1SH, 0x00))) {
378 Return (CRES)
379 } Else {
380 /* fixup 64bit pci io window */
381 CreateQWordField (CR64,\_SB.PCI0.PW64._MIN, PS64)
382 CreateQWordField (CR64,\_SB.PCI0.PW64._MAX, PE64)
383 CreateQWordField (CR64,\_SB.PCI0.PW64._LEN, PL64)
384 Store (P1S, PS64)
385 Store (P1E, PE64)
386 Store (P1L, PL64)
387 /* add window and return result */
388 ConcatenateResTemplate (CRES, CR64, Local0)
389 Return (Local0)
390 }
391 }
392 }
393 }
394
395 Scope(\_SB.PCI0) {
396 Device (VGA) {
397 Name (_ADR, 0x00020000)
398 Method (_S1D, 0, NotSerialized)
399 {
400 Return (0x00)
401 }
402 Method (_S2D, 0, NotSerialized)
403 {
404 Return (0x00)
405 }
406 Method (_S3D, 0, NotSerialized)
407 {
408 Return (0x00)
409 }
410 }
411
412
413 /* PCI D31:f0 LPC ISA bridge */
414 Device (LPC) {
415 /* PCI D31:f0 */
416 Name (_ADR, 0x001f0000)
417
418 /* ICH9 PCI to ISA irq remapping */
419 OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C)
420 Field (PIRQ, ByteAcc, NoLock, Preserve)
421 {
422 PRQA, 8,
423 PRQB, 8,
424 PRQC, 8,
425 PRQD, 8,
426
427 Offset (0x08),
428 PRQE, 8,
429 PRQF, 8,
430 PRQG, 8,
431 PRQH, 8
432 }
433
434 OperationRegion (LPCD, PCI_Config, 0x80, 0x2)
435 Field (LPCD, AnyAcc, NoLock, Preserve)
436 {
437 COMA, 3,
438 , 1,
439 COMB, 3,
440
441 Offset(0x01),
442 LPTD, 2,
443 , 2,
444 FDCD, 2
445 }
446 OperationRegion (LPCE, PCI_Config, 0x82, 0x2)
447 Field (LPCE, AnyAcc, NoLock, Preserve)
448 {
449 CAEN, 1,
450 CBEN, 1,
451 LPEN, 1,
452 FDEN, 1
453 }
454
455 /* High Precision Event Timer */
456 Device(HPET) {
457 Name(_HID, EISAID("PNP0103"))
458 Name(_UID, 0)
459 Method (_STA, 0, NotSerialized) {
460 Return(0x0F)
461 }
462 Name(_CRS, ResourceTemplate() {
463 DWordMemory(
464 ResourceConsumer, PosDecode, MinFixed, MaxFixed,
465 NonCacheable, ReadWrite,
466 0x00000000,
467 0xFED00000,
468 0xFED003FF,
469 0x00000000,
470 0x00000400 /* 1K memory: FED00000 - FED003FF */
471 )
472 })
473 }
474 /* Real-time clock */
475 Device (RTC)
476 {
477 Name (_HID, EisaId ("PNP0B00"))
478 Name (_CRS, ResourceTemplate ()
479 {
480 IO (Decode16, 0x0070, 0x0070, 0x10, 0x02)
481 IRQNoFlags () {8}
482 IO (Decode16, 0x0072, 0x0072, 0x02, 0x06)
483 })
484 }
485
486 /* Keyboard seems to be important for WinXP install */
487 Device (KBD)
488 {
489 Name (_HID, EisaId ("PNP0303"))
490 Method (_STA, 0, NotSerialized)
491 {
492 Return (0x0f)
493 }
494
495 Method (_CRS, 0, NotSerialized)
496 {
497 Name (TMP, ResourceTemplate ()
498 {
499 IO (Decode16,
500 0x0060, // Address Range Minimum
501 0x0060, // Address Range Maximum
502 0x01, // Address Alignment
503 0x01, // Address Length
504 )
505 IO (Decode16,
506 0x0064, // Address Range Minimum
507 0x0064, // Address Range Maximum
508 0x01, // Address Alignment
509 0x01, // Address Length
510 )
511 IRQNoFlags ()
512 {1}
513 })
514 Return (TMP)
515 }
516 }
517
518 /* PS/2 mouse */
519 Device (MOU)
520 {
521 Name (_HID, EisaId ("PNP0F13"))
522 Method (_STA, 0, NotSerialized)
523 {
524 Return (0x0f)
525 }
526
527 Method (_CRS, 0, NotSerialized)
528 {
529 Name (TMP, ResourceTemplate ()
530 {
531 IRQNoFlags () {12}
532 })
533 Return (TMP)
534 }
535 }
536
537 /* PS/2 floppy controller */
538 Device (FDC0)
539 {
540 Name (_HID, EisaId ("PNP0700"))
541 Method (_STA, 0, NotSerialized)
542 {
543 Store (\_SB.PCI0.LPC.FDEN, Local0)
544 If (LEqual (Local0, 0))
545 {
546 Return (0x00)
547 }
548 Else
549 {
550 Return (0x0F)
551 }
552 }
553 Method (_CRS, 0, NotSerialized)
554 {
555 Name (BUF0, ResourceTemplate ()
556 {
557 IO (Decode16, 0x03F2, 0x03F2, 0x00, 0x04)
558 IO (Decode16, 0x03F7, 0x03F7, 0x00, 0x01)
559 IRQNoFlags () {6}
560 DMA (Compatibility, NotBusMaster, Transfer8) {2}
561 })
562 Return (BUF0)
563 }
564 }
565
566 /* Parallel port */
567 Device (LPT)
568 {
569 Name (_HID, EisaId ("PNP0400"))
570 Method (_STA, 0, NotSerialized)
571 {
572 Store (\_SB.PCI0.LPC.LPEN, Local0)
573 If (LEqual (Local0, 0))
574 {
575 Return (0x00)
576 }
577 Else
578 {
579 Return (0x0F)
580 }
581 }
582 Method (_CRS, 0, NotSerialized)
583 {
584 Name (BUF0, ResourceTemplate ()
585 {
586 IO (Decode16, 0x0378, 0x0378, 0x08, 0x08)
587 IRQNoFlags () {7}
588 })
589 Return (BUF0)
590 }
591 }
592
593 /* Serial Ports */
594 Device (COM1)
595 {
596 Name (_HID, EisaId ("PNP0501"))
597 Name (_UID, 0x01)
598 Method (_STA, 0, NotSerialized)
599 {
600 Store (\_SB.PCI0.LPC.CAEN, Local0)
601 If (LEqual (Local0, 0))
602 {
603 Return (0x00)
604 }
605 Else
606 {
607 Return (0x0F)
608 }
609 }
610 Method (_CRS, 0, NotSerialized)
611 {
612 Name (BUF0, ResourceTemplate ()
613 {
614 IO (Decode16, 0x03F8, 0x03F8, 0x00, 0x08)
615 IRQNoFlags () {4}
616 })
617 Return (BUF0)
618 }
619 }
620
621 Device (COM2)
622 {
623 Name (_HID, EisaId ("PNP0501"))
624 Name (_UID, 0x02)
625 Method (_STA, 0, NotSerialized)
626 {
627 Store (\_SB.PCI0.LPC.CBEN, Local0)
628 If (LEqual (Local0, 0))
629 {
630 Return (0x00)
631 }
632 Else
633 {
634 Return (0x0F)
635 }
636 }
637 Method (_CRS, 0, NotSerialized)
638 {
639 Name (BUF0, ResourceTemplate ()
640 {
641 IO (Decode16, 0x02F8, 0x02F8, 0x00, 0x08)
642 IRQNoFlags () {3}
643 })
644 Return (BUF0)
645 }
646 }
647 }
648 }
649
650 /* PCI IRQs */
651 Scope(\_SB) {
652#define define_link(link, uid, reg) \
653 Device(link){ \
654 Name(_HID, EISAID("PNP0C0F")) \
655 Name(_UID, uid) \
656 Name(_PRS, ResourceTemplate(){ \
657 Interrupt (, Level, ActiveHigh, \
658 Shared) \
659 { 5, 10, 11 } \
660 }) \
661 Method (_STA, 0, NotSerialized) \
662 { \
663 Store (0x0B, Local0) \
664 If (And (0x80, reg, Local1)) \
665 { \
666 Store (0x09, Local0) \
667 } \
668 Return (Local0) \
669 } \
670 Method (_DIS, 0, NotSerialized) \
671 { \
672 Or (reg, 0x80, reg) \
673 } \
674 Method (_CRS, 0, NotSerialized) \
675 { \
676 Name (PRR0, ResourceTemplate () \
677 { \
678 Interrupt (, Level, ActiveHigh, \
679 Shared) \
680 {1} \
681 }) \
682 CreateDWordField (PRR0, 0x05, TMP) \
683 And (reg, 0x0F, Local0) \
684 Store (Local0, TMP) \
685 Return (PRR0) \
686 } \
687 Method (_SRS, 1, NotSerialized) \
688 { \
689 CreateDWordField (Arg0, 0x05, TMP) \
690 Store (TMP, reg) \
691 } \
692 }
693
694 define_link(LNKA, 0, \_SB.PCI0.LPC.PRQA)
695 define_link(LNKB, 1, \_SB.PCI0.LPC.PRQB)
696 define_link(LNKC, 2, \_SB.PCI0.LPC.PRQC)
697 define_link(LNKD, 3, \_SB.PCI0.LPC.PRQD)
698 define_link(LNKE, 4, \_SB.PCI0.LPC.PRQE)
699 define_link(LNKF, 5, \_SB.PCI0.LPC.PRQF)
700 define_link(LNKG, 6, \_SB.PCI0.LPC.PRQG)
701 define_link(LNKH, 7, \_SB.PCI0.LPC.PRQH)
702 }
703
704 /* CPU hotplug */
705 Scope(\_SB) {
706 /* Objects filled in by run-time generated SSDT */
707 External(NTFY, MethodObj)
708 External(CPON, PkgObj)
709
710 /* Methods called by run-time generated SSDT Processor objects */
711 Method (CPMA, 1, NotSerialized) {
712 // _MAT method - create an madt apic buffer
713 // Local0 = CPON flag for this cpu
714 Store(DerefOf(Index(CPON, Arg0)), Local0)
715 // Local1 = Buffer (in madt apic form) to return
716 Store(Buffer(8) {0x00, 0x08, 0x00, 0x00, 0x00, 0, 0, 0}, Local1)
717 // Update the processor id, lapic id, and enable/disable status
718 Store(Arg0, Index(Local1, 2))
719 Store(Arg0, Index(Local1, 3))
720 Store(Local0, Index(Local1, 4))
721 Return (Local1)
722 }
723 Method (CPST, 1, NotSerialized) {
724 // _STA method - return ON status of cpu
725 // Local0 = CPON flag for this cpu
726 Store(DerefOf(Index(CPON, Arg0)), Local0)
727 If (Local0) { Return(0xF) } Else { Return(0x0) }
728 }
729 Method (CPEJ, 2, NotSerialized) {
730 // _EJ0 method - eject callback
731 Sleep(200)
732 }
733
734 /* CPU hotplug notify method */
735 OperationRegion(PRST, SystemIO, 0xaf00, 32)
736 Field (PRST, ByteAcc, NoLock, Preserve)
737 {
738 PRS, 256
739 }
740 Method(PRSC, 0) {
741 // Local5 = active cpu bitmap
742 Store (PRS, Local5)
743 // Local2 = last read byte from bitmap
744 Store (Zero, Local2)
745 // Local0 = cpuid iterator
746 Store (Zero, Local0)
747 While (LLess(Local0, SizeOf(CPON))) {
748 // Local1 = CPON flag for this cpu
749 Store(DerefOf(Index(CPON, Local0)), Local1)
750 If (And(Local0, 0x07)) {
751 // Shift down previously read bitmap byte
752 ShiftRight(Local2, 1, Local2)
753 } Else {
754 // Read next byte from cpu bitmap
755 Store(DerefOf(Index(Local5, ShiftRight(Local0, 3))), Local2)
756 }
757 // Local3 = active state for this cpu
758 Store(And(Local2, 1), Local3)
759
760 If (LNotEqual(Local1, Local3)) {
761 // State change - update CPON with new state
762 Store(Local3, Index(CPON, Local0))
763 // Do CPU notify
764 If (LEqual(Local3, 1)) {
765 NTFY(Local0, 1)
766 } Else {
767 NTFY(Local0, 3)
768 }
769 }
770 Increment(Local0)
771 }
772 Return(One)
773 }
774 }
775
776 Scope (\_GPE)
777 {
778 Name(_HID, "ACPI0006")
779
780 Method(_L00) {
781 Return(0x01)
782 }
783 Method(_L01) {
784 // CPU hotplug event
785 Return(\_SB.PRSC())
786 }
787 Method(_L02) {
788 Return(0x01)
789 }
790 Method(_L03) {
791 Return(0x01)
792 }
793 Method(_L04) {
794 Return(0x01)
795 }
796 Method(_L05) {
797 Return(0x01)
798 }
799 Method(_L06) {
800 Return(0x01)
801 }
802 Method(_L07) {
803 Return(0x01)
804 }
805 Method(_L08) {
806 Return(0x01)
807 }
808 Method(_L09) {
809 Return(0x01)
810 }
811 Method(_L0A) {
812 Return(0x01)
813 }
814 Method(_L0B) {
815 Return(0x01)
816 }
817 Method(_L0C) {
818 Return(0x01)
819 }
820 Method(_L0D) {
821 Return(0x01)
822 }
823 Method(_L0E) {
824 Return(0x01)
825 }
826 Method(_L0F) {
827 Return(0x01)
828 }
829 }
830}